1 /* General "disassemble this chunk" code. Used for debugging. */
8 #include "disas/disas.h"
10 typedef struct CPUDebug
{
11 struct disassemble_info info
;
15 /* Filled in by elfload.c. Simplistic, but will do for now. */
16 struct syminfo
*syminfos
= NULL
;
18 /* Get LENGTH bytes from info's buffer, at target address memaddr.
19 Transfer them to myaddr. */
21 buffer_read_memory(bfd_vma memaddr
, bfd_byte
*myaddr
, int length
,
22 struct disassemble_info
*info
)
24 if (memaddr
< info
->buffer_vma
25 || memaddr
+ length
> info
->buffer_vma
+ info
->buffer_length
)
26 /* Out of bounds. Use EIO because GDB uses it. */
28 memcpy (myaddr
, info
->buffer
+ (memaddr
- info
->buffer_vma
), length
);
32 /* Get LENGTH bytes from info's buffer, at target address memaddr.
33 Transfer them to myaddr. */
35 target_read_memory (bfd_vma memaddr
,
38 struct disassemble_info
*info
)
40 CPUDebug
*s
= container_of(info
, CPUDebug
, info
);
42 cpu_memory_rw_debug(s
->env
, memaddr
, myaddr
, length
, 0);
46 /* Print an error message. We can assume that this is in response to
47 an error return from buffer_read_memory. */
49 perror_memory (int status
, bfd_vma memaddr
, struct disassemble_info
*info
)
53 (*info
->fprintf_func
) (info
->stream
, "Unknown error %d\n", status
);
55 /* Actually, address between memaddr and memaddr + len was
57 (*info
->fprintf_func
) (info
->stream
,
58 "Address 0x%" PRIx64
" is out of bounds.\n", memaddr
);
61 /* This could be in a separate file, to save minuscule amounts of space
62 in statically linked executables. */
64 /* Just print the address is hex. This is included for completeness even
65 though both GDB and objdump provide their own (to print symbolic
69 generic_print_address (bfd_vma addr
, struct disassemble_info
*info
)
71 (*info
->fprintf_func
) (info
->stream
, "0x%" PRIx64
, addr
);
74 /* Print address in hex, truncated to the width of a target virtual address. */
76 generic_print_target_address(bfd_vma addr
, struct disassemble_info
*info
)
78 uint64_t mask
= ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS
);
79 generic_print_address(addr
& mask
, info
);
82 /* Print address in hex, truncated to the width of a host virtual address. */
84 generic_print_host_address(bfd_vma addr
, struct disassemble_info
*info
)
86 uint64_t mask
= ~0ULL >> (64 - (sizeof(void *) * 8));
87 generic_print_address(addr
& mask
, info
);
90 /* Just return the given address. */
93 generic_symbol_at_address (bfd_vma addr
, struct disassemble_info
*info
)
98 bfd_vma
bfd_getl64 (const bfd_byte
*addr
)
100 unsigned long long v
;
102 v
= (unsigned long long) addr
[0];
103 v
|= (unsigned long long) addr
[1] << 8;
104 v
|= (unsigned long long) addr
[2] << 16;
105 v
|= (unsigned long long) addr
[3] << 24;
106 v
|= (unsigned long long) addr
[4] << 32;
107 v
|= (unsigned long long) addr
[5] << 40;
108 v
|= (unsigned long long) addr
[6] << 48;
109 v
|= (unsigned long long) addr
[7] << 56;
113 bfd_vma
bfd_getl32 (const bfd_byte
*addr
)
117 v
= (unsigned long) addr
[0];
118 v
|= (unsigned long) addr
[1] << 8;
119 v
|= (unsigned long) addr
[2] << 16;
120 v
|= (unsigned long) addr
[3] << 24;
124 bfd_vma
bfd_getb32 (const bfd_byte
*addr
)
128 v
= (unsigned long) addr
[0] << 24;
129 v
|= (unsigned long) addr
[1] << 16;
130 v
|= (unsigned long) addr
[2] << 8;
131 v
|= (unsigned long) addr
[3];
135 bfd_vma
bfd_getl16 (const bfd_byte
*addr
)
139 v
= (unsigned long) addr
[0];
140 v
|= (unsigned long) addr
[1] << 8;
144 bfd_vma
bfd_getb16 (const bfd_byte
*addr
)
148 v
= (unsigned long) addr
[0] << 24;
149 v
|= (unsigned long) addr
[1] << 16;
155 print_insn_thumb1(bfd_vma pc
, disassemble_info
*info
)
157 return print_insn_arm(pc
| 1, info
);
161 /* Disassemble this for me please... (debugging). 'flags' has the following
163 i386 - 1 means 16 bit code, 2 means 64 bit code
164 arm - bit 0 = thumb, bit 1 = reverse endian
165 ppc - nonzero means little endian
166 other targets - unused
168 void target_disas(FILE *out
, CPUArchState
*env
, target_ulong code
,
169 target_ulong size
, int flags
)
174 int (*print_insn
)(bfd_vma pc
, disassemble_info
*info
);
176 INIT_DISASSEMBLE_INFO(s
.info
, out
, fprintf
);
179 s
.info
.read_memory_func
= target_read_memory
;
180 s
.info
.buffer_vma
= code
;
181 s
.info
.buffer_length
= size
;
182 s
.info
.print_address_func
= generic_print_target_address
;
184 #ifdef TARGET_WORDS_BIGENDIAN
185 s
.info
.endian
= BFD_ENDIAN_BIG
;
187 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
189 #if defined(TARGET_I386)
191 s
.info
.mach
= bfd_mach_x86_64
;
192 } else if (flags
== 1) {
193 s
.info
.mach
= bfd_mach_i386_i8086
;
195 s
.info
.mach
= bfd_mach_i386_i386
;
197 print_insn
= print_insn_i386
;
198 #elif defined(TARGET_ARM)
200 print_insn
= print_insn_thumb1
;
202 print_insn
= print_insn_arm
;
205 #ifdef TARGET_WORDS_BIGENDIAN
206 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
208 s
.info
.endian
= BFD_ENDIAN_BIG
;
211 #elif defined(TARGET_SPARC)
212 print_insn
= print_insn_sparc
;
213 #ifdef TARGET_SPARC64
214 s
.info
.mach
= bfd_mach_sparc_v9b
;
216 #elif defined(TARGET_PPC)
218 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
220 if (flags
& 0xFFFF) {
221 /* If we have a precise definitions of the instructions set, use it */
222 s
.info
.mach
= flags
& 0xFFFF;
225 s
.info
.mach
= bfd_mach_ppc64
;
227 s
.info
.mach
= bfd_mach_ppc
;
230 print_insn
= print_insn_ppc
;
231 #elif defined(TARGET_M68K)
232 print_insn
= print_insn_m68k
;
233 #elif defined(TARGET_MIPS)
234 #ifdef TARGET_WORDS_BIGENDIAN
235 print_insn
= print_insn_big_mips
;
237 print_insn
= print_insn_little_mips
;
239 #elif defined(TARGET_SH4)
240 s
.info
.mach
= bfd_mach_sh4
;
241 print_insn
= print_insn_sh
;
242 #elif defined(TARGET_ALPHA)
243 s
.info
.mach
= bfd_mach_alpha_ev6
;
244 print_insn
= print_insn_alpha
;
245 #elif defined(TARGET_CRIS)
247 s
.info
.mach
= bfd_mach_cris_v0_v10
;
248 print_insn
= print_insn_crisv10
;
250 s
.info
.mach
= bfd_mach_cris_v32
;
251 print_insn
= print_insn_crisv32
;
253 #elif defined(TARGET_S390X)
254 s
.info
.mach
= bfd_mach_s390_64
;
255 print_insn
= print_insn_s390
;
256 #elif defined(TARGET_MICROBLAZE)
257 s
.info
.mach
= bfd_arch_microblaze
;
258 print_insn
= print_insn_microblaze
;
259 #elif defined(TARGET_LM32)
260 s
.info
.mach
= bfd_mach_lm32
;
261 print_insn
= print_insn_lm32
;
263 fprintf(out
, "0x" TARGET_FMT_lx
264 ": Asm output not supported on this arch\n", code
);
268 for (pc
= code
; size
> 0; pc
+= count
, size
-= count
) {
269 fprintf(out
, "0x" TARGET_FMT_lx
": ", pc
);
270 count
= print_insn(pc
, &s
.info
);
276 for(i
= 0; i
< count
; i
++) {
277 target_read_memory(pc
+ i
, &b
, 1, &s
.info
);
278 fprintf(out
, " %02x", b
);
288 "Disassembler disagrees with translator over instruction "
290 "Please report this to qemu-devel@nongnu.org\n");
296 /* Disassemble this for me please... (debugging). */
297 void disas(FILE *out
, void *code
, unsigned long size
)
302 int (*print_insn
)(bfd_vma pc
, disassemble_info
*info
);
304 INIT_DISASSEMBLE_INFO(s
.info
, out
, fprintf
);
305 s
.info
.print_address_func
= generic_print_host_address
;
307 s
.info
.buffer
= code
;
308 s
.info
.buffer_vma
= (uintptr_t)code
;
309 s
.info
.buffer_length
= size
;
311 #ifdef HOST_WORDS_BIGENDIAN
312 s
.info
.endian
= BFD_ENDIAN_BIG
;
314 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
316 #if defined(CONFIG_TCG_INTERPRETER)
317 print_insn
= print_insn_tci
;
318 #elif defined(__i386__)
319 s
.info
.mach
= bfd_mach_i386_i386
;
320 print_insn
= print_insn_i386
;
321 #elif defined(__x86_64__)
322 s
.info
.mach
= bfd_mach_x86_64
;
323 print_insn
= print_insn_i386
;
324 #elif defined(_ARCH_PPC)
325 print_insn
= print_insn_ppc
;
326 #elif defined(__alpha__)
327 print_insn
= print_insn_alpha
;
328 #elif defined(__sparc__)
329 print_insn
= print_insn_sparc
;
330 s
.info
.mach
= bfd_mach_sparc_v9b
;
331 #elif defined(__arm__)
332 print_insn
= print_insn_arm
;
333 #elif defined(__MIPSEB__)
334 print_insn
= print_insn_big_mips
;
335 #elif defined(__MIPSEL__)
336 print_insn
= print_insn_little_mips
;
337 #elif defined(__m68k__)
338 print_insn
= print_insn_m68k
;
339 #elif defined(__s390__)
340 print_insn
= print_insn_s390
;
341 #elif defined(__hppa__)
342 print_insn
= print_insn_hppa
;
343 #elif defined(__ia64__)
344 print_insn
= print_insn_ia64
;
346 fprintf(out
, "0x%lx: Asm output not supported on this arch\n",
350 for (pc
= (uintptr_t)code
; size
> 0; pc
+= count
, size
-= count
) {
351 fprintf(out
, "0x%08" PRIxPTR
": ", pc
);
352 count
= print_insn(pc
, &s
.info
);
359 /* Look up symbol for debugging purpose. Returns "" if unknown. */
360 const char *lookup_symbol(target_ulong orig_addr
)
362 const char *symbol
= "";
365 for (s
= syminfos
; s
; s
= s
->next
) {
366 symbol
= s
->lookup_symbol(s
, orig_addr
);
367 if (symbol
[0] != '\0') {
375 #if !defined(CONFIG_USER_ONLY)
379 static int monitor_disas_is_physical
;
382 monitor_read_memory (bfd_vma memaddr
, bfd_byte
*myaddr
, int length
,
383 struct disassemble_info
*info
)
385 CPUDebug
*s
= container_of(info
, CPUDebug
, info
);
387 if (monitor_disas_is_physical
) {
388 cpu_physical_memory_read(memaddr
, myaddr
, length
);
390 cpu_memory_rw_debug(s
->env
, memaddr
,myaddr
, length
, 0);
395 static int GCC_FMT_ATTR(2, 3)
396 monitor_fprintf(FILE *stream
, const char *fmt
, ...)
400 monitor_vprintf((Monitor
*)stream
, fmt
, ap
);
405 void monitor_disas(Monitor
*mon
, CPUArchState
*env
,
406 target_ulong pc
, int nb_insn
, int is_physical
, int flags
)
410 int (*print_insn
)(bfd_vma pc
, disassemble_info
*info
);
412 INIT_DISASSEMBLE_INFO(s
.info
, (FILE *)mon
, monitor_fprintf
);
415 monitor_disas_is_physical
= is_physical
;
416 s
.info
.read_memory_func
= monitor_read_memory
;
417 s
.info
.print_address_func
= generic_print_target_address
;
419 s
.info
.buffer_vma
= pc
;
421 #ifdef TARGET_WORDS_BIGENDIAN
422 s
.info
.endian
= BFD_ENDIAN_BIG
;
424 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
426 #if defined(TARGET_I386)
428 s
.info
.mach
= bfd_mach_x86_64
;
429 } else if (flags
== 1) {
430 s
.info
.mach
= bfd_mach_i386_i8086
;
432 s
.info
.mach
= bfd_mach_i386_i386
;
434 print_insn
= print_insn_i386
;
435 #elif defined(TARGET_ARM)
436 print_insn
= print_insn_arm
;
437 #elif defined(TARGET_ALPHA)
438 print_insn
= print_insn_alpha
;
439 #elif defined(TARGET_SPARC)
440 print_insn
= print_insn_sparc
;
441 #ifdef TARGET_SPARC64
442 s
.info
.mach
= bfd_mach_sparc_v9b
;
444 #elif defined(TARGET_PPC)
446 s
.info
.mach
= bfd_mach_ppc64
;
448 s
.info
.mach
= bfd_mach_ppc
;
450 print_insn
= print_insn_ppc
;
451 #elif defined(TARGET_M68K)
452 print_insn
= print_insn_m68k
;
453 #elif defined(TARGET_MIPS)
454 #ifdef TARGET_WORDS_BIGENDIAN
455 print_insn
= print_insn_big_mips
;
457 print_insn
= print_insn_little_mips
;
459 #elif defined(TARGET_SH4)
460 s
.info
.mach
= bfd_mach_sh4
;
461 print_insn
= print_insn_sh
;
462 #elif defined(TARGET_S390X)
463 s
.info
.mach
= bfd_mach_s390_64
;
464 print_insn
= print_insn_s390
;
465 #elif defined(TARGET_LM32)
466 s
.info
.mach
= bfd_mach_lm32
;
467 print_insn
= print_insn_lm32
;
469 monitor_printf(mon
, "0x" TARGET_FMT_lx
470 ": Asm output not supported on this arch\n", pc
);
474 for(i
= 0; i
< nb_insn
; i
++) {
475 monitor_printf(mon
, "0x" TARGET_FMT_lx
": ", pc
);
476 count
= print_insn(pc
, &s
.info
);
477 monitor_printf(mon
, "\n");