2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
31 /* Define to jump the ELF file used to communicate with GDB. */
34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
35 /* define it to suppress various consistency checks (faster) */
39 #include "qemu-common.h"
40 #include "cache-utils.h"
41 #include "host-utils.h"
42 #include "qemu-timer.h"
44 /* Note: the long term plan is to reduce the dependancies on the QEMU
45 CPU definitions. Currently they are used for qemu_ld/st
47 #define NO_CPU_IO_DEFS
52 #if TCG_TARGET_REG_BITS == 64
53 # define ELF_CLASS ELFCLASS64
55 # define ELF_CLASS ELFCLASS32
57 #ifdef HOST_WORDS_BIGENDIAN
58 # define ELF_DATA ELFDATA2MSB
60 # define ELF_DATA ELFDATA2LSB
65 #if defined(CONFIG_USE_GUEST_BASE) && !defined(TCG_TARGET_HAS_GUEST_BASE)
66 #error GUEST_BASE not supported on this host.
69 /* Forward declarations for functions declared in tcg-target.c and used here. */
70 static void tcg_target_init(TCGContext
*s
);
71 static void tcg_target_qemu_prologue(TCGContext
*s
);
72 static void patch_reloc(uint8_t *code_ptr
, int type
,
73 tcg_target_long value
, tcg_target_long addend
);
75 static void tcg_register_jit_int(void *buf
, size_t size
,
76 void *debug_frame
, size_t debug_frame_size
)
77 __attribute__((unused
));
79 /* Forward declarations for functions declared and used in tcg-target.c. */
80 static int target_parse_constraint(TCGArgConstraint
*ct
, const char **pct_str
);
81 static void tcg_out_ld(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg1
,
82 tcg_target_long arg2
);
83 static void tcg_out_mov(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg
);
84 static void tcg_out_movi(TCGContext
*s
, TCGType type
,
85 TCGReg ret
, tcg_target_long arg
);
86 static void tcg_out_op(TCGContext
*s
, TCGOpcode opc
, const TCGArg
*args
,
87 const int *const_args
);
88 static void tcg_out_st(TCGContext
*s
, TCGType type
, TCGReg arg
, TCGReg arg1
,
89 tcg_target_long arg2
);
90 static int tcg_target_const_match(tcg_target_long val
,
91 const TCGArgConstraint
*arg_ct
);
93 TCGOpDef tcg_op_defs
[] = {
94 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
98 const size_t tcg_op_defs_max
= ARRAY_SIZE(tcg_op_defs
);
100 static TCGRegSet tcg_target_available_regs
[2];
101 static TCGRegSet tcg_target_call_clobber_regs
;
103 /* XXX: move that inside the context */
104 uint16_t *gen_opc_ptr
;
105 TCGArg
*gen_opparam_ptr
;
107 static inline void tcg_out8(TCGContext
*s
, uint8_t v
)
112 static inline void tcg_out16(TCGContext
*s
, uint16_t v
)
114 *(uint16_t *)s
->code_ptr
= v
;
118 static inline void tcg_out32(TCGContext
*s
, uint32_t v
)
120 *(uint32_t *)s
->code_ptr
= v
;
124 /* label relocation processing */
126 static void tcg_out_reloc(TCGContext
*s
, uint8_t *code_ptr
, int type
,
127 int label_index
, long addend
)
132 l
= &s
->labels
[label_index
];
134 /* FIXME: This may break relocations on RISC targets that
135 modify instruction fields in place. The caller may not have
136 written the initial value. */
137 patch_reloc(code_ptr
, type
, l
->u
.value
, addend
);
139 /* add a new relocation entry */
140 r
= tcg_malloc(sizeof(TCGRelocation
));
144 r
->next
= l
->u
.first_reloc
;
145 l
->u
.first_reloc
= r
;
149 static void tcg_out_label(TCGContext
*s
, int label_index
, void *ptr
)
153 tcg_target_long value
= (tcg_target_long
)ptr
;
155 l
= &s
->labels
[label_index
];
158 r
= l
->u
.first_reloc
;
160 patch_reloc(r
->ptr
, r
->type
, value
, r
->addend
);
167 int gen_new_label(void)
169 TCGContext
*s
= &tcg_ctx
;
173 if (s
->nb_labels
>= TCG_MAX_LABELS
)
175 idx
= s
->nb_labels
++;
178 l
->u
.first_reloc
= NULL
;
182 #include "tcg-target.c"
184 /* pool based memory allocation */
185 void *tcg_malloc_internal(TCGContext
*s
, int size
)
190 if (size
> TCG_POOL_CHUNK_SIZE
) {
191 /* big malloc: insert a new pool (XXX: could optimize) */
192 p
= g_malloc(sizeof(TCGPool
) + size
);
194 p
->next
= s
->pool_first_large
;
195 s
->pool_first_large
= p
;
206 pool_size
= TCG_POOL_CHUNK_SIZE
;
207 p
= g_malloc(sizeof(TCGPool
) + pool_size
);
211 s
->pool_current
->next
= p
;
220 s
->pool_cur
= p
->data
+ size
;
221 s
->pool_end
= p
->data
+ p
->size
;
225 void tcg_pool_reset(TCGContext
*s
)
228 for (p
= s
->pool_first_large
; p
; p
= t
) {
232 s
->pool_first_large
= NULL
;
233 s
->pool_cur
= s
->pool_end
= NULL
;
234 s
->pool_current
= NULL
;
237 void tcg_context_init(TCGContext
*s
)
239 int op
, total_args
, n
;
241 TCGArgConstraint
*args_ct
;
244 memset(s
, 0, sizeof(*s
));
245 s
->temps
= s
->static_temps
;
248 /* Count total number of arguments and allocate the corresponding
251 for(op
= 0; op
< NB_OPS
; op
++) {
252 def
= &tcg_op_defs
[op
];
253 n
= def
->nb_iargs
+ def
->nb_oargs
;
257 args_ct
= g_malloc(sizeof(TCGArgConstraint
) * total_args
);
258 sorted_args
= g_malloc(sizeof(int) * total_args
);
260 for(op
= 0; op
< NB_OPS
; op
++) {
261 def
= &tcg_op_defs
[op
];
262 def
->args_ct
= args_ct
;
263 def
->sorted_args
= sorted_args
;
264 n
= def
->nb_iargs
+ def
->nb_oargs
;
272 void tcg_prologue_init(TCGContext
*s
)
274 /* init global prologue and epilogue */
275 s
->code_buf
= code_gen_prologue
;
276 s
->code_ptr
= s
->code_buf
;
277 tcg_target_qemu_prologue(s
);
278 flush_icache_range((tcg_target_ulong
)s
->code_buf
,
279 (tcg_target_ulong
)s
->code_ptr
);
282 void tcg_set_frame(TCGContext
*s
, int reg
,
283 tcg_target_long start
, tcg_target_long size
)
285 s
->frame_start
= start
;
286 s
->frame_end
= start
+ size
;
290 void tcg_func_start(TCGContext
*s
)
294 s
->nb_temps
= s
->nb_globals
;
295 for(i
= 0; i
< (TCG_TYPE_COUNT
* 2); i
++)
296 s
->first_free_temp
[i
] = -1;
297 s
->labels
= tcg_malloc(sizeof(TCGLabel
) * TCG_MAX_LABELS
);
299 s
->current_frame_offset
= s
->frame_start
;
301 gen_opc_ptr
= gen_opc_buf
;
302 gen_opparam_ptr
= gen_opparam_buf
;
305 static inline void tcg_temp_alloc(TCGContext
*s
, int n
)
307 if (n
> TCG_MAX_TEMPS
)
311 static inline int tcg_global_reg_new_internal(TCGType type
, int reg
,
314 TCGContext
*s
= &tcg_ctx
;
318 #if TCG_TARGET_REG_BITS == 32
319 if (type
!= TCG_TYPE_I32
)
322 if (tcg_regset_test_reg(s
->reserved_regs
, reg
))
325 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
326 ts
= &s
->temps
[s
->nb_globals
];
327 ts
->base_type
= type
;
333 tcg_regset_set_reg(s
->reserved_regs
, reg
);
337 TCGv_i32
tcg_global_reg_new_i32(int reg
, const char *name
)
341 idx
= tcg_global_reg_new_internal(TCG_TYPE_I32
, reg
, name
);
342 return MAKE_TCGV_I32(idx
);
345 TCGv_i64
tcg_global_reg_new_i64(int reg
, const char *name
)
349 idx
= tcg_global_reg_new_internal(TCG_TYPE_I64
, reg
, name
);
350 return MAKE_TCGV_I64(idx
);
353 static inline int tcg_global_mem_new_internal(TCGType type
, int reg
,
354 tcg_target_long offset
,
357 TCGContext
*s
= &tcg_ctx
;
362 #if TCG_TARGET_REG_BITS == 32
363 if (type
== TCG_TYPE_I64
) {
365 tcg_temp_alloc(s
, s
->nb_globals
+ 2);
366 ts
= &s
->temps
[s
->nb_globals
];
367 ts
->base_type
= type
;
368 ts
->type
= TCG_TYPE_I32
;
370 ts
->mem_allocated
= 1;
372 #ifdef TCG_TARGET_WORDS_BIGENDIAN
373 ts
->mem_offset
= offset
+ 4;
375 ts
->mem_offset
= offset
;
377 pstrcpy(buf
, sizeof(buf
), name
);
378 pstrcat(buf
, sizeof(buf
), "_0");
379 ts
->name
= strdup(buf
);
382 ts
->base_type
= type
;
383 ts
->type
= TCG_TYPE_I32
;
385 ts
->mem_allocated
= 1;
387 #ifdef TCG_TARGET_WORDS_BIGENDIAN
388 ts
->mem_offset
= offset
;
390 ts
->mem_offset
= offset
+ 4;
392 pstrcpy(buf
, sizeof(buf
), name
);
393 pstrcat(buf
, sizeof(buf
), "_1");
394 ts
->name
= strdup(buf
);
400 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
401 ts
= &s
->temps
[s
->nb_globals
];
402 ts
->base_type
= type
;
405 ts
->mem_allocated
= 1;
407 ts
->mem_offset
= offset
;
414 TCGv_i32
tcg_global_mem_new_i32(int reg
, tcg_target_long offset
,
419 idx
= tcg_global_mem_new_internal(TCG_TYPE_I32
, reg
, offset
, name
);
420 return MAKE_TCGV_I32(idx
);
423 TCGv_i64
tcg_global_mem_new_i64(int reg
, tcg_target_long offset
,
428 idx
= tcg_global_mem_new_internal(TCG_TYPE_I64
, reg
, offset
, name
);
429 return MAKE_TCGV_I64(idx
);
432 static inline int tcg_temp_new_internal(TCGType type
, int temp_local
)
434 TCGContext
*s
= &tcg_ctx
;
441 idx
= s
->first_free_temp
[k
];
443 /* There is already an available temp with the
446 s
->first_free_temp
[k
] = ts
->next_free_temp
;
447 ts
->temp_allocated
= 1;
448 assert(ts
->temp_local
== temp_local
);
451 #if TCG_TARGET_REG_BITS == 32
452 if (type
== TCG_TYPE_I64
) {
453 tcg_temp_alloc(s
, s
->nb_temps
+ 2);
454 ts
= &s
->temps
[s
->nb_temps
];
455 ts
->base_type
= type
;
456 ts
->type
= TCG_TYPE_I32
;
457 ts
->temp_allocated
= 1;
458 ts
->temp_local
= temp_local
;
461 ts
->base_type
= TCG_TYPE_I32
;
462 ts
->type
= TCG_TYPE_I32
;
463 ts
->temp_allocated
= 1;
464 ts
->temp_local
= temp_local
;
470 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
471 ts
= &s
->temps
[s
->nb_temps
];
472 ts
->base_type
= type
;
474 ts
->temp_allocated
= 1;
475 ts
->temp_local
= temp_local
;
481 #if defined(CONFIG_DEBUG_TCG)
487 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
)
491 idx
= tcg_temp_new_internal(TCG_TYPE_I32
, temp_local
);
492 return MAKE_TCGV_I32(idx
);
495 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
)
499 idx
= tcg_temp_new_internal(TCG_TYPE_I64
, temp_local
);
500 return MAKE_TCGV_I64(idx
);
503 static inline void tcg_temp_free_internal(int idx
)
505 TCGContext
*s
= &tcg_ctx
;
509 #if defined(CONFIG_DEBUG_TCG)
511 if (s
->temps_in_use
< 0) {
512 fprintf(stderr
, "More temporaries freed than allocated!\n");
516 assert(idx
>= s
->nb_globals
&& idx
< s
->nb_temps
);
518 assert(ts
->temp_allocated
!= 0);
519 ts
->temp_allocated
= 0;
523 ts
->next_free_temp
= s
->first_free_temp
[k
];
524 s
->first_free_temp
[k
] = idx
;
527 void tcg_temp_free_i32(TCGv_i32 arg
)
529 tcg_temp_free_internal(GET_TCGV_I32(arg
));
532 void tcg_temp_free_i64(TCGv_i64 arg
)
534 tcg_temp_free_internal(GET_TCGV_I64(arg
));
537 TCGv_i32
tcg_const_i32(int32_t val
)
540 t0
= tcg_temp_new_i32();
541 tcg_gen_movi_i32(t0
, val
);
545 TCGv_i64
tcg_const_i64(int64_t val
)
548 t0
= tcg_temp_new_i64();
549 tcg_gen_movi_i64(t0
, val
);
553 TCGv_i32
tcg_const_local_i32(int32_t val
)
556 t0
= tcg_temp_local_new_i32();
557 tcg_gen_movi_i32(t0
, val
);
561 TCGv_i64
tcg_const_local_i64(int64_t val
)
564 t0
= tcg_temp_local_new_i64();
565 tcg_gen_movi_i64(t0
, val
);
569 #if defined(CONFIG_DEBUG_TCG)
570 void tcg_clear_temp_count(void)
572 TCGContext
*s
= &tcg_ctx
;
576 int tcg_check_temp_count(void)
578 TCGContext
*s
= &tcg_ctx
;
579 if (s
->temps_in_use
) {
580 /* Clear the count so that we don't give another
581 * warning immediately next time around.
590 void tcg_register_helper(void *func
, const char *name
)
592 TCGContext
*s
= &tcg_ctx
;
594 if ((s
->nb_helpers
+ 1) > s
->allocated_helpers
) {
595 n
= s
->allocated_helpers
;
601 s
->helpers
= realloc(s
->helpers
, n
* sizeof(TCGHelperInfo
));
602 s
->allocated_helpers
= n
;
604 s
->helpers
[s
->nb_helpers
].func
= (tcg_target_ulong
)func
;
605 s
->helpers
[s
->nb_helpers
].name
= name
;
609 /* Note: we convert the 64 bit args to 32 bit and do some alignment
610 and endian swap. Maybe it would be better to do the alignment
611 and endian swap in tcg_reg_alloc_call(). */
612 void tcg_gen_callN(TCGContext
*s
, TCGv_ptr func
, unsigned int flags
,
613 int sizemask
, TCGArg ret
, int nargs
, TCGArg
*args
)
620 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
621 for (i
= 0; i
< nargs
; ++i
) {
622 int is_64bit
= sizemask
& (1 << (i
+1)*2);
623 int is_signed
= sizemask
& (2 << (i
+1)*2);
625 TCGv_i64 temp
= tcg_temp_new_i64();
626 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
628 tcg_gen_ext32s_i64(temp
, orig
);
630 tcg_gen_ext32u_i64(temp
, orig
);
632 args
[i
] = GET_TCGV_I64(temp
);
635 #endif /* TCG_TARGET_EXTEND_ARGS */
637 *gen_opc_ptr
++ = INDEX_op_call
;
638 nparam
= gen_opparam_ptr
++;
639 if (ret
!= TCG_CALL_DUMMY_ARG
) {
640 #if TCG_TARGET_REG_BITS < 64
642 #ifdef TCG_TARGET_WORDS_BIGENDIAN
643 *gen_opparam_ptr
++ = ret
+ 1;
644 *gen_opparam_ptr
++ = ret
;
646 *gen_opparam_ptr
++ = ret
;
647 *gen_opparam_ptr
++ = ret
+ 1;
653 *gen_opparam_ptr
++ = ret
;
660 for (i
= 0; i
< nargs
; i
++) {
661 #if TCG_TARGET_REG_BITS < 64
662 int is_64bit
= sizemask
& (1 << (i
+1)*2);
664 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
665 /* some targets want aligned 64 bit args */
667 *gen_opparam_ptr
++ = TCG_CALL_DUMMY_ARG
;
671 /* If stack grows up, then we will be placing successive
672 arguments at lower addresses, which means we need to
673 reverse the order compared to how we would normally
674 treat either big or little-endian. For those arguments
675 that will wind up in registers, this still works for
676 HPPA (the only current STACK_GROWSUP target) since the
677 argument registers are *also* allocated in decreasing
678 order. If another such target is added, this logic may
679 have to get more complicated to differentiate between
680 stack arguments and register arguments. */
681 #if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
682 *gen_opparam_ptr
++ = args
[i
] + 1;
683 *gen_opparam_ptr
++ = args
[i
];
685 *gen_opparam_ptr
++ = args
[i
];
686 *gen_opparam_ptr
++ = args
[i
] + 1;
691 #endif /* TCG_TARGET_REG_BITS < 64 */
693 *gen_opparam_ptr
++ = args
[i
];
696 *gen_opparam_ptr
++ = GET_TCGV_PTR(func
);
698 *gen_opparam_ptr
++ = flags
;
700 *nparam
= (nb_rets
<< 16) | (real_args
+ 1);
702 /* total parameters, needed to go backward in the instruction stream */
703 *gen_opparam_ptr
++ = 1 + nb_rets
+ real_args
+ 3;
705 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
706 for (i
= 0; i
< nargs
; ++i
) {
707 int is_64bit
= sizemask
& (1 << (i
+1)*2);
709 TCGv_i64 temp
= MAKE_TCGV_I64(args
[i
]);
710 tcg_temp_free_i64(temp
);
713 #endif /* TCG_TARGET_EXTEND_ARGS */
716 #if TCG_TARGET_REG_BITS == 32
717 void tcg_gen_shifti_i64(TCGv_i64 ret
, TCGv_i64 arg1
,
718 int c
, int right
, int arith
)
721 tcg_gen_mov_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
));
722 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
));
723 } else if (c
>= 32) {
727 tcg_gen_sari_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
728 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), 31);
730 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
731 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
734 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_LOW(arg1
), c
);
735 tcg_gen_movi_i32(TCGV_LOW(ret
), 0);
740 t0
= tcg_temp_new_i32();
741 t1
= tcg_temp_new_i32();
743 tcg_gen_shli_i32(t0
, TCGV_HIGH(arg1
), 32 - c
);
745 tcg_gen_sari_i32(t1
, TCGV_HIGH(arg1
), c
);
747 tcg_gen_shri_i32(t1
, TCGV_HIGH(arg1
), c
);
748 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), c
);
749 tcg_gen_or_i32(TCGV_LOW(ret
), TCGV_LOW(ret
), t0
);
750 tcg_gen_mov_i32(TCGV_HIGH(ret
), t1
);
752 tcg_gen_shri_i32(t0
, TCGV_LOW(arg1
), 32 - c
);
753 /* Note: ret can be the same as arg1, so we use t1 */
754 tcg_gen_shli_i32(t1
, TCGV_LOW(arg1
), c
);
755 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), c
);
756 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(ret
), t0
);
757 tcg_gen_mov_i32(TCGV_LOW(ret
), t1
);
759 tcg_temp_free_i32(t0
);
760 tcg_temp_free_i32(t1
);
766 static void tcg_reg_alloc_start(TCGContext
*s
)
770 for(i
= 0; i
< s
->nb_globals
; i
++) {
773 ts
->val_type
= TEMP_VAL_REG
;
775 ts
->val_type
= TEMP_VAL_MEM
;
778 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
780 ts
->val_type
= TEMP_VAL_DEAD
;
781 ts
->mem_allocated
= 0;
784 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
785 s
->reg_to_temp
[i
] = -1;
789 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
794 assert(idx
>= 0 && idx
< s
->nb_temps
);
797 if (idx
< s
->nb_globals
) {
798 pstrcpy(buf
, buf_size
, ts
->name
);
801 snprintf(buf
, buf_size
, "loc%d", idx
- s
->nb_globals
);
803 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
808 char *tcg_get_arg_str_i32(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i32 arg
)
810 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I32(arg
));
813 char *tcg_get_arg_str_i64(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i64 arg
)
815 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I64(arg
));
818 static int helper_cmp(const void *p1
, const void *p2
)
820 const TCGHelperInfo
*th1
= p1
;
821 const TCGHelperInfo
*th2
= p2
;
822 if (th1
->func
< th2
->func
)
824 else if (th1
->func
== th2
->func
)
830 /* find helper definition (Note: A hash table would be better) */
831 static TCGHelperInfo
*tcg_find_helper(TCGContext
*s
, tcg_target_ulong val
)
837 if (unlikely(!s
->helpers_sorted
)) {
838 qsort(s
->helpers
, s
->nb_helpers
, sizeof(TCGHelperInfo
),
840 s
->helpers_sorted
= 1;
845 m_max
= s
->nb_helpers
- 1;
846 while (m_min
<= m_max
) {
847 m
= (m_min
+ m_max
) >> 1;
861 static const char * const cond_name
[] =
863 [TCG_COND_EQ
] = "eq",
864 [TCG_COND_NE
] = "ne",
865 [TCG_COND_LT
] = "lt",
866 [TCG_COND_GE
] = "ge",
867 [TCG_COND_LE
] = "le",
868 [TCG_COND_GT
] = "gt",
869 [TCG_COND_LTU
] = "ltu",
870 [TCG_COND_GEU
] = "geu",
871 [TCG_COND_LEU
] = "leu",
872 [TCG_COND_GTU
] = "gtu"
875 void tcg_dump_ops(TCGContext
*s
)
877 const uint16_t *opc_ptr
;
881 int i
, k
, nb_oargs
, nb_iargs
, nb_cargs
, first_insn
;
886 opc_ptr
= gen_opc_buf
;
887 args
= gen_opparam_buf
;
888 while (opc_ptr
< gen_opc_ptr
) {
890 def
= &tcg_op_defs
[c
];
891 if (c
== INDEX_op_debug_insn_start
) {
893 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
894 pc
= ((uint64_t)args
[1] << 32) | args
[0];
901 qemu_log(" ---- 0x%" PRIx64
, pc
);
903 nb_oargs
= def
->nb_oargs
;
904 nb_iargs
= def
->nb_iargs
;
905 nb_cargs
= def
->nb_cargs
;
906 } else if (c
== INDEX_op_call
) {
909 /* variable number of arguments */
911 nb_oargs
= arg
>> 16;
912 nb_iargs
= arg
& 0xffff;
913 nb_cargs
= def
->nb_cargs
;
915 qemu_log(" %s ", def
->name
);
919 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
920 args
[nb_oargs
+ nb_iargs
- 1]));
922 qemu_log(",$0x%" TCG_PRIlx
, args
[nb_oargs
+ nb_iargs
]);
924 qemu_log(",$%d", nb_oargs
);
925 for(i
= 0; i
< nb_oargs
; i
++) {
927 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
930 for(i
= 0; i
< (nb_iargs
- 1); i
++) {
932 if (args
[nb_oargs
+ i
] == TCG_CALL_DUMMY_ARG
) {
935 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
936 args
[nb_oargs
+ i
]));
939 } else if (c
== INDEX_op_movi_i32
|| c
== INDEX_op_movi_i64
) {
940 tcg_target_ulong val
;
943 nb_oargs
= def
->nb_oargs
;
944 nb_iargs
= def
->nb_iargs
;
945 nb_cargs
= def
->nb_cargs
;
946 qemu_log(" %s %s,$", def
->name
,
947 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[0]));
949 th
= tcg_find_helper(s
, val
);
951 qemu_log("%s", th
->name
);
953 if (c
== INDEX_op_movi_i32
) {
954 qemu_log("0x%x", (uint32_t)val
);
956 qemu_log("0x%" PRIx64
, (uint64_t)val
);
960 qemu_log(" %s ", def
->name
);
961 if (c
== INDEX_op_nopn
) {
962 /* variable number of arguments */
967 nb_oargs
= def
->nb_oargs
;
968 nb_iargs
= def
->nb_iargs
;
969 nb_cargs
= def
->nb_cargs
;
973 for(i
= 0; i
< nb_oargs
; i
++) {
977 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
980 for(i
= 0; i
< nb_iargs
; i
++) {
984 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
988 case INDEX_op_brcond_i32
:
989 case INDEX_op_setcond_i32
:
990 case INDEX_op_movcond_i32
:
991 case INDEX_op_brcond2_i32
:
992 case INDEX_op_setcond2_i32
:
993 case INDEX_op_brcond_i64
:
994 case INDEX_op_setcond_i64
:
995 case INDEX_op_movcond_i64
:
996 if (args
[k
] < ARRAY_SIZE(cond_name
) && cond_name
[args
[k
]]) {
997 qemu_log(",%s", cond_name
[args
[k
++]]);
999 qemu_log(",$0x%" TCG_PRIlx
, args
[k
++]);
1007 for(; i
< nb_cargs
; i
++) {
1012 qemu_log("$0x%" TCG_PRIlx
, arg
);
1016 args
+= nb_iargs
+ nb_oargs
+ nb_cargs
;
1020 /* we give more priority to constraints with less registers */
1021 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
1023 const TCGArgConstraint
*arg_ct
;
1026 arg_ct
= &def
->args_ct
[k
];
1027 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1028 /* an alias is equivalent to a single register */
1031 if (!(arg_ct
->ct
& TCG_CT_REG
))
1034 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1035 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
1039 return TCG_TARGET_NB_REGS
- n
+ 1;
1042 /* sort from highest priority to lowest */
1043 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
1045 int i
, j
, p1
, p2
, tmp
;
1047 for(i
= 0; i
< n
; i
++)
1048 def
->sorted_args
[start
+ i
] = start
+ i
;
1051 for(i
= 0; i
< n
- 1; i
++) {
1052 for(j
= i
+ 1; j
< n
; j
++) {
1053 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
1054 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
1056 tmp
= def
->sorted_args
[start
+ i
];
1057 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
1058 def
->sorted_args
[start
+ j
] = tmp
;
1064 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
1072 if (tdefs
->op
== (TCGOpcode
)-1)
1075 assert((unsigned)op
< NB_OPS
);
1076 def
= &tcg_op_defs
[op
];
1077 #if defined(CONFIG_DEBUG_TCG)
1078 /* Duplicate entry in op definitions? */
1082 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
1083 for(i
= 0; i
< nb_args
; i
++) {
1084 ct_str
= tdefs
->args_ct_str
[i
];
1085 /* Incomplete TCGTargetOpDef entry? */
1086 assert(ct_str
!= NULL
);
1087 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
1088 def
->args_ct
[i
].ct
= 0;
1089 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
1091 oarg
= ct_str
[0] - '0';
1092 assert(oarg
< def
->nb_oargs
);
1093 assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
1094 /* TCG_CT_ALIAS is for the output arguments. The input
1095 argument is tagged with TCG_CT_IALIAS. */
1096 def
->args_ct
[i
] = def
->args_ct
[oarg
];
1097 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
1098 def
->args_ct
[oarg
].alias_index
= i
;
1099 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
1100 def
->args_ct
[i
].alias_index
= oarg
;
1103 if (*ct_str
== '\0')
1107 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
1111 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
1112 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1113 ct_str
, i
, def
->name
);
1121 /* TCGTargetOpDef entry with too much information? */
1122 assert(i
== TCG_MAX_OP_ARGS
|| tdefs
->args_ct_str
[i
] == NULL
);
1124 /* sort the constraints (XXX: this is just an heuristic) */
1125 sort_constraints(def
, 0, def
->nb_oargs
);
1126 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
1132 printf("%s: sorted=", def
->name
);
1133 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
1134 printf(" %d", def
->sorted_args
[i
]);
1141 #if defined(CONFIG_DEBUG_TCG)
1143 for (op
= 0; op
< ARRAY_SIZE(tcg_op_defs
); op
++) {
1144 const TCGOpDef
*def
= &tcg_op_defs
[op
];
1145 if (op
< INDEX_op_call
1146 || op
== INDEX_op_debug_insn_start
1147 || (def
->flags
& TCG_OPF_NOT_PRESENT
)) {
1148 /* Wrong entry in op definitions? */
1150 fprintf(stderr
, "Invalid op definition for %s\n", def
->name
);
1154 /* Missing entry in op definitions? */
1156 fprintf(stderr
, "Missing op definition for %s\n", def
->name
);
1167 #ifdef USE_LIVENESS_ANALYSIS
1169 /* set a nop for an operation using 'nb_args' */
1170 static inline void tcg_set_nop(TCGContext
*s
, uint16_t *opc_ptr
,
1171 TCGArg
*args
, int nb_args
)
1174 *opc_ptr
= INDEX_op_nop
;
1176 *opc_ptr
= INDEX_op_nopn
;
1178 args
[nb_args
- 1] = nb_args
;
1182 /* liveness analysis: end of function: globals are live, temps are
1184 /* XXX: at this stage, not used as there would be little gains because
1185 most TBs end with a conditional jump. */
1186 static inline void tcg_la_func_end(TCGContext
*s
, uint8_t *dead_temps
)
1188 memset(dead_temps
, 0, s
->nb_globals
);
1189 memset(dead_temps
+ s
->nb_globals
, 1, s
->nb_temps
- s
->nb_globals
);
1192 /* liveness analysis: end of basic block: globals are live, temps are
1193 dead, local temps are live. */
1194 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
)
1199 memset(dead_temps
, 0, s
->nb_globals
);
1200 ts
= &s
->temps
[s
->nb_globals
];
1201 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1210 /* Liveness analysis : update the opc_dead_args array to tell if a
1211 given input arguments is dead. Instructions updating dead
1212 temporaries are removed. */
1213 static void tcg_liveness_analysis(TCGContext
*s
)
1215 int i
, op_index
, nb_args
, nb_iargs
, nb_oargs
, arg
, nb_ops
;
1218 const TCGOpDef
*def
;
1219 uint8_t *dead_temps
;
1220 unsigned int dead_args
;
1222 gen_opc_ptr
++; /* skip end */
1224 nb_ops
= gen_opc_ptr
- gen_opc_buf
;
1226 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1228 dead_temps
= tcg_malloc(s
->nb_temps
);
1229 memset(dead_temps
, 1, s
->nb_temps
);
1231 args
= gen_opparam_ptr
;
1232 op_index
= nb_ops
- 1;
1233 while (op_index
>= 0) {
1234 op
= gen_opc_buf
[op_index
];
1235 def
= &tcg_op_defs
[op
];
1243 nb_iargs
= args
[0] & 0xffff;
1244 nb_oargs
= args
[0] >> 16;
1246 call_flags
= args
[nb_oargs
+ nb_iargs
];
1248 /* pure functions can be removed if their result is not
1250 if (call_flags
& TCG_CALL_PURE
) {
1251 for(i
= 0; i
< nb_oargs
; i
++) {
1253 if (!dead_temps
[arg
])
1254 goto do_not_remove_call
;
1256 tcg_set_nop(s
, gen_opc_buf
+ op_index
,
1261 /* output args are dead */
1263 for(i
= 0; i
< nb_oargs
; i
++) {
1265 if (dead_temps
[arg
]) {
1266 dead_args
|= (1 << i
);
1268 dead_temps
[arg
] = 1;
1271 if (!(call_flags
& TCG_CALL_CONST
)) {
1272 /* globals are live (they may be used by the call) */
1273 memset(dead_temps
, 0, s
->nb_globals
);
1276 /* input args are live */
1277 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
1279 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1280 if (dead_temps
[arg
]) {
1281 dead_args
|= (1 << i
);
1283 dead_temps
[arg
] = 0;
1286 s
->op_dead_args
[op_index
] = dead_args
;
1291 case INDEX_op_debug_insn_start
:
1292 args
-= def
->nb_args
;
1298 case INDEX_op_discard
:
1300 /* mark the temporary as dead */
1301 dead_temps
[args
[0]] = 1;
1305 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1307 args
-= def
->nb_args
;
1308 nb_iargs
= def
->nb_iargs
;
1309 nb_oargs
= def
->nb_oargs
;
1311 /* Test if the operation can be removed because all
1312 its outputs are dead. We assume that nb_oargs == 0
1313 implies side effects */
1314 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1315 for(i
= 0; i
< nb_oargs
; i
++) {
1317 if (!dead_temps
[arg
])
1320 tcg_set_nop(s
, gen_opc_buf
+ op_index
, args
, def
->nb_args
);
1321 #ifdef CONFIG_PROFILER
1327 /* output args are dead */
1329 for(i
= 0; i
< nb_oargs
; i
++) {
1331 if (dead_temps
[arg
]) {
1332 dead_args
|= (1 << i
);
1334 dead_temps
[arg
] = 1;
1337 /* if end of basic block, update */
1338 if (def
->flags
& TCG_OPF_BB_END
) {
1339 tcg_la_bb_end(s
, dead_temps
);
1340 } else if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1341 /* globals are live */
1342 memset(dead_temps
, 0, s
->nb_globals
);
1345 /* input args are live */
1346 for(i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1348 if (dead_temps
[arg
]) {
1349 dead_args
|= (1 << i
);
1351 dead_temps
[arg
] = 0;
1353 s
->op_dead_args
[op_index
] = dead_args
;
1360 if (args
!= gen_opparam_buf
)
1364 /* dummy liveness analysis */
1365 static void tcg_liveness_analysis(TCGContext
*s
)
1368 nb_ops
= gen_opc_ptr
- gen_opc_buf
;
1370 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1371 memset(s
->op_dead_args
, 0, nb_ops
* sizeof(uint16_t));
1376 static void dump_regs(TCGContext
*s
)
1382 for(i
= 0; i
< s
->nb_temps
; i
++) {
1384 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1385 switch(ts
->val_type
) {
1387 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1390 printf("%d(%s)", (int)ts
->mem_offset
, tcg_target_reg_names
[ts
->mem_reg
]);
1392 case TEMP_VAL_CONST
:
1393 printf("$0x%" TCG_PRIlx
, ts
->val
);
1405 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1406 if (s
->reg_to_temp
[i
] >= 0) {
1408 tcg_target_reg_names
[i
],
1409 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1414 static void check_regs(TCGContext
*s
)
1420 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1421 k
= s
->reg_to_temp
[reg
];
1424 if (ts
->val_type
!= TEMP_VAL_REG
||
1426 printf("Inconsistency for register %s:\n",
1427 tcg_target_reg_names
[reg
]);
1432 for(k
= 0; k
< s
->nb_temps
; k
++) {
1434 if (ts
->val_type
== TEMP_VAL_REG
&&
1436 s
->reg_to_temp
[ts
->reg
] != k
) {
1437 printf("Inconsistency for temp %s:\n",
1438 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), k
));
1440 printf("reg state:\n");
1448 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1451 ts
= &s
->temps
[temp
];
1452 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1453 /* Sparc64 stack is accessed with offset of 2047 */
1454 s
->current_frame_offset
= (s
->current_frame_offset
+
1455 (tcg_target_long
)sizeof(tcg_target_long
) - 1) &
1456 ~(sizeof(tcg_target_long
) - 1);
1458 if (s
->current_frame_offset
+ (tcg_target_long
)sizeof(tcg_target_long
) >
1462 ts
->mem_offset
= s
->current_frame_offset
;
1463 ts
->mem_reg
= s
->frame_reg
;
1464 ts
->mem_allocated
= 1;
1465 s
->current_frame_offset
+= (tcg_target_long
)sizeof(tcg_target_long
);
1468 /* free register 'reg' by spilling the corresponding temporary if necessary */
1469 static void tcg_reg_free(TCGContext
*s
, int reg
)
1474 temp
= s
->reg_to_temp
[reg
];
1476 ts
= &s
->temps
[temp
];
1477 assert(ts
->val_type
== TEMP_VAL_REG
);
1478 if (!ts
->mem_coherent
) {
1479 if (!ts
->mem_allocated
)
1480 temp_allocate_frame(s
, temp
);
1481 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1483 ts
->val_type
= TEMP_VAL_MEM
;
1484 s
->reg_to_temp
[reg
] = -1;
1488 /* Allocate a register belonging to reg1 & ~reg2 */
1489 static int tcg_reg_alloc(TCGContext
*s
, TCGRegSet reg1
, TCGRegSet reg2
)
1494 tcg_regset_andnot(reg_ct
, reg1
, reg2
);
1496 /* first try free registers */
1497 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1498 reg
= tcg_target_reg_alloc_order
[i
];
1499 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == -1)
1503 /* XXX: do better spill choice */
1504 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1505 reg
= tcg_target_reg_alloc_order
[i
];
1506 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1507 tcg_reg_free(s
, reg
);
1515 /* save a temporary to memory. 'allocated_regs' is used in case a
1516 temporary registers needs to be allocated to store a constant. */
1517 static void temp_save(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1522 ts
= &s
->temps
[temp
];
1523 if (!ts
->fixed_reg
) {
1524 switch(ts
->val_type
) {
1526 tcg_reg_free(s
, ts
->reg
);
1529 ts
->val_type
= TEMP_VAL_MEM
;
1531 case TEMP_VAL_CONST
:
1532 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1534 if (!ts
->mem_allocated
)
1535 temp_allocate_frame(s
, temp
);
1536 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1537 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1538 ts
->val_type
= TEMP_VAL_MEM
;
1548 /* save globals to their canonical location and assume they can be
1549 modified be the following code. 'allocated_regs' is used in case a
1550 temporary registers needs to be allocated to store a constant. */
1551 static void save_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1555 for(i
= 0; i
< s
->nb_globals
; i
++) {
1556 temp_save(s
, i
, allocated_regs
);
1560 /* at the end of a basic block, we assume all temporaries are dead and
1561 all globals are stored at their canonical location. */
1562 static void tcg_reg_alloc_bb_end(TCGContext
*s
, TCGRegSet allocated_regs
)
1567 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1569 if (ts
->temp_local
) {
1570 temp_save(s
, i
, allocated_regs
);
1572 if (ts
->val_type
== TEMP_VAL_REG
) {
1573 s
->reg_to_temp
[ts
->reg
] = -1;
1575 ts
->val_type
= TEMP_VAL_DEAD
;
1579 save_globals(s
, allocated_regs
);
1582 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1584 static void tcg_reg_alloc_movi(TCGContext
*s
, const TCGArg
*args
)
1587 tcg_target_ulong val
;
1589 ots
= &s
->temps
[args
[0]];
1592 if (ots
->fixed_reg
) {
1593 /* for fixed registers, we do not do any constant
1595 tcg_out_movi(s
, ots
->type
, ots
->reg
, val
);
1597 /* The movi is not explicitly generated here */
1598 if (ots
->val_type
== TEMP_VAL_REG
)
1599 s
->reg_to_temp
[ots
->reg
] = -1;
1600 ots
->val_type
= TEMP_VAL_CONST
;
1605 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1607 unsigned int dead_args
)
1611 const TCGArgConstraint
*arg_ct
;
1613 ots
= &s
->temps
[args
[0]];
1614 ts
= &s
->temps
[args
[1]];
1615 arg_ct
= &def
->args_ct
[0];
1617 /* XXX: always mark arg dead if IS_DEAD_ARG(1) */
1618 if (ts
->val_type
== TEMP_VAL_REG
) {
1619 if (IS_DEAD_ARG(1) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
1620 /* the mov can be suppressed */
1621 if (ots
->val_type
== TEMP_VAL_REG
)
1622 s
->reg_to_temp
[ots
->reg
] = -1;
1624 s
->reg_to_temp
[reg
] = -1;
1625 ts
->val_type
= TEMP_VAL_DEAD
;
1627 if (ots
->val_type
== TEMP_VAL_REG
) {
1630 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, s
->reserved_regs
);
1632 if (ts
->reg
!= reg
) {
1633 tcg_out_mov(s
, ots
->type
, reg
, ts
->reg
);
1636 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
1637 if (ots
->val_type
== TEMP_VAL_REG
) {
1640 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, s
->reserved_regs
);
1642 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1643 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1644 if (ots
->fixed_reg
) {
1646 tcg_out_movi(s
, ots
->type
, reg
, ts
->val
);
1648 /* propagate constant */
1649 if (ots
->val_type
== TEMP_VAL_REG
)
1650 s
->reg_to_temp
[ots
->reg
] = -1;
1651 ots
->val_type
= TEMP_VAL_CONST
;
1658 s
->reg_to_temp
[reg
] = args
[0];
1660 ots
->val_type
= TEMP_VAL_REG
;
1661 ots
->mem_coherent
= 0;
1664 static void tcg_reg_alloc_op(TCGContext
*s
,
1665 const TCGOpDef
*def
, TCGOpcode opc
,
1667 unsigned int dead_args
)
1669 TCGRegSet allocated_regs
;
1670 int i
, k
, nb_iargs
, nb_oargs
, reg
;
1672 const TCGArgConstraint
*arg_ct
;
1674 TCGArg new_args
[TCG_MAX_OP_ARGS
];
1675 int const_args
[TCG_MAX_OP_ARGS
];
1677 nb_oargs
= def
->nb_oargs
;
1678 nb_iargs
= def
->nb_iargs
;
1680 /* copy constants */
1681 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
1682 args
+ nb_oargs
+ nb_iargs
,
1683 sizeof(TCGArg
) * def
->nb_cargs
);
1685 /* satisfy input constraints */
1686 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1687 for(k
= 0; k
< nb_iargs
; k
++) {
1688 i
= def
->sorted_args
[nb_oargs
+ k
];
1690 arg_ct
= &def
->args_ct
[i
];
1691 ts
= &s
->temps
[arg
];
1692 if (ts
->val_type
== TEMP_VAL_MEM
) {
1693 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1694 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1695 ts
->val_type
= TEMP_VAL_REG
;
1697 ts
->mem_coherent
= 1;
1698 s
->reg_to_temp
[reg
] = arg
;
1699 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1700 if (tcg_target_const_match(ts
->val
, arg_ct
)) {
1701 /* constant is OK for instruction */
1703 new_args
[i
] = ts
->val
;
1706 /* need to move to a register */
1707 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1708 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1709 ts
->val_type
= TEMP_VAL_REG
;
1711 ts
->mem_coherent
= 0;
1712 s
->reg_to_temp
[reg
] = arg
;
1715 assert(ts
->val_type
== TEMP_VAL_REG
);
1716 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
1717 if (ts
->fixed_reg
) {
1718 /* if fixed register, we must allocate a new register
1719 if the alias is not the same register */
1720 if (arg
!= args
[arg_ct
->alias_index
])
1721 goto allocate_in_reg
;
1723 /* if the input is aliased to an output and if it is
1724 not dead after the instruction, we must allocate
1725 a new register and move it */
1726 if (!IS_DEAD_ARG(i
)) {
1727 goto allocate_in_reg
;
1732 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1733 /* nothing to do : the constraint is satisfied */
1736 /* allocate a new register matching the constraint
1737 and move the temporary register into it */
1738 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1739 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
1743 tcg_regset_set_reg(allocated_regs
, reg
);
1747 if (def
->flags
& TCG_OPF_BB_END
) {
1748 tcg_reg_alloc_bb_end(s
, allocated_regs
);
1750 /* mark dead temporaries and free the associated registers */
1751 for(i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1753 if (IS_DEAD_ARG(i
)) {
1754 ts
= &s
->temps
[arg
];
1755 if (!ts
->fixed_reg
) {
1756 if (ts
->val_type
== TEMP_VAL_REG
)
1757 s
->reg_to_temp
[ts
->reg
] = -1;
1758 ts
->val_type
= TEMP_VAL_DEAD
;
1763 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1764 /* XXX: permit generic clobber register list ? */
1765 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1766 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
1767 tcg_reg_free(s
, reg
);
1770 /* XXX: for load/store we could do that only for the slow path
1771 (i.e. when a memory callback is called) */
1773 /* store globals and free associated registers (we assume the insn
1774 can modify any global. */
1775 save_globals(s
, allocated_regs
);
1778 /* satisfy the output constraints */
1779 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1780 for(k
= 0; k
< nb_oargs
; k
++) {
1781 i
= def
->sorted_args
[k
];
1783 arg_ct
= &def
->args_ct
[i
];
1784 ts
= &s
->temps
[arg
];
1785 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1786 reg
= new_args
[arg_ct
->alias_index
];
1788 /* if fixed register, we try to use it */
1790 if (ts
->fixed_reg
&&
1791 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1794 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1796 tcg_regset_set_reg(allocated_regs
, reg
);
1797 /* if a fixed register is used, then a move will be done afterwards */
1798 if (!ts
->fixed_reg
) {
1799 if (ts
->val_type
== TEMP_VAL_REG
)
1800 s
->reg_to_temp
[ts
->reg
] = -1;
1801 if (IS_DEAD_ARG(i
)) {
1802 ts
->val_type
= TEMP_VAL_DEAD
;
1804 ts
->val_type
= TEMP_VAL_REG
;
1806 /* temp value is modified, so the value kept in memory is
1807 potentially not the same */
1808 ts
->mem_coherent
= 0;
1809 s
->reg_to_temp
[reg
] = arg
;
1817 /* emit instruction */
1818 tcg_out_op(s
, opc
, new_args
, const_args
);
1820 /* move the outputs in the correct register if needed */
1821 for(i
= 0; i
< nb_oargs
; i
++) {
1822 ts
= &s
->temps
[args
[i
]];
1824 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
1825 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
1830 #ifdef TCG_TARGET_STACK_GROWSUP
1831 #define STACK_DIR(x) (-(x))
1833 #define STACK_DIR(x) (x)
1836 static int tcg_reg_alloc_call(TCGContext
*s
, const TCGOpDef
*def
,
1837 TCGOpcode opc
, const TCGArg
*args
,
1838 unsigned int dead_args
)
1840 int nb_iargs
, nb_oargs
, flags
, nb_regs
, i
, reg
, nb_params
;
1841 TCGArg arg
, func_arg
;
1843 tcg_target_long stack_offset
, call_stack_size
, func_addr
;
1844 int const_func_arg
, allocate_args
;
1845 TCGRegSet allocated_regs
;
1846 const TCGArgConstraint
*arg_ct
;
1850 nb_oargs
= arg
>> 16;
1851 nb_iargs
= arg
& 0xffff;
1852 nb_params
= nb_iargs
- 1;
1854 flags
= args
[nb_oargs
+ nb_iargs
];
1856 nb_regs
= ARRAY_SIZE(tcg_target_call_iarg_regs
);
1857 if (nb_regs
> nb_params
)
1858 nb_regs
= nb_params
;
1860 /* assign stack slots first */
1861 call_stack_size
= (nb_params
- nb_regs
) * sizeof(tcg_target_long
);
1862 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
1863 ~(TCG_TARGET_STACK_ALIGN
- 1);
1864 allocate_args
= (call_stack_size
> TCG_STATIC_CALL_ARGS_SIZE
);
1865 if (allocate_args
) {
1866 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
1867 preallocate call stack */
1871 stack_offset
= TCG_TARGET_CALL_STACK_OFFSET
;
1872 for(i
= nb_regs
; i
< nb_params
; i
++) {
1873 arg
= args
[nb_oargs
+ i
];
1874 #ifdef TCG_TARGET_STACK_GROWSUP
1875 stack_offset
-= sizeof(tcg_target_long
);
1877 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1878 ts
= &s
->temps
[arg
];
1879 if (ts
->val_type
== TEMP_VAL_REG
) {
1880 tcg_out_st(s
, ts
->type
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
1881 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
1882 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1884 /* XXX: not correct if reading values from the stack */
1885 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1886 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
1887 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1888 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1890 /* XXX: sign extend may be needed on some targets */
1891 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1892 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
1897 #ifndef TCG_TARGET_STACK_GROWSUP
1898 stack_offset
+= sizeof(tcg_target_long
);
1902 /* assign input registers */
1903 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1904 for(i
= 0; i
< nb_regs
; i
++) {
1905 arg
= args
[nb_oargs
+ i
];
1906 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1907 ts
= &s
->temps
[arg
];
1908 reg
= tcg_target_call_iarg_regs
[i
];
1909 tcg_reg_free(s
, reg
);
1910 if (ts
->val_type
== TEMP_VAL_REG
) {
1911 if (ts
->reg
!= reg
) {
1912 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
1914 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
1915 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1916 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1917 /* XXX: sign extend ? */
1918 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1922 tcg_regset_set_reg(allocated_regs
, reg
);
1926 /* assign function address */
1927 func_arg
= args
[nb_oargs
+ nb_iargs
- 1];
1928 arg_ct
= &def
->args_ct
[0];
1929 ts
= &s
->temps
[func_arg
];
1930 func_addr
= ts
->val
;
1932 if (ts
->val_type
== TEMP_VAL_MEM
) {
1933 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1934 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1936 tcg_regset_set_reg(allocated_regs
, reg
);
1937 } else if (ts
->val_type
== TEMP_VAL_REG
) {
1939 if (!tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1940 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1941 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
1944 tcg_regset_set_reg(allocated_regs
, reg
);
1945 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1946 if (tcg_target_const_match(func_addr
, arg_ct
)) {
1948 func_arg
= func_addr
;
1950 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1951 tcg_out_movi(s
, ts
->type
, reg
, func_addr
);
1953 tcg_regset_set_reg(allocated_regs
, reg
);
1960 /* mark dead temporaries and free the associated registers */
1961 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
1963 if (IS_DEAD_ARG(i
)) {
1964 ts
= &s
->temps
[arg
];
1965 if (!ts
->fixed_reg
) {
1966 if (ts
->val_type
== TEMP_VAL_REG
)
1967 s
->reg_to_temp
[ts
->reg
] = -1;
1968 ts
->val_type
= TEMP_VAL_DEAD
;
1973 /* clobber call registers */
1974 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1975 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
1976 tcg_reg_free(s
, reg
);
1980 /* store globals and free associated registers (we assume the call
1981 can modify any global. */
1982 if (!(flags
& TCG_CALL_CONST
)) {
1983 save_globals(s
, allocated_regs
);
1986 tcg_out_op(s
, opc
, &func_arg
, &const_func_arg
);
1988 /* assign output registers and emit moves if needed */
1989 for(i
= 0; i
< nb_oargs
; i
++) {
1991 ts
= &s
->temps
[arg
];
1992 reg
= tcg_target_call_oarg_regs
[i
];
1993 assert(s
->reg_to_temp
[reg
] == -1);
1994 if (ts
->fixed_reg
) {
1995 if (ts
->reg
!= reg
) {
1996 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
1999 if (ts
->val_type
== TEMP_VAL_REG
)
2000 s
->reg_to_temp
[ts
->reg
] = -1;
2001 if (IS_DEAD_ARG(i
)) {
2002 ts
->val_type
= TEMP_VAL_DEAD
;
2004 ts
->val_type
= TEMP_VAL_REG
;
2006 ts
->mem_coherent
= 0;
2007 s
->reg_to_temp
[reg
] = arg
;
2012 return nb_iargs
+ nb_oargs
+ def
->nb_cargs
+ 1;
2015 #ifdef CONFIG_PROFILER
2017 static int64_t tcg_table_op_count
[NB_OPS
];
2019 static void dump_op_count(void)
2023 f
= fopen("/tmp/op.log", "w");
2024 for(i
= INDEX_op_end
; i
< NB_OPS
; i
++) {
2025 fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
, tcg_table_op_count
[i
]);
2032 static inline int tcg_gen_code_common(TCGContext
*s
, uint8_t *gen_code_buf
,
2037 const TCGOpDef
*def
;
2038 unsigned int dead_args
;
2042 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP
))) {
2049 #ifdef CONFIG_PROFILER
2050 s
->opt_time
-= profile_getclock();
2053 #ifdef USE_TCG_OPTIMIZATIONS
2055 tcg_optimize(s
, gen_opc_ptr
, gen_opparam_buf
, tcg_op_defs
);
2058 #ifdef CONFIG_PROFILER
2059 s
->opt_time
+= profile_getclock();
2060 s
->la_time
-= profile_getclock();
2063 tcg_liveness_analysis(s
);
2065 #ifdef CONFIG_PROFILER
2066 s
->la_time
+= profile_getclock();
2070 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT
))) {
2071 qemu_log("OP after optimization and liveness analysis:\n");
2077 tcg_reg_alloc_start(s
);
2079 s
->code_buf
= gen_code_buf
;
2080 s
->code_ptr
= gen_code_buf
;
2082 args
= gen_opparam_buf
;
2086 opc
= gen_opc_buf
[op_index
];
2087 #ifdef CONFIG_PROFILER
2088 tcg_table_op_count
[opc
]++;
2090 def
= &tcg_op_defs
[opc
];
2092 printf("%s: %d %d %d\n", def
->name
,
2093 def
->nb_oargs
, def
->nb_iargs
, def
->nb_cargs
);
2097 case INDEX_op_mov_i32
:
2098 case INDEX_op_mov_i64
:
2099 dead_args
= s
->op_dead_args
[op_index
];
2100 tcg_reg_alloc_mov(s
, def
, args
, dead_args
);
2102 case INDEX_op_movi_i32
:
2103 case INDEX_op_movi_i64
:
2104 tcg_reg_alloc_movi(s
, args
);
2106 case INDEX_op_debug_insn_start
:
2107 /* debug instruction */
2117 case INDEX_op_discard
:
2120 ts
= &s
->temps
[args
[0]];
2121 /* mark the temporary as dead */
2122 if (!ts
->fixed_reg
) {
2123 if (ts
->val_type
== TEMP_VAL_REG
)
2124 s
->reg_to_temp
[ts
->reg
] = -1;
2125 ts
->val_type
= TEMP_VAL_DEAD
;
2129 case INDEX_op_set_label
:
2130 tcg_reg_alloc_bb_end(s
, s
->reserved_regs
);
2131 tcg_out_label(s
, args
[0], s
->code_ptr
);
2134 dead_args
= s
->op_dead_args
[op_index
];
2135 args
+= tcg_reg_alloc_call(s
, def
, opc
, args
, dead_args
);
2140 /* Sanity check that we've not introduced any unhandled opcodes. */
2141 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
2144 /* Note: in order to speed up the code, it would be much
2145 faster to have specialized register allocator functions for
2146 some common argument patterns */
2147 dead_args
= s
->op_dead_args
[op_index
];
2148 tcg_reg_alloc_op(s
, def
, opc
, args
, dead_args
);
2151 args
+= def
->nb_args
;
2153 if (search_pc
>= 0 && search_pc
< s
->code_ptr
- gen_code_buf
) {
2165 int tcg_gen_code(TCGContext
*s
, uint8_t *gen_code_buf
)
2167 #ifdef CONFIG_PROFILER
2170 n
= (gen_opc_ptr
- gen_opc_buf
);
2172 if (n
> s
->op_count_max
)
2173 s
->op_count_max
= n
;
2175 s
->temp_count
+= s
->nb_temps
;
2176 if (s
->nb_temps
> s
->temp_count_max
)
2177 s
->temp_count_max
= s
->nb_temps
;
2181 tcg_gen_code_common(s
, gen_code_buf
, -1);
2183 /* flush instruction cache */
2184 flush_icache_range((tcg_target_ulong
)gen_code_buf
,
2185 (tcg_target_ulong
)s
->code_ptr
);
2187 return s
->code_ptr
- gen_code_buf
;
2190 /* Return the index of the micro operation such as the pc after is <
2191 offset bytes from the start of the TB. The contents of gen_code_buf must
2192 not be changed, though writing the same values is ok.
2193 Return -1 if not found. */
2194 int tcg_gen_code_search_pc(TCGContext
*s
, uint8_t *gen_code_buf
, long offset
)
2196 return tcg_gen_code_common(s
, gen_code_buf
, offset
);
2199 #ifdef CONFIG_PROFILER
2200 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2202 TCGContext
*s
= &tcg_ctx
;
2205 tot
= s
->interm_time
+ s
->code_time
;
2206 cpu_fprintf(f
, "JIT cycles %" PRId64
" (%0.3f s at 2.4 GHz)\n",
2208 cpu_fprintf(f
, "translated TBs %" PRId64
" (aborted=%" PRId64
" %0.1f%%)\n",
2210 s
->tb_count1
- s
->tb_count
,
2211 s
->tb_count1
? (double)(s
->tb_count1
- s
->tb_count
) / s
->tb_count1
* 100.0 : 0);
2212 cpu_fprintf(f
, "avg ops/TB %0.1f max=%d\n",
2213 s
->tb_count
? (double)s
->op_count
/ s
->tb_count
: 0, s
->op_count_max
);
2214 cpu_fprintf(f
, "deleted ops/TB %0.2f\n",
2216 (double)s
->del_op_count
/ s
->tb_count
: 0);
2217 cpu_fprintf(f
, "avg temps/TB %0.2f max=%d\n",
2219 (double)s
->temp_count
/ s
->tb_count
: 0,
2222 cpu_fprintf(f
, "cycles/op %0.1f\n",
2223 s
->op_count
? (double)tot
/ s
->op_count
: 0);
2224 cpu_fprintf(f
, "cycles/in byte %0.1f\n",
2225 s
->code_in_len
? (double)tot
/ s
->code_in_len
: 0);
2226 cpu_fprintf(f
, "cycles/out byte %0.1f\n",
2227 s
->code_out_len
? (double)tot
/ s
->code_out_len
: 0);
2230 cpu_fprintf(f
, " gen_interm time %0.1f%%\n",
2231 (double)s
->interm_time
/ tot
* 100.0);
2232 cpu_fprintf(f
, " gen_code time %0.1f%%\n",
2233 (double)s
->code_time
/ tot
* 100.0);
2234 cpu_fprintf(f
, "optim./code time %0.1f%%\n",
2235 (double)s
->opt_time
/ (s
->code_time
? s
->code_time
: 1)
2237 cpu_fprintf(f
, "liveness/code time %0.1f%%\n",
2238 (double)s
->la_time
/ (s
->code_time
? s
->code_time
: 1) * 100.0);
2239 cpu_fprintf(f
, "cpu_restore count %" PRId64
"\n",
2241 cpu_fprintf(f
, " avg cycles %0.1f\n",
2242 s
->restore_count
? (double)s
->restore_time
/ s
->restore_count
: 0);
2247 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2249 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2253 #ifdef ELF_HOST_MACHINE
2254 /* In order to use this feature, the backend needs to do three things:
2256 (1) Define ELF_HOST_MACHINE to indicate both what value to
2257 put into the ELF image and to indicate support for the feature.
2259 (2) Define tcg_register_jit. This should create a buffer containing
2260 the contents of a .debug_frame section that describes the post-
2261 prologue unwind info for the tcg machine.
2263 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2266 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2273 struct jit_code_entry
{
2274 struct jit_code_entry
*next_entry
;
2275 struct jit_code_entry
*prev_entry
;
2276 const void *symfile_addr
;
2277 uint64_t symfile_size
;
2280 struct jit_descriptor
{
2282 uint32_t action_flag
;
2283 struct jit_code_entry
*relevant_entry
;
2284 struct jit_code_entry
*first_entry
;
2287 void __jit_debug_register_code(void) __attribute__((noinline
));
2288 void __jit_debug_register_code(void)
2293 /* Must statically initialize the version, because GDB may check
2294 the version before we can set it. */
2295 struct jit_descriptor __jit_debug_descriptor
= { 1, 0, 0, 0 };
2297 /* End GDB interface. */
2299 static int find_string(const char *strtab
, const char *str
)
2301 const char *p
= strtab
+ 1;
2304 if (strcmp(p
, str
) == 0) {
2311 static void tcg_register_jit_int(void *buf_ptr
, size_t buf_size
,
2312 void *debug_frame
, size_t debug_frame_size
)
2314 struct __attribute__((packed
)) DebugInfo
{
2321 uintptr_t cu_low_pc
;
2322 uintptr_t cu_high_pc
;
2325 uintptr_t fn_low_pc
;
2326 uintptr_t fn_high_pc
;
2335 struct DebugInfo di
;
2340 struct ElfImage
*img
;
2342 static const struct ElfImage img_template
= {
2344 .e_ident
[EI_MAG0
] = ELFMAG0
,
2345 .e_ident
[EI_MAG1
] = ELFMAG1
,
2346 .e_ident
[EI_MAG2
] = ELFMAG2
,
2347 .e_ident
[EI_MAG3
] = ELFMAG3
,
2348 .e_ident
[EI_CLASS
] = ELF_CLASS
,
2349 .e_ident
[EI_DATA
] = ELF_DATA
,
2350 .e_ident
[EI_VERSION
] = EV_CURRENT
,
2352 .e_machine
= ELF_HOST_MACHINE
,
2353 .e_version
= EV_CURRENT
,
2354 .e_phoff
= offsetof(struct ElfImage
, phdr
),
2355 .e_shoff
= offsetof(struct ElfImage
, shdr
),
2356 .e_ehsize
= sizeof(ElfW(Shdr
)),
2357 .e_phentsize
= sizeof(ElfW(Phdr
)),
2359 .e_shentsize
= sizeof(ElfW(Shdr
)),
2360 .e_shnum
= ARRAY_SIZE(img
->shdr
),
2361 .e_shstrndx
= ARRAY_SIZE(img
->shdr
) - 1,
2362 #ifdef ELF_HOST_FLAGS
2363 .e_flags
= ELF_HOST_FLAGS
,
2366 .e_ident
[EI_OSABI
] = ELF_OSABI
,
2374 [0] = { .sh_type
= SHT_NULL
},
2375 /* Trick: The contents of code_gen_buffer are not present in
2376 this fake ELF file; that got allocated elsewhere. Therefore
2377 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2378 will not look for contents. We can record any address. */
2380 .sh_type
= SHT_NOBITS
,
2381 .sh_flags
= SHF_EXECINSTR
| SHF_ALLOC
,
2383 [2] = { /* .debug_info */
2384 .sh_type
= SHT_PROGBITS
,
2385 .sh_offset
= offsetof(struct ElfImage
, di
),
2386 .sh_size
= sizeof(struct DebugInfo
),
2388 [3] = { /* .debug_abbrev */
2389 .sh_type
= SHT_PROGBITS
,
2390 .sh_offset
= offsetof(struct ElfImage
, da
),
2391 .sh_size
= sizeof(img
->da
),
2393 [4] = { /* .debug_frame */
2394 .sh_type
= SHT_PROGBITS
,
2395 .sh_offset
= sizeof(struct ElfImage
),
2397 [5] = { /* .symtab */
2398 .sh_type
= SHT_SYMTAB
,
2399 .sh_offset
= offsetof(struct ElfImage
, sym
),
2400 .sh_size
= sizeof(img
->sym
),
2402 .sh_link
= ARRAY_SIZE(img
->shdr
) - 1,
2403 .sh_entsize
= sizeof(ElfW(Sym
)),
2405 [6] = { /* .strtab */
2406 .sh_type
= SHT_STRTAB
,
2407 .sh_offset
= offsetof(struct ElfImage
, str
),
2408 .sh_size
= sizeof(img
->str
),
2412 [1] = { /* code_gen_buffer */
2413 .st_info
= ELF_ST_INFO(STB_GLOBAL
, STT_FUNC
),
2418 .len
= sizeof(struct DebugInfo
) - 4,
2420 .ptr_size
= sizeof(void *),
2422 .cu_lang
= 0x8001, /* DW_LANG_Mips_Assembler */
2424 .fn_name
= "code_gen_buffer"
2427 1, /* abbrev number (the cu) */
2428 0x11, 1, /* DW_TAG_compile_unit, has children */
2429 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2430 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2431 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2432 0, 0, /* end of abbrev */
2433 2, /* abbrev number (the fn) */
2434 0x2e, 0, /* DW_TAG_subprogram, no children */
2435 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2436 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2437 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2438 0, 0, /* end of abbrev */
2439 0 /* no more abbrev */
2441 .str
= "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2442 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2445 /* We only need a single jit entry; statically allocate it. */
2446 static struct jit_code_entry one_entry
;
2448 uintptr_t buf
= (uintptr_t)buf_ptr
;
2449 size_t img_size
= sizeof(struct ElfImage
) + debug_frame_size
;
2451 img
= g_malloc(img_size
);
2452 *img
= img_template
;
2453 memcpy(img
+ 1, debug_frame
, debug_frame_size
);
2455 img
->phdr
.p_vaddr
= buf
;
2456 img
->phdr
.p_paddr
= buf
;
2457 img
->phdr
.p_memsz
= buf_size
;
2459 img
->shdr
[1].sh_name
= find_string(img
->str
, ".text");
2460 img
->shdr
[1].sh_addr
= buf
;
2461 img
->shdr
[1].sh_size
= buf_size
;
2463 img
->shdr
[2].sh_name
= find_string(img
->str
, ".debug_info");
2464 img
->shdr
[3].sh_name
= find_string(img
->str
, ".debug_abbrev");
2466 img
->shdr
[4].sh_name
= find_string(img
->str
, ".debug_frame");
2467 img
->shdr
[4].sh_size
= debug_frame_size
;
2469 img
->shdr
[5].sh_name
= find_string(img
->str
, ".symtab");
2470 img
->shdr
[6].sh_name
= find_string(img
->str
, ".strtab");
2472 img
->sym
[1].st_name
= find_string(img
->str
, "code_gen_buffer");
2473 img
->sym
[1].st_value
= buf
;
2474 img
->sym
[1].st_size
= buf_size
;
2476 img
->di
.cu_low_pc
= buf
;
2477 img
->di
.cu_high_pc
= buf_size
;
2478 img
->di
.fn_low_pc
= buf
;
2479 img
->di
.fn_high_pc
= buf_size
;
2482 /* Enable this block to be able to debug the ELF image file creation.
2483 One can use readelf, objdump, or other inspection utilities. */
2485 FILE *f
= fopen("/tmp/qemu.jit", "w+b");
2487 if (fwrite(img
, img_size
, 1, f
) != img_size
) {
2488 /* Avoid stupid unused return value warning for fwrite. */
2495 one_entry
.symfile_addr
= img
;
2496 one_entry
.symfile_size
= img_size
;
2498 __jit_debug_descriptor
.action_flag
= JIT_REGISTER_FN
;
2499 __jit_debug_descriptor
.relevant_entry
= &one_entry
;
2500 __jit_debug_descriptor
.first_entry
= &one_entry
;
2501 __jit_debug_register_code();
2504 /* No support for the feature. Provide the entry point expected by exec.c,
2505 and implement the internal function we declared earlier. */
2507 static void tcg_register_jit_int(void *buf
, size_t size
,
2508 void *debug_frame
, size_t debug_frame_size
)
2512 void tcg_register_jit(void *buf
, size_t buf_size
)
2515 #endif /* ELF_HOST_MACHINE */