hw/microblaze_pic_cpu.c

   1 /*
   2  * QEMU MicroBlaze CPU interrupt wrapper logic.
   3  *
   4  * Copyright (c) 2009 Edgar E. Iglesias, Axis Communications AB.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "hw.h"
  26 #include "microblaze_pic_cpu.h"
  27
  28 #define D(x)
  29
  30 static void microblaze_pic_cpu_handler(void *opaque, int irq, int level)
  31 {
  32     CPUMBState *env = (CPUMBState *)opaque;
  33     int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
  34
  35     if (level)
  36         cpu_interrupt(env, type);
  37     else
  38         cpu_reset_interrupt(env, type);
  39 }
  40
  41 qemu_irq *microblaze_pic_init_cpu(CPUMBState *env)
  42 {
  43     return qemu_allocate_irqs(microblaze_pic_cpu_handler, env, 2);
  44 }