hw/petalogix_ml605_mmu.c

   1 /*
   2  * Model of Petalogix linux reference design targeting Xilinx Spartan ml605
   3  * board.
   4  *
   5  * Copyright (c) 2011 Michal Simek <monstr@monstr.eu>
   6  * Copyright (c) 2011 PetaLogix
   7  * Copyright (c) 2009 Edgar E. Iglesias.
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a copy
  10  * of this software and associated documentation files (the "Software"), to deal
  11  * in the Software without restriction, including without limitation the rights
  12  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  13  * copies of the Software, and to permit persons to whom the Software is
  14  * furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included in
  17  * all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  25  * THE SOFTWARE.
  26  */
  27
  28 #include "sysbus.h"
  29 #include "hw.h"
  30 #include "net.h"
  31 #include "flash.h"
  32 #include "sysemu.h"
  33 #include "devices.h"
  34 #include "boards.h"
  35 #include "xilinx.h"
  36 #include "blockdev.h"
  37 #include "pc.h"
  38 #include "exec-memory.h"
  39 #include "ssi.h"
  40
  41 #include "microblaze_boot.h"
  42 #include "microblaze_pic_cpu.h"
  43
  44 #include "stream.h"
  45
  46 #define LMB_BRAM_SIZE  (128 * 1024)
  47 #define FLASH_SIZE     (32 * 1024 * 1024)
  48
  49 #define BINARY_DEVICE_TREE_FILE "petalogix-ml605.dtb"
  50
  51 #define NUM_SPI_FLASHES 4
  52
  53 #define MEMORY_BASEADDR 0x50000000
  54 #define FLASH_BASEADDR 0x86000000
  55 #define INTC_BASEADDR 0x81800000
  56 #define TIMER_BASEADDR 0x83c00000
  57 #define UART16550_BASEADDR 0x83e00000
  58 #define AXIENET_BASEADDR 0x82780000
  59 #define AXIDMA_BASEADDR 0x84600000
  60
  61 static void machine_cpu_reset(MicroBlazeCPU *cpu)
  62 {
  63     CPUMBState *env = &cpu->env;
  64
  65     env->pvr.regs[10] = 0x0e000000; /* virtex 6 */
  66     /* setup pvr to match kernel setting */
  67     env->pvr.regs[5] |= PVR5_DCACHE_WRITEBACK_MASK;
  68     env->pvr.regs[0] |= PVR0_USE_FPU_MASK | PVR0_ENDI;
  69     env->pvr.regs[0] = (env->pvr.regs[0] & ~PVR0_VERSION_MASK) | (0x14 << 8);
  70     env->pvr.regs[2] ^= PVR2_USE_FPU2_MASK;
  71     env->pvr.regs[4] = 0xc56b8000;
  72     env->pvr.regs[5] = 0xc56be000;
  73 }
  74
  75 static void
  76 petalogix_ml605_init(ram_addr_t ram_size,
  77                           const char *boot_device,
  78                           const char *kernel_filename,
  79                           const char *kernel_cmdline,
  80                           const char *initrd_filename, const char *cpu_model)
  81 {
  82     MemoryRegion *address_space_mem = get_system_memory();
  83     DeviceState *dev, *dma, *eth0;
  84     MicroBlazeCPU *cpu;
  85     SysBusDevice *busdev;
  86     CPUMBState *env;
  87     DriveInfo *dinfo;
  88     int i;
  89     target_phys_addr_t ddr_base = MEMORY_BASEADDR;
  90     MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
  91     MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
  92     qemu_irq irq[32], *cpu_irq;
  93
  94     /* init CPUs */
  95     if (cpu_model == NULL) {
  96         cpu_model = "microblaze";
  97     }
  98     cpu = cpu_mb_init(cpu_model);
  99     env = &cpu->env;
 100
 101     /* Attach emulated BRAM through the LMB.  */
 102     memory_region_init_ram(phys_lmb_bram, "petalogix_ml605.lmb_bram",
 103                            LMB_BRAM_SIZE);
 104     vmstate_register_ram_global(phys_lmb_bram);
 105     memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram);
 106
 107     memory_region_init_ram(phys_ram, "petalogix_ml605.ram", ram_size);
 108     vmstate_register_ram_global(phys_ram);
 109     memory_region_add_subregion(address_space_mem, ddr_base, phys_ram);
 110
 111     dinfo = drive_get(IF_PFLASH, 0, 0);
 112     /* 5th parameter 2 means bank-width
 113      * 10th paremeter 0 means little-endian */
 114     pflash_cfi01_register(FLASH_BASEADDR,
 115                           NULL, "petalogix_ml605.flash", FLASH_SIZE,
 116                           dinfo ? dinfo->bdrv : NULL, (64 * 1024),
 117                           FLASH_SIZE >> 16,
 118                           2, 0x89, 0x18, 0x0000, 0x0, 0);
 119
 120
 121     cpu_irq = microblaze_pic_init_cpu(env);
 122     dev = xilinx_intc_create(INTC_BASEADDR, cpu_irq[0], 4);
 123     for (i = 0; i < 32; i++) {
 124         irq[i] = qdev_get_gpio_in(dev, i);
 125     }
 126
 127     serial_mm_init(address_space_mem, UART16550_BASEADDR + 0x1000, 2,
 128                    irq[5], 115200, serial_hds[0], DEVICE_LITTLE_ENDIAN);
 129
 130     /* 2 timers at irq 2 @ 100 Mhz.  */
 131     xilinx_timer_create(TIMER_BASEADDR, irq[2], 0, 100 * 1000000);
 132
 133     /* axi ethernet and dma initialization. */
 134     dma = qdev_create(NULL, "xlnx.axi-dma");
 135
 136     /* FIXME: attach to the sysbus instead */
 137     object_property_add_child(container_get(qdev_get_machine(), "/unattached"),
 138                                   "xilinx-dma", OBJECT(dma), NULL);
 139
 140     eth0 = xilinx_axiethernet_create(&nd_table[0], STREAM_SLAVE(dma),
 141                                      0x82780000, irq[3], 0x1000, 0x1000);
 142
 143     xilinx_axiethernetdma_init(dma, STREAM_SLAVE(eth0),
 144                                0x84600000, irq[1], irq[0], 100 * 1000000);
 145
 146     {
 147         SSIBus *spi;
 148
 149         dev = qdev_create(NULL, "xlnx.xps-spi");
 150         qdev_prop_set_uint8(dev, "num-ss-bits", NUM_SPI_FLASHES);
 151         qdev_init_nofail(dev);
 152         busdev = sysbus_from_qdev(dev);
 153         sysbus_mmio_map(busdev, 0, 0x40a00000);
 154         sysbus_connect_irq(busdev, 0, irq[4]);
 155
 156         spi = (SSIBus *)qdev_get_child_bus(dev, "spi");
 157
 158         for (i = 0; i < NUM_SPI_FLASHES; i++) {
 159             qemu_irq cs_line;
 160
 161             dev = ssi_create_slave_no_init(spi, "m25p80");
 162             qdev_prop_set_string(dev, "partname", "n25q128");
 163             qdev_init_nofail(dev);
 164             cs_line = qdev_get_gpio_in(dev, 0);
 165             sysbus_connect_irq(busdev, i+1, cs_line);
 166         }
 167     }
 168
 169     microblaze_load_kernel(cpu, ddr_base, ram_size, BINARY_DEVICE_TREE_FILE,
 170                                                             machine_cpu_reset);
 171
 172 }
 173
 174 static QEMUMachine petalogix_ml605_machine = {
 175     .name = "petalogix-ml605",
 176     .desc = "PetaLogix linux refdesign for xilinx ml605 little endian",
 177     .init = petalogix_ml605_init,
 178     .is_default = 0
 179 };
 180
 181 static void petalogix_ml605_machine_init(void)
 182 {
 183     qemu_register_machine(&petalogix_ml605_machine);
 184 }
 185
 186 machine_init(petalogix_ml605_machine_init);