2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2009, 2011 Stefan Weil
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * This code implements a TCG which does not generate machine code for some
27 * real target machine but which generates virtual machine code for an
28 * interpreter. Interpreted pseudo code is slow, but it works on any host.
30 * Some remarks might help in understanding the code:
32 * "target" or "TCG target" is the machine which runs the generated code.
33 * This is different to the usual meaning in QEMU where "target" is the
34 * emulated machine. So normally QEMU host is identical to TCG target.
35 * Here the TCG target is a virtual machine, but this virtual machine must
36 * use the same word size like the real machine.
37 * Therefore, we need both 32 and 64 bit virtual machines (interpreter).
40 #if !defined(TCG_TARGET_H)
43 #include "config-host.h"
45 #define TCG_TARGET_INTERPRETER 1
47 #ifdef CONFIG_DEBUG_TCG
48 /* Enable debug output. */
49 #define CONFIG_DEBUG_TCG_INTERPRETER
52 #if 0 /* TCI tries to emulate a little endian host. */
53 #if defined(HOST_WORDS_BIGENDIAN)
54 # define TCG_TARGET_WORDS_BIGENDIAN
58 /* Optional instructions. */
60 #define TCG_TARGET_HAS_bswap16_i32 1
61 #define TCG_TARGET_HAS_bswap32_i32 1
62 /* Not more than one of the next two defines must be 1. */
63 #define TCG_TARGET_HAS_div_i32 1
64 #define TCG_TARGET_HAS_div2_i32 0
65 #define TCG_TARGET_HAS_ext8s_i32 1
66 #define TCG_TARGET_HAS_ext16s_i32 1
67 #define TCG_TARGET_HAS_ext8u_i32 1
68 #define TCG_TARGET_HAS_ext16u_i32 1
69 #define TCG_TARGET_HAS_andc_i32 0
70 #define TCG_TARGET_HAS_deposit_i32 1
71 #define TCG_TARGET_HAS_eqv_i32 0
72 #define TCG_TARGET_HAS_nand_i32 0
73 #define TCG_TARGET_HAS_nor_i32 0
74 #define TCG_TARGET_HAS_neg_i32 1
75 #define TCG_TARGET_HAS_not_i32 1
76 #define TCG_TARGET_HAS_orc_i32 0
77 #define TCG_TARGET_HAS_rot_i32 1
78 #define TCG_TARGET_HAS_movcond_i32 0
80 #if TCG_TARGET_REG_BITS == 64
81 #define TCG_TARGET_HAS_bswap16_i64 1
82 #define TCG_TARGET_HAS_bswap32_i64 1
83 #define TCG_TARGET_HAS_bswap64_i64 1
84 #define TCG_TARGET_HAS_deposit_i64 1
85 /* Not more than one of the next two defines must be 1. */
86 #define TCG_TARGET_HAS_div_i64 0
87 #define TCG_TARGET_HAS_div2_i64 0
88 #define TCG_TARGET_HAS_ext8s_i64 1
89 #define TCG_TARGET_HAS_ext16s_i64 1
90 #define TCG_TARGET_HAS_ext32s_i64 1
91 #define TCG_TARGET_HAS_ext8u_i64 1
92 #define TCG_TARGET_HAS_ext16u_i64 1
93 #define TCG_TARGET_HAS_ext32u_i64 1
94 #define TCG_TARGET_HAS_andc_i64 0
95 #define TCG_TARGET_HAS_eqv_i64 0
96 #define TCG_TARGET_HAS_nand_i64 0
97 #define TCG_TARGET_HAS_nor_i64 0
98 #define TCG_TARGET_HAS_neg_i64 1
99 #define TCG_TARGET_HAS_not_i64 1
100 #define TCG_TARGET_HAS_orc_i64 0
101 #define TCG_TARGET_HAS_rot_i64 1
102 #define TCG_TARGET_HAS_movcond_i64 0
103 #endif /* TCG_TARGET_REG_BITS == 64 */
105 /* Number of registers available.
106 For 32 bit hosts, we need more than 8 registers (call arguments). */
107 /* #define TCG_TARGET_NB_REGS 8 */
108 #define TCG_TARGET_NB_REGS 16
109 /* #define TCG_TARGET_NB_REGS 32 */
111 /* List of registers which are used by TCG. */
121 TCG_AREG0
= TCG_REG_R7
,
122 #if TCG_TARGET_NB_REGS >= 16
131 #if TCG_TARGET_NB_REGS >= 32
150 /* Special value UINT8_MAX is used by TCI to encode constant values. */
151 TCG_CONST
= UINT8_MAX
154 void tci_disas(uint8_t opc
);
156 tcg_target_ulong
tcg_qemu_tb_exec(CPUArchState
*env
, uint8_t *tb_ptr
);
157 #define tcg_qemu_tb_exec tcg_qemu_tb_exec
159 static inline void flush_icache_range(tcg_target_ulong start
,
160 tcg_target_ulong stop
)
164 #endif /* TCG_TARGET_H */