4 /* CPU interfaces that are target independent. */
6 #include "exec/hwaddr.h"
9 #include "exec/poison.h"
12 #include "qemu/bswap.h"
13 #include "qemu/queue.h"
17 * @cpu_fprintf: Print function.
18 * @file: File to print to using @cpu_fprint.
20 * State commonly used for iterating over CPU models.
22 typedef struct CPUListState
{
23 fprintf_function cpu_fprintf
;
27 #if !defined(CONFIG_USER_ONLY)
35 /* address in the RAM (different from a physical address) */
36 #if defined(CONFIG_XEN_BACKEND)
37 typedef uint64_t ram_addr_t
;
38 # define RAM_ADDR_MAX UINT64_MAX
39 # define RAM_ADDR_FMT "%" PRIx64
41 typedef uintptr_t ram_addr_t
;
42 # define RAM_ADDR_MAX UINTPTR_MAX
43 # define RAM_ADDR_FMT "%" PRIxPTR
48 typedef void CPUWriteMemoryFunc(void *opaque
, hwaddr addr
, uint32_t value
);
49 typedef uint32_t CPUReadMemoryFunc(void *opaque
, hwaddr addr
);
51 void qemu_ram_remap(ram_addr_t addr
, ram_addr_t length
);
52 /* This should only be used for ram local to a device. */
53 void *qemu_get_ram_ptr(ram_addr_t addr
);
54 void qemu_put_ram_ptr(void *addr
);
55 /* This should not be used by devices. */
56 int qemu_ram_addr_from_host(void *ptr
, ram_addr_t
*ram_addr
);
57 ram_addr_t
qemu_ram_addr_from_host_nofail(void *ptr
);
58 void qemu_ram_set_idstr(ram_addr_t addr
, const char *name
, DeviceState
*dev
);
60 void cpu_physical_memory_rw(hwaddr addr
, uint8_t *buf
,
61 int len
, int is_write
);
62 static inline void cpu_physical_memory_read(hwaddr addr
,
65 cpu_physical_memory_rw(addr
, buf
, len
, 0);
67 static inline void cpu_physical_memory_write(hwaddr addr
,
68 const void *buf
, int len
)
70 cpu_physical_memory_rw(addr
, (void *)buf
, len
, 1);
72 void *cpu_physical_memory_map(hwaddr addr
,
75 void cpu_physical_memory_unmap(void *buffer
, hwaddr len
,
76 int is_write
, hwaddr access_len
);
77 void *cpu_register_map_client(void *opaque
, void (*callback
)(void *opaque
));
79 bool cpu_physical_memory_is_io(hwaddr phys_addr
);
81 /* Coalesced MMIO regions are areas where write operations can be reordered.
82 * This usually implies that write operations are side-effect free. This allows
83 * batching which can make a major impact on performance when using
86 void qemu_flush_coalesced_mmio_buffer(void);
88 uint32_t ldub_phys(hwaddr addr
);
89 uint32_t lduw_le_phys(hwaddr addr
);
90 uint32_t lduw_be_phys(hwaddr addr
);
91 uint32_t ldl_le_phys(hwaddr addr
);
92 uint32_t ldl_be_phys(hwaddr addr
);
93 uint64_t ldq_le_phys(hwaddr addr
);
94 uint64_t ldq_be_phys(hwaddr addr
);
95 void stb_phys(hwaddr addr
, uint32_t val
);
96 void stw_le_phys(hwaddr addr
, uint32_t val
);
97 void stw_be_phys(hwaddr addr
, uint32_t val
);
98 void stl_le_phys(hwaddr addr
, uint32_t val
);
99 void stl_be_phys(hwaddr addr
, uint32_t val
);
100 void stq_le_phys(hwaddr addr
, uint64_t val
);
101 void stq_be_phys(hwaddr addr
, uint64_t val
);
104 uint32_t lduw_phys(hwaddr addr
);
105 uint32_t ldl_phys(hwaddr addr
);
106 uint64_t ldq_phys(hwaddr addr
);
107 void stl_phys_notdirty(hwaddr addr
, uint32_t val
);
108 void stq_phys_notdirty(hwaddr addr
, uint64_t val
);
109 void stw_phys(hwaddr addr
, uint32_t val
);
110 void stl_phys(hwaddr addr
, uint32_t val
);
111 void stq_phys(hwaddr addr
, uint64_t val
);
114 void cpu_physical_memory_write_rom(hwaddr addr
,
115 const uint8_t *buf
, int len
);
117 extern struct MemoryRegion io_mem_ram
;
118 extern struct MemoryRegion io_mem_rom
;
119 extern struct MemoryRegion io_mem_unassigned
;
120 extern struct MemoryRegion io_mem_notdirty
;
124 #endif /* !CPU_COMMON_H */