hw/spapr_hcall.c

   1 #include "sysemu.h"
   2 #include "cpu.h"
   3 #include "qemu-char.h"
   4 #include "sysemu.h"
   5 #include "qemu-char.h"
   6 #include "helper_regs.h"
   7 #include "hw/spapr.h"
   8
   9 #define HPTES_PER_GROUP 8
  10
  11 #define HPTE_V_SSIZE_SHIFT      62
  12 #define HPTE_V_AVPN_SHIFT       7
  13 #define HPTE_V_AVPN             0x3fffffffffffff80ULL
  14 #define HPTE_V_AVPN_VAL(x)      (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT)
  15 #define HPTE_V_COMPARE(x, y)    (!(((x) ^ (y)) & 0xffffffffffffff80UL))
  16 #define HPTE_V_BOLTED           0x0000000000000010ULL
  17 #define HPTE_V_LOCK             0x0000000000000008ULL
  18 #define HPTE_V_LARGE            0x0000000000000004ULL
  19 #define HPTE_V_SECONDARY        0x0000000000000002ULL
  20 #define HPTE_V_VALID            0x0000000000000001ULL
  21
  22 #define HPTE_R_PP0              0x8000000000000000ULL
  23 #define HPTE_R_TS               0x4000000000000000ULL
  24 #define HPTE_R_KEY_HI           0x3000000000000000ULL
  25 #define HPTE_R_RPN_SHIFT        12
  26 #define HPTE_R_RPN              0x3ffffffffffff000ULL
  27 #define HPTE_R_FLAGS            0x00000000000003ffULL
  28 #define HPTE_R_PP               0x0000000000000003ULL
  29 #define HPTE_R_N                0x0000000000000004ULL
  30 #define HPTE_R_G                0x0000000000000008ULL
  31 #define HPTE_R_M                0x0000000000000010ULL
  32 #define HPTE_R_I                0x0000000000000020ULL
  33 #define HPTE_R_W                0x0000000000000040ULL
  34 #define HPTE_R_WIMG             0x0000000000000078ULL
  35 #define HPTE_R_C                0x0000000000000080ULL
  36 #define HPTE_R_R                0x0000000000000100ULL
  37 #define HPTE_R_KEY_LO           0x0000000000000e00ULL
  38
  39 #define HPTE_V_1TB_SEG          0x4000000000000000ULL
  40 #define HPTE_V_VRMA_MASK        0x4001ffffff000000ULL
  41
  42 static target_ulong compute_tlbie_rb(target_ulong v, target_ulong r,
  43                                      target_ulong pte_index)
  44 {
  45     target_ulong rb, va_low;
  46
  47     rb = (v & ~0x7fULL) << 16; /* AVA field */
  48     va_low = pte_index >> 3;
  49     if (v & HPTE_V_SECONDARY) {
  50         va_low = ~va_low;
  51     }
  52     /* xor vsid from AVA */
  53     if (!(v & HPTE_V_1TB_SEG)) {
  54         va_low ^= v >> 12;
  55     } else {
  56         va_low ^= v >> 24;
  57     }
  58     va_low &= 0x7ff;
  59     if (v & HPTE_V_LARGE) {
  60         rb |= 1;                         /* L field */
  61 #if 0 /* Disable that P7 specific bit for now */
  62         if (r & 0xff000) {
  63             /* non-16MB large page, must be 64k */
  64             /* (masks depend on page size) */
  65             rb |= 0x1000;                /* page encoding in LP field */
  66             rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
  67             rb |= (va_low & 0xfe);       /* AVAL field */
  68         }
  69 #endif
  70     } else {
  71         /* 4kB page */
  72         rb |= (va_low & 0x7ff) << 12;   /* remaining 11b of AVA */
  73     }
  74     rb |= (v >> 54) & 0x300;            /* B field */
  75     return rb;
  76 }
  77
  78 static target_ulong h_enter(CPUPPCState *env, sPAPREnvironment *spapr,
  79                             target_ulong opcode, target_ulong *args)
  80 {
  81     target_ulong flags = args[0];
  82     target_ulong pte_index = args[1];
  83     target_ulong pteh = args[2];
  84     target_ulong ptel = args[3];
  85     target_ulong page_shift = 12;
  86     target_ulong raddr;
  87     target_ulong i;
  88     uint8_t *hpte;
  89
  90     /* only handle 4k and 16M pages for now */
  91     if (pteh & HPTE_V_LARGE) {
  92 #if 0 /* We don't support 64k pages yet */
  93         if ((ptel & 0xf000) == 0x1000) {
  94             /* 64k page */
  95         } else
  96 #endif
  97         if ((ptel & 0xff000) == 0) {
  98             /* 16M page */
  99             page_shift = 24;
 100             /* lowest AVA bit must be 0 for 16M pages */
 101             if (pteh & 0x80) {
 102                 return H_PARAMETER;
 103             }
 104         } else {
 105             return H_PARAMETER;
 106         }
 107     }
 108
 109     raddr = (ptel & HPTE_R_RPN) & ~((1ULL << page_shift) - 1);
 110
 111     if (raddr < spapr->ram_limit) {
 112         /* Regular RAM - should have WIMG=0010 */
 113         if ((ptel & HPTE_R_WIMG) != HPTE_R_M) {
 114             return H_PARAMETER;
 115         }
 116     } else {
 117         /* Looks like an IO address */
 118         /* FIXME: What WIMG combinations could be sensible for IO?
 119          * For now we allow WIMG=010x, but are there others? */
 120         /* FIXME: Should we check against registered IO addresses? */
 121         if ((ptel & (HPTE_R_W | HPTE_R_I | HPTE_R_M)) != HPTE_R_I) {
 122             return H_PARAMETER;
 123         }
 124     }
 125
 126     pteh &= ~0x60ULL;
 127
 128     if ((pte_index * HASH_PTE_SIZE_64) & ~env->htab_mask) {
 129         return H_PARAMETER;
 130     }
 131     if (likely((flags & H_EXACT) == 0)) {
 132         pte_index &= ~7ULL;
 133         hpte = env->external_htab + (pte_index * HASH_PTE_SIZE_64);
 134         for (i = 0; ; ++i) {
 135             if (i == 8) {
 136                 return H_PTEG_FULL;
 137             }
 138             if ((ldq_p(hpte) & HPTE_V_VALID) == 0) {
 139                 break;
 140             }
 141             hpte += HASH_PTE_SIZE_64;
 142         }
 143     } else {
 144         i = 0;
 145         hpte = env->external_htab + (pte_index * HASH_PTE_SIZE_64);
 146         if (ldq_p(hpte) & HPTE_V_VALID) {
 147             return H_PTEG_FULL;
 148         }
 149     }
 150     stq_p(hpte + (HASH_PTE_SIZE_64/2), ptel);
 151     /* eieio();  FIXME: need some sort of barrier for smp? */
 152     stq_p(hpte, pteh);
 153
 154     args[0] = pte_index + i;
 155     return H_SUCCESS;
 156 }
 157
 158 enum {
 159     REMOVE_SUCCESS = 0,
 160     REMOVE_NOT_FOUND = 1,
 161     REMOVE_PARM = 2,
 162     REMOVE_HW = 3,
 163 };
 164
 165 static target_ulong remove_hpte(CPUPPCState *env, target_ulong ptex,
 166                                 target_ulong avpn,
 167                                 target_ulong flags,
 168                                 target_ulong *vp, target_ulong *rp)
 169 {
 170     uint8_t *hpte;
 171     target_ulong v, r, rb;
 172
 173     if ((ptex * HASH_PTE_SIZE_64) & ~env->htab_mask) {
 174         return REMOVE_PARM;
 175     }
 176
 177     hpte = env->external_htab + (ptex * HASH_PTE_SIZE_64);
 178
 179     v = ldq_p(hpte);
 180     r = ldq_p(hpte + (HASH_PTE_SIZE_64/2));
 181
 182     if ((v & HPTE_V_VALID) == 0 ||
 183         ((flags & H_AVPN) && (v & ~0x7fULL) != avpn) ||
 184         ((flags & H_ANDCOND) && (v & avpn) != 0)) {
 185         return REMOVE_NOT_FOUND;
 186     }
 187     *vp = v;
 188     *rp = r;
 189     stq_p(hpte, 0);
 190     rb = compute_tlbie_rb(v, r, ptex);
 191     ppc_tlb_invalidate_one(env, rb);
 192     return REMOVE_SUCCESS;
 193 }
 194
 195 static target_ulong h_remove(CPUPPCState *env, sPAPREnvironment *spapr,
 196                              target_ulong opcode, target_ulong *args)
 197 {
 198     target_ulong flags = args[0];
 199     target_ulong pte_index = args[1];
 200     target_ulong avpn = args[2];
 201     int ret;
 202
 203     ret = remove_hpte(env, pte_index, avpn, flags,
 204                       &args[0], &args[1]);
 205
 206     switch (ret) {
 207     case REMOVE_SUCCESS:
 208         return H_SUCCESS;
 209
 210     case REMOVE_NOT_FOUND:
 211         return H_NOT_FOUND;
 212
 213     case REMOVE_PARM:
 214         return H_PARAMETER;
 215
 216     case REMOVE_HW:
 217         return H_HARDWARE;
 218     }
 219
 220     assert(0);
 221 }
 222
 223 #define H_BULK_REMOVE_TYPE             0xc000000000000000ULL
 224 #define   H_BULK_REMOVE_REQUEST        0x4000000000000000ULL
 225 #define   H_BULK_REMOVE_RESPONSE       0x8000000000000000ULL
 226 #define   H_BULK_REMOVE_END            0xc000000000000000ULL
 227 #define H_BULK_REMOVE_CODE             0x3000000000000000ULL
 228 #define   H_BULK_REMOVE_SUCCESS        0x0000000000000000ULL
 229 #define   H_BULK_REMOVE_NOT_FOUND      0x1000000000000000ULL
 230 #define   H_BULK_REMOVE_PARM           0x2000000000000000ULL
 231 #define   H_BULK_REMOVE_HW             0x3000000000000000ULL
 232 #define H_BULK_REMOVE_RC               0x0c00000000000000ULL
 233 #define H_BULK_REMOVE_FLAGS            0x0300000000000000ULL
 234 #define   H_BULK_REMOVE_ABSOLUTE       0x0000000000000000ULL
 235 #define   H_BULK_REMOVE_ANDCOND        0x0100000000000000ULL
 236 #define   H_BULK_REMOVE_AVPN           0x0200000000000000ULL
 237 #define H_BULK_REMOVE_PTEX             0x00ffffffffffffffULL
 238
 239 #define H_BULK_REMOVE_MAX_BATCH        4
 240
 241 static target_ulong h_bulk_remove(CPUPPCState *env, sPAPREnvironment *spapr,
 242                                   target_ulong opcode, target_ulong *args)
 243 {
 244     int i;
 245
 246     for (i = 0; i < H_BULK_REMOVE_MAX_BATCH; i++) {
 247         target_ulong *tsh = &args[i*2];
 248         target_ulong tsl = args[i*2 + 1];
 249         target_ulong v, r, ret;
 250
 251         if ((*tsh & H_BULK_REMOVE_TYPE) == H_BULK_REMOVE_END) {
 252             break;
 253         } else if ((*tsh & H_BULK_REMOVE_TYPE) != H_BULK_REMOVE_REQUEST) {
 254             return H_PARAMETER;
 255         }
 256
 257         *tsh &= H_BULK_REMOVE_PTEX | H_BULK_REMOVE_FLAGS;
 258         *tsh |= H_BULK_REMOVE_RESPONSE;
 259
 260         if ((*tsh & H_BULK_REMOVE_ANDCOND) && (*tsh & H_BULK_REMOVE_AVPN)) {
 261             *tsh |= H_BULK_REMOVE_PARM;
 262             return H_PARAMETER;
 263         }
 264
 265         ret = remove_hpte(env, *tsh & H_BULK_REMOVE_PTEX, tsl,
 266                           (*tsh & H_BULK_REMOVE_FLAGS) >> 26,
 267                           &v, &r);
 268
 269         *tsh |= ret << 60;
 270
 271         switch (ret) {
 272         case REMOVE_SUCCESS:
 273             *tsh |= (r & (HPTE_R_C | HPTE_R_R)) << 43;
 274             break;
 275
 276         case REMOVE_PARM:
 277             return H_PARAMETER;
 278
 279         case REMOVE_HW:
 280             return H_HARDWARE;
 281         }
 282     }
 283
 284     return H_SUCCESS;
 285 }
 286
 287 static target_ulong h_protect(CPUPPCState *env, sPAPREnvironment *spapr,
 288                               target_ulong opcode, target_ulong *args)
 289 {
 290     target_ulong flags = args[0];
 291     target_ulong pte_index = args[1];
 292     target_ulong avpn = args[2];
 293     uint8_t *hpte;
 294     target_ulong v, r, rb;
 295
 296     if ((pte_index * HASH_PTE_SIZE_64) & ~env->htab_mask) {
 297         return H_PARAMETER;
 298     }
 299
 300     hpte = env->external_htab + (pte_index * HASH_PTE_SIZE_64);
 301
 302     v = ldq_p(hpte);
 303     r = ldq_p(hpte + (HASH_PTE_SIZE_64/2));
 304
 305     if ((v & HPTE_V_VALID) == 0 ||
 306         ((flags & H_AVPN) && (v & ~0x7fULL) != avpn)) {
 307         return H_NOT_FOUND;
 308     }
 309
 310     r &= ~(HPTE_R_PP0 | HPTE_R_PP | HPTE_R_N |
 311            HPTE_R_KEY_HI | HPTE_R_KEY_LO);
 312     r |= (flags << 55) & HPTE_R_PP0;
 313     r |= (flags << 48) & HPTE_R_KEY_HI;
 314     r |= flags & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO);
 315     rb = compute_tlbie_rb(v, r, pte_index);
 316     stq_p(hpte, v & ~HPTE_V_VALID);
 317     ppc_tlb_invalidate_one(env, rb);
 318     stq_p(hpte + (HASH_PTE_SIZE_64/2), r);
 319     /* Don't need a memory barrier, due to qemu's global lock */
 320     stq_p(hpte, v);
 321     return H_SUCCESS;
 322 }
 323
 324 static target_ulong h_set_dabr(CPUPPCState *env, sPAPREnvironment *spapr,
 325                                target_ulong opcode, target_ulong *args)
 326 {
 327     /* FIXME: actually implement this */
 328     return H_HARDWARE;
 329 }
 330
 331 #define FLAGS_REGISTER_VPA         0x0000200000000000ULL
 332 #define FLAGS_REGISTER_DTL         0x0000400000000000ULL
 333 #define FLAGS_REGISTER_SLBSHADOW   0x0000600000000000ULL
 334 #define FLAGS_DEREGISTER_VPA       0x0000a00000000000ULL
 335 #define FLAGS_DEREGISTER_DTL       0x0000c00000000000ULL
 336 #define FLAGS_DEREGISTER_SLBSHADOW 0x0000e00000000000ULL
 337
 338 #define VPA_MIN_SIZE           640
 339 #define VPA_SIZE_OFFSET        0x4
 340 #define VPA_SHARED_PROC_OFFSET 0x9
 341 #define VPA_SHARED_PROC_VAL    0x2
 342
 343 static target_ulong register_vpa(CPUPPCState *env, target_ulong vpa)
 344 {
 345     uint16_t size;
 346     uint8_t tmp;
 347
 348     if (vpa == 0) {
 349         hcall_dprintf("Can't cope with registering a VPA at logical 0\n");
 350         return H_HARDWARE;
 351     }
 352
 353     if (vpa % env->dcache_line_size) {
 354         return H_PARAMETER;
 355     }
 356     /* FIXME: bounds check the address */
 357
 358     size = lduw_be_phys(vpa + 0x4);
 359
 360     if (size < VPA_MIN_SIZE) {
 361         return H_PARAMETER;
 362     }
 363
 364     /* VPA is not allowed to cross a page boundary */
 365     if ((vpa / 4096) != ((vpa + size - 1) / 4096)) {
 366         return H_PARAMETER;
 367     }
 368
 369     env->vpa = vpa;
 370
 371     tmp = ldub_phys(env->vpa + VPA_SHARED_PROC_OFFSET);
 372     tmp |= VPA_SHARED_PROC_VAL;
 373     stb_phys(env->vpa + VPA_SHARED_PROC_OFFSET, tmp);
 374
 375     return H_SUCCESS;
 376 }
 377
 378 static target_ulong deregister_vpa(CPUPPCState *env, target_ulong vpa)
 379 {
 380     if (env->slb_shadow) {
 381         return H_RESOURCE;
 382     }
 383
 384     if (env->dispatch_trace_log) {
 385         return H_RESOURCE;
 386     }
 387
 388     env->vpa = 0;
 389     return H_SUCCESS;
 390 }
 391
 392 static target_ulong register_slb_shadow(CPUPPCState *env, target_ulong addr)
 393 {
 394     uint32_t size;
 395
 396     if (addr == 0) {
 397         hcall_dprintf("Can't cope with SLB shadow at logical 0\n");
 398         return H_HARDWARE;
 399     }
 400
 401     size = ldl_be_phys(addr + 0x4);
 402     if (size < 0x8) {
 403         return H_PARAMETER;
 404     }
 405
 406     if ((addr / 4096) != ((addr + size - 1) / 4096)) {
 407         return H_PARAMETER;
 408     }
 409
 410     if (!env->vpa) {
 411         return H_RESOURCE;
 412     }
 413
 414     env->slb_shadow = addr;
 415
 416     return H_SUCCESS;
 417 }
 418
 419 static target_ulong deregister_slb_shadow(CPUPPCState *env, target_ulong addr)
 420 {
 421     env->slb_shadow = 0;
 422     return H_SUCCESS;
 423 }
 424
 425 static target_ulong register_dtl(CPUPPCState *env, target_ulong addr)
 426 {
 427     uint32_t size;
 428
 429     if (addr == 0) {
 430         hcall_dprintf("Can't cope with DTL at logical 0\n");
 431         return H_HARDWARE;
 432     }
 433
 434     size = ldl_be_phys(addr + 0x4);
 435
 436     if (size < 48) {
 437         return H_PARAMETER;
 438     }
 439
 440     if (!env->vpa) {
 441         return H_RESOURCE;
 442     }
 443
 444     env->dispatch_trace_log = addr;
 445     env->dtl_size = size;
 446
 447     return H_SUCCESS;
 448 }
 449
 450 static target_ulong deregister_dtl(CPUPPCState *env, target_ulong addr)
 451 {
 452     env->dispatch_trace_log = 0;
 453     env->dtl_size = 0;
 454
 455     return H_SUCCESS;
 456 }
 457
 458 static target_ulong h_register_vpa(CPUPPCState *env, sPAPREnvironment *spapr,
 459                                    target_ulong opcode, target_ulong *args)
 460 {
 461     target_ulong flags = args[0];
 462     target_ulong procno = args[1];
 463     target_ulong vpa = args[2];
 464     target_ulong ret = H_PARAMETER;
 465     CPUPPCState *tenv;
 466
 467     for (tenv = first_cpu; tenv; tenv = tenv->next_cpu) {
 468         if (tenv->cpu_index == procno) {
 469             break;
 470         }
 471     }
 472
 473     if (!tenv) {
 474         return H_PARAMETER;
 475     }
 476
 477     switch (flags) {
 478     case FLAGS_REGISTER_VPA:
 479         ret = register_vpa(tenv, vpa);
 480         break;
 481
 482     case FLAGS_DEREGISTER_VPA:
 483         ret = deregister_vpa(tenv, vpa);
 484         break;
 485
 486     case FLAGS_REGISTER_SLBSHADOW:
 487         ret = register_slb_shadow(tenv, vpa);
 488         break;
 489
 490     case FLAGS_DEREGISTER_SLBSHADOW:
 491         ret = deregister_slb_shadow(tenv, vpa);
 492         break;
 493
 494     case FLAGS_REGISTER_DTL:
 495         ret = register_dtl(tenv, vpa);
 496         break;
 497
 498     case FLAGS_DEREGISTER_DTL:
 499         ret = deregister_dtl(tenv, vpa);
 500         break;
 501     }
 502
 503     return ret;
 504 }
 505
 506 static target_ulong h_cede(CPUPPCState *env, sPAPREnvironment *spapr,
 507                            target_ulong opcode, target_ulong *args)
 508 {
 509     env->msr |= (1ULL << MSR_EE);
 510     hreg_compute_hflags(env);
 511     if (!cpu_has_work(env)) {
 512         env->halted = 1;
 513         env->exception_index = EXCP_HLT;
 514         env->exit_request = 1;
 515     }
 516     return H_SUCCESS;
 517 }
 518
 519 static target_ulong h_rtas(CPUPPCState *env, sPAPREnvironment *spapr,
 520                            target_ulong opcode, target_ulong *args)
 521 {
 522     target_ulong rtas_r3 = args[0];
 523     uint32_t token = ldl_be_phys(rtas_r3);
 524     uint32_t nargs = ldl_be_phys(rtas_r3 + 4);
 525     uint32_t nret = ldl_be_phys(rtas_r3 + 8);
 526
 527     return spapr_rtas_call(spapr, token, nargs, rtas_r3 + 12,
 528                            nret, rtas_r3 + 12 + 4*nargs);
 529 }
 530
 531 static target_ulong h_logical_load(CPUPPCState *env, sPAPREnvironment *spapr,
 532                                    target_ulong opcode, target_ulong *args)
 533 {
 534     target_ulong size = args[0];
 535     target_ulong addr = args[1];
 536
 537     switch (size) {
 538     case 1:
 539         args[0] = ldub_phys(addr);
 540         return H_SUCCESS;
 541     case 2:
 542         args[0] = lduw_phys(addr);
 543         return H_SUCCESS;
 544     case 4:
 545         args[0] = ldl_phys(addr);
 546         return H_SUCCESS;
 547     case 8:
 548         args[0] = ldq_phys(addr);
 549         return H_SUCCESS;
 550     }
 551     return H_PARAMETER;
 552 }
 553
 554 static target_ulong h_logical_store(CPUPPCState *env, sPAPREnvironment *spapr,
 555                                     target_ulong opcode, target_ulong *args)
 556 {
 557     target_ulong size = args[0];
 558     target_ulong addr = args[1];
 559     target_ulong val  = args[2];
 560
 561     switch (size) {
 562     case 1:
 563         stb_phys(addr, val);
 564         return H_SUCCESS;
 565     case 2:
 566         stw_phys(addr, val);
 567         return H_SUCCESS;
 568     case 4:
 569         stl_phys(addr, val);
 570         return H_SUCCESS;
 571     case 8:
 572         stq_phys(addr, val);
 573         return H_SUCCESS;
 574     }
 575     return H_PARAMETER;
 576 }
 577
 578 static target_ulong h_logical_memop(CPUPPCState *env, sPAPREnvironment *spapr,
 579                                     target_ulong opcode, target_ulong *args)
 580 {
 581     target_ulong dst   = args[0]; /* Destination address */
 582     target_ulong src   = args[1]; /* Source address */
 583     target_ulong esize = args[2]; /* Element size (0=1,1=2,2=4,3=8) */
 584     target_ulong count = args[3]; /* Element count */
 585     target_ulong op    = args[4]; /* 0 = copy, 1 = invert */
 586     uint64_t tmp;
 587     unsigned int mask = (1 << esize) - 1;
 588     int step = 1 << esize;
 589
 590     if (count > 0x80000000) {
 591         return H_PARAMETER;
 592     }
 593
 594     if ((dst & mask) || (src & mask) || (op > 1)) {
 595         return H_PARAMETER;
 596     }
 597
 598     if (dst >= src && dst < (src + (count << esize))) {
 599             dst = dst + ((count - 1) << esize);
 600             src = src + ((count - 1) << esize);
 601             step = -step;
 602     }
 603
 604     while (count--) {
 605         switch (esize) {
 606         case 0:
 607             tmp = ldub_phys(src);
 608             break;
 609         case 1:
 610             tmp = lduw_phys(src);
 611             break;
 612         case 2:
 613             tmp = ldl_phys(src);
 614             break;
 615         case 3:
 616             tmp = ldq_phys(src);
 617             break;
 618         default:
 619             return H_PARAMETER;
 620         }
 621         if (op == 1) {
 622             tmp = ~tmp;
 623         }
 624         switch (esize) {
 625         case 0:
 626             stb_phys(dst, tmp);
 627             break;
 628         case 1:
 629             stw_phys(dst, tmp);
 630             break;
 631         case 2:
 632             stl_phys(dst, tmp);
 633             break;
 634         case 3:
 635             stq_phys(dst, tmp);
 636             break;
 637         }
 638         dst = dst + step;
 639         src = src + step;
 640     }
 641
 642     return H_SUCCESS;
 643 }
 644
 645 static target_ulong h_logical_icbi(CPUPPCState *env, sPAPREnvironment *spapr,
 646                                    target_ulong opcode, target_ulong *args)
 647 {
 648     /* Nothing to do on emulation, KVM will trap this in the kernel */
 649     return H_SUCCESS;
 650 }
 651
 652 static target_ulong h_logical_dcbf(CPUPPCState *env, sPAPREnvironment *spapr,
 653                                    target_ulong opcode, target_ulong *args)
 654 {
 655     /* Nothing to do on emulation, KVM will trap this in the kernel */
 656     return H_SUCCESS;
 657 }
 658
 659 static spapr_hcall_fn papr_hypercall_table[(MAX_HCALL_OPCODE / 4) + 1];
 660 static spapr_hcall_fn kvmppc_hypercall_table[KVMPPC_HCALL_MAX - KVMPPC_HCALL_BASE + 1];
 661
 662 void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn)
 663 {
 664     spapr_hcall_fn *slot;
 665
 666     if (opcode <= MAX_HCALL_OPCODE) {
 667         assert((opcode & 0x3) == 0);
 668
 669         slot = &papr_hypercall_table[opcode / 4];
 670     } else {
 671         assert((opcode >= KVMPPC_HCALL_BASE) && (opcode <= KVMPPC_HCALL_MAX));
 672
 673
 674         slot = &kvmppc_hypercall_table[opcode - KVMPPC_HCALL_BASE];
 675     }
 676
 677     assert(!(*slot) || (fn == *slot));
 678     *slot = fn;
 679 }
 680
 681 target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
 682                              target_ulong *args)
 683 {
 684     if ((opcode <= MAX_HCALL_OPCODE)
 685         && ((opcode & 0x3) == 0)) {
 686         spapr_hcall_fn fn = papr_hypercall_table[opcode / 4];
 687
 688         if (fn) {
 689             return fn(env, spapr, opcode, args);
 690         }
 691     } else if ((opcode >= KVMPPC_HCALL_BASE) &&
 692                (opcode <= KVMPPC_HCALL_MAX)) {
 693         spapr_hcall_fn fn = kvmppc_hypercall_table[opcode - KVMPPC_HCALL_BASE];
 694
 695         if (fn) {
 696             return fn(env, spapr, opcode, args);
 697         }
 698     }
 699
 700     hcall_dprintf("Unimplemented hcall 0x" TARGET_FMT_lx "\n", opcode);
 701     return H_FUNCTION;
 702 }
 703
 704 static void hypercall_register_types(void)
 705 {
 706     /* hcall-pft */
 707     spapr_register_hypercall(H_ENTER, h_enter);
 708     spapr_register_hypercall(H_REMOVE, h_remove);
 709     spapr_register_hypercall(H_PROTECT, h_protect);
 710
 711     /* hcall-bulk */
 712     spapr_register_hypercall(H_BULK_REMOVE, h_bulk_remove);
 713
 714     /* hcall-dabr */
 715     spapr_register_hypercall(H_SET_DABR, h_set_dabr);
 716
 717     /* hcall-splpar */
 718     spapr_register_hypercall(H_REGISTER_VPA, h_register_vpa);
 719     spapr_register_hypercall(H_CEDE, h_cede);
 720
 721     /* "debugger" hcalls (also used by SLOF). Note: We do -not- differenciate
 722      * here between the "CI" and the "CACHE" variants, they will use whatever
 723      * mapping attributes qemu is using. When using KVM, the kernel will
 724      * enforce the attributes more strongly
 725      */
 726     spapr_register_hypercall(H_LOGICAL_CI_LOAD, h_logical_load);
 727     spapr_register_hypercall(H_LOGICAL_CI_STORE, h_logical_store);
 728     spapr_register_hypercall(H_LOGICAL_CACHE_LOAD, h_logical_load);
 729     spapr_register_hypercall(H_LOGICAL_CACHE_STORE, h_logical_store);
 730     spapr_register_hypercall(H_LOGICAL_ICBI, h_logical_icbi);
 731     spapr_register_hypercall(H_LOGICAL_DCBF, h_logical_dcbf);
 732     spapr_register_hypercall(KVMPPC_H_LOGICAL_MEMOP, h_logical_memop);
 733
 734     /* qemu/KVM-PPC specific hcalls */
 735     spapr_register_hypercall(KVMPPC_H_RTAS, h_rtas);
 736 }
 737
 738 type_init(hypercall_register_types)