hw/xtensa_lx60.c

   1 /*
   2  * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *     * Redistributions of source code must retain the above copyright
   8  *       notice, this list of conditions and the following disclaimer.
   9  *     * Redistributions in binary form must reproduce the above copyright
  10  *       notice, this list of conditions and the following disclaimer in the
  11  *       documentation and/or other materials provided with the distribution.
  12  *     * Neither the name of the Open Source and Linux Lab nor the
  13  *       names of its contributors may be used to endorse or promote products
  14  *       derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  20  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  23  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  25  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  */
  27
  28 #include "sysemu.h"
  29 #include "boards.h"
  30 #include "loader.h"
  31 #include "elf.h"
  32 #include "memory.h"
  33 #include "exec-memory.h"
  34 #include "pc.h"
  35 #include "sysbus.h"
  36 #include "flash.h"
  37 #include "blockdev.h"
  38 #include "xtensa_bootparam.h"
  39
  40 typedef struct LxBoardDesc {
  41     size_t flash_size;
  42     size_t flash_sector_size;
  43     size_t sram_size;
  44 } LxBoardDesc;
  45
  46 typedef struct Lx60FpgaState {
  47     MemoryRegion iomem;
  48     uint32_t leds;
  49     uint32_t switches;
  50 } Lx60FpgaState;
  51
  52 static void lx60_fpga_reset(void *opaque)
  53 {
  54     Lx60FpgaState *s = opaque;
  55
  56     s->leds = 0;
  57     s->switches = 0;
  58 }
  59
  60 static uint64_t lx60_fpga_read(void *opaque, target_phys_addr_t addr,
  61         unsigned size)
  62 {
  63     Lx60FpgaState *s = opaque;
  64
  65     switch (addr) {
  66     case 0x0: /*build date code*/
  67         return 0x09272011;
  68
  69     case 0x4: /*processor clock frequency, Hz*/
  70         return 10000000;
  71
  72     case 0x8: /*LEDs (off = 0, on = 1)*/
  73         return s->leds;
  74
  75     case 0xc: /*DIP switches (off = 0, on = 1)*/
  76         return s->switches;
  77     }
  78     return 0;
  79 }
  80
  81 static void lx60_fpga_write(void *opaque, target_phys_addr_t addr,
  82         uint64_t val, unsigned size)
  83 {
  84     Lx60FpgaState *s = opaque;
  85
  86     switch (addr) {
  87     case 0x8: /*LEDs (off = 0, on = 1)*/
  88         s->leds = val;
  89         break;
  90
  91     case 0x10: /*board reset*/
  92         if (val == 0xdead) {
  93             qemu_system_reset_request();
  94         }
  95         break;
  96     }
  97 }
  98
  99 static const MemoryRegionOps lx60_fpga_ops = {
 100     .read = lx60_fpga_read,
 101     .write = lx60_fpga_write,
 102     .endianness = DEVICE_NATIVE_ENDIAN,
 103 };
 104
 105 static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space,
 106         target_phys_addr_t base)
 107 {
 108     Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState));
 109
 110     memory_region_init_io(&s->iomem, &lx60_fpga_ops, s,
 111             "lx60.fpga", 0x10000);
 112     memory_region_add_subregion(address_space, base, &s->iomem);
 113     lx60_fpga_reset(s);
 114     qemu_register_reset(lx60_fpga_reset, s);
 115     return s;
 116 }
 117
 118 static void lx60_net_init(MemoryRegion *address_space,
 119         target_phys_addr_t base,
 120         target_phys_addr_t descriptors,
 121         target_phys_addr_t buffers,
 122         qemu_irq irq, NICInfo *nd)
 123 {
 124     DeviceState *dev;
 125     SysBusDevice *s;
 126     MemoryRegion *ram;
 127
 128     dev = qdev_create(NULL, "open_eth");
 129     qdev_set_nic_properties(dev, nd);
 130     qdev_init_nofail(dev);
 131
 132     s = sysbus_from_qdev(dev);
 133     sysbus_connect_irq(s, 0, irq);
 134     memory_region_add_subregion(address_space, base,
 135             sysbus_mmio_get_region(s, 0));
 136     memory_region_add_subregion(address_space, descriptors,
 137             sysbus_mmio_get_region(s, 1));
 138
 139     ram = g_malloc(sizeof(*ram));
 140     memory_region_init_ram(ram, "open_eth.ram", 16384);
 141     vmstate_register_ram_global(ram);
 142     memory_region_add_subregion(address_space, buffers, ram);
 143 }
 144
 145 static uint64_t translate_phys_addr(void *env, uint64_t addr)
 146 {
 147     return cpu_get_phys_page_debug(env, addr);
 148 }
 149
 150 static void lx60_reset(void *opaque)
 151 {
 152     XtensaCPU *cpu = opaque;
 153
 154     cpu_reset(CPU(cpu));
 155 }
 156
 157 static void lx_init(const LxBoardDesc *board,
 158         ram_addr_t ram_size, const char *boot_device,
 159         const char *kernel_filename, const char *kernel_cmdline,
 160         const char *initrd_filename, const char *cpu_model)
 161 {
 162 #ifdef TARGET_WORDS_BIGENDIAN
 163     int be = 1;
 164 #else
 165     int be = 0;
 166 #endif
 167     MemoryRegion *system_memory = get_system_memory();
 168     XtensaCPU *cpu = NULL;
 169     CPUXtensaState *env = NULL;
 170     MemoryRegion *ram, *rom, *system_io;
 171     DriveInfo *dinfo;
 172     pflash_t *flash = NULL;
 173     int n;
 174
 175     if (!cpu_model) {
 176         cpu_model = XTENSA_DEFAULT_CPU_MODEL;
 177     }
 178
 179     for (n = 0; n < smp_cpus; n++) {
 180         cpu = cpu_xtensa_init(cpu_model);
 181         if (cpu == NULL) {
 182             fprintf(stderr, "Unable to find CPU definition\n");
 183             exit(1);
 184         }
 185         env = &cpu->env;
 186
 187         env->sregs[PRID] = n;
 188         qemu_register_reset(lx60_reset, cpu);
 189         /* Need MMU initialized prior to ELF loading,
 190          * so that ELF gets loaded into virtual addresses
 191          */
 192         cpu_reset(CPU(cpu));
 193     }
 194
 195     ram = g_malloc(sizeof(*ram));
 196     memory_region_init_ram(ram, "lx60.dram", ram_size);
 197     vmstate_register_ram_global(ram);
 198     memory_region_add_subregion(system_memory, 0, ram);
 199
 200     system_io = g_malloc(sizeof(*system_io));
 201     memory_region_init(system_io, "lx60.io", 224 * 1024 * 1024);
 202     memory_region_add_subregion(system_memory, 0xf0000000, system_io);
 203     lx60_fpga_init(system_io, 0x0d020000);
 204     if (nd_table[0].used) {
 205         lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,
 206                 xtensa_get_extint(env, 1), nd_table);
 207     }
 208
 209     if (!serial_hds[0]) {
 210         serial_hds[0] = qemu_chr_new("serial0", "null", NULL);
 211     }
 212
 213     serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),
 214             115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
 215
 216     dinfo = drive_get(IF_PFLASH, 0, 0);
 217     if (dinfo) {
 218         flash = pflash_cfi01_register(0xf8000000,
 219                 NULL, "lx60.io.flash", board->flash_size,
 220                 dinfo->bdrv, board->flash_sector_size,
 221                 board->flash_size / board->flash_sector_size,
 222                 4, 0x0000, 0x0000, 0x0000, 0x0000, be);
 223         if (flash == NULL) {
 224             fprintf(stderr, "Unable to mount pflash\n");
 225             exit(1);
 226         }
 227     }
 228
 229     /* Use presence of kernel file name as 'boot from SRAM' switch. */
 230     if (kernel_filename) {
 231         rom = g_malloc(sizeof(*rom));
 232         memory_region_init_ram(rom, "lx60.sram", board->sram_size);
 233         vmstate_register_ram_global(rom);
 234         memory_region_add_subregion(system_memory, 0xfe000000, rom);
 235
 236         /* Put kernel bootparameters to the end of that SRAM */
 237         if (kernel_cmdline) {
 238             size_t cmdline_size = strlen(kernel_cmdline) + 1;
 239             size_t bp_size = sizeof(BpTag[4]) + cmdline_size;
 240             uint32_t tagptr = (0xfe000000 + board->sram_size - bp_size) & ~0xff;
 241
 242             env->regs[2] = tagptr;
 243
 244             tagptr = put_tag(tagptr, 0x7b0b, 0, NULL);
 245             if (cmdline_size > 1) {
 246                 tagptr = put_tag(tagptr, 0x1001,
 247                         cmdline_size, kernel_cmdline);
 248             }
 249             tagptr = put_tag(tagptr, 0x7e0b, 0, NULL);
 250         }
 251         uint64_t elf_entry;
 252         uint64_t elf_lowaddr;
 253         int success = load_elf(kernel_filename, translate_phys_addr, env,
 254                 &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0);
 255         if (success > 0) {
 256             env->pc = elf_entry;
 257         }
 258     } else {
 259         if (flash) {
 260             MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);
 261             MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));
 262
 263             memory_region_init_alias(flash_io, "lx60.flash",
 264                     flash_mr, 0, board->flash_size);
 265             memory_region_add_subregion(system_memory, 0xfe000000,
 266                     flash_io);
 267         }
 268     }
 269 }
 270
 271 static void xtensa_lx60_init(ram_addr_t ram_size,
 272                      const char *boot_device,
 273                      const char *kernel_filename, const char *kernel_cmdline,
 274                      const char *initrd_filename, const char *cpu_model)
 275 {
 276     static const LxBoardDesc lx60_board = {
 277         .flash_size = 0x400000,
 278         .flash_sector_size = 0x10000,
 279         .sram_size = 0x20000,
 280     };
 281     lx_init(&lx60_board, ram_size, boot_device,
 282             kernel_filename, kernel_cmdline,
 283             initrd_filename, cpu_model);
 284 }
 285
 286 static void xtensa_lx200_init(ram_addr_t ram_size,
 287                      const char *boot_device,
 288                      const char *kernel_filename, const char *kernel_cmdline,
 289                      const char *initrd_filename, const char *cpu_model)
 290 {
 291     static const LxBoardDesc lx200_board = {
 292         .flash_size = 0x1000000,
 293         .flash_sector_size = 0x20000,
 294         .sram_size = 0x2000000,
 295     };
 296     lx_init(&lx200_board, ram_size, boot_device,
 297             kernel_filename, kernel_cmdline,
 298             initrd_filename, cpu_model);
 299 }
 300
 301 static QEMUMachine xtensa_lx60_machine = {
 302     .name = "lx60",
 303     .desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
 304     .init = xtensa_lx60_init,
 305     .max_cpus = 4,
 306 };
 307
 308 static QEMUMachine xtensa_lx200_machine = {
 309     .name = "lx200",
 310     .desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
 311     .init = xtensa_lx200_init,
 312     .max_cpus = 4,
 313 };
 314
 315 static void xtensa_lx_machines_init(void)
 316 {
 317     qemu_register_machine(&xtensa_lx60_machine);
 318     qemu_register_machine(&xtensa_lx200_machine);
 319 }
 320
 321 machine_init(xtensa_lx_machines_init);