tcg/arm: Factor out code to emit immediate or reg-reg op
[qemu/pbrook.git] / disas.c
blobb801c8f51d4f1d8eae072ff18d6a26e37514cc83
1 /* General "disassemble this chunk" code. Used for debugging. */
2 #include "config.h"
3 #include "dis-asm.h"
4 #include "elf.h"
5 #include <errno.h>
7 #include "cpu.h"
8 #include "disas.h"
10 /* Filled in by elfload.c. Simplistic, but will do for now. */
11 struct syminfo *syminfos = NULL;
13 /* Get LENGTH bytes from info's buffer, at target address memaddr.
14 Transfer them to myaddr. */
15 int
16 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
17 struct disassemble_info *info)
19 if (memaddr < info->buffer_vma
20 || memaddr + length > info->buffer_vma + info->buffer_length)
21 /* Out of bounds. Use EIO because GDB uses it. */
22 return EIO;
23 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
24 return 0;
27 /* Get LENGTH bytes from info's buffer, at target address memaddr.
28 Transfer them to myaddr. */
29 static int
30 target_read_memory (bfd_vma memaddr,
31 bfd_byte *myaddr,
32 int length,
33 struct disassemble_info *info)
35 cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
36 return 0;
39 /* Print an error message. We can assume that this is in response to
40 an error return from buffer_read_memory. */
41 void
42 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
44 if (status != EIO)
45 /* Can't happen. */
46 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
47 else
48 /* Actually, address between memaddr and memaddr + len was
49 out of bounds. */
50 (*info->fprintf_func) (info->stream,
51 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
54 /* This could be in a separate file, to save minuscule amounts of space
55 in statically linked executables. */
57 /* Just print the address is hex. This is included for completeness even
58 though both GDB and objdump provide their own (to print symbolic
59 addresses). */
61 void
62 generic_print_address (bfd_vma addr, struct disassemble_info *info)
64 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
67 /* Print address in hex, truncated to the width of a target virtual address. */
68 static void
69 generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
71 uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
72 generic_print_address(addr & mask, info);
75 /* Print address in hex, truncated to the width of a host virtual address. */
76 static void
77 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
79 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
80 generic_print_address(addr & mask, info);
83 /* Just return the given address. */
85 int
86 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
88 return 1;
91 bfd_vma bfd_getl64 (const bfd_byte *addr)
93 unsigned long long v;
95 v = (unsigned long long) addr[0];
96 v |= (unsigned long long) addr[1] << 8;
97 v |= (unsigned long long) addr[2] << 16;
98 v |= (unsigned long long) addr[3] << 24;
99 v |= (unsigned long long) addr[4] << 32;
100 v |= (unsigned long long) addr[5] << 40;
101 v |= (unsigned long long) addr[6] << 48;
102 v |= (unsigned long long) addr[7] << 56;
103 return (bfd_vma) v;
106 bfd_vma bfd_getl32 (const bfd_byte *addr)
108 unsigned long v;
110 v = (unsigned long) addr[0];
111 v |= (unsigned long) addr[1] << 8;
112 v |= (unsigned long) addr[2] << 16;
113 v |= (unsigned long) addr[3] << 24;
114 return (bfd_vma) v;
117 bfd_vma bfd_getb32 (const bfd_byte *addr)
119 unsigned long v;
121 v = (unsigned long) addr[0] << 24;
122 v |= (unsigned long) addr[1] << 16;
123 v |= (unsigned long) addr[2] << 8;
124 v |= (unsigned long) addr[3];
125 return (bfd_vma) v;
128 bfd_vma bfd_getl16 (const bfd_byte *addr)
130 unsigned long v;
132 v = (unsigned long) addr[0];
133 v |= (unsigned long) addr[1] << 8;
134 return (bfd_vma) v;
137 bfd_vma bfd_getb16 (const bfd_byte *addr)
139 unsigned long v;
141 v = (unsigned long) addr[0] << 24;
142 v |= (unsigned long) addr[1] << 16;
143 return (bfd_vma) v;
146 #ifdef TARGET_ARM
147 static int
148 print_insn_thumb1(bfd_vma pc, disassemble_info *info)
150 return print_insn_arm(pc | 1, info);
152 #endif
154 /* Disassemble this for me please... (debugging). 'flags' has the following
155 values:
156 i386 - 1 means 16 bit code, 2 means 64 bit code
157 arm - bit 0 = thumb, bit 1 = reverse endian
158 ppc - nonzero means little endian
159 other targets - unused
161 void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
163 target_ulong pc;
164 int count;
165 struct disassemble_info disasm_info;
166 int (*print_insn)(bfd_vma pc, disassemble_info *info);
168 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
170 disasm_info.read_memory_func = target_read_memory;
171 disasm_info.buffer_vma = code;
172 disasm_info.buffer_length = size;
173 disasm_info.print_address_func = generic_print_target_address;
175 #ifdef TARGET_WORDS_BIGENDIAN
176 disasm_info.endian = BFD_ENDIAN_BIG;
177 #else
178 disasm_info.endian = BFD_ENDIAN_LITTLE;
179 #endif
180 #if defined(TARGET_I386)
181 if (flags == 2)
182 disasm_info.mach = bfd_mach_x86_64;
183 else if (flags == 1)
184 disasm_info.mach = bfd_mach_i386_i8086;
185 else
186 disasm_info.mach = bfd_mach_i386_i386;
187 print_insn = print_insn_i386;
188 #elif defined(TARGET_ARM)
189 if (flags & 1) {
190 print_insn = print_insn_thumb1;
191 } else {
192 print_insn = print_insn_arm;
194 if (flags & 2) {
195 #ifdef TARGET_WORDS_BIGENDIAN
196 disasm_info.endian = BFD_ENDIAN_LITTLE;
197 #else
198 disasm_info.endian = BFD_ENDIAN_BIG;
199 #endif
201 #elif defined(TARGET_SPARC)
202 print_insn = print_insn_sparc;
203 #ifdef TARGET_SPARC64
204 disasm_info.mach = bfd_mach_sparc_v9b;
205 #endif
206 #elif defined(TARGET_PPC)
207 if (flags >> 16)
208 disasm_info.endian = BFD_ENDIAN_LITTLE;
209 if (flags & 0xFFFF) {
210 /* If we have a precise definitions of the instructions set, use it */
211 disasm_info.mach = flags & 0xFFFF;
212 } else {
213 #ifdef TARGET_PPC64
214 disasm_info.mach = bfd_mach_ppc64;
215 #else
216 disasm_info.mach = bfd_mach_ppc;
217 #endif
219 print_insn = print_insn_ppc;
220 #elif defined(TARGET_M68K)
221 print_insn = print_insn_m68k;
222 #elif defined(TARGET_MIPS)
223 #ifdef TARGET_WORDS_BIGENDIAN
224 print_insn = print_insn_big_mips;
225 #else
226 print_insn = print_insn_little_mips;
227 #endif
228 #elif defined(TARGET_SH4)
229 disasm_info.mach = bfd_mach_sh4;
230 print_insn = print_insn_sh;
231 #elif defined(TARGET_ALPHA)
232 disasm_info.mach = bfd_mach_alpha_ev6;
233 print_insn = print_insn_alpha;
234 #elif defined(TARGET_CRIS)
235 if (flags != 32) {
236 disasm_info.mach = bfd_mach_cris_v0_v10;
237 print_insn = print_insn_crisv10;
238 } else {
239 disasm_info.mach = bfd_mach_cris_v32;
240 print_insn = print_insn_crisv32;
242 #elif defined(TARGET_S390X)
243 disasm_info.mach = bfd_mach_s390_64;
244 print_insn = print_insn_s390;
245 #elif defined(TARGET_MICROBLAZE)
246 disasm_info.mach = bfd_arch_microblaze;
247 print_insn = print_insn_microblaze;
248 #elif defined(TARGET_LM32)
249 disasm_info.mach = bfd_mach_lm32;
250 print_insn = print_insn_lm32;
251 #else
252 fprintf(out, "0x" TARGET_FMT_lx
253 ": Asm output not supported on this arch\n", code);
254 return;
255 #endif
257 for (pc = code; size > 0; pc += count, size -= count) {
258 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
259 count = print_insn(pc, &disasm_info);
260 #if 0
262 int i;
263 uint8_t b;
264 fprintf(out, " {");
265 for(i = 0; i < count; i++) {
266 target_read_memory(pc + i, &b, 1, &disasm_info);
267 fprintf(out, " %02x", b);
269 fprintf(out, " }");
271 #endif
272 fprintf(out, "\n");
273 if (count < 0)
274 break;
275 if (size < count) {
276 fprintf(out,
277 "Disassembler disagrees with translator over instruction "
278 "decoding\n"
279 "Please report this to qemu-devel@nongnu.org\n");
280 break;
285 /* Disassemble this for me please... (debugging). */
286 void disas(FILE *out, void *code, unsigned long size)
288 uintptr_t pc;
289 int count;
290 struct disassemble_info disasm_info;
291 int (*print_insn)(bfd_vma pc, disassemble_info *info);
293 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
294 disasm_info.print_address_func = generic_print_host_address;
296 disasm_info.buffer = code;
297 disasm_info.buffer_vma = (uintptr_t)code;
298 disasm_info.buffer_length = size;
300 #ifdef HOST_WORDS_BIGENDIAN
301 disasm_info.endian = BFD_ENDIAN_BIG;
302 #else
303 disasm_info.endian = BFD_ENDIAN_LITTLE;
304 #endif
305 #if defined(CONFIG_TCG_INTERPRETER)
306 print_insn = print_insn_tci;
307 #elif defined(__i386__)
308 disasm_info.mach = bfd_mach_i386_i386;
309 print_insn = print_insn_i386;
310 #elif defined(__x86_64__)
311 disasm_info.mach = bfd_mach_x86_64;
312 print_insn = print_insn_i386;
313 #elif defined(_ARCH_PPC)
314 print_insn = print_insn_ppc;
315 #elif defined(__alpha__)
316 print_insn = print_insn_alpha;
317 #elif defined(__sparc__)
318 print_insn = print_insn_sparc;
319 disasm_info.mach = bfd_mach_sparc_v9b;
320 #elif defined(__arm__)
321 print_insn = print_insn_arm;
322 #elif defined(__MIPSEB__)
323 print_insn = print_insn_big_mips;
324 #elif defined(__MIPSEL__)
325 print_insn = print_insn_little_mips;
326 #elif defined(__m68k__)
327 print_insn = print_insn_m68k;
328 #elif defined(__s390__)
329 print_insn = print_insn_s390;
330 #elif defined(__hppa__)
331 print_insn = print_insn_hppa;
332 #elif defined(__ia64__)
333 print_insn = print_insn_ia64;
334 #else
335 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
336 (long) code);
337 return;
338 #endif
339 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
340 fprintf(out, "0x%08" PRIxPTR ": ", pc);
341 count = print_insn(pc, &disasm_info);
342 fprintf(out, "\n");
343 if (count < 0)
344 break;
348 /* Look up symbol for debugging purpose. Returns "" if unknown. */
349 const char *lookup_symbol(target_ulong orig_addr)
351 const char *symbol = "";
352 struct syminfo *s;
354 for (s = syminfos; s; s = s->next) {
355 symbol = s->lookup_symbol(s, orig_addr);
356 if (symbol[0] != '\0') {
357 break;
361 return symbol;
364 #if !defined(CONFIG_USER_ONLY)
366 #include "monitor.h"
368 static int monitor_disas_is_physical;
369 static CPUArchState *monitor_disas_env;
371 static int
372 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
373 struct disassemble_info *info)
375 if (monitor_disas_is_physical) {
376 cpu_physical_memory_read(memaddr, myaddr, length);
377 } else {
378 cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
380 return 0;
383 static int GCC_FMT_ATTR(2, 3)
384 monitor_fprintf(FILE *stream, const char *fmt, ...)
386 va_list ap;
387 va_start(ap, fmt);
388 monitor_vprintf((Monitor *)stream, fmt, ap);
389 va_end(ap);
390 return 0;
393 void monitor_disas(Monitor *mon, CPUArchState *env,
394 target_ulong pc, int nb_insn, int is_physical, int flags)
396 int count, i;
397 struct disassemble_info disasm_info;
398 int (*print_insn)(bfd_vma pc, disassemble_info *info);
400 INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);
402 monitor_disas_env = env;
403 monitor_disas_is_physical = is_physical;
404 disasm_info.read_memory_func = monitor_read_memory;
405 disasm_info.print_address_func = generic_print_target_address;
407 disasm_info.buffer_vma = pc;
409 #ifdef TARGET_WORDS_BIGENDIAN
410 disasm_info.endian = BFD_ENDIAN_BIG;
411 #else
412 disasm_info.endian = BFD_ENDIAN_LITTLE;
413 #endif
414 #if defined(TARGET_I386)
415 if (flags == 2)
416 disasm_info.mach = bfd_mach_x86_64;
417 else if (flags == 1)
418 disasm_info.mach = bfd_mach_i386_i8086;
419 else
420 disasm_info.mach = bfd_mach_i386_i386;
421 print_insn = print_insn_i386;
422 #elif defined(TARGET_ARM)
423 print_insn = print_insn_arm;
424 #elif defined(TARGET_ALPHA)
425 print_insn = print_insn_alpha;
426 #elif defined(TARGET_SPARC)
427 print_insn = print_insn_sparc;
428 #ifdef TARGET_SPARC64
429 disasm_info.mach = bfd_mach_sparc_v9b;
430 #endif
431 #elif defined(TARGET_PPC)
432 #ifdef TARGET_PPC64
433 disasm_info.mach = bfd_mach_ppc64;
434 #else
435 disasm_info.mach = bfd_mach_ppc;
436 #endif
437 print_insn = print_insn_ppc;
438 #elif defined(TARGET_M68K)
439 print_insn = print_insn_m68k;
440 #elif defined(TARGET_MIPS)
441 #ifdef TARGET_WORDS_BIGENDIAN
442 print_insn = print_insn_big_mips;
443 #else
444 print_insn = print_insn_little_mips;
445 #endif
446 #elif defined(TARGET_SH4)
447 disasm_info.mach = bfd_mach_sh4;
448 print_insn = print_insn_sh;
449 #elif defined(TARGET_S390X)
450 disasm_info.mach = bfd_mach_s390_64;
451 print_insn = print_insn_s390;
452 #elif defined(TARGET_LM32)
453 disasm_info.mach = bfd_mach_lm32;
454 print_insn = print_insn_lm32;
455 #else
456 monitor_printf(mon, "0x" TARGET_FMT_lx
457 ": Asm output not supported on this arch\n", pc);
458 return;
459 #endif
461 for(i = 0; i < nb_insn; i++) {
462 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
463 count = print_insn(pc, &disasm_info);
464 monitor_printf(mon, "\n");
465 if (count < 0)
466 break;
467 pc += count;
470 #endif