hw/pci_bridge_dev.c

   1 /*
   2  * Standard PCI Bridge Device
   3  *
   4  * Copyright (c) 2011 Red Hat Inc. Author: Michael S. Tsirkin <mst@redhat.com>
   5  *
   6  * http://www.pcisig.com/specifications/conventional/pci_to_pci_bridge_architecture/
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License along
  19  * with this program; if not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include "pci/pci_bridge.h"
  23 #include "pci/pci_ids.h"
  24 #include "pci/msi.h"
  25 #include "pci/shpc.h"
  26 #include "pci/slotid_cap.h"
  27 #include "exec/memory.h"
  28 #include "pci/pci_bus.h"
  29
  30 struct PCIBridgeDev {
  31     PCIBridge bridge;
  32     MemoryRegion bar;
  33     uint8_t chassis_nr;
  34 #define PCI_BRIDGE_DEV_F_MSI_REQ 0
  35     uint32_t flags;
  36 };
  37 typedef struct PCIBridgeDev PCIBridgeDev;
  38
  39 /* Mapping mandated by PCI-to-PCI Bridge architecture specification,
  40  * revision 1.2 */
  41 /* Table 9-1: Interrupt Binding for Devices Behind a Bridge */
  42 static int pci_bridge_dev_map_irq_fn(PCIDevice *dev, int irq_num)
  43 {
  44     return (irq_num + PCI_SLOT(dev->devfn)) % PCI_NUM_PINS;
  45 }
  46
  47 static int pci_bridge_dev_initfn(PCIDevice *dev)
  48 {
  49     PCIBridge *br = DO_UPCAST(PCIBridge, dev, dev);
  50     PCIBridgeDev *bridge_dev = DO_UPCAST(PCIBridgeDev, bridge, br);
  51     int err;
  52
  53     pci_bridge_map_irq(br, NULL, pci_bridge_dev_map_irq_fn);
  54     err = pci_bridge_initfn(dev);
  55     if (err) {
  56         goto bridge_error;
  57     }
  58     memory_region_init(&bridge_dev->bar, "shpc-bar", shpc_bar_size(dev));
  59     err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0);
  60     if (err) {
  61         goto shpc_error;
  62     }
  63     err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0);
  64     if (err) {
  65         goto slotid_error;
  66     }
  67     if ((bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_MSI_REQ)) &&
  68         msi_supported) {
  69         err = msi_init(dev, 0, 1, true, true);
  70         if (err < 0) {
  71             goto msi_error;
  72         }
  73     }
  74     /* TODO: spec recommends using 64 bit prefetcheable BAR.
  75      * Check whether that works well. */
  76     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
  77                      PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar);
  78     dev->config[PCI_INTERRUPT_PIN] = 0x1;
  79     return 0;
  80 msi_error:
  81     slotid_cap_cleanup(dev);
  82 slotid_error:
  83     shpc_cleanup(dev, &bridge_dev->bar);
  84 shpc_error:
  85     memory_region_destroy(&bridge_dev->bar);
  86     pci_bridge_exitfn(dev);
  87 bridge_error:
  88     return err;
  89 }
  90
  91 static void pci_bridge_dev_exitfn(PCIDevice *dev)
  92 {
  93     PCIBridge *br = DO_UPCAST(PCIBridge, dev, dev);
  94     PCIBridgeDev *bridge_dev = DO_UPCAST(PCIBridgeDev, bridge, br);
  95     if (msi_present(dev)) {
  96         msi_uninit(dev);
  97     }
  98     slotid_cap_cleanup(dev);
  99     shpc_cleanup(dev, &bridge_dev->bar);
 100     memory_region_destroy(&bridge_dev->bar);
 101     pci_bridge_exitfn(dev);
 102 }
 103
 104 static void pci_bridge_dev_write_config(PCIDevice *d,
 105                                         uint32_t address, uint32_t val, int len)
 106 {
 107     pci_bridge_write_config(d, address, val, len);
 108     if (msi_present(d)) {
 109         msi_write_config(d, address, val, len);
 110     }
 111     shpc_cap_write_config(d, address, val, len);
 112 }
 113
 114 static void qdev_pci_bridge_dev_reset(DeviceState *qdev)
 115 {
 116     PCIDevice *dev = DO_UPCAST(PCIDevice, qdev, qdev);
 117
 118     pci_bridge_reset(qdev);
 119     shpc_reset(dev);
 120 }
 121
 122 static Property pci_bridge_dev_properties[] = {
 123                     /* Note: 0 is not a legal chassis number. */
 124     DEFINE_PROP_UINT8("chassis_nr", PCIBridgeDev, chassis_nr, 0),
 125     DEFINE_PROP_BIT("msi", PCIBridgeDev, flags, PCI_BRIDGE_DEV_F_MSI_REQ, true),
 126     DEFINE_PROP_END_OF_LIST(),
 127 };
 128
 129 static const VMStateDescription pci_bridge_dev_vmstate = {
 130     .name = "pci_bridge",
 131     .fields = (VMStateField[]) {
 132         VMSTATE_PCI_DEVICE(bridge.dev, PCIBridgeDev),
 133         SHPC_VMSTATE(bridge.dev.shpc, PCIBridgeDev),
 134         VMSTATE_END_OF_LIST()
 135     }
 136 };
 137
 138 static void pci_bridge_dev_class_init(ObjectClass *klass, void *data)
 139 {
 140     DeviceClass *dc = DEVICE_CLASS(klass);
 141     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 142     k->init = pci_bridge_dev_initfn;
 143     k->exit = pci_bridge_dev_exitfn;
 144     k->config_write = pci_bridge_dev_write_config;
 145     k->vendor_id = PCI_VENDOR_ID_REDHAT;
 146     k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE;
 147     k->class_id = PCI_CLASS_BRIDGE_PCI;
 148     k->is_bridge = 1,
 149     dc->desc = "Standard PCI Bridge";
 150     dc->reset = qdev_pci_bridge_dev_reset;
 151     dc->props = pci_bridge_dev_properties;
 152     dc->vmsd = &pci_bridge_dev_vmstate;
 153 }
 154
 155 static const TypeInfo pci_bridge_dev_info = {
 156     .name = "pci-bridge",
 157     .parent        = TYPE_PCI_DEVICE,
 158     .instance_size = sizeof(PCIBridgeDev),
 159     .class_init = pci_bridge_dev_class_init,
 160 };
 161
 162 static void pci_bridge_dev_register(void)
 163 {
 164     type_register_static(&pci_bridge_dev_info);
 165 }
 166
 167 type_init(pci_bridge_dev_register);