linux-headers/asm-x86/kvm.h

   1 #ifndef _ASM_X86_KVM_H
   2 #define _ASM_X86_KVM_H
   3
   4 /*
   5  * KVM x86 specific structures and definitions
   6  *
   7  */
   8
   9 #include <linux/types.h>
  10 #include <linux/ioctl.h>
  11
  12 /* Select x86 specific features in <linux/kvm.h> */
  13 #define __KVM_HAVE_PIT
  14 #define __KVM_HAVE_IOAPIC
  15 #define __KVM_HAVE_IRQ_LINE
  16 #define __KVM_HAVE_DEVICE_ASSIGNMENT
  17 #define __KVM_HAVE_MSI
  18 #define __KVM_HAVE_USER_NMI
  19 #define __KVM_HAVE_GUEST_DEBUG
  20 #define __KVM_HAVE_MSIX
  21 #define __KVM_HAVE_MCE
  22 #define __KVM_HAVE_PIT_STATE2
  23 #define __KVM_HAVE_XEN_HVM
  24 #define __KVM_HAVE_VCPU_EVENTS
  25 #define __KVM_HAVE_DEBUGREGS
  26 #define __KVM_HAVE_XSAVE
  27 #define __KVM_HAVE_XCRS
  28
  29 /* Architectural interrupt line count. */
  30 #define KVM_NR_INTERRUPTS 256
  31
  32 struct kvm_memory_alias {
  33         __u32 slot;  /* this has a different namespace than memory slots */
  34         __u32 flags;
  35         __u64 guest_phys_addr;
  36         __u64 memory_size;
  37         __u64 target_phys_addr;
  38 };
  39
  40 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
  41 struct kvm_pic_state {
  42         __u8 last_irr;  /* edge detection */
  43         __u8 irr;               /* interrupt request register */
  44         __u8 imr;               /* interrupt mask register */
  45         __u8 isr;               /* interrupt service register */
  46         __u8 priority_add;      /* highest irq priority */
  47         __u8 irq_base;
  48         __u8 read_reg_select;
  49         __u8 poll;
  50         __u8 special_mask;
  51         __u8 init_state;
  52         __u8 auto_eoi;
  53         __u8 rotate_on_auto_eoi;
  54         __u8 special_fully_nested_mode;
  55         __u8 init4;             /* true if 4 byte init */
  56         __u8 elcr;              /* PIIX edge/trigger selection */
  57         __u8 elcr_mask;
  58 };
  59
  60 #define KVM_IOAPIC_NUM_PINS  24
  61 struct kvm_ioapic_state {
  62         __u64 base_address;
  63         __u32 ioregsel;
  64         __u32 id;
  65         __u32 irr;
  66         __u32 pad;
  67         union {
  68                 __u64 bits;
  69                 struct {
  70                         __u8 vector;
  71                         __u8 delivery_mode:3;
  72                         __u8 dest_mode:1;
  73                         __u8 delivery_status:1;
  74                         __u8 polarity:1;
  75                         __u8 remote_irr:1;
  76                         __u8 trig_mode:1;
  77                         __u8 mask:1;
  78                         __u8 reserve:7;
  79                         __u8 reserved[4];
  80                         __u8 dest_id;
  81                 } fields;
  82         } redirtbl[KVM_IOAPIC_NUM_PINS];
  83 };
  84
  85 #define KVM_IRQCHIP_PIC_MASTER   0
  86 #define KVM_IRQCHIP_PIC_SLAVE    1
  87 #define KVM_IRQCHIP_IOAPIC       2
  88 #define KVM_NR_IRQCHIPS          3
  89
  90 /* for KVM_GET_REGS and KVM_SET_REGS */
  91 struct kvm_regs {
  92         /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
  93         __u64 rax, rbx, rcx, rdx;
  94         __u64 rsi, rdi, rsp, rbp;
  95         __u64 r8,  r9,  r10, r11;
  96         __u64 r12, r13, r14, r15;
  97         __u64 rip, rflags;
  98 };
  99
 100 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
 101 #define KVM_APIC_REG_SIZE 0x400
 102 struct kvm_lapic_state {
 103         char regs[KVM_APIC_REG_SIZE];
 104 };
 105
 106 struct kvm_segment {
 107         __u64 base;
 108         __u32 limit;
 109         __u16 selector;
 110         __u8  type;
 111         __u8  present, dpl, db, s, l, g, avl;
 112         __u8  unusable;
 113         __u8  padding;
 114 };
 115
 116 struct kvm_dtable {
 117         __u64 base;
 118         __u16 limit;
 119         __u16 padding[3];
 120 };
 121
 122
 123 /* for KVM_GET_SREGS and KVM_SET_SREGS */
 124 struct kvm_sregs {
 125         /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
 126         struct kvm_segment cs, ds, es, fs, gs, ss;
 127         struct kvm_segment tr, ldt;
 128         struct kvm_dtable gdt, idt;
 129         __u64 cr0, cr2, cr3, cr4, cr8;
 130         __u64 efer;
 131         __u64 apic_base;
 132         __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
 133 };
 134
 135 /* for KVM_GET_FPU and KVM_SET_FPU */
 136 struct kvm_fpu {
 137         __u8  fpr[8][16];
 138         __u16 fcw;
 139         __u16 fsw;
 140         __u8  ftwx;  /* in fxsave format */
 141         __u8  pad1;
 142         __u16 last_opcode;
 143         __u64 last_ip;
 144         __u64 last_dp;
 145         __u8  xmm[16][16];
 146         __u32 mxcsr;
 147         __u32 pad2;
 148 };
 149
 150 struct kvm_msr_entry {
 151         __u32 index;
 152         __u32 reserved;
 153         __u64 data;
 154 };
 155
 156 /* for KVM_GET_MSRS and KVM_SET_MSRS */
 157 struct kvm_msrs {
 158         __u32 nmsrs; /* number of msrs in entries */
 159         __u32 pad;
 160
 161         struct kvm_msr_entry entries[0];
 162 };
 163
 164 /* for KVM_GET_MSR_INDEX_LIST */
 165 struct kvm_msr_list {
 166         __u32 nmsrs; /* number of msrs in entries */
 167         __u32 indices[0];
 168 };
 169
 170
 171 struct kvm_cpuid_entry {
 172         __u32 function;
 173         __u32 eax;
 174         __u32 ebx;
 175         __u32 ecx;
 176         __u32 edx;
 177         __u32 padding;
 178 };
 179
 180 /* for KVM_SET_CPUID */
 181 struct kvm_cpuid {
 182         __u32 nent;
 183         __u32 padding;
 184         struct kvm_cpuid_entry entries[0];
 185 };
 186
 187 struct kvm_cpuid_entry2 {
 188         __u32 function;
 189         __u32 index;
 190         __u32 flags;
 191         __u32 eax;
 192         __u32 ebx;
 193         __u32 ecx;
 194         __u32 edx;
 195         __u32 padding[3];
 196 };
 197
 198 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1
 199 #define KVM_CPUID_FLAG_STATEFUL_FUNC    2
 200 #define KVM_CPUID_FLAG_STATE_READ_NEXT  4
 201
 202 /* for KVM_SET_CPUID2 */
 203 struct kvm_cpuid2 {
 204         __u32 nent;
 205         __u32 padding;
 206         struct kvm_cpuid_entry2 entries[0];
 207 };
 208
 209 /* for KVM_GET_PIT and KVM_SET_PIT */
 210 struct kvm_pit_channel_state {
 211         __u32 count; /* can be 65536 */
 212         __u16 latched_count;
 213         __u8 count_latched;
 214         __u8 status_latched;
 215         __u8 status;
 216         __u8 read_state;
 217         __u8 write_state;
 218         __u8 write_latch;
 219         __u8 rw_mode;
 220         __u8 mode;
 221         __u8 bcd;
 222         __u8 gate;
 223         __s64 count_load_time;
 224 };
 225
 226 struct kvm_debug_exit_arch {
 227         __u32 exception;
 228         __u32 pad;
 229         __u64 pc;
 230         __u64 dr6;
 231         __u64 dr7;
 232 };
 233
 234 #define KVM_GUESTDBG_USE_SW_BP          0x00010000
 235 #define KVM_GUESTDBG_USE_HW_BP          0x00020000
 236 #define KVM_GUESTDBG_INJECT_DB          0x00040000
 237 #define KVM_GUESTDBG_INJECT_BP          0x00080000
 238
 239 /* for KVM_SET_GUEST_DEBUG */
 240 struct kvm_guest_debug_arch {
 241         __u64 debugreg[8];
 242 };
 243
 244 struct kvm_pit_state {
 245         struct kvm_pit_channel_state channels[3];
 246 };
 247
 248 #define KVM_PIT_FLAGS_HPET_LEGACY  0x00000001
 249
 250 struct kvm_pit_state2 {
 251         struct kvm_pit_channel_state channels[3];
 252         __u32 flags;
 253         __u32 reserved[9];
 254 };
 255
 256 struct kvm_reinject_control {
 257         __u8 pit_reinject;
 258         __u8 reserved[31];
 259 };
 260
 261 /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
 262 #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001
 263 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002
 264 #define KVM_VCPUEVENT_VALID_SHADOW      0x00000004
 265
 266 /* Interrupt shadow states */
 267 #define KVM_X86_SHADOW_INT_MOV_SS       0x01
 268 #define KVM_X86_SHADOW_INT_STI          0x02
 269
 270 /* for KVM_GET/SET_VCPU_EVENTS */
 271 struct kvm_vcpu_events {
 272         struct {
 273                 __u8 injected;
 274                 __u8 nr;
 275                 __u8 has_error_code;
 276                 __u8 pad;
 277                 __u32 error_code;
 278         } exception;
 279         struct {
 280                 __u8 injected;
 281                 __u8 nr;
 282                 __u8 soft;
 283                 __u8 shadow;
 284         } interrupt;
 285         struct {
 286                 __u8 injected;
 287                 __u8 pending;
 288                 __u8 masked;
 289                 __u8 pad;
 290         } nmi;
 291         __u32 sipi_vector;
 292         __u32 flags;
 293         __u32 reserved[10];
 294 };
 295
 296 /* for KVM_GET/SET_DEBUGREGS */
 297 struct kvm_debugregs {
 298         __u64 db[4];
 299         __u64 dr6;
 300         __u64 dr7;
 301         __u64 flags;
 302         __u64 reserved[9];
 303 };
 304
 305 /* for KVM_CAP_XSAVE */
 306 struct kvm_xsave {
 307         __u32 region[1024];
 308 };
 309
 310 #define KVM_MAX_XCRS    16
 311
 312 struct kvm_xcr {
 313         __u32 xcr;
 314         __u32 reserved;
 315         __u64 value;
 316 };
 317
 318 struct kvm_xcrs {
 319         __u32 nr_xcrs;
 320         __u32 flags;
 321         struct kvm_xcr xcrs[KVM_MAX_XCRS];
 322         __u64 padding[16];
 323 };
 324
 325 /* definition of registers in kvm_run */
 326 struct kvm_sync_regs {
 327 };
 328
 329 #endif /* _ASM_X86_KVM_H */