Makefile: Forbid out-of-tree build from a source tree that has been built in
[qemu/pbrook.git] / target-arm / op_helper.c
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1 /*
2 * ARM helper routines
4 * Copyright (c) 2005-2007 CodeSourcery, LLC
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "cpu.h"
20 #include "helper.h"
22 #define SIGNBIT (uint32_t)0x80000000
23 #define SIGNBIT64 ((uint64_t)1 << 63)
25 static void raise_exception(CPUARMState *env, int tt)
27 env->exception_index = tt;
28 cpu_loop_exit(env);
31 uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg, uint32_t def,
32 uint32_t rn, uint32_t maxindex)
34 uint32_t val;
35 uint32_t tmp;
36 int index;
37 int shift;
38 uint64_t *table;
39 table = (uint64_t *)&env->vfp.regs[rn];
40 val = 0;
41 for (shift = 0; shift < 32; shift += 8) {
42 index = (ireg >> shift) & 0xff;
43 if (index < maxindex) {
44 tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff;
45 val |= tmp << shift;
46 } else {
47 val |= def & (0xff << shift);
50 return val;
53 #if !defined(CONFIG_USER_ONLY)
55 #include "softmmu_exec.h"
57 #define MMUSUFFIX _mmu
59 #define SHIFT 0
60 #include "softmmu_template.h"
62 #define SHIFT 1
63 #include "softmmu_template.h"
65 #define SHIFT 2
66 #include "softmmu_template.h"
68 #define SHIFT 3
69 #include "softmmu_template.h"
71 /* try to fill the TLB and return an exception if error. If retaddr is
72 NULL, it means that the function was called in C code (i.e. not
73 from generated code or from helper.c) */
74 void tlb_fill(CPUARMState *env, target_ulong addr, int is_write, int mmu_idx,
75 uintptr_t retaddr)
77 TranslationBlock *tb;
78 int ret;
80 ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx);
81 if (unlikely(ret)) {
82 if (retaddr) {
83 /* now we have a real cpu fault */
84 tb = tb_find_pc(retaddr);
85 if (tb) {
86 /* the PC is inside the translated code. It means that we have
87 a virtual CPU fault */
88 cpu_restore_state(tb, env, retaddr);
91 raise_exception(env, env->exception_index);
94 #endif
96 uint32_t HELPER(add_setq)(CPUARMState *env, uint32_t a, uint32_t b)
98 uint32_t res = a + b;
99 if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT))
100 env->QF = 1;
101 return res;
104 uint32_t HELPER(add_saturate)(CPUARMState *env, uint32_t a, uint32_t b)
106 uint32_t res = a + b;
107 if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT)) {
108 env->QF = 1;
109 res = ~(((int32_t)a >> 31) ^ SIGNBIT);
111 return res;
114 uint32_t HELPER(sub_saturate)(CPUARMState *env, uint32_t a, uint32_t b)
116 uint32_t res = a - b;
117 if (((res ^ a) & SIGNBIT) && ((a ^ b) & SIGNBIT)) {
118 env->QF = 1;
119 res = ~(((int32_t)a >> 31) ^ SIGNBIT);
121 return res;
124 uint32_t HELPER(double_saturate)(CPUARMState *env, int32_t val)
126 uint32_t res;
127 if (val >= 0x40000000) {
128 res = ~SIGNBIT;
129 env->QF = 1;
130 } else if (val <= (int32_t)0xc0000000) {
131 res = SIGNBIT;
132 env->QF = 1;
133 } else {
134 res = val << 1;
136 return res;
139 uint32_t HELPER(add_usaturate)(CPUARMState *env, uint32_t a, uint32_t b)
141 uint32_t res = a + b;
142 if (res < a) {
143 env->QF = 1;
144 res = ~0;
146 return res;
149 uint32_t HELPER(sub_usaturate)(CPUARMState *env, uint32_t a, uint32_t b)
151 uint32_t res = a - b;
152 if (res > a) {
153 env->QF = 1;
154 res = 0;
156 return res;
159 /* Signed saturation. */
160 static inline uint32_t do_ssat(CPUARMState *env, int32_t val, int shift)
162 int32_t top;
163 uint32_t mask;
165 top = val >> shift;
166 mask = (1u << shift) - 1;
167 if (top > 0) {
168 env->QF = 1;
169 return mask;
170 } else if (top < -1) {
171 env->QF = 1;
172 return ~mask;
174 return val;
177 /* Unsigned saturation. */
178 static inline uint32_t do_usat(CPUARMState *env, int32_t val, int shift)
180 uint32_t max;
182 max = (1u << shift) - 1;
183 if (val < 0) {
184 env->QF = 1;
185 return 0;
186 } else if (val > max) {
187 env->QF = 1;
188 return max;
190 return val;
193 /* Signed saturate. */
194 uint32_t HELPER(ssat)(CPUARMState *env, uint32_t x, uint32_t shift)
196 return do_ssat(env, x, shift);
199 /* Dual halfword signed saturate. */
200 uint32_t HELPER(ssat16)(CPUARMState *env, uint32_t x, uint32_t shift)
202 uint32_t res;
204 res = (uint16_t)do_ssat(env, (int16_t)x, shift);
205 res |= do_ssat(env, ((int32_t)x) >> 16, shift) << 16;
206 return res;
209 /* Unsigned saturate. */
210 uint32_t HELPER(usat)(CPUARMState *env, uint32_t x, uint32_t shift)
212 return do_usat(env, x, shift);
215 /* Dual halfword unsigned saturate. */
216 uint32_t HELPER(usat16)(CPUARMState *env, uint32_t x, uint32_t shift)
218 uint32_t res;
220 res = (uint16_t)do_usat(env, (int16_t)x, shift);
221 res |= do_usat(env, ((int32_t)x) >> 16, shift) << 16;
222 return res;
225 void HELPER(wfi)(CPUARMState *env)
227 env->exception_index = EXCP_HLT;
228 env->halted = 1;
229 cpu_loop_exit(env);
232 void HELPER(exception)(CPUARMState *env, uint32_t excp)
234 env->exception_index = excp;
235 cpu_loop_exit(env);
238 uint32_t HELPER(cpsr_read)(CPUARMState *env)
240 return cpsr_read(env) & ~CPSR_EXEC;
243 void HELPER(cpsr_write)(CPUARMState *env, uint32_t val, uint32_t mask)
245 cpsr_write(env, val, mask);
248 /* Access to user mode registers from privileged modes. */
249 uint32_t HELPER(get_user_reg)(CPUARMState *env, uint32_t regno)
251 uint32_t val;
253 if (regno == 13) {
254 val = env->banked_r13[0];
255 } else if (regno == 14) {
256 val = env->banked_r14[0];
257 } else if (regno >= 8
258 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
259 val = env->usr_regs[regno - 8];
260 } else {
261 val = env->regs[regno];
263 return val;
266 void HELPER(set_user_reg)(CPUARMState *env, uint32_t regno, uint32_t val)
268 if (regno == 13) {
269 env->banked_r13[0] = val;
270 } else if (regno == 14) {
271 env->banked_r14[0] = val;
272 } else if (regno >= 8
273 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
274 env->usr_regs[regno - 8] = val;
275 } else {
276 env->regs[regno] = val;
280 void HELPER(set_cp_reg)(CPUARMState *env, void *rip, uint32_t value)
282 const ARMCPRegInfo *ri = rip;
283 int excp = ri->writefn(env, ri, value);
284 if (excp) {
285 raise_exception(env, excp);
289 uint32_t HELPER(get_cp_reg)(CPUARMState *env, void *rip)
291 const ARMCPRegInfo *ri = rip;
292 uint64_t value;
293 int excp = ri->readfn(env, ri, &value);
294 if (excp) {
295 raise_exception(env, excp);
297 return value;
300 void HELPER(set_cp_reg64)(CPUARMState *env, void *rip, uint64_t value)
302 const ARMCPRegInfo *ri = rip;
303 int excp = ri->writefn(env, ri, value);
304 if (excp) {
305 raise_exception(env, excp);
309 uint64_t HELPER(get_cp_reg64)(CPUARMState *env, void *rip)
311 const ARMCPRegInfo *ri = rip;
312 uint64_t value;
313 int excp = ri->readfn(env, ri, &value);
314 if (excp) {
315 raise_exception(env, excp);
317 return value;
320 /* ??? Flag setting arithmetic is awkward because we need to do comparisons.
321 The only way to do that in TCG is a conditional branch, which clobbers
322 all our temporaries. For now implement these as helper functions. */
324 uint32_t HELPER(adc_cc)(CPUARMState *env, uint32_t a, uint32_t b)
326 uint32_t result;
327 if (!env->CF) {
328 result = a + b;
329 env->CF = result < a;
330 } else {
331 result = a + b + 1;
332 env->CF = result <= a;
334 env->VF = (a ^ b ^ -1) & (a ^ result);
335 env->NF = env->ZF = result;
336 return result;
339 uint32_t HELPER(sbc_cc)(CPUARMState *env, uint32_t a, uint32_t b)
341 uint32_t result;
342 if (!env->CF) {
343 result = a - b - 1;
344 env->CF = a > b;
345 } else {
346 result = a - b;
347 env->CF = a >= b;
349 env->VF = (a ^ b) & (a ^ result);
350 env->NF = env->ZF = result;
351 return result;
354 /* Similarly for variable shift instructions. */
356 uint32_t HELPER(shl_cc)(CPUARMState *env, uint32_t x, uint32_t i)
358 int shift = i & 0xff;
359 if (shift >= 32) {
360 if (shift == 32)
361 env->CF = x & 1;
362 else
363 env->CF = 0;
364 return 0;
365 } else if (shift != 0) {
366 env->CF = (x >> (32 - shift)) & 1;
367 return x << shift;
369 return x;
372 uint32_t HELPER(shr_cc)(CPUARMState *env, uint32_t x, uint32_t i)
374 int shift = i & 0xff;
375 if (shift >= 32) {
376 if (shift == 32)
377 env->CF = (x >> 31) & 1;
378 else
379 env->CF = 0;
380 return 0;
381 } else if (shift != 0) {
382 env->CF = (x >> (shift - 1)) & 1;
383 return x >> shift;
385 return x;
388 uint32_t HELPER(sar_cc)(CPUARMState *env, uint32_t x, uint32_t i)
390 int shift = i & 0xff;
391 if (shift >= 32) {
392 env->CF = (x >> 31) & 1;
393 return (int32_t)x >> 31;
394 } else if (shift != 0) {
395 env->CF = (x >> (shift - 1)) & 1;
396 return (int32_t)x >> shift;
398 return x;
401 uint32_t HELPER(ror_cc)(CPUARMState *env, uint32_t x, uint32_t i)
403 int shift1, shift;
404 shift1 = i & 0xff;
405 shift = shift1 & 0x1f;
406 if (shift == 0) {
407 if (shift1 != 0)
408 env->CF = (x >> 31) & 1;
409 return x;
410 } else {
411 env->CF = (x >> (shift - 1)) & 1;
412 return ((uint32_t)x >> shift) | (x << (32 - shift));