hw/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "hw.h"
  11 #include "mips.h"
  12 #include "mips_cpudevs.h"
  13 #include "pc.h"
  14 #include "isa.h"
  15 #include "net.h"
  16 #include "sysemu.h"
  17 #include "boards.h"
  18 #include "flash.h"
  19 #include "qemu-log.h"
  20 #include "mips-bios.h"
  21 #include "ide.h"
  22 #include "loader.h"
  23 #include "elf.h"
  24 #include "mc146818rtc.h"
  25 #include "blockdev.h"
  26 #include "exec-memory.h"
  27
  28 #define MAX_IDE_BUS 2
  29
  30 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  31 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  32 static const int ide_irq[2] = { 14, 15 };
  33
  34 static ISADevice *pit; /* PIT i8254 */
  35
  36 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  37
  38 static struct _loaderparams {
  39     int ram_size;
  40     const char *kernel_filename;
  41     const char *kernel_cmdline;
  42     const char *initrd_filename;
  43 } loaderparams;
  44
  45 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
  46                               uint32_t val)
  47 {
  48     if ((addr & 0xffff) == 0 && val == 42)
  49         qemu_system_reset_request ();
  50     else if ((addr & 0xffff) == 4 && val == 42)
  51         qemu_system_shutdown_request ();
  52 }
  53
  54 static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
  55 {
  56     return 0;
  57 }
  58
  59 static CPUWriteMemoryFunc * const mips_qemu_write[] = {
  60     &mips_qemu_writel,
  61     &mips_qemu_writel,
  62     &mips_qemu_writel,
  63 };
  64
  65 static CPUReadMemoryFunc * const mips_qemu_read[] = {
  66     &mips_qemu_readl,
  67     &mips_qemu_readl,
  68     &mips_qemu_readl,
  69 };
  70
  71 static int mips_qemu_iomemtype = 0;
  72
  73 typedef struct ResetData {
  74     CPUState *env;
  75     uint64_t vector;
  76 } ResetData;
  77
  78 static int64_t load_kernel(void)
  79 {
  80     int64_t entry, kernel_high;
  81     long kernel_size, initrd_size, params_size;
  82     ram_addr_t initrd_offset;
  83     uint32_t *params_buf;
  84     int big_endian;
  85
  86 #ifdef TARGET_WORDS_BIGENDIAN
  87     big_endian = 1;
  88 #else
  89     big_endian = 0;
  90 #endif
  91     kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
  92                            NULL, (uint64_t *)&entry, NULL,
  93                            (uint64_t *)&kernel_high, big_endian,
  94                            ELF_MACHINE, 1);
  95     if (kernel_size >= 0) {
  96         if ((entry & ~0x7fffffffULL) == 0x80000000)
  97             entry = (int32_t)entry;
  98     } else {
  99         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 100                 loaderparams.kernel_filename);
 101         exit(1);
 102     }
 103
 104     /* load initrd */
 105     initrd_size = 0;
 106     initrd_offset = 0;
 107     if (loaderparams.initrd_filename) {
 108         initrd_size = get_image_size (loaderparams.initrd_filename);
 109         if (initrd_size > 0) {
 110             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
 111             if (initrd_offset + initrd_size > ram_size) {
 112                 fprintf(stderr,
 113                         "qemu: memory too small for initial ram disk '%s'\n",
 114                         loaderparams.initrd_filename);
 115                 exit(1);
 116             }
 117             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 118                                               initrd_offset,
 119                                               ram_size - initrd_offset);
 120         }
 121         if (initrd_size == (target_ulong) -1) {
 122             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 123                     loaderparams.initrd_filename);
 124             exit(1);
 125         }
 126     }
 127
 128     /* Store command line.  */
 129     params_size = 264;
 130     params_buf = g_malloc(params_size);
 131
 132     params_buf[0] = tswap32(ram_size);
 133     params_buf[1] = tswap32(0x12345678);
 134
 135     if (initrd_size > 0) {
 136         snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s",
 137                  cpu_mips_phys_to_kseg0(NULL, initrd_offset),
 138                  initrd_size, loaderparams.kernel_cmdline);
 139     } else {
 140         snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
 141     }
 142
 143     rom_add_blob_fixed("params", params_buf, params_size,
 144                        (16 << 20) - 264);
 145
 146     return entry;
 147 }
 148
 149 static void main_cpu_reset(void *opaque)
 150 {
 151     ResetData *s = (ResetData *)opaque;
 152     CPUState *env = s->env;
 153
 154     cpu_reset(env);
 155     env->active_tc.PC = s->vector;
 156 }
 157
 158 static const int sector_len = 32 * 1024;
 159 static
 160 void mips_r4k_init (ram_addr_t ram_size,
 161                     const char *boot_device,
 162                     const char *kernel_filename, const char *kernel_cmdline,
 163                     const char *initrd_filename, const char *cpu_model)
 164 {
 165     char *filename;
 166     ram_addr_t ram_offset;
 167     MemoryRegion *address_space_mem = get_system_memory();
 168     MemoryRegion *bios = g_new(MemoryRegion, 1);
 169     int bios_size;
 170     CPUState *env;
 171     ResetData *reset_info;
 172     int i;
 173     qemu_irq *i8259;
 174     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 175     DriveInfo *dinfo;
 176     int be;
 177
 178     /* init CPUs */
 179     if (cpu_model == NULL) {
 180 #ifdef TARGET_MIPS64
 181         cpu_model = "R4000";
 182 #else
 183         cpu_model = "24Kf";
 184 #endif
 185     }
 186     env = cpu_init(cpu_model);
 187     if (!env) {
 188         fprintf(stderr, "Unable to find CPU definition\n");
 189         exit(1);
 190     }
 191     reset_info = g_malloc0(sizeof(ResetData));
 192     reset_info->env = env;
 193     reset_info->vector = env->active_tc.PC;
 194     qemu_register_reset(main_cpu_reset, reset_info);
 195
 196     /* allocate RAM */
 197     if (ram_size > (256 << 20)) {
 198         fprintf(stderr,
 199                 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
 200                 ((unsigned int)ram_size / (1 << 20)));
 201         exit(1);
 202     }
 203     ram_offset = qemu_ram_alloc(NULL, "mips_r4k.ram", ram_size);
 204
 205     cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
 206
 207     if (!mips_qemu_iomemtype) {
 208         mips_qemu_iomemtype = cpu_register_io_memory(mips_qemu_read,
 209                                                      mips_qemu_write, NULL,
 210                                                      DEVICE_NATIVE_ENDIAN);
 211     }
 212     cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
 213
 214     /* Try to load a BIOS image. If this fails, we continue regardless,
 215        but initialize the hardware ourselves. When a kernel gets
 216        preloaded we also initialize the hardware, since the BIOS wasn't
 217        run. */
 218     if (bios_name == NULL)
 219         bios_name = BIOS_FILENAME;
 220     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 221     if (filename) {
 222         bios_size = get_image_size(filename);
 223     } else {
 224         bios_size = -1;
 225     }
 226 #ifdef TARGET_WORDS_BIGENDIAN
 227     be = 1;
 228 #else
 229     be = 0;
 230 #endif
 231     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 232         memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE);
 233         memory_region_set_readonly(bios, true);
 234         memory_region_add_subregion(address_space_mem, 0x1fc00000, bios);
 235         load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 236     } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
 237         uint32_t mips_rom = 0x00400000;
 238         memory_region_init_rom_device(bios,
 239                                       (be ? &pflash_cfi01_ops_be
 240                                           : &pflash_cfi01_ops_le),
 241                                       NULL, "mips_r4k.bios", mips_rom);
 242         if (!pflash_cfi01_register(0x1fc00000, bios,
 243                                    dinfo->bdrv, sector_len,
 244                                    mips_rom / sector_len,
 245                                    4, 0, 0, 0, 0)) {
 246             fprintf(stderr, "qemu: Error registering flash memory.\n");
 247         }
 248     }
 249     else {
 250         /* not fatal */
 251         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 252                 bios_name);
 253     }
 254     if (filename) {
 255         g_free(filename);
 256     }
 257
 258     if (kernel_filename) {
 259         loaderparams.ram_size = ram_size;
 260         loaderparams.kernel_filename = kernel_filename;
 261         loaderparams.kernel_cmdline = kernel_cmdline;
 262         loaderparams.initrd_filename = initrd_filename;
 263         reset_info->vector = load_kernel();
 264     }
 265
 266     /* Init CPU internal devices */
 267     cpu_mips_irq_init_cpu(env);
 268     cpu_mips_clock_init(env);
 269
 270     /* The PIC is attached to the MIPS CPU INT0 pin */
 271     i8259 = i8259_init(env->irq[2]);
 272     isa_bus_new(NULL);
 273     isa_bus_irqs(i8259);
 274
 275     rtc_init(2000, NULL);
 276
 277     /* Register 64 KB of ISA IO space at 0x14000000 */
 278     isa_mmio_init(0x14000000, 0x00010000);
 279     isa_mem_base = 0x10000000;
 280
 281     pit = pit_init(0x40, 0);
 282
 283     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 284         if (serial_hds[i]) {
 285             serial_isa_init(i, serial_hds[i]);
 286         }
 287     }
 288
 289     isa_vga_init();
 290
 291     if (nd_table[0].vlan)
 292         isa_ne2000_init(0x300, 9, &nd_table[0]);
 293
 294     ide_drive_get(hd, MAX_IDE_BUS);
 295     for(i = 0; i < MAX_IDE_BUS; i++)
 296         isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 297                      hd[MAX_IDE_DEVS * i],
 298                      hd[MAX_IDE_DEVS * i + 1]);
 299
 300     isa_create_simple("i8042");
 301 }
 302
 303 static QEMUMachine mips_machine = {
 304     .name = "mips",
 305     .desc = "mips r4k platform",
 306     .init = mips_r4k_init,
 307 };
 308
 309 static void mips_machine_init(void)
 310 {
 311     qemu_register_machine(&mips_machine);
 312 }
 313
 314 machine_init(mips_machine_init);