s390x: Add vector registers to HMP output
[qemu/qmp-unstable.git] / target-moxie / cpu.h
blobc2733a23d0849369edc2862c363160958de665da
1 /*
2 * Moxie emulation
4 * Copyright (c) 2008, 2010, 2013 Anthony Green
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #ifndef _CPU_MOXIE_H
20 #define _CPU_MOXIE_H
22 #include "config.h"
23 #include "qemu-common.h"
25 #define TARGET_LONG_BITS 32
27 #define CPUArchState struct CPUMoxieState
29 #define ELF_MACHINE 0xFEED /* EM_MOXIE */
31 #define MOXIE_EX_DIV0 0
32 #define MOXIE_EX_BAD 1
33 #define MOXIE_EX_IRQ 2
34 #define MOXIE_EX_SWI 3
35 #define MOXIE_EX_MMU_MISS 4
36 #define MOXIE_EX_BREAK 16
38 #include "exec/cpu-defs.h"
39 #include "fpu/softfloat.h"
41 #define TARGET_PAGE_BITS 12 /* 4k */
43 #define TARGET_PHYS_ADDR_SPACE_BITS 32
44 #define TARGET_VIRT_ADDR_SPACE_BITS 32
46 #define NB_MMU_MODES 1
48 typedef struct CPUMoxieState {
50 uint32_t flags; /* general execution flags */
51 uint32_t gregs[16]; /* general registers */
52 uint32_t sregs[256]; /* special registers */
53 uint32_t pc; /* program counter */
54 /* Instead of saving the cc value, we save the cmp arguments
55 and compute cc on demand. */
56 uint32_t cc_a; /* reg a for condition code calculation */
57 uint32_t cc_b; /* reg b for condition code calculation */
59 void *irq[8];
61 CPU_COMMON
63 } CPUMoxieState;
65 #include "qom/cpu.h"
67 #define TYPE_MOXIE_CPU "moxie-cpu"
69 #define MOXIE_CPU_CLASS(klass) \
70 OBJECT_CLASS_CHECK(MoxieCPUClass, (klass), TYPE_MOXIE_CPU)
71 #define MOXIE_CPU(obj) \
72 OBJECT_CHECK(MoxieCPU, (obj), TYPE_MOXIE_CPU)
73 #define MOXIE_CPU_GET_CLASS(obj) \
74 OBJECT_GET_CLASS(MoxieCPUClass, (obj), TYPE_MOXIE_CPU)
76 /**
77 * MoxieCPUClass:
78 * @parent_reset: The parent class' reset handler.
80 * A Moxie CPU model.
82 typedef struct MoxieCPUClass {
83 /*< private >*/
84 CPUClass parent_class;
85 /*< public >*/
87 DeviceRealize parent_realize;
88 void (*parent_reset)(CPUState *cpu);
89 } MoxieCPUClass;
91 /**
92 * MoxieCPU:
93 * @env: #CPUMoxieState
95 * A Moxie CPU.
97 typedef struct MoxieCPU {
98 /*< private >*/
99 CPUState parent_obj;
100 /*< public >*/
102 CPUMoxieState env;
103 } MoxieCPU;
105 static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState *env)
107 return container_of(env, MoxieCPU, env);
110 #define ENV_GET_CPU(e) CPU(moxie_env_get_cpu(e))
112 #define ENV_OFFSET offsetof(MoxieCPU, env)
114 MoxieCPU *cpu_moxie_init(const char *cpu_model);
115 int cpu_moxie_exec(CPUMoxieState *s);
116 void moxie_cpu_do_interrupt(CPUState *cs);
117 void moxie_cpu_dump_state(CPUState *cpu, FILE *f,
118 fprintf_function cpu_fprintf, int flags);
119 hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
120 void moxie_translate_init(void);
121 int cpu_moxie_signal_handler(int host_signum, void *pinfo,
122 void *puc);
124 #define cpu_init(cpu_model) CPU(cpu_moxie_init(cpu_model))
126 #define cpu_exec cpu_moxie_exec
127 #define cpu_gen_code cpu_moxie_gen_code
128 #define cpu_signal_handler cpu_moxie_signal_handler
130 static inline int cpu_mmu_index(CPUMoxieState *env)
132 return 0;
135 #include "exec/cpu-all.h"
136 #include "exec/exec-all.h"
138 static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
139 target_ulong *cs_base, int *flags)
141 *pc = env->pc;
142 *cs_base = 0;
143 *flags = 0;
146 int moxie_cpu_handle_mmu_fault(CPUState *cpu, vaddr address,
147 int rw, int mmu_idx);
149 #endif /* _CPU_MOXIE_H */