2 * Channel subsystem base support.
4 * Copyright 2012 IBM Corp.
5 * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
7 * This work is licensed under the terms of the GNU GPL, version 2 or (at
8 * your option) any later version. See the COPYING file in the top-level
13 #include "qemu/bitops.h"
19 typedef struct CrwContainer
{
21 QTAILQ_ENTRY(CrwContainer
) sibling
;
24 typedef struct ChpInfo
{
30 typedef struct SubchSet
{
31 SubchDev
*sch
[MAX_SCHID
+ 1];
32 unsigned long schids_used
[BITS_TO_LONGS(MAX_SCHID
+ 1)];
33 unsigned long devnos_used
[BITS_TO_LONGS(MAX_SCHID
+ 1)];
36 typedef struct CssImage
{
37 SubchSet
*sch_set
[MAX_SSID
+ 1];
38 ChpInfo chpids
[MAX_CHPID
+ 1];
41 typedef struct ChannelSubSys
{
42 QTAILQ_HEAD(, CrwContainer
) pending_crws
;
49 CssImage
*css
[MAX_CSSID
+ 1];
50 uint8_t default_cssid
;
53 static ChannelSubSys
*channel_subsys
;
55 int css_create_css_image(uint8_t cssid
, bool default_image
)
57 trace_css_new_image(cssid
, default_image
? "(default)" : "");
58 if (cssid
> MAX_CSSID
) {
61 if (channel_subsys
->css
[cssid
]) {
64 channel_subsys
->css
[cssid
] = g_malloc0(sizeof(CssImage
));
66 channel_subsys
->default_cssid
= cssid
;
71 static uint16_t css_build_subchannel_id(SubchDev
*sch
)
73 if (channel_subsys
->max_cssid
> 0) {
74 return (sch
->cssid
<< 8) | (1 << 3) | (sch
->ssid
<< 1) | 1;
76 return (sch
->ssid
<< 1) | 1;
79 static void css_inject_io_interrupt(SubchDev
*sch
)
81 S390CPU
*cpu
= s390_cpu_addr2state(0);
82 uint8_t isc
= (sch
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_ISC
) >> 11;
84 trace_css_io_interrupt(sch
->cssid
, sch
->ssid
, sch
->schid
,
85 sch
->curr_status
.pmcw
.intparm
, isc
, "");
86 s390_io_interrupt(cpu
,
87 css_build_subchannel_id(sch
),
89 sch
->curr_status
.pmcw
.intparm
,
93 void css_conditional_io_interrupt(SubchDev
*sch
)
96 * If the subchannel is not currently status pending, make it pending
99 if (!(sch
->curr_status
.scsw
.ctrl
& SCSW_STCTL_STATUS_PEND
)) {
100 S390CPU
*cpu
= s390_cpu_addr2state(0);
101 uint8_t isc
= (sch
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_ISC
) >> 11;
103 trace_css_io_interrupt(sch
->cssid
, sch
->ssid
, sch
->schid
,
104 sch
->curr_status
.pmcw
.intparm
, isc
,
106 sch
->curr_status
.scsw
.ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
107 sch
->curr_status
.scsw
.ctrl
|=
108 SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
109 /* Inject an I/O interrupt. */
110 s390_io_interrupt(cpu
,
111 css_build_subchannel_id(sch
),
113 sch
->curr_status
.pmcw
.intparm
,
118 static void sch_handle_clear_func(SubchDev
*sch
)
120 PMCW
*p
= &sch
->curr_status
.pmcw
;
121 SCSW
*s
= &sch
->curr_status
.scsw
;
124 /* Path management: In our simple css, we always choose the only path. */
127 /* Reset values prior to 'issueing the clear signal'. */
130 s
->flags
&= ~SCSW_FLAGS_MASK_PNO
;
132 /* We always 'attempt to issue the clear signal', and we always succeed. */
134 sch
->channel_prog
= 0x0;
135 sch
->last_cmd_valid
= false;
136 s
->ctrl
&= ~SCSW_ACTL_CLEAR_PEND
;
137 s
->ctrl
|= SCSW_STCTL_STATUS_PEND
;
145 static void sch_handle_halt_func(SubchDev
*sch
)
148 PMCW
*p
= &sch
->curr_status
.pmcw
;
149 SCSW
*s
= &sch
->curr_status
.scsw
;
152 /* Path management: In our simple css, we always choose the only path. */
155 /* We always 'attempt to issue the halt signal', and we always succeed. */
157 sch
->channel_prog
= 0x0;
158 sch
->last_cmd_valid
= false;
159 s
->ctrl
&= ~SCSW_ACTL_HALT_PEND
;
160 s
->ctrl
|= SCSW_STCTL_STATUS_PEND
;
162 if ((s
->ctrl
& (SCSW_ACTL_SUBCH_ACTIVE
| SCSW_ACTL_DEVICE_ACTIVE
)) ||
163 !((s
->ctrl
& SCSW_ACTL_START_PEND
) ||
164 (s
->ctrl
& SCSW_ACTL_SUSP
))) {
165 s
->dstat
= SCSW_DSTAT_DEVICE_END
;
172 static void copy_sense_id_to_guest(SenseId
*dest
, SenseId
*src
)
176 dest
->reserved
= src
->reserved
;
177 dest
->cu_type
= cpu_to_be16(src
->cu_type
);
178 dest
->cu_model
= src
->cu_model
;
179 dest
->dev_type
= cpu_to_be16(src
->dev_type
);
180 dest
->dev_model
= src
->dev_model
;
181 dest
->unused
= src
->unused
;
182 for (i
= 0; i
< ARRAY_SIZE(dest
->ciw
); i
++) {
183 dest
->ciw
[i
].type
= src
->ciw
[i
].type
;
184 dest
->ciw
[i
].command
= src
->ciw
[i
].command
;
185 dest
->ciw
[i
].count
= cpu_to_be16(src
->ciw
[i
].count
);
189 static CCW1
copy_ccw_from_guest(hwaddr addr
)
194 cpu_physical_memory_read(addr
, &tmp
, sizeof(tmp
));
195 ret
.cmd_code
= tmp
.cmd_code
;
196 ret
.flags
= tmp
.flags
;
197 ret
.count
= be16_to_cpu(tmp
.count
);
198 ret
.cda
= be32_to_cpu(tmp
.cda
);
203 static int css_interpret_ccw(SubchDev
*sch
, hwaddr ccw_addr
)
214 ccw
= copy_ccw_from_guest(ccw_addr
);
216 /* Check for invalid command codes. */
217 if ((ccw
.cmd_code
& 0x0f) == 0) {
220 if (((ccw
.cmd_code
& 0x0f) == CCW_CMD_TIC
) &&
221 ((ccw
.cmd_code
& 0xf0) != 0)) {
225 if (ccw
.flags
& CCW_FLAG_SUSPEND
) {
229 check_len
= !((ccw
.flags
& CCW_FLAG_SLI
) && !(ccw
.flags
& CCW_FLAG_DC
));
231 /* Look at the command. */
232 switch (ccw
.cmd_code
) {
237 case CCW_CMD_BASIC_SENSE
:
239 if (ccw
.count
!= sizeof(sch
->sense_data
)) {
244 len
= MIN(ccw
.count
, sizeof(sch
->sense_data
));
245 cpu_physical_memory_write(ccw
.cda
, sch
->sense_data
, len
);
246 sch
->curr_status
.scsw
.count
= ccw
.count
- len
;
247 memset(sch
->sense_data
, 0, sizeof(sch
->sense_data
));
250 case CCW_CMD_SENSE_ID
:
254 copy_sense_id_to_guest(&sense_id
, &sch
->id
);
255 /* Sense ID information is device specific. */
257 if (ccw
.count
!= sizeof(sense_id
)) {
262 len
= MIN(ccw
.count
, sizeof(sense_id
));
264 * Only indicate 0xff in the first sense byte if we actually
265 * have enough place to store at least bytes 0-3.
268 sense_id
.reserved
= 0xff;
270 sense_id
.reserved
= 0;
272 cpu_physical_memory_write(ccw
.cda
, &sense_id
, len
);
273 sch
->curr_status
.scsw
.count
= ccw
.count
- len
;
278 if (sch
->last_cmd_valid
&& (sch
->last_cmd
.cmd_code
== CCW_CMD_TIC
)) {
282 if (ccw
.flags
& (CCW_FLAG_CC
| CCW_FLAG_DC
)) {
286 sch
->channel_prog
= ccw
.cda
;
291 /* Handle device specific commands. */
292 ret
= sch
->ccw_cb(sch
, ccw
);
299 sch
->last_cmd_valid
= true;
301 if (ccw
.flags
& CCW_FLAG_CC
) {
302 sch
->channel_prog
+= 8;
310 static void sch_handle_start_func(SubchDev
*sch
)
313 PMCW
*p
= &sch
->curr_status
.pmcw
;
314 SCSW
*s
= &sch
->curr_status
.scsw
;
319 /* Path management: In our simple css, we always choose the only path. */
322 if (!(s
->ctrl
& SCSW_ACTL_SUSP
)) {
323 /* Look at the orb and try to execute the channel program. */
324 p
->intparm
= orb
->intparm
;
325 if (!(orb
->lpm
& path
)) {
326 /* Generate a deferred cc 3 condition. */
327 s
->flags
|= SCSW_FLAGS_MASK_CC
;
328 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
329 s
->ctrl
|= (SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
);
333 s
->ctrl
&= ~(SCSW_ACTL_SUSP
| SCSW_ACTL_RESUME_PEND
);
335 sch
->last_cmd_valid
= false;
337 ret
= css_interpret_ccw(sch
, sch
->channel_prog
);
340 /* ccw chain, continue processing */
344 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
345 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
346 s
->ctrl
|= SCSW_STCTL_PRIMARY
| SCSW_STCTL_SECONDARY
|
347 SCSW_STCTL_STATUS_PEND
;
348 s
->dstat
= SCSW_DSTAT_CHANNEL_END
| SCSW_DSTAT_DEVICE_END
;
351 /* unsupported command, generate unit check (command reject) */
352 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
353 s
->dstat
= SCSW_DSTAT_UNIT_CHECK
;
354 /* Set sense bit 0 in ecw0. */
355 sch
->sense_data
[0] = 0x80;
356 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
357 s
->ctrl
|= SCSW_STCTL_PRIMARY
| SCSW_STCTL_SECONDARY
|
358 SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
361 /* memory problem, generate channel data check */
362 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
363 s
->cstat
= SCSW_CSTAT_DATA_CHECK
;
364 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
365 s
->ctrl
|= SCSW_STCTL_PRIMARY
| SCSW_STCTL_SECONDARY
|
366 SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
369 /* subchannel busy, generate deferred cc 1 */
370 s
->flags
&= ~SCSW_FLAGS_MASK_CC
;
371 s
->flags
|= (1 << 8);
372 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
373 s
->ctrl
|= SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
376 /* channel program has been suspended */
377 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
378 s
->ctrl
|= SCSW_ACTL_SUSP
;
381 /* error, generate channel program check */
382 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
383 s
->cstat
= SCSW_CSTAT_PROG_CHECK
;
384 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
385 s
->ctrl
|= SCSW_STCTL_PRIMARY
| SCSW_STCTL_SECONDARY
|
386 SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
389 } while (ret
== -EAGAIN
);
394 * On real machines, this would run asynchronously to the main vcpus.
395 * We might want to make some parts of the ssch handling (interpreting
396 * read/writes) asynchronous later on if we start supporting more than
397 * our current very simple devices.
399 static void do_subchannel_work(SubchDev
*sch
)
402 SCSW
*s
= &sch
->curr_status
.scsw
;
404 if (s
->ctrl
& SCSW_FCTL_CLEAR_FUNC
) {
405 sch_handle_clear_func(sch
);
406 } else if (s
->ctrl
& SCSW_FCTL_HALT_FUNC
) {
407 sch_handle_halt_func(sch
);
408 } else if (s
->ctrl
& SCSW_FCTL_START_FUNC
) {
409 sch_handle_start_func(sch
);
414 css_inject_io_interrupt(sch
);
417 static void copy_pmcw_to_guest(PMCW
*dest
, const PMCW
*src
)
421 dest
->intparm
= cpu_to_be32(src
->intparm
);
422 dest
->flags
= cpu_to_be16(src
->flags
);
423 dest
->devno
= cpu_to_be16(src
->devno
);
424 dest
->lpm
= src
->lpm
;
425 dest
->pnom
= src
->pnom
;
426 dest
->lpum
= src
->lpum
;
427 dest
->pim
= src
->pim
;
428 dest
->mbi
= cpu_to_be16(src
->mbi
);
429 dest
->pom
= src
->pom
;
430 dest
->pam
= src
->pam
;
431 for (i
= 0; i
< ARRAY_SIZE(dest
->chpid
); i
++) {
432 dest
->chpid
[i
] = src
->chpid
[i
];
434 dest
->chars
= cpu_to_be32(src
->chars
);
437 static void copy_scsw_to_guest(SCSW
*dest
, const SCSW
*src
)
439 dest
->flags
= cpu_to_be16(src
->flags
);
440 dest
->ctrl
= cpu_to_be16(src
->ctrl
);
441 dest
->cpa
= cpu_to_be32(src
->cpa
);
442 dest
->dstat
= src
->dstat
;
443 dest
->cstat
= src
->cstat
;
444 dest
->count
= cpu_to_be16(src
->count
);
447 static void copy_schib_to_guest(SCHIB
*dest
, const SCHIB
*src
)
451 copy_pmcw_to_guest(&dest
->pmcw
, &src
->pmcw
);
452 copy_scsw_to_guest(&dest
->scsw
, &src
->scsw
);
453 dest
->mba
= cpu_to_be64(src
->mba
);
454 for (i
= 0; i
< ARRAY_SIZE(dest
->mda
); i
++) {
455 dest
->mda
[i
] = src
->mda
[i
];
459 int css_do_stsch(SubchDev
*sch
, SCHIB
*schib
)
461 /* Use current status. */
462 copy_schib_to_guest(schib
, &sch
->curr_status
);
466 static void copy_pmcw_from_guest(PMCW
*dest
, const PMCW
*src
)
470 dest
->intparm
= be32_to_cpu(src
->intparm
);
471 dest
->flags
= be16_to_cpu(src
->flags
);
472 dest
->devno
= be16_to_cpu(src
->devno
);
473 dest
->lpm
= src
->lpm
;
474 dest
->pnom
= src
->pnom
;
475 dest
->lpum
= src
->lpum
;
476 dest
->pim
= src
->pim
;
477 dest
->mbi
= be16_to_cpu(src
->mbi
);
478 dest
->pom
= src
->pom
;
479 dest
->pam
= src
->pam
;
480 for (i
= 0; i
< ARRAY_SIZE(dest
->chpid
); i
++) {
481 dest
->chpid
[i
] = src
->chpid
[i
];
483 dest
->chars
= be32_to_cpu(src
->chars
);
486 static void copy_scsw_from_guest(SCSW
*dest
, const SCSW
*src
)
488 dest
->flags
= be16_to_cpu(src
->flags
);
489 dest
->ctrl
= be16_to_cpu(src
->ctrl
);
490 dest
->cpa
= be32_to_cpu(src
->cpa
);
491 dest
->dstat
= src
->dstat
;
492 dest
->cstat
= src
->cstat
;
493 dest
->count
= be16_to_cpu(src
->count
);
496 static void copy_schib_from_guest(SCHIB
*dest
, const SCHIB
*src
)
500 copy_pmcw_from_guest(&dest
->pmcw
, &src
->pmcw
);
501 copy_scsw_from_guest(&dest
->scsw
, &src
->scsw
);
502 dest
->mba
= be64_to_cpu(src
->mba
);
503 for (i
= 0; i
< ARRAY_SIZE(dest
->mda
); i
++) {
504 dest
->mda
[i
] = src
->mda
[i
];
508 int css_do_msch(SubchDev
*sch
, SCHIB
*orig_schib
)
510 SCSW
*s
= &sch
->curr_status
.scsw
;
511 PMCW
*p
= &sch
->curr_status
.pmcw
;
515 if (!(sch
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_DNV
)) {
520 if (s
->ctrl
& SCSW_STCTL_STATUS_PEND
) {
526 (SCSW_FCTL_START_FUNC
|SCSW_FCTL_HALT_FUNC
|SCSW_FCTL_CLEAR_FUNC
)) {
531 copy_schib_from_guest(&schib
, orig_schib
);
532 /* Only update the program-modifiable fields. */
533 p
->intparm
= schib
.pmcw
.intparm
;
534 p
->flags
&= ~(PMCW_FLAGS_MASK_ISC
| PMCW_FLAGS_MASK_ENA
|
535 PMCW_FLAGS_MASK_LM
| PMCW_FLAGS_MASK_MME
|
537 p
->flags
|= schib
.pmcw
.flags
&
538 (PMCW_FLAGS_MASK_ISC
| PMCW_FLAGS_MASK_ENA
|
539 PMCW_FLAGS_MASK_LM
| PMCW_FLAGS_MASK_MME
|
541 p
->lpm
= schib
.pmcw
.lpm
;
542 p
->mbi
= schib
.pmcw
.mbi
;
543 p
->pom
= schib
.pmcw
.pom
;
544 p
->chars
&= ~(PMCW_CHARS_MASK_MBFC
| PMCW_CHARS_MASK_CSENSE
);
545 p
->chars
|= schib
.pmcw
.chars
&
546 (PMCW_CHARS_MASK_MBFC
| PMCW_CHARS_MASK_CSENSE
);
547 sch
->curr_status
.mba
= schib
.mba
;
555 int css_do_xsch(SubchDev
*sch
)
557 SCSW
*s
= &sch
->curr_status
.scsw
;
558 PMCW
*p
= &sch
->curr_status
.pmcw
;
561 if (!(p
->flags
& (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
))) {
566 if (!(s
->ctrl
& SCSW_CTRL_MASK_FCTL
) ||
567 ((s
->ctrl
& SCSW_CTRL_MASK_FCTL
) != SCSW_FCTL_START_FUNC
) ||
569 (SCSW_ACTL_RESUME_PEND
| SCSW_ACTL_START_PEND
| SCSW_ACTL_SUSP
))) ||
570 (s
->ctrl
& SCSW_ACTL_SUBCH_ACTIVE
)) {
575 if (s
->ctrl
& SCSW_CTRL_MASK_STCTL
) {
580 /* Cancel the current operation. */
581 s
->ctrl
&= ~(SCSW_FCTL_START_FUNC
|
582 SCSW_ACTL_RESUME_PEND
|
583 SCSW_ACTL_START_PEND
|
585 sch
->channel_prog
= 0x0;
586 sch
->last_cmd_valid
= false;
596 int css_do_csch(SubchDev
*sch
)
598 SCSW
*s
= &sch
->curr_status
.scsw
;
599 PMCW
*p
= &sch
->curr_status
.pmcw
;
602 if (!(p
->flags
& (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
))) {
607 /* Trigger the clear function. */
608 s
->ctrl
&= ~(SCSW_CTRL_MASK_FCTL
| SCSW_CTRL_MASK_ACTL
);
609 s
->ctrl
|= SCSW_FCTL_CLEAR_FUNC
| SCSW_FCTL_CLEAR_FUNC
;
611 do_subchannel_work(sch
);
618 int css_do_hsch(SubchDev
*sch
)
620 SCSW
*s
= &sch
->curr_status
.scsw
;
621 PMCW
*p
= &sch
->curr_status
.pmcw
;
624 if (!(p
->flags
& (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
))) {
629 if (((s
->ctrl
& SCSW_CTRL_MASK_STCTL
) == SCSW_STCTL_STATUS_PEND
) ||
630 (s
->ctrl
& (SCSW_STCTL_PRIMARY
|
631 SCSW_STCTL_SECONDARY
|
632 SCSW_STCTL_ALERT
))) {
637 if (s
->ctrl
& (SCSW_FCTL_HALT_FUNC
| SCSW_FCTL_CLEAR_FUNC
)) {
642 /* Trigger the halt function. */
643 s
->ctrl
|= SCSW_FCTL_HALT_FUNC
;
644 s
->ctrl
&= ~SCSW_FCTL_START_FUNC
;
645 if (((s
->ctrl
& SCSW_CTRL_MASK_ACTL
) ==
646 (SCSW_ACTL_SUBCH_ACTIVE
| SCSW_ACTL_DEVICE_ACTIVE
)) &&
647 ((s
->ctrl
& SCSW_CTRL_MASK_STCTL
) == SCSW_STCTL_INTERMEDIATE
)) {
648 s
->ctrl
&= ~SCSW_STCTL_STATUS_PEND
;
650 s
->ctrl
|= SCSW_ACTL_HALT_PEND
;
652 do_subchannel_work(sch
);
659 static void css_update_chnmon(SubchDev
*sch
)
661 if (!(sch
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_MME
)) {
665 /* The counter is conveniently located at the beginning of the struct. */
666 if (sch
->curr_status
.pmcw
.chars
& PMCW_CHARS_MASK_MBFC
) {
667 /* Format 1, per-subchannel area. */
670 count
= ldl_phys(sch
->curr_status
.mba
);
672 stl_phys(sch
->curr_status
.mba
, count
);
674 /* Format 0, global area. */
678 offset
= sch
->curr_status
.pmcw
.mbi
<< 5;
679 count
= lduw_phys(channel_subsys
->chnmon_area
+ offset
);
681 stw_phys(channel_subsys
->chnmon_area
+ offset
, count
);
685 int css_do_ssch(SubchDev
*sch
, ORB
*orb
)
687 SCSW
*s
= &sch
->curr_status
.scsw
;
688 PMCW
*p
= &sch
->curr_status
.pmcw
;
691 if (!(p
->flags
& (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
))) {
696 if (s
->ctrl
& SCSW_STCTL_STATUS_PEND
) {
701 if (s
->ctrl
& (SCSW_FCTL_START_FUNC
|
702 SCSW_FCTL_HALT_FUNC
|
703 SCSW_FCTL_CLEAR_FUNC
)) {
708 /* If monitoring is active, update counter. */
709 if (channel_subsys
->chnmon_active
) {
710 css_update_chnmon(sch
);
713 sch
->channel_prog
= orb
->cpa
;
714 /* Trigger the start function. */
715 s
->ctrl
|= (SCSW_FCTL_START_FUNC
| SCSW_ACTL_START_PEND
);
716 s
->flags
&= ~SCSW_FLAGS_MASK_PNO
;
718 do_subchannel_work(sch
);
725 static void copy_irb_to_guest(IRB
*dest
, const IRB
*src
)
729 copy_scsw_to_guest(&dest
->scsw
, &src
->scsw
);
731 for (i
= 0; i
< ARRAY_SIZE(dest
->esw
); i
++) {
732 dest
->esw
[i
] = cpu_to_be32(src
->esw
[i
]);
734 for (i
= 0; i
< ARRAY_SIZE(dest
->ecw
); i
++) {
735 dest
->ecw
[i
] = cpu_to_be32(src
->ecw
[i
]);
737 for (i
= 0; i
< ARRAY_SIZE(dest
->emw
); i
++) {
738 dest
->emw
[i
] = cpu_to_be32(src
->emw
[i
]);
742 int css_do_tsch(SubchDev
*sch
, IRB
*target_irb
)
744 SCSW
*s
= &sch
->curr_status
.scsw
;
745 PMCW
*p
= &sch
->curr_status
.pmcw
;
752 if (!(p
->flags
& (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
))) {
757 stctl
= s
->ctrl
& SCSW_CTRL_MASK_STCTL
;
758 fctl
= s
->ctrl
& SCSW_CTRL_MASK_FCTL
;
759 actl
= s
->ctrl
& SCSW_CTRL_MASK_ACTL
;
761 /* Prepare the irb for the guest. */
762 memset(&irb
, 0, sizeof(IRB
));
764 /* Copy scsw from current status. */
765 memcpy(&irb
.scsw
, s
, sizeof(SCSW
));
766 if (stctl
& SCSW_STCTL_STATUS_PEND
) {
767 if (s
->cstat
& (SCSW_CSTAT_DATA_CHECK
|
768 SCSW_CSTAT_CHN_CTRL_CHK
|
769 SCSW_CSTAT_INTF_CTRL_CHK
)) {
770 irb
.scsw
.flags
|= SCSW_FLAGS_MASK_ESWF
;
771 irb
.esw
[0] = 0x04804000;
773 irb
.esw
[0] = 0x00800000;
775 /* If a unit check is pending, copy sense data. */
776 if ((s
->dstat
& SCSW_DSTAT_UNIT_CHECK
) &&
777 (p
->chars
& PMCW_CHARS_MASK_CSENSE
)) {
778 irb
.scsw
.flags
|= SCSW_FLAGS_MASK_ESWF
| SCSW_FLAGS_MASK_ECTL
;
779 memcpy(irb
.ecw
, sch
->sense_data
, sizeof(sch
->sense_data
));
780 irb
.esw
[1] = 0x02000000 | (sizeof(sch
->sense_data
) << 8);
783 /* Store the irb to the guest. */
784 copy_irb_to_guest(target_irb
, &irb
);
786 /* Clear conditions on subchannel, if applicable. */
787 if (stctl
& SCSW_STCTL_STATUS_PEND
) {
788 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
789 if ((stctl
!= (SCSW_STCTL_INTERMEDIATE
| SCSW_STCTL_STATUS_PEND
)) ||
790 ((fctl
& SCSW_FCTL_HALT_FUNC
) &&
791 (actl
& SCSW_ACTL_SUSP
))) {
792 s
->ctrl
&= ~SCSW_CTRL_MASK_FCTL
;
794 if (stctl
!= (SCSW_STCTL_INTERMEDIATE
| SCSW_STCTL_STATUS_PEND
)) {
795 s
->flags
&= ~SCSW_FLAGS_MASK_PNO
;
796 s
->ctrl
&= ~(SCSW_ACTL_RESUME_PEND
|
797 SCSW_ACTL_START_PEND
|
798 SCSW_ACTL_HALT_PEND
|
799 SCSW_ACTL_CLEAR_PEND
|
802 if ((actl
& SCSW_ACTL_SUSP
) &&
803 (fctl
& SCSW_FCTL_START_FUNC
)) {
804 s
->flags
&= ~SCSW_FLAGS_MASK_PNO
;
805 if (fctl
& SCSW_FCTL_HALT_FUNC
) {
806 s
->ctrl
&= ~(SCSW_ACTL_RESUME_PEND
|
807 SCSW_ACTL_START_PEND
|
808 SCSW_ACTL_HALT_PEND
|
809 SCSW_ACTL_CLEAR_PEND
|
812 s
->ctrl
&= ~SCSW_ACTL_RESUME_PEND
;
816 /* Clear pending sense data. */
817 if (p
->chars
& PMCW_CHARS_MASK_CSENSE
) {
818 memset(sch
->sense_data
, 0 , sizeof(sch
->sense_data
));
822 ret
= ((stctl
& SCSW_STCTL_STATUS_PEND
) == 0);
828 static void copy_crw_to_guest(CRW
*dest
, const CRW
*src
)
830 dest
->flags
= cpu_to_be16(src
->flags
);
831 dest
->rsid
= cpu_to_be16(src
->rsid
);
834 int css_do_stcrw(CRW
*crw
)
836 CrwContainer
*crw_cont
;
839 crw_cont
= QTAILQ_FIRST(&channel_subsys
->pending_crws
);
841 QTAILQ_REMOVE(&channel_subsys
->pending_crws
, crw_cont
, sibling
);
842 copy_crw_to_guest(crw
, &crw_cont
->crw
);
846 /* List was empty, turn crw machine checks on again. */
847 memset(crw
, 0, sizeof(*crw
));
848 channel_subsys
->do_crw_mchk
= true;
855 int css_do_tpi(IOIntCode
*int_code
, int lowcore
)
857 /* No pending interrupts for !KVM. */
861 int css_collect_chp_desc(int m
, uint8_t cssid
, uint8_t f_chpid
, uint8_t l_chpid
,
866 uint32_t chpid_type_word
;
870 css
= channel_subsys
->css
[channel_subsys
->default_cssid
];
872 css
= channel_subsys
->css
[cssid
];
878 for (i
= f_chpid
; i
<= l_chpid
; i
++) {
879 if (css
->chpids
[i
].in_use
) {
880 chpid_type_word
= 0x80000000 | (css
->chpids
[i
].type
<< 8) | i
;
882 words
[0] = cpu_to_be32(chpid_type_word
);
884 memcpy(buf
+ desc_size
, words
, 8);
886 } else if (rfmt
== 1) {
887 words
[0] = cpu_to_be32(chpid_type_word
);
895 memcpy(buf
+ desc_size
, words
, 32);
903 void css_do_schm(uint8_t mbk
, int update
, int dct
, uint64_t mbo
)
905 /* dct is currently ignored (not really meaningful for our devices) */
906 /* TODO: Don't ignore mbk. */
907 if (update
&& !channel_subsys
->chnmon_active
) {
908 /* Enable measuring. */
909 channel_subsys
->chnmon_area
= mbo
;
910 channel_subsys
->chnmon_active
= true;
912 if (!update
&& channel_subsys
->chnmon_active
) {
913 /* Disable measuring. */
914 channel_subsys
->chnmon_area
= 0;
915 channel_subsys
->chnmon_active
= false;
919 int css_do_rsch(SubchDev
*sch
)
921 SCSW
*s
= &sch
->curr_status
.scsw
;
922 PMCW
*p
= &sch
->curr_status
.pmcw
;
925 if (!(p
->flags
& (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
))) {
930 if (s
->ctrl
& SCSW_STCTL_STATUS_PEND
) {
935 if (((s
->ctrl
& SCSW_CTRL_MASK_FCTL
) != SCSW_FCTL_START_FUNC
) ||
936 (s
->ctrl
& SCSW_ACTL_RESUME_PEND
) ||
937 (!(s
->ctrl
& SCSW_ACTL_SUSP
))) {
942 /* If monitoring is active, update counter. */
943 if (channel_subsys
->chnmon_active
) {
944 css_update_chnmon(sch
);
947 s
->ctrl
|= SCSW_ACTL_RESUME_PEND
;
948 do_subchannel_work(sch
);
955 int css_do_rchp(uint8_t cssid
, uint8_t chpid
)
959 if (cssid
> channel_subsys
->max_cssid
) {
962 if (channel_subsys
->max_cssid
== 0) {
963 real_cssid
= channel_subsys
->default_cssid
;
967 if (!channel_subsys
->css
[real_cssid
]) {
971 if (!channel_subsys
->css
[real_cssid
]->chpids
[chpid
].in_use
) {
975 if (!channel_subsys
->css
[real_cssid
]->chpids
[chpid
].is_virtual
) {
977 "rchp unsupported for non-virtual chpid %x.%02x!\n",
982 /* We don't really use a channel path, so we're done here. */
983 css_queue_crw(CRW_RSC_CHP
, CRW_ERC_INIT
,
984 channel_subsys
->max_cssid
> 0 ? 1 : 0, chpid
);
985 if (channel_subsys
->max_cssid
> 0) {
986 css_queue_crw(CRW_RSC_CHP
, CRW_ERC_INIT
, 0, real_cssid
<< 8);
991 bool css_schid_final(int m
, uint8_t cssid
, uint8_t ssid
, uint16_t schid
)
996 real_cssid
= (!m
&& (cssid
== 0)) ? channel_subsys
->default_cssid
: cssid
;
997 if (real_cssid
> MAX_CSSID
|| ssid
> MAX_SSID
||
998 !channel_subsys
->css
[real_cssid
] ||
999 !channel_subsys
->css
[real_cssid
]->sch_set
[ssid
]) {
1002 set
= channel_subsys
->css
[real_cssid
]->sch_set
[ssid
];
1003 return schid
> find_last_bit(set
->schids_used
,
1004 (MAX_SCHID
+ 1) / sizeof(unsigned long));
1007 static int css_add_virtual_chpid(uint8_t cssid
, uint8_t chpid
, uint8_t type
)
1011 trace_css_chpid_add(cssid
, chpid
, type
);
1012 if (cssid
> MAX_CSSID
) {
1015 css
= channel_subsys
->css
[cssid
];
1019 if (css
->chpids
[chpid
].in_use
) {
1022 css
->chpids
[chpid
].in_use
= 1;
1023 css
->chpids
[chpid
].type
= type
;
1024 css
->chpids
[chpid
].is_virtual
= 1;
1026 css_generate_chp_crws(cssid
, chpid
);
1031 void css_sch_build_virtual_schib(SubchDev
*sch
, uint8_t chpid
, uint8_t type
)
1033 PMCW
*p
= &sch
->curr_status
.pmcw
;
1034 SCSW
*s
= &sch
->curr_status
.scsw
;
1036 CssImage
*css
= channel_subsys
->css
[sch
->cssid
];
1038 assert(css
!= NULL
);
1039 memset(p
, 0, sizeof(PMCW
));
1040 p
->flags
|= PMCW_FLAGS_MASK_DNV
;
1041 p
->devno
= sch
->devno
;
1046 p
->chpid
[0] = chpid
;
1047 if (!css
->chpids
[chpid
].in_use
) {
1048 css_add_virtual_chpid(sch
->cssid
, chpid
, type
);
1051 memset(s
, 0, sizeof(SCSW
));
1052 sch
->curr_status
.mba
= 0;
1053 for (i
= 0; i
< ARRAY_SIZE(sch
->curr_status
.mda
); i
++) {
1054 sch
->curr_status
.mda
[i
] = 0;
1058 SubchDev
*css_find_subch(uint8_t m
, uint8_t cssid
, uint8_t ssid
, uint16_t schid
)
1062 real_cssid
= (!m
&& (cssid
== 0)) ? channel_subsys
->default_cssid
: cssid
;
1064 if (!channel_subsys
->css
[real_cssid
]) {
1068 if (!channel_subsys
->css
[real_cssid
]->sch_set
[ssid
]) {
1072 return channel_subsys
->css
[real_cssid
]->sch_set
[ssid
]->sch
[schid
];
1075 bool css_subch_visible(SubchDev
*sch
)
1077 if (sch
->ssid
> channel_subsys
->max_ssid
) {
1081 if (sch
->cssid
!= channel_subsys
->default_cssid
) {
1082 return (channel_subsys
->max_cssid
> 0);
1088 bool css_present(uint8_t cssid
)
1090 return (channel_subsys
->css
[cssid
] != NULL
);
1093 bool css_devno_used(uint8_t cssid
, uint8_t ssid
, uint16_t devno
)
1095 if (!channel_subsys
->css
[cssid
]) {
1098 if (!channel_subsys
->css
[cssid
]->sch_set
[ssid
]) {
1102 return !!test_bit(devno
,
1103 channel_subsys
->css
[cssid
]->sch_set
[ssid
]->devnos_used
);
1106 void css_subch_assign(uint8_t cssid
, uint8_t ssid
, uint16_t schid
,
1107 uint16_t devno
, SubchDev
*sch
)
1112 trace_css_assign_subch(sch
? "assign" : "deassign", cssid
, ssid
, schid
,
1114 if (!channel_subsys
->css
[cssid
]) {
1116 "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n",
1117 __func__
, cssid
, ssid
, schid
);
1120 css
= channel_subsys
->css
[cssid
];
1122 if (!css
->sch_set
[ssid
]) {
1123 css
->sch_set
[ssid
] = g_malloc0(sizeof(SubchSet
));
1125 s_set
= css
->sch_set
[ssid
];
1127 s_set
->sch
[schid
] = sch
;
1129 set_bit(schid
, s_set
->schids_used
);
1130 set_bit(devno
, s_set
->devnos_used
);
1132 clear_bit(schid
, s_set
->schids_used
);
1133 clear_bit(devno
, s_set
->devnos_used
);
1137 void css_queue_crw(uint8_t rsc
, uint8_t erc
, int chain
, uint16_t rsid
)
1139 CrwContainer
*crw_cont
;
1141 trace_css_crw(rsc
, erc
, rsid
, chain
? "(chained)" : "");
1142 /* TODO: Maybe use a static crw pool? */
1143 crw_cont
= g_try_malloc0(sizeof(CrwContainer
));
1145 channel_subsys
->crws_lost
= true;
1148 crw_cont
->crw
.flags
= (rsc
<< 8) | erc
;
1150 crw_cont
->crw
.flags
|= CRW_FLAGS_MASK_C
;
1152 crw_cont
->crw
.rsid
= rsid
;
1153 if (channel_subsys
->crws_lost
) {
1154 crw_cont
->crw
.flags
|= CRW_FLAGS_MASK_R
;
1155 channel_subsys
->crws_lost
= false;
1158 QTAILQ_INSERT_TAIL(&channel_subsys
->pending_crws
, crw_cont
, sibling
);
1160 if (channel_subsys
->do_crw_mchk
) {
1161 S390CPU
*cpu
= s390_cpu_addr2state(0);
1163 channel_subsys
->do_crw_mchk
= false;
1164 /* Inject crw pending machine check. */
1169 void css_generate_sch_crws(uint8_t cssid
, uint8_t ssid
, uint16_t schid
,
1170 int hotplugged
, int add
)
1172 uint8_t guest_cssid
;
1175 if (add
&& !hotplugged
) {
1178 if (channel_subsys
->max_cssid
== 0) {
1179 /* Default cssid shows up as 0. */
1180 guest_cssid
= (cssid
== channel_subsys
->default_cssid
) ? 0 : cssid
;
1182 /* Show real cssid to the guest. */
1183 guest_cssid
= cssid
;
1186 * Only notify for higher subchannel sets/channel subsystems if the
1187 * guest has enabled it.
1189 if ((ssid
> channel_subsys
->max_ssid
) ||
1190 (guest_cssid
> channel_subsys
->max_cssid
) ||
1191 ((channel_subsys
->max_cssid
== 0) &&
1192 (cssid
!= channel_subsys
->default_cssid
))) {
1195 chain_crw
= (channel_subsys
->max_ssid
> 0) ||
1196 (channel_subsys
->max_cssid
> 0);
1197 css_queue_crw(CRW_RSC_SUBCH
, CRW_ERC_IPI
, chain_crw
? 1 : 0, schid
);
1199 css_queue_crw(CRW_RSC_SUBCH
, CRW_ERC_IPI
, 0,
1200 (guest_cssid
<< 8) | (ssid
<< 4));
1204 void css_generate_chp_crws(uint8_t cssid
, uint8_t chpid
)
1209 int css_enable_mcsse(void)
1211 trace_css_enable_facility("mcsse");
1212 channel_subsys
->max_cssid
= MAX_CSSID
;
1216 int css_enable_mss(void)
1218 trace_css_enable_facility("mss");
1219 channel_subsys
->max_ssid
= MAX_SSID
;
1223 static void css_init(void)
1225 channel_subsys
= g_malloc0(sizeof(*channel_subsys
));
1226 QTAILQ_INIT(&channel_subsys
->pending_crws
);
1227 channel_subsys
->do_crw_mchk
= true;
1228 channel_subsys
->crws_lost
= false;
1229 channel_subsys
->chnmon_active
= false;
1231 machine_init(css_init
);
1233 void css_reset_sch(SubchDev
*sch
)
1235 PMCW
*p
= &sch
->curr_status
.pmcw
;
1238 p
->flags
&= ~(PMCW_FLAGS_MASK_ISC
| PMCW_FLAGS_MASK_ENA
|
1239 PMCW_FLAGS_MASK_LM
| PMCW_FLAGS_MASK_MME
|
1240 PMCW_FLAGS_MASK_MP
| PMCW_FLAGS_MASK_TF
);
1241 p
->flags
|= PMCW_FLAGS_MASK_DNV
;
1242 p
->devno
= sch
->devno
;
1250 p
->chars
&= ~(PMCW_CHARS_MASK_MBFC
| PMCW_CHARS_MASK_XMWME
|
1251 PMCW_CHARS_MASK_CSENSE
);
1253 memset(&sch
->curr_status
.scsw
, 0, sizeof(sch
->curr_status
.scsw
));
1254 sch
->curr_status
.mba
= 0;
1256 sch
->channel_prog
= 0x0;
1257 sch
->last_cmd_valid
= false;
1261 void css_reset(void)
1263 CrwContainer
*crw_cont
;
1265 /* Clean up monitoring. */
1266 channel_subsys
->chnmon_active
= false;
1267 channel_subsys
->chnmon_area
= 0;
1269 /* Clear pending CRWs. */
1270 while ((crw_cont
= QTAILQ_FIRST(&channel_subsys
->pending_crws
))) {
1271 QTAILQ_REMOVE(&channel_subsys
->pending_crws
, crw_cont
, sibling
);
1274 channel_subsys
->do_crw_mchk
= true;
1275 channel_subsys
->crws_lost
= false;
1277 /* Reset maximum ids. */
1278 channel_subsys
->max_cssid
= 0;
1279 channel_subsys
->max_ssid
= 0;