hw/pc.h

   1 #ifndef HW_PC_H
   2 #define HW_PC_H
   3
   4 #include "qemu-common.h"
   5 #include "memory.h"
   6 #include "ioport.h"
   7 #include "isa.h"
   8 #include "fdc.h"
   9 #include "net.h"
  10 #include "memory.h"
  11 #include "ioapic.h"
  12
  13 /* PC-style peripherals (also used by other machines).  */
  14
  15 /* serial.c */
  16
  17 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
  18                          CharDriverState *chr);
  19 SerialState *serial_mm_init(MemoryRegion *address_space,
  20                             target_phys_addr_t base, int it_shift,
  21                             qemu_irq irq, int baudbase,
  22                             CharDriverState *chr, enum device_endian);
  23 static inline bool serial_isa_init(int index, CharDriverState *chr)
  24 {
  25     ISADevice *dev;
  26
  27     dev = isa_try_create("isa-serial");
  28     if (!dev) {
  29         return false;
  30     }
  31     qdev_prop_set_uint32(&dev->qdev, "index", index);
  32     qdev_prop_set_chr(&dev->qdev, "chardev", chr);
  33     if (qdev_init(&dev->qdev) < 0) {
  34         return false;
  35     }
  36     return true;
  37 }
  38
  39 void serial_set_frequency(SerialState *s, uint32_t frequency);
  40
  41 /* parallel.c */
  42 static inline bool parallel_init(int index, CharDriverState *chr)
  43 {
  44     ISADevice *dev;
  45
  46     dev = isa_try_create("isa-parallel");
  47     if (!dev) {
  48         return false;
  49     }
  50     qdev_prop_set_uint32(&dev->qdev, "index", index);
  51     qdev_prop_set_chr(&dev->qdev, "chardev", chr);
  52     if (qdev_init(&dev->qdev) < 0) {
  53         return false;
  54     }
  55     return true;
  56 }
  57
  58 bool parallel_mm_init(MemoryRegion *address_space,
  59                       target_phys_addr_t base, int it_shift, qemu_irq irq,
  60                       CharDriverState *chr);
  61
  62 /* i8259.c */
  63
  64 typedef struct PicState PicState;
  65 extern PicState *isa_pic;
  66 qemu_irq *i8259_init(qemu_irq parent_irq);
  67 int pic_read_irq(PicState *s);
  68 int pic_get_output(PicState *s);
  69 void pic_info(Monitor *mon);
  70 void irq_info(Monitor *mon);
  71
  72 /* Global System Interrupts */
  73
  74 #define GSI_NUM_PINS IOAPIC_NUM_PINS
  75
  76 typedef struct GSIState {
  77     qemu_irq i8259_irq[ISA_NUM_IRQS];
  78     qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
  79 } GSIState;
  80
  81 void gsi_handler(void *opaque, int n, int level);
  82
  83 /* i8254.c */
  84
  85 #define PIT_FREQ 1193182
  86
  87 static inline ISADevice *pit_init(int base, int irq)
  88 {
  89     ISADevice *dev;
  90
  91     dev = isa_create("isa-pit");
  92     qdev_prop_set_uint32(&dev->qdev, "iobase", base);
  93     qdev_prop_set_uint32(&dev->qdev, "irq", irq);
  94     qdev_init_nofail(&dev->qdev);
  95
  96     return dev;
  97 }
  98
  99 void pit_set_gate(ISADevice *dev, int channel, int val);
 100 int pit_get_gate(ISADevice *dev, int channel);
 101 int pit_get_initial_count(ISADevice *dev, int channel);
 102 int pit_get_mode(ISADevice *dev, int channel);
 103 int pit_get_out(ISADevice *dev, int channel, int64_t current_time);
 104
 105 void hpet_pit_disable(void);
 106 void hpet_pit_enable(void);
 107
 108 /* vmport.c */
 109 static inline void vmport_init(void)
 110 {
 111     isa_create_simple("vmport");
 112 }
 113 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
 114 void vmmouse_get_data(uint32_t *data);
 115 void vmmouse_set_data(const uint32_t *data);
 116
 117 /* pckbd.c */
 118
 119 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
 120 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
 121                    MemoryRegion *region, ram_addr_t size,
 122                    target_phys_addr_t mask);
 123 void i8042_isa_mouse_fake_event(void *opaque);
 124 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
 125
 126 /* pc.c */
 127 extern int fd_bootchk;
 128
 129 void pc_register_ferr_irq(qemu_irq irq);
 130 void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
 131 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
 132
 133 void pc_cpus_init(const char *cpu_model);
 134 void pc_memory_init(MemoryRegion *system_memory,
 135                     const char *kernel_filename,
 136                     const char *kernel_cmdline,
 137                     const char *initrd_filename,
 138                     ram_addr_t below_4g_mem_size,
 139                     ram_addr_t above_4g_mem_size,
 140                     MemoryRegion *rom_memory,
 141                     MemoryRegion **ram_memory);
 142 qemu_irq *pc_allocate_cpu_irq(void);
 143 void pc_vga_init(PCIBus *pci_bus);
 144 void pc_basic_device_init(qemu_irq *gsi,
 145                           ISADevice **rtc_state,
 146                           ISADevice **floppy,
 147                           bool no_vmport);
 148 void pc_init_ne2k_isa(NICInfo *nd);
 149 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 150                   const char *boot_device,
 151                   ISADevice *floppy, BusState *ide0, BusState *ide1,
 152                   ISADevice *s);
 153 void pc_pci_device_init(PCIBus *pci_bus);
 154
 155 typedef void (*cpu_set_smm_t)(int smm, void *arg);
 156 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
 157
 158 /* acpi.c */
 159 extern int acpi_enabled;
 160 extern char *acpi_tables;
 161 extern size_t acpi_tables_len;
 162
 163 void acpi_bios_init(void);
 164 int acpi_table_add(const char *table_desc);
 165
 166 /* acpi_piix.c */
 167
 168 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
 169                        qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
 170                        int kvm_enabled);
 171 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
 172
 173 /* hpet.c */
 174 extern int no_hpet;
 175
 176 /* pcspk.c */
 177 void pcspk_init(ISADevice *pit);
 178 int pcspk_audio_init(qemu_irq *pic);
 179
 180 /* piix_pci.c */
 181 struct PCII440FXState;
 182 typedef struct PCII440FXState PCII440FXState;
 183
 184 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
 185                     qemu_irq *pic,
 186                     MemoryRegion *address_space_mem,
 187                     MemoryRegion *address_space_io,
 188                     ram_addr_t ram_size,
 189                     target_phys_addr_t pci_hole_start,
 190                     target_phys_addr_t pci_hole_size,
 191                     target_phys_addr_t pci_hole64_start,
 192                     target_phys_addr_t pci_hole64_size,
 193                     MemoryRegion *pci_memory,
 194                     MemoryRegion *ram_memory);
 195
 196 /* piix4.c */
 197 extern PCIDevice *piix4_dev;
 198 int piix4_init(PCIBus *bus, int devfn);
 199
 200 /* vga.c */
 201 enum vga_retrace_method {
 202     VGA_RETRACE_DUMB,
 203     VGA_RETRACE_PRECISE
 204 };
 205
 206 extern enum vga_retrace_method vga_retrace_method;
 207
 208 static inline int isa_vga_init(void)
 209 {
 210     ISADevice *dev;
 211
 212     dev = isa_try_create("isa-vga");
 213     if (!dev) {
 214         fprintf(stderr, "Warning: isa-vga not available\n");
 215         return 0;
 216     }
 217     qdev_init_nofail(&dev->qdev);
 218     return 1;
 219 }
 220
 221 int pci_vga_init(PCIBus *bus);
 222 int isa_vga_mm_init(target_phys_addr_t vram_base,
 223                     target_phys_addr_t ctrl_base, int it_shift,
 224                     MemoryRegion *address_space);
 225
 226 /* cirrus_vga.c */
 227 void pci_cirrus_vga_init(PCIBus *bus);
 228 void isa_cirrus_vga_init(MemoryRegion *address_space);
 229
 230 /* ne2000.c */
 231 static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
 232 {
 233     ISADevice *dev;
 234
 235     qemu_check_nic_model(nd, "ne2k_isa");
 236
 237     dev = isa_try_create("ne2k_isa");
 238     if (!dev) {
 239         return false;
 240     }
 241     qdev_prop_set_uint32(&dev->qdev, "iobase", base);
 242     qdev_prop_set_uint32(&dev->qdev, "irq",    irq);
 243     qdev_set_nic_properties(&dev->qdev, nd);
 244     qdev_init_nofail(&dev->qdev);
 245     return true;
 246 }
 247
 248 /* e820 types */
 249 #define E820_RAM        1
 250 #define E820_RESERVED   2
 251 #define E820_ACPI       3
 252 #define E820_NVS        4
 253 #define E820_UNUSABLE   5
 254
 255 int e820_add_entry(uint64_t, uint64_t, uint32_t);
 256
 257 #endif