hw/tsc210x.c

   1 /*
   2  * TI TSC2102 (touchscreen/sensors/audio controller) emulator.
   3  * TI TSC2301 (touchscreen/sensors/keypad).
   4  *
   5  * Copyright (c) 2006 Andrzej Zaborowski  <balrog@zabor.org>
   6  * Copyright (C) 2008 Nokia Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 or
  11  * (at your option) version 3 of the License.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include "hw.h"
  25 #include "audio/audio.h"
  26 #include "qemu-timer.h"
  27 #include "console.h"
  28 #include "omap.h"       /* For struct i2s_codec_s and struct uwire_slave_s */
  29 #include "devices.h"
  30
  31 #define TSC_DATA_REGISTERS_PAGE         0x0
  32 #define TSC_CONTROL_REGISTERS_PAGE      0x1
  33 #define TSC_AUDIO_REGISTERS_PAGE        0x2
  34
  35 #define TSC_VERBOSE
  36
  37 #define TSC_CUT_RESOLUTION(value, p)    ((value) >> (16 - resolution[p]))
  38
  39 struct tsc210x_state_s {
  40     qemu_irq pint;
  41     qemu_irq kbint;
  42     qemu_irq davint;
  43     QEMUTimer *timer;
  44     QEMUSoundCard card;
  45     struct uwire_slave_s chip;
  46     struct i2s_codec_s codec;
  47     uint8_t in_fifo[16384];
  48     uint8_t out_fifo[16384];
  49     uint16_t model;
  50
  51     int x, y;
  52     int pressure;
  53
  54     int state, page, offset, irq;
  55     uint16_t command, dav;
  56
  57     int busy;
  58     int enabled;
  59     int host_mode;
  60     int function;
  61     int nextfunction;
  62     int precision;
  63     int nextprecision;
  64     int filter;
  65     int pin_func;
  66     int ref;
  67     int timing;
  68     int noise;
  69
  70     uint16_t audio_ctrl1;
  71     uint16_t audio_ctrl2;
  72     uint16_t audio_ctrl3;
  73     uint16_t pll[3];
  74     uint16_t volume;
  75     int64_t volume_change;
  76     int softstep;
  77     uint16_t dac_power;
  78     int64_t powerdown;
  79     uint16_t filter_data[0x14];
  80
  81     const char *name;
  82     SWVoiceIn *adc_voice[1];
  83     SWVoiceOut *dac_voice[1];
  84     int i2s_rx_rate;
  85     int i2s_tx_rate;
  86     AudioState *audio;
  87
  88     int tr[8];
  89
  90     struct {
  91         uint16_t down;
  92         uint16_t mask;
  93         int scan;
  94         int debounce;
  95         int mode;
  96         int intr;
  97     } kb;
  98 };
  99
 100 static const int resolution[4] = { 12, 8, 10, 12 };
 101
 102 #define TSC_MODE_NO_SCAN        0x0
 103 #define TSC_MODE_XY_SCAN        0x1
 104 #define TSC_MODE_XYZ_SCAN       0x2
 105 #define TSC_MODE_X              0x3
 106 #define TSC_MODE_Y              0x4
 107 #define TSC_MODE_Z              0x5
 108 #define TSC_MODE_BAT1           0x6
 109 #define TSC_MODE_BAT2           0x7
 110 #define TSC_MODE_AUX            0x8
 111 #define TSC_MODE_AUX_SCAN       0x9
 112 #define TSC_MODE_TEMP1          0xa
 113 #define TSC_MODE_PORT_SCAN      0xb
 114 #define TSC_MODE_TEMP2          0xc
 115 #define TSC_MODE_XX_DRV         0xd
 116 #define TSC_MODE_YY_DRV         0xe
 117 #define TSC_MODE_YX_DRV         0xf
 118
 119 static const uint16_t mode_regs[16] = {
 120     0x0000,     /* No scan */
 121     0x0600,     /* X, Y scan */
 122     0x0780,     /* X, Y, Z scan */
 123     0x0400,     /* X */
 124     0x0200,     /* Y */
 125     0x0180,     /* Z */
 126     0x0040,     /* BAT1 */
 127     0x0030,     /* BAT2 */
 128     0x0010,     /* AUX */
 129     0x0010,     /* AUX scan */
 130     0x0004,     /* TEMP1 */
 131     0x0070,     /* Port scan */
 132     0x0002,     /* TEMP2 */
 133     0x0000,     /* X+, X- drivers */
 134     0x0000,     /* Y+, Y- drivers */
 135     0x0000,     /* Y+, X- drivers */
 136 };
 137
 138 #define X_TRANSFORM(s)                  \
 139     ((s->y * s->tr[0] - s->x * s->tr[1]) / s->tr[2] + s->tr[3])
 140 #define Y_TRANSFORM(s)                  \
 141     ((s->y * s->tr[4] - s->x * s->tr[5]) / s->tr[6] + s->tr[7])
 142 #define Z1_TRANSFORM(s)                 \
 143     ((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4)
 144 #define Z2_TRANSFORM(s)                 \
 145     ((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4)
 146
 147 #define BAT1_VAL                        0x8660
 148 #define BAT2_VAL                        0x0000
 149 #define AUX1_VAL                        0x35c0
 150 #define AUX2_VAL                        0xffff
 151 #define TEMP1_VAL                       0x8c70
 152 #define TEMP2_VAL                       0xa5b0
 153
 154 #define TSC_POWEROFF_DELAY              50
 155 #define TSC_SOFTSTEP_DELAY              50
 156
 157 static void tsc210x_reset(struct tsc210x_state_s *s)
 158 {
 159     s->state = 0;
 160     s->pin_func = 2;
 161     s->enabled = 0;
 162     s->busy = 0;
 163     s->nextfunction = 0;
 164     s->ref = 0;
 165     s->timing = 0;
 166     s->irq = 0;
 167     s->dav = 0;
 168
 169     s->audio_ctrl1 = 0x0000;
 170     s->audio_ctrl2 = 0x4410;
 171     s->audio_ctrl3 = 0x0000;
 172     s->pll[0] = 0x1004;
 173     s->pll[1] = 0x0000;
 174     s->pll[2] = 0x1fff;
 175     s->volume = 0xffff;
 176     s->dac_power = 0x8540;
 177     s->softstep = 1;
 178     s->volume_change = 0;
 179     s->powerdown = 0;
 180     s->filter_data[0x00] = 0x6be3;
 181     s->filter_data[0x01] = 0x9666;
 182     s->filter_data[0x02] = 0x675d;
 183     s->filter_data[0x03] = 0x6be3;
 184     s->filter_data[0x04] = 0x9666;
 185     s->filter_data[0x05] = 0x675d;
 186     s->filter_data[0x06] = 0x7d83;
 187     s->filter_data[0x07] = 0x84ee;
 188     s->filter_data[0x08] = 0x7d83;
 189     s->filter_data[0x09] = 0x84ee;
 190     s->filter_data[0x0a] = 0x6be3;
 191     s->filter_data[0x0b] = 0x9666;
 192     s->filter_data[0x0c] = 0x675d;
 193     s->filter_data[0x0d] = 0x6be3;
 194     s->filter_data[0x0e] = 0x9666;
 195     s->filter_data[0x0f] = 0x675d;
 196     s->filter_data[0x10] = 0x7d83;
 197     s->filter_data[0x11] = 0x84ee;
 198     s->filter_data[0x12] = 0x7d83;
 199     s->filter_data[0x13] = 0x84ee;
 200
 201     s->i2s_tx_rate = 0;
 202     s->i2s_rx_rate = 0;
 203
 204     s->kb.scan = 1;
 205     s->kb.debounce = 0;
 206     s->kb.mask = 0x0000;
 207     s->kb.mode = 3;
 208     s->kb.intr = 0;
 209
 210     qemu_set_irq(s->pint, !s->irq);
 211     qemu_set_irq(s->davint, !s->dav);
 212     qemu_irq_raise(s->kbint);
 213 }
 214
 215 struct tsc210x_rate_info_s {
 216     int rate;
 217     int dsor;
 218     int fsref;
 219 };
 220
 221 /*  { rate,  dsor,  fsref } */
 222 static const struct tsc210x_rate_info_s tsc2101_rates[] = {
 223     /* Fsref / 6.0 */
 224     { 7350,     7,      1 },
 225     { 8000,     7,      0 },
 226     /* Fsref / 5.5 */
 227     { 8018,     6,      1 },
 228     { 8727,     6,      0 },
 229     /* Fsref / 5.0 */
 230     { 8820,     5,      1 },
 231     { 9600,     5,      0 },
 232     /* Fsref / 4.0 */
 233     { 11025,    4,      1 },
 234     { 12000,    4,      0 },
 235     /* Fsref / 3.0 */
 236     { 14700,    3,      1 },
 237     { 16000,    3,      0 },
 238     /* Fsref / 2.0 */
 239     { 22050,    2,      1 },
 240     { 24000,    2,      0 },
 241     /* Fsref / 1.5 */
 242     { 29400,    1,      1 },
 243     { 32000,    1,      0 },
 244     /* Fsref */
 245     { 44100,    0,      1 },
 246     { 48000,    0,      0 },
 247
 248     { 0,        0,      0 },
 249 };
 250
 251 /*  { rate,   dsor, fsref }     */
 252 static const struct tsc210x_rate_info_s tsc2102_rates[] = {
 253     /* Fsref / 6.0 */
 254     { 7350,     63,     1 },
 255     { 8000,     63,     0 },
 256     /* Fsref / 6.0 */
 257     { 7350,     54,     1 },
 258     { 8000,     54,     0 },
 259     /* Fsref / 5.0 */
 260     { 8820,     45,     1 },
 261     { 9600,     45,     0 },
 262     /* Fsref / 4.0 */
 263     { 11025,    36,     1 },
 264     { 12000,    36,     0 },
 265     /* Fsref / 3.0 */
 266     { 14700,    27,     1 },
 267     { 16000,    27,     0 },
 268     /* Fsref / 2.0 */
 269     { 22050,    18,     1 },
 270     { 24000,    18,     0 },
 271     /* Fsref / 1.5 */
 272     { 29400,    9,      1 },
 273     { 32000,    9,      0 },
 274     /* Fsref */
 275     { 44100,    0,      1 },
 276     { 48000,    0,      0 },
 277
 278     { 0,        0,      0 },
 279 };
 280
 281 static inline void tsc210x_out_flush(struct tsc210x_state_s *s, int len)
 282 {
 283     uint8_t *data = s->codec.out.fifo + s->codec.out.start;
 284     uint8_t *end = data + len;
 285
 286     while (data < end)
 287         data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data);
 288
 289     s->codec.out.len -= len;
 290     if (s->codec.out.len)
 291         memmove(s->codec.out.fifo, end, s->codec.out.len);
 292     s->codec.out.start = 0;
 293 }
 294
 295 static void tsc210x_audio_out_cb(struct tsc210x_state_s *s, int free_b)
 296 {
 297     if (s->codec.out.len >= free_b) {
 298         tsc210x_out_flush(s, free_b);
 299         return;
 300     }
 301
 302     s->codec.out.size = MIN(free_b, 16384);
 303     qemu_irq_raise(s->codec.tx_start);
 304 }
 305
 306 static void tsc2102_audio_rate_update(struct tsc210x_state_s *s)
 307 {
 308     const struct tsc210x_rate_info_s *rate;
 309
 310     s->codec.tx_rate = 0;
 311     s->codec.rx_rate = 0;
 312     if (s->dac_power & (1 << 15))                               /* PWDNC */
 313         return;
 314
 315     for (rate = tsc2102_rates; rate->rate; rate ++)
 316         if (rate->dsor == (s->audio_ctrl1 & 0x3f) &&            /* DACFS */
 317                         rate->fsref == ((s->audio_ctrl3 >> 13) & 1))/* REFFS */
 318             break;
 319     if (!rate->rate) {
 320         printf("%s: unknown sampling rate configured\n", __FUNCTION__);
 321         return;
 322     }
 323
 324     s->codec.tx_rate = rate->rate;
 325 }
 326
 327 static void tsc2102_audio_output_update(struct tsc210x_state_s *s)
 328 {
 329     int enable;
 330     struct audsettings fmt;
 331
 332     if (s->dac_voice[0]) {
 333         tsc210x_out_flush(s, s->codec.out.len);
 334         s->codec.out.size = 0;
 335         AUD_set_active_out(s->dac_voice[0], 0);
 336         AUD_close_out(&s->card, s->dac_voice[0]);
 337         s->dac_voice[0] = 0;
 338     }
 339     s->codec.cts = 0;
 340
 341     enable =
 342             (~s->dac_power & (1 << 15)) &&                      /* PWDNC */
 343             (~s->dac_power & (1 << 10));                        /* DAPWDN */
 344     if (!enable || !s->codec.tx_rate)
 345         return;
 346
 347     /* Force our own sampling rate even in slave DAC mode */
 348     fmt.endianness = 0;
 349     fmt.nchannels = 2;
 350     fmt.freq = s->codec.tx_rate;
 351     fmt.fmt = AUD_FMT_S16;
 352
 353     s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
 354                     "tsc2102.sink", s, (void *) tsc210x_audio_out_cb, &fmt);
 355     if (s->dac_voice[0]) {
 356         s->codec.cts = 1;
 357         AUD_set_active_out(s->dac_voice[0], 1);
 358     }
 359 }
 360
 361 static uint16_t tsc2102_data_register_read(struct tsc210x_state_s *s, int reg)
 362 {
 363     switch (reg) {
 364     case 0x00:  /* X */
 365         s->dav &= 0xfbff;
 366         return TSC_CUT_RESOLUTION(X_TRANSFORM(s), s->precision) +
 367                 (s->noise & 3);
 368
 369     case 0x01:  /* Y */
 370         s->noise ++;
 371         s->dav &= 0xfdff;
 372         return TSC_CUT_RESOLUTION(Y_TRANSFORM(s), s->precision) ^
 373                 (s->noise & 3);
 374
 375     case 0x02:  /* Z1 */
 376         s->dav &= 0xfeff;
 377         return TSC_CUT_RESOLUTION(Z1_TRANSFORM(s), s->precision) -
 378                 (s->noise & 3);
 379
 380     case 0x03:  /* Z2 */
 381         s->dav &= 0xff7f;
 382         return TSC_CUT_RESOLUTION(Z2_TRANSFORM(s), s->precision) |
 383                 (s->noise & 3);
 384
 385     case 0x04:  /* KPData */
 386         if ((s->model & 0xff00) == 0x2300) {
 387             if (s->kb.intr && (s->kb.mode & 2)) {
 388                 s->kb.intr = 0;
 389                 qemu_irq_raise(s->kbint);
 390             }
 391             return s->kb.down;
 392         }
 393
 394         return 0xffff;
 395
 396     case 0x05:  /* BAT1 */
 397         s->dav &= 0xffbf;
 398         return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision) +
 399                 (s->noise & 6);
 400
 401     case 0x06:  /* BAT2 */
 402         s->dav &= 0xffdf;
 403         return TSC_CUT_RESOLUTION(BAT2_VAL, s->precision);
 404
 405     case 0x07:  /* AUX1 */
 406         s->dav &= 0xffef;
 407         return TSC_CUT_RESOLUTION(AUX1_VAL, s->precision);
 408
 409     case 0x08:  /* AUX2 */
 410         s->dav &= 0xfff7;
 411         return 0xffff;
 412
 413     case 0x09:  /* TEMP1 */
 414         s->dav &= 0xfffb;
 415         return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) -
 416                 (s->noise & 5);
 417
 418     case 0x0a:  /* TEMP2 */
 419         s->dav &= 0xfffd;
 420         return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^
 421                 (s->noise & 3);
 422
 423     case 0x0b:  /* DAC */
 424         s->dav &= 0xfffe;
 425         return 0xffff;
 426
 427     default:
 428 #ifdef TSC_VERBOSE
 429         fprintf(stderr, "tsc2102_data_register_read: "
 430                         "no such register: 0x%02x\n", reg);
 431 #endif
 432         return 0xffff;
 433     }
 434 }
 435
 436 static uint16_t tsc2102_control_register_read(
 437                 struct tsc210x_state_s *s, int reg)
 438 {
 439     switch (reg) {
 440     case 0x00:  /* TSC ADC */
 441         return (s->pressure << 15) | ((!s->busy) << 14) |
 442                 (s->nextfunction << 10) | (s->nextprecision << 8) | s->filter;
 443
 444     case 0x01:  /* Status / Keypad Control */
 445         if ((s->model & 0xff00) == 0x2100)
 446             return (s->pin_func << 14) | ((!s->enabled) << 13) |
 447                     (s->host_mode << 12) | ((!!s->dav) << 11) | s->dav;
 448         else
 449             return (s->kb.intr << 15) | ((s->kb.scan || !s->kb.down) << 14) |
 450                     (s->kb.debounce << 11);
 451
 452     case 0x02:  /* DAC Control */
 453         if ((s->model & 0xff00) == 0x2300)
 454             return s->dac_power & 0x8000;
 455         else
 456             goto bad_reg;
 457
 458     case 0x03:  /* Reference */
 459         return s->ref;
 460
 461     case 0x04:  /* Reset */
 462         return 0xffff;
 463
 464     case 0x05:  /* Configuration */
 465         return s->timing;
 466
 467     case 0x06:  /* Secondary configuration */
 468         if ((s->model & 0xff00) == 0x2100)
 469             goto bad_reg;
 470         return ((!s->dav) << 15) | ((s->kb.mode & 1) << 14) | s->pll[2];
 471
 472     case 0x10:  /* Keypad Mask */
 473         if ((s->model & 0xff00) == 0x2100)
 474             goto bad_reg;
 475         return s->kb.mask;
 476
 477     default:
 478     bad_reg:
 479 #ifdef TSC_VERBOSE
 480         fprintf(stderr, "tsc2102_control_register_read: "
 481                         "no such register: 0x%02x\n", reg);
 482 #endif
 483         return 0xffff;
 484     }
 485 }
 486
 487 static uint16_t tsc2102_audio_register_read(struct tsc210x_state_s *s, int reg)
 488 {
 489     int l_ch, r_ch;
 490     uint16_t val;
 491
 492     switch (reg) {
 493     case 0x00:  /* Audio Control 1 */
 494         return s->audio_ctrl1;
 495
 496     case 0x01:
 497         return 0xff00;
 498
 499     case 0x02:  /* DAC Volume Control */
 500         return s->volume;
 501
 502     case 0x03:
 503         return 0x8b00;
 504
 505     case 0x04:  /* Audio Control 2 */
 506         l_ch = 1;
 507         r_ch = 1;
 508         if (s->softstep && !(s->dac_power & (1 << 10))) {
 509             l_ch = (qemu_get_clock(vm_clock) >
 510                             s->volume_change + TSC_SOFTSTEP_DELAY);
 511             r_ch = (qemu_get_clock(vm_clock) >
 512                             s->volume_change + TSC_SOFTSTEP_DELAY);
 513         }
 514
 515         return s->audio_ctrl2 | (l_ch << 3) | (r_ch << 2);
 516
 517     case 0x05:  /* Stereo DAC Power Control */
 518         return 0x2aa0 | s->dac_power |
 519                 (((s->dac_power & (1 << 10)) &&
 520                   (qemu_get_clock(vm_clock) >
 521                    s->powerdown + TSC_POWEROFF_DELAY)) << 6);
 522
 523     case 0x06:  /* Audio Control 3 */
 524         val = s->audio_ctrl3 | 0x0001;
 525         s->audio_ctrl3 &= 0xff3f;
 526         return val;
 527
 528     case 0x07:  /* LCH_BASS_BOOST_N0 */
 529     case 0x08:  /* LCH_BASS_BOOST_N1 */
 530     case 0x09:  /* LCH_BASS_BOOST_N2 */
 531     case 0x0a:  /* LCH_BASS_BOOST_N3 */
 532     case 0x0b:  /* LCH_BASS_BOOST_N4 */
 533     case 0x0c:  /* LCH_BASS_BOOST_N5 */
 534     case 0x0d:  /* LCH_BASS_BOOST_D1 */
 535     case 0x0e:  /* LCH_BASS_BOOST_D2 */
 536     case 0x0f:  /* LCH_BASS_BOOST_D4 */
 537     case 0x10:  /* LCH_BASS_BOOST_D5 */
 538     case 0x11:  /* RCH_BASS_BOOST_N0 */
 539     case 0x12:  /* RCH_BASS_BOOST_N1 */
 540     case 0x13:  /* RCH_BASS_BOOST_N2 */
 541     case 0x14:  /* RCH_BASS_BOOST_N3 */
 542     case 0x15:  /* RCH_BASS_BOOST_N4 */
 543     case 0x16:  /* RCH_BASS_BOOST_N5 */
 544     case 0x17:  /* RCH_BASS_BOOST_D1 */
 545     case 0x18:  /* RCH_BASS_BOOST_D2 */
 546     case 0x19:  /* RCH_BASS_BOOST_D4 */
 547     case 0x1a:  /* RCH_BASS_BOOST_D5 */
 548         return s->filter_data[reg - 0x07];
 549
 550     case 0x1b:  /* PLL Programmability 1 */
 551         return s->pll[0];
 552
 553     case 0x1c:  /* PLL Programmability 2 */
 554         return s->pll[1];
 555
 556     case 0x1d:  /* Audio Control 4 */
 557         return (!s->softstep) << 14;
 558
 559     default:
 560 #ifdef TSC_VERBOSE
 561         fprintf(stderr, "tsc2102_audio_register_read: "
 562                         "no such register: 0x%02x\n", reg);
 563 #endif
 564         return 0xffff;
 565     }
 566 }
 567
 568 static void tsc2102_data_register_write(
 569                 struct tsc210x_state_s *s, int reg, uint16_t value)
 570 {
 571     switch (reg) {
 572     case 0x00:  /* X */
 573     case 0x01:  /* Y */
 574     case 0x02:  /* Z1 */
 575     case 0x03:  /* Z2 */
 576     case 0x05:  /* BAT1 */
 577     case 0x06:  /* BAT2 */
 578     case 0x07:  /* AUX1 */
 579     case 0x08:  /* AUX2 */
 580     case 0x09:  /* TEMP1 */
 581     case 0x0a:  /* TEMP2 */
 582         return;
 583
 584     default:
 585 #ifdef TSC_VERBOSE
 586         fprintf(stderr, "tsc2102_data_register_write: "
 587                         "no such register: 0x%02x\n", reg);
 588 #endif
 589     }
 590 }
 591
 592 static void tsc2102_control_register_write(
 593                 struct tsc210x_state_s *s, int reg, uint16_t value)
 594 {
 595     switch (reg) {
 596     case 0x00:  /* TSC ADC */
 597         s->host_mode = value >> 15;
 598         s->enabled = !(value & 0x4000);
 599         if (s->busy && !s->enabled)
 600             qemu_del_timer(s->timer);
 601         s->busy &= s->enabled;
 602         s->nextfunction = (value >> 10) & 0xf;
 603         s->nextprecision = (value >> 8) & 3;
 604         s->filter = value & 0xff;
 605         return;
 606
 607     case 0x01:  /* Status / Keypad Control */
 608         if ((s->model & 0xff00) == 0x2100)
 609             s->pin_func = value >> 14;
 610         else {
 611             s->kb.scan = (value >> 14) & 1;
 612             s->kb.debounce = (value >> 11) & 7;
 613             if (s->kb.intr && s->kb.scan) {
 614                 s->kb.intr = 0;
 615                 qemu_irq_raise(s->kbint);
 616             }
 617         }
 618         return;
 619
 620     case 0x02:  /* DAC Control */
 621         if ((s->model & 0xff00) == 0x2300) {
 622             s->dac_power &= 0x7fff;
 623             s->dac_power |= 0x8000 & value;
 624         } else
 625             goto bad_reg;
 626         break;
 627
 628     case 0x03:  /* Reference */
 629         s->ref = value & 0x1f;
 630         return;
 631
 632     case 0x04:  /* Reset */
 633         if (value == 0xbb00) {
 634             if (s->busy)
 635                 qemu_del_timer(s->timer);
 636             tsc210x_reset(s);
 637 #ifdef TSC_VERBOSE
 638         } else {
 639             fprintf(stderr, "tsc2102_control_register_write: "
 640                             "wrong value written into RESET\n");
 641 #endif
 642         }
 643         return;
 644
 645     case 0x05:  /* Configuration */
 646         s->timing = value & 0x3f;
 647 #ifdef TSC_VERBOSE
 648         if (value & ~0x3f)
 649             fprintf(stderr, "tsc2102_control_register_write: "
 650                             "wrong value written into CONFIG\n");
 651 #endif
 652         return;
 653
 654     case 0x06:  /* Secondary configuration */
 655         if ((s->model & 0xff00) == 0x2100)
 656             goto bad_reg;
 657         s->kb.mode = value >> 14;
 658         s->pll[2] = value & 0x3ffff;
 659         return;
 660
 661     case 0x10:  /* Keypad Mask */
 662         if ((s->model & 0xff00) == 0x2100)
 663             goto bad_reg;
 664         s->kb.mask = value;
 665         return;
 666
 667     default:
 668     bad_reg:
 669 #ifdef TSC_VERBOSE
 670         fprintf(stderr, "tsc2102_control_register_write: "
 671                         "no such register: 0x%02x\n", reg);
 672 #endif
 673     }
 674 }
 675
 676 static void tsc2102_audio_register_write(
 677                 struct tsc210x_state_s *s, int reg, uint16_t value)
 678 {
 679     switch (reg) {
 680     case 0x00:  /* Audio Control 1 */
 681         s->audio_ctrl1 = value & 0x0f3f;
 682 #ifdef TSC_VERBOSE
 683         if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7)))
 684             fprintf(stderr, "tsc2102_audio_register_write: "
 685                             "wrong value written into Audio 1\n");
 686 #endif
 687         tsc2102_audio_rate_update(s);
 688         if (s->audio)
 689             tsc2102_audio_output_update(s);
 690         return;
 691
 692     case 0x01:
 693 #ifdef TSC_VERBOSE
 694         if (value != 0xff00)
 695             fprintf(stderr, "tsc2102_audio_register_write: "
 696                             "wrong value written into reg 0x01\n");
 697 #endif
 698         return;
 699
 700     case 0x02:  /* DAC Volume Control */
 701         s->volume = value;
 702         s->volume_change = qemu_get_clock(vm_clock);
 703         return;
 704
 705     case 0x03:
 706 #ifdef TSC_VERBOSE
 707         if (value != 0x8b00)
 708             fprintf(stderr, "tsc2102_audio_register_write: "
 709                             "wrong value written into reg 0x03\n");
 710 #endif
 711         return;
 712
 713     case 0x04:  /* Audio Control 2 */
 714         s->audio_ctrl2 = value & 0xf7f2;
 715 #ifdef TSC_VERBOSE
 716         if (value & ~0xf7fd)
 717             fprintf(stderr, "tsc2102_audio_register_write: "
 718                             "wrong value written into Audio 2\n");
 719 #endif
 720         return;
 721
 722     case 0x05:  /* Stereo DAC Power Control */
 723         if ((value & ~s->dac_power) & (1 << 10))
 724             s->powerdown = qemu_get_clock(vm_clock);
 725
 726         s->dac_power = value & 0x9543;
 727 #ifdef TSC_VERBOSE
 728         if ((value & ~0x9543) != 0x2aa0)
 729             fprintf(stderr, "tsc2102_audio_register_write: "
 730                             "wrong value written into Power\n");
 731 #endif
 732         tsc2102_audio_rate_update(s);
 733         if (s->audio)
 734             tsc2102_audio_output_update(s);
 735         return;
 736
 737     case 0x06:  /* Audio Control 3 */
 738         s->audio_ctrl3 &= 0x00c0;
 739         s->audio_ctrl3 |= value & 0xf800;
 740 #ifdef TSC_VERBOSE
 741         if (value & ~0xf8c7)
 742             fprintf(stderr, "tsc2102_audio_register_write: "
 743                             "wrong value written into Audio 3\n");
 744 #endif
 745         if (s->audio)
 746             tsc2102_audio_output_update(s);
 747         return;
 748
 749     case 0x07:  /* LCH_BASS_BOOST_N0 */
 750     case 0x08:  /* LCH_BASS_BOOST_N1 */
 751     case 0x09:  /* LCH_BASS_BOOST_N2 */
 752     case 0x0a:  /* LCH_BASS_BOOST_N3 */
 753     case 0x0b:  /* LCH_BASS_BOOST_N4 */
 754     case 0x0c:  /* LCH_BASS_BOOST_N5 */
 755     case 0x0d:  /* LCH_BASS_BOOST_D1 */
 756     case 0x0e:  /* LCH_BASS_BOOST_D2 */
 757     case 0x0f:  /* LCH_BASS_BOOST_D4 */
 758     case 0x10:  /* LCH_BASS_BOOST_D5 */
 759     case 0x11:  /* RCH_BASS_BOOST_N0 */
 760     case 0x12:  /* RCH_BASS_BOOST_N1 */
 761     case 0x13:  /* RCH_BASS_BOOST_N2 */
 762     case 0x14:  /* RCH_BASS_BOOST_N3 */
 763     case 0x15:  /* RCH_BASS_BOOST_N4 */
 764     case 0x16:  /* RCH_BASS_BOOST_N5 */
 765     case 0x17:  /* RCH_BASS_BOOST_D1 */
 766     case 0x18:  /* RCH_BASS_BOOST_D2 */
 767     case 0x19:  /* RCH_BASS_BOOST_D4 */
 768     case 0x1a:  /* RCH_BASS_BOOST_D5 */
 769         s->filter_data[reg - 0x07] = value;
 770         return;
 771
 772     case 0x1b:  /* PLL Programmability 1 */
 773         s->pll[0] = value & 0xfffc;
 774 #ifdef TSC_VERBOSE
 775         if (value & ~0xfffc)
 776             fprintf(stderr, "tsc2102_audio_register_write: "
 777                             "wrong value written into PLL 1\n");
 778 #endif
 779         return;
 780
 781     case 0x1c:  /* PLL Programmability 2 */
 782         s->pll[1] = value & 0xfffc;
 783 #ifdef TSC_VERBOSE
 784         if (value & ~0xfffc)
 785             fprintf(stderr, "tsc2102_audio_register_write: "
 786                             "wrong value written into PLL 2\n");
 787 #endif
 788         return;
 789
 790     case 0x1d:  /* Audio Control 4 */
 791         s->softstep = !(value & 0x4000);
 792 #ifdef TSC_VERBOSE
 793         if (value & ~0x4000)
 794             fprintf(stderr, "tsc2102_audio_register_write: "
 795                             "wrong value written into Audio 4\n");
 796 #endif
 797         return;
 798
 799     default:
 800 #ifdef TSC_VERBOSE
 801         fprintf(stderr, "tsc2102_audio_register_write: "
 802                         "no such register: 0x%02x\n", reg);
 803 #endif
 804     }
 805 }
 806
 807 /* This handles most of the chip logic.  */
 808 static void tsc210x_pin_update(struct tsc210x_state_s *s)
 809 {
 810     int64_t expires;
 811     int pin_state;
 812
 813     switch (s->pin_func) {
 814     case 0:
 815         pin_state = s->pressure;
 816         break;
 817     case 1:
 818         pin_state = !!s->dav;
 819         break;
 820     case 2:
 821     default:
 822         pin_state = s->pressure && !s->dav;
 823     }
 824
 825     if (!s->enabled)
 826         pin_state = 0;
 827
 828     if (pin_state != s->irq) {
 829         s->irq = pin_state;
 830         qemu_set_irq(s->pint, !s->irq);
 831     }
 832
 833     switch (s->nextfunction) {
 834     case TSC_MODE_XY_SCAN:
 835     case TSC_MODE_XYZ_SCAN:
 836         if (!s->pressure)
 837             return;
 838         break;
 839
 840     case TSC_MODE_X:
 841     case TSC_MODE_Y:
 842     case TSC_MODE_Z:
 843         if (!s->pressure)
 844             return;
 845         /* Fall through */
 846     case TSC_MODE_BAT1:
 847     case TSC_MODE_BAT2:
 848     case TSC_MODE_AUX:
 849     case TSC_MODE_TEMP1:
 850     case TSC_MODE_TEMP2:
 851         if (s->dav)
 852             s->enabled = 0;
 853         break;
 854
 855     case TSC_MODE_AUX_SCAN:
 856     case TSC_MODE_PORT_SCAN:
 857         break;
 858
 859     case TSC_MODE_NO_SCAN:
 860     case TSC_MODE_XX_DRV:
 861     case TSC_MODE_YY_DRV:
 862     case TSC_MODE_YX_DRV:
 863     default:
 864         return;
 865     }
 866
 867     if (!s->enabled || s->busy || s->dav)
 868         return;
 869
 870     s->busy = 1;
 871     s->precision = s->nextprecision;
 872     s->function = s->nextfunction;
 873     expires = qemu_get_clock(vm_clock) + (ticks_per_sec >> 10);
 874     qemu_mod_timer(s->timer, expires);
 875 }
 876
 877 static uint16_t tsc210x_read(struct tsc210x_state_s *s)
 878 {
 879     uint16_t ret = 0x0000;
 880
 881     if (!s->command)
 882         fprintf(stderr, "tsc210x_read: SPI underrun!\n");
 883
 884     switch (s->page) {
 885     case TSC_DATA_REGISTERS_PAGE:
 886         ret = tsc2102_data_register_read(s, s->offset);
 887         if (!s->dav)
 888             qemu_irq_raise(s->davint);
 889         break;
 890     case TSC_CONTROL_REGISTERS_PAGE:
 891         ret = tsc2102_control_register_read(s, s->offset);
 892         break;
 893     case TSC_AUDIO_REGISTERS_PAGE:
 894         ret = tsc2102_audio_register_read(s, s->offset);
 895         break;
 896     default:
 897         cpu_abort(cpu_single_env, "tsc210x_read: wrong memory page\n");
 898     }
 899
 900     tsc210x_pin_update(s);
 901
 902     /* Allow sequential reads.  */
 903     s->offset ++;
 904     s->state = 0;
 905     return ret;
 906 }
 907
 908 static void tsc210x_write(struct tsc210x_state_s *s, uint16_t value)
 909 {
 910     /*
 911      * This is a two-state state machine for reading
 912      * command and data every second time.
 913      */
 914     if (!s->state) {
 915         s->command = value >> 15;
 916         s->page = (value >> 11) & 0x0f;
 917         s->offset = (value >> 5) & 0x3f;
 918         s->state = 1;
 919     } else {
 920         if (s->command)
 921             fprintf(stderr, "tsc210x_write: SPI overrun!\n");
 922         else
 923             switch (s->page) {
 924             case TSC_DATA_REGISTERS_PAGE:
 925                 tsc2102_data_register_write(s, s->offset, value);
 926                 break;
 927             case TSC_CONTROL_REGISTERS_PAGE:
 928                 tsc2102_control_register_write(s, s->offset, value);
 929                 break;
 930             case TSC_AUDIO_REGISTERS_PAGE:
 931                 tsc2102_audio_register_write(s, s->offset, value);
 932                 break;
 933             default:
 934                 cpu_abort(cpu_single_env,
 935                                 "tsc210x_write: wrong memory page\n");
 936             }
 937
 938         tsc210x_pin_update(s);
 939         s->state = 0;
 940     }
 941 }
 942
 943 uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len)
 944 {
 945     struct tsc210x_state_s *s = opaque;
 946     uint32_t ret = 0;
 947
 948     if (len != 16)
 949         cpu_abort(cpu_single_env, "%s: FIXME: bad SPI word width %i\n",
 950                         __FUNCTION__, len);
 951
 952     /* TODO: sequential reads etc - how do we make sure the host doesn't
 953      * unintentionally read out a conversion result from a register while
 954      * transmitting the command word of the next command?  */
 955     if (!value || (s->state && s->command))
 956         ret = tsc210x_read(s);
 957     if (value || (s->state && !s->command))
 958         tsc210x_write(s, value);
 959
 960     return ret;
 961 }
 962
 963 static void tsc210x_timer_tick(void *opaque)
 964 {
 965     struct tsc210x_state_s *s = opaque;
 966
 967     /* Timer ticked -- a set of conversions has been finished.  */
 968
 969     if (!s->busy)
 970         return;
 971
 972     s->busy = 0;
 973     s->dav |= mode_regs[s->function];
 974     tsc210x_pin_update(s);
 975     qemu_irq_lower(s->davint);
 976 }
 977
 978 static void tsc210x_touchscreen_event(void *opaque,
 979                 int x, int y, int z, int buttons_state)
 980 {
 981     struct tsc210x_state_s *s = opaque;
 982     int p = s->pressure;
 983
 984     if (buttons_state) {
 985         s->x = x;
 986         s->y = y;
 987     }
 988     s->pressure = !!buttons_state;
 989
 990     /*
 991      * Note: We would get better responsiveness in the guest by
 992      * signaling TS events immediately, but for now we simulate
 993      * the first conversion delay for sake of correctness.
 994      */
 995     if (p != s->pressure)
 996         tsc210x_pin_update(s);
 997 }
 998
 999 static void tsc210x_i2s_swallow(struct tsc210x_state_s *s)
1000 {
1001     if (s->dac_voice[0])
1002         tsc210x_out_flush(s, s->codec.out.len);
1003     else
1004         s->codec.out.len = 0;
1005 }
1006
1007 static void tsc210x_i2s_set_rate(struct tsc210x_state_s *s, int in, int out)
1008 {
1009     s->i2s_tx_rate = out;
1010     s->i2s_rx_rate = in;
1011 }
1012
1013 static void tsc210x_save(QEMUFile *f, void *opaque)
1014 {
1015     struct tsc210x_state_s *s = (struct tsc210x_state_s *) opaque;
1016     int64_t now = qemu_get_clock(vm_clock);
1017     int i;
1018
1019     qemu_put_be16(f, s->x);
1020     qemu_put_be16(f, s->y);
1021     qemu_put_byte(f, s->pressure);
1022
1023     qemu_put_byte(f, s->state);
1024     qemu_put_byte(f, s->page);
1025     qemu_put_byte(f, s->offset);
1026     qemu_put_byte(f, s->command);
1027
1028     qemu_put_byte(f, s->irq);
1029     qemu_put_be16s(f, &s->dav);
1030
1031     qemu_put_timer(f, s->timer);
1032     qemu_put_byte(f, s->enabled);
1033     qemu_put_byte(f, s->host_mode);
1034     qemu_put_byte(f, s->function);
1035     qemu_put_byte(f, s->nextfunction);
1036     qemu_put_byte(f, s->precision);
1037     qemu_put_byte(f, s->nextprecision);
1038     qemu_put_byte(f, s->filter);
1039     qemu_put_byte(f, s->pin_func);
1040     qemu_put_byte(f, s->ref);
1041     qemu_put_byte(f, s->timing);
1042     qemu_put_be32(f, s->noise);
1043
1044     qemu_put_be16s(f, &s->audio_ctrl1);
1045     qemu_put_be16s(f, &s->audio_ctrl2);
1046     qemu_put_be16s(f, &s->audio_ctrl3);
1047     qemu_put_be16s(f, &s->pll[0]);
1048     qemu_put_be16s(f, &s->pll[1]);
1049     qemu_put_be16s(f, &s->volume);
1050     qemu_put_sbe64(f, (s->volume_change - now));
1051     qemu_put_sbe64(f, (s->powerdown - now));
1052     qemu_put_byte(f, s->softstep);
1053     qemu_put_be16s(f, &s->dac_power);
1054
1055     for (i = 0; i < 0x14; i ++)
1056         qemu_put_be16s(f, &s->filter_data[i]);
1057 }
1058
1059 static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
1060 {
1061     struct tsc210x_state_s *s = (struct tsc210x_state_s *) opaque;
1062     int64_t now = qemu_get_clock(vm_clock);
1063     int i;
1064
1065     s->x = qemu_get_be16(f);
1066     s->y = qemu_get_be16(f);
1067     s->pressure = qemu_get_byte(f);
1068
1069     s->state = qemu_get_byte(f);
1070     s->page = qemu_get_byte(f);
1071     s->offset = qemu_get_byte(f);
1072     s->command = qemu_get_byte(f);
1073
1074     s->irq = qemu_get_byte(f);
1075     qemu_get_be16s(f, &s->dav);
1076
1077     qemu_get_timer(f, s->timer);
1078     s->enabled = qemu_get_byte(f);
1079     s->host_mode = qemu_get_byte(f);
1080     s->function = qemu_get_byte(f);
1081     s->nextfunction = qemu_get_byte(f);
1082     s->precision = qemu_get_byte(f);
1083     s->nextprecision = qemu_get_byte(f);
1084     s->filter = qemu_get_byte(f);
1085     s->pin_func = qemu_get_byte(f);
1086     s->ref = qemu_get_byte(f);
1087     s->timing = qemu_get_byte(f);
1088     s->noise = qemu_get_be32(f);
1089
1090     qemu_get_be16s(f, &s->audio_ctrl1);
1091     qemu_get_be16s(f, &s->audio_ctrl2);
1092     qemu_get_be16s(f, &s->audio_ctrl3);
1093     qemu_get_be16s(f, &s->pll[0]);
1094     qemu_get_be16s(f, &s->pll[1]);
1095     qemu_get_be16s(f, &s->volume);
1096     s->volume_change = qemu_get_sbe64(f) + now;
1097     s->powerdown = qemu_get_sbe64(f) + now;
1098     s->softstep = qemu_get_byte(f);
1099     qemu_get_be16s(f, &s->dac_power);
1100
1101     for (i = 0; i < 0x14; i ++)
1102         qemu_get_be16s(f, &s->filter_data[i]);
1103
1104     s->busy = qemu_timer_pending(s->timer);
1105     qemu_set_irq(s->pint, !s->irq);
1106     qemu_set_irq(s->davint, !s->dav);
1107
1108     return 0;
1109 }
1110
1111 struct uwire_slave_s *tsc2102_init(qemu_irq pint, AudioState *audio)
1112 {
1113     struct tsc210x_state_s *s;
1114
1115     s = (struct tsc210x_state_s *)
1116             qemu_mallocz(sizeof(struct tsc210x_state_s));
1117     memset(s, 0, sizeof(struct tsc210x_state_s));
1118     s->x = 160;
1119     s->y = 160;
1120     s->pressure = 0;
1121     s->precision = s->nextprecision = 0;
1122     s->timer = qemu_new_timer(vm_clock, tsc210x_timer_tick, s);
1123     s->pint = pint;
1124     s->model = 0x2102;
1125     s->name = "tsc2102";
1126     s->audio = audio;
1127
1128     s->tr[0] = 0;
1129     s->tr[1] = 1;
1130     s->tr[2] = 1;
1131     s->tr[3] = 0;
1132     s->tr[4] = 1;
1133     s->tr[5] = 0;
1134     s->tr[6] = 1;
1135     s->tr[7] = 0;
1136
1137     s->chip.opaque = s;
1138     s->chip.send = (void *) tsc210x_write;
1139     s->chip.receive = (void *) tsc210x_read;
1140
1141     s->codec.opaque = s;
1142     s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
1143     s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
1144     s->codec.in.fifo = s->in_fifo;
1145     s->codec.out.fifo = s->out_fifo;
1146
1147     tsc210x_reset(s);
1148
1149     qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
1150                     "QEMU TSC2102-driven Touchscreen");
1151
1152     if (s->audio)
1153         AUD_register_card(s->audio, s->name, &s->card);
1154
1155     qemu_register_reset((void *) tsc210x_reset, s);
1156     register_savevm(s->name, -1, 0,
1157                     tsc210x_save, tsc210x_load, s);
1158
1159     return &s->chip;
1160 }
1161
1162 struct uwire_slave_s *tsc2301_init(qemu_irq penirq, qemu_irq kbirq,
1163                 qemu_irq dav, AudioState *audio)
1164 {
1165     struct tsc210x_state_s *s;
1166
1167     s = (struct tsc210x_state_s *)
1168             qemu_mallocz(sizeof(struct tsc210x_state_s));
1169     memset(s, 0, sizeof(struct tsc210x_state_s));
1170     s->x = 400;
1171     s->y = 240;
1172     s->pressure = 0;
1173     s->precision = s->nextprecision = 0;
1174     s->timer = qemu_new_timer(vm_clock, tsc210x_timer_tick, s);
1175     s->pint = penirq;
1176     s->kbint = kbirq;
1177     s->davint = dav;
1178     s->model = 0x2301;
1179     s->name = "tsc2301";
1180     s->audio = audio;
1181
1182     s->tr[0] = 0;
1183     s->tr[1] = 1;
1184     s->tr[2] = 1;
1185     s->tr[3] = 0;
1186     s->tr[4] = 1;
1187     s->tr[5] = 0;
1188     s->tr[6] = 1;
1189     s->tr[7] = 0;
1190
1191     s->chip.opaque = s;
1192     s->chip.send = (void *) tsc210x_write;
1193     s->chip.receive = (void *) tsc210x_read;
1194
1195     s->codec.opaque = s;
1196     s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
1197     s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
1198     s->codec.in.fifo = s->in_fifo;
1199     s->codec.out.fifo = s->out_fifo;
1200
1201     tsc210x_reset(s);
1202
1203     qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
1204                     "QEMU TSC2301-driven Touchscreen");
1205
1206     if (s->audio)
1207         AUD_register_card(s->audio, s->name, &s->card);
1208
1209     qemu_register_reset((void *) tsc210x_reset, s);
1210     register_savevm(s->name, -1, 0, tsc210x_save, tsc210x_load, s);
1211
1212     return &s->chip;
1213 }
1214
1215 struct i2s_codec_s *tsc210x_codec(struct uwire_slave_s *chip)
1216 {
1217     struct tsc210x_state_s *s = (struct tsc210x_state_s *) chip->opaque;
1218
1219     return &s->codec;
1220 }
1221
1222 /*
1223  * Use tslib generated calibration data to generate ADC input values
1224  * from the touchscreen.  Assuming 12-bit precision was used during
1225  * tslib calibration.
1226  */
1227 void tsc210x_set_transform(struct uwire_slave_s *chip,
1228                 struct mouse_transform_info_s *info)
1229 {
1230     struct tsc210x_state_s *s = (struct tsc210x_state_s *) chip->opaque;
1231 #if 0
1232     int64_t ltr[8];
1233
1234     ltr[0] = (int64_t) info->a[1] * info->y;
1235     ltr[1] = (int64_t) info->a[4] * info->x;
1236     ltr[2] = (int64_t) info->a[1] * info->a[3] -
1237             (int64_t) info->a[4] * info->a[0];
1238     ltr[3] = (int64_t) info->a[2] * info->a[4] -
1239             (int64_t) info->a[5] * info->a[1];
1240     ltr[4] = (int64_t) info->a[0] * info->y;
1241     ltr[5] = (int64_t) info->a[3] * info->x;
1242     ltr[6] = (int64_t) info->a[4] * info->a[0] -
1243             (int64_t) info->a[1] * info->a[3];
1244     ltr[7] = (int64_t) info->a[2] * info->a[3] -
1245             (int64_t) info->a[5] * info->a[0];
1246
1247     /* Avoid integer overflow */
1248     s->tr[0] = ltr[0] >> 11;
1249     s->tr[1] = ltr[1] >> 11;
1250     s->tr[2] = muldiv64(ltr[2], 1, info->a[6]);
1251     s->tr[3] = muldiv64(ltr[3], 1 << 4, ltr[2]);
1252     s->tr[4] = ltr[4] >> 11;
1253     s->tr[5] = ltr[5] >> 11;
1254     s->tr[6] = muldiv64(ltr[6], 1, info->a[6]);
1255     s->tr[7] = muldiv64(ltr[7], 1 << 4, ltr[6]);
1256 #else
1257
1258     /* This version assumes touchscreen X & Y axis are parallel or
1259      * perpendicular to LCD's  X & Y axis in some way.  */
1260     if (abs(info->a[0]) > abs(info->a[1])) {
1261         s->tr[0] = 0;
1262         s->tr[1] = -info->a[6] * info->x;
1263         s->tr[2] = info->a[0];
1264         s->tr[3] = -info->a[2] / info->a[0];
1265         s->tr[4] = info->a[6] * info->y;
1266         s->tr[5] = 0;
1267         s->tr[6] = info->a[4];
1268         s->tr[7] = -info->a[5] / info->a[4];
1269     } else {
1270         s->tr[0] = info->a[6] * info->y;
1271         s->tr[1] = 0;
1272         s->tr[2] = info->a[1];
1273         s->tr[3] = -info->a[2] / info->a[1];
1274         s->tr[4] = 0;
1275         s->tr[5] = -info->a[6] * info->x;
1276         s->tr[6] = info->a[3];
1277         s->tr[7] = -info->a[5] / info->a[3];
1278     }
1279
1280     s->tr[0] >>= 11;
1281     s->tr[1] >>= 11;
1282     s->tr[3] <<= 4;
1283     s->tr[4] >>= 11;
1284     s->tr[5] >>= 11;
1285     s->tr[7] <<= 4;
1286 #endif
1287 }
1288
1289 void tsc210x_key_event(struct uwire_slave_s *chip, int key, int down)
1290 {
1291     struct tsc210x_state_s *s = (struct tsc210x_state_s *) chip->opaque;
1292
1293     if (down)
1294         s->kb.down |= 1 << key;
1295     else
1296         s->kb.down &= ~(1 << key);
1297
1298     if (down && (s->kb.down & ~s->kb.mask) && !s->kb.intr) {
1299         s->kb.intr = 1;
1300         qemu_irq_lower(s->kbint);
1301     } else if (s->kb.intr && !(s->kb.down & ~s->kb.mask) &&
1302                     !(s->kb.mode & 1)) {
1303         s->kb.intr = 0;
1304         qemu_irq_raise(s->kbint);
1305     }
1306 }