2 * This software is part of the SBCL system. See the README file for
5 * This software is derived from the CMU CL system, which was
6 * written at Carnegie Mellon University and released into the
7 * public domain. The software is in the public domain and is
8 * provided with absolutely no warranty. See the COPYING and CREDITS
9 * files for more information.
22 #include "interrupt.h"
24 #include "breakpoint.h"
27 #ifdef LISP_FEATURE_LINUX
28 extern int linux_sparc_siginfo_bug
;
36 os_vm_address_t
arch_get_bad_addr(int sig
, siginfo_t
*code
, os_context_t
*context
)
42 pc
= (unsigned int *)(*os_context_pc_addr(context
));
44 /* On the sparc, we have to decode the instruction. */
46 /* Make sure it's not the pc thats bogus, and that it was lisp code */
47 /* that caused the fault. */
48 if ((unsigned long) pc
& 3) {
52 if ((pc
< READ_ONLY_SPACE_START
||
53 pc
>= READ_ONLY_SPACE_START
+READ_ONLY_SPACE_SIZE
) &&
54 (pc
< current_dynamic_space
||
55 pc
>= current_dynamic_space
+ DYNAMIC_SPACE_SIZE
)) {
61 if ((badinst
>> 30) != 3)
62 /* All load/store instructions have op = 11 (binary) */
65 rs1
= (badinst
>>14)&0x1f;
67 if (badinst
& (1<<13)) {
68 /* r[rs1] + simm(13) */
69 int simm13
= badinst
& 0x1fff;
74 return (os_vm_address_t
)
75 (*os_context_register_addr(context
, rs1
)+simm13
);
79 int rs2
= badinst
& 0x1f;
81 return (os_vm_address_t
)
82 (*os_context_register_addr(context
, rs1
) +
83 *os_context_register_addr(context
, rs2
));
87 void arch_skip_instruction(os_context_t
*context
)
89 ((char *) *os_context_pc_addr(context
)) = ((char *) *os_context_npc_addr(context
));
90 ((char *) *os_context_npc_addr(context
)) += 4;
93 unsigned char *arch_internal_error_arguments(os_context_t
*context
)
95 return (unsigned char *)(*os_context_pc_addr(context
) + 4);
98 boolean
arch_pseudo_atomic_atomic(os_context_t
*context
)
100 return ((*os_context_register_addr(context
,reg_ALLOC
)) & 4);
103 void arch_set_pseudo_atomic_interrupted(os_context_t
*context
)
105 *os_context_register_addr(context
,reg_ALLOC
) |= 1;
108 void arch_clear_pseudo_atomic_interrupted(os_context_t
*context
)
110 *os_context_register_addr(context
,reg_ALLOC
) &= ~1;
113 unsigned int arch_install_breakpoint(void *pc
)
115 unsigned int *ptr
= (unsigned int *)pc
;
116 unsigned int result
= *ptr
;
117 *ptr
= trap_Breakpoint
;
119 os_flush_icache((os_vm_address_t
) pc
, sizeof(unsigned int));
124 void arch_remove_breakpoint(void *pc
, unsigned int orig_inst
)
126 *(unsigned int *)pc
= orig_inst
;
127 os_flush_icache((os_vm_address_t
) pc
, sizeof(unsigned int));
131 * Perform the instruction that we overwrote with a breakpoint. As we
132 * don't have a single-step facility, this means we have to:
133 * - put the instruction back
134 * - put a second breakpoint at the following instruction,
135 * set after_breakpoint and continue execution.
137 * When the second breakpoint is hit (very shortly thereafter, we hope)
138 * sigtrap_handler gets called again, but follows the AfterBreakpoint
140 * - puts a bpt back in the first breakpoint place (running across a
141 * breakpoint shouldn't cause it to be uninstalled)
142 * - replaces the second bpt with the instruction it was meant to be
147 static unsigned int *skipped_break_addr
, displaced_after_inst
;
148 static sigset_t orig_sigmask
;
150 void arch_do_displaced_inst(os_context_t
*context
, unsigned int orig_inst
)
152 unsigned int *pc
= (unsigned int *)(*os_context_pc_addr(context
));
153 unsigned int *npc
= (unsigned int *)(*os_context_npc_addr(context
));
155 /* orig_sigmask = context->sigmask;
156 sigemptyset(&context->sigmask); */
158 /* FILLBLOCKSET(&context->uc_sigmask);*/
161 os_flush_icache((os_vm_address_t
) pc
, sizeof(unsigned int));
162 skipped_break_addr
= pc
;
163 displaced_after_inst
= *npc
;
164 *npc
= trap_AfterBreakpoint
;
165 os_flush_icache((os_vm_address_t
) npc
, sizeof(unsigned int));
169 static int pseudo_atomic_trap_p(os_context_t
*context
)
172 unsigned int badinst
;
176 pc
= (unsigned int*) *os_context_pc_addr(context
);
180 /* Check to see if the current instruction is a pseudo-atomic-trap */
181 if (((badinst
>> 30) == 2) && (((badinst
>> 19) & 0x3f) == 0x3a)
182 && (((badinst
>> 13) & 1) == 1) && ((badinst
& 0x7f) == PSEUDO_ATOMIC_TRAP
))
184 unsigned int previnst
;
187 * Check to see if the previous instruction was an andcc alloc-tn,
188 * 3, zero-tn instruction.
190 if (((previnst
>> 30) == 2) && (((previnst
>> 19) & 0x3f) == 0x11)
191 && (((previnst
>> 14) & 0x1f) == reg_ALLOC
)
192 && (((previnst
>> 25) & 0x1f) == reg_ZERO
)
193 && (((previnst
>> 13) & 1) == 1)
194 && ((previnst
& 0x1fff) == 3))
200 fprintf(stderr
, "Oops! Got a PSEUDO-ATOMIC-TRAP without a preceeding andcc!\n");
206 static void sigill_handler(int signal
, siginfo_t
*siginfo
, void *void_context
)
208 os_context_t
*context
= arch_os_get_context(&void_context
);
209 #ifdef LISP_FEATURE_LINUX
210 /* FIXME: Check that this is necessary -- CSR, 2002-07-15 */
211 os_restore_fp_control(context
);
214 if ((siginfo
->si_code
) == ILL_ILLOPC
215 #ifdef LISP_FEATURE_LINUX
216 || (linux_sparc_siginfo_bug
&& (siginfo
->si_code
== 2))
221 unsigned int* pc
= (unsigned int*) siginfo
->si_addr
;
224 trap
= inst
& 0x3fffff;
227 case trap_PendingInterrupt
:
228 arch_skip_instruction(context
);
229 interrupt_handle_pending(context
);
233 fake_foreign_function_call(context
);
234 lose("%%primitive halt called; the party is over.\n");
238 interrupt_internal_error(signal
, siginfo
, context
, trap
== trap_Cerror
);
241 case trap_Breakpoint
:
242 handle_breakpoint(signal
, siginfo
, context
);
245 case trap_FunEndBreakpoint
:
246 *os_context_pc_addr(context
) = (int) handle_fun_end_breakpoint(signal
, siginfo
, context
);
247 *os_context_npc_addr(context
) = *os_context_pc_addr(context
) + 4;
250 case trap_AfterBreakpoint
:
251 *skipped_break_addr
= trap_Breakpoint
;
252 os_flush_icache(skipped_break_addr
, sizeof(unsigned int));
253 skipped_break_addr
= NULL
;
254 *(unsigned long *) os_context_pc_addr(context
) = displaced_after_inst
;
255 /* context->sigmask = orig_sigmask; */
256 os_flush_icache((os_vm_address_t
) os_context_pc_addr(context
), sizeof(unsigned int));
260 interrupt_handle_now(signal
, siginfo
, context
);
264 else if ((siginfo
->si_code
) == ILL_ILLTRP
265 #ifdef LISP_FEATURE_LINUX
266 || (linux_sparc_siginfo_bug
&& (siginfo
->si_code
) == 192)
269 if (pseudo_atomic_trap_p(context
)) {
270 /* A trap instruction from a pseudo-atomic. We just need
271 to fixup up alloc-tn to remove the interrupted flag,
272 skip over the trap instruction, and then handle the
273 pending interrupt(s). */
274 arch_clear_pseudo_atomic_interrupted(context
);
275 arch_skip_instruction(context
);
276 interrupt_handle_pending(context
);
279 interrupt_internal_error(signal
, siginfo
, context
, 0);
283 interrupt_handle_now(signal
, siginfo
, context
);
287 static void sigemt_handler(int signal
, siginfo_t
*siginfo
, void *void_context
)
289 unsigned int badinst
;
290 boolean subtract
, immed
;
291 int rd
, rs1
, op1
, rs2
, op2
, result
;
292 os_context_t
*context
= arch_os_get_context(&void_context
);
293 #ifdef LISP_FEATURE_LINUX
294 os_restore_fp_control(context
);
297 badinst
= *(unsigned int *)os_context_pc_addr(context
);
298 if ((badinst
>> 30) != 2 || ((badinst
>> 20) & 0x1f) != 0x11) {
299 /* It wasn't a tagged add. Pass the signal into lisp. */
300 interrupt_handle_now(signal
, siginfo
, context
);
304 fprintf(stderr
, "SIGEMT trap handler with tagged op instruction!\n");
306 /* Extract the parts of the inst. */
307 subtract
= badinst
& (1<<19);
308 rs1
= (badinst
>>14) & 0x1f;
309 op1
= *os_context_register_addr(context
, rs1
);
311 /* If the first arg is $ALLOC then it is really a signal-pending note */
312 /* for the pseudo-atomic noise. */
313 if (rs1
== reg_ALLOC
) {
314 /* Perform the op anyway. */
315 op2
= badinst
& 0x1fff;
322 /* KLUDGE: this & ~7 is a little bit magical but basically
323 clears pseudo_atomic bits if any */
324 *os_context_register_addr(context
, reg_ALLOC
) = result
& ~7;
325 arch_skip_instruction(context
);
326 interrupt_handle_pending(context
);
330 if ((op1
& 3) != 0) {
331 /* The first arg wan't a fixnum. */
332 interrupt_internal_error(signal
, siginfo
, context
, 0);
336 if (immed
= badinst
& (1<<13)) {
337 op2
= badinst
& 0x1fff;
342 rs2
= badinst
& 0x1f;
343 op2
= *os_context_register_addr(context
, rs2
);
346 if ((op2
& 3) != 0) {
347 /* The second arg wan't a fixnum. */
348 interrupt_internal_error(signal
, siginfo
, context
, 0);
352 rd
= (badinst
>>25) & 0x1f;
354 /* Don't bother computing the result unless we are going to use it. */
356 result
= (op1
>>2) - (op2
>>2);
358 result
= (op1
>>2) + (op2
>>2);
360 dynamic_space_free_pointer
=
361 (lispobj
*) *os_context_register_addr(context
, reg_ALLOC
);
363 *os_context_register_addr(context
, rd
) = alloc_number(result
);
365 *os_context_register_addr(context
, reg_ALLOC
) =
366 (unsigned long) dynamic_space_free_pointer
;
369 arch_skip_instruction(context
);
372 void arch_install_interrupt_handlers()
374 undoably_install_low_level_interrupt_handler(SIGILL
, sigill_handler
);
375 undoably_install_low_level_interrupt_handler(SIGEMT
, sigemt_handler
);
379 extern lispobj
call_into_lisp(lispobj fun
, lispobj
*args
, int nargs
);
381 lispobj
funcall0(lispobj function
)
383 lispobj
*args
= current_control_stack_pointer
;
385 return call_into_lisp(function
, args
, 0);
388 lispobj
funcall1(lispobj function
, lispobj arg0
)
390 lispobj
*args
= current_control_stack_pointer
;
392 current_control_stack_pointer
+= 1;
395 return call_into_lisp(function
, args
, 1);
398 lispobj
funcall2(lispobj function
, lispobj arg0
, lispobj arg1
)
400 lispobj
*args
= current_control_stack_pointer
;
402 current_control_stack_pointer
+= 2;
406 return call_into_lisp(function
, args
, 2);
409 lispobj
funcall3(lispobj function
, lispobj arg0
, lispobj arg1
, lispobj arg2
)
411 lispobj
*args
= current_control_stack_pointer
;
413 current_control_stack_pointer
+= 3;
418 return call_into_lisp(function
, args
, 3);
421 #ifdef LISP_FEATURE_LINKAGE_TABLE
423 /* This a naive port from CMUCL/sparc, which was mostly stolen from the
424 * CMUCL/x86 version, with adjustments for sparc
426 * Linkage entry size is 16, because we need at least 3 instruction to
429 * sethi %hi(addr), %g4
430 * jmpl [%g4 + %lo(addr)], %g5
433 * The Sparc V9 ABI seems to use 8 words for its jump tables. Maybe
434 * we should do the same?
438 * Define the registers to use in the linkage jump table. Can be the
439 * same. Some care must be exercised when choosing these. It has to be
440 * a register that is not otherwise being used. reg_L0 is a good
441 * choice. call_into_c trashes reg_L0 without preserving it, so we can
442 * trash it in the linkage jump table.
444 #define LINKAGE_TEMP_REG reg_L0
445 #define LINKAGE_ADDR_REG reg_L0
448 * Insert the necessary jump instructions at the given address.
451 arch_write_linkage_table_jmp(void* reloc_addr
, void *target_addr
)
454 * Make JMP to function entry.
456 * The instruction sequence is:
458 * sethi %hi(addr), temp_reg
459 * jmp %temp_reg + %lo(addr), %addr_reg
465 unsigned long hi
; /* Top 22 bits of address */
466 unsigned long lo
; /* Low 10 bits of address */
469 inst_ptr
= (int*) reloc_addr
;
472 * Split the target address into hi and lo parts for the sethi
473 * instruction. hi is the top 22 bits. lo is the low 10 bits.
475 hi
= (unsigned long) target_addr
;
480 * sethi %hi(addr), temp_reg
483 inst
= (0 << 30) | (LINKAGE_TEMP_REG
<< 25) | (4 << 22) | hi
;
487 * jmpl [temp_reg + %lo(addr)], addr_reg
490 inst
= (2U << 30) | (LINKAGE_ADDR_REG
<< 25) | (0x38 << 19)
491 | (LINKAGE_TEMP_REG
<< 14) | (1 << 13) | lo
;
494 /* nop (really sethi 0, %g0) */
496 inst
= (0 << 30) | (0 << 25) | (4 << 22) | 0;
501 os_flush_icache((os_vm_address_t
) reloc_addr
, (char*) inst_ptr
- (char*) reloc_addr
);
505 arch_write_linkage_table_ref(void * reloc_addr
, void *target_addr
)
507 *(unsigned long *)reloc_addr
= (unsigned long)target_addr
;