sdcc/sim/ucsim/src/sims/i8048.src/branch.cc

   1 /*
   2  * Simulator of microcontrollers (branch.cc)
   3  *
   4  * Copyright (C) 2022 Drotos Daniel
   5  *
   6  * To contact author send email to dr.dkdb@gmail.com
   7  *
   8  */
   9
  10 /* This file is part of microcontroller simulator: ucsim.
  11
  12 UCSIM is free software; you can redistribute it and/or modify
  13 it under the terms of the GNU General Public License as published by
  14 the Free Software Foundation; either version 2 of the License, or
  15 (at your option) any later version.
  16
  17 UCSIM is distributed in the hope that it will be useful,
  18 but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 GNU General Public License for more details.
  21
  22 You should have received a copy of the GNU General Public License
  23 along with UCSIM; see the file COPYING.  If not, write to the Free
  24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  25 02111-1307, USA. */
  26 /*@1@*/
  27
  28 #include "i8020cl.h"
  29
  30
  31 int
  32 cl_i8020::jmp(MP)
  33 {
  34   u16_t a;
  35   a= (code&0xe0)<<3;
  36   a+= fetch();
  37   if (A11) a|= 0x800;
  38   PC= a;
  39   return resGO;
  40 }
  41
  42 int
  43 CL2::call(MP)
  44 {
  45   u16_t a= (code&0xe0)<<3;
  46   a+= fetch();
  47   if (A11) a|= 0x800;
  48   push();
  49   PC= a;
  50   return resGO;
  51 }
  52
  53 int
  54 CL2::RET(MP)
  55 {
  56   PC= pop(false);
  57   return resGO;
  58 }
  59
  60 /*
  61 int
  62 CL2::RETR(MP)
  63 {
  64   PC= pop(true);
  65   return resGO;
  66 }
  67 */
  68
  69 int
  70 CL2::jb(MP)
  71 {
  72   u8_t a= fetch();
  73   u8_t m= 1<<((code>>5)&7);
  74   if (rA & m)
  75     {
  76       PC&= 0xf00;
  77       PC|= a;
  78     }
  79   return resGO;
  80 }
  81
  82 int
  83 CL2::jif(bool cond)
  84 {
  85   u8_t a= fetch();
  86   if (cond)
  87     {
  88       PC&= 0xf00;
  89       PC|= a;
  90     }
  91   return resGO;
  92 }
  93
  94 /*
  95 int
  96 CL2::JNZ(MP)
  97 {
  98   u8_t a= fetch();
  99   if (rA)
 100     {
 101       PC&= 0xf00;
 102       PC|= a;
 103     }
 104   return resGO;
 105 }
 106 */
 107
 108 /*
 109 int
 110 CL2::JZ(MP)
 111 {
 112   u8_t a= fetch();
 113   if (!rA)
 114     {
 115       PC&= 0xf00;
 116       PC|= a;
 117     }
 118   return resGO;
 119 }
 120 */
 121
 122 /*
 123 int
 124 CL2::JNC(MP)
 125 {
 126   u8_t a= fetch();
 127   if (!(psw & flagC))
 128     {
 129       PC&= 0xf00;
 130       PC|= a;
 131     }
 132   return resGO;
 133 }
 134 */
 135
 136 /*
 137 int
 138 CL2::JC(MP)
 139 {
 140   u8_t a= fetch();
 141   if (psw & flagC)
 142     {
 143       PC&= 0xf00;
 144       PC|= a;
 145     }
 146   return resGO;
 147 }
 148 */
 149
 150 /*
 151 int
 152 CL2::JT1(MP)
 153 {
 154   u8_t a= fetch();
 155   if (cpu->cfg_read(i8020cpu_t1))
 156     {
 157       PC&= 0xf00;
 158       PC|= a;
 159     }
 160   return resGO;
 161 }
 162 */
 163
 164 int
 165 CL2::JMPPIA(MP)
 166 {
 167   u16_t a= (PC&=0xf00)|rA;
 168   PC|= rom->read(a);
 169   return resGO;
 170 }
 171
 172 int
 173 CL2::djnz(MP)
 174 {
 175   u8_t r= (code>>5)&7;
 176   u8_t a= fetch();
 177   R[r]->W(R[r]->R() - 1);
 178   if (R[r] != 0)
 179     {
 180       PC&= 0xf00;
 181       PC+= a;
 182     }
 183   return resGO;
 184 }
 185
 186
 187 /* End of i8048.src/branch.cc */