[ucsim] Update email and file info, fix stm8 flash controller
[sdcc.git] / sdcc / sim / ucsim / src / sims / mos6502.src / inst.cc
blob677740d65f9abd96d34712f02276027e7f05901a
1 /*
2 * Simulator of microcontrollers (inst.cc)
4 * Copyright (C) 2020 Drotos Daniel
5 *
6 * To contact author send email to dr.dkdb@gmail.com
8 */
10 /* This file is part of microcontroller simulator: ucsim.
12 UCSIM is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 UCSIM is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with UCSIM; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 02111-1307, USA. */
27 #include "globals.h"
29 #include "mos6502cl.h"
31 int
32 cl_mos6502::NOP(t_mem code)
34 return resGO;
37 int
38 cl_mos6502::BRK(t_mem code)
40 set_b= true;
41 PC= (PC+1)&0xffff;//fetch();
42 cF.W(rF|flagB);
43 src_brk->request();
44 return resGO;
47 int
48 cl_mos6502::RTI(t_mem code)
50 u8_t f;
51 cSP.W(rSP+1);
52 f= rom->read(0x0100 + rSP);
53 f&= ~(0x20|flagB);
54 cF.W(f);
55 vc.rd+= 1;
56 /*cSP.W(rSP+1);
57 l= rom->read(0x0100 + rSP);
58 cSP.W(rSP+1);
59 h= rom->read(0x0100 + rSP);*/
60 PC= pop_addr();//h*256 + l;
62 class it_level *il= (class it_level *)(it_levels->top());
63 if (il &&
64 il->level >= 0)
66 il= (class it_level *)(it_levels->pop());
67 delete il;
70 tick(3);
71 return resGO;
74 int
75 cl_mos6502::CLI(t_mem code)
77 cF.W(rF&= ~flagI);
78 tick(1);
79 return resGO;
82 int
83 cl_mos6502::SEI(t_mem code)
85 cF.W(rF|= flagI);
86 tick(1);
87 return resGO;
90 int
91 cl_mos6502::PHP(t_mem code)
93 u8_t v= rF|0x20|flagB;
94 rom->write(0x0100 + rSP, v);
95 vc.wr++;
96 t_addr spbef= rSP;
97 cSP.W(rSP-1);
98 class cl_stack_push *op= new cl_stack_push(instPC, v, spbef, rSP);
99 op->init();
100 stack_write(op);
101 tick(2);
102 return resGO;
106 cl_mos6502::CLC(t_mem code)
108 cF.W(rF&= ~flagC);
109 tick(1);
110 return resGO;
114 cl_mos6502::PLP(t_mem code)
116 t_addr spbef= rSP;
117 cSP.W(rSP+1);
118 u8_t v= rom->read(0x0100 + rSP);
119 v&= ~(0x20|flagB);
120 class cl_stack_pop *op= new cl_stack_pop(instPC, v, spbef, rSP);
121 op->init();
122 stack_read(op);
123 cF.W(v);
124 vc.rd++;
125 tick(3);
126 return resGO;
130 cl_mos6502::SEc(t_mem code)
132 cF.W(rF|= flagC);
133 tick(1);
134 return resGO;
138 cl_mos6502::PHA(t_mem code)
140 rom->write(0x0100 + rSP, rA);
141 vc.wr++;
142 t_addr spbef= rSP;
143 cSP.W(rSP-1);
144 class cl_stack_push *op= new cl_stack_push(instPC, rA, spbef, rSP);
145 op->init();
146 stack_write(op);
147 tick(2);
148 return resGO;
152 cl_mos6502::PLA(t_mem code)
154 t_addr spbef= rSP;
155 cSP.W(rSP+1);
156 cA.W(rom->read(0x0100 + rSP));
157 class cl_stack_pop *op= new cl_stack_pop(instPC, rA, spbef, rSP);
158 op->init();
159 stack_read(op);
160 u8_t f= rF & ~(flagN|flagZ);
161 if (!rA) f|= flagZ;
162 if (rA&0x80) f|= flagN;
163 cF.W(f);
164 vc.rd++;
165 tick(3);
166 return resGO;
170 cl_mos6502::CLV(t_mem code)
172 cF.W(rF&= ~flagV);
173 tick(1);
174 return resGO;
178 cl_mos6502::CLD(t_mem code)
180 cF.W(rF&= ~flagD);
181 tick(1);
182 return resGO;
187 cl_mos6502::SED(t_mem code)
189 cF.W(rF|= flagD);
190 tick(1);
191 return resGO;
195 /* End of mos6502.src/inst.cc */