sdcc/sim/ucsim/src/sims/oisc.src/urisc.cc

   1 /*
   2  * Simulator of microcontrollers (urisc.cc)
   3  *
   4  * Copyright (C) 2024 Drotos Daniel
   5  *
   6  * To contact author send email to dr.dkdb@gmail.com
   7  *
   8  */
   9
  10 /* This file is part of microcontroller simulator: ucsim.
  11
  12 UCSIM is free software; you can redistribute it and/or modify
  13 it under the terms of the GNU General Public License as published by
  14 the Free Software Foundation; either version 2 of the License, or
  15 (at your option) any later version.
  16
  17 UCSIM is distributed in the hope that it will be useful,
  18 but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 GNU General Public License for more details.
  21
  22 You should have received a copy of the GNU General Public License
  23 along with UCSIM; see the file COPYING.  If not, write to the Free
  24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  25 02111-1307, USA. */
  26 /*@1@*/
  27
  28 #include "urisccl.h"
  29
  30
  31 /*
  32   Simulation of CPU designed by Douglas W. Jones
  33   Published in: ACM Computer Architecture News, 16, 3 (June 1988), pages 48-55.
  34   https://doi.org/10.1145/48675.48683
  35
  36   Revised design documented at: https://homepage.cs.uiowa.edu/~jones/arch/risc/
  37
  38
  39         address |      write      |     read
  40       ----------+-----------------+--------------
  41           FFF0  |  acc = data     |  data = acc
  42           FFF1  |  acc = acc-data |  data = N
  43       ----------+-----------------+--------------
  44           FFF2  |  acc = data-acc |  data = Z
  45           FFF3  |  acc = data+acc |  data = O
  46           FFF4  |  acc = data^acc |  data = C
  47           FFF5  |  acc = data&acc |  data = N^O
  48           FFF6  |  acc = data|acc |  data = (N^O)|Z
  49           FFF7  |  acc = data>>1  |  data = C^not(Z)
  50           FFFF  |  PC             |  PC
  51 */
  52
  53 cl_urisc::cl_urisc(class cl_sim *asim):
  54   cl_oisc(asim)
  55 {
  56 }
  57
  58 u16_t
  59 cl_urisc::add(u16_t a, u16_t b, u16_t c)
  60 {
  61   u32_t sf, ss;
  62   c= c?1:0;
  63   sf= a+b+c;
  64   ss= (a&0x7fff)+(b+0x7fff)+c;
  65   u8_t c1, c2;
  66   c1= (sf>0xffff)?1:0;
  67   c2= (ss>0x7fff)?1:0;
  68   rF= 0;
  69   if (c1) rF|= flagC;
  70   if (c1^c2) rF|= flagO;
  71   if ((sf&0xffff) == 0) rF|= flagZ;
  72   if (sf&0x8000) rF|= flagS;
  73   return sf;
  74 }
  75
  76 void
  77 cl_urisc::init_alu(void)
  78 {
  79   id_str= "Ultimate_RISC";
  80   reg_cell_var(&cF, &rF, "F", "Flags");
  81 }
  82
  83 void
  84 cl_urisc::print_regs(class cl_console_base *con)
  85 {
  86   print_acc(con);
  87   con->dd_printf("   ONCZ\n");
  88   con->dd_printf("F= ");
  89   con->print_bin(rF, 4);
  90   con->dd_printf(" 0x%02x", rF);
  91   con->dd_printf("\n");
  92   print_disass(PC, con);
  93   class cl_memory_cell *c;
  94   c= rom->get_cell(0xfff0); c->append_operator(new cl_op_pass(c, this));
  95   c= rom->get_cell(0xfff1); c->append_operator(new cl_op_pass(c, this));
  96   c= rom->get_cell(0xfff2); c->append_operator(new cl_op_pass(c, this));
  97   c= rom->get_cell(0xfff3); c->append_operator(new cl_op_pass(c, this));
  98   c= rom->get_cell(0xfff4); c->append_operator(new cl_op_pass(c, this));
  99   c= rom->get_cell(0xfff5); c->append_operator(new cl_op_pass(c, this));
 100   c= rom->get_cell(0xfff6); c->append_operator(new cl_op_pass(c, this));
 101   c= rom->get_cell(0xfff7); c->append_operator(new cl_op_pass(c, this));
 102 }
 103
 104
 105 const char *
 106 cl_urisc::dis_src(t_addr addr)
 107 {
 108   switch (addr)
 109     {
 110     case 0xfff0: return "acc";
 111     case 0xfff1: return "N";
 112     case 0xfff2: return "Z";
 113     case 0xfff3: return "O";
 114     case 0xfff4: return "C";
 115     case 0xfff5: return "N^O";
 116     case 0xfff6: return "(N^O)|Z";
 117     case 0xfff7: return "C^~Z";
 118     case 0xffff: return "PC";
 119     }
 120   return NULL;
 121 }
 122
 123 const char *
 124 cl_urisc::dis_dst(t_addr addr)
 125 {
 126   switch (addr)
 127     {
 128     case 0xfff0: return "acc";
 129     case 0xfff1: return "acc-";
 130     case 0xfff2: return "-acc";
 131     case 0xfff3: return "acc+";
 132     case 0xfff4: return "acc^";
 133     case 0xfff5: return "acc&";
 134     case 0xfff6: return "acc|";
 135     case 0xfff7: return ">>";
 136     case 0xffff: return "PC";
 137     }
 138   return NULL;
 139 }
 140
 141 chars
 142 cl_urisc::dis_comment(t_addr src, t_addr dst)
 143 {
 144   chars s= "";
 145   if ((dst >= 0xfff0) && (dst <= 0xfff7) &&
 146       ((src < 0xfff0) || (src > 0xfff7)) &&
 147       (src != 0xffff))
 148     s.appendf("; 0x%04x", rom->read(src));
 149   return s;
 150 }
 151
 152
 153 u16_t
 154 cl_urisc::read(u16_t addr)
 155 {
 156   u8_t c, n, o, z, nz;
 157   switch (addr)
 158     {
 159     case 0xfff0: return rA;
 160     case 0xfff1: return (rF&flagN)?2:0;
 161     case 0xfff2: return (rF&flagZ)?2:0;
 162     case 0xfff3: return (rF&flagO)?2:0;
 163     case 0xfff4: return (rF&flagC)?2:0;
 164     case 0xfff5: n=(rF&flagN)?2:0; o=(rF&flagO)?2:0; return n^o;
 165     case 0xfff6:
 166       n= (rF&flagN)?2:0;
 167       o= (rF&flagO)?2:0;
 168       z= (rF&flagZ)?2:0;
 169       return (n^o)|z;
 170     case 0xfff7:
 171       c= (rF&flagC)?2:0;
 172       nz= (rF&flagZ)?0:2;
 173       return c^nz;
 174     case 0xffff:
 175       return PC;
 176     }
 177   return rom->get(addr);
 178 }
 179
 180 u16_t
 181 cl_urisc::write(u16_t addr, u16_t val)
 182 {
 183   switch (addr)
 184     {
 185     case 0xfff0: cA.W(val); break;
 186     case 0xfff1: cA.W(add(rA, ~val, 1)); break;
 187     case 0xfff2: cA.W(add(val, ~rA, 1)); break;
 188     case 0xfff3: cA.W(add(rA, val, 0)); break;
 189     case 0xfff4: cA.W(rA^val); break;
 190     case 0xfff5: cA.W(rA&val); break;
 191     case 0xfff6: cA.W(rA|val); break;
 192     case 0xfff7: cA.W(val>>1); break;
 193     case 0xffff: PC= val; break;
 194     }
 195   return val;
 196 }
 197
 198
 199 /* End of oisc.src/urisc.cc */