[ucsim] Update email and file info, fix stm8 flash controller
[sdcc.git] / sdcc / sim / ucsim / src / sims / pdk.src / spdk.cc
blobb30920a60a7dae2bfbabd41b042a49c9993cdf70
1 /*
2 * Simulator of microcontrollers (spdk.cc)
4 * Copyright (C) 2016 Drotos Daniel
5 *
6 * To contact author send email to dr.dkdb@gmail.com
8 */
10 /* This file is part of microcontroller simulator: ucsim.
12 UCSIM is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 UCSIM is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with UCSIM; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 02111-1307, USA. */
26 /*@1@*/
28 #include <stdlib.h>
30 // prj
31 #include "globals.h"
32 #include "utils.h"
34 // sim.src
35 //#include "appcl.h"
37 // local
38 #include "glob.h"
39 #include "simpdkcl.h"
42 struct cpu_entry *
43 gen_cpus()
45 int ti, i, nr;
46 struct cpu_entry *t;
47 nr= 0;
48 for (i= 0; cpus_pdk[i].type_str; i++)
49 nr++;
50 for (i= 0; fppinfo[i].part; i++)
51 nr++;
52 t= (struct cpu_entry *)malloc(sizeof(struct cpu_entry) * (nr+2));
53 ti= 0;
54 for (i= 0; cpus_pdk[i].type_str; i++)
56 t[ti].type_str= cpus_pdk[i].type_str;
57 t[ti].type= cpus_pdk[i].type;
58 t[ti].subtype= cpus_pdk[i].subtype;
59 t[ti].type_help= cpus_pdk[i].type_help;
60 t[ti].sub_help= cpus_pdk[i].sub_help;
61 ti++;
63 for (i= 0; fppinfo[i].part; i++)
65 t[ti].type= CPU_NONE;
66 if (fppinfo[i].part[0] == 0) continue;
67 if (strcmp(fppinfo[i].arm_sym, "84B") == 0) t[ti].type= CPU_PDK13;
68 if (strcmp(fppinfo[i].arm_sym, "13" ) == 0) t[ti].type= CPU_PDK13;
69 if (strcmp(fppinfo[i].arm_sym, "85A") == 0) t[ti].type= CPU_PDK14;
70 if (strcmp(fppinfo[i].arm_sym, "14" ) == 0) t[ti].type= CPU_PDK14;
71 if (strcmp(fppinfo[i].arm_sym, "86B") == 0) t[ti].type= CPU_PDK15;
72 if (strcmp(fppinfo[i].arm_sym, "15" ) == 0) t[ti].type= CPU_PDK15;
73 if (strcmp(fppinfo[i].arm_sym, "83A") == 0) t[ti].type= CPU_PDK16;
74 if (strcmp(fppinfo[i].arm_sym, "16" ) == 0) t[ti].type= CPU_PDK16;
75 if (t[ti].type != CPU_NONE)
77 t[ti].type_str= fppinfo[i].part;
78 t[ti].subtype= 0;
79 switch (t[ti].type)
81 case CPU_PDK13: t[ti].type_help= "PDK13"; break;
82 case CPU_PDK14: t[ti].type_help= "PDK14"; break;
83 case CPU_PDK15: t[ti].type_help= "PDK15"; break;
84 case CPU_PDK16: t[ti].type_help= "PDK16"; break;
85 default: t[ti].type_help= ""; break;
87 t[ti].sub_help= "";
88 ti++;
91 t[ti].type_str= NULL;
92 t[ti].type= CPU_NONE;
93 t[ti].subtype= 0;
94 t[ti].type_help= NULL;
95 t[ti].sub_help= NULL;
96 return t;
101 main(int argc, char *argv[])
103 class cl_sim *sim;
105 app_start_at= dnow();
106 cpus= gen_cpus();
107 application= new cl_app();
108 application->set_name("spdk");
109 application->init(argc, argv);
110 sim= new cl_simpdk(application);
111 if (sim->init())
112 sim->state|= SIM_QUIT;
113 application->set_simulator(sim);
114 application->run();
115 application->done();
116 delete application;
117 return(0);
121 /* End of pdk.src/spdk.cc */