sdcc/sim/ucsim/src/sims/rxk.src/dp0m4.h

   1 /*
   2  * Simulator of microcontrollers (dp0m4.h)
   3  *
   4  * Copyright (C) 2020 Drotos Daniel
   5  *
   6  * To contact author send email to dr.dkdb@gmail.com
   7  *
   8  */
   9
  10 /* This file is part of microcontroller simulator: ucsim.
  11
  12 UCSIM is free software; you can redistribute it and/or modify
  13 it under the terms of the GNU General Public License as published by
  14 the Free Software Foundation; either version 2 of the License, or
  15 (at your option) any later version.
  16
  17 UCSIM is distributed in the hope that it will be useful,
  18 but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 GNU General Public License for more details.
  21
  22 You should have received a copy of the GNU General Public License
  23 along with UCSIM; see the file COPYING.  If not, write to the Free
  24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  25 02111-1307, USA. */
  26 /*@1@*/
  27
  28 #ifndef DP0M4_HEADER
  29 #define DP0M4_HEADER
  30
  31 // opcodes valid in 4k mode only
  32
  33 // opcodes mean different insts in 3k/4k modes
  34 // meaning of 4k mode follows
  35
  36 #define PAGE_4K6D       instruction_4k6d
  37 #define PAGE_4K7F       instruction_4k7f
  38
  39 #define RL_HL           instruction_4k42
  40 #define RL_BC           instruction_4k62
  41 #define SUB_HL_JK       instruction_4k45
  42 #define SUB_HL_DE       instruction_4k55
  43 #define TEST_HL         instruction_4k4c
  44 #define CP_HL_D         instruction_4k48
  45 #define RLC_BC          instruction_4k60
  46 #define RLC_DE          instruction_4k50
  47 #define RRC_BC          instruction_4k61
  48 #define RRC_DE          instruction_4k51
  49 #define XOR_HL_DE       instruction_4k54
  50 #define RR_BC           instruction_4k63
  51 #define ADD_HL_JK       instruction_4k65
  52
  53 #define LD_HL_BC        instruction_4k81
  54 #define LD_BC_HL        instruction_4k91
  55 #define LD_HL_DE        instruction_4ka1
  56 #define LD_iLMN_HL      instruction_4k82
  57 #define LD_HL_iLMN      instruction_4k92
  58 #define LD_iMN_BCDE     instruction_4k83
  59 #define LD_iMN_JKHL     instruction_4k84
  60 #define LD_BCDE_iMN     instruction_4k93
  61 #define LD_JKHL_iMN     instruction_4k94
  62 #define LD_HL_iPWd      instruction_4k85
  63 #define LD_HL_iPXd      instruction_4k95
  64 #define LD_HL_iPYd      instruction_4ka5
  65 #define LD_HL_iPZd      instruction_4kb5
  66 #define LD_iPWd_HL      instruction_4k86
  67 #define LD_iPXd_HL      instruction_4k96
  68 #define LD_iPYd_HL      instruction_4ka6
  69 #define LD_iPZd_HL      instruction_4kb6
  70 #define LLJP_lxpcmn     instruction_4k87
  71 #define LD_imn_JK       instruction_4k89
  72 #define LD_JK_imn       instruction_4k99
  73 #define LDF_ilmn_A      instruction_4k8a
  74 #define LDF_A_ilmn      instruction_4k9a
  75 #define LD_A_iPWHL      instruction_4k8b
  76 #define LD_A_iPXHL      instruction_4k9b
  77 #define LD_A_iPYHL      instruction_4kab
  78 #define LD_A_iPZHL      instruction_4kbb
  79 #define LD_iPWHL_A      instruction_4k8c
  80 #define LD_iPXHL_A      instruction_4k9c
  81 #define LD_iPYHL_A      instruction_4kac
  82 #define LD_iPZHL_A      instruction_4kbc
  83 #define LD_A_iPWd       instruction_4k8d
  84 #define LD_A_iPXd       instruction_4k9d
  85 #define LD_A_iPYd       instruction_4kad
  86 #define LD_A_iPZd       instruction_4kbd
  87 #define LD_iPWd_A       instruction_4k8e
  88 #define LD_iPXd_A       instruction_4k9e
  89 #define LD_iPYd_A       instruction_4kae
  90 #define LD_iPZd_A       instruction_4kbe
  91 #define LLCALL_lxpcmn   instruction_4k8f
  92 #define LD_LXPC_HL      instruction_4k97
  93 #define LD_HL_LXPC      instruction_4k9f
  94 #define JRE_ee          instruction_4k98
  95 #define JR_GT_e         instruction_4ka0
  96 #define JR_LT_e         instruction_4kb0
  97 #define JR_GTU_e        instruction_4ka8
  98 #define JR_V_e          instruction_4kb8
  99 #define JP_GT_mn        instruction_4ka2
 100 #define JP_LT_mn        instruction_4kb2
 101 #define JP_GTU_mn       instruction_4kaa
 102 #define JP_V_mn         instruction_4kba
 103 #define LD_BCDE_d       instruction_4ka3
 104 #define LD_JKHL_d       instruction_4ka4
 105 #define MULU            instruction_4ka7
 106 #define LD_JK_mn        instruction_4ka9
 107 #define LD_DE_HL        instruction_4kb1
 108 #define EX_BC_HL        instruction_4kb3
 109 #define EX_JKHL_BCDE    instruction_4kb4
 110 #define EX_JK_HL        instruction_4kb9
 111 #define CLR_HL          instruction_4kbf
 112
 113 #endif
 114
 115 /* End of rxk.src/dp0m4.h */