Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / lib / mcs51 / crtxpop.asm
blobf0d3e24d4cfc672d1cf224ddd0d23de2560ee5f2
1 ;--------------------------------------------------------------------------
2 ; crtxpop.asm - C run-time: pop registers (not bits) from xstack
4 ; Copyright (C) 2009, Maarten Brock
6 ; This library is free software; you can redistribute it and/or modify it
7 ; under the terms of the GNU General Public License as published by the
8 ; Free Software Foundation; either version 2, or (at your option) any
9 ; later version.
11 ; This library is distributed in the hope that it will be useful,
12 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ; GNU General Public License for more details.
16 ; You should have received a copy of the GNU General Public License
17 ; along with this library; see the file COPYING. If not, write to the
18 ; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
19 ; MA 02110-1301, USA.
21 ; As a special exception, if you link this library with other files,
22 ; some of which are compiled with SDCC, to produce an executable,
23 ; this library does not by itself cause the resulting executable to
24 ; be covered by the GNU General Public License. This exception does
25 ; not however invalidate any other reasons why the executable file
26 ; might be covered by the GNU General Public License.
27 ;--------------------------------------------------------------------------
29 ;--------------------------------------------------------
30 ; overlayable bit register bank
31 ;--------------------------------------------------------
32 .area BIT_BANK (REL,OVR,DATA)
33 bits:
34 .ds 1
36 ar0 = 0x00
37 ar1 = 0x01
39 .area HOME (CODE)
41 ; Pop registers r1..r7 & bits from xstack
42 ; Expect mask in B
43 ___sdcc_xpop_regs::
44 mov a,r0
45 mov r0,_spx
46 ___sdcc_xpop::
47 push acc
48 jbc B.0,00100$ ;if B(0)=0 then
49 dec r0
50 movx a,@r0 ;pop bits
51 mov bits,a
52 00100$:
53 jbc B.1,00101$ ;if B(1)=0 then
54 dec r0
55 movx a,@r0 ;pop R1
56 mov r1,a
57 00101$:
58 jbc B.2,00102$ ;if B(2)=0 then
59 dec r0
60 movx a,@r0 ;pop R2
61 mov r2,a
62 00102$:
63 jbc B.3,00103$ ;if B(3)=0 then
64 dec r0
65 movx a,@r0 ;pop R3
66 mov r3,a
67 00103$:
68 jbc B.4,00104$ ;if B(4)=0 then
69 dec r0
70 movx a,@r0 ;pop R4
71 mov r4,a
72 00104$:
73 jbc B.5,00105$ ;if B(5)=0 then
74 dec r0
75 movx a,@r0 ;pop R5
76 mov r5,a
77 00105$:
78 jbc B.6,00106$ ;if B(6)=0 then
79 dec r0
80 movx a,@r0 ;pop R6
81 mov r6,a
82 00106$:
83 jbc B.7,00107$ ;if B(7)=0 then
84 dec r0
85 movx a,@r0 ;pop R7
86 mov r7,a
87 00107$:
88 mov _spx,r0
89 pop ar0
90 ret