sdcc/device/lib/pic16/startup/crt0iz.c

   1 /*-------------------------------------------------------------------------
   2    crt0iz.c - SDCC pic16 port runtime start code with initialisation and
   3               clear RAM
   4
   5    Copyright (C) 2004, Vangelis Rokas <vrokas at otenet.gr>
   6    Copyright (C) 2012, Molnár Károly <molnarkaroly@users.sf.net>
   7
   8    This library is free software; you can redistribute it and/or modify it
   9    under the terms of the GNU General Public License as published by the
  10    Free Software Foundation; either version 2, or (at your option) any
  11    later version.
  12
  13    This library is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this library; see the file COPYING. If not, write to the
  20    Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
  21    MA 02110-1301, USA.
  22
  23    As a special exception, if you link this library with other files,
  24    some of which are compiled with SDCC, to produce an executable,
  25    this library does not by itself cause the resulting executable to
  26    be covered by the GNU General Public License. This exception does
  27    not however invalidate any other reasons why the executable file
  28    might be covered by the GNU General Public License.
  29 -------------------------------------------------------------------------
  30
  31   $Id$
  32 */
  33
  34 /*
  35  * based on Microchip MPLAB-C18 startup files
  36  */
  37
  38 extern int stack_end;
  39 extern int sram_end;
  40 extern int TBLPTRU;
  41 extern int TBLPTRH;
  42 extern int TBLPTRL;
  43 extern int FSR0L;
  44 extern int FSR0H;
  45 extern int TABLAT;
  46 extern int POSTINC0;
  47 extern int POSTDEC0;
  48
  49 #if 1
  50 /* Global variable for forcing gplink to add _cinit section. */
  51 char __uflags = 0;
  52 #endif
  53
  54 /* External reference to the user's main routine. */
  55 extern void main (void);
  56
  57 void _entry (void) __naked __interrupt (0);
  58 void _startup (void) __naked;
  59
  60 /* Access bank selector. */
  61 #define a 0
  62
  63
  64 /*
  65  * Entry function, placed at interrupt vector 0 (RESET).
  66  */
  67 void
  68 _entry (void) __naked __interrupt (0)
  69 {
  70   __asm
  71     goto    __startup
  72   __endasm;
  73 }
  74
  75 /* The cinit table will be filled by the linker. */
  76 extern __code struct
  77   {
  78     unsigned short num_init;
  79     struct
  80       {
  81         unsigned long from;
  82         unsigned long to;
  83         unsigned long size;
  84       } entries[1];
  85   } cinit;
  86
  87 #define TBLRDPOSTINC    tblrd*+
  88
  89 #define src_ptr         0x00            /* 0x00 0x01 0x02*/
  90 #define byte_count      0x03            /* 0x03 0x04 */
  91 #define entry_count     0x05            /* 0x05 0x06 */
  92 #define entry_ptr       0x07            /* 0x07 0x08 0x09 */
  93
  94 void
  95 _startup (void) __naked
  96 {
  97   __asm
  98     ; Initialize the stack pointer
  99     lfsr    1, _stack_end
 100     lfsr    2, _stack_end
 101
 102     ; 1st silicon does not do this on POR
 103     clrf    _TBLPTRU, a
 104
 105     ; Initialize the flash memory access configuration.
 106     ; This is harmless for non-flash devices, so we do it on all parts.
 107     bsf     0xa6, 7, a      ; EECON1.EEPGD = 1, TBLPTR accesses program memory
 108     bcf     0xa6, 6, a      ; EECON1.CFGS  = 0, TBLPTR accesses program memory
 109
 110   /* cleanup the RAM */
 111     ; Load FSR0 with top of SRAM.
 112     lfsr    0, _sram_end
 113
 114     ; Place 0xff at address 0x00 as a sentinel.
 115     setf    0x00, a
 116
 117 clear_loop:
 118     clrf    _POSTDEC0, a
 119     movf    0x00, w, a
 120     bnz     clear_loop
 121
 122   /* Initialize global and/or static variables. */
 123
 124   /*
 125    * Access registers 0x00 - 0x09 are not saved in this code.
 126    */
 127     ; TBLPTR = &cinit
 128     movlw   low(_cinit)
 129     movwf   _TBLPTRL, a
 130     movlw   high(_cinit)
 131     movwf   _TBLPTRH, a
 132     movlw   upper(_cinit)
 133     movwf   _TBLPTRU, a
 134
 135     ; entry_count = cinit.num_init
 136     TBLRDPOSTINC
 137     movff   _TABLAT, entry_count
 138
 139     TBLRDPOSTINC
 140     movff   _TABLAT, (entry_count + 1)
 141
 142     ; while (entry_count)
 143
 144     bra     entry_loop_dec
 145
 146 entry_loop:
 147
 148     ; Count down so we only have to look up the data in _cinit once.
 149
 150     ; At this point we know that TBLPTR points to the top of the current
 151     ; entry in _cinit, so we can just start reading the from, to, and
 152     ; size values.
 153
 154     ; Read the source address low.
 155
 156     ; src_ptr = entry_ptr->from;
 157
 158     TBLRDPOSTINC
 159     movff   _TABLAT, src_ptr
 160
 161     ; source address high
 162     TBLRDPOSTINC
 163     movff   _TABLAT, (src_ptr + 1)
 164
 165     ; source address upper
 166     TBLRDPOSTINC
 167     movff   _TABLAT, (src_ptr + 2)
 168
 169     ; Skip a byte since it is stored as a 32bit int.
 170     TBLRDPOSTINC
 171
 172     ; Read the destination address directly into FSR0
 173     ; destination address low.
 174
 175     ; FSR0 = (unsigned short)entry_ptr->to;
 176
 177     TBLRDPOSTINC
 178     movff   _TABLAT, _FSR0L
 179
 180     ; destination address high
 181     TBLRDPOSTINC
 182     movff   _TABLAT, _FSR0H
 183
 184     ; Skip two bytes since it is stored as a 32bit int.
 185     TBLRDPOSTINC
 186     TBLRDPOSTINC
 187
 188     ; Read the size of data to transfer to destination address.
 189
 190     ; byte_count = (unsigned short)entry_ptr->size;
 191
 192     TBLRDPOSTINC
 193     movff   _TABLAT, byte_count
 194
 195     TBLRDPOSTINC
 196     movff   _TABLAT, (byte_count + 1)
 197
 198     ; Skip two bytes since it is stored as a 32bit int.
 199     TBLRDPOSTINC
 200     TBLRDPOSTINC
 201
 202     ; src_ptr = entry_ptr->from;
 203     ; FSR0 = (unsigned short)entry_ptr->to;
 204     ; byte_count = (unsigned short)entry_ptr->size;
 205
 206     ; The table pointer now points to the next entry. Save it
 207     ; off since we will be using the table pointer to do the copying
 208     ; for the entry.
 209
 210     ; entry_ptr = TBLPTR
 211     movff   _TBLPTRL, entry_ptr
 212     movff   _TBLPTRH, (entry_ptr + 1)
 213     movff   _TBLPTRU, (entry_ptr + 2)
 214
 215     ; Now assign the source address to the table pointer.
 216     ; TBLPTR = src_ptr
 217     movff   src_ptr, _TBLPTRL
 218     movff   (src_ptr + 1), _TBLPTRH
 219     movff   (src_ptr + 2), _TBLPTRU
 220     bra     copy_loop_dec
 221
 222 copy_loop:
 223     TBLRDPOSTINC
 224     movff   _TABLAT, _POSTINC0
 225
 226 copy_loop_dec:
 227     ; while (--byte_count);
 228
 229     ; Decrement and test the byte counter.
 230     ; The cycle ends when the value of counter reaches the -1.
 231     decf    byte_count, f, a
 232     bc      copy_loop
 233     decf    (byte_count + 1), f, a
 234     bc      copy_loop
 235
 236     ; Restore the table pointer for the next entry.
 237     ; TBLPTR = entry_ptr
 238     movff   entry_ptr, _TBLPTRL
 239     movff   (entry_ptr + 1), _TBLPTRH
 240     movff   (entry_ptr + 2), _TBLPTRU
 241
 242 entry_loop_dec:
 243     ; while (--entry_count);
 244
 245     ; Decrement and test the entry counter.
 246     ; The cycle ends when the value of counter reaches the -1.
 247     decf    entry_count, f, a
 248     bc      entry_loop
 249     decf    (entry_count + 1), f, a
 250     bc      entry_loop
 251   __endasm;
 252
 253   /* Call the main routine. */
 254   main ();
 255
 256   __asm
 257 lockup:
 258     ; Returning from main will lock up.
 259     bra     lockup
 260   __endasm;
 261 }