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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic10lf322.h
blob033fbde288048ff6653c6728c07476f45e723976
1 /*
2 * This declarations of the PIC10LF322 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:55 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC10LF322_H__
26 #define __PIC10LF322_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define TRISA_ADDR 0x0006
43 #define LATA_ADDR 0x0007
44 #define ANSELA_ADDR 0x0008
45 #define WPUA_ADDR 0x0009
46 #define PCLATH_ADDR 0x000A
47 #define INTCON_ADDR 0x000B
48 #define PIR1_ADDR 0x000C
49 #define PIE1_ADDR 0x000D
50 #define OPTION_REG_ADDR 0x000E
51 #define PCON_ADDR 0x000F
52 #define OSCCON_ADDR 0x0010
53 #define TMR2_ADDR 0x0011
54 #define PR2_ADDR 0x0012
55 #define T2CON_ADDR 0x0013
56 #define PWM1DCL_ADDR 0x0014
57 #define PWM1DCH_ADDR 0x0015
58 #define PWM1CON_ADDR 0x0016
59 #define PWM1CON0_ADDR 0x0016
60 #define PWM2DCL_ADDR 0x0017
61 #define PWM2DCH_ADDR 0x0018
62 #define PWM2CON_ADDR 0x0019
63 #define PWM2CON0_ADDR 0x0019
64 #define IOCAP_ADDR 0x001A
65 #define IOCAN_ADDR 0x001B
66 #define IOCAF_ADDR 0x001C
67 #define FVRCON_ADDR 0x001D
68 #define ADRES_ADDR 0x001E
69 #define ADCON_ADDR 0x001F
70 #define PMADR_ADDR 0x0020
71 #define PMADRL_ADDR 0x0020
72 #define PMADRH_ADDR 0x0021
73 #define PMDAT_ADDR 0x0022
74 #define PMDATL_ADDR 0x0022
75 #define PMDATH_ADDR 0x0023
76 #define PMCON1_ADDR 0x0024
77 #define PMCON2_ADDR 0x0025
78 #define CLKRCON_ADDR 0x0026
79 #define NCO1ACC_ADDR 0x0027
80 #define NCO1ACCL_ADDR 0x0027
81 #define NCO1ACCH_ADDR 0x0028
82 #define NCO1ACCU_ADDR 0x0029
83 #define NCO1INC_ADDR 0x002A
84 #define NCO1INCL_ADDR 0x002A
85 #define NCO1INCH_ADDR 0x002B
86 #define NCO1INCU_ADDR 0x002C
87 #define NCO1CON_ADDR 0x002D
88 #define NCO1CLK_ADDR 0x002E
89 #define WDTCON_ADDR 0x0030
90 #define CLC1CON_ADDR 0x0031
91 #define CLC1SEL0_ADDR 0x0032
92 #define CLC1SEL1_ADDR 0x0033
93 #define CLC1POL_ADDR 0x0034
94 #define CLC1GLS0_ADDR 0x0035
95 #define CLC1GLS1_ADDR 0x0036
96 #define CLC1GLS2_ADDR 0x0037
97 #define CLC1GLS3_ADDR 0x0038
98 #define CWG1CON0_ADDR 0x0039
99 #define CWG1CON1_ADDR 0x003A
100 #define CWG1CON2_ADDR 0x003B
101 #define CWG1DBR_ADDR 0x003C
102 #define CWG1DBF_ADDR 0x003D
103 #define VREGCON_ADDR 0x003E
104 #define BORCON_ADDR 0x003F
105
106 #endif // #ifndef NO_ADDR_DEFINES
107
108 //==============================================================================
109 //
110 // Register Definitions
111 //
112 //==============================================================================
113
114 extern __at(0x0000) __sfr INDF;
115 extern __at(0x0001) __sfr TMR0;
116 extern __at(0x0002) __sfr PCL;
117
118 //==============================================================================
119 // STATUS Bits
120
121 extern __at(0x0003) __sfr STATUS;
122
123 typedef union
124 {
125 struct
126 {
127 unsigned C : 1;
128 unsigned DC : 1;
129 unsigned Z : 1;
130 unsigned NOT_PD : 1;
131 unsigned NOT_TO : 1;
132 unsigned RP0 : 1;
133 unsigned RP1 : 1;
134 unsigned IRP : 1;
135 };
136
137 struct
138 {
139 unsigned : 5;
140 unsigned RP : 2;
141 unsigned : 1;
142 };
143 } __STATUSbits_t;
144
145 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
146
147 #define _C 0x01
148 #define _DC 0x02
149 #define _Z 0x04
150 #define _NOT_PD 0x08
151 #define _NOT_TO 0x10
152 #define _RP0 0x20
153 #define _RP1 0x40
154 #define _IRP 0x80
155
156 //==============================================================================
157
158 extern __at(0x0004) __sfr FSR;
159
160 //==============================================================================
161 // PORTA Bits
162
163 extern __at(0x0005) __sfr PORTA;
164
165 typedef union
166 {
167 struct
168 {
169 unsigned RA0 : 1;
170 unsigned RA1 : 1;
171 unsigned RA2 : 1;
172 unsigned RA3 : 1;
173 unsigned : 1;
174 unsigned : 1;
175 unsigned : 1;
176 unsigned : 1;
177 };
178
179 struct
180 {
181 unsigned RA : 4;
182 unsigned : 4;
183 };
184 } __PORTAbits_t;
185
186 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
187
188 #define _RA0 0x01
189 #define _RA1 0x02
190 #define _RA2 0x04
191 #define _RA3 0x08
192
193 //==============================================================================
194
195
196 //==============================================================================
197 // TRISA Bits
198
199 extern __at(0x0006) __sfr TRISA;
200
201 typedef union
202 {
203 struct
204 {
205 unsigned TRISA0 : 1;
206 unsigned TRISA1 : 1;
207 unsigned TRISA2 : 1;
208 unsigned : 1;
209 unsigned : 1;
210 unsigned : 1;
211 unsigned : 1;
212 unsigned : 1;
213 };
214
215 struct
216 {
217 unsigned TRISA : 3;
218 unsigned : 5;
219 };
220 } __TRISAbits_t;
221
222 extern __at(0x0006) volatile __TRISAbits_t TRISAbits;
223
224 #define _TRISA0 0x01
225 #define _TRISA1 0x02
226 #define _TRISA2 0x04
227
228 //==============================================================================
229
230
231 //==============================================================================
232 // LATA Bits
233
234 extern __at(0x0007) __sfr LATA;
235
236 typedef union
237 {
238 struct
239 {
240 unsigned LATA0 : 1;
241 unsigned LATA1 : 1;
242 unsigned LATA2 : 1;
243 unsigned : 1;
244 unsigned : 1;
245 unsigned : 1;
246 unsigned : 1;
247 unsigned : 1;
248 };
249
250 struct
251 {
252 unsigned LATA : 3;
253 unsigned : 5;
254 };
255 } __LATAbits_t;
256
257 extern __at(0x0007) volatile __LATAbits_t LATAbits;
258
259 #define _LATA0 0x01
260 #define _LATA1 0x02
261 #define _LATA2 0x04
262
263 //==============================================================================
264
265
266 //==============================================================================
267 // ANSELA Bits
268
269 extern __at(0x0008) __sfr ANSELA;
270
271 typedef union
272 {
273 struct
274 {
275 unsigned ANSA0 : 1;
276 unsigned ANSA1 : 1;
277 unsigned ANSA2 : 1;
278 unsigned : 1;
279 unsigned : 1;
280 unsigned : 1;
281 unsigned : 1;
282 unsigned : 1;
283 };
284
285 struct
286 {
287 unsigned ANSA : 3;
288 unsigned : 5;
289 };
290 } __ANSELAbits_t;
291
292 extern __at(0x0008) volatile __ANSELAbits_t ANSELAbits;
293
294 #define _ANSA0 0x01
295 #define _ANSA1 0x02
296 #define _ANSA2 0x04
297
298 //==============================================================================
299
300
301 //==============================================================================
302 // WPUA Bits
303
304 extern __at(0x0009) __sfr WPUA;
305
306 typedef union
307 {
308 struct
309 {
310 unsigned WPUA0 : 1;
311 unsigned WPUA1 : 1;
312 unsigned WPUA2 : 1;
313 unsigned WPUA3 : 1;
314 unsigned : 1;
315 unsigned : 1;
316 unsigned : 1;
317 unsigned : 1;
318 };
319
320 struct
321 {
322 unsigned WPUA : 4;
323 unsigned : 4;
324 };
325 } __WPUAbits_t;
326
327 extern __at(0x0009) volatile __WPUAbits_t WPUAbits;
328
329 #define _WPUA0 0x01
330 #define _WPUA1 0x02
331 #define _WPUA2 0x04
332 #define _WPUA3 0x08
333
334 //==============================================================================
335
336
337 //==============================================================================
338 // PCLATH Bits
339
340 extern __at(0x000A) __sfr PCLATH;
341
342 typedef struct
343 {
344 unsigned PCLH0 : 1;
345 unsigned : 1;
346 unsigned : 1;
347 unsigned : 1;
348 unsigned : 1;
349 unsigned : 1;
350 unsigned : 1;
351 unsigned : 1;
352 } __PCLATHbits_t;
353
354 extern __at(0x000A) volatile __PCLATHbits_t PCLATHbits;
355
356 #define _PCLH0 0x01
357
358 //==============================================================================
359
360
361 //==============================================================================
362 // INTCON Bits
363
364 extern __at(0x000B) __sfr INTCON;
365
366 typedef struct
367 {
368 unsigned IOCIF : 1;
369 unsigned INTF : 1;
370 unsigned TMR0IF : 1;
371 unsigned IOCIE : 1;
372 unsigned INTE : 1;
373 unsigned TMR0IE : 1;
374 unsigned PEIE : 1;
375 unsigned GIE : 1;
376 } __INTCONbits_t;
377
378 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
379
380 #define _IOCIF 0x01
381 #define _INTF 0x02
382 #define _TMR0IF 0x04
383 #define _IOCIE 0x08
384 #define _INTE 0x10
385 #define _TMR0IE 0x20
386 #define _PEIE 0x40
387 #define _GIE 0x80
388
389 //==============================================================================
390
391
392 //==============================================================================
393 // PIR1 Bits
394
395 extern __at(0x000C) __sfr PIR1;
396
397 typedef struct
398 {
399 unsigned : 1;
400 unsigned TMR2IF : 1;
401 unsigned : 1;
402 unsigned CLC1IF : 1;
403 unsigned NCO1IF : 1;
404 unsigned : 1;
405 unsigned ADIF : 1;
406 unsigned : 1;
407 } __PIR1bits_t;
408
409 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
410
411 #define _TMR2IF 0x02
412 #define _CLC1IF 0x08
413 #define _NCO1IF 0x10
414 #define _ADIF 0x40
415
416 //==============================================================================
417
418
419 //==============================================================================
420 // PIE1 Bits
421
422 extern __at(0x000D) __sfr PIE1;
423
424 typedef struct
425 {
426 unsigned : 1;
427 unsigned TMR2IE : 1;
428 unsigned : 1;
429 unsigned CLC1IE : 1;
430 unsigned NCO1IE : 1;
431 unsigned : 1;
432 unsigned ADIE : 1;
433 unsigned : 1;
434 } __PIE1bits_t;
435
436 extern __at(0x000D) volatile __PIE1bits_t PIE1bits;
437
438 #define _TMR2IE 0x02
439 #define _CLC1IE 0x08
440 #define _NCO1IE 0x10
441 #define _ADIE 0x40
442
443 //==============================================================================
444
445
446 //==============================================================================
447 // OPTION_REG Bits
448
449 extern __at(0x000E) __sfr OPTION_REG;
450
451 typedef union
452 {
453 struct
454 {
455 unsigned PS0 : 1;
456 unsigned PS1 : 1;
457 unsigned PS2 : 1;
458 unsigned PSA : 1;
459 unsigned T0SE : 1;
460 unsigned T0CS : 1;
461 unsigned INTEDG : 1;
462 unsigned NOT_WPUEN : 1;
463 };
464
465 struct
466 {
467 unsigned PS : 3;
468 unsigned : 5;
469 };
470 } __OPTION_REGbits_t;
471
472 extern __at(0x000E) volatile __OPTION_REGbits_t OPTION_REGbits;
473
474 #define _PS0 0x01
475 #define _PS1 0x02
476 #define _PS2 0x04
477 #define _PSA 0x08
478 #define _T0SE 0x10
479 #define _T0CS 0x20
480 #define _INTEDG 0x40
481 #define _NOT_WPUEN 0x80
482
483 //==============================================================================
484
485
486 //==============================================================================
487 // PCON Bits
488
489 extern __at(0x000F) __sfr PCON;
490
491 typedef struct
492 {
493 unsigned NOT_BOR : 1;
494 unsigned NOT_POR : 1;
495 unsigned : 1;
496 unsigned : 1;
497 unsigned : 1;
498 unsigned : 1;
499 unsigned : 1;
500 unsigned : 1;
501 } __PCONbits_t;
502
503 extern __at(0x000F) volatile __PCONbits_t PCONbits;
504
505 #define _NOT_BOR 0x01
506 #define _NOT_POR 0x02
507
508 //==============================================================================
509
510
511 //==============================================================================
512 // OSCCON Bits
513
514 extern __at(0x0010) __sfr OSCCON;
515
516 typedef union
517 {
518 struct
519 {
520 unsigned HFIOFS : 1;
521 unsigned LFIOFR : 1;
522 unsigned : 1;
523 unsigned HFIOFR : 1;
524 unsigned IRCF0 : 1;
525 unsigned IRCF1 : 1;
526 unsigned IRCF2 : 1;
527 unsigned : 1;
528 };
529
530 struct
531 {
532 unsigned : 4;
533 unsigned IRCF : 3;
534 unsigned : 1;
535 };
536 } __OSCCONbits_t;
537
538 extern __at(0x0010) volatile __OSCCONbits_t OSCCONbits;
539
540 #define _HFIOFS 0x01
541 #define _LFIOFR 0x02
542 #define _HFIOFR 0x08
543 #define _IRCF0 0x10
544 #define _IRCF1 0x20
545 #define _IRCF2 0x40
546
547 //==============================================================================
548
549 extern __at(0x0011) __sfr TMR2;
550 extern __at(0x0012) __sfr PR2;
551
552 //==============================================================================
553 // T2CON Bits
554
555 extern __at(0x0013) __sfr T2CON;
556
557 typedef union
558 {
559 struct
560 {
561 unsigned T2CKPS0 : 1;
562 unsigned T2CKPS1 : 1;
563 unsigned TMR2ON : 1;
564 unsigned TOUTPS0 : 1;
565 unsigned TOUTPS1 : 1;
566 unsigned TOUTPS2 : 1;
567 unsigned TOUTPS3 : 1;
568 unsigned : 1;
569 };
570
571 struct
572 {
573 unsigned T2CKPS : 2;
574 unsigned : 6;
575 };
576
577 struct
578 {
579 unsigned : 3;
580 unsigned TOUTPS : 4;
581 unsigned : 1;
582 };
583 } __T2CONbits_t;
584
585 extern __at(0x0013) volatile __T2CONbits_t T2CONbits;
586
587 #define _T2CKPS0 0x01
588 #define _T2CKPS1 0x02
589 #define _TMR2ON 0x04
590 #define _TOUTPS0 0x08
591 #define _TOUTPS1 0x10
592 #define _TOUTPS2 0x20
593 #define _TOUTPS3 0x40
594
595 //==============================================================================
596
597
598 //==============================================================================
599 // PWM1DCL Bits
600
601 extern __at(0x0014) __sfr PWM1DCL;
602
603 typedef union
604 {
605 struct
606 {
607 unsigned : 1;
608 unsigned : 1;
609 unsigned : 1;
610 unsigned : 1;
611 unsigned : 1;
612 unsigned : 1;
613 unsigned PWM1DCL0 : 1;
614 unsigned PWM1DCL1 : 1;
615 };
616
617 struct
618 {
619 unsigned : 6;
620 unsigned PWM1DCL : 2;
621 };
622 } __PWM1DCLbits_t;
623
624 extern __at(0x0014) volatile __PWM1DCLbits_t PWM1DCLbits;
625
626 #define _PWM1DCL0 0x40
627 #define _PWM1DCL1 0x80
628
629 //==============================================================================
630
631
632 //==============================================================================
633 // PWM1DCH Bits
634
635 extern __at(0x0015) __sfr PWM1DCH;
636
637 typedef struct
638 {
639 unsigned PWM1DCH0 : 1;
640 unsigned PWM1DCH1 : 1;
641 unsigned PWM1DCH2 : 1;
642 unsigned PWM1DCH3 : 1;
643 unsigned PWM1DCH4 : 1;
644 unsigned PWM1DCH5 : 1;
645 unsigned PWM1DCH6 : 1;
646 unsigned PWM1DCH7 : 1;
647 } __PWM1DCHbits_t;
648
649 extern __at(0x0015) volatile __PWM1DCHbits_t PWM1DCHbits;
650
651 #define _PWM1DCH0 0x01
652 #define _PWM1DCH1 0x02
653 #define _PWM1DCH2 0x04
654 #define _PWM1DCH3 0x08
655 #define _PWM1DCH4 0x10
656 #define _PWM1DCH5 0x20
657 #define _PWM1DCH6 0x40
658 #define _PWM1DCH7 0x80
659
660 //==============================================================================
661
662
663 //==============================================================================
664 // PWM1CON Bits
665
666 extern __at(0x0016) __sfr PWM1CON;
667
668 typedef struct
669 {
670 unsigned : 1;
671 unsigned : 1;
672 unsigned : 1;
673 unsigned : 1;
674 unsigned PWM1POL : 1;
675 unsigned PWM1OUT : 1;
676 unsigned PWM1OE : 1;
677 unsigned PWM1EN : 1;
678 } __PWM1CONbits_t;
679
680 extern __at(0x0016) volatile __PWM1CONbits_t PWM1CONbits;
681
682 #define _PWM1POL 0x10
683 #define _PWM1OUT 0x20
684 #define _PWM1OE 0x40
685 #define _PWM1EN 0x80
686
687 //==============================================================================
688
689
690 //==============================================================================
691 // PWM1CON0 Bits
692
693 extern __at(0x0016) __sfr PWM1CON0;
694
695 typedef struct
696 {
697 unsigned : 1;
698 unsigned : 1;
699 unsigned : 1;
700 unsigned : 1;
701 unsigned PWM1POL : 1;
702 unsigned PWM1OUT : 1;
703 unsigned PWM1OE : 1;
704 unsigned PWM1EN : 1;
705 } __PWM1CON0bits_t;
706
707 extern __at(0x0016) volatile __PWM1CON0bits_t PWM1CON0bits;
708
709 #define _PWM1CON0_PWM1POL 0x10
710 #define _PWM1CON0_PWM1OUT 0x20
711 #define _PWM1CON0_PWM1OE 0x40
712 #define _PWM1CON0_PWM1EN 0x80
713
714 //==============================================================================
715
716
717 //==============================================================================
718 // PWM2DCL Bits
719
720 extern __at(0x0017) __sfr PWM2DCL;
721
722 typedef union
723 {
724 struct
725 {
726 unsigned : 1;
727 unsigned : 1;
728 unsigned : 1;
729 unsigned : 1;
730 unsigned : 1;
731 unsigned : 1;
732 unsigned PWM2DCL0 : 1;
733 unsigned PWM2DCL1 : 1;
734 };
735
736 struct
737 {
738 unsigned : 6;
739 unsigned PWM2DCL : 2;
740 };
741 } __PWM2DCLbits_t;
742
743 extern __at(0x0017) volatile __PWM2DCLbits_t PWM2DCLbits;
744
745 #define _PWM2DCL0 0x40
746 #define _PWM2DCL1 0x80
747
748 //==============================================================================
749
750
751 //==============================================================================
752 // PWM2DCH Bits
753
754 extern __at(0x0018) __sfr PWM2DCH;
755
756 typedef struct
757 {
758 unsigned PWM2DCH0 : 1;
759 unsigned PWM2DCH1 : 1;
760 unsigned PWM2DCH2 : 1;
761 unsigned PWM2DCH3 : 1;
762 unsigned PWM2DCH4 : 1;
763 unsigned PWM2DCH5 : 1;
764 unsigned PWM2DCH6 : 1;
765 unsigned PWM2DCH7 : 1;
766 } __PWM2DCHbits_t;
767
768 extern __at(0x0018) volatile __PWM2DCHbits_t PWM2DCHbits;
769
770 #define _PWM2DCH0 0x01
771 #define _PWM2DCH1 0x02
772 #define _PWM2DCH2 0x04
773 #define _PWM2DCH3 0x08
774 #define _PWM2DCH4 0x10
775 #define _PWM2DCH5 0x20
776 #define _PWM2DCH6 0x40
777 #define _PWM2DCH7 0x80
778
779 //==============================================================================
780
781
782 //==============================================================================
783 // PWM2CON Bits
784
785 extern __at(0x0019) __sfr PWM2CON;
786
787 typedef struct
788 {
789 unsigned : 1;
790 unsigned : 1;
791 unsigned : 1;
792 unsigned : 1;
793 unsigned PWM2POL : 1;
794 unsigned PWM2OUT : 1;
795 unsigned PWM2OE : 1;
796 unsigned PWM2EN : 1;
797 } __PWM2CONbits_t;
798
799 extern __at(0x0019) volatile __PWM2CONbits_t PWM2CONbits;
800
801 #define _PWM2POL 0x10
802 #define _PWM2OUT 0x20
803 #define _PWM2OE 0x40
804 #define _PWM2EN 0x80
805
806 //==============================================================================
807
808
809 //==============================================================================
810 // PWM2CON0 Bits
811
812 extern __at(0x0019) __sfr PWM2CON0;
813
814 typedef struct
815 {
816 unsigned : 1;
817 unsigned : 1;
818 unsigned : 1;
819 unsigned : 1;
820 unsigned PWM2POL : 1;
821 unsigned PWM2OUT : 1;
822 unsigned PWM2OE : 1;
823 unsigned PWM2EN : 1;
824 } __PWM2CON0bits_t;
825
826 extern __at(0x0019) volatile __PWM2CON0bits_t PWM2CON0bits;
827
828 #define _PWM2CON0_PWM2POL 0x10
829 #define _PWM2CON0_PWM2OUT 0x20
830 #define _PWM2CON0_PWM2OE 0x40
831 #define _PWM2CON0_PWM2EN 0x80
832
833 //==============================================================================
834
835
836 //==============================================================================
837 // IOCAP Bits
838
839 extern __at(0x001A) __sfr IOCAP;
840
841 typedef union
842 {
843 struct
844 {
845 unsigned IOCAP0 : 1;
846 unsigned IOCAP1 : 1;
847 unsigned IOCAP2 : 1;
848 unsigned IOCAP3 : 1;
849 unsigned : 1;
850 unsigned : 1;
851 unsigned : 1;
852 unsigned : 1;
853 };
854
855 struct
856 {
857 unsigned IOCAP : 4;
858 unsigned : 4;
859 };
860 } __IOCAPbits_t;
861
862 extern __at(0x001A) volatile __IOCAPbits_t IOCAPbits;
863
864 #define _IOCAP0 0x01
865 #define _IOCAP1 0x02
866 #define _IOCAP2 0x04
867 #define _IOCAP3 0x08
868
869 //==============================================================================
870
871
872 //==============================================================================
873 // IOCAN Bits
874
875 extern __at(0x001B) __sfr IOCAN;
876
877 typedef union
878 {
879 struct
880 {
881 unsigned IOCAN0 : 1;
882 unsigned IOCAN1 : 1;
883 unsigned IOCAN2 : 1;
884 unsigned IOCAN3 : 1;
885 unsigned : 1;
886 unsigned : 1;
887 unsigned : 1;
888 unsigned : 1;
889 };
890
891 struct
892 {
893 unsigned IOCAN : 4;
894 unsigned : 4;
895 };
896 } __IOCANbits_t;
897
898 extern __at(0x001B) volatile __IOCANbits_t IOCANbits;
899
900 #define _IOCAN0 0x01
901 #define _IOCAN1 0x02
902 #define _IOCAN2 0x04
903 #define _IOCAN3 0x08
904
905 //==============================================================================
906
907
908 //==============================================================================
909 // IOCAF Bits
910
911 extern __at(0x001C) __sfr IOCAF;
912
913 typedef union
914 {
915 struct
916 {
917 unsigned IOCAF0 : 1;
918 unsigned IOCAF1 : 1;
919 unsigned IOCAF2 : 1;
920 unsigned IOCAF3 : 1;
921 unsigned : 1;
922 unsigned : 1;
923 unsigned : 1;
924 unsigned : 1;
925 };
926
927 struct
928 {
929 unsigned IOCAF : 4;
930 unsigned : 4;
931 };
932 } __IOCAFbits_t;
933
934 extern __at(0x001C) volatile __IOCAFbits_t IOCAFbits;
935
936 #define _IOCAF0 0x01
937 #define _IOCAF1 0x02
938 #define _IOCAF2 0x04
939 #define _IOCAF3 0x08
940
941 //==============================================================================
942
943
944 //==============================================================================
945 // FVRCON Bits
946
947 extern __at(0x001D) __sfr FVRCON;
948
949 typedef union
950 {
951 struct
952 {
953 unsigned ADFVR0 : 1;
954 unsigned ADFVR1 : 1;
955 unsigned : 1;
956 unsigned : 1;
957 unsigned TSRNG : 1;
958 unsigned TSEN : 1;
959 unsigned FVRRDY : 1;
960 unsigned FVREN : 1;
961 };
962
963 struct
964 {
965 unsigned ADFVR : 2;
966 unsigned : 6;
967 };
968 } __FVRCONbits_t;
969
970 extern __at(0x001D) volatile __FVRCONbits_t FVRCONbits;
971
972 #define _ADFVR0 0x01
973 #define _ADFVR1 0x02
974 #define _TSRNG 0x10
975 #define _TSEN 0x20
976 #define _FVRRDY 0x40
977 #define _FVREN 0x80
978
979 //==============================================================================
980
981 extern __at(0x001E) __sfr ADRES;
982
983 //==============================================================================
984 // ADCON Bits
985
986 extern __at(0x001F) __sfr ADCON;
987
988 typedef union
989 {
990 struct
991 {
992 unsigned ADON : 1;
993 unsigned GO_NOT_DONE : 1;
994 unsigned CHS0 : 1;
995 unsigned CHS1 : 1;
996 unsigned CHS2 : 1;
997 unsigned ADCS0 : 1;
998 unsigned ADCS1 : 1;
999 unsigned ADCS2 : 1;
1000 };
1001
1002 struct
1003 {
1004 unsigned : 2;
1005 unsigned CHS : 3;
1006 unsigned : 3;
1007 };
1008
1009 struct
1010 {
1011 unsigned : 5;
1012 unsigned ADCS : 3;
1013 };
1014 } __ADCONbits_t;
1015
1016 extern __at(0x001F) volatile __ADCONbits_t ADCONbits;
1017
1018 #define _ADON 0x01
1019 #define _GO_NOT_DONE 0x02
1020 #define _CHS0 0x04
1021 #define _CHS1 0x08
1022 #define _CHS2 0x10
1023 #define _ADCS0 0x20
1024 #define _ADCS1 0x40
1025 #define _ADCS2 0x80
1026
1027 //==============================================================================
1028
1029 extern __at(0x0020) __sfr PMADR;
1030 extern __at(0x0020) __sfr PMADRL;
1031
1032 //==============================================================================
1033 // PMADRH Bits
1034
1035 extern __at(0x0021) __sfr PMADRH;
1036
1037 typedef struct
1038 {
1039 unsigned PMADR8 : 1;
1040 unsigned : 1;
1041 unsigned : 1;
1042 unsigned : 1;
1043 unsigned : 1;
1044 unsigned : 1;
1045 unsigned : 1;
1046 unsigned : 1;
1047 } __PMADRHbits_t;
1048
1049 extern __at(0x0021) volatile __PMADRHbits_t PMADRHbits;
1050
1051 #define _PMADR8 0x01
1052
1053 //==============================================================================
1054
1055 extern __at(0x0022) __sfr PMDAT;
1056 extern __at(0x0022) __sfr PMDATL;
1057 extern __at(0x0023) __sfr PMDATH;
1058
1059 //==============================================================================
1060 // PMCON1 Bits
1061
1062 extern __at(0x0024) __sfr PMCON1;
1063
1064 typedef struct
1065 {
1066 unsigned RD : 1;
1067 unsigned WR : 1;
1068 unsigned WREN : 1;
1069 unsigned WRERR : 1;
1070 unsigned FREE : 1;
1071 unsigned LWLO : 1;
1072 unsigned CFGS : 1;
1073 unsigned : 1;
1074 } __PMCON1bits_t;
1075
1076 extern __at(0x0024) volatile __PMCON1bits_t PMCON1bits;
1077
1078 #define _RD 0x01
1079 #define _WR 0x02
1080 #define _WREN 0x04
1081 #define _WRERR 0x08
1082 #define _FREE 0x10
1083 #define _LWLO 0x20
1084 #define _CFGS 0x40
1085
1086 //==============================================================================
1087
1088 extern __at(0x0025) __sfr PMCON2;
1089
1090 //==============================================================================
1091 // CLKRCON Bits
1092
1093 extern __at(0x0026) __sfr CLKRCON;
1094
1095 typedef struct
1096 {
1097 unsigned : 1;
1098 unsigned : 1;
1099 unsigned : 1;
1100 unsigned : 1;
1101 unsigned : 1;
1102 unsigned : 1;
1103 unsigned CLKROE : 1;
1104 unsigned : 1;
1105 } __CLKRCONbits_t;
1106
1107 extern __at(0x0026) volatile __CLKRCONbits_t CLKRCONbits;
1108
1109 #define _CLKROE 0x40
1110
1111 //==============================================================================
1112
1113 extern __at(0x0027) __sfr NCO1ACC;
1114
1115 //==============================================================================
1116 // NCO1ACCL Bits
1117
1118 extern __at(0x0027) __sfr NCO1ACCL;
1119
1120 typedef struct
1121 {
1122 unsigned NCO1ACC0 : 1;
1123 unsigned NCO1ACC1 : 1;
1124 unsigned NCO1ACC2 : 1;
1125 unsigned NCO1ACC3 : 1;
1126 unsigned NCO1ACC4 : 1;
1127 unsigned NCO1ACC5 : 1;
1128 unsigned NCO1ACC6 : 1;
1129 unsigned NCO1ACC7 : 1;
1130 } __NCO1ACCLbits_t;
1131
1132 extern __at(0x0027) volatile __NCO1ACCLbits_t NCO1ACCLbits;
1133
1134 #define _NCO1ACC0 0x01
1135 #define _NCO1ACC1 0x02
1136 #define _NCO1ACC2 0x04
1137 #define _NCO1ACC3 0x08
1138 #define _NCO1ACC4 0x10
1139 #define _NCO1ACC5 0x20
1140 #define _NCO1ACC6 0x40
1141 #define _NCO1ACC7 0x80
1142
1143 //==============================================================================
1144
1145
1146 //==============================================================================
1147 // NCO1ACCH Bits
1148
1149 extern __at(0x0028) __sfr NCO1ACCH;
1150
1151 typedef struct
1152 {
1153 unsigned NCO1ACC8 : 1;
1154 unsigned NCO1ACC9 : 1;
1155 unsigned NCO1ACC10 : 1;
1156 unsigned NCO1ACC11 : 1;
1157 unsigned NCO1ACC12 : 1;
1158 unsigned NCO1ACC13 : 1;
1159 unsigned NCO1ACC14 : 1;
1160 unsigned NCO1ACC15 : 1;
1161 } __NCO1ACCHbits_t;
1162
1163 extern __at(0x0028) volatile __NCO1ACCHbits_t NCO1ACCHbits;
1164
1165 #define _NCO1ACC8 0x01
1166 #define _NCO1ACC9 0x02
1167 #define _NCO1ACC10 0x04
1168 #define _NCO1ACC11 0x08
1169 #define _NCO1ACC12 0x10
1170 #define _NCO1ACC13 0x20
1171 #define _NCO1ACC14 0x40
1172 #define _NCO1ACC15 0x80
1173
1174 //==============================================================================
1175
1176
1177 //==============================================================================
1178 // NCO1ACCU Bits
1179
1180 extern __at(0x0029) __sfr NCO1ACCU;
1181
1182 typedef struct
1183 {
1184 unsigned NCO1ACC16 : 1;
1185 unsigned NCO1ACC17 : 1;
1186 unsigned NCO1ACC18 : 1;
1187 unsigned NCO1ACC19 : 1;
1188 unsigned : 1;
1189 unsigned : 1;
1190 unsigned : 1;
1191 unsigned : 1;
1192 } __NCO1ACCUbits_t;
1193
1194 extern __at(0x0029) volatile __NCO1ACCUbits_t NCO1ACCUbits;
1195
1196 #define _NCO1ACC16 0x01
1197 #define _NCO1ACC17 0x02
1198 #define _NCO1ACC18 0x04
1199 #define _NCO1ACC19 0x08
1200
1201 //==============================================================================
1202
1203 extern __at(0x002A) __sfr NCO1INC;
1204
1205 //==============================================================================
1206 // NCO1INCL Bits
1207
1208 extern __at(0x002A) __sfr NCO1INCL;
1209
1210 typedef struct
1211 {
1212 unsigned NCO1INC0 : 1;
1213 unsigned NCO1INC1 : 1;
1214 unsigned NCO1INC2 : 1;
1215 unsigned NCO1INC3 : 1;
1216 unsigned NCO1INC4 : 1;
1217 unsigned NCO1INC5 : 1;
1218 unsigned NCO1INC6 : 1;
1219 unsigned NCO1INC7 : 1;
1220 } __NCO1INCLbits_t;
1221
1222 extern __at(0x002A) volatile __NCO1INCLbits_t NCO1INCLbits;
1223
1224 #define _NCO1INC0 0x01
1225 #define _NCO1INC1 0x02
1226 #define _NCO1INC2 0x04
1227 #define _NCO1INC3 0x08
1228 #define _NCO1INC4 0x10
1229 #define _NCO1INC5 0x20
1230 #define _NCO1INC6 0x40
1231 #define _NCO1INC7 0x80
1232
1233 //==============================================================================
1234
1235
1236 //==============================================================================
1237 // NCO1INCH Bits
1238
1239 extern __at(0x002B) __sfr NCO1INCH;
1240
1241 typedef struct
1242 {
1243 unsigned NCO1INC8 : 1;
1244 unsigned NCO1INC9 : 1;
1245 unsigned NCO1INC10 : 1;
1246 unsigned NCO1INC11 : 1;
1247 unsigned NCO1INC12 : 1;
1248 unsigned NCO1INC13 : 1;
1249 unsigned NCO1INC14 : 1;
1250 unsigned NCO1INC15 : 1;
1251 } __NCO1INCHbits_t;
1252
1253 extern __at(0x002B) volatile __NCO1INCHbits_t NCO1INCHbits;
1254
1255 #define _NCO1INC8 0x01
1256 #define _NCO1INC9 0x02
1257 #define _NCO1INC10 0x04
1258 #define _NCO1INC11 0x08
1259 #define _NCO1INC12 0x10
1260 #define _NCO1INC13 0x20
1261 #define _NCO1INC14 0x40
1262 #define _NCO1INC15 0x80
1263
1264 //==============================================================================
1265
1266 extern __at(0x002C) __sfr NCO1INCU;
1267
1268 //==============================================================================
1269 // NCO1CON Bits
1270
1271 extern __at(0x002D) __sfr NCO1CON;
1272
1273 typedef struct
1274 {
1275 unsigned N1PFM : 1;
1276 unsigned : 1;
1277 unsigned : 1;
1278 unsigned : 1;
1279 unsigned N1POL : 1;
1280 unsigned N1OUT : 1;
1281 unsigned N1OE : 1;
1282 unsigned N1EN : 1;
1283 } __NCO1CONbits_t;
1284
1285 extern __at(0x002D) volatile __NCO1CONbits_t NCO1CONbits;
1286
1287 #define _N1PFM 0x01
1288 #define _N1POL 0x10
1289 #define _N1OUT 0x20
1290 #define _N1OE 0x40
1291 #define _N1EN 0x80
1292
1293 //==============================================================================
1294
1295
1296 //==============================================================================
1297 // NCO1CLK Bits
1298
1299 extern __at(0x002E) __sfr NCO1CLK;
1300
1301 typedef union
1302 {
1303 struct
1304 {
1305 unsigned N1CKS0 : 1;
1306 unsigned N1CKS1 : 1;
1307 unsigned : 1;
1308 unsigned : 1;
1309 unsigned : 1;
1310 unsigned N1PWS0 : 1;
1311 unsigned N1PWS1 : 1;
1312 unsigned N1PWS2 : 1;
1313 };
1314
1315 struct
1316 {
1317 unsigned N1CKS : 2;
1318 unsigned : 6;
1319 };
1320
1321 struct
1322 {
1323 unsigned : 5;
1324 unsigned N1PWS : 3;
1325 };
1326 } __NCO1CLKbits_t;
1327
1328 extern __at(0x002E) volatile __NCO1CLKbits_t NCO1CLKbits;
1329
1330 #define _N1CKS0 0x01
1331 #define _N1CKS1 0x02
1332 #define _N1PWS0 0x20
1333 #define _N1PWS1 0x40
1334 #define _N1PWS2 0x80
1335
1336 //==============================================================================
1337
1338
1339 //==============================================================================
1340 // WDTCON Bits
1341
1342 extern __at(0x0030) __sfr WDTCON;
1343
1344 typedef union
1345 {
1346 struct
1347 {
1348 unsigned SWDTEN : 1;
1349 unsigned WDTPS0 : 1;
1350 unsigned WDTPS1 : 1;
1351 unsigned WDTPS2 : 1;
1352 unsigned WDTPS3 : 1;
1353 unsigned WDTPS4 : 1;
1354 unsigned : 1;
1355 unsigned : 1;
1356 };
1357
1358 struct
1359 {
1360 unsigned : 1;
1361 unsigned WDTPS : 5;
1362 unsigned : 2;
1363 };
1364 } __WDTCONbits_t;
1365
1366 extern __at(0x0030) volatile __WDTCONbits_t WDTCONbits;
1367
1368 #define _SWDTEN 0x01
1369 #define _WDTPS0 0x02
1370 #define _WDTPS1 0x04
1371 #define _WDTPS2 0x08
1372 #define _WDTPS3 0x10
1373 #define _WDTPS4 0x20
1374
1375 //==============================================================================
1376
1377
1378 //==============================================================================
1379 // CLC1CON Bits
1380
1381 extern __at(0x0031) __sfr CLC1CON;
1382
1383 typedef union
1384 {
1385 struct
1386 {
1387 unsigned LC1MODE0 : 1;
1388 unsigned LC1MODE1 : 1;
1389 unsigned LC1MODE2 : 1;
1390 unsigned LC1INTN : 1;
1391 unsigned LC1INTP : 1;
1392 unsigned LC1OUT : 1;
1393 unsigned LC1OE : 1;
1394 unsigned LC1EN : 1;
1395 };
1396
1397 struct
1398 {
1399 unsigned LCMODE0 : 1;
1400 unsigned LCMODE1 : 1;
1401 unsigned LCMODE2 : 1;
1402 unsigned LCINTN : 1;
1403 unsigned LCINTP : 1;
1404 unsigned LCOUT : 1;
1405 unsigned LCOE : 1;
1406 unsigned LCEN : 1;
1407 };
1408
1409 struct
1410 {
1411 unsigned LC1MODE : 3;
1412 unsigned : 5;
1413 };
1414
1415 struct
1416 {
1417 unsigned LCMODE : 3;
1418 unsigned : 5;
1419 };
1420 } __CLC1CONbits_t;
1421
1422 extern __at(0x0031) volatile __CLC1CONbits_t CLC1CONbits;
1423
1424 #define _LC1MODE0 0x01
1425 #define _LCMODE0 0x01
1426 #define _LC1MODE1 0x02
1427 #define _LCMODE1 0x02
1428 #define _LC1MODE2 0x04
1429 #define _LCMODE2 0x04
1430 #define _LC1INTN 0x08
1431 #define _LCINTN 0x08
1432 #define _LC1INTP 0x10
1433 #define _LCINTP 0x10
1434 #define _LC1OUT 0x20
1435 #define _LCOUT 0x20
1436 #define _LC1OE 0x40
1437 #define _LCOE 0x40
1438 #define _LC1EN 0x80
1439 #define _LCEN 0x80
1440
1441 //==============================================================================
1442
1443
1444 //==============================================================================
1445 // CLC1SEL0 Bits
1446
1447 extern __at(0x0032) __sfr CLC1SEL0;
1448
1449 typedef union
1450 {
1451 struct
1452 {
1453 unsigned LC1D1S0 : 1;
1454 unsigned LC1D1S1 : 1;
1455 unsigned LC1D1S2 : 1;
1456 unsigned : 1;
1457 unsigned LC1D2S0 : 1;
1458 unsigned LC1D2S1 : 1;
1459 unsigned LC1D2S2 : 1;
1460 unsigned : 1;
1461 };
1462
1463 struct
1464 {
1465 unsigned D1S0 : 1;
1466 unsigned D1S1 : 1;
1467 unsigned D1S2 : 1;
1468 unsigned : 1;
1469 unsigned D2S0 : 1;
1470 unsigned D2S1 : 1;
1471 unsigned D2S2 : 1;
1472 unsigned : 1;
1473 };
1474
1475 struct
1476 {
1477 unsigned LC1D1S : 3;
1478 unsigned : 5;
1479 };
1480
1481 struct
1482 {
1483 unsigned D1S : 3;
1484 unsigned : 5;
1485 };
1486
1487 struct
1488 {
1489 unsigned : 4;
1490 unsigned LC1D2S : 3;
1491 unsigned : 1;
1492 };
1493
1494 struct
1495 {
1496 unsigned : 4;
1497 unsigned D2S : 3;
1498 unsigned : 1;
1499 };
1500 } __CLC1SEL0bits_t;
1501
1502 extern __at(0x0032) volatile __CLC1SEL0bits_t CLC1SEL0bits;
1503
1504 #define _LC1D1S0 0x01
1505 #define _D1S0 0x01
1506 #define _LC1D1S1 0x02
1507 #define _D1S1 0x02
1508 #define _LC1D1S2 0x04
1509 #define _D1S2 0x04
1510 #define _LC1D2S0 0x10
1511 #define _D2S0 0x10
1512 #define _LC1D2S1 0x20
1513 #define _D2S1 0x20
1514 #define _LC1D2S2 0x40
1515 #define _D2S2 0x40
1516
1517 //==============================================================================
1518
1519
1520 //==============================================================================
1521 // CLC1SEL1 Bits
1522
1523 extern __at(0x0033) __sfr CLC1SEL1;
1524
1525 typedef union
1526 {
1527 struct
1528 {
1529 unsigned LC1D3S0 : 1;
1530 unsigned LC1D3S1 : 1;
1531 unsigned LC1D3S2 : 1;
1532 unsigned : 1;
1533 unsigned LC1D4S0 : 1;
1534 unsigned LC1D4S1 : 1;
1535 unsigned LC1D4S2 : 1;
1536 unsigned : 1;
1537 };
1538
1539 struct
1540 {
1541 unsigned D3S0 : 1;
1542 unsigned D3S1 : 1;
1543 unsigned D3S2 : 1;
1544 unsigned : 1;
1545 unsigned D4S0 : 1;
1546 unsigned D4S1 : 1;
1547 unsigned D4S2 : 1;
1548 unsigned : 1;
1549 };
1550
1551 struct
1552 {
1553 unsigned LC1D3S : 3;
1554 unsigned : 5;
1555 };
1556
1557 struct
1558 {
1559 unsigned D3S : 3;
1560 unsigned : 5;
1561 };
1562
1563 struct
1564 {
1565 unsigned : 4;
1566 unsigned D4S : 3;
1567 unsigned : 1;
1568 };
1569
1570 struct
1571 {
1572 unsigned : 4;
1573 unsigned LC1D4S : 3;
1574 unsigned : 1;
1575 };
1576 } __CLC1SEL1bits_t;
1577
1578 extern __at(0x0033) volatile __CLC1SEL1bits_t CLC1SEL1bits;
1579
1580 #define _LC1D3S0 0x01
1581 #define _D3S0 0x01
1582 #define _LC1D3S1 0x02
1583 #define _D3S1 0x02
1584 #define _LC1D3S2 0x04
1585 #define _D3S2 0x04
1586 #define _LC1D4S0 0x10
1587 #define _D4S0 0x10
1588 #define _LC1D4S1 0x20
1589 #define _D4S1 0x20
1590 #define _LC1D4S2 0x40
1591 #define _D4S2 0x40
1592
1593 //==============================================================================
1594
1595
1596 //==============================================================================
1597 // CLC1POL Bits
1598
1599 extern __at(0x0034) __sfr CLC1POL;
1600
1601 typedef union
1602 {
1603 struct
1604 {
1605 unsigned LC1G1POL : 1;
1606 unsigned LC1G2POL : 1;
1607 unsigned LC1G3POL : 1;
1608 unsigned LC1G4POL : 1;
1609 unsigned : 1;
1610 unsigned : 1;
1611 unsigned : 1;
1612 unsigned LC1POL : 1;
1613 };
1614
1615 struct
1616 {
1617 unsigned G1POL : 1;
1618 unsigned G2POL : 1;
1619 unsigned G3POL : 1;
1620 unsigned G4POL : 1;
1621 unsigned : 1;
1622 unsigned : 1;
1623 unsigned : 1;
1624 unsigned POL : 1;
1625 };
1626 } __CLC1POLbits_t;
1627
1628 extern __at(0x0034) volatile __CLC1POLbits_t CLC1POLbits;
1629
1630 #define _LC1G1POL 0x01
1631 #define _G1POL 0x01
1632 #define _LC1G2POL 0x02
1633 #define _G2POL 0x02
1634 #define _LC1G3POL 0x04
1635 #define _G3POL 0x04
1636 #define _LC1G4POL 0x08
1637 #define _G4POL 0x08
1638 #define _LC1POL 0x80
1639 #define _POL 0x80
1640
1641 //==============================================================================
1642
1643
1644 //==============================================================================
1645 // CLC1GLS0 Bits
1646
1647 extern __at(0x0035) __sfr CLC1GLS0;
1648
1649 typedef union
1650 {
1651 struct
1652 {
1653 unsigned LC1G1D1N : 1;
1654 unsigned LC1G1D1T : 1;
1655 unsigned LC1G1D2N : 1;
1656 unsigned LC1G1D2T : 1;
1657 unsigned LC1G1D3N : 1;
1658 unsigned LC1G1D3T : 1;
1659 unsigned LC1G1D4N : 1;
1660 unsigned LC1G1D4T : 1;
1661 };
1662
1663 struct
1664 {
1665 unsigned D1N : 1;
1666 unsigned D1T : 1;
1667 unsigned D2N : 1;
1668 unsigned D2T : 1;
1669 unsigned D3N : 1;
1670 unsigned D3T : 1;
1671 unsigned D4N : 1;
1672 unsigned D4T : 1;
1673 };
1674 } __CLC1GLS0bits_t;
1675
1676 extern __at(0x0035) volatile __CLC1GLS0bits_t CLC1GLS0bits;
1677
1678 #define _LC1G1D1N 0x01
1679 #define _D1N 0x01
1680 #define _LC1G1D1T 0x02
1681 #define _D1T 0x02
1682 #define _LC1G1D2N 0x04
1683 #define _D2N 0x04
1684 #define _LC1G1D2T 0x08
1685 #define _D2T 0x08
1686 #define _LC1G1D3N 0x10
1687 #define _D3N 0x10
1688 #define _LC1G1D3T 0x20
1689 #define _D3T 0x20
1690 #define _LC1G1D4N 0x40
1691 #define _D4N 0x40
1692 #define _LC1G1D4T 0x80
1693 #define _D4T 0x80
1694
1695 //==============================================================================
1696
1697
1698 //==============================================================================
1699 // CLC1GLS1 Bits
1700
1701 extern __at(0x0036) __sfr CLC1GLS1;
1702
1703 typedef union
1704 {
1705 struct
1706 {
1707 unsigned LC1G2D1N : 1;
1708 unsigned LC1G2D1T : 1;
1709 unsigned LC1G2D2N : 1;
1710 unsigned LC1G2D2T : 1;
1711 unsigned LC1G2D3N : 1;
1712 unsigned LC1G2D3T : 1;
1713 unsigned LC1G2D4N : 1;
1714 unsigned LC1G2D4T : 1;
1715 };
1716
1717 struct
1718 {
1719 unsigned D1N : 1;
1720 unsigned D1T : 1;
1721 unsigned D2N : 1;
1722 unsigned D2T : 1;
1723 unsigned D3N : 1;
1724 unsigned D3T : 1;
1725 unsigned D4N : 1;
1726 unsigned D4T : 1;
1727 };
1728 } __CLC1GLS1bits_t;
1729
1730 extern __at(0x0036) volatile __CLC1GLS1bits_t CLC1GLS1bits;
1731
1732 #define _CLC1GLS1_LC1G2D1N 0x01
1733 #define _CLC1GLS1_D1N 0x01
1734 #define _CLC1GLS1_LC1G2D1T 0x02
1735 #define _CLC1GLS1_D1T 0x02
1736 #define _CLC1GLS1_LC1G2D2N 0x04
1737 #define _CLC1GLS1_D2N 0x04
1738 #define _CLC1GLS1_LC1G2D2T 0x08
1739 #define _CLC1GLS1_D2T 0x08
1740 #define _CLC1GLS1_LC1G2D3N 0x10
1741 #define _CLC1GLS1_D3N 0x10
1742 #define _CLC1GLS1_LC1G2D3T 0x20
1743 #define _CLC1GLS1_D3T 0x20
1744 #define _CLC1GLS1_LC1G2D4N 0x40
1745 #define _CLC1GLS1_D4N 0x40
1746 #define _CLC1GLS1_LC1G2D4T 0x80
1747 #define _CLC1GLS1_D4T 0x80
1748
1749 //==============================================================================
1750
1751
1752 //==============================================================================
1753 // CLC1GLS2 Bits
1754
1755 extern __at(0x0037) __sfr CLC1GLS2;
1756
1757 typedef union
1758 {
1759 struct
1760 {
1761 unsigned LC1G3D1N : 1;
1762 unsigned LC1G3D1T : 1;
1763 unsigned LC1G3D2N : 1;
1764 unsigned LC1G3D2T : 1;
1765 unsigned LC1G3D3N : 1;
1766 unsigned LC1G3D3T : 1;
1767 unsigned LC1G3D4N : 1;
1768 unsigned LC1G3D4T : 1;
1769 };
1770
1771 struct
1772 {
1773 unsigned D1N : 1;
1774 unsigned D1T : 1;
1775 unsigned D2N : 1;
1776 unsigned D2T : 1;
1777 unsigned D3N : 1;
1778 unsigned D3T : 1;
1779 unsigned D4N : 1;
1780 unsigned D4T : 1;
1781 };
1782 } __CLC1GLS2bits_t;
1783
1784 extern __at(0x0037) volatile __CLC1GLS2bits_t CLC1GLS2bits;
1785
1786 #define _CLC1GLS2_LC1G3D1N 0x01
1787 #define _CLC1GLS2_D1N 0x01
1788 #define _CLC1GLS2_LC1G3D1T 0x02
1789 #define _CLC1GLS2_D1T 0x02
1790 #define _CLC1GLS2_LC1G3D2N 0x04
1791 #define _CLC1GLS2_D2N 0x04
1792 #define _CLC1GLS2_LC1G3D2T 0x08
1793 #define _CLC1GLS2_D2T 0x08
1794 #define _CLC1GLS2_LC1G3D3N 0x10
1795 #define _CLC1GLS2_D3N 0x10
1796 #define _CLC1GLS2_LC1G3D3T 0x20
1797 #define _CLC1GLS2_D3T 0x20
1798 #define _CLC1GLS2_LC1G3D4N 0x40
1799 #define _CLC1GLS2_D4N 0x40
1800 #define _CLC1GLS2_LC1G3D4T 0x80
1801 #define _CLC1GLS2_D4T 0x80
1802
1803 //==============================================================================
1804
1805
1806 //==============================================================================
1807 // CLC1GLS3 Bits
1808
1809 extern __at(0x0038) __sfr CLC1GLS3;
1810
1811 typedef union
1812 {
1813 struct
1814 {
1815 unsigned LC1G4D1N : 1;
1816 unsigned LC1G4D1T : 1;
1817 unsigned LC1G4D2N : 1;
1818 unsigned LC1G4D2T : 1;
1819 unsigned LC1G4D3N : 1;
1820 unsigned LC1G4D3T : 1;
1821 unsigned LC1G4D4N : 1;
1822 unsigned LC1G4D4T : 1;
1823 };
1824
1825 struct
1826 {
1827 unsigned G4D1N : 1;
1828 unsigned G4D1T : 1;
1829 unsigned G4D2N : 1;
1830 unsigned G4D2T : 1;
1831 unsigned G4D3N : 1;
1832 unsigned G4D3T : 1;
1833 unsigned G4D4N : 1;
1834 unsigned G4D4T : 1;
1835 };
1836 } __CLC1GLS3bits_t;
1837
1838 extern __at(0x0038) volatile __CLC1GLS3bits_t CLC1GLS3bits;
1839
1840 #define _LC1G4D1N 0x01
1841 #define _G4D1N 0x01
1842 #define _LC1G4D1T 0x02
1843 #define _G4D1T 0x02
1844 #define _LC1G4D2N 0x04
1845 #define _G4D2N 0x04
1846 #define _LC1G4D2T 0x08
1847 #define _G4D2T 0x08
1848 #define _LC1G4D3N 0x10
1849 #define _G4D3N 0x10
1850 #define _LC1G4D3T 0x20
1851 #define _G4D3T 0x20
1852 #define _LC1G4D4N 0x40
1853 #define _G4D4N 0x40
1854 #define _LC1G4D4T 0x80
1855 #define _G4D4T 0x80
1856
1857 //==============================================================================
1858
1859
1860 //==============================================================================
1861 // CWG1CON0 Bits
1862
1863 extern __at(0x0039) __sfr CWG1CON0;
1864
1865 typedef struct
1866 {
1867 unsigned G1CS0 : 1;
1868 unsigned : 1;
1869 unsigned : 1;
1870 unsigned G1POLA : 1;
1871 unsigned G1POLB : 1;
1872 unsigned G1OEA : 1;
1873 unsigned G1OEB : 1;
1874 unsigned G1EN : 1;
1875 } __CWG1CON0bits_t;
1876
1877 extern __at(0x0039) volatile __CWG1CON0bits_t CWG1CON0bits;
1878
1879 #define _G1CS0 0x01
1880 #define _G1POLA 0x08
1881 #define _G1POLB 0x10
1882 #define _G1OEA 0x20
1883 #define _G1OEB 0x40
1884 #define _G1EN 0x80
1885
1886 //==============================================================================
1887
1888
1889 //==============================================================================
1890 // CWG1CON1 Bits
1891
1892 extern __at(0x003A) __sfr CWG1CON1;
1893
1894 typedef union
1895 {
1896 struct
1897 {
1898 unsigned G1IS0 : 1;
1899 unsigned G1IS1 : 1;
1900 unsigned : 1;
1901 unsigned : 1;
1902 unsigned G1ASDLA0 : 1;
1903 unsigned G1ASDLA1 : 1;
1904 unsigned G1ASDLB0 : 1;
1905 unsigned G1ASDLB1 : 1;
1906 };
1907
1908 struct
1909 {
1910 unsigned G1IS : 2;
1911 unsigned : 6;
1912 };
1913
1914 struct
1915 {
1916 unsigned : 4;
1917 unsigned G1ASDLA : 2;
1918 unsigned : 2;
1919 };
1920
1921 struct
1922 {
1923 unsigned : 6;
1924 unsigned G1ASDLB : 2;
1925 };
1926 } __CWG1CON1bits_t;
1927
1928 extern __at(0x003A) volatile __CWG1CON1bits_t CWG1CON1bits;
1929
1930 #define _G1IS0 0x01
1931 #define _G1IS1 0x02
1932 #define _G1ASDLA0 0x10
1933 #define _G1ASDLA1 0x20
1934 #define _G1ASDLB0 0x40
1935 #define _G1ASDLB1 0x80
1936
1937 //==============================================================================
1938
1939
1940 //==============================================================================
1941 // CWG1CON2 Bits
1942
1943 extern __at(0x003B) __sfr CWG1CON2;
1944
1945 typedef struct
1946 {
1947 unsigned G1ASDSFLT : 1;
1948 unsigned G1ASDSCLC1 : 1;
1949 unsigned : 1;
1950 unsigned : 1;
1951 unsigned : 1;
1952 unsigned : 1;
1953 unsigned G1ARSEN : 1;
1954 unsigned G1ASE : 1;
1955 } __CWG1CON2bits_t;
1956
1957 extern __at(0x003B) volatile __CWG1CON2bits_t CWG1CON2bits;
1958
1959 #define _G1ASDSFLT 0x01
1960 #define _G1ASDSCLC1 0x02
1961 #define _G1ARSEN 0x40
1962 #define _G1ASE 0x80
1963
1964 //==============================================================================
1965
1966
1967 //==============================================================================
1968 // CWG1DBR Bits
1969
1970 extern __at(0x003C) __sfr CWG1DBR;
1971
1972 typedef union
1973 {
1974 struct
1975 {
1976 unsigned CWG1DBR0 : 1;
1977 unsigned CWG1DBR1 : 1;
1978 unsigned CWG1DBR2 : 1;
1979 unsigned CWG1DBR3 : 1;
1980 unsigned CWG1DBR4 : 1;
1981 unsigned CWG1DBR5 : 1;
1982 unsigned : 1;
1983 unsigned : 1;
1984 };
1985
1986 struct
1987 {
1988 unsigned CWG1DBR : 6;
1989 unsigned : 2;
1990 };
1991 } __CWG1DBRbits_t;
1992
1993 extern __at(0x003C) volatile __CWG1DBRbits_t CWG1DBRbits;
1994
1995 #define _CWG1DBR0 0x01
1996 #define _CWG1DBR1 0x02
1997 #define _CWG1DBR2 0x04
1998 #define _CWG1DBR3 0x08
1999 #define _CWG1DBR4 0x10
2000 #define _CWG1DBR5 0x20
2001
2002 //==============================================================================
2003
2004
2005 //==============================================================================
2006 // CWG1DBF Bits
2007
2008 extern __at(0x003D) __sfr CWG1DBF;
2009
2010 typedef union
2011 {
2012 struct
2013 {
2014 unsigned CWG1DBF0 : 1;
2015 unsigned CWG1DBF1 : 1;
2016 unsigned CWG1DBF2 : 1;
2017 unsigned CWG1DBF3 : 1;
2018 unsigned CWG1DBF4 : 1;
2019 unsigned CWG1DBF5 : 1;
2020 unsigned : 1;
2021 unsigned : 1;
2022 };
2023
2024 struct
2025 {
2026 unsigned CWG1DBF : 6;
2027 unsigned : 2;
2028 };
2029 } __CWG1DBFbits_t;
2030
2031 extern __at(0x003D) volatile __CWG1DBFbits_t CWG1DBFbits;
2032
2033 #define _CWG1DBF0 0x01
2034 #define _CWG1DBF1 0x02
2035 #define _CWG1DBF2 0x04
2036 #define _CWG1DBF3 0x08
2037 #define _CWG1DBF4 0x10
2038 #define _CWG1DBF5 0x20
2039
2040 //==============================================================================
2041
2042
2043 //==============================================================================
2044 // VREGCON Bits
2045
2046 extern __at(0x003E) __sfr VREGCON;
2047
2048 typedef union
2049 {
2050 struct
2051 {
2052 unsigned VREGPM0 : 1;
2053 unsigned VREGPM1 : 1;
2054 unsigned : 1;
2055 unsigned : 1;
2056 unsigned : 1;
2057 unsigned : 1;
2058 unsigned : 1;
2059 unsigned : 1;
2060 };
2061
2062 struct
2063 {
2064 unsigned VREGPM : 2;
2065 unsigned : 6;
2066 };
2067 } __VREGCONbits_t;
2068
2069 extern __at(0x003E) volatile __VREGCONbits_t VREGCONbits;
2070
2071 #define _VREGPM0 0x01
2072 #define _VREGPM1 0x02
2073
2074 //==============================================================================
2075
2076
2077 //==============================================================================
2078 // BORCON Bits
2079
2080 extern __at(0x003F) __sfr BORCON;
2081
2082 typedef struct
2083 {
2084 unsigned BORRDY : 1;
2085 unsigned : 1;
2086 unsigned : 1;
2087 unsigned : 1;
2088 unsigned : 1;
2089 unsigned : 1;
2090 unsigned BORFS : 1;
2091 unsigned SBOREN : 1;
2092 } __BORCONbits_t;
2093
2094 extern __at(0x003F) volatile __BORCONbits_t BORCONbits;
2095
2096 #define _BORRDY 0x01
2097 #define _BORFS 0x40
2098 #define _SBOREN 0x80
2099
2100 //==============================================================================
2101
2102
2103 //==============================================================================
2104 //
2105 // Configuration Bits
2106 //
2107 //==============================================================================
2108
2109 #define _CONFIG 0x2007
2110
2111 //----------------------------- CONFIG Options -------------------------------
2112
2113 #define _FOSC_INTOSC 0x3FFE // INTOSC oscillator: CLKIN function disabled.
2114 #define _FOSC_EC 0x3FFF // EC: CLKIN function enabled.
2115 #define _BOREN_OFF 0x3FF9 // Brown-out Reset disabled.
2116 #define _BOREN_SBODEN 0x3FFB // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
2117 #define _BOREN_NSLEEP 0x3FFD // Brown-out Reset enabled while running and disabled in Sleep.
2118 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
2119 #define _WDTE_OFF 0x3FE7 // WDT disabled.
2120 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
2121 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
2122 #define _WDTE_ON 0x3FFF // WDT enabled.
2123 #define _PWRTE_ON 0x3FDF // PWRT enabled.
2124 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
2125 #define _MCLRE_OFF 0x3FBF // MCLR pin function is digital input, MCLR internally tied to VDD.
2126 #define _MCLRE_ON 0x3FFF // MCLR pin function is MCLR.
2127 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
2128 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
2129 #define _LVP_OFF 0x3EFF // High-voltage on MCLR/VPP must be used for programming.
2130 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
2131 #define _LPBOR_OFF 0x3DFF // BOR disabled.
2132 #define _LPBOR_ON 0x3FFF // BOR enabled.
2133 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
2134 #define _BORV_27 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
2135 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
2136 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
2137 #define _WRT_ALL 0x27FF // 000h to 1FFh write protected, no addresses may be modified by PMCON control.
2138 #define _WRT_HALF 0x2FFF // 000h to 0FFh write protected, 100h to 1FFh may be modified by PMCON control.
2139 #define _WRT_BOOT 0x37FF // 000h to 07Fh write protected, 080h to 1FFh may be modified by PMCON control.
2140 #define _WRT_OFF 0x3FFF // Write protection off.
2141
2142 //==============================================================================
2143
2144 #define _DEVID1 0x2006
2145
2146 #define _IDLOC0 0x2000
2147 #define _IDLOC1 0x2001
2148 #define _IDLOC2 0x2002
2149 #define _IDLOC3 0x2003
2150
2151 //==============================================================================
2152
2153 #ifndef NO_BIT_DEFINES
2154
2155 #define ADON ADCONbits.ADON // bit 0
2156 #define GO_NOT_DONE ADCONbits.GO_NOT_DONE // bit 1
2157 #define CHS0 ADCONbits.CHS0 // bit 2
2158 #define CHS1 ADCONbits.CHS1 // bit 3
2159 #define CHS2 ADCONbits.CHS2 // bit 4
2160 #define ADCS0 ADCONbits.ADCS0 // bit 5
2161 #define ADCS1 ADCONbits.ADCS1 // bit 6
2162 #define ADCS2 ADCONbits.ADCS2 // bit 7
2163
2164 #define ANSA0 ANSELAbits.ANSA0 // bit 0
2165 #define ANSA1 ANSELAbits.ANSA1 // bit 1
2166 #define ANSA2 ANSELAbits.ANSA2 // bit 2
2167
2168 #define BORRDY BORCONbits.BORRDY // bit 0
2169 #define BORFS BORCONbits.BORFS // bit 6
2170 #define SBOREN BORCONbits.SBOREN // bit 7
2171
2172 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits
2173 #define LCMODE0 CLC1CONbits.LCMODE0 // bit 0, shadows bit in CLC1CONbits
2174 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits
2175 #define LCMODE1 CLC1CONbits.LCMODE1 // bit 1, shadows bit in CLC1CONbits
2176 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits
2177 #define LCMODE2 CLC1CONbits.LCMODE2 // bit 2, shadows bit in CLC1CONbits
2178 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits
2179 #define LCINTN CLC1CONbits.LCINTN // bit 3, shadows bit in CLC1CONbits
2180 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits
2181 #define LCINTP CLC1CONbits.LCINTP // bit 4, shadows bit in CLC1CONbits
2182 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits
2183 #define LCOUT CLC1CONbits.LCOUT // bit 5, shadows bit in CLC1CONbits
2184 #define LC1OE CLC1CONbits.LC1OE // bit 6, shadows bit in CLC1CONbits
2185 #define LCOE CLC1CONbits.LCOE // bit 6, shadows bit in CLC1CONbits
2186 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits
2187 #define LCEN CLC1CONbits.LCEN // bit 7, shadows bit in CLC1CONbits
2188
2189 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
2190 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
2191 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
2192 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
2193 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
2194 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
2195 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
2196 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
2197 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
2198 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
2199 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
2200 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
2201 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
2202 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
2203 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
2204 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
2205
2206 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
2207 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
2208 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
2209 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
2210 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
2211 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
2212 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
2213 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
2214 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
2215 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
2216 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
2217 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
2218 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
2219 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
2220 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
2221 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
2222
2223 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
2224 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
2225 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
2226 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
2227 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
2228 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
2229 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
2230 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
2231 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
2232 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
2233
2234 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
2235 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
2236 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
2237 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
2238 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
2239 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
2240 #define LC1D2S0 CLC1SEL0bits.LC1D2S0 // bit 4, shadows bit in CLC1SEL0bits
2241 #define D2S0 CLC1SEL0bits.D2S0 // bit 4, shadows bit in CLC1SEL0bits
2242 #define LC1D2S1 CLC1SEL0bits.LC1D2S1 // bit 5, shadows bit in CLC1SEL0bits
2243 #define D2S1 CLC1SEL0bits.D2S1 // bit 5, shadows bit in CLC1SEL0bits
2244 #define LC1D2S2 CLC1SEL0bits.LC1D2S2 // bit 6, shadows bit in CLC1SEL0bits
2245 #define D2S2 CLC1SEL0bits.D2S2 // bit 6, shadows bit in CLC1SEL0bits
2246
2247 #define LC1D3S0 CLC1SEL1bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL1bits
2248 #define D3S0 CLC1SEL1bits.D3S0 // bit 0, shadows bit in CLC1SEL1bits
2249 #define LC1D3S1 CLC1SEL1bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL1bits
2250 #define D3S1 CLC1SEL1bits.D3S1 // bit 1, shadows bit in CLC1SEL1bits
2251 #define LC1D3S2 CLC1SEL1bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL1bits
2252 #define D3S2 CLC1SEL1bits.D3S2 // bit 2, shadows bit in CLC1SEL1bits
2253 #define LC1D4S0 CLC1SEL1bits.LC1D4S0 // bit 4, shadows bit in CLC1SEL1bits
2254 #define D4S0 CLC1SEL1bits.D4S0 // bit 4, shadows bit in CLC1SEL1bits
2255 #define LC1D4S1 CLC1SEL1bits.LC1D4S1 // bit 5, shadows bit in CLC1SEL1bits
2256 #define D4S1 CLC1SEL1bits.D4S1 // bit 5, shadows bit in CLC1SEL1bits
2257 #define LC1D4S2 CLC1SEL1bits.LC1D4S2 // bit 6, shadows bit in CLC1SEL1bits
2258 #define D4S2 CLC1SEL1bits.D4S2 // bit 6, shadows bit in CLC1SEL1bits
2259
2260 #define CLKROE CLKRCONbits.CLKROE // bit 6
2261
2262 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
2263 #define G1POLA CWG1CON0bits.G1POLA // bit 3
2264 #define G1POLB CWG1CON0bits.G1POLB // bit 4
2265 #define G1OEA CWG1CON0bits.G1OEA // bit 5
2266 #define G1OEB CWG1CON0bits.G1OEB // bit 6
2267 #define G1EN CWG1CON0bits.G1EN // bit 7
2268
2269 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
2270 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
2271 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
2272 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
2273 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
2274 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
2275
2276 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 0
2277 #define G1ASDSCLC1 CWG1CON2bits.G1ASDSCLC1 // bit 1
2278 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
2279 #define G1ASE CWG1CON2bits.G1ASE // bit 7
2280
2281 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
2282 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
2283 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
2284 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
2285 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
2286 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
2287
2288 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
2289 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
2290 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
2291 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
2292 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
2293 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
2294
2295 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
2296 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
2297 #define TSRNG FVRCONbits.TSRNG // bit 4
2298 #define TSEN FVRCONbits.TSEN // bit 5
2299 #define FVRRDY FVRCONbits.FVRRDY // bit 6
2300 #define FVREN FVRCONbits.FVREN // bit 7
2301
2302 #define IOCIF INTCONbits.IOCIF // bit 0
2303 #define INTF INTCONbits.INTF // bit 1
2304 #define TMR0IF INTCONbits.TMR0IF // bit 2
2305 #define IOCIE INTCONbits.IOCIE // bit 3
2306 #define INTE INTCONbits.INTE // bit 4
2307 #define TMR0IE INTCONbits.TMR0IE // bit 5
2308 #define PEIE INTCONbits.PEIE // bit 6
2309 #define GIE INTCONbits.GIE // bit 7
2310
2311 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
2312 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
2313 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
2314 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
2315
2316 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
2317 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
2318 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
2319 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
2320
2321 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
2322 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
2323 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
2324 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
2325
2326 #define LATA0 LATAbits.LATA0 // bit 0
2327 #define LATA1 LATAbits.LATA1 // bit 1
2328 #define LATA2 LATAbits.LATA2 // bit 2
2329
2330 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
2331 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
2332 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
2333 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
2334 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
2335 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
2336 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
2337 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
2338
2339 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
2340 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
2341 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
2342 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
2343 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
2344 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
2345 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
2346 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
2347
2348 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
2349 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
2350 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
2351 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
2352
2353 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
2354 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
2355 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
2356 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
2357 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
2358
2359 #define N1PFM NCO1CONbits.N1PFM // bit 0
2360 #define N1POL NCO1CONbits.N1POL // bit 4
2361 #define N1OUT NCO1CONbits.N1OUT // bit 5
2362 #define N1OE NCO1CONbits.N1OE // bit 6
2363 #define N1EN NCO1CONbits.N1EN // bit 7
2364
2365 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
2366 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
2367 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
2368 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
2369 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
2370 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
2371 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
2372 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
2373
2374 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
2375 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
2376 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
2377 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
2378 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
2379 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
2380 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
2381 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
2382
2383 #define PS0 OPTION_REGbits.PS0 // bit 0
2384 #define PS1 OPTION_REGbits.PS1 // bit 1
2385 #define PS2 OPTION_REGbits.PS2 // bit 2
2386 #define PSA OPTION_REGbits.PSA // bit 3
2387 #define T0SE OPTION_REGbits.T0SE // bit 4
2388 #define T0CS OPTION_REGbits.T0CS // bit 5
2389 #define INTEDG OPTION_REGbits.INTEDG // bit 6
2390 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
2391
2392 #define HFIOFS OSCCONbits.HFIOFS // bit 0
2393 #define LFIOFR OSCCONbits.LFIOFR // bit 1
2394 #define HFIOFR OSCCONbits.HFIOFR // bit 3
2395 #define IRCF0 OSCCONbits.IRCF0 // bit 4
2396 #define IRCF1 OSCCONbits.IRCF1 // bit 5
2397 #define IRCF2 OSCCONbits.IRCF2 // bit 6
2398
2399 #define PCLH0 PCLATHbits.PCLH0 // bit 0
2400
2401 #define NOT_BOR PCONbits.NOT_BOR // bit 0
2402 #define NOT_POR PCONbits.NOT_POR // bit 1
2403
2404 #define TMR2IE PIE1bits.TMR2IE // bit 1
2405 #define CLC1IE PIE1bits.CLC1IE // bit 3
2406 #define NCO1IE PIE1bits.NCO1IE // bit 4
2407 #define ADIE PIE1bits.ADIE // bit 6
2408
2409 #define TMR2IF PIR1bits.TMR2IF // bit 1
2410 #define CLC1IF PIR1bits.CLC1IF // bit 3
2411 #define NCO1IF PIR1bits.NCO1IF // bit 4
2412 #define ADIF PIR1bits.ADIF // bit 6
2413
2414 #define PMADR8 PMADRHbits.PMADR8 // bit 0
2415
2416 #define RD PMCON1bits.RD // bit 0
2417 #define WR PMCON1bits.WR // bit 1
2418 #define WREN PMCON1bits.WREN // bit 2
2419 #define WRERR PMCON1bits.WRERR // bit 3
2420 #define FREE PMCON1bits.FREE // bit 4
2421 #define LWLO PMCON1bits.LWLO // bit 5
2422 #define CFGS PMCON1bits.CFGS // bit 6
2423
2424 #define RA0 PORTAbits.RA0 // bit 0
2425 #define RA1 PORTAbits.RA1 // bit 1
2426 #define RA2 PORTAbits.RA2 // bit 2
2427 #define RA3 PORTAbits.RA3 // bit 3
2428
2429 #define PWM1POL PWM1CONbits.PWM1POL // bit 4
2430 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5
2431 #define PWM1OE PWM1CONbits.PWM1OE // bit 6
2432 #define PWM1EN PWM1CONbits.PWM1EN // bit 7
2433
2434 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
2435 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
2436 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
2437 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
2438 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
2439 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
2440 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
2441 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
2442
2443 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 6
2444 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 7
2445
2446 #define PWM2POL PWM2CONbits.PWM2POL // bit 4
2447 #define PWM2OUT PWM2CONbits.PWM2OUT // bit 5
2448 #define PWM2OE PWM2CONbits.PWM2OE // bit 6
2449 #define PWM2EN PWM2CONbits.PWM2EN // bit 7
2450
2451 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
2452 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
2453 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
2454 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
2455 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
2456 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
2457 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
2458 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
2459
2460 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 6
2461 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 7
2462
2463 #define C STATUSbits.C // bit 0
2464 #define DC STATUSbits.DC // bit 1
2465 #define Z STATUSbits.Z // bit 2
2466 #define NOT_PD STATUSbits.NOT_PD // bit 3
2467 #define NOT_TO STATUSbits.NOT_TO // bit 4
2468 #define RP0 STATUSbits.RP0 // bit 5
2469 #define RP1 STATUSbits.RP1 // bit 6
2470 #define IRP STATUSbits.IRP // bit 7
2471
2472 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
2473 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
2474 #define TMR2ON T2CONbits.TMR2ON // bit 2
2475 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
2476 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
2477 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
2478 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
2479
2480 #define TRISA0 TRISAbits.TRISA0 // bit 0
2481 #define TRISA1 TRISAbits.TRISA1 // bit 1
2482 #define TRISA2 TRISAbits.TRISA2 // bit 2
2483
2484 #define VREGPM0 VREGCONbits.VREGPM0 // bit 0
2485 #define VREGPM1 VREGCONbits.VREGPM1 // bit 1
2486
2487 #define SWDTEN WDTCONbits.SWDTEN // bit 0
2488 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
2489 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
2490 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
2491 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
2492 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
2493
2494 #define WPUA0 WPUAbits.WPUA0 // bit 0
2495 #define WPUA1 WPUAbits.WPUA1 // bit 1
2496 #define WPUA2 WPUAbits.WPUA2 // bit 2
2497 #define WPUA3 WPUAbits.WPUA3 // bit 3
2498
2499 #endif // #ifndef NO_BIT_DEFINES
2500
2501 #endif // #ifndef __PIC10LF322_H__
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