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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic12f615.h
blobe60b65f11c615363d2ff61c57e1291ca4add1fa4
1 /*
2 * This declarations of the PIC12F615 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:03 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC12F615_H__
26 #define __PIC12F615_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define GPIO_ADDR 0x0005
42 #define PORTA_ADDR 0x0005
43 #define PCLATH_ADDR 0x000A
44 #define INTCON_ADDR 0x000B
45 #define PIR1_ADDR 0x000C
46 #define TMR1_ADDR 0x000E
47 #define TMR1L_ADDR 0x000E
48 #define TMR1H_ADDR 0x000F
49 #define T1CON_ADDR 0x0010
50 #define TMR2_ADDR 0x0011
51 #define T2CON_ADDR 0x0012
52 #define CCPR1_ADDR 0x0013
53 #define CCPR1L_ADDR 0x0013
54 #define CCPR1H_ADDR 0x0014
55 #define CCP1CON_ADDR 0x0015
56 #define PWM1CON_ADDR 0x0016
57 #define ECCPAS_ADDR 0x0017
58 #define VRCON_ADDR 0x0019
59 #define CMCON0_ADDR 0x001A
60 #define CMCON1_ADDR 0x001C
61 #define ADRESH_ADDR 0x001E
62 #define ADCON0_ADDR 0x001F
63 #define OPTION_REG_ADDR 0x0081
64 #define TRISA_ADDR 0x0085
65 #define TRISIO_ADDR 0x0085
66 #define PIE1_ADDR 0x008C
67 #define PCON_ADDR 0x008E
68 #define OSCTUNE_ADDR 0x0090
69 #define PR2_ADDR 0x0092
70 #define APFCON_ADDR 0x0093
71 #define WPU_ADDR 0x0095
72 #define WPUA_ADDR 0x0095
73 #define IOC_ADDR 0x0096
74 #define IOCA_ADDR 0x0096
75 #define ADRESL_ADDR 0x009E
76 #define ANSEL_ADDR 0x009F
77
78 #endif // #ifndef NO_ADDR_DEFINES
79
80 //==============================================================================
81 //
82 // Register Definitions
83 //
84 //==============================================================================
85
86 extern __at(0x0000) __sfr INDF;
87 extern __at(0x0001) __sfr TMR0;
88 extern __at(0x0002) __sfr PCL;
89
90 //==============================================================================
91 // STATUS Bits
92
93 extern __at(0x0003) __sfr STATUS;
94
95 typedef union
96 {
97 struct
98 {
99 unsigned C : 1;
100 unsigned DC : 1;
101 unsigned Z : 1;
102 unsigned NOT_PD : 1;
103 unsigned NOT_TO : 1;
104 unsigned RP0 : 1;
105 unsigned RP1 : 1;
106 unsigned IRP : 1;
107 };
108
109 struct
110 {
111 unsigned : 5;
112 unsigned RP : 2;
113 unsigned : 1;
114 };
115 } __STATUSbits_t;
116
117 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
118
119 #define _C 0x01
120 #define _DC 0x02
121 #define _Z 0x04
122 #define _NOT_PD 0x08
123 #define _NOT_TO 0x10
124 #define _RP0 0x20
125 #define _RP1 0x40
126 #define _IRP 0x80
127
128 //==============================================================================
129
130 extern __at(0x0004) __sfr FSR;
131
132 //==============================================================================
133 // GPIO Bits
134
135 extern __at(0x0005) __sfr GPIO;
136
137 typedef union
138 {
139 struct
140 {
141 unsigned GP0 : 1;
142 unsigned GP1 : 1;
143 unsigned GP2 : 1;
144 unsigned GP3 : 1;
145 unsigned GP4 : 1;
146 unsigned GP5 : 1;
147 unsigned : 1;
148 unsigned : 1;
149 };
150
151 struct
152 {
153 unsigned GPIO0 : 1;
154 unsigned GPIO1 : 1;
155 unsigned GPIO2 : 1;
156 unsigned GPIO3 : 1;
157 unsigned GPIO4 : 1;
158 unsigned GPIO5 : 1;
159 unsigned : 1;
160 unsigned : 1;
161 };
162
163 struct
164 {
165 unsigned RA0 : 1;
166 unsigned RA1 : 1;
167 unsigned RA2 : 1;
168 unsigned RA3 : 1;
169 unsigned RA4 : 1;
170 unsigned RA5 : 1;
171 unsigned : 1;
172 unsigned : 1;
173 };
174
175 struct
176 {
177 unsigned GP : 6;
178 unsigned : 2;
179 };
180
181 struct
182 {
183 unsigned RA : 6;
184 unsigned : 2;
185 };
186
187 struct
188 {
189 unsigned GPIO : 6;
190 unsigned : 2;
191 };
192 } __GPIObits_t;
193
194 extern __at(0x0005) volatile __GPIObits_t GPIObits;
195
196 #define _GP0 0x01
197 #define _GPIO0 0x01
198 #define _RA0 0x01
199 #define _GP1 0x02
200 #define _GPIO1 0x02
201 #define _RA1 0x02
202 #define _GP2 0x04
203 #define _GPIO2 0x04
204 #define _RA2 0x04
205 #define _GP3 0x08
206 #define _GPIO3 0x08
207 #define _RA3 0x08
208 #define _GP4 0x10
209 #define _GPIO4 0x10
210 #define _RA4 0x10
211 #define _GP5 0x20
212 #define _GPIO5 0x20
213 #define _RA5 0x20
214
215 //==============================================================================
216
217
218 //==============================================================================
219 // PORTA Bits
220
221 extern __at(0x0005) __sfr PORTA;
222
223 typedef union
224 {
225 struct
226 {
227 unsigned GP0 : 1;
228 unsigned GP1 : 1;
229 unsigned GP2 : 1;
230 unsigned GP3 : 1;
231 unsigned GP4 : 1;
232 unsigned GP5 : 1;
233 unsigned : 1;
234 unsigned : 1;
235 };
236
237 struct
238 {
239 unsigned GPIO0 : 1;
240 unsigned GPIO1 : 1;
241 unsigned GPIO2 : 1;
242 unsigned GPIO3 : 1;
243 unsigned GPIO4 : 1;
244 unsigned GPIO5 : 1;
245 unsigned : 1;
246 unsigned : 1;
247 };
248
249 struct
250 {
251 unsigned RA0 : 1;
252 unsigned RA1 : 1;
253 unsigned RA2 : 1;
254 unsigned RA3 : 1;
255 unsigned RA4 : 1;
256 unsigned RA5 : 1;
257 unsigned : 1;
258 unsigned : 1;
259 };
260
261 struct
262 {
263 unsigned RA : 6;
264 unsigned : 2;
265 };
266
267 struct
268 {
269 unsigned GP : 6;
270 unsigned : 2;
271 };
272
273 struct
274 {
275 unsigned GPIO : 6;
276 unsigned : 2;
277 };
278 } __PORTAbits_t;
279
280 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
281
282 #define _PORTA_GP0 0x01
283 #define _PORTA_GPIO0 0x01
284 #define _PORTA_RA0 0x01
285 #define _PORTA_GP1 0x02
286 #define _PORTA_GPIO1 0x02
287 #define _PORTA_RA1 0x02
288 #define _PORTA_GP2 0x04
289 #define _PORTA_GPIO2 0x04
290 #define _PORTA_RA2 0x04
291 #define _PORTA_GP3 0x08
292 #define _PORTA_GPIO3 0x08
293 #define _PORTA_RA3 0x08
294 #define _PORTA_GP4 0x10
295 #define _PORTA_GPIO4 0x10
296 #define _PORTA_RA4 0x10
297 #define _PORTA_GP5 0x20
298 #define _PORTA_GPIO5 0x20
299 #define _PORTA_RA5 0x20
300
301 //==============================================================================
302
303 extern __at(0x000A) __sfr PCLATH;
304
305 //==============================================================================
306 // INTCON Bits
307
308 extern __at(0x000B) __sfr INTCON;
309
310 typedef union
311 {
312 struct
313 {
314 unsigned GPIF : 1;
315 unsigned INTF : 1;
316 unsigned TMR0IF : 1;
317 unsigned GPIE : 1;
318 unsigned INTE : 1;
319 unsigned TMR0IE : 1;
320 unsigned PEIE : 1;
321 unsigned GIE : 1;
322 };
323
324 struct
325 {
326 unsigned : 1;
327 unsigned : 1;
328 unsigned T0IF : 1;
329 unsigned : 1;
330 unsigned : 1;
331 unsigned T0IE : 1;
332 unsigned : 1;
333 unsigned : 1;
334 };
335 } __INTCONbits_t;
336
337 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
338
339 #define _GPIF 0x01
340 #define _INTF 0x02
341 #define _TMR0IF 0x04
342 #define _T0IF 0x04
343 #define _GPIE 0x08
344 #define _INTE 0x10
345 #define _TMR0IE 0x20
346 #define _T0IE 0x20
347 #define _PEIE 0x40
348 #define _GIE 0x80
349
350 //==============================================================================
351
352
353 //==============================================================================
354 // PIR1 Bits
355
356 extern __at(0x000C) __sfr PIR1;
357
358 typedef union
359 {
360 struct
361 {
362 unsigned TMR1IF : 1;
363 unsigned TMR2IF : 1;
364 unsigned : 1;
365 unsigned C1IF : 1;
366 unsigned : 1;
367 unsigned ECCPIF : 1;
368 unsigned ADIF : 1;
369 unsigned : 1;
370 };
371
372 struct
373 {
374 unsigned T1IF : 1;
375 unsigned T2IF : 1;
376 unsigned : 1;
377 unsigned CMIF : 1;
378 unsigned : 1;
379 unsigned CCP1IF : 1;
380 unsigned : 1;
381 unsigned : 1;
382 };
383 } __PIR1bits_t;
384
385 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
386
387 #define _TMR1IF 0x01
388 #define _T1IF 0x01
389 #define _TMR2IF 0x02
390 #define _T2IF 0x02
391 #define _C1IF 0x08
392 #define _CMIF 0x08
393 #define _ECCPIF 0x20
394 #define _CCP1IF 0x20
395 #define _ADIF 0x40
396
397 //==============================================================================
398
399 extern __at(0x000E) __sfr TMR1;
400 extern __at(0x000E) __sfr TMR1L;
401 extern __at(0x000F) __sfr TMR1H;
402
403 //==============================================================================
404 // T1CON Bits
405
406 extern __at(0x0010) __sfr T1CON;
407
408 typedef union
409 {
410 struct
411 {
412 unsigned TMR1ON : 1;
413 unsigned TMR1CS : 1;
414 unsigned NOT_T1SYNC : 1;
415 unsigned T1OSCEN : 1;
416 unsigned T1CKPS0 : 1;
417 unsigned T1CKPS1 : 1;
418 unsigned TMR1GE : 1;
419 unsigned T1GINV : 1;
420 };
421
422 struct
423 {
424 unsigned : 4;
425 unsigned T1CKPS : 2;
426 unsigned : 2;
427 };
428 } __T1CONbits_t;
429
430 extern __at(0x0010) volatile __T1CONbits_t T1CONbits;
431
432 #define _TMR1ON 0x01
433 #define _TMR1CS 0x02
434 #define _NOT_T1SYNC 0x04
435 #define _T1OSCEN 0x08
436 #define _T1CKPS0 0x10
437 #define _T1CKPS1 0x20
438 #define _TMR1GE 0x40
439 #define _T1GINV 0x80
440
441 //==============================================================================
442
443 extern __at(0x0011) __sfr TMR2;
444
445 //==============================================================================
446 // T2CON Bits
447
448 extern __at(0x0012) __sfr T2CON;
449
450 typedef union
451 {
452 struct
453 {
454 unsigned T2CKPS0 : 1;
455 unsigned T2CKPS1 : 1;
456 unsigned TMR2ON : 1;
457 unsigned TOUTPS0 : 1;
458 unsigned TOUTPS1 : 1;
459 unsigned TOUTPS2 : 1;
460 unsigned TOUTPS3 : 1;
461 unsigned : 1;
462 };
463
464 struct
465 {
466 unsigned : 1;
467 unsigned : 1;
468 unsigned T2ON : 1;
469 unsigned : 1;
470 unsigned : 1;
471 unsigned : 1;
472 unsigned : 1;
473 unsigned : 1;
474 };
475
476 struct
477 {
478 unsigned T2CKPS : 2;
479 unsigned : 6;
480 };
481
482 struct
483 {
484 unsigned : 3;
485 unsigned TOUTPS : 4;
486 unsigned : 1;
487 };
488 } __T2CONbits_t;
489
490 extern __at(0x0012) volatile __T2CONbits_t T2CONbits;
491
492 #define _T2CKPS0 0x01
493 #define _T2CKPS1 0x02
494 #define _TMR2ON 0x04
495 #define _T2ON 0x04
496 #define _TOUTPS0 0x08
497 #define _TOUTPS1 0x10
498 #define _TOUTPS2 0x20
499 #define _TOUTPS3 0x40
500
501 //==============================================================================
502
503 extern __at(0x0013) __sfr CCPR1;
504 extern __at(0x0013) __sfr CCPR1L;
505 extern __at(0x0014) __sfr CCPR1H;
506
507 //==============================================================================
508 // CCP1CON Bits
509
510 extern __at(0x0015) __sfr CCP1CON;
511
512 typedef union
513 {
514 struct
515 {
516 unsigned CCP1M0 : 1;
517 unsigned CCP1M1 : 1;
518 unsigned CCP1M2 : 1;
519 unsigned CCP1M3 : 1;
520 unsigned DC1B0 : 1;
521 unsigned DC1B1 : 1;
522 unsigned : 1;
523 unsigned P1M : 1;
524 };
525
526 struct
527 {
528 unsigned CCP1M : 4;
529 unsigned : 4;
530 };
531
532 struct
533 {
534 unsigned : 4;
535 unsigned DC1B : 2;
536 unsigned : 2;
537 };
538 } __CCP1CONbits_t;
539
540 extern __at(0x0015) volatile __CCP1CONbits_t CCP1CONbits;
541
542 #define _CCP1M0 0x01
543 #define _CCP1M1 0x02
544 #define _CCP1M2 0x04
545 #define _CCP1M3 0x08
546 #define _DC1B0 0x10
547 #define _DC1B1 0x20
548 #define _P1M 0x80
549
550 //==============================================================================
551
552
553 //==============================================================================
554 // PWM1CON Bits
555
556 extern __at(0x0016) __sfr PWM1CON;
557
558 typedef union
559 {
560 struct
561 {
562 unsigned PDC0 : 1;
563 unsigned PDC1 : 1;
564 unsigned PDC2 : 1;
565 unsigned PDC3 : 1;
566 unsigned PDC4 : 1;
567 unsigned PDC5 : 1;
568 unsigned PDC6 : 1;
569 unsigned PRSEN : 1;
570 };
571
572 struct
573 {
574 unsigned PDC : 7;
575 unsigned : 1;
576 };
577 } __PWM1CONbits_t;
578
579 extern __at(0x0016) volatile __PWM1CONbits_t PWM1CONbits;
580
581 #define _PDC0 0x01
582 #define _PDC1 0x02
583 #define _PDC2 0x04
584 #define _PDC3 0x08
585 #define _PDC4 0x10
586 #define _PDC5 0x20
587 #define _PDC6 0x40
588 #define _PRSEN 0x80
589
590 //==============================================================================
591
592
593 //==============================================================================
594 // ECCPAS Bits
595
596 extern __at(0x0017) __sfr ECCPAS;
597
598 typedef union
599 {
600 struct
601 {
602 unsigned PSSBD0 : 1;
603 unsigned PSSBD1 : 1;
604 unsigned PSSAC0 : 1;
605 unsigned PSSAC1 : 1;
606 unsigned ECCPAS0 : 1;
607 unsigned ECCPAS1 : 1;
608 unsigned ECCPAS2 : 1;
609 unsigned ECCPASE : 1;
610 };
611
612 struct
613 {
614 unsigned PSSBD : 2;
615 unsigned : 6;
616 };
617
618 struct
619 {
620 unsigned : 2;
621 unsigned PSSAC : 2;
622 unsigned : 4;
623 };
624
625 struct
626 {
627 unsigned : 4;
628 unsigned ECCPAS : 3;
629 unsigned : 1;
630 };
631 } __ECCPASbits_t;
632
633 extern __at(0x0017) volatile __ECCPASbits_t ECCPASbits;
634
635 #define _PSSBD0 0x01
636 #define _PSSBD1 0x02
637 #define _PSSAC0 0x04
638 #define _PSSAC1 0x08
639 #define _ECCPAS0 0x10
640 #define _ECCPAS1 0x20
641 #define _ECCPAS2 0x40
642 #define _ECCPASE 0x80
643
644 //==============================================================================
645
646
647 //==============================================================================
648 // VRCON Bits
649
650 extern __at(0x0019) __sfr VRCON;
651
652 typedef union
653 {
654 struct
655 {
656 unsigned VR0 : 1;
657 unsigned VR1 : 1;
658 unsigned VR2 : 1;
659 unsigned VR3 : 1;
660 unsigned FBREN : 1;
661 unsigned VRR : 1;
662 unsigned : 1;
663 unsigned C1VREN : 1;
664 };
665
666 struct
667 {
668 unsigned : 1;
669 unsigned : 1;
670 unsigned : 1;
671 unsigned : 1;
672 unsigned VP6EN : 1;
673 unsigned : 1;
674 unsigned : 1;
675 unsigned CMVREN : 1;
676 };
677
678 struct
679 {
680 unsigned : 1;
681 unsigned : 1;
682 unsigned : 1;
683 unsigned : 1;
684 unsigned FVREN : 1;
685 unsigned : 1;
686 unsigned : 1;
687 unsigned : 1;
688 };
689
690 struct
691 {
692 unsigned VR : 4;
693 unsigned : 4;
694 };
695 } __VRCONbits_t;
696
697 extern __at(0x0019) volatile __VRCONbits_t VRCONbits;
698
699 #define _VR0 0x01
700 #define _VR1 0x02
701 #define _VR2 0x04
702 #define _VR3 0x08
703 #define _FBREN 0x10
704 #define _VP6EN 0x10
705 #define _FVREN 0x10
706 #define _VRR 0x20
707 #define _C1VREN 0x80
708 #define _CMVREN 0x80
709
710 //==============================================================================
711
712
713 //==============================================================================
714 // CMCON0 Bits
715
716 extern __at(0x001A) __sfr CMCON0;
717
718 typedef union
719 {
720 struct
721 {
722 unsigned C1CH : 1;
723 unsigned : 1;
724 unsigned C1R : 1;
725 unsigned : 1;
726 unsigned C1POL : 1;
727 unsigned C1OE : 1;
728 unsigned C1OUT : 1;
729 unsigned C1ON : 1;
730 };
731
732 struct
733 {
734 unsigned C1CH0 : 1;
735 unsigned : 1;
736 unsigned CMR : 1;
737 unsigned : 1;
738 unsigned CMPOL : 1;
739 unsigned CMOE : 1;
740 unsigned COUT : 1;
741 unsigned CMON : 1;
742 };
743
744 struct
745 {
746 unsigned CMCH : 1;
747 unsigned : 1;
748 unsigned : 1;
749 unsigned : 1;
750 unsigned : 1;
751 unsigned : 1;
752 unsigned : 1;
753 unsigned : 1;
754 };
755 } __CMCON0bits_t;
756
757 extern __at(0x001A) volatile __CMCON0bits_t CMCON0bits;
758
759 #define _C1CH 0x01
760 #define _C1CH0 0x01
761 #define _CMCH 0x01
762 #define _C1R 0x04
763 #define _CMR 0x04
764 #define _C1POL 0x10
765 #define _CMPOL 0x10
766 #define _C1OE 0x20
767 #define _CMOE 0x20
768 #define _C1OUT 0x40
769 #define _COUT 0x40
770 #define _C1ON 0x80
771 #define _CMON 0x80
772
773 //==============================================================================
774
775
776 //==============================================================================
777 // CMCON1 Bits
778
779 extern __at(0x001C) __sfr CMCON1;
780
781 typedef union
782 {
783 struct
784 {
785 unsigned C1SYNC : 1;
786 unsigned T1GSS : 1;
787 unsigned : 1;
788 unsigned C1HYS : 1;
789 unsigned T1ACS : 1;
790 unsigned : 1;
791 unsigned : 1;
792 unsigned : 1;
793 };
794
795 struct
796 {
797 unsigned CMSYNC : 1;
798 unsigned : 1;
799 unsigned : 1;
800 unsigned CMHYS : 1;
801 unsigned : 1;
802 unsigned : 1;
803 unsigned : 1;
804 unsigned : 1;
805 };
806 } __CMCON1bits_t;
807
808 extern __at(0x001C) volatile __CMCON1bits_t CMCON1bits;
809
810 #define _C1SYNC 0x01
811 #define _CMSYNC 0x01
812 #define _T1GSS 0x02
813 #define _C1HYS 0x08
814 #define _CMHYS 0x08
815 #define _T1ACS 0x10
816
817 //==============================================================================
818
819 extern __at(0x001E) __sfr ADRESH;
820
821 //==============================================================================
822 // ADCON0 Bits
823
824 extern __at(0x001F) __sfr ADCON0;
825
826 typedef union
827 {
828 struct
829 {
830 unsigned ADON : 1;
831 unsigned GO_NOT_DONE : 1;
832 unsigned CHS0 : 1;
833 unsigned CHS1 : 1;
834 unsigned CHS2 : 1;
835 unsigned : 1;
836 unsigned VCFG : 1;
837 unsigned ADFM : 1;
838 };
839
840 struct
841 {
842 unsigned : 1;
843 unsigned GO : 1;
844 unsigned : 1;
845 unsigned : 1;
846 unsigned : 1;
847 unsigned : 1;
848 unsigned : 1;
849 unsigned : 1;
850 };
851
852 struct
853 {
854 unsigned : 1;
855 unsigned NOT_DONE : 1;
856 unsigned : 1;
857 unsigned : 1;
858 unsigned : 1;
859 unsigned : 1;
860 unsigned : 1;
861 unsigned : 1;
862 };
863
864 struct
865 {
866 unsigned : 1;
867 unsigned GO_DONE : 1;
868 unsigned : 1;
869 unsigned : 1;
870 unsigned : 1;
871 unsigned : 1;
872 unsigned : 1;
873 unsigned : 1;
874 };
875
876 struct
877 {
878 unsigned : 2;
879 unsigned CHS : 3;
880 unsigned : 3;
881 };
882 } __ADCON0bits_t;
883
884 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits;
885
886 #define _ADON 0x01
887 #define _GO_NOT_DONE 0x02
888 #define _GO 0x02
889 #define _NOT_DONE 0x02
890 #define _GO_DONE 0x02
891 #define _CHS0 0x04
892 #define _CHS1 0x08
893 #define _CHS2 0x10
894 #define _VCFG 0x40
895 #define _ADFM 0x80
896
897 //==============================================================================
898
899
900 //==============================================================================
901 // OPTION_REG Bits
902
903 extern __at(0x0081) __sfr OPTION_REG;
904
905 typedef union
906 {
907 struct
908 {
909 unsigned PS0 : 1;
910 unsigned PS1 : 1;
911 unsigned PS2 : 1;
912 unsigned PSA : 1;
913 unsigned T0SE : 1;
914 unsigned T0CS : 1;
915 unsigned INTEDG : 1;
916 unsigned NOT_GPPU : 1;
917 };
918
919 struct
920 {
921 unsigned PS : 3;
922 unsigned : 5;
923 };
924 } __OPTION_REGbits_t;
925
926 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
927
928 #define _PS0 0x01
929 #define _PS1 0x02
930 #define _PS2 0x04
931 #define _PSA 0x08
932 #define _T0SE 0x10
933 #define _T0CS 0x20
934 #define _INTEDG 0x40
935 #define _NOT_GPPU 0x80
936
937 //==============================================================================
938
939
940 //==============================================================================
941 // TRISA Bits
942
943 extern __at(0x0085) __sfr TRISA;
944
945 typedef union
946 {
947 struct
948 {
949 unsigned TRISIO0 : 1;
950 unsigned TRISIO1 : 1;
951 unsigned TRISIO2 : 1;
952 unsigned TRISIO3 : 1;
953 unsigned TRISIO4 : 1;
954 unsigned TRISIO5 : 1;
955 unsigned : 1;
956 unsigned : 1;
957 };
958
959 struct
960 {
961 unsigned TRISIO : 6;
962 unsigned : 2;
963 };
964 } __TRISAbits_t;
965
966 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
967
968 #define _TRISIO0 0x01
969 #define _TRISIO1 0x02
970 #define _TRISIO2 0x04
971 #define _TRISIO3 0x08
972 #define _TRISIO4 0x10
973 #define _TRISIO5 0x20
974
975 //==============================================================================
976
977
978 //==============================================================================
979 // TRISIO Bits
980
981 extern __at(0x0085) __sfr TRISIO;
982
983 typedef union
984 {
985 struct
986 {
987 unsigned TRISIO0 : 1;
988 unsigned TRISIO1 : 1;
989 unsigned TRISIO2 : 1;
990 unsigned TRISIO3 : 1;
991 unsigned TRISIO4 : 1;
992 unsigned TRISIO5 : 1;
993 unsigned : 1;
994 unsigned : 1;
995 };
996
997 struct
998 {
999 unsigned TRISIO : 6;
1000 unsigned : 2;
1001 };
1002 } __TRISIObits_t;
1003
1004 extern __at(0x0085) volatile __TRISIObits_t TRISIObits;
1005
1006 #define _TRISIO_TRISIO0 0x01
1007 #define _TRISIO_TRISIO1 0x02
1008 #define _TRISIO_TRISIO2 0x04
1009 #define _TRISIO_TRISIO3 0x08
1010 #define _TRISIO_TRISIO4 0x10
1011 #define _TRISIO_TRISIO5 0x20
1012
1013 //==============================================================================
1014
1015
1016 //==============================================================================
1017 // PIE1 Bits
1018
1019 extern __at(0x008C) __sfr PIE1;
1020
1021 typedef union
1022 {
1023 struct
1024 {
1025 unsigned TMR1IE : 1;
1026 unsigned TMR2IE : 1;
1027 unsigned : 1;
1028 unsigned C1IE : 1;
1029 unsigned : 1;
1030 unsigned ECCPIE : 1;
1031 unsigned ADIE : 1;
1032 unsigned : 1;
1033 };
1034
1035 struct
1036 {
1037 unsigned T1IE : 1;
1038 unsigned T2IE : 1;
1039 unsigned : 1;
1040 unsigned CMIE : 1;
1041 unsigned : 1;
1042 unsigned CCP1IE : 1;
1043 unsigned : 1;
1044 unsigned : 1;
1045 };
1046 } __PIE1bits_t;
1047
1048 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
1049
1050 #define _TMR1IE 0x01
1051 #define _T1IE 0x01
1052 #define _TMR2IE 0x02
1053 #define _T2IE 0x02
1054 #define _C1IE 0x08
1055 #define _CMIE 0x08
1056 #define _ECCPIE 0x20
1057 #define _CCP1IE 0x20
1058 #define _ADIE 0x40
1059
1060 //==============================================================================
1061
1062
1063 //==============================================================================
1064 // PCON Bits
1065
1066 extern __at(0x008E) __sfr PCON;
1067
1068 typedef union
1069 {
1070 struct
1071 {
1072 unsigned NOT_BOR : 1;
1073 unsigned NOT_POR : 1;
1074 unsigned : 1;
1075 unsigned : 1;
1076 unsigned : 1;
1077 unsigned : 1;
1078 unsigned : 1;
1079 unsigned : 1;
1080 };
1081
1082 struct
1083 {
1084 unsigned NOT_BOD : 1;
1085 unsigned : 1;
1086 unsigned : 1;
1087 unsigned : 1;
1088 unsigned : 1;
1089 unsigned : 1;
1090 unsigned : 1;
1091 unsigned : 1;
1092 };
1093 } __PCONbits_t;
1094
1095 extern __at(0x008E) volatile __PCONbits_t PCONbits;
1096
1097 #define _NOT_BOR 0x01
1098 #define _NOT_BOD 0x01
1099 #define _NOT_POR 0x02
1100
1101 //==============================================================================
1102
1103
1104 //==============================================================================
1105 // OSCTUNE Bits
1106
1107 extern __at(0x0090) __sfr OSCTUNE;
1108
1109 typedef union
1110 {
1111 struct
1112 {
1113 unsigned TUN0 : 1;
1114 unsigned TUN1 : 1;
1115 unsigned TUN2 : 1;
1116 unsigned TUN3 : 1;
1117 unsigned TUN4 : 1;
1118 unsigned : 1;
1119 unsigned : 1;
1120 unsigned : 1;
1121 };
1122
1123 struct
1124 {
1125 unsigned TUN : 5;
1126 unsigned : 3;
1127 };
1128 } __OSCTUNEbits_t;
1129
1130 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits;
1131
1132 #define _TUN0 0x01
1133 #define _TUN1 0x02
1134 #define _TUN2 0x04
1135 #define _TUN3 0x08
1136 #define _TUN4 0x10
1137
1138 //==============================================================================
1139
1140 extern __at(0x0092) __sfr PR2;
1141
1142 //==============================================================================
1143 // APFCON Bits
1144
1145 extern __at(0x0093) __sfr APFCON;
1146
1147 typedef struct
1148 {
1149 unsigned P1ASEL : 1;
1150 unsigned P1BSEL : 1;
1151 unsigned : 1;
1152 unsigned : 1;
1153 unsigned T1GSEL : 1;
1154 unsigned : 1;
1155 unsigned : 1;
1156 unsigned : 1;
1157 } __APFCONbits_t;
1158
1159 extern __at(0x0093) volatile __APFCONbits_t APFCONbits;
1160
1161 #define _P1ASEL 0x01
1162 #define _P1BSEL 0x02
1163 #define _T1GSEL 0x10
1164
1165 //==============================================================================
1166
1167
1168 //==============================================================================
1169 // WPU Bits
1170
1171 extern __at(0x0095) __sfr WPU;
1172
1173 typedef union
1174 {
1175 struct
1176 {
1177 unsigned WPUA0 : 1;
1178 unsigned WPUA1 : 1;
1179 unsigned WPUA2 : 1;
1180 unsigned : 1;
1181 unsigned WPUA4 : 1;
1182 unsigned WPUA5 : 1;
1183 unsigned : 1;
1184 unsigned : 1;
1185 };
1186
1187 struct
1188 {
1189 unsigned WPU0 : 1;
1190 unsigned WPU1 : 1;
1191 unsigned WPU2 : 1;
1192 unsigned : 1;
1193 unsigned WPU4 : 1;
1194 unsigned WPU5 : 1;
1195 unsigned : 1;
1196 unsigned : 1;
1197 };
1198 } __WPUbits_t;
1199
1200 extern __at(0x0095) volatile __WPUbits_t WPUbits;
1201
1202 #define _WPUA0 0x01
1203 #define _WPU0 0x01
1204 #define _WPUA1 0x02
1205 #define _WPU1 0x02
1206 #define _WPUA2 0x04
1207 #define _WPU2 0x04
1208 #define _WPUA4 0x10
1209 #define _WPU4 0x10
1210 #define _WPUA5 0x20
1211 #define _WPU5 0x20
1212
1213 //==============================================================================
1214
1215
1216 //==============================================================================
1217 // WPUA Bits
1218
1219 extern __at(0x0095) __sfr WPUA;
1220
1221 typedef union
1222 {
1223 struct
1224 {
1225 unsigned WPUA0 : 1;
1226 unsigned WPUA1 : 1;
1227 unsigned WPUA2 : 1;
1228 unsigned : 1;
1229 unsigned WPUA4 : 1;
1230 unsigned WPUA5 : 1;
1231 unsigned : 1;
1232 unsigned : 1;
1233 };
1234
1235 struct
1236 {
1237 unsigned WPU0 : 1;
1238 unsigned WPU1 : 1;
1239 unsigned WPU2 : 1;
1240 unsigned : 1;
1241 unsigned WPU4 : 1;
1242 unsigned WPU5 : 1;
1243 unsigned : 1;
1244 unsigned : 1;
1245 };
1246 } __WPUAbits_t;
1247
1248 extern __at(0x0095) volatile __WPUAbits_t WPUAbits;
1249
1250 #define _WPUA_WPUA0 0x01
1251 #define _WPUA_WPU0 0x01
1252 #define _WPUA_WPUA1 0x02
1253 #define _WPUA_WPU1 0x02
1254 #define _WPUA_WPUA2 0x04
1255 #define _WPUA_WPU2 0x04
1256 #define _WPUA_WPUA4 0x10
1257 #define _WPUA_WPU4 0x10
1258 #define _WPUA_WPUA5 0x20
1259 #define _WPUA_WPU5 0x20
1260
1261 //==============================================================================
1262
1263
1264 //==============================================================================
1265 // IOC Bits
1266
1267 extern __at(0x0096) __sfr IOC;
1268
1269 typedef union
1270 {
1271 struct
1272 {
1273 unsigned IOC0 : 1;
1274 unsigned IOC1 : 1;
1275 unsigned IOC2 : 1;
1276 unsigned IOC3 : 1;
1277 unsigned IOC4 : 1;
1278 unsigned IOC5 : 1;
1279 unsigned : 1;
1280 unsigned : 1;
1281 };
1282
1283 struct
1284 {
1285 unsigned IOCA0 : 1;
1286 unsigned IOCA1 : 1;
1287 unsigned IOCA2 : 1;
1288 unsigned IOCA3 : 1;
1289 unsigned IOCA4 : 1;
1290 unsigned IOCA5 : 1;
1291 unsigned : 1;
1292 unsigned : 1;
1293 };
1294
1295 struct
1296 {
1297 unsigned IOC : 6;
1298 unsigned : 2;
1299 };
1300
1301 struct
1302 {
1303 unsigned IOCA : 6;
1304 unsigned : 2;
1305 };
1306 } __IOCbits_t;
1307
1308 extern __at(0x0096) volatile __IOCbits_t IOCbits;
1309
1310 #define _IOC0 0x01
1311 #define _IOCA0 0x01
1312 #define _IOC1 0x02
1313 #define _IOCA1 0x02
1314 #define _IOC2 0x04
1315 #define _IOCA2 0x04
1316 #define _IOC3 0x08
1317 #define _IOCA3 0x08
1318 #define _IOC4 0x10
1319 #define _IOCA4 0x10
1320 #define _IOC5 0x20
1321 #define _IOCA5 0x20
1322
1323 //==============================================================================
1324
1325
1326 //==============================================================================
1327 // IOCA Bits
1328
1329 extern __at(0x0096) __sfr IOCA;
1330
1331 typedef union
1332 {
1333 struct
1334 {
1335 unsigned IOC0 : 1;
1336 unsigned IOC1 : 1;
1337 unsigned IOC2 : 1;
1338 unsigned IOC3 : 1;
1339 unsigned IOC4 : 1;
1340 unsigned IOC5 : 1;
1341 unsigned : 1;
1342 unsigned : 1;
1343 };
1344
1345 struct
1346 {
1347 unsigned IOCA0 : 1;
1348 unsigned IOCA1 : 1;
1349 unsigned IOCA2 : 1;
1350 unsigned IOCA3 : 1;
1351 unsigned IOCA4 : 1;
1352 unsigned IOCA5 : 1;
1353 unsigned : 1;
1354 unsigned : 1;
1355 };
1356
1357 struct
1358 {
1359 unsigned IOC : 6;
1360 unsigned : 2;
1361 };
1362
1363 struct
1364 {
1365 unsigned IOCA : 6;
1366 unsigned : 2;
1367 };
1368 } __IOCAbits_t;
1369
1370 extern __at(0x0096) volatile __IOCAbits_t IOCAbits;
1371
1372 #define _IOCA_IOC0 0x01
1373 #define _IOCA_IOCA0 0x01
1374 #define _IOCA_IOC1 0x02
1375 #define _IOCA_IOCA1 0x02
1376 #define _IOCA_IOC2 0x04
1377 #define _IOCA_IOCA2 0x04
1378 #define _IOCA_IOC3 0x08
1379 #define _IOCA_IOCA3 0x08
1380 #define _IOCA_IOC4 0x10
1381 #define _IOCA_IOCA4 0x10
1382 #define _IOCA_IOC5 0x20
1383 #define _IOCA_IOCA5 0x20
1384
1385 //==============================================================================
1386
1387 extern __at(0x009E) __sfr ADRESL;
1388
1389 //==============================================================================
1390 // ANSEL Bits
1391
1392 extern __at(0x009F) __sfr ANSEL;
1393
1394 typedef union
1395 {
1396 struct
1397 {
1398 unsigned AN0 : 1;
1399 unsigned AN1 : 1;
1400 unsigned AN2 : 1;
1401 unsigned AN3 : 1;
1402 unsigned ADCS0 : 1;
1403 unsigned ADCS1 : 1;
1404 unsigned ADCS2 : 1;
1405 unsigned : 1;
1406 };
1407
1408 struct
1409 {
1410 unsigned AN : 4;
1411 unsigned : 4;
1412 };
1413
1414 struct
1415 {
1416 unsigned : 4;
1417 unsigned ADCS : 3;
1418 unsigned : 1;
1419 };
1420 } __ANSELbits_t;
1421
1422 extern __at(0x009F) volatile __ANSELbits_t ANSELbits;
1423
1424 #define _AN0 0x01
1425 #define _AN1 0x02
1426 #define _AN2 0x04
1427 #define _AN3 0x08
1428 #define _ADCS0 0x10
1429 #define _ADCS1 0x20
1430 #define _ADCS2 0x40
1431
1432 //==============================================================================
1433
1434
1435 //==============================================================================
1436 //
1437 // Configuration Bits
1438 //
1439 //==============================================================================
1440
1441 #define _CONFIG 0x2007
1442
1443 //----------------------------- CONFIG Options -------------------------------
1444
1445 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
1446 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
1447 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
1448 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
1449 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
1450 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
1451 #define _FOSC_EC 0x3FFB // EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN.
1452 #define _EC_OSC 0x3FFB // EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN.
1453 #define _FOSC_INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
1454 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
1455 #define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
1456 #define _FOSC_INTOSCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
1457 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
1458 #define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
1459 #define _FOSC_EXTRCIO 0x3FFE // RCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
1460 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // RCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
1461 #define _EXTRCIO 0x3FFE // RCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
1462 #define _FOSC_EXTRCCLK 0x3FFF // RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
1463 #define _EXTRC_OSC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
1464 #define _EXTRC 0x3FFF // RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
1465 #define _WDTE_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
1466 #define _WDT_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
1467 #define _WDTE_ON 0x3FFF // WDT enabled.
1468 #define _WDT_ON 0x3FFF // WDT enabled.
1469 #define _PWRTE_ON 0x3FEF // PWRT enabled.
1470 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1471 #define _MCLRE_OFF 0x3FDF // MCLR pin function is digital input, MCLR internally tied to VDD.
1472 #define _MCLRE_ON 0x3FFF // MCLR pin function is MCLR.
1473 #define _CP_ON 0x3FBF // Program memory code protection is enabled.
1474 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
1475 #define _IOSCFS_4MHZ 0x3F7F // 4 MHz.
1476 #define _IOSCFS4 0x3F7F // 4 MHz.
1477 #define _IOSCFS_8MHZ 0x3FFF // 8 MHz.
1478 #define _IOSCFS8 0x3FFF // 8 MHz.
1479 #define _BOREN_OFF 0x3CFF // BOR disabled.
1480 #define _BOR_OFF 0x3CFF // BOR disabled.
1481 #define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1482 #define _BOR_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1483 #define _BOREN_ON 0x3FFF // BOR enabled.
1484 #define _BOR_ON 0x3FFF // BOR enabled.
1485
1486 //==============================================================================
1487
1488 #define _DEVID1 0x2006
1489
1490 #define _IDLOC0 0x2000
1491 #define _IDLOC1 0x2001
1492 #define _IDLOC2 0x2002
1493 #define _IDLOC3 0x2003
1494
1495 //==============================================================================
1496
1497 #ifndef NO_BIT_DEFINES
1498
1499 #define ADON ADCON0bits.ADON // bit 0
1500 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
1501 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
1502 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
1503 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
1504 #define CHS0 ADCON0bits.CHS0 // bit 2
1505 #define CHS1 ADCON0bits.CHS1 // bit 3
1506 #define CHS2 ADCON0bits.CHS2 // bit 4
1507 #define VCFG ADCON0bits.VCFG // bit 6
1508 #define ADFM ADCON0bits.ADFM // bit 7
1509
1510 #define AN0 ANSELbits.AN0 // bit 0
1511 #define AN1 ANSELbits.AN1 // bit 1
1512 #define AN2 ANSELbits.AN2 // bit 2
1513 #define AN3 ANSELbits.AN3 // bit 3
1514 #define ADCS0 ANSELbits.ADCS0 // bit 4
1515 #define ADCS1 ANSELbits.ADCS1 // bit 5
1516 #define ADCS2 ANSELbits.ADCS2 // bit 6
1517
1518 #define P1ASEL APFCONbits.P1ASEL // bit 0
1519 #define P1BSEL APFCONbits.P1BSEL // bit 1
1520 #define T1GSEL APFCONbits.T1GSEL // bit 4
1521
1522 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1523 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1524 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1525 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1526 #define DC1B0 CCP1CONbits.DC1B0 // bit 4
1527 #define DC1B1 CCP1CONbits.DC1B1 // bit 5
1528 #define P1M CCP1CONbits.P1M // bit 7
1529
1530 #define C1CH CMCON0bits.C1CH // bit 0, shadows bit in CMCON0bits
1531 #define C1CH0 CMCON0bits.C1CH0 // bit 0, shadows bit in CMCON0bits
1532 #define CMCH CMCON0bits.CMCH // bit 0, shadows bit in CMCON0bits
1533 #define C1R CMCON0bits.C1R // bit 2, shadows bit in CMCON0bits
1534 #define CMR CMCON0bits.CMR // bit 2, shadows bit in CMCON0bits
1535 #define C1POL CMCON0bits.C1POL // bit 4, shadows bit in CMCON0bits
1536 #define CMPOL CMCON0bits.CMPOL // bit 4, shadows bit in CMCON0bits
1537 #define C1OE CMCON0bits.C1OE // bit 5, shadows bit in CMCON0bits
1538 #define CMOE CMCON0bits.CMOE // bit 5, shadows bit in CMCON0bits
1539 #define C1OUT CMCON0bits.C1OUT // bit 6, shadows bit in CMCON0bits
1540 #define COUT CMCON0bits.COUT // bit 6, shadows bit in CMCON0bits
1541 #define C1ON CMCON0bits.C1ON // bit 7, shadows bit in CMCON0bits
1542 #define CMON CMCON0bits.CMON // bit 7, shadows bit in CMCON0bits
1543
1544 #define C1SYNC CMCON1bits.C1SYNC // bit 0, shadows bit in CMCON1bits
1545 #define CMSYNC CMCON1bits.CMSYNC // bit 0, shadows bit in CMCON1bits
1546 #define T1GSS CMCON1bits.T1GSS // bit 1
1547 #define C1HYS CMCON1bits.C1HYS // bit 3, shadows bit in CMCON1bits
1548 #define CMHYS CMCON1bits.CMHYS // bit 3, shadows bit in CMCON1bits
1549 #define T1ACS CMCON1bits.T1ACS // bit 4
1550
1551 #define PSSBD0 ECCPASbits.PSSBD0 // bit 0
1552 #define PSSBD1 ECCPASbits.PSSBD1 // bit 1
1553 #define PSSAC0 ECCPASbits.PSSAC0 // bit 2
1554 #define PSSAC1 ECCPASbits.PSSAC1 // bit 3
1555 #define ECCPAS0 ECCPASbits.ECCPAS0 // bit 4
1556 #define ECCPAS1 ECCPASbits.ECCPAS1 // bit 5
1557 #define ECCPAS2 ECCPASbits.ECCPAS2 // bit 6
1558 #define ECCPASE ECCPASbits.ECCPASE // bit 7
1559
1560 #define GP0 GPIObits.GP0 // bit 0, shadows bit in GPIObits
1561 #define GPIO0 GPIObits.GPIO0 // bit 0, shadows bit in GPIObits
1562 #define RA0 GPIObits.RA0 // bit 0, shadows bit in GPIObits
1563 #define GP1 GPIObits.GP1 // bit 1, shadows bit in GPIObits
1564 #define GPIO1 GPIObits.GPIO1 // bit 1, shadows bit in GPIObits
1565 #define RA1 GPIObits.RA1 // bit 1, shadows bit in GPIObits
1566 #define GP2 GPIObits.GP2 // bit 2, shadows bit in GPIObits
1567 #define GPIO2 GPIObits.GPIO2 // bit 2, shadows bit in GPIObits
1568 #define RA2 GPIObits.RA2 // bit 2, shadows bit in GPIObits
1569 #define GP3 GPIObits.GP3 // bit 3, shadows bit in GPIObits
1570 #define GPIO3 GPIObits.GPIO3 // bit 3, shadows bit in GPIObits
1571 #define RA3 GPIObits.RA3 // bit 3, shadows bit in GPIObits
1572 #define GP4 GPIObits.GP4 // bit 4, shadows bit in GPIObits
1573 #define GPIO4 GPIObits.GPIO4 // bit 4, shadows bit in GPIObits
1574 #define RA4 GPIObits.RA4 // bit 4, shadows bit in GPIObits
1575 #define GP5 GPIObits.GP5 // bit 5, shadows bit in GPIObits
1576 #define GPIO5 GPIObits.GPIO5 // bit 5, shadows bit in GPIObits
1577 #define RA5 GPIObits.RA5 // bit 5, shadows bit in GPIObits
1578
1579 #define GPIF INTCONbits.GPIF // bit 0
1580 #define INTF INTCONbits.INTF // bit 1
1581 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
1582 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
1583 #define GPIE INTCONbits.GPIE // bit 3
1584 #define INTE INTCONbits.INTE // bit 4
1585 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
1586 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
1587 #define PEIE INTCONbits.PEIE // bit 6
1588 #define GIE INTCONbits.GIE // bit 7
1589
1590 #define IOC0 IOCbits.IOC0 // bit 0, shadows bit in IOCbits
1591 #define IOCA0 IOCbits.IOCA0 // bit 0, shadows bit in IOCbits
1592 #define IOC1 IOCbits.IOC1 // bit 1, shadows bit in IOCbits
1593 #define IOCA1 IOCbits.IOCA1 // bit 1, shadows bit in IOCbits
1594 #define IOC2 IOCbits.IOC2 // bit 2, shadows bit in IOCbits
1595 #define IOCA2 IOCbits.IOCA2 // bit 2, shadows bit in IOCbits
1596 #define IOC3 IOCbits.IOC3 // bit 3, shadows bit in IOCbits
1597 #define IOCA3 IOCbits.IOCA3 // bit 3, shadows bit in IOCbits
1598 #define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits
1599 #define IOCA4 IOCbits.IOCA4 // bit 4, shadows bit in IOCbits
1600 #define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits
1601 #define IOCA5 IOCbits.IOCA5 // bit 5, shadows bit in IOCbits
1602
1603 #define PS0 OPTION_REGbits.PS0 // bit 0
1604 #define PS1 OPTION_REGbits.PS1 // bit 1
1605 #define PS2 OPTION_REGbits.PS2 // bit 2
1606 #define PSA OPTION_REGbits.PSA // bit 3
1607 #define T0SE OPTION_REGbits.T0SE // bit 4
1608 #define T0CS OPTION_REGbits.T0CS // bit 5
1609 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1610 #define NOT_GPPU OPTION_REGbits.NOT_GPPU // bit 7
1611
1612 #define TUN0 OSCTUNEbits.TUN0 // bit 0
1613 #define TUN1 OSCTUNEbits.TUN1 // bit 1
1614 #define TUN2 OSCTUNEbits.TUN2 // bit 2
1615 #define TUN3 OSCTUNEbits.TUN3 // bit 3
1616 #define TUN4 OSCTUNEbits.TUN4 // bit 4
1617
1618 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1619 #define NOT_BOD PCONbits.NOT_BOD // bit 0, shadows bit in PCONbits
1620 #define NOT_POR PCONbits.NOT_POR // bit 1
1621
1622 #define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits
1623 #define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits
1624 #define TMR2IE PIE1bits.TMR2IE // bit 1, shadows bit in PIE1bits
1625 #define T2IE PIE1bits.T2IE // bit 1, shadows bit in PIE1bits
1626 #define C1IE PIE1bits.C1IE // bit 3, shadows bit in PIE1bits
1627 #define CMIE PIE1bits.CMIE // bit 3, shadows bit in PIE1bits
1628 #define ECCPIE PIE1bits.ECCPIE // bit 5, shadows bit in PIE1bits
1629 #define CCP1IE PIE1bits.CCP1IE // bit 5, shadows bit in PIE1bits
1630 #define ADIE PIE1bits.ADIE // bit 6
1631
1632 #define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits
1633 #define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits
1634 #define TMR2IF PIR1bits.TMR2IF // bit 1, shadows bit in PIR1bits
1635 #define T2IF PIR1bits.T2IF // bit 1, shadows bit in PIR1bits
1636 #define C1IF PIR1bits.C1IF // bit 3, shadows bit in PIR1bits
1637 #define CMIF PIR1bits.CMIF // bit 3, shadows bit in PIR1bits
1638 #define ECCPIF PIR1bits.ECCPIF // bit 5, shadows bit in PIR1bits
1639 #define CCP1IF PIR1bits.CCP1IF // bit 5, shadows bit in PIR1bits
1640 #define ADIF PIR1bits.ADIF // bit 6
1641
1642 #define PDC0 PWM1CONbits.PDC0 // bit 0
1643 #define PDC1 PWM1CONbits.PDC1 // bit 1
1644 #define PDC2 PWM1CONbits.PDC2 // bit 2
1645 #define PDC3 PWM1CONbits.PDC3 // bit 3
1646 #define PDC4 PWM1CONbits.PDC4 // bit 4
1647 #define PDC5 PWM1CONbits.PDC5 // bit 5
1648 #define PDC6 PWM1CONbits.PDC6 // bit 6
1649 #define PRSEN PWM1CONbits.PRSEN // bit 7
1650
1651 #define C STATUSbits.C // bit 0
1652 #define DC STATUSbits.DC // bit 1
1653 #define Z STATUSbits.Z // bit 2
1654 #define NOT_PD STATUSbits.NOT_PD // bit 3
1655 #define NOT_TO STATUSbits.NOT_TO // bit 4
1656 #define RP0 STATUSbits.RP0 // bit 5
1657 #define RP1 STATUSbits.RP1 // bit 6
1658 #define IRP STATUSbits.IRP // bit 7
1659
1660 #define TMR1ON T1CONbits.TMR1ON // bit 0
1661 #define TMR1CS T1CONbits.TMR1CS // bit 1
1662 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
1663 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1664 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1665 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1666 #define TMR1GE T1CONbits.TMR1GE // bit 6
1667 #define T1GINV T1CONbits.T1GINV // bit 7
1668
1669 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1670 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1671 #define TMR2ON T2CONbits.TMR2ON // bit 2, shadows bit in T2CONbits
1672 #define T2ON T2CONbits.T2ON // bit 2, shadows bit in T2CONbits
1673 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1674 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1675 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1676 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1677
1678 #define TRISIO0 TRISAbits.TRISIO0 // bit 0
1679 #define TRISIO1 TRISAbits.TRISIO1 // bit 1
1680 #define TRISIO2 TRISAbits.TRISIO2 // bit 2
1681 #define TRISIO3 TRISAbits.TRISIO3 // bit 3
1682 #define TRISIO4 TRISAbits.TRISIO4 // bit 4
1683 #define TRISIO5 TRISAbits.TRISIO5 // bit 5
1684
1685 #define VR0 VRCONbits.VR0 // bit 0
1686 #define VR1 VRCONbits.VR1 // bit 1
1687 #define VR2 VRCONbits.VR2 // bit 2
1688 #define VR3 VRCONbits.VR3 // bit 3
1689 #define FBREN VRCONbits.FBREN // bit 4, shadows bit in VRCONbits
1690 #define VP6EN VRCONbits.VP6EN // bit 4, shadows bit in VRCONbits
1691 #define FVREN VRCONbits.FVREN // bit 4, shadows bit in VRCONbits
1692 #define VRR VRCONbits.VRR // bit 5
1693 #define C1VREN VRCONbits.C1VREN // bit 7, shadows bit in VRCONbits
1694 #define CMVREN VRCONbits.CMVREN // bit 7, shadows bit in VRCONbits
1695
1696 #define WPUA0 WPUbits.WPUA0 // bit 0, shadows bit in WPUbits
1697 #define WPU0 WPUbits.WPU0 // bit 0, shadows bit in WPUbits
1698 #define WPUA1 WPUbits.WPUA1 // bit 1, shadows bit in WPUbits
1699 #define WPU1 WPUbits.WPU1 // bit 1, shadows bit in WPUbits
1700 #define WPUA2 WPUbits.WPUA2 // bit 2, shadows bit in WPUbits
1701 #define WPU2 WPUbits.WPU2 // bit 2, shadows bit in WPUbits
1702 #define WPUA4 WPUbits.WPUA4 // bit 4, shadows bit in WPUbits
1703 #define WPU4 WPUbits.WPU4 // bit 4, shadows bit in WPUbits
1704 #define WPUA5 WPUbits.WPUA5 // bit 5, shadows bit in WPUbits
1705 #define WPU5 WPUbits.WPU5 // bit 5, shadows bit in WPUbits
1706
1707 #endif // #ifndef NO_BIT_DEFINES
1708
1709 #endif // #ifndef __PIC12F615_H__
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