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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic12lf1501.h
blobd47188d464f23895dd8bd1428255c30c9ca8eaf1
1 /*
2 * This declarations of the PIC12LF1501 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:05 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC12LF1501_H__
26 #define __PIC12LF1501_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PIR1_ADDR 0x0011
52 #define PIR2_ADDR 0x0012
53 #define PIR3_ADDR 0x0013
54 #define TMR0_ADDR 0x0015
55 #define TMR1_ADDR 0x0016
56 #define TMR1L_ADDR 0x0016
57 #define TMR1H_ADDR 0x0017
58 #define T1CON_ADDR 0x0018
59 #define T1GCON_ADDR 0x0019
60 #define TMR2_ADDR 0x001A
61 #define PR2_ADDR 0x001B
62 #define T2CON_ADDR 0x001C
63 #define TRISA_ADDR 0x008C
64 #define PIE1_ADDR 0x0091
65 #define PIE2_ADDR 0x0092
66 #define PIE3_ADDR 0x0093
67 #define OPTION_REG_ADDR 0x0095
68 #define PCON_ADDR 0x0096
69 #define WDTCON_ADDR 0x0097
70 #define OSCCON_ADDR 0x0099
71 #define OSCSTAT_ADDR 0x009A
72 #define ADRES_ADDR 0x009B
73 #define ADRESL_ADDR 0x009B
74 #define ADRESH_ADDR 0x009C
75 #define ADCON0_ADDR 0x009D
76 #define ADCON1_ADDR 0x009E
77 #define ADCON2_ADDR 0x009F
78 #define LATA_ADDR 0x010C
79 #define CM1CON0_ADDR 0x0111
80 #define CM1CON1_ADDR 0x0112
81 #define CMOUT_ADDR 0x0115
82 #define BORCON_ADDR 0x0116
83 #define FVRCON_ADDR 0x0117
84 #define DACCON0_ADDR 0x0118
85 #define DACCON1_ADDR 0x0119
86 #define APFCON_ADDR 0x011D
87 #define ANSELA_ADDR 0x018C
88 #define PMADR_ADDR 0x0191
89 #define PMADRL_ADDR 0x0191
90 #define PMADRH_ADDR 0x0192
91 #define PMDAT_ADDR 0x0193
92 #define PMDATL_ADDR 0x0193
93 #define PMDATH_ADDR 0x0194
94 #define PMCON1_ADDR 0x0195
95 #define PMCON2_ADDR 0x0196
96 #define WPUA_ADDR 0x020C
97 #define IOCAP_ADDR 0x0391
98 #define IOCAN_ADDR 0x0392
99 #define IOCAF_ADDR 0x0393
100 #define NCO1ACC_ADDR 0x0498
101 #define NCO1ACCL_ADDR 0x0498
102 #define NCO1ACCH_ADDR 0x0499
103 #define NCO1ACCU_ADDR 0x049A
104 #define NCO1INC_ADDR 0x049B
105 #define NCO1INCL_ADDR 0x049B
106 #define NCO1INCH_ADDR 0x049C
107 #define NCO1INCU_ADDR 0x049D
108 #define NCO1CON_ADDR 0x049E
109 #define NCO1CLK_ADDR 0x049F
110 #define PWM1DCL_ADDR 0x0611
111 #define PWM1DCH_ADDR 0x0612
112 #define PWM1CON_ADDR 0x0613
113 #define PWM1CON0_ADDR 0x0613
114 #define PWM2DCL_ADDR 0x0614
115 #define PWM2DCH_ADDR 0x0615
116 #define PWM2CON_ADDR 0x0616
117 #define PWM2CON0_ADDR 0x0616
118 #define PWM3DCL_ADDR 0x0617
119 #define PWM3DCH_ADDR 0x0618
120 #define PWM3CON_ADDR 0x0619
121 #define PWM3CON0_ADDR 0x0619
122 #define PWM4DCL_ADDR 0x061A
123 #define PWM4DCH_ADDR 0x061B
124 #define PWM4CON_ADDR 0x061C
125 #define PWM4CON0_ADDR 0x061C
126 #define CWG1DBR_ADDR 0x0691
127 #define CWG1DBF_ADDR 0x0692
128 #define CWG1CON0_ADDR 0x0693
129 #define CWG1CON1_ADDR 0x0694
130 #define CWG1CON2_ADDR 0x0695
131 #define CLCDATA_ADDR 0x0F0F
132 #define CLC1CON_ADDR 0x0F10
133 #define CLC1POL_ADDR 0x0F11
134 #define CLC1SEL0_ADDR 0x0F12
135 #define CLC1SEL1_ADDR 0x0F13
136 #define CLC1GLS0_ADDR 0x0F14
137 #define CLC1GLS1_ADDR 0x0F15
138 #define CLC1GLS2_ADDR 0x0F16
139 #define CLC1GLS3_ADDR 0x0F17
140 #define CLC2CON_ADDR 0x0F18
141 #define CLC2POL_ADDR 0x0F19
142 #define CLC2SEL0_ADDR 0x0F1A
143 #define CLC2SEL1_ADDR 0x0F1B
144 #define CLC2GLS0_ADDR 0x0F1C
145 #define CLC2GLS1_ADDR 0x0F1D
146 #define CLC2GLS2_ADDR 0x0F1E
147 #define CLC2GLS3_ADDR 0x0F1F
148 #define BSR_ICDSHAD_ADDR 0x0FE3
149 #define STATUS_SHAD_ADDR 0x0FE4
150 #define WREG_SHAD_ADDR 0x0FE5
151 #define BSR_SHAD_ADDR 0x0FE6
152 #define PCLATH_SHAD_ADDR 0x0FE7
153 #define FSR0L_SHAD_ADDR 0x0FE8
154 #define FSR0H_SHAD_ADDR 0x0FE9
155 #define FSR1L_SHAD_ADDR 0x0FEA
156 #define FSR1H_SHAD_ADDR 0x0FEB
157 #define STKPTR_ADDR 0x0FED
158 #define TOSL_ADDR 0x0FEE
159 #define TOSH_ADDR 0x0FEF
160
161 #endif // #ifndef NO_ADDR_DEFINES
162
163 //==============================================================================
164 //
165 // Register Definitions
166 //
167 //==============================================================================
168
169 extern __at(0x0000) __sfr INDF0;
170 extern __at(0x0001) __sfr INDF1;
171 extern __at(0x0002) __sfr PCL;
172
173 //==============================================================================
174 // STATUS Bits
175
176 extern __at(0x0003) __sfr STATUS;
177
178 typedef struct
179 {
180 unsigned C : 1;
181 unsigned DC : 1;
182 unsigned Z : 1;
183 unsigned NOT_PD : 1;
184 unsigned NOT_TO : 1;
185 unsigned : 1;
186 unsigned : 1;
187 unsigned : 1;
188 } __STATUSbits_t;
189
190 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
191
192 #define _C 0x01
193 #define _DC 0x02
194 #define _Z 0x04
195 #define _NOT_PD 0x08
196 #define _NOT_TO 0x10
197
198 //==============================================================================
199
200 extern __at(0x0004) __sfr FSR0;
201 extern __at(0x0004) __sfr FSR0L;
202 extern __at(0x0005) __sfr FSR0H;
203 extern __at(0x0006) __sfr FSR1;
204 extern __at(0x0006) __sfr FSR1L;
205 extern __at(0x0007) __sfr FSR1H;
206
207 //==============================================================================
208 // BSR Bits
209
210 extern __at(0x0008) __sfr BSR;
211
212 typedef union
213 {
214 struct
215 {
216 unsigned BSR0 : 1;
217 unsigned BSR1 : 1;
218 unsigned BSR2 : 1;
219 unsigned BSR3 : 1;
220 unsigned BSR4 : 1;
221 unsigned : 1;
222 unsigned : 1;
223 unsigned : 1;
224 };
225
226 struct
227 {
228 unsigned BSR : 5;
229 unsigned : 3;
230 };
231 } __BSRbits_t;
232
233 extern __at(0x0008) volatile __BSRbits_t BSRbits;
234
235 #define _BSR0 0x01
236 #define _BSR1 0x02
237 #define _BSR2 0x04
238 #define _BSR3 0x08
239 #define _BSR4 0x10
240
241 //==============================================================================
242
243 extern __at(0x0009) __sfr WREG;
244 extern __at(0x000A) __sfr PCLATH;
245
246 //==============================================================================
247 // INTCON Bits
248
249 extern __at(0x000B) __sfr INTCON;
250
251 typedef union
252 {
253 struct
254 {
255 unsigned IOCIF : 1;
256 unsigned INTF : 1;
257 unsigned TMR0IF : 1;
258 unsigned IOCIE : 1;
259 unsigned INTE : 1;
260 unsigned TMR0IE : 1;
261 unsigned PEIE : 1;
262 unsigned GIE : 1;
263 };
264
265 struct
266 {
267 unsigned : 1;
268 unsigned : 1;
269 unsigned T0IF : 1;
270 unsigned : 1;
271 unsigned : 1;
272 unsigned T0IE : 1;
273 unsigned : 1;
274 unsigned : 1;
275 };
276 } __INTCONbits_t;
277
278 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
279
280 #define _IOCIF 0x01
281 #define _INTF 0x02
282 #define _TMR0IF 0x04
283 #define _T0IF 0x04
284 #define _IOCIE 0x08
285 #define _INTE 0x10
286 #define _TMR0IE 0x20
287 #define _T0IE 0x20
288 #define _PEIE 0x40
289 #define _GIE 0x80
290
291 //==============================================================================
292
293
294 //==============================================================================
295 // PORTA Bits
296
297 extern __at(0x000C) __sfr PORTA;
298
299 typedef union
300 {
301 struct
302 {
303 unsigned RA0 : 1;
304 unsigned RA1 : 1;
305 unsigned RA2 : 1;
306 unsigned RA3 : 1;
307 unsigned RA4 : 1;
308 unsigned RA5 : 1;
309 unsigned : 1;
310 unsigned : 1;
311 };
312
313 struct
314 {
315 unsigned RA : 6;
316 unsigned : 2;
317 };
318 } __PORTAbits_t;
319
320 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
321
322 #define _RA0 0x01
323 #define _RA1 0x02
324 #define _RA2 0x04
325 #define _RA3 0x08
326 #define _RA4 0x10
327 #define _RA5 0x20
328
329 //==============================================================================
330
331
332 //==============================================================================
333 // PIR1 Bits
334
335 extern __at(0x0011) __sfr PIR1;
336
337 typedef struct
338 {
339 unsigned TMR1IF : 1;
340 unsigned TMR2IF : 1;
341 unsigned : 1;
342 unsigned : 1;
343 unsigned : 1;
344 unsigned : 1;
345 unsigned ADIF : 1;
346 unsigned TMR1GIF : 1;
347 } __PIR1bits_t;
348
349 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
350
351 #define _TMR1IF 0x01
352 #define _TMR2IF 0x02
353 #define _ADIF 0x40
354 #define _TMR1GIF 0x80
355
356 //==============================================================================
357
358
359 //==============================================================================
360 // PIR2 Bits
361
362 extern __at(0x0012) __sfr PIR2;
363
364 typedef struct
365 {
366 unsigned : 1;
367 unsigned : 1;
368 unsigned NCO1IF : 1;
369 unsigned : 1;
370 unsigned : 1;
371 unsigned C1IF : 1;
372 unsigned : 1;
373 unsigned : 1;
374 } __PIR2bits_t;
375
376 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
377
378 #define _NCO1IF 0x04
379 #define _C1IF 0x20
380
381 //==============================================================================
382
383
384 //==============================================================================
385 // PIR3 Bits
386
387 extern __at(0x0013) __sfr PIR3;
388
389 typedef struct
390 {
391 unsigned CLC1IF : 1;
392 unsigned CLC2IF : 1;
393 unsigned : 1;
394 unsigned : 1;
395 unsigned : 1;
396 unsigned : 1;
397 unsigned : 1;
398 unsigned : 1;
399 } __PIR3bits_t;
400
401 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
402
403 #define _CLC1IF 0x01
404 #define _CLC2IF 0x02
405
406 //==============================================================================
407
408 extern __at(0x0015) __sfr TMR0;
409 extern __at(0x0016) __sfr TMR1;
410 extern __at(0x0016) __sfr TMR1L;
411 extern __at(0x0017) __sfr TMR1H;
412
413 //==============================================================================
414 // T1CON Bits
415
416 extern __at(0x0018) __sfr T1CON;
417
418 typedef union
419 {
420 struct
421 {
422 unsigned TMR1ON : 1;
423 unsigned : 1;
424 unsigned NOT_T1SYNC : 1;
425 unsigned : 1;
426 unsigned T1CKPS0 : 1;
427 unsigned T1CKPS1 : 1;
428 unsigned TMR1CS0 : 1;
429 unsigned TMR1CS1 : 1;
430 };
431
432 struct
433 {
434 unsigned : 4;
435 unsigned T1CKPS : 2;
436 unsigned : 2;
437 };
438
439 struct
440 {
441 unsigned : 6;
442 unsigned TMR1CS : 2;
443 };
444 } __T1CONbits_t;
445
446 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
447
448 #define _TMR1ON 0x01
449 #define _NOT_T1SYNC 0x04
450 #define _T1CKPS0 0x10
451 #define _T1CKPS1 0x20
452 #define _TMR1CS0 0x40
453 #define _TMR1CS1 0x80
454
455 //==============================================================================
456
457
458 //==============================================================================
459 // T1GCON Bits
460
461 extern __at(0x0019) __sfr T1GCON;
462
463 typedef union
464 {
465 struct
466 {
467 unsigned T1GSS0 : 1;
468 unsigned T1GSS1 : 1;
469 unsigned T1GVAL : 1;
470 unsigned T1GGO_NOT_DONE : 1;
471 unsigned T1GSPM : 1;
472 unsigned T1GTM : 1;
473 unsigned T1GPOL : 1;
474 unsigned TMR1GE : 1;
475 };
476
477 struct
478 {
479 unsigned T1GSS : 2;
480 unsigned : 6;
481 };
482 } __T1GCONbits_t;
483
484 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
485
486 #define _T1GSS0 0x01
487 #define _T1GSS1 0x02
488 #define _T1GVAL 0x04
489 #define _T1GGO_NOT_DONE 0x08
490 #define _T1GSPM 0x10
491 #define _T1GTM 0x20
492 #define _T1GPOL 0x40
493 #define _TMR1GE 0x80
494
495 //==============================================================================
496
497 extern __at(0x001A) __sfr TMR2;
498 extern __at(0x001B) __sfr PR2;
499
500 //==============================================================================
501 // T2CON Bits
502
503 extern __at(0x001C) __sfr T2CON;
504
505 typedef union
506 {
507 struct
508 {
509 unsigned T2CKPS0 : 1;
510 unsigned T2CKPS1 : 1;
511 unsigned TMR2ON : 1;
512 unsigned TOUTPS0 : 1;
513 unsigned TOUTPS1 : 1;
514 unsigned TOUTPS2 : 1;
515 unsigned TOUTPS3 : 1;
516 unsigned : 1;
517 };
518
519 struct
520 {
521 unsigned T2CKPS : 2;
522 unsigned : 6;
523 };
524
525 struct
526 {
527 unsigned : 3;
528 unsigned TOUTPS : 4;
529 unsigned : 1;
530 };
531 } __T2CONbits_t;
532
533 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
534
535 #define _T2CKPS0 0x01
536 #define _T2CKPS1 0x02
537 #define _TMR2ON 0x04
538 #define _TOUTPS0 0x08
539 #define _TOUTPS1 0x10
540 #define _TOUTPS2 0x20
541 #define _TOUTPS3 0x40
542
543 //==============================================================================
544
545
546 //==============================================================================
547 // TRISA Bits
548
549 extern __at(0x008C) __sfr TRISA;
550
551 typedef union
552 {
553 struct
554 {
555 unsigned TRISA0 : 1;
556 unsigned TRISA1 : 1;
557 unsigned TRISA2 : 1;
558 unsigned TRISA3 : 1;
559 unsigned TRISA4 : 1;
560 unsigned TRISA5 : 1;
561 unsigned : 1;
562 unsigned : 1;
563 };
564
565 struct
566 {
567 unsigned TRISA : 6;
568 unsigned : 2;
569 };
570 } __TRISAbits_t;
571
572 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
573
574 #define _TRISA0 0x01
575 #define _TRISA1 0x02
576 #define _TRISA2 0x04
577 #define _TRISA3 0x08
578 #define _TRISA4 0x10
579 #define _TRISA5 0x20
580
581 //==============================================================================
582
583
584 //==============================================================================
585 // PIE1 Bits
586
587 extern __at(0x0091) __sfr PIE1;
588
589 typedef struct
590 {
591 unsigned TMR1IE : 1;
592 unsigned TMR2IE : 1;
593 unsigned : 1;
594 unsigned : 1;
595 unsigned : 1;
596 unsigned : 1;
597 unsigned ADIE : 1;
598 unsigned TMR1GIE : 1;
599 } __PIE1bits_t;
600
601 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
602
603 #define _TMR1IE 0x01
604 #define _TMR2IE 0x02
605 #define _ADIE 0x40
606 #define _TMR1GIE 0x80
607
608 //==============================================================================
609
610
611 //==============================================================================
612 // PIE2 Bits
613
614 extern __at(0x0092) __sfr PIE2;
615
616 typedef struct
617 {
618 unsigned : 1;
619 unsigned : 1;
620 unsigned NCO1IE : 1;
621 unsigned : 1;
622 unsigned : 1;
623 unsigned C1IE : 1;
624 unsigned : 1;
625 unsigned : 1;
626 } __PIE2bits_t;
627
628 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
629
630 #define _NCO1IE 0x04
631 #define _C1IE 0x20
632
633 //==============================================================================
634
635
636 //==============================================================================
637 // PIE3 Bits
638
639 extern __at(0x0093) __sfr PIE3;
640
641 typedef struct
642 {
643 unsigned CLC1IE : 1;
644 unsigned CLC2IE : 1;
645 unsigned : 1;
646 unsigned : 1;
647 unsigned : 1;
648 unsigned : 1;
649 unsigned : 1;
650 unsigned : 1;
651 } __PIE3bits_t;
652
653 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
654
655 #define _CLC1IE 0x01
656 #define _CLC2IE 0x02
657
658 //==============================================================================
659
660
661 //==============================================================================
662 // OPTION_REG Bits
663
664 extern __at(0x0095) __sfr OPTION_REG;
665
666 typedef union
667 {
668 struct
669 {
670 unsigned PS0 : 1;
671 unsigned PS1 : 1;
672 unsigned PS2 : 1;
673 unsigned PSA : 1;
674 unsigned TMR0SE : 1;
675 unsigned TMR0CS : 1;
676 unsigned INTEDG : 1;
677 unsigned NOT_WPUEN : 1;
678 };
679
680 struct
681 {
682 unsigned : 1;
683 unsigned : 1;
684 unsigned : 1;
685 unsigned : 1;
686 unsigned T0SE : 1;
687 unsigned T0CS : 1;
688 unsigned : 1;
689 unsigned : 1;
690 };
691
692 struct
693 {
694 unsigned PS : 3;
695 unsigned : 5;
696 };
697 } __OPTION_REGbits_t;
698
699 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
700
701 #define _PS0 0x01
702 #define _PS1 0x02
703 #define _PS2 0x04
704 #define _PSA 0x08
705 #define _TMR0SE 0x10
706 #define _T0SE 0x10
707 #define _TMR0CS 0x20
708 #define _T0CS 0x20
709 #define _INTEDG 0x40
710 #define _NOT_WPUEN 0x80
711
712 //==============================================================================
713
714
715 //==============================================================================
716 // PCON Bits
717
718 extern __at(0x0096) __sfr PCON;
719
720 typedef struct
721 {
722 unsigned NOT_BOR : 1;
723 unsigned NOT_POR : 1;
724 unsigned NOT_RI : 1;
725 unsigned NOT_RMCLR : 1;
726 unsigned NOT_RWDT : 1;
727 unsigned : 1;
728 unsigned STKUNF : 1;
729 unsigned STKOVF : 1;
730 } __PCONbits_t;
731
732 extern __at(0x0096) volatile __PCONbits_t PCONbits;
733
734 #define _NOT_BOR 0x01
735 #define _NOT_POR 0x02
736 #define _NOT_RI 0x04
737 #define _NOT_RMCLR 0x08
738 #define _NOT_RWDT 0x10
739 #define _STKUNF 0x40
740 #define _STKOVF 0x80
741
742 //==============================================================================
743
744
745 //==============================================================================
746 // WDTCON Bits
747
748 extern __at(0x0097) __sfr WDTCON;
749
750 typedef union
751 {
752 struct
753 {
754 unsigned SWDTEN : 1;
755 unsigned WDTPS0 : 1;
756 unsigned WDTPS1 : 1;
757 unsigned WDTPS2 : 1;
758 unsigned WDTPS3 : 1;
759 unsigned WDTPS4 : 1;
760 unsigned : 1;
761 unsigned : 1;
762 };
763
764 struct
765 {
766 unsigned : 1;
767 unsigned WDTPS : 5;
768 unsigned : 2;
769 };
770 } __WDTCONbits_t;
771
772 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
773
774 #define _SWDTEN 0x01
775 #define _WDTPS0 0x02
776 #define _WDTPS1 0x04
777 #define _WDTPS2 0x08
778 #define _WDTPS3 0x10
779 #define _WDTPS4 0x20
780
781 //==============================================================================
782
783
784 //==============================================================================
785 // OSCCON Bits
786
787 extern __at(0x0099) __sfr OSCCON;
788
789 typedef union
790 {
791 struct
792 {
793 unsigned SCS0 : 1;
794 unsigned SCS1 : 1;
795 unsigned : 1;
796 unsigned IRCF0 : 1;
797 unsigned IRCF1 : 1;
798 unsigned IRCF2 : 1;
799 unsigned IRCF3 : 1;
800 unsigned : 1;
801 };
802
803 struct
804 {
805 unsigned SCS : 2;
806 unsigned : 6;
807 };
808
809 struct
810 {
811 unsigned : 3;
812 unsigned IRCF : 4;
813 unsigned : 1;
814 };
815 } __OSCCONbits_t;
816
817 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
818
819 #define _SCS0 0x01
820 #define _SCS1 0x02
821 #define _IRCF0 0x08
822 #define _IRCF1 0x10
823 #define _IRCF2 0x20
824 #define _IRCF3 0x40
825
826 //==============================================================================
827
828
829 //==============================================================================
830 // OSCSTAT Bits
831
832 extern __at(0x009A) __sfr OSCSTAT;
833
834 typedef struct
835 {
836 unsigned HFIOFS : 1;
837 unsigned LFIOFR : 1;
838 unsigned : 1;
839 unsigned : 1;
840 unsigned HFIOFR : 1;
841 unsigned : 1;
842 unsigned : 1;
843 unsigned : 1;
844 } __OSCSTATbits_t;
845
846 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
847
848 #define _HFIOFS 0x01
849 #define _LFIOFR 0x02
850 #define _HFIOFR 0x10
851
852 //==============================================================================
853
854 extern __at(0x009B) __sfr ADRES;
855 extern __at(0x009B) __sfr ADRESL;
856 extern __at(0x009C) __sfr ADRESH;
857
858 //==============================================================================
859 // ADCON0 Bits
860
861 extern __at(0x009D) __sfr ADCON0;
862
863 typedef union
864 {
865 struct
866 {
867 unsigned ADON : 1;
868 unsigned GO_NOT_DONE : 1;
869 unsigned CHS0 : 1;
870 unsigned CHS1 : 1;
871 unsigned CHS2 : 1;
872 unsigned CHS3 : 1;
873 unsigned CHS4 : 1;
874 unsigned : 1;
875 };
876
877 struct
878 {
879 unsigned : 1;
880 unsigned ADGO : 1;
881 unsigned : 1;
882 unsigned : 1;
883 unsigned : 1;
884 unsigned : 1;
885 unsigned : 1;
886 unsigned : 1;
887 };
888
889 struct
890 {
891 unsigned : 1;
892 unsigned GO : 1;
893 unsigned : 1;
894 unsigned : 1;
895 unsigned : 1;
896 unsigned : 1;
897 unsigned : 1;
898 unsigned : 1;
899 };
900
901 struct
902 {
903 unsigned : 2;
904 unsigned CHS : 5;
905 unsigned : 1;
906 };
907 } __ADCON0bits_t;
908
909 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
910
911 #define _ADON 0x01
912 #define _GO_NOT_DONE 0x02
913 #define _ADGO 0x02
914 #define _GO 0x02
915 #define _CHS0 0x04
916 #define _CHS1 0x08
917 #define _CHS2 0x10
918 #define _CHS3 0x20
919 #define _CHS4 0x40
920
921 //==============================================================================
922
923
924 //==============================================================================
925 // ADCON1 Bits
926
927 extern __at(0x009E) __sfr ADCON1;
928
929 typedef union
930 {
931 struct
932 {
933 unsigned ADPREF0 : 1;
934 unsigned ADPREF1 : 1;
935 unsigned : 1;
936 unsigned : 1;
937 unsigned : 1;
938 unsigned : 1;
939 unsigned : 1;
940 unsigned ADFM : 1;
941 };
942
943 struct
944 {
945 unsigned ADPREF : 2;
946 unsigned : 6;
947 };
948 } __ADCON1bits_t;
949
950 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
951
952 #define _ADPREF0 0x01
953 #define _ADPREF1 0x02
954 #define _ADFM 0x80
955
956 //==============================================================================
957
958
959 //==============================================================================
960 // ADCON2 Bits
961
962 extern __at(0x009F) __sfr ADCON2;
963
964 typedef union
965 {
966 struct
967 {
968 unsigned : 1;
969 unsigned : 1;
970 unsigned : 1;
971 unsigned : 1;
972 unsigned TRIGSEL0 : 1;
973 unsigned TRIGSEL1 : 1;
974 unsigned TRIGSEL2 : 1;
975 unsigned TRIGSEL3 : 1;
976 };
977
978 struct
979 {
980 unsigned : 4;
981 unsigned TRIGSEL : 4;
982 };
983 } __ADCON2bits_t;
984
985 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
986
987 #define _TRIGSEL0 0x10
988 #define _TRIGSEL1 0x20
989 #define _TRIGSEL2 0x40
990 #define _TRIGSEL3 0x80
991
992 //==============================================================================
993
994
995 //==============================================================================
996 // LATA Bits
997
998 extern __at(0x010C) __sfr LATA;
999
1000 typedef struct
1001 {
1002 unsigned LATA0 : 1;
1003 unsigned LATA1 : 1;
1004 unsigned LATA2 : 1;
1005 unsigned : 1;
1006 unsigned LATA4 : 1;
1007 unsigned LATA5 : 1;
1008 unsigned : 1;
1009 unsigned : 1;
1010 } __LATAbits_t;
1011
1012 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1013
1014 #define _LATA0 0x01
1015 #define _LATA1 0x02
1016 #define _LATA2 0x04
1017 #define _LATA4 0x10
1018 #define _LATA5 0x20
1019
1020 //==============================================================================
1021
1022
1023 //==============================================================================
1024 // CM1CON0 Bits
1025
1026 extern __at(0x0111) __sfr CM1CON0;
1027
1028 typedef struct
1029 {
1030 unsigned C1SYNC : 1;
1031 unsigned C1HYS : 1;
1032 unsigned C1SP : 1;
1033 unsigned : 1;
1034 unsigned C1POL : 1;
1035 unsigned C1OE : 1;
1036 unsigned C1OUT : 1;
1037 unsigned C1ON : 1;
1038 } __CM1CON0bits_t;
1039
1040 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1041
1042 #define _C1SYNC 0x01
1043 #define _C1HYS 0x02
1044 #define _C1SP 0x04
1045 #define _C1POL 0x10
1046 #define _C1OE 0x20
1047 #define _C1OUT 0x40
1048 #define _C1ON 0x80
1049
1050 //==============================================================================
1051
1052
1053 //==============================================================================
1054 // CM1CON1 Bits
1055
1056 extern __at(0x0112) __sfr CM1CON1;
1057
1058 typedef union
1059 {
1060 struct
1061 {
1062 unsigned C1NCH0 : 1;
1063 unsigned C1NCH1 : 1;
1064 unsigned C1NCH2 : 1;
1065 unsigned : 1;
1066 unsigned C1PCH0 : 1;
1067 unsigned C1PCH1 : 1;
1068 unsigned C1INTN : 1;
1069 unsigned C1INTP : 1;
1070 };
1071
1072 struct
1073 {
1074 unsigned C1NCH : 3;
1075 unsigned : 5;
1076 };
1077
1078 struct
1079 {
1080 unsigned : 4;
1081 unsigned C1PCH : 2;
1082 unsigned : 2;
1083 };
1084 } __CM1CON1bits_t;
1085
1086 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1087
1088 #define _C1NCH0 0x01
1089 #define _C1NCH1 0x02
1090 #define _C1NCH2 0x04
1091 #define _C1PCH0 0x10
1092 #define _C1PCH1 0x20
1093 #define _C1INTN 0x40
1094 #define _C1INTP 0x80
1095
1096 //==============================================================================
1097
1098
1099 //==============================================================================
1100 // CMOUT Bits
1101
1102 extern __at(0x0115) __sfr CMOUT;
1103
1104 typedef struct
1105 {
1106 unsigned MC1OUT : 1;
1107 unsigned : 1;
1108 unsigned : 1;
1109 unsigned : 1;
1110 unsigned : 1;
1111 unsigned : 1;
1112 unsigned : 1;
1113 unsigned : 1;
1114 } __CMOUTbits_t;
1115
1116 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1117
1118 #define _MC1OUT 0x01
1119
1120 //==============================================================================
1121
1122
1123 //==============================================================================
1124 // BORCON Bits
1125
1126 extern __at(0x0116) __sfr BORCON;
1127
1128 typedef struct
1129 {
1130 unsigned BORRDY : 1;
1131 unsigned : 1;
1132 unsigned : 1;
1133 unsigned : 1;
1134 unsigned : 1;
1135 unsigned : 1;
1136 unsigned BORFS : 1;
1137 unsigned SBOREN : 1;
1138 } __BORCONbits_t;
1139
1140 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1141
1142 #define _BORRDY 0x01
1143 #define _BORFS 0x40
1144 #define _SBOREN 0x80
1145
1146 //==============================================================================
1147
1148
1149 //==============================================================================
1150 // FVRCON Bits
1151
1152 extern __at(0x0117) __sfr FVRCON;
1153
1154 typedef union
1155 {
1156 struct
1157 {
1158 unsigned ADFVR0 : 1;
1159 unsigned ADFVR1 : 1;
1160 unsigned CDAFVR0 : 1;
1161 unsigned CDAFVR1 : 1;
1162 unsigned TSRNG : 1;
1163 unsigned TSEN : 1;
1164 unsigned FVRRDY : 1;
1165 unsigned FVREN : 1;
1166 };
1167
1168 struct
1169 {
1170 unsigned ADFVR : 2;
1171 unsigned : 6;
1172 };
1173
1174 struct
1175 {
1176 unsigned : 2;
1177 unsigned CDAFVR : 2;
1178 unsigned : 4;
1179 };
1180 } __FVRCONbits_t;
1181
1182 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1183
1184 #define _ADFVR0 0x01
1185 #define _ADFVR1 0x02
1186 #define _CDAFVR0 0x04
1187 #define _CDAFVR1 0x08
1188 #define _TSRNG 0x10
1189 #define _TSEN 0x20
1190 #define _FVRRDY 0x40
1191 #define _FVREN 0x80
1192
1193 //==============================================================================
1194
1195
1196 //==============================================================================
1197 // DACCON0 Bits
1198
1199 extern __at(0x0118) __sfr DACCON0;
1200
1201 typedef struct
1202 {
1203 unsigned : 1;
1204 unsigned : 1;
1205 unsigned DACPSS : 1;
1206 unsigned : 1;
1207 unsigned DACOE2 : 1;
1208 unsigned DACOE1 : 1;
1209 unsigned : 1;
1210 unsigned DACEN : 1;
1211 } __DACCON0bits_t;
1212
1213 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1214
1215 #define _DACPSS 0x04
1216 #define _DACOE2 0x10
1217 #define _DACOE1 0x20
1218 #define _DACEN 0x80
1219
1220 //==============================================================================
1221
1222
1223 //==============================================================================
1224 // DACCON1 Bits
1225
1226 extern __at(0x0119) __sfr DACCON1;
1227
1228 typedef union
1229 {
1230 struct
1231 {
1232 unsigned DACR0 : 1;
1233 unsigned DACR1 : 1;
1234 unsigned DACR2 : 1;
1235 unsigned DACR3 : 1;
1236 unsigned DACR4 : 1;
1237 unsigned : 1;
1238 unsigned : 1;
1239 unsigned : 1;
1240 };
1241
1242 struct
1243 {
1244 unsigned DACR : 5;
1245 unsigned : 3;
1246 };
1247 } __DACCON1bits_t;
1248
1249 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1250
1251 #define _DACR0 0x01
1252 #define _DACR1 0x02
1253 #define _DACR2 0x04
1254 #define _DACR3 0x08
1255 #define _DACR4 0x10
1256
1257 //==============================================================================
1258
1259
1260 //==============================================================================
1261 // APFCON Bits
1262
1263 extern __at(0x011D) __sfr APFCON;
1264
1265 typedef struct
1266 {
1267 unsigned NCO1SEL : 1;
1268 unsigned CLC1SEL : 1;
1269 unsigned : 1;
1270 unsigned T1GSEL : 1;
1271 unsigned : 1;
1272 unsigned : 1;
1273 unsigned CWG1ASEL : 1;
1274 unsigned CWG1BSEL : 1;
1275 } __APFCONbits_t;
1276
1277 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1278
1279 #define _NCO1SEL 0x01
1280 #define _CLC1SEL 0x02
1281 #define _T1GSEL 0x08
1282 #define _CWG1ASEL 0x40
1283 #define _CWG1BSEL 0x80
1284
1285 //==============================================================================
1286
1287
1288 //==============================================================================
1289 // ANSELA Bits
1290
1291 extern __at(0x018C) __sfr ANSELA;
1292
1293 typedef struct
1294 {
1295 unsigned ANSA0 : 1;
1296 unsigned ANSA1 : 1;
1297 unsigned ANSA2 : 1;
1298 unsigned : 1;
1299 unsigned ANSA4 : 1;
1300 unsigned : 1;
1301 unsigned : 1;
1302 unsigned : 1;
1303 } __ANSELAbits_t;
1304
1305 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1306
1307 #define _ANSA0 0x01
1308 #define _ANSA1 0x02
1309 #define _ANSA2 0x04
1310 #define _ANSA4 0x10
1311
1312 //==============================================================================
1313
1314 extern __at(0x0191) __sfr PMADR;
1315 extern __at(0x0191) __sfr PMADRL;
1316 extern __at(0x0192) __sfr PMADRH;
1317 extern __at(0x0193) __sfr PMDAT;
1318 extern __at(0x0193) __sfr PMDATL;
1319 extern __at(0x0194) __sfr PMDATH;
1320
1321 //==============================================================================
1322 // PMCON1 Bits
1323
1324 extern __at(0x0195) __sfr PMCON1;
1325
1326 typedef struct
1327 {
1328 unsigned RD : 1;
1329 unsigned WR : 1;
1330 unsigned WREN : 1;
1331 unsigned WRERR : 1;
1332 unsigned FREE : 1;
1333 unsigned LWLO : 1;
1334 unsigned CFGS : 1;
1335 unsigned : 1;
1336 } __PMCON1bits_t;
1337
1338 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1339
1340 #define _RD 0x01
1341 #define _WR 0x02
1342 #define _WREN 0x04
1343 #define _WRERR 0x08
1344 #define _FREE 0x10
1345 #define _LWLO 0x20
1346 #define _CFGS 0x40
1347
1348 //==============================================================================
1349
1350 extern __at(0x0196) __sfr PMCON2;
1351
1352 //==============================================================================
1353 // WPUA Bits
1354
1355 extern __at(0x020C) __sfr WPUA;
1356
1357 typedef union
1358 {
1359 struct
1360 {
1361 unsigned WPUA0 : 1;
1362 unsigned WPUA1 : 1;
1363 unsigned WPUA2 : 1;
1364 unsigned WPUA3 : 1;
1365 unsigned WPUA4 : 1;
1366 unsigned WPUA5 : 1;
1367 unsigned : 1;
1368 unsigned : 1;
1369 };
1370
1371 struct
1372 {
1373 unsigned WPUA : 6;
1374 unsigned : 2;
1375 };
1376 } __WPUAbits_t;
1377
1378 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1379
1380 #define _WPUA0 0x01
1381 #define _WPUA1 0x02
1382 #define _WPUA2 0x04
1383 #define _WPUA3 0x08
1384 #define _WPUA4 0x10
1385 #define _WPUA5 0x20
1386
1387 //==============================================================================
1388
1389
1390 //==============================================================================
1391 // IOCAP Bits
1392
1393 extern __at(0x0391) __sfr IOCAP;
1394
1395 typedef union
1396 {
1397 struct
1398 {
1399 unsigned IOCAP0 : 1;
1400 unsigned IOCAP1 : 1;
1401 unsigned IOCAP2 : 1;
1402 unsigned IOCAP3 : 1;
1403 unsigned IOCAP4 : 1;
1404 unsigned IOCAP5 : 1;
1405 unsigned : 1;
1406 unsigned : 1;
1407 };
1408
1409 struct
1410 {
1411 unsigned IOCAP : 6;
1412 unsigned : 2;
1413 };
1414 } __IOCAPbits_t;
1415
1416 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
1417
1418 #define _IOCAP0 0x01
1419 #define _IOCAP1 0x02
1420 #define _IOCAP2 0x04
1421 #define _IOCAP3 0x08
1422 #define _IOCAP4 0x10
1423 #define _IOCAP5 0x20
1424
1425 //==============================================================================
1426
1427
1428 //==============================================================================
1429 // IOCAN Bits
1430
1431 extern __at(0x0392) __sfr IOCAN;
1432
1433 typedef union
1434 {
1435 struct
1436 {
1437 unsigned IOCAN0 : 1;
1438 unsigned IOCAN1 : 1;
1439 unsigned IOCAN2 : 1;
1440 unsigned IOCAN3 : 1;
1441 unsigned IOCAN4 : 1;
1442 unsigned IOCAN5 : 1;
1443 unsigned : 1;
1444 unsigned : 1;
1445 };
1446
1447 struct
1448 {
1449 unsigned IOCAN : 6;
1450 unsigned : 2;
1451 };
1452 } __IOCANbits_t;
1453
1454 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
1455
1456 #define _IOCAN0 0x01
1457 #define _IOCAN1 0x02
1458 #define _IOCAN2 0x04
1459 #define _IOCAN3 0x08
1460 #define _IOCAN4 0x10
1461 #define _IOCAN5 0x20
1462
1463 //==============================================================================
1464
1465
1466 //==============================================================================
1467 // IOCAF Bits
1468
1469 extern __at(0x0393) __sfr IOCAF;
1470
1471 typedef union
1472 {
1473 struct
1474 {
1475 unsigned IOCAF0 : 1;
1476 unsigned IOCAF1 : 1;
1477 unsigned IOCAF2 : 1;
1478 unsigned IOCAF3 : 1;
1479 unsigned IOCAF4 : 1;
1480 unsigned IOCAF5 : 1;
1481 unsigned : 1;
1482 unsigned : 1;
1483 };
1484
1485 struct
1486 {
1487 unsigned IOCAF : 6;
1488 unsigned : 2;
1489 };
1490 } __IOCAFbits_t;
1491
1492 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
1493
1494 #define _IOCAF0 0x01
1495 #define _IOCAF1 0x02
1496 #define _IOCAF2 0x04
1497 #define _IOCAF3 0x08
1498 #define _IOCAF4 0x10
1499 #define _IOCAF5 0x20
1500
1501 //==============================================================================
1502
1503 extern __at(0x0498) __sfr NCO1ACC;
1504
1505 //==============================================================================
1506 // NCO1ACCL Bits
1507
1508 extern __at(0x0498) __sfr NCO1ACCL;
1509
1510 typedef struct
1511 {
1512 unsigned NCO1ACC0 : 1;
1513 unsigned NCO1ACC1 : 1;
1514 unsigned NCO1ACC2 : 1;
1515 unsigned NCO1ACC3 : 1;
1516 unsigned NCO1ACC4 : 1;
1517 unsigned NCO1ACC5 : 1;
1518 unsigned NCO1ACC6 : 1;
1519 unsigned NCO1ACC7 : 1;
1520 } __NCO1ACCLbits_t;
1521
1522 extern __at(0x0498) volatile __NCO1ACCLbits_t NCO1ACCLbits;
1523
1524 #define _NCO1ACC0 0x01
1525 #define _NCO1ACC1 0x02
1526 #define _NCO1ACC2 0x04
1527 #define _NCO1ACC3 0x08
1528 #define _NCO1ACC4 0x10
1529 #define _NCO1ACC5 0x20
1530 #define _NCO1ACC6 0x40
1531 #define _NCO1ACC7 0x80
1532
1533 //==============================================================================
1534
1535
1536 //==============================================================================
1537 // NCO1ACCH Bits
1538
1539 extern __at(0x0499) __sfr NCO1ACCH;
1540
1541 typedef struct
1542 {
1543 unsigned NCO1ACC8 : 1;
1544 unsigned NCO1ACC9 : 1;
1545 unsigned NCO1ACC10 : 1;
1546 unsigned NCO1ACC11 : 1;
1547 unsigned NCO1ACC12 : 1;
1548 unsigned NCO1ACC13 : 1;
1549 unsigned NCO1ACC14 : 1;
1550 unsigned NCO1ACC15 : 1;
1551 } __NCO1ACCHbits_t;
1552
1553 extern __at(0x0499) volatile __NCO1ACCHbits_t NCO1ACCHbits;
1554
1555 #define _NCO1ACC8 0x01
1556 #define _NCO1ACC9 0x02
1557 #define _NCO1ACC10 0x04
1558 #define _NCO1ACC11 0x08
1559 #define _NCO1ACC12 0x10
1560 #define _NCO1ACC13 0x20
1561 #define _NCO1ACC14 0x40
1562 #define _NCO1ACC15 0x80
1563
1564 //==============================================================================
1565
1566
1567 //==============================================================================
1568 // NCO1ACCU Bits
1569
1570 extern __at(0x049A) __sfr NCO1ACCU;
1571
1572 typedef struct
1573 {
1574 unsigned NCO1ACC16 : 1;
1575 unsigned NCO1ACC17 : 1;
1576 unsigned NCO1ACC18 : 1;
1577 unsigned NCO1ACC19 : 1;
1578 unsigned : 1;
1579 unsigned : 1;
1580 unsigned : 1;
1581 unsigned : 1;
1582 } __NCO1ACCUbits_t;
1583
1584 extern __at(0x049A) volatile __NCO1ACCUbits_t NCO1ACCUbits;
1585
1586 #define _NCO1ACC16 0x01
1587 #define _NCO1ACC17 0x02
1588 #define _NCO1ACC18 0x04
1589 #define _NCO1ACC19 0x08
1590
1591 //==============================================================================
1592
1593 extern __at(0x049B) __sfr NCO1INC;
1594
1595 //==============================================================================
1596 // NCO1INCL Bits
1597
1598 extern __at(0x049B) __sfr NCO1INCL;
1599
1600 typedef struct
1601 {
1602 unsigned NCO1INC0 : 1;
1603 unsigned NCO1INC1 : 1;
1604 unsigned NCO1INC2 : 1;
1605 unsigned NCO1INC3 : 1;
1606 unsigned NCO1INC4 : 1;
1607 unsigned NCO1INC5 : 1;
1608 unsigned NCO1INC6 : 1;
1609 unsigned NCO1INC7 : 1;
1610 } __NCO1INCLbits_t;
1611
1612 extern __at(0x049B) volatile __NCO1INCLbits_t NCO1INCLbits;
1613
1614 #define _NCO1INC0 0x01
1615 #define _NCO1INC1 0x02
1616 #define _NCO1INC2 0x04
1617 #define _NCO1INC3 0x08
1618 #define _NCO1INC4 0x10
1619 #define _NCO1INC5 0x20
1620 #define _NCO1INC6 0x40
1621 #define _NCO1INC7 0x80
1622
1623 //==============================================================================
1624
1625
1626 //==============================================================================
1627 // NCO1INCH Bits
1628
1629 extern __at(0x049C) __sfr NCO1INCH;
1630
1631 typedef struct
1632 {
1633 unsigned NCO1INC8 : 1;
1634 unsigned NCO1INC9 : 1;
1635 unsigned NCO1INC10 : 1;
1636 unsigned NCO1INC11 : 1;
1637 unsigned NCO1INC12 : 1;
1638 unsigned NCO1INC13 : 1;
1639 unsigned NCO1INC14 : 1;
1640 unsigned NCO1INC15 : 1;
1641 } __NCO1INCHbits_t;
1642
1643 extern __at(0x049C) volatile __NCO1INCHbits_t NCO1INCHbits;
1644
1645 #define _NCO1INC8 0x01
1646 #define _NCO1INC9 0x02
1647 #define _NCO1INC10 0x04
1648 #define _NCO1INC11 0x08
1649 #define _NCO1INC12 0x10
1650 #define _NCO1INC13 0x20
1651 #define _NCO1INC14 0x40
1652 #define _NCO1INC15 0x80
1653
1654 //==============================================================================
1655
1656 extern __at(0x049D) __sfr NCO1INCU;
1657
1658 //==============================================================================
1659 // NCO1CON Bits
1660
1661 extern __at(0x049E) __sfr NCO1CON;
1662
1663 typedef struct
1664 {
1665 unsigned N1PFM : 1;
1666 unsigned : 1;
1667 unsigned : 1;
1668 unsigned : 1;
1669 unsigned N1POL : 1;
1670 unsigned N1OUT : 1;
1671 unsigned N1OE : 1;
1672 unsigned N1EN : 1;
1673 } __NCO1CONbits_t;
1674
1675 extern __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits;
1676
1677 #define _N1PFM 0x01
1678 #define _N1POL 0x10
1679 #define _N1OUT 0x20
1680 #define _N1OE 0x40
1681 #define _N1EN 0x80
1682
1683 //==============================================================================
1684
1685
1686 //==============================================================================
1687 // NCO1CLK Bits
1688
1689 extern __at(0x049F) __sfr NCO1CLK;
1690
1691 typedef union
1692 {
1693 struct
1694 {
1695 unsigned N1CKS0 : 1;
1696 unsigned N1CKS1 : 1;
1697 unsigned : 1;
1698 unsigned : 1;
1699 unsigned : 1;
1700 unsigned N1PWS0 : 1;
1701 unsigned N1PWS1 : 1;
1702 unsigned N1PWS2 : 1;
1703 };
1704
1705 struct
1706 {
1707 unsigned N1CKS : 2;
1708 unsigned : 6;
1709 };
1710
1711 struct
1712 {
1713 unsigned : 5;
1714 unsigned N1PWS : 3;
1715 };
1716 } __NCO1CLKbits_t;
1717
1718 extern __at(0x049F) volatile __NCO1CLKbits_t NCO1CLKbits;
1719
1720 #define _N1CKS0 0x01
1721 #define _N1CKS1 0x02
1722 #define _N1PWS0 0x20
1723 #define _N1PWS1 0x40
1724 #define _N1PWS2 0x80
1725
1726 //==============================================================================
1727
1728
1729 //==============================================================================
1730 // PWM1DCL Bits
1731
1732 extern __at(0x0611) __sfr PWM1DCL;
1733
1734 typedef union
1735 {
1736 struct
1737 {
1738 unsigned : 1;
1739 unsigned : 1;
1740 unsigned : 1;
1741 unsigned : 1;
1742 unsigned : 1;
1743 unsigned : 1;
1744 unsigned PWM1DCL0 : 1;
1745 unsigned PWM1DCL1 : 1;
1746 };
1747
1748 struct
1749 {
1750 unsigned : 6;
1751 unsigned PWM1DCL : 2;
1752 };
1753 } __PWM1DCLbits_t;
1754
1755 extern __at(0x0611) volatile __PWM1DCLbits_t PWM1DCLbits;
1756
1757 #define _PWM1DCL0 0x40
1758 #define _PWM1DCL1 0x80
1759
1760 //==============================================================================
1761
1762
1763 //==============================================================================
1764 // PWM1DCH Bits
1765
1766 extern __at(0x0612) __sfr PWM1DCH;
1767
1768 typedef struct
1769 {
1770 unsigned PWM1DCH0 : 1;
1771 unsigned PWM1DCH1 : 1;
1772 unsigned PWM1DCH2 : 1;
1773 unsigned PWM1DCH3 : 1;
1774 unsigned PWM1DCH4 : 1;
1775 unsigned PWM1DCH5 : 1;
1776 unsigned PWM1DCH6 : 1;
1777 unsigned PWM1DCH7 : 1;
1778 } __PWM1DCHbits_t;
1779
1780 extern __at(0x0612) volatile __PWM1DCHbits_t PWM1DCHbits;
1781
1782 #define _PWM1DCH0 0x01
1783 #define _PWM1DCH1 0x02
1784 #define _PWM1DCH2 0x04
1785 #define _PWM1DCH3 0x08
1786 #define _PWM1DCH4 0x10
1787 #define _PWM1DCH5 0x20
1788 #define _PWM1DCH6 0x40
1789 #define _PWM1DCH7 0x80
1790
1791 //==============================================================================
1792
1793
1794 //==============================================================================
1795 // PWM1CON Bits
1796
1797 extern __at(0x0613) __sfr PWM1CON;
1798
1799 typedef struct
1800 {
1801 unsigned : 1;
1802 unsigned : 1;
1803 unsigned : 1;
1804 unsigned : 1;
1805 unsigned PWM1POL : 1;
1806 unsigned PWM1OUT : 1;
1807 unsigned PWM1OE : 1;
1808 unsigned PWM1EN : 1;
1809 } __PWM1CONbits_t;
1810
1811 extern __at(0x0613) volatile __PWM1CONbits_t PWM1CONbits;
1812
1813 #define _PWM1POL 0x10
1814 #define _PWM1OUT 0x20
1815 #define _PWM1OE 0x40
1816 #define _PWM1EN 0x80
1817
1818 //==============================================================================
1819
1820
1821 //==============================================================================
1822 // PWM1CON0 Bits
1823
1824 extern __at(0x0613) __sfr PWM1CON0;
1825
1826 typedef struct
1827 {
1828 unsigned : 1;
1829 unsigned : 1;
1830 unsigned : 1;
1831 unsigned : 1;
1832 unsigned PWM1POL : 1;
1833 unsigned PWM1OUT : 1;
1834 unsigned PWM1OE : 1;
1835 unsigned PWM1EN : 1;
1836 } __PWM1CON0bits_t;
1837
1838 extern __at(0x0613) volatile __PWM1CON0bits_t PWM1CON0bits;
1839
1840 #define _PWM1CON0_PWM1POL 0x10
1841 #define _PWM1CON0_PWM1OUT 0x20
1842 #define _PWM1CON0_PWM1OE 0x40
1843 #define _PWM1CON0_PWM1EN 0x80
1844
1845 //==============================================================================
1846
1847
1848 //==============================================================================
1849 // PWM2DCL Bits
1850
1851 extern __at(0x0614) __sfr PWM2DCL;
1852
1853 typedef union
1854 {
1855 struct
1856 {
1857 unsigned : 1;
1858 unsigned : 1;
1859 unsigned : 1;
1860 unsigned : 1;
1861 unsigned : 1;
1862 unsigned : 1;
1863 unsigned PWM2DCL0 : 1;
1864 unsigned PWM2DCL1 : 1;
1865 };
1866
1867 struct
1868 {
1869 unsigned : 6;
1870 unsigned PWM2DCL : 2;
1871 };
1872 } __PWM2DCLbits_t;
1873
1874 extern __at(0x0614) volatile __PWM2DCLbits_t PWM2DCLbits;
1875
1876 #define _PWM2DCL0 0x40
1877 #define _PWM2DCL1 0x80
1878
1879 //==============================================================================
1880
1881
1882 //==============================================================================
1883 // PWM2DCH Bits
1884
1885 extern __at(0x0615) __sfr PWM2DCH;
1886
1887 typedef struct
1888 {
1889 unsigned PWM2DCH0 : 1;
1890 unsigned PWM2DCH1 : 1;
1891 unsigned PWM2DCH2 : 1;
1892 unsigned PWM2DCH3 : 1;
1893 unsigned PWM2DCH4 : 1;
1894 unsigned PWM2DCH5 : 1;
1895 unsigned PWM2DCH6 : 1;
1896 unsigned PWM2DCH7 : 1;
1897 } __PWM2DCHbits_t;
1898
1899 extern __at(0x0615) volatile __PWM2DCHbits_t PWM2DCHbits;
1900
1901 #define _PWM2DCH0 0x01
1902 #define _PWM2DCH1 0x02
1903 #define _PWM2DCH2 0x04
1904 #define _PWM2DCH3 0x08
1905 #define _PWM2DCH4 0x10
1906 #define _PWM2DCH5 0x20
1907 #define _PWM2DCH6 0x40
1908 #define _PWM2DCH7 0x80
1909
1910 //==============================================================================
1911
1912
1913 //==============================================================================
1914 // PWM2CON Bits
1915
1916 extern __at(0x0616) __sfr PWM2CON;
1917
1918 typedef struct
1919 {
1920 unsigned : 1;
1921 unsigned : 1;
1922 unsigned : 1;
1923 unsigned : 1;
1924 unsigned PWM2POL : 1;
1925 unsigned PWM2OUT : 1;
1926 unsigned PWM2OE : 1;
1927 unsigned PWM2EN : 1;
1928 } __PWM2CONbits_t;
1929
1930 extern __at(0x0616) volatile __PWM2CONbits_t PWM2CONbits;
1931
1932 #define _PWM2POL 0x10
1933 #define _PWM2OUT 0x20
1934 #define _PWM2OE 0x40
1935 #define _PWM2EN 0x80
1936
1937 //==============================================================================
1938
1939
1940 //==============================================================================
1941 // PWM2CON0 Bits
1942
1943 extern __at(0x0616) __sfr PWM2CON0;
1944
1945 typedef struct
1946 {
1947 unsigned : 1;
1948 unsigned : 1;
1949 unsigned : 1;
1950 unsigned : 1;
1951 unsigned PWM2POL : 1;
1952 unsigned PWM2OUT : 1;
1953 unsigned PWM2OE : 1;
1954 unsigned PWM2EN : 1;
1955 } __PWM2CON0bits_t;
1956
1957 extern __at(0x0616) volatile __PWM2CON0bits_t PWM2CON0bits;
1958
1959 #define _PWM2CON0_PWM2POL 0x10
1960 #define _PWM2CON0_PWM2OUT 0x20
1961 #define _PWM2CON0_PWM2OE 0x40
1962 #define _PWM2CON0_PWM2EN 0x80
1963
1964 //==============================================================================
1965
1966
1967 //==============================================================================
1968 // PWM3DCL Bits
1969
1970 extern __at(0x0617) __sfr PWM3DCL;
1971
1972 typedef union
1973 {
1974 struct
1975 {
1976 unsigned : 1;
1977 unsigned : 1;
1978 unsigned : 1;
1979 unsigned : 1;
1980 unsigned : 1;
1981 unsigned : 1;
1982 unsigned PWM3DCL0 : 1;
1983 unsigned PWM3DCL1 : 1;
1984 };
1985
1986 struct
1987 {
1988 unsigned : 6;
1989 unsigned PWM3DCL : 2;
1990 };
1991 } __PWM3DCLbits_t;
1992
1993 extern __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits;
1994
1995 #define _PWM3DCL0 0x40
1996 #define _PWM3DCL1 0x80
1997
1998 //==============================================================================
1999
2000
2001 //==============================================================================
2002 // PWM3DCH Bits
2003
2004 extern __at(0x0618) __sfr PWM3DCH;
2005
2006 typedef struct
2007 {
2008 unsigned PWM3DCH0 : 1;
2009 unsigned PWM3DCH1 : 1;
2010 unsigned PWM3DCH2 : 1;
2011 unsigned PWM3DCH3 : 1;
2012 unsigned PWM3DCH4 : 1;
2013 unsigned PWM3DCH5 : 1;
2014 unsigned PWM3DCH6 : 1;
2015 unsigned PWM3DCH7 : 1;
2016 } __PWM3DCHbits_t;
2017
2018 extern __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits;
2019
2020 #define _PWM3DCH0 0x01
2021 #define _PWM3DCH1 0x02
2022 #define _PWM3DCH2 0x04
2023 #define _PWM3DCH3 0x08
2024 #define _PWM3DCH4 0x10
2025 #define _PWM3DCH5 0x20
2026 #define _PWM3DCH6 0x40
2027 #define _PWM3DCH7 0x80
2028
2029 //==============================================================================
2030
2031
2032 //==============================================================================
2033 // PWM3CON Bits
2034
2035 extern __at(0x0619) __sfr PWM3CON;
2036
2037 typedef struct
2038 {
2039 unsigned : 1;
2040 unsigned : 1;
2041 unsigned : 1;
2042 unsigned : 1;
2043 unsigned PWM3POL : 1;
2044 unsigned PWM3OUT : 1;
2045 unsigned PWM3OE : 1;
2046 unsigned PWM3EN : 1;
2047 } __PWM3CONbits_t;
2048
2049 extern __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits;
2050
2051 #define _PWM3POL 0x10
2052 #define _PWM3OUT 0x20
2053 #define _PWM3OE 0x40
2054 #define _PWM3EN 0x80
2055
2056 //==============================================================================
2057
2058
2059 //==============================================================================
2060 // PWM3CON0 Bits
2061
2062 extern __at(0x0619) __sfr PWM3CON0;
2063
2064 typedef struct
2065 {
2066 unsigned : 1;
2067 unsigned : 1;
2068 unsigned : 1;
2069 unsigned : 1;
2070 unsigned PWM3POL : 1;
2071 unsigned PWM3OUT : 1;
2072 unsigned PWM3OE : 1;
2073 unsigned PWM3EN : 1;
2074 } __PWM3CON0bits_t;
2075
2076 extern __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits;
2077
2078 #define _PWM3CON0_PWM3POL 0x10
2079 #define _PWM3CON0_PWM3OUT 0x20
2080 #define _PWM3CON0_PWM3OE 0x40
2081 #define _PWM3CON0_PWM3EN 0x80
2082
2083 //==============================================================================
2084
2085
2086 //==============================================================================
2087 // PWM4DCL Bits
2088
2089 extern __at(0x061A) __sfr PWM4DCL;
2090
2091 typedef union
2092 {
2093 struct
2094 {
2095 unsigned : 1;
2096 unsigned : 1;
2097 unsigned : 1;
2098 unsigned : 1;
2099 unsigned : 1;
2100 unsigned : 1;
2101 unsigned PWM4DCL0 : 1;
2102 unsigned PWM4DCL1 : 1;
2103 };
2104
2105 struct
2106 {
2107 unsigned : 6;
2108 unsigned PWM4DCL : 2;
2109 };
2110 } __PWM4DCLbits_t;
2111
2112 extern __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits;
2113
2114 #define _PWM4DCL0 0x40
2115 #define _PWM4DCL1 0x80
2116
2117 //==============================================================================
2118
2119
2120 //==============================================================================
2121 // PWM4DCH Bits
2122
2123 extern __at(0x061B) __sfr PWM4DCH;
2124
2125 typedef struct
2126 {
2127 unsigned PWM4DCH0 : 1;
2128 unsigned PWM4DCH1 : 1;
2129 unsigned PWM4DCH2 : 1;
2130 unsigned PWM4DCH3 : 1;
2131 unsigned PWM4DCH4 : 1;
2132 unsigned PWM4DCH5 : 1;
2133 unsigned PWM4DCH6 : 1;
2134 unsigned PWM4DCH7 : 1;
2135 } __PWM4DCHbits_t;
2136
2137 extern __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits;
2138
2139 #define _PWM4DCH0 0x01
2140 #define _PWM4DCH1 0x02
2141 #define _PWM4DCH2 0x04
2142 #define _PWM4DCH3 0x08
2143 #define _PWM4DCH4 0x10
2144 #define _PWM4DCH5 0x20
2145 #define _PWM4DCH6 0x40
2146 #define _PWM4DCH7 0x80
2147
2148 //==============================================================================
2149
2150
2151 //==============================================================================
2152 // PWM4CON Bits
2153
2154 extern __at(0x061C) __sfr PWM4CON;
2155
2156 typedef struct
2157 {
2158 unsigned : 1;
2159 unsigned : 1;
2160 unsigned : 1;
2161 unsigned : 1;
2162 unsigned PWM4POL : 1;
2163 unsigned PWM4OUT : 1;
2164 unsigned PWM4OE : 1;
2165 unsigned PWM4EN : 1;
2166 } __PWM4CONbits_t;
2167
2168 extern __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits;
2169
2170 #define _PWM4POL 0x10
2171 #define _PWM4OUT 0x20
2172 #define _PWM4OE 0x40
2173 #define _PWM4EN 0x80
2174
2175 //==============================================================================
2176
2177
2178 //==============================================================================
2179 // PWM4CON0 Bits
2180
2181 extern __at(0x061C) __sfr PWM4CON0;
2182
2183 typedef struct
2184 {
2185 unsigned : 1;
2186 unsigned : 1;
2187 unsigned : 1;
2188 unsigned : 1;
2189 unsigned PWM4POL : 1;
2190 unsigned PWM4OUT : 1;
2191 unsigned PWM4OE : 1;
2192 unsigned PWM4EN : 1;
2193 } __PWM4CON0bits_t;
2194
2195 extern __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits;
2196
2197 #define _PWM4CON0_PWM4POL 0x10
2198 #define _PWM4CON0_PWM4OUT 0x20
2199 #define _PWM4CON0_PWM4OE 0x40
2200 #define _PWM4CON0_PWM4EN 0x80
2201
2202 //==============================================================================
2203
2204
2205 //==============================================================================
2206 // CWG1DBR Bits
2207
2208 extern __at(0x0691) __sfr CWG1DBR;
2209
2210 typedef union
2211 {
2212 struct
2213 {
2214 unsigned CWG1DBR0 : 1;
2215 unsigned CWG1DBR1 : 1;
2216 unsigned CWG1DBR2 : 1;
2217 unsigned CWG1DBR3 : 1;
2218 unsigned CWG1DBR4 : 1;
2219 unsigned CWG1DBR5 : 1;
2220 unsigned : 1;
2221 unsigned : 1;
2222 };
2223
2224 struct
2225 {
2226 unsigned CWG1DBR : 6;
2227 unsigned : 2;
2228 };
2229 } __CWG1DBRbits_t;
2230
2231 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
2232
2233 #define _CWG1DBR0 0x01
2234 #define _CWG1DBR1 0x02
2235 #define _CWG1DBR2 0x04
2236 #define _CWG1DBR3 0x08
2237 #define _CWG1DBR4 0x10
2238 #define _CWG1DBR5 0x20
2239
2240 //==============================================================================
2241
2242
2243 //==============================================================================
2244 // CWG1DBF Bits
2245
2246 extern __at(0x0692) __sfr CWG1DBF;
2247
2248 typedef union
2249 {
2250 struct
2251 {
2252 unsigned CWG1DBF0 : 1;
2253 unsigned CWG1DBF1 : 1;
2254 unsigned CWG1DBF2 : 1;
2255 unsigned CWG1DBF3 : 1;
2256 unsigned CWG1DBF4 : 1;
2257 unsigned CWG1DBF5 : 1;
2258 unsigned : 1;
2259 unsigned : 1;
2260 };
2261
2262 struct
2263 {
2264 unsigned CWG1DBF : 6;
2265 unsigned : 2;
2266 };
2267 } __CWG1DBFbits_t;
2268
2269 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
2270
2271 #define _CWG1DBF0 0x01
2272 #define _CWG1DBF1 0x02
2273 #define _CWG1DBF2 0x04
2274 #define _CWG1DBF3 0x08
2275 #define _CWG1DBF4 0x10
2276 #define _CWG1DBF5 0x20
2277
2278 //==============================================================================
2279
2280
2281 //==============================================================================
2282 // CWG1CON0 Bits
2283
2284 extern __at(0x0693) __sfr CWG1CON0;
2285
2286 typedef struct
2287 {
2288 unsigned G1CS0 : 1;
2289 unsigned : 1;
2290 unsigned : 1;
2291 unsigned G1POLA : 1;
2292 unsigned G1POLB : 1;
2293 unsigned G1OEA : 1;
2294 unsigned G1OEB : 1;
2295 unsigned G1EN : 1;
2296 } __CWG1CON0bits_t;
2297
2298 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
2299
2300 #define _G1CS0 0x01
2301 #define _G1POLA 0x08
2302 #define _G1POLB 0x10
2303 #define _G1OEA 0x20
2304 #define _G1OEB 0x40
2305 #define _G1EN 0x80
2306
2307 //==============================================================================
2308
2309
2310 //==============================================================================
2311 // CWG1CON1 Bits
2312
2313 extern __at(0x0694) __sfr CWG1CON1;
2314
2315 typedef union
2316 {
2317 struct
2318 {
2319 unsigned G1IS0 : 1;
2320 unsigned G1IS1 : 1;
2321 unsigned G1IS2 : 1;
2322 unsigned : 1;
2323 unsigned G1ASDLA0 : 1;
2324 unsigned G1ASDLA1 : 1;
2325 unsigned G1ASDLB0 : 1;
2326 unsigned G1ASDLB1 : 1;
2327 };
2328
2329 struct
2330 {
2331 unsigned G1IS : 3;
2332 unsigned : 5;
2333 };
2334
2335 struct
2336 {
2337 unsigned : 4;
2338 unsigned G1ASDLA : 2;
2339 unsigned : 2;
2340 };
2341
2342 struct
2343 {
2344 unsigned : 6;
2345 unsigned G1ASDLB : 2;
2346 };
2347 } __CWG1CON1bits_t;
2348
2349 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
2350
2351 #define _G1IS0 0x01
2352 #define _G1IS1 0x02
2353 #define _G1IS2 0x04
2354 #define _G1ASDLA0 0x10
2355 #define _G1ASDLA1 0x20
2356 #define _G1ASDLB0 0x40
2357 #define _G1ASDLB1 0x80
2358
2359 //==============================================================================
2360
2361
2362 //==============================================================================
2363 // CWG1CON2 Bits
2364
2365 extern __at(0x0695) __sfr CWG1CON2;
2366
2367 typedef struct
2368 {
2369 unsigned G1ASDSCLC2 : 1;
2370 unsigned G1ASDSFLT : 1;
2371 unsigned G1ASDSC1 : 1;
2372 unsigned : 1;
2373 unsigned : 1;
2374 unsigned : 1;
2375 unsigned G1ARSEN : 1;
2376 unsigned G1ASE : 1;
2377 } __CWG1CON2bits_t;
2378
2379 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
2380
2381 #define _G1ASDSCLC2 0x01
2382 #define _G1ASDSFLT 0x02
2383 #define _G1ASDSC1 0x04
2384 #define _G1ARSEN 0x40
2385 #define _G1ASE 0x80
2386
2387 //==============================================================================
2388
2389
2390 //==============================================================================
2391 // CLCDATA Bits
2392
2393 extern __at(0x0F0F) __sfr CLCDATA;
2394
2395 typedef struct
2396 {
2397 unsigned MCLC1OUT : 1;
2398 unsigned MCLC2OUT : 1;
2399 unsigned : 1;
2400 unsigned : 1;
2401 unsigned : 1;
2402 unsigned : 1;
2403 unsigned : 1;
2404 unsigned : 1;
2405 } __CLCDATAbits_t;
2406
2407 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits;
2408
2409 #define _MCLC1OUT 0x01
2410 #define _MCLC2OUT 0x02
2411
2412 //==============================================================================
2413
2414
2415 //==============================================================================
2416 // CLC1CON Bits
2417
2418 extern __at(0x0F10) __sfr CLC1CON;
2419
2420 typedef union
2421 {
2422 struct
2423 {
2424 unsigned LC1MODE0 : 1;
2425 unsigned LC1MODE1 : 1;
2426 unsigned LC1MODE2 : 1;
2427 unsigned LC1INTN : 1;
2428 unsigned LC1INTP : 1;
2429 unsigned LC1OUT : 1;
2430 unsigned LC1OE : 1;
2431 unsigned LC1EN : 1;
2432 };
2433
2434 struct
2435 {
2436 unsigned LCMODE0 : 1;
2437 unsigned LCMODE1 : 1;
2438 unsigned LCMODE2 : 1;
2439 unsigned LCINTN : 1;
2440 unsigned LCINTP : 1;
2441 unsigned LCOUT : 1;
2442 unsigned LCOE : 1;
2443 unsigned LCEN : 1;
2444 };
2445
2446 struct
2447 {
2448 unsigned LCMODE : 3;
2449 unsigned : 5;
2450 };
2451
2452 struct
2453 {
2454 unsigned LC1MODE : 3;
2455 unsigned : 5;
2456 };
2457 } __CLC1CONbits_t;
2458
2459 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits;
2460
2461 #define _LC1MODE0 0x01
2462 #define _LCMODE0 0x01
2463 #define _LC1MODE1 0x02
2464 #define _LCMODE1 0x02
2465 #define _LC1MODE2 0x04
2466 #define _LCMODE2 0x04
2467 #define _LC1INTN 0x08
2468 #define _LCINTN 0x08
2469 #define _LC1INTP 0x10
2470 #define _LCINTP 0x10
2471 #define _LC1OUT 0x20
2472 #define _LCOUT 0x20
2473 #define _LC1OE 0x40
2474 #define _LCOE 0x40
2475 #define _LC1EN 0x80
2476 #define _LCEN 0x80
2477
2478 //==============================================================================
2479
2480
2481 //==============================================================================
2482 // CLC1POL Bits
2483
2484 extern __at(0x0F11) __sfr CLC1POL;
2485
2486 typedef union
2487 {
2488 struct
2489 {
2490 unsigned LC1G1POL : 1;
2491 unsigned LC1G2POL : 1;
2492 unsigned LC1G3POL : 1;
2493 unsigned LC1G4POL : 1;
2494 unsigned : 1;
2495 unsigned : 1;
2496 unsigned : 1;
2497 unsigned LC1POL : 1;
2498 };
2499
2500 struct
2501 {
2502 unsigned G1POL : 1;
2503 unsigned G2POL : 1;
2504 unsigned G3POL : 1;
2505 unsigned G4POL : 1;
2506 unsigned : 1;
2507 unsigned : 1;
2508 unsigned : 1;
2509 unsigned POL : 1;
2510 };
2511 } __CLC1POLbits_t;
2512
2513 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits;
2514
2515 #define _LC1G1POL 0x01
2516 #define _G1POL 0x01
2517 #define _LC1G2POL 0x02
2518 #define _G2POL 0x02
2519 #define _LC1G3POL 0x04
2520 #define _G3POL 0x04
2521 #define _LC1G4POL 0x08
2522 #define _G4POL 0x08
2523 #define _LC1POL 0x80
2524 #define _POL 0x80
2525
2526 //==============================================================================
2527
2528
2529 //==============================================================================
2530 // CLC1SEL0 Bits
2531
2532 extern __at(0x0F12) __sfr CLC1SEL0;
2533
2534 typedef union
2535 {
2536 struct
2537 {
2538 unsigned LC1D1S0 : 1;
2539 unsigned LC1D1S1 : 1;
2540 unsigned LC1D1S2 : 1;
2541 unsigned : 1;
2542 unsigned LC1D2S0 : 1;
2543 unsigned LC1D2S1 : 1;
2544 unsigned LC1D2S2 : 1;
2545 unsigned : 1;
2546 };
2547
2548 struct
2549 {
2550 unsigned D1S0 : 1;
2551 unsigned D1S1 : 1;
2552 unsigned D1S2 : 1;
2553 unsigned : 1;
2554 unsigned D2S0 : 1;
2555 unsigned D2S1 : 1;
2556 unsigned D2S2 : 1;
2557 unsigned : 1;
2558 };
2559
2560 struct
2561 {
2562 unsigned LC1D1S : 3;
2563 unsigned : 5;
2564 };
2565
2566 struct
2567 {
2568 unsigned D1S : 3;
2569 unsigned : 5;
2570 };
2571
2572 struct
2573 {
2574 unsigned : 4;
2575 unsigned LC1D2S : 3;
2576 unsigned : 1;
2577 };
2578
2579 struct
2580 {
2581 unsigned : 4;
2582 unsigned D2S : 3;
2583 unsigned : 1;
2584 };
2585 } __CLC1SEL0bits_t;
2586
2587 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits;
2588
2589 #define _LC1D1S0 0x01
2590 #define _D1S0 0x01
2591 #define _LC1D1S1 0x02
2592 #define _D1S1 0x02
2593 #define _LC1D1S2 0x04
2594 #define _D1S2 0x04
2595 #define _LC1D2S0 0x10
2596 #define _D2S0 0x10
2597 #define _LC1D2S1 0x20
2598 #define _D2S1 0x20
2599 #define _LC1D2S2 0x40
2600 #define _D2S2 0x40
2601
2602 //==============================================================================
2603
2604
2605 //==============================================================================
2606 // CLC1SEL1 Bits
2607
2608 extern __at(0x0F13) __sfr CLC1SEL1;
2609
2610 typedef union
2611 {
2612 struct
2613 {
2614 unsigned LC1D3S0 : 1;
2615 unsigned LC1D3S1 : 1;
2616 unsigned LC1D3S2 : 1;
2617 unsigned : 1;
2618 unsigned LC1D4S0 : 1;
2619 unsigned LC1D4S1 : 1;
2620 unsigned LC1D4S2 : 1;
2621 unsigned : 1;
2622 };
2623
2624 struct
2625 {
2626 unsigned D3S0 : 1;
2627 unsigned D3S1 : 1;
2628 unsigned D3S2 : 1;
2629 unsigned : 1;
2630 unsigned D4S0 : 1;
2631 unsigned D4S1 : 1;
2632 unsigned D4S2 : 1;
2633 unsigned : 1;
2634 };
2635
2636 struct
2637 {
2638 unsigned D3S : 3;
2639 unsigned : 5;
2640 };
2641
2642 struct
2643 {
2644 unsigned LC1D3S : 3;
2645 unsigned : 5;
2646 };
2647
2648 struct
2649 {
2650 unsigned : 4;
2651 unsigned LC1D4S : 3;
2652 unsigned : 1;
2653 };
2654
2655 struct
2656 {
2657 unsigned : 4;
2658 unsigned D4S : 3;
2659 unsigned : 1;
2660 };
2661 } __CLC1SEL1bits_t;
2662
2663 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits;
2664
2665 #define _LC1D3S0 0x01
2666 #define _D3S0 0x01
2667 #define _LC1D3S1 0x02
2668 #define _D3S1 0x02
2669 #define _LC1D3S2 0x04
2670 #define _D3S2 0x04
2671 #define _LC1D4S0 0x10
2672 #define _D4S0 0x10
2673 #define _LC1D4S1 0x20
2674 #define _D4S1 0x20
2675 #define _LC1D4S2 0x40
2676 #define _D4S2 0x40
2677
2678 //==============================================================================
2679
2680
2681 //==============================================================================
2682 // CLC1GLS0 Bits
2683
2684 extern __at(0x0F14) __sfr CLC1GLS0;
2685
2686 typedef union
2687 {
2688 struct
2689 {
2690 unsigned LC1G1D1N : 1;
2691 unsigned LC1G1D1T : 1;
2692 unsigned LC1G1D2N : 1;
2693 unsigned LC1G1D2T : 1;
2694 unsigned LC1G1D3N : 1;
2695 unsigned LC1G1D3T : 1;
2696 unsigned LC1G1D4N : 1;
2697 unsigned LC1G1D4T : 1;
2698 };
2699
2700 struct
2701 {
2702 unsigned D1N : 1;
2703 unsigned D1T : 1;
2704 unsigned D2N : 1;
2705 unsigned D2T : 1;
2706 unsigned D3N : 1;
2707 unsigned D3T : 1;
2708 unsigned D4N : 1;
2709 unsigned D4T : 1;
2710 };
2711 } __CLC1GLS0bits_t;
2712
2713 extern __at(0x0F14) volatile __CLC1GLS0bits_t CLC1GLS0bits;
2714
2715 #define _LC1G1D1N 0x01
2716 #define _D1N 0x01
2717 #define _LC1G1D1T 0x02
2718 #define _D1T 0x02
2719 #define _LC1G1D2N 0x04
2720 #define _D2N 0x04
2721 #define _LC1G1D2T 0x08
2722 #define _D2T 0x08
2723 #define _LC1G1D3N 0x10
2724 #define _D3N 0x10
2725 #define _LC1G1D3T 0x20
2726 #define _D3T 0x20
2727 #define _LC1G1D4N 0x40
2728 #define _D4N 0x40
2729 #define _LC1G1D4T 0x80
2730 #define _D4T 0x80
2731
2732 //==============================================================================
2733
2734
2735 //==============================================================================
2736 // CLC1GLS1 Bits
2737
2738 extern __at(0x0F15) __sfr CLC1GLS1;
2739
2740 typedef union
2741 {
2742 struct
2743 {
2744 unsigned LC1G2D1N : 1;
2745 unsigned LC1G2D1T : 1;
2746 unsigned LC1G2D2N : 1;
2747 unsigned LC1G2D2T : 1;
2748 unsigned LC1G2D3N : 1;
2749 unsigned LC1G2D3T : 1;
2750 unsigned LC1G2D4N : 1;
2751 unsigned LC1G2D4T : 1;
2752 };
2753
2754 struct
2755 {
2756 unsigned D1N : 1;
2757 unsigned D1T : 1;
2758 unsigned D2N : 1;
2759 unsigned D2T : 1;
2760 unsigned D3N : 1;
2761 unsigned D3T : 1;
2762 unsigned D4N : 1;
2763 unsigned D4T : 1;
2764 };
2765 } __CLC1GLS1bits_t;
2766
2767 extern __at(0x0F15) volatile __CLC1GLS1bits_t CLC1GLS1bits;
2768
2769 #define _CLC1GLS1_LC1G2D1N 0x01
2770 #define _CLC1GLS1_D1N 0x01
2771 #define _CLC1GLS1_LC1G2D1T 0x02
2772 #define _CLC1GLS1_D1T 0x02
2773 #define _CLC1GLS1_LC1G2D2N 0x04
2774 #define _CLC1GLS1_D2N 0x04
2775 #define _CLC1GLS1_LC1G2D2T 0x08
2776 #define _CLC1GLS1_D2T 0x08
2777 #define _CLC1GLS1_LC1G2D3N 0x10
2778 #define _CLC1GLS1_D3N 0x10
2779 #define _CLC1GLS1_LC1G2D3T 0x20
2780 #define _CLC1GLS1_D3T 0x20
2781 #define _CLC1GLS1_LC1G2D4N 0x40
2782 #define _CLC1GLS1_D4N 0x40
2783 #define _CLC1GLS1_LC1G2D4T 0x80
2784 #define _CLC1GLS1_D4T 0x80
2785
2786 //==============================================================================
2787
2788
2789 //==============================================================================
2790 // CLC1GLS2 Bits
2791
2792 extern __at(0x0F16) __sfr CLC1GLS2;
2793
2794 typedef union
2795 {
2796 struct
2797 {
2798 unsigned LC1G3D1N : 1;
2799 unsigned LC1G3D1T : 1;
2800 unsigned LC1G3D2N : 1;
2801 unsigned LC1G3D2T : 1;
2802 unsigned LC1G3D3N : 1;
2803 unsigned LC1G3D3T : 1;
2804 unsigned LC1G3D4N : 1;
2805 unsigned LC1G3D4T : 1;
2806 };
2807
2808 struct
2809 {
2810 unsigned D1N : 1;
2811 unsigned D1T : 1;
2812 unsigned D2N : 1;
2813 unsigned D2T : 1;
2814 unsigned D3N : 1;
2815 unsigned D3T : 1;
2816 unsigned D4N : 1;
2817 unsigned D4T : 1;
2818 };
2819 } __CLC1GLS2bits_t;
2820
2821 extern __at(0x0F16) volatile __CLC1GLS2bits_t CLC1GLS2bits;
2822
2823 #define _CLC1GLS2_LC1G3D1N 0x01
2824 #define _CLC1GLS2_D1N 0x01
2825 #define _CLC1GLS2_LC1G3D1T 0x02
2826 #define _CLC1GLS2_D1T 0x02
2827 #define _CLC1GLS2_LC1G3D2N 0x04
2828 #define _CLC1GLS2_D2N 0x04
2829 #define _CLC1GLS2_LC1G3D2T 0x08
2830 #define _CLC1GLS2_D2T 0x08
2831 #define _CLC1GLS2_LC1G3D3N 0x10
2832 #define _CLC1GLS2_D3N 0x10
2833 #define _CLC1GLS2_LC1G3D3T 0x20
2834 #define _CLC1GLS2_D3T 0x20
2835 #define _CLC1GLS2_LC1G3D4N 0x40
2836 #define _CLC1GLS2_D4N 0x40
2837 #define _CLC1GLS2_LC1G3D4T 0x80
2838 #define _CLC1GLS2_D4T 0x80
2839
2840 //==============================================================================
2841
2842
2843 //==============================================================================
2844 // CLC1GLS3 Bits
2845
2846 extern __at(0x0F17) __sfr CLC1GLS3;
2847
2848 typedef union
2849 {
2850 struct
2851 {
2852 unsigned LC1G4D1N : 1;
2853 unsigned LC1G4D1T : 1;
2854 unsigned LC1G4D2N : 1;
2855 unsigned LC1G4D2T : 1;
2856 unsigned LC1G4D3N : 1;
2857 unsigned LC1G4D3T : 1;
2858 unsigned LC1G4D4N : 1;
2859 unsigned LC1G4D4T : 1;
2860 };
2861
2862 struct
2863 {
2864 unsigned G4D1N : 1;
2865 unsigned G4D1T : 1;
2866 unsigned G4D2N : 1;
2867 unsigned G4D2T : 1;
2868 unsigned G4D3N : 1;
2869 unsigned G4D3T : 1;
2870 unsigned G4D4N : 1;
2871 unsigned G4D4T : 1;
2872 };
2873 } __CLC1GLS3bits_t;
2874
2875 extern __at(0x0F17) volatile __CLC1GLS3bits_t CLC1GLS3bits;
2876
2877 #define _LC1G4D1N 0x01
2878 #define _G4D1N 0x01
2879 #define _LC1G4D1T 0x02
2880 #define _G4D1T 0x02
2881 #define _LC1G4D2N 0x04
2882 #define _G4D2N 0x04
2883 #define _LC1G4D2T 0x08
2884 #define _G4D2T 0x08
2885 #define _LC1G4D3N 0x10
2886 #define _G4D3N 0x10
2887 #define _LC1G4D3T 0x20
2888 #define _G4D3T 0x20
2889 #define _LC1G4D4N 0x40
2890 #define _G4D4N 0x40
2891 #define _LC1G4D4T 0x80
2892 #define _G4D4T 0x80
2893
2894 //==============================================================================
2895
2896
2897 //==============================================================================
2898 // CLC2CON Bits
2899
2900 extern __at(0x0F18) __sfr CLC2CON;
2901
2902 typedef union
2903 {
2904 struct
2905 {
2906 unsigned LC2MODE0 : 1;
2907 unsigned LC2MODE1 : 1;
2908 unsigned LC2MODE2 : 1;
2909 unsigned LC2INTN : 1;
2910 unsigned LC2INTP : 1;
2911 unsigned LC2OUT : 1;
2912 unsigned LC2OE : 1;
2913 unsigned LC2EN : 1;
2914 };
2915
2916 struct
2917 {
2918 unsigned LCMODE0 : 1;
2919 unsigned LCMODE1 : 1;
2920 unsigned LCMODE2 : 1;
2921 unsigned LCINTN : 1;
2922 unsigned LCINTP : 1;
2923 unsigned LCOUT : 1;
2924 unsigned LCOE : 1;
2925 unsigned LCEN : 1;
2926 };
2927
2928 struct
2929 {
2930 unsigned LC2MODE : 3;
2931 unsigned : 5;
2932 };
2933
2934 struct
2935 {
2936 unsigned LCMODE : 3;
2937 unsigned : 5;
2938 };
2939 } __CLC2CONbits_t;
2940
2941 extern __at(0x0F18) volatile __CLC2CONbits_t CLC2CONbits;
2942
2943 #define _CLC2CON_LC2MODE0 0x01
2944 #define _CLC2CON_LCMODE0 0x01
2945 #define _CLC2CON_LC2MODE1 0x02
2946 #define _CLC2CON_LCMODE1 0x02
2947 #define _CLC2CON_LC2MODE2 0x04
2948 #define _CLC2CON_LCMODE2 0x04
2949 #define _CLC2CON_LC2INTN 0x08
2950 #define _CLC2CON_LCINTN 0x08
2951 #define _CLC2CON_LC2INTP 0x10
2952 #define _CLC2CON_LCINTP 0x10
2953 #define _CLC2CON_LC2OUT 0x20
2954 #define _CLC2CON_LCOUT 0x20
2955 #define _CLC2CON_LC2OE 0x40
2956 #define _CLC2CON_LCOE 0x40
2957 #define _CLC2CON_LC2EN 0x80
2958 #define _CLC2CON_LCEN 0x80
2959
2960 //==============================================================================
2961
2962
2963 //==============================================================================
2964 // CLC2POL Bits
2965
2966 extern __at(0x0F19) __sfr CLC2POL;
2967
2968 typedef union
2969 {
2970 struct
2971 {
2972 unsigned LC2G1POL : 1;
2973 unsigned LC2G2POL : 1;
2974 unsigned LC2G3POL : 1;
2975 unsigned LC2G4POL : 1;
2976 unsigned : 1;
2977 unsigned : 1;
2978 unsigned : 1;
2979 unsigned LC2POL : 1;
2980 };
2981
2982 struct
2983 {
2984 unsigned G1POL : 1;
2985 unsigned G2POL : 1;
2986 unsigned G3POL : 1;
2987 unsigned G4POL : 1;
2988 unsigned : 1;
2989 unsigned : 1;
2990 unsigned : 1;
2991 unsigned POL : 1;
2992 };
2993 } __CLC2POLbits_t;
2994
2995 extern __at(0x0F19) volatile __CLC2POLbits_t CLC2POLbits;
2996
2997 #define _CLC2POL_LC2G1POL 0x01
2998 #define _CLC2POL_G1POL 0x01
2999 #define _CLC2POL_LC2G2POL 0x02
3000 #define _CLC2POL_G2POL 0x02
3001 #define _CLC2POL_LC2G3POL 0x04
3002 #define _CLC2POL_G3POL 0x04
3003 #define _CLC2POL_LC2G4POL 0x08
3004 #define _CLC2POL_G4POL 0x08
3005 #define _CLC2POL_LC2POL 0x80
3006 #define _CLC2POL_POL 0x80
3007
3008 //==============================================================================
3009
3010
3011 //==============================================================================
3012 // CLC2SEL0 Bits
3013
3014 extern __at(0x0F1A) __sfr CLC2SEL0;
3015
3016 typedef union
3017 {
3018 struct
3019 {
3020 unsigned LC2D1S0 : 1;
3021 unsigned LC2D1S1 : 1;
3022 unsigned LC2D1S2 : 1;
3023 unsigned : 1;
3024 unsigned LC2D2S0 : 1;
3025 unsigned LC2D2S1 : 1;
3026 unsigned LC2D2S2 : 1;
3027 unsigned : 1;
3028 };
3029
3030 struct
3031 {
3032 unsigned D1S0 : 1;
3033 unsigned D1S1 : 1;
3034 unsigned D1S2 : 1;
3035 unsigned : 1;
3036 unsigned D2S0 : 1;
3037 unsigned D2S1 : 1;
3038 unsigned D2S2 : 1;
3039 unsigned : 1;
3040 };
3041
3042 struct
3043 {
3044 unsigned D1S : 3;
3045 unsigned : 5;
3046 };
3047
3048 struct
3049 {
3050 unsigned LC2D1S : 3;
3051 unsigned : 5;
3052 };
3053
3054 struct
3055 {
3056 unsigned : 4;
3057 unsigned LC2D2S : 3;
3058 unsigned : 1;
3059 };
3060
3061 struct
3062 {
3063 unsigned : 4;
3064 unsigned D2S : 3;
3065 unsigned : 1;
3066 };
3067 } __CLC2SEL0bits_t;
3068
3069 extern __at(0x0F1A) volatile __CLC2SEL0bits_t CLC2SEL0bits;
3070
3071 #define _CLC2SEL0_LC2D1S0 0x01
3072 #define _CLC2SEL0_D1S0 0x01
3073 #define _CLC2SEL0_LC2D1S1 0x02
3074 #define _CLC2SEL0_D1S1 0x02
3075 #define _CLC2SEL0_LC2D1S2 0x04
3076 #define _CLC2SEL0_D1S2 0x04
3077 #define _CLC2SEL0_LC2D2S0 0x10
3078 #define _CLC2SEL0_D2S0 0x10
3079 #define _CLC2SEL0_LC2D2S1 0x20
3080 #define _CLC2SEL0_D2S1 0x20
3081 #define _CLC2SEL0_LC2D2S2 0x40
3082 #define _CLC2SEL0_D2S2 0x40
3083
3084 //==============================================================================
3085
3086
3087 //==============================================================================
3088 // CLC2SEL1 Bits
3089
3090 extern __at(0x0F1B) __sfr CLC2SEL1;
3091
3092 typedef union
3093 {
3094 struct
3095 {
3096 unsigned LC2D3S0 : 1;
3097 unsigned LC2D3S1 : 1;
3098 unsigned LC2D3S2 : 1;
3099 unsigned : 1;
3100 unsigned LC2D4S0 : 1;
3101 unsigned LC2D4S1 : 1;
3102 unsigned LC2D4S2 : 1;
3103 unsigned : 1;
3104 };
3105
3106 struct
3107 {
3108 unsigned D3S0 : 1;
3109 unsigned D3S1 : 1;
3110 unsigned D3S2 : 1;
3111 unsigned : 1;
3112 unsigned D4S0 : 1;
3113 unsigned D4S1 : 1;
3114 unsigned D4S2 : 1;
3115 unsigned : 1;
3116 };
3117
3118 struct
3119 {
3120 unsigned D3S : 3;
3121 unsigned : 5;
3122 };
3123
3124 struct
3125 {
3126 unsigned LC2D3S : 3;
3127 unsigned : 5;
3128 };
3129
3130 struct
3131 {
3132 unsigned : 4;
3133 unsigned LC2D4S : 3;
3134 unsigned : 1;
3135 };
3136
3137 struct
3138 {
3139 unsigned : 4;
3140 unsigned D4S : 3;
3141 unsigned : 1;
3142 };
3143 } __CLC2SEL1bits_t;
3144
3145 extern __at(0x0F1B) volatile __CLC2SEL1bits_t CLC2SEL1bits;
3146
3147 #define _CLC2SEL1_LC2D3S0 0x01
3148 #define _CLC2SEL1_D3S0 0x01
3149 #define _CLC2SEL1_LC2D3S1 0x02
3150 #define _CLC2SEL1_D3S1 0x02
3151 #define _CLC2SEL1_LC2D3S2 0x04
3152 #define _CLC2SEL1_D3S2 0x04
3153 #define _CLC2SEL1_LC2D4S0 0x10
3154 #define _CLC2SEL1_D4S0 0x10
3155 #define _CLC2SEL1_LC2D4S1 0x20
3156 #define _CLC2SEL1_D4S1 0x20
3157 #define _CLC2SEL1_LC2D4S2 0x40
3158 #define _CLC2SEL1_D4S2 0x40
3159
3160 //==============================================================================
3161
3162
3163 //==============================================================================
3164 // CLC2GLS0 Bits
3165
3166 extern __at(0x0F1C) __sfr CLC2GLS0;
3167
3168 typedef union
3169 {
3170 struct
3171 {
3172 unsigned LC2G1D1N : 1;
3173 unsigned LC2G1D1T : 1;
3174 unsigned LC2G1D2N : 1;
3175 unsigned LC2G1D2T : 1;
3176 unsigned LC2G1D3N : 1;
3177 unsigned LC2G1D3T : 1;
3178 unsigned LC2G1D4N : 1;
3179 unsigned LC2G1D4T : 1;
3180 };
3181
3182 struct
3183 {
3184 unsigned D1N : 1;
3185 unsigned D1T : 1;
3186 unsigned D2N : 1;
3187 unsigned D2T : 1;
3188 unsigned D3N : 1;
3189 unsigned D3T : 1;
3190 unsigned D4N : 1;
3191 unsigned D4T : 1;
3192 };
3193 } __CLC2GLS0bits_t;
3194
3195 extern __at(0x0F1C) volatile __CLC2GLS0bits_t CLC2GLS0bits;
3196
3197 #define _CLC2GLS0_LC2G1D1N 0x01
3198 #define _CLC2GLS0_D1N 0x01
3199 #define _CLC2GLS0_LC2G1D1T 0x02
3200 #define _CLC2GLS0_D1T 0x02
3201 #define _CLC2GLS0_LC2G1D2N 0x04
3202 #define _CLC2GLS0_D2N 0x04
3203 #define _CLC2GLS0_LC2G1D2T 0x08
3204 #define _CLC2GLS0_D2T 0x08
3205 #define _CLC2GLS0_LC2G1D3N 0x10
3206 #define _CLC2GLS0_D3N 0x10
3207 #define _CLC2GLS0_LC2G1D3T 0x20
3208 #define _CLC2GLS0_D3T 0x20
3209 #define _CLC2GLS0_LC2G1D4N 0x40
3210 #define _CLC2GLS0_D4N 0x40
3211 #define _CLC2GLS0_LC2G1D4T 0x80
3212 #define _CLC2GLS0_D4T 0x80
3213
3214 //==============================================================================
3215
3216
3217 //==============================================================================
3218 // CLC2GLS1 Bits
3219
3220 extern __at(0x0F1D) __sfr CLC2GLS1;
3221
3222 typedef union
3223 {
3224 struct
3225 {
3226 unsigned LC2G2D1N : 1;
3227 unsigned LC2G2D1T : 1;
3228 unsigned LC2G2D2N : 1;
3229 unsigned LC2G2D2T : 1;
3230 unsigned LC2G2D3N : 1;
3231 unsigned LC2G2D3T : 1;
3232 unsigned LC2G2D4N : 1;
3233 unsigned LC2G2D4T : 1;
3234 };
3235
3236 struct
3237 {
3238 unsigned D1N : 1;
3239 unsigned D1T : 1;
3240 unsigned D2N : 1;
3241 unsigned D2T : 1;
3242 unsigned D3N : 1;
3243 unsigned D3T : 1;
3244 unsigned D4N : 1;
3245 unsigned D4T : 1;
3246 };
3247 } __CLC2GLS1bits_t;
3248
3249 extern __at(0x0F1D) volatile __CLC2GLS1bits_t CLC2GLS1bits;
3250
3251 #define _CLC2GLS1_LC2G2D1N 0x01
3252 #define _CLC2GLS1_D1N 0x01
3253 #define _CLC2GLS1_LC2G2D1T 0x02
3254 #define _CLC2GLS1_D1T 0x02
3255 #define _CLC2GLS1_LC2G2D2N 0x04
3256 #define _CLC2GLS1_D2N 0x04
3257 #define _CLC2GLS1_LC2G2D2T 0x08
3258 #define _CLC2GLS1_D2T 0x08
3259 #define _CLC2GLS1_LC2G2D3N 0x10
3260 #define _CLC2GLS1_D3N 0x10
3261 #define _CLC2GLS1_LC2G2D3T 0x20
3262 #define _CLC2GLS1_D3T 0x20
3263 #define _CLC2GLS1_LC2G2D4N 0x40
3264 #define _CLC2GLS1_D4N 0x40
3265 #define _CLC2GLS1_LC2G2D4T 0x80
3266 #define _CLC2GLS1_D4T 0x80
3267
3268 //==============================================================================
3269
3270
3271 //==============================================================================
3272 // CLC2GLS2 Bits
3273
3274 extern __at(0x0F1E) __sfr CLC2GLS2;
3275
3276 typedef union
3277 {
3278 struct
3279 {
3280 unsigned LC2G3D1N : 1;
3281 unsigned LC2G3D1T : 1;
3282 unsigned LC2G3D2N : 1;
3283 unsigned LC2G3D2T : 1;
3284 unsigned LC2G3D3N : 1;
3285 unsigned LC2G3D3T : 1;
3286 unsigned LC2G3D4N : 1;
3287 unsigned LC2G3D4T : 1;
3288 };
3289
3290 struct
3291 {
3292 unsigned D1N : 1;
3293 unsigned D1T : 1;
3294 unsigned D2N : 1;
3295 unsigned D2T : 1;
3296 unsigned D3N : 1;
3297 unsigned D3T : 1;
3298 unsigned D4N : 1;
3299 unsigned D4T : 1;
3300 };
3301 } __CLC2GLS2bits_t;
3302
3303 extern __at(0x0F1E) volatile __CLC2GLS2bits_t CLC2GLS2bits;
3304
3305 #define _CLC2GLS2_LC2G3D1N 0x01
3306 #define _CLC2GLS2_D1N 0x01
3307 #define _CLC2GLS2_LC2G3D1T 0x02
3308 #define _CLC2GLS2_D1T 0x02
3309 #define _CLC2GLS2_LC2G3D2N 0x04
3310 #define _CLC2GLS2_D2N 0x04
3311 #define _CLC2GLS2_LC2G3D2T 0x08
3312 #define _CLC2GLS2_D2T 0x08
3313 #define _CLC2GLS2_LC2G3D3N 0x10
3314 #define _CLC2GLS2_D3N 0x10
3315 #define _CLC2GLS2_LC2G3D3T 0x20
3316 #define _CLC2GLS2_D3T 0x20
3317 #define _CLC2GLS2_LC2G3D4N 0x40
3318 #define _CLC2GLS2_D4N 0x40
3319 #define _CLC2GLS2_LC2G3D4T 0x80
3320 #define _CLC2GLS2_D4T 0x80
3321
3322 //==============================================================================
3323
3324
3325 //==============================================================================
3326 // CLC2GLS3 Bits
3327
3328 extern __at(0x0F1F) __sfr CLC2GLS3;
3329
3330 typedef union
3331 {
3332 struct
3333 {
3334 unsigned LC2G4D1N : 1;
3335 unsigned LC2G4D1T : 1;
3336 unsigned LC2G4D2N : 1;
3337 unsigned LC2G4D2T : 1;
3338 unsigned LC2G4D3N : 1;
3339 unsigned LC2G4D3T : 1;
3340 unsigned LC2G4D4N : 1;
3341 unsigned LC2G4D4T : 1;
3342 };
3343
3344 struct
3345 {
3346 unsigned G4D1N : 1;
3347 unsigned G4D1T : 1;
3348 unsigned G4D2N : 1;
3349 unsigned G4D2T : 1;
3350 unsigned G4D3N : 1;
3351 unsigned G4D3T : 1;
3352 unsigned G4D4N : 1;
3353 unsigned G4D4T : 1;
3354 };
3355 } __CLC2GLS3bits_t;
3356
3357 extern __at(0x0F1F) volatile __CLC2GLS3bits_t CLC2GLS3bits;
3358
3359 #define _CLC2GLS3_LC2G4D1N 0x01
3360 #define _CLC2GLS3_G4D1N 0x01
3361 #define _CLC2GLS3_LC2G4D1T 0x02
3362 #define _CLC2GLS3_G4D1T 0x02
3363 #define _CLC2GLS3_LC2G4D2N 0x04
3364 #define _CLC2GLS3_G4D2N 0x04
3365 #define _CLC2GLS3_LC2G4D2T 0x08
3366 #define _CLC2GLS3_G4D2T 0x08
3367 #define _CLC2GLS3_LC2G4D3N 0x10
3368 #define _CLC2GLS3_G4D3N 0x10
3369 #define _CLC2GLS3_LC2G4D3T 0x20
3370 #define _CLC2GLS3_G4D3T 0x20
3371 #define _CLC2GLS3_LC2G4D4N 0x40
3372 #define _CLC2GLS3_G4D4N 0x40
3373 #define _CLC2GLS3_LC2G4D4T 0x80
3374 #define _CLC2GLS3_G4D4T 0x80
3375
3376 //==============================================================================
3377
3378 extern __at(0x0FE3) __sfr BSR_ICDSHAD;
3379
3380 //==============================================================================
3381 // STATUS_SHAD Bits
3382
3383 extern __at(0x0FE4) __sfr STATUS_SHAD;
3384
3385 typedef struct
3386 {
3387 unsigned C_SHAD : 1;
3388 unsigned DC_SHAD : 1;
3389 unsigned Z_SHAD : 1;
3390 unsigned : 1;
3391 unsigned : 1;
3392 unsigned : 1;
3393 unsigned : 1;
3394 unsigned : 1;
3395 } __STATUS_SHADbits_t;
3396
3397 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
3398
3399 #define _C_SHAD 0x01
3400 #define _DC_SHAD 0x02
3401 #define _Z_SHAD 0x04
3402
3403 //==============================================================================
3404
3405 extern __at(0x0FE5) __sfr WREG_SHAD;
3406 extern __at(0x0FE6) __sfr BSR_SHAD;
3407 extern __at(0x0FE7) __sfr PCLATH_SHAD;
3408 extern __at(0x0FE8) __sfr FSR0L_SHAD;
3409 extern __at(0x0FE9) __sfr FSR0H_SHAD;
3410 extern __at(0x0FEA) __sfr FSR1L_SHAD;
3411 extern __at(0x0FEB) __sfr FSR1H_SHAD;
3412 extern __at(0x0FED) __sfr STKPTR;
3413 extern __at(0x0FEE) __sfr TOSL;
3414 extern __at(0x0FEF) __sfr TOSH;
3415
3416 //==============================================================================
3417 //
3418 // Configuration Bits
3419 //
3420 //==============================================================================
3421
3422 #define _CONFIG1 0x8007
3423 #define _CONFIG2 0x8008
3424
3425 //----------------------------- CONFIG1 Options -------------------------------
3426
3427 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
3428 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin.
3429 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin.
3430 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin.
3431 #define _WDTE_OFF 0x3FE7 // WDT disabled.
3432 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
3433 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
3434 #define _WDTE_ON 0x3FFF // WDT enabled.
3435 #define _PWRTE_ON 0x3FDF // PWRT enabled.
3436 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
3437 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
3438 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
3439 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
3440 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
3441 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
3442 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
3443 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
3444 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
3445 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
3446 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
3447
3448 //----------------------------- CONFIG2 Options -------------------------------
3449
3450 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control.
3451 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
3452 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control.
3453 #define _WRT_OFF 0x3FFF // Write protection off.
3454 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
3455 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
3456 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
3457 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
3458 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
3459 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
3460 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
3461 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
3462
3463 //==============================================================================
3464
3465 #define _DEVID1 0x8006
3466
3467 #define _IDLOC0 0x8000
3468 #define _IDLOC1 0x8001
3469 #define _IDLOC2 0x8002
3470 #define _IDLOC3 0x8003
3471
3472 //==============================================================================
3473
3474 #ifndef NO_BIT_DEFINES
3475
3476 #define ADON ADCON0bits.ADON // bit 0
3477 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
3478 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
3479 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
3480 #define CHS0 ADCON0bits.CHS0 // bit 2
3481 #define CHS1 ADCON0bits.CHS1 // bit 3
3482 #define CHS2 ADCON0bits.CHS2 // bit 4
3483 #define CHS3 ADCON0bits.CHS3 // bit 5
3484 #define CHS4 ADCON0bits.CHS4 // bit 6
3485
3486 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
3487 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
3488 #define ADFM ADCON1bits.ADFM // bit 7
3489
3490 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
3491 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
3492 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
3493 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
3494
3495 #define ANSA0 ANSELAbits.ANSA0 // bit 0
3496 #define ANSA1 ANSELAbits.ANSA1 // bit 1
3497 #define ANSA2 ANSELAbits.ANSA2 // bit 2
3498 #define ANSA4 ANSELAbits.ANSA4 // bit 4
3499
3500 #define NCO1SEL APFCONbits.NCO1SEL // bit 0
3501 #define CLC1SEL APFCONbits.CLC1SEL // bit 1
3502 #define T1GSEL APFCONbits.T1GSEL // bit 3
3503 #define CWG1ASEL APFCONbits.CWG1ASEL // bit 6
3504 #define CWG1BSEL APFCONbits.CWG1BSEL // bit 7
3505
3506 #define BORRDY BORCONbits.BORRDY // bit 0
3507 #define BORFS BORCONbits.BORFS // bit 6
3508 #define SBOREN BORCONbits.SBOREN // bit 7
3509
3510 #define BSR0 BSRbits.BSR0 // bit 0
3511 #define BSR1 BSRbits.BSR1 // bit 1
3512 #define BSR2 BSRbits.BSR2 // bit 2
3513 #define BSR3 BSRbits.BSR3 // bit 3
3514 #define BSR4 BSRbits.BSR4 // bit 4
3515
3516 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits
3517 #define LCMODE0 CLC1CONbits.LCMODE0 // bit 0, shadows bit in CLC1CONbits
3518 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits
3519 #define LCMODE1 CLC1CONbits.LCMODE1 // bit 1, shadows bit in CLC1CONbits
3520 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits
3521 #define LCMODE2 CLC1CONbits.LCMODE2 // bit 2, shadows bit in CLC1CONbits
3522 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits
3523 #define LCINTN CLC1CONbits.LCINTN // bit 3, shadows bit in CLC1CONbits
3524 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits
3525 #define LCINTP CLC1CONbits.LCINTP // bit 4, shadows bit in CLC1CONbits
3526 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits
3527 #define LCOUT CLC1CONbits.LCOUT // bit 5, shadows bit in CLC1CONbits
3528 #define LC1OE CLC1CONbits.LC1OE // bit 6, shadows bit in CLC1CONbits
3529 #define LCOE CLC1CONbits.LCOE // bit 6, shadows bit in CLC1CONbits
3530 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits
3531 #define LCEN CLC1CONbits.LCEN // bit 7, shadows bit in CLC1CONbits
3532
3533 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
3534 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
3535 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
3536 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
3537 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
3538 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
3539 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
3540 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
3541 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
3542 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
3543 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
3544 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
3545 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
3546 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
3547 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
3548 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
3549
3550 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
3551 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
3552 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
3553 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
3554 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
3555 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
3556 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
3557 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
3558 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
3559 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
3560 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
3561 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
3562 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
3563 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
3564 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
3565 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
3566
3567 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
3568 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
3569 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
3570 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
3571 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
3572 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
3573 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
3574 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
3575 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
3576 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
3577
3578 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
3579 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
3580 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
3581 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
3582 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
3583 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
3584 #define LC1D2S0 CLC1SEL0bits.LC1D2S0 // bit 4, shadows bit in CLC1SEL0bits
3585 #define D2S0 CLC1SEL0bits.D2S0 // bit 4, shadows bit in CLC1SEL0bits
3586 #define LC1D2S1 CLC1SEL0bits.LC1D2S1 // bit 5, shadows bit in CLC1SEL0bits
3587 #define D2S1 CLC1SEL0bits.D2S1 // bit 5, shadows bit in CLC1SEL0bits
3588 #define LC1D2S2 CLC1SEL0bits.LC1D2S2 // bit 6, shadows bit in CLC1SEL0bits
3589 #define D2S2 CLC1SEL0bits.D2S2 // bit 6, shadows bit in CLC1SEL0bits
3590
3591 #define LC1D3S0 CLC1SEL1bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL1bits
3592 #define D3S0 CLC1SEL1bits.D3S0 // bit 0, shadows bit in CLC1SEL1bits
3593 #define LC1D3S1 CLC1SEL1bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL1bits
3594 #define D3S1 CLC1SEL1bits.D3S1 // bit 1, shadows bit in CLC1SEL1bits
3595 #define LC1D3S2 CLC1SEL1bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL1bits
3596 #define D3S2 CLC1SEL1bits.D3S2 // bit 2, shadows bit in CLC1SEL1bits
3597 #define LC1D4S0 CLC1SEL1bits.LC1D4S0 // bit 4, shadows bit in CLC1SEL1bits
3598 #define D4S0 CLC1SEL1bits.D4S0 // bit 4, shadows bit in CLC1SEL1bits
3599 #define LC1D4S1 CLC1SEL1bits.LC1D4S1 // bit 5, shadows bit in CLC1SEL1bits
3600 #define D4S1 CLC1SEL1bits.D4S1 // bit 5, shadows bit in CLC1SEL1bits
3601 #define LC1D4S2 CLC1SEL1bits.LC1D4S2 // bit 6, shadows bit in CLC1SEL1bits
3602 #define D4S2 CLC1SEL1bits.D4S2 // bit 6, shadows bit in CLC1SEL1bits
3603
3604 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0
3605 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1
3606
3607 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
3608 #define C1HYS CM1CON0bits.C1HYS // bit 1
3609 #define C1SP CM1CON0bits.C1SP // bit 2
3610 #define C1POL CM1CON0bits.C1POL // bit 4
3611 #define C1OE CM1CON0bits.C1OE // bit 5
3612 #define C1OUT CM1CON0bits.C1OUT // bit 6
3613 #define C1ON CM1CON0bits.C1ON // bit 7
3614
3615 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
3616 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
3617 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
3618 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
3619 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
3620 #define C1INTN CM1CON1bits.C1INTN // bit 6
3621 #define C1INTP CM1CON1bits.C1INTP // bit 7
3622
3623 #define MC1OUT CMOUTbits.MC1OUT // bit 0
3624
3625 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
3626 #define G1POLA CWG1CON0bits.G1POLA // bit 3
3627 #define G1POLB CWG1CON0bits.G1POLB // bit 4
3628 #define G1OEA CWG1CON0bits.G1OEA // bit 5
3629 #define G1OEB CWG1CON0bits.G1OEB // bit 6
3630 #define G1EN CWG1CON0bits.G1EN // bit 7
3631
3632 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
3633 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
3634 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
3635 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
3636 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
3637 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
3638 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
3639
3640 #define G1ASDSCLC2 CWG1CON2bits.G1ASDSCLC2 // bit 0
3641 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1
3642 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
3643 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
3644 #define G1ASE CWG1CON2bits.G1ASE // bit 7
3645
3646 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
3647 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
3648 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
3649 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
3650 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
3651 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
3652
3653 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
3654 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
3655 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
3656 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
3657 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
3658 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
3659
3660 #define DACPSS DACCON0bits.DACPSS // bit 2
3661 #define DACOE2 DACCON0bits.DACOE2 // bit 4
3662 #define DACOE1 DACCON0bits.DACOE1 // bit 5
3663 #define DACEN DACCON0bits.DACEN // bit 7
3664
3665 #define DACR0 DACCON1bits.DACR0 // bit 0
3666 #define DACR1 DACCON1bits.DACR1 // bit 1
3667 #define DACR2 DACCON1bits.DACR2 // bit 2
3668 #define DACR3 DACCON1bits.DACR3 // bit 3
3669 #define DACR4 DACCON1bits.DACR4 // bit 4
3670
3671 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
3672 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
3673 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
3674 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
3675 #define TSRNG FVRCONbits.TSRNG // bit 4
3676 #define TSEN FVRCONbits.TSEN // bit 5
3677 #define FVRRDY FVRCONbits.FVRRDY // bit 6
3678 #define FVREN FVRCONbits.FVREN // bit 7
3679
3680 #define IOCIF INTCONbits.IOCIF // bit 0
3681 #define INTF INTCONbits.INTF // bit 1
3682 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
3683 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
3684 #define IOCIE INTCONbits.IOCIE // bit 3
3685 #define INTE INTCONbits.INTE // bit 4
3686 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
3687 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
3688 #define PEIE INTCONbits.PEIE // bit 6
3689 #define GIE INTCONbits.GIE // bit 7
3690
3691 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
3692 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
3693 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
3694 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
3695 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
3696 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
3697
3698 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
3699 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
3700 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
3701 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
3702 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
3703 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
3704
3705 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
3706 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
3707 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
3708 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
3709 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
3710 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
3711
3712 #define LATA0 LATAbits.LATA0 // bit 0
3713 #define LATA1 LATAbits.LATA1 // bit 1
3714 #define LATA2 LATAbits.LATA2 // bit 2
3715 #define LATA4 LATAbits.LATA4 // bit 4
3716 #define LATA5 LATAbits.LATA5 // bit 5
3717
3718 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
3719 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
3720 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
3721 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
3722 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
3723 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
3724 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
3725 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
3726
3727 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
3728 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
3729 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
3730 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
3731 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
3732 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
3733 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
3734 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
3735
3736 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
3737 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
3738 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
3739 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
3740
3741 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
3742 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
3743 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
3744 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
3745 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
3746
3747 #define N1PFM NCO1CONbits.N1PFM // bit 0
3748 #define N1POL NCO1CONbits.N1POL // bit 4
3749 #define N1OUT NCO1CONbits.N1OUT // bit 5
3750 #define N1OE NCO1CONbits.N1OE // bit 6
3751 #define N1EN NCO1CONbits.N1EN // bit 7
3752
3753 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
3754 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
3755 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
3756 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
3757 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
3758 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
3759 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
3760 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
3761
3762 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
3763 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
3764 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
3765 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
3766 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
3767 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
3768 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
3769 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
3770
3771 #define PS0 OPTION_REGbits.PS0 // bit 0
3772 #define PS1 OPTION_REGbits.PS1 // bit 1
3773 #define PS2 OPTION_REGbits.PS2 // bit 2
3774 #define PSA OPTION_REGbits.PSA // bit 3
3775 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
3776 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
3777 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
3778 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
3779 #define INTEDG OPTION_REGbits.INTEDG // bit 6
3780 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
3781
3782 #define SCS0 OSCCONbits.SCS0 // bit 0
3783 #define SCS1 OSCCONbits.SCS1 // bit 1
3784 #define IRCF0 OSCCONbits.IRCF0 // bit 3
3785 #define IRCF1 OSCCONbits.IRCF1 // bit 4
3786 #define IRCF2 OSCCONbits.IRCF2 // bit 5
3787 #define IRCF3 OSCCONbits.IRCF3 // bit 6
3788
3789 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
3790 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
3791 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
3792
3793 #define NOT_BOR PCONbits.NOT_BOR // bit 0
3794 #define NOT_POR PCONbits.NOT_POR // bit 1
3795 #define NOT_RI PCONbits.NOT_RI // bit 2
3796 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
3797 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
3798 #define STKUNF PCONbits.STKUNF // bit 6
3799 #define STKOVF PCONbits.STKOVF // bit 7
3800
3801 #define TMR1IE PIE1bits.TMR1IE // bit 0
3802 #define TMR2IE PIE1bits.TMR2IE // bit 1
3803 #define ADIE PIE1bits.ADIE // bit 6
3804 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
3805
3806 #define NCO1IE PIE2bits.NCO1IE // bit 2
3807 #define C1IE PIE2bits.C1IE // bit 5
3808
3809 #define CLC1IE PIE3bits.CLC1IE // bit 0
3810 #define CLC2IE PIE3bits.CLC2IE // bit 1
3811
3812 #define TMR1IF PIR1bits.TMR1IF // bit 0
3813 #define TMR2IF PIR1bits.TMR2IF // bit 1
3814 #define ADIF PIR1bits.ADIF // bit 6
3815 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
3816
3817 #define NCO1IF PIR2bits.NCO1IF // bit 2
3818 #define C1IF PIR2bits.C1IF // bit 5
3819
3820 #define CLC1IF PIR3bits.CLC1IF // bit 0
3821 #define CLC2IF PIR3bits.CLC2IF // bit 1
3822
3823 #define RD PMCON1bits.RD // bit 0
3824 #define WR PMCON1bits.WR // bit 1
3825 #define WREN PMCON1bits.WREN // bit 2
3826 #define WRERR PMCON1bits.WRERR // bit 3
3827 #define FREE PMCON1bits.FREE // bit 4
3828 #define LWLO PMCON1bits.LWLO // bit 5
3829 #define CFGS PMCON1bits.CFGS // bit 6
3830
3831 #define RA0 PORTAbits.RA0 // bit 0
3832 #define RA1 PORTAbits.RA1 // bit 1
3833 #define RA2 PORTAbits.RA2 // bit 2
3834 #define RA3 PORTAbits.RA3 // bit 3
3835 #define RA4 PORTAbits.RA4 // bit 4
3836 #define RA5 PORTAbits.RA5 // bit 5
3837
3838 #define PWM1POL PWM1CONbits.PWM1POL // bit 4
3839 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5
3840 #define PWM1OE PWM1CONbits.PWM1OE // bit 6
3841 #define PWM1EN PWM1CONbits.PWM1EN // bit 7
3842
3843 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
3844 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
3845 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
3846 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
3847 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
3848 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
3849 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
3850 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
3851
3852 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 6
3853 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 7
3854
3855 #define PWM2POL PWM2CONbits.PWM2POL // bit 4
3856 #define PWM2OUT PWM2CONbits.PWM2OUT // bit 5
3857 #define PWM2OE PWM2CONbits.PWM2OE // bit 6
3858 #define PWM2EN PWM2CONbits.PWM2EN // bit 7
3859
3860 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
3861 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
3862 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
3863 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
3864 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
3865 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
3866 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
3867 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
3868
3869 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 6
3870 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 7
3871
3872 #define PWM3POL PWM3CONbits.PWM3POL // bit 4
3873 #define PWM3OUT PWM3CONbits.PWM3OUT // bit 5
3874 #define PWM3OE PWM3CONbits.PWM3OE // bit 6
3875 #define PWM3EN PWM3CONbits.PWM3EN // bit 7
3876
3877 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
3878 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
3879 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
3880 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
3881 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
3882 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
3883 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
3884 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
3885
3886 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 6
3887 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 7
3888
3889 #define PWM4POL PWM4CONbits.PWM4POL // bit 4
3890 #define PWM4OUT PWM4CONbits.PWM4OUT // bit 5
3891 #define PWM4OE PWM4CONbits.PWM4OE // bit 6
3892 #define PWM4EN PWM4CONbits.PWM4EN // bit 7
3893
3894 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
3895 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
3896 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
3897 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
3898 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
3899 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
3900 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
3901 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
3902
3903 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 6
3904 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 7
3905
3906 #define C STATUSbits.C // bit 0
3907 #define DC STATUSbits.DC // bit 1
3908 #define Z STATUSbits.Z // bit 2
3909 #define NOT_PD STATUSbits.NOT_PD // bit 3
3910 #define NOT_TO STATUSbits.NOT_TO // bit 4
3911
3912 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
3913 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
3914 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
3915
3916 #define TMR1ON T1CONbits.TMR1ON // bit 0
3917 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
3918 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
3919 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
3920 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
3921 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
3922
3923 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
3924 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
3925 #define T1GVAL T1GCONbits.T1GVAL // bit 2
3926 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
3927 #define T1GSPM T1GCONbits.T1GSPM // bit 4
3928 #define T1GTM T1GCONbits.T1GTM // bit 5
3929 #define T1GPOL T1GCONbits.T1GPOL // bit 6
3930 #define TMR1GE T1GCONbits.TMR1GE // bit 7
3931
3932 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
3933 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
3934 #define TMR2ON T2CONbits.TMR2ON // bit 2
3935 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
3936 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
3937 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
3938 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
3939
3940 #define TRISA0 TRISAbits.TRISA0 // bit 0
3941 #define TRISA1 TRISAbits.TRISA1 // bit 1
3942 #define TRISA2 TRISAbits.TRISA2 // bit 2
3943 #define TRISA3 TRISAbits.TRISA3 // bit 3
3944 #define TRISA4 TRISAbits.TRISA4 // bit 4
3945 #define TRISA5 TRISAbits.TRISA5 // bit 5
3946
3947 #define SWDTEN WDTCONbits.SWDTEN // bit 0
3948 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
3949 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
3950 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
3951 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
3952 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
3953
3954 #define WPUA0 WPUAbits.WPUA0 // bit 0
3955 #define WPUA1 WPUAbits.WPUA1 // bit 1
3956 #define WPUA2 WPUAbits.WPUA2 // bit 2
3957 #define WPUA3 WPUAbits.WPUA3 // bit 3
3958 #define WPUA4 WPUAbits.WPUA4 // bit 4
3959 #define WPUA5 WPUAbits.WPUA5 // bit 5
3960
3961 #endif // #ifndef NO_BIT_DEFINES
3962
3963 #endif // #ifndef __PIC12LF1501_H__
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