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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic12lf1571.h
blob7fcd6925811e3f712da2463de4d7718e8869199d
1 /*
2 * This declarations of the PIC12LF1571 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:05 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC12LF1571_H__
26 #define __PIC12LF1571_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PIR1_ADDR 0x0011
52 #define PIR2_ADDR 0x0012
53 #define PIR3_ADDR 0x0013
54 #define TMR0_ADDR 0x0015
55 #define TMR1_ADDR 0x0016
56 #define TMR1L_ADDR 0x0016
57 #define TMR1H_ADDR 0x0017
58 #define T1CON_ADDR 0x0018
59 #define T1GCON_ADDR 0x0019
60 #define TMR2_ADDR 0x001A
61 #define PR2_ADDR 0x001B
62 #define T2CON_ADDR 0x001C
63 #define TRISA_ADDR 0x008C
64 #define PIE1_ADDR 0x0091
65 #define PIE2_ADDR 0x0092
66 #define PIE3_ADDR 0x0093
67 #define OPTION_REG_ADDR 0x0095
68 #define PCON_ADDR 0x0096
69 #define WDTCON_ADDR 0x0097
70 #define OSCTUNE_ADDR 0x0098
71 #define OSCCON_ADDR 0x0099
72 #define OSCSTAT_ADDR 0x009A
73 #define ADRES_ADDR 0x009B
74 #define ADRESL_ADDR 0x009B
75 #define ADRESH_ADDR 0x009C
76 #define ADCON0_ADDR 0x009D
77 #define ADCON1_ADDR 0x009E
78 #define ADCON2_ADDR 0x009F
79 #define LATA_ADDR 0x010C
80 #define CM1CON0_ADDR 0x0111
81 #define CM1CON1_ADDR 0x0112
82 #define CMOUT_ADDR 0x0115
83 #define BORCON_ADDR 0x0116
84 #define FVRCON_ADDR 0x0117
85 #define DACCON0_ADDR 0x0118
86 #define DACCON1_ADDR 0x0119
87 #define APFCON_ADDR 0x011D
88 #define APFCON0_ADDR 0x011D
89 #define ANSELA_ADDR 0x018C
90 #define PMADR_ADDR 0x0191
91 #define PMADRL_ADDR 0x0191
92 #define PMADRH_ADDR 0x0192
93 #define PMDAT_ADDR 0x0193
94 #define PMDATL_ADDR 0x0193
95 #define PMDATH_ADDR 0x0194
96 #define PMCON1_ADDR 0x0195
97 #define PMCON2_ADDR 0x0196
98 #define WPUA_ADDR 0x020C
99 #define ODCONA_ADDR 0x028C
100 #define SLRCONA_ADDR 0x030C
101 #define INLVLA_ADDR 0x038C
102 #define IOCAP_ADDR 0x0391
103 #define IOCAN_ADDR 0x0392
104 #define IOCAF_ADDR 0x0393
105 #define CWG1DBR_ADDR 0x0691
106 #define CWG1DBF_ADDR 0x0692
107 #define CWG1CON0_ADDR 0x0693
108 #define CWG1CON1_ADDR 0x0694
109 #define CWG1CON2_ADDR 0x0695
110 #define PWMEN_ADDR 0x0D8E
111 #define PWMLD_ADDR 0x0D8F
112 #define PWMOUT_ADDR 0x0D90
113 #define PWM1PH_ADDR 0x0D91
114 #define PWM1PHL_ADDR 0x0D91
115 #define PWM1PHH_ADDR 0x0D92
116 #define PWM1DC_ADDR 0x0D93
117 #define PWM1DCL_ADDR 0x0D93
118 #define PWM1DCH_ADDR 0x0D94
119 #define PWM1PR_ADDR 0x0D95
120 #define PWM1PRL_ADDR 0x0D95
121 #define PWM1PRH_ADDR 0x0D96
122 #define PWM1OF_ADDR 0x0D97
123 #define PWM1OFL_ADDR 0x0D97
124 #define PWM1OFH_ADDR 0x0D98
125 #define PWM1TMR_ADDR 0x0D99
126 #define PWM1TMRL_ADDR 0x0D99
127 #define PWM1TMRH_ADDR 0x0D9A
128 #define PWM1CON_ADDR 0x0D9B
129 #define PWM1INTCON_ADDR 0x0D9C
130 #define PWM1INTE_ADDR 0x0D9C
131 #define PWM1INTF_ADDR 0x0D9D
132 #define PWM1INTFLG_ADDR 0x0D9D
133 #define PWM1CLKCON_ADDR 0x0D9E
134 #define PWM1LDCON_ADDR 0x0D9F
135 #define PWM1OFCON_ADDR 0x0DA0
136 #define PWM2PH_ADDR 0x0DA1
137 #define PWM2PHL_ADDR 0x0DA1
138 #define PWM2PHH_ADDR 0x0DA2
139 #define PWM2DC_ADDR 0x0DA3
140 #define PWM2DCL_ADDR 0x0DA3
141 #define PWM2DCH_ADDR 0x0DA4
142 #define PWM2PR_ADDR 0x0DA5
143 #define PWM2PRL_ADDR 0x0DA5
144 #define PWM2PRH_ADDR 0x0DA6
145 #define PWM2OF_ADDR 0x0DA7
146 #define PWM2OFL_ADDR 0x0DA7
147 #define PWM2OFH_ADDR 0x0DA8
148 #define PWM2TMR_ADDR 0x0DA9
149 #define PWM2TMRL_ADDR 0x0DA9
150 #define PWM2TMRH_ADDR 0x0DAA
151 #define PWM2CON_ADDR 0x0DAB
152 #define PWM2INTCON_ADDR 0x0DAC
153 #define PWM2INTE_ADDR 0x0DAC
154 #define PWM2INTF_ADDR 0x0DAD
155 #define PWM2INTFLG_ADDR 0x0DAD
156 #define PWM2CLKCON_ADDR 0x0DAE
157 #define PWM2LDCON_ADDR 0x0DAF
158 #define PWM2OFCON_ADDR 0x0DB0
159 #define PWM3PH_ADDR 0x0DB1
160 #define PWM3PHL_ADDR 0x0DB1
161 #define PWM3PHH_ADDR 0x0DB2
162 #define PWM3DC_ADDR 0x0DB3
163 #define PWM3DCL_ADDR 0x0DB3
164 #define PWM3DCH_ADDR 0x0DB4
165 #define PWM3PR_ADDR 0x0DB5
166 #define PWM3PRL_ADDR 0x0DB5
167 #define PWM3PRH_ADDR 0x0DB6
168 #define PWM3OF_ADDR 0x0DB7
169 #define PWM3OFL_ADDR 0x0DB7
170 #define PWM3OFH_ADDR 0x0DB8
171 #define PWM3TMR_ADDR 0x0DB9
172 #define PWM3TMRL_ADDR 0x0DB9
173 #define PWM3TMRH_ADDR 0x0DBA
174 #define PWM3CON_ADDR 0x0DBB
175 #define PWM3INTCON_ADDR 0x0DBC
176 #define PWM3INTE_ADDR 0x0DBC
177 #define PWM3INTF_ADDR 0x0DBD
178 #define PWM3INTFLG_ADDR 0x0DBD
179 #define PWM3CLKCON_ADDR 0x0DBE
180 #define PWM3LDCON_ADDR 0x0DBF
181 #define PWM3OFCON_ADDR 0x0DC0
182 #define STATUS_SHAD_ADDR 0x0FE4
183 #define WREG_SHAD_ADDR 0x0FE5
184 #define BSR_SHAD_ADDR 0x0FE6
185 #define PCLATH_SHAD_ADDR 0x0FE7
186 #define FSR0L_SHAD_ADDR 0x0FE8
187 #define FSR0_SHAD_ADDR 0x0FE8
188 #define FSR0H_SHAD_ADDR 0x0FE9
189 #define FSR1L_SHAD_ADDR 0x0FEA
190 #define FSR1_SHAD_ADDR 0x0FEA
191 #define FSR1H_SHAD_ADDR 0x0FEB
192 #define STKPTR_ADDR 0x0FED
193 #define TOS_ADDR 0x0FEE
194 #define TOSL_ADDR 0x0FEE
195 #define TOSH_ADDR 0x0FEF
196
197 #endif // #ifndef NO_ADDR_DEFINES
198
199 //==============================================================================
200 //
201 // Register Definitions
202 //
203 //==============================================================================
204
205 extern __at(0x0000) __sfr INDF0;
206 extern __at(0x0001) __sfr INDF1;
207 extern __at(0x0002) __sfr PCL;
208
209 //==============================================================================
210 // STATUS Bits
211
212 extern __at(0x0003) __sfr STATUS;
213
214 typedef struct
215 {
216 unsigned C : 1;
217 unsigned DC : 1;
218 unsigned Z : 1;
219 unsigned NOT_PD : 1;
220 unsigned NOT_TO : 1;
221 unsigned : 1;
222 unsigned : 1;
223 unsigned : 1;
224 } __STATUSbits_t;
225
226 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
227
228 #define _C 0x01
229 #define _DC 0x02
230 #define _Z 0x04
231 #define _NOT_PD 0x08
232 #define _NOT_TO 0x10
233
234 //==============================================================================
235
236 extern __at(0x0004) __sfr FSR0;
237 extern __at(0x0004) __sfr FSR0L;
238 extern __at(0x0005) __sfr FSR0H;
239 extern __at(0x0006) __sfr FSR1;
240 extern __at(0x0006) __sfr FSR1L;
241 extern __at(0x0007) __sfr FSR1H;
242
243 //==============================================================================
244 // BSR Bits
245
246 extern __at(0x0008) __sfr BSR;
247
248 typedef union
249 {
250 struct
251 {
252 unsigned BSR0 : 1;
253 unsigned BSR1 : 1;
254 unsigned BSR2 : 1;
255 unsigned BSR3 : 1;
256 unsigned BSR4 : 1;
257 unsigned : 1;
258 unsigned : 1;
259 unsigned : 1;
260 };
261
262 struct
263 {
264 unsigned BSR : 5;
265 unsigned : 3;
266 };
267 } __BSRbits_t;
268
269 extern __at(0x0008) volatile __BSRbits_t BSRbits;
270
271 #define _BSR0 0x01
272 #define _BSR1 0x02
273 #define _BSR2 0x04
274 #define _BSR3 0x08
275 #define _BSR4 0x10
276
277 //==============================================================================
278
279 extern __at(0x0009) __sfr WREG;
280 extern __at(0x000A) __sfr PCLATH;
281
282 //==============================================================================
283 // INTCON Bits
284
285 extern __at(0x000B) __sfr INTCON;
286
287 typedef union
288 {
289 struct
290 {
291 unsigned IOCIF : 1;
292 unsigned INTF : 1;
293 unsigned TMR0IF : 1;
294 unsigned IOCIE : 1;
295 unsigned INTE : 1;
296 unsigned TMR0IE : 1;
297 unsigned PEIE : 1;
298 unsigned GIE : 1;
299 };
300
301 struct
302 {
303 unsigned : 1;
304 unsigned : 1;
305 unsigned T0IF : 1;
306 unsigned : 1;
307 unsigned : 1;
308 unsigned T0IE : 1;
309 unsigned : 1;
310 unsigned : 1;
311 };
312 } __INTCONbits_t;
313
314 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
315
316 #define _IOCIF 0x01
317 #define _INTF 0x02
318 #define _TMR0IF 0x04
319 #define _T0IF 0x04
320 #define _IOCIE 0x08
321 #define _INTE 0x10
322 #define _TMR0IE 0x20
323 #define _T0IE 0x20
324 #define _PEIE 0x40
325 #define _GIE 0x80
326
327 //==============================================================================
328
329
330 //==============================================================================
331 // PORTA Bits
332
333 extern __at(0x000C) __sfr PORTA;
334
335 typedef union
336 {
337 struct
338 {
339 unsigned RA0 : 1;
340 unsigned RA1 : 1;
341 unsigned RA2 : 1;
342 unsigned RA3 : 1;
343 unsigned RA4 : 1;
344 unsigned RA5 : 1;
345 unsigned : 1;
346 unsigned : 1;
347 };
348
349 struct
350 {
351 unsigned RA : 6;
352 unsigned : 2;
353 };
354 } __PORTAbits_t;
355
356 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
357
358 #define _RA0 0x01
359 #define _RA1 0x02
360 #define _RA2 0x04
361 #define _RA3 0x08
362 #define _RA4 0x10
363 #define _RA5 0x20
364
365 //==============================================================================
366
367
368 //==============================================================================
369 // PIR1 Bits
370
371 extern __at(0x0011) __sfr PIR1;
372
373 typedef struct
374 {
375 unsigned TMR1IF : 1;
376 unsigned TMR2IF : 1;
377 unsigned : 1;
378 unsigned : 1;
379 unsigned : 1;
380 unsigned : 1;
381 unsigned ADIF : 1;
382 unsigned TMR1GIF : 1;
383 } __PIR1bits_t;
384
385 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
386
387 #define _TMR1IF 0x01
388 #define _TMR2IF 0x02
389 #define _ADIF 0x40
390 #define _TMR1GIF 0x80
391
392 //==============================================================================
393
394
395 //==============================================================================
396 // PIR2 Bits
397
398 extern __at(0x0012) __sfr PIR2;
399
400 typedef struct
401 {
402 unsigned : 1;
403 unsigned : 1;
404 unsigned : 1;
405 unsigned : 1;
406 unsigned : 1;
407 unsigned C1IF : 1;
408 unsigned : 1;
409 unsigned : 1;
410 } __PIR2bits_t;
411
412 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
413
414 #define _C1IF 0x20
415
416 //==============================================================================
417
418
419 //==============================================================================
420 // PIR3 Bits
421
422 extern __at(0x0013) __sfr PIR3;
423
424 typedef struct
425 {
426 unsigned : 1;
427 unsigned : 1;
428 unsigned : 1;
429 unsigned : 1;
430 unsigned PWM1IF : 1;
431 unsigned PWM2IF : 1;
432 unsigned PWM3IF : 1;
433 unsigned : 1;
434 } __PIR3bits_t;
435
436 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
437
438 #define _PWM1IF 0x10
439 #define _PWM2IF 0x20
440 #define _PWM3IF 0x40
441
442 //==============================================================================
443
444 extern __at(0x0015) __sfr TMR0;
445 extern __at(0x0016) __sfr TMR1;
446 extern __at(0x0016) __sfr TMR1L;
447 extern __at(0x0017) __sfr TMR1H;
448
449 //==============================================================================
450 // T1CON Bits
451
452 extern __at(0x0018) __sfr T1CON;
453
454 typedef union
455 {
456 struct
457 {
458 unsigned TMR1ON : 1;
459 unsigned : 1;
460 unsigned NOT_T1SYNC : 1;
461 unsigned : 1;
462 unsigned T1CKPS0 : 1;
463 unsigned T1CKPS1 : 1;
464 unsigned TMR1CS0 : 1;
465 unsigned TMR1CS1 : 1;
466 };
467
468 struct
469 {
470 unsigned : 4;
471 unsigned T1CKPS : 2;
472 unsigned : 2;
473 };
474
475 struct
476 {
477 unsigned : 6;
478 unsigned TMR1CS : 2;
479 };
480 } __T1CONbits_t;
481
482 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
483
484 #define _TMR1ON 0x01
485 #define _NOT_T1SYNC 0x04
486 #define _T1CKPS0 0x10
487 #define _T1CKPS1 0x20
488 #define _TMR1CS0 0x40
489 #define _TMR1CS1 0x80
490
491 //==============================================================================
492
493
494 //==============================================================================
495 // T1GCON Bits
496
497 extern __at(0x0019) __sfr T1GCON;
498
499 typedef union
500 {
501 struct
502 {
503 unsigned T1GSS0 : 1;
504 unsigned T1GSS1 : 1;
505 unsigned T1GVAL : 1;
506 unsigned T1GGO_NOT_DONE : 1;
507 unsigned T1GSPM : 1;
508 unsigned T1GTM : 1;
509 unsigned T1GPOL : 1;
510 unsigned TMR1GE : 1;
511 };
512
513 struct
514 {
515 unsigned : 1;
516 unsigned : 1;
517 unsigned : 1;
518 unsigned T1GGO : 1;
519 unsigned : 1;
520 unsigned : 1;
521 unsigned : 1;
522 unsigned : 1;
523 };
524
525 struct
526 {
527 unsigned T1GSS : 2;
528 unsigned : 6;
529 };
530 } __T1GCONbits_t;
531
532 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
533
534 #define _T1GSS0 0x01
535 #define _T1GSS1 0x02
536 #define _T1GVAL 0x04
537 #define _T1GGO_NOT_DONE 0x08
538 #define _T1GGO 0x08
539 #define _T1GSPM 0x10
540 #define _T1GTM 0x20
541 #define _T1GPOL 0x40
542 #define _TMR1GE 0x80
543
544 //==============================================================================
545
546 extern __at(0x001A) __sfr TMR2;
547 extern __at(0x001B) __sfr PR2;
548
549 //==============================================================================
550 // T2CON Bits
551
552 extern __at(0x001C) __sfr T2CON;
553
554 typedef union
555 {
556 struct
557 {
558 unsigned T2CKPS0 : 1;
559 unsigned T2CKPS1 : 1;
560 unsigned TMR2ON : 1;
561 unsigned T2OUTPS0 : 1;
562 unsigned T2OUTPS1 : 1;
563 unsigned T2OUTPS2 : 1;
564 unsigned T2OUTPS3 : 1;
565 unsigned : 1;
566 };
567
568 struct
569 {
570 unsigned T2CKPS : 2;
571 unsigned : 6;
572 };
573
574 struct
575 {
576 unsigned : 3;
577 unsigned T2OUTPS : 4;
578 unsigned : 1;
579 };
580 } __T2CONbits_t;
581
582 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
583
584 #define _T2CKPS0 0x01
585 #define _T2CKPS1 0x02
586 #define _TMR2ON 0x04
587 #define _T2OUTPS0 0x08
588 #define _T2OUTPS1 0x10
589 #define _T2OUTPS2 0x20
590 #define _T2OUTPS3 0x40
591
592 //==============================================================================
593
594
595 //==============================================================================
596 // TRISA Bits
597
598 extern __at(0x008C) __sfr TRISA;
599
600 typedef union
601 {
602 struct
603 {
604 unsigned TRISA0 : 1;
605 unsigned TRISA1 : 1;
606 unsigned TRISA2 : 1;
607 unsigned TRISA3 : 1;
608 unsigned TRISA4 : 1;
609 unsigned TRISA5 : 1;
610 unsigned : 1;
611 unsigned : 1;
612 };
613
614 struct
615 {
616 unsigned TRISA : 6;
617 unsigned : 2;
618 };
619 } __TRISAbits_t;
620
621 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
622
623 #define _TRISA0 0x01
624 #define _TRISA1 0x02
625 #define _TRISA2 0x04
626 #define _TRISA3 0x08
627 #define _TRISA4 0x10
628 #define _TRISA5 0x20
629
630 //==============================================================================
631
632
633 //==============================================================================
634 // PIE1 Bits
635
636 extern __at(0x0091) __sfr PIE1;
637
638 typedef struct
639 {
640 unsigned TMR1IE : 1;
641 unsigned TMR2IE : 1;
642 unsigned : 1;
643 unsigned : 1;
644 unsigned : 1;
645 unsigned : 1;
646 unsigned ADIE : 1;
647 unsigned TMR1GIE : 1;
648 } __PIE1bits_t;
649
650 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
651
652 #define _TMR1IE 0x01
653 #define _TMR2IE 0x02
654 #define _ADIE 0x40
655 #define _TMR1GIE 0x80
656
657 //==============================================================================
658
659
660 //==============================================================================
661 // PIE2 Bits
662
663 extern __at(0x0092) __sfr PIE2;
664
665 typedef struct
666 {
667 unsigned : 1;
668 unsigned : 1;
669 unsigned : 1;
670 unsigned : 1;
671 unsigned : 1;
672 unsigned C1IE : 1;
673 unsigned : 1;
674 unsigned : 1;
675 } __PIE2bits_t;
676
677 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
678
679 #define _C1IE 0x20
680
681 //==============================================================================
682
683
684 //==============================================================================
685 // PIE3 Bits
686
687 extern __at(0x0093) __sfr PIE3;
688
689 typedef struct
690 {
691 unsigned : 1;
692 unsigned : 1;
693 unsigned : 1;
694 unsigned : 1;
695 unsigned PWM1IE : 1;
696 unsigned PWM2IE : 1;
697 unsigned PWM3IE : 1;
698 unsigned : 1;
699 } __PIE3bits_t;
700
701 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
702
703 #define _PWM1IE 0x10
704 #define _PWM2IE 0x20
705 #define _PWM3IE 0x40
706
707 //==============================================================================
708
709
710 //==============================================================================
711 // OPTION_REG Bits
712
713 extern __at(0x0095) __sfr OPTION_REG;
714
715 typedef union
716 {
717 struct
718 {
719 unsigned PS0 : 1;
720 unsigned PS1 : 1;
721 unsigned PS2 : 1;
722 unsigned PSA : 1;
723 unsigned TMR0SE : 1;
724 unsigned TMR0CS : 1;
725 unsigned INTEDG : 1;
726 unsigned NOT_WPUEN : 1;
727 };
728
729 struct
730 {
731 unsigned : 1;
732 unsigned : 1;
733 unsigned : 1;
734 unsigned : 1;
735 unsigned T0SE : 1;
736 unsigned T0CS : 1;
737 unsigned : 1;
738 unsigned : 1;
739 };
740
741 struct
742 {
743 unsigned PS : 3;
744 unsigned : 5;
745 };
746 } __OPTION_REGbits_t;
747
748 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
749
750 #define _PS0 0x01
751 #define _PS1 0x02
752 #define _PS2 0x04
753 #define _PSA 0x08
754 #define _TMR0SE 0x10
755 #define _T0SE 0x10
756 #define _TMR0CS 0x20
757 #define _T0CS 0x20
758 #define _INTEDG 0x40
759 #define _NOT_WPUEN 0x80
760
761 //==============================================================================
762
763
764 //==============================================================================
765 // PCON Bits
766
767 extern __at(0x0096) __sfr PCON;
768
769 typedef struct
770 {
771 unsigned NOT_BOR : 1;
772 unsigned NOT_POR : 1;
773 unsigned NOT_RI : 1;
774 unsigned NOT_RMCLR : 1;
775 unsigned NOT_RWDT : 1;
776 unsigned : 1;
777 unsigned STKUNF : 1;
778 unsigned STKOVF : 1;
779 } __PCONbits_t;
780
781 extern __at(0x0096) volatile __PCONbits_t PCONbits;
782
783 #define _NOT_BOR 0x01
784 #define _NOT_POR 0x02
785 #define _NOT_RI 0x04
786 #define _NOT_RMCLR 0x08
787 #define _NOT_RWDT 0x10
788 #define _STKUNF 0x40
789 #define _STKOVF 0x80
790
791 //==============================================================================
792
793
794 //==============================================================================
795 // WDTCON Bits
796
797 extern __at(0x0097) __sfr WDTCON;
798
799 typedef union
800 {
801 struct
802 {
803 unsigned SWDTEN : 1;
804 unsigned WDTPS0 : 1;
805 unsigned WDTPS1 : 1;
806 unsigned WDTPS2 : 1;
807 unsigned WDTPS3 : 1;
808 unsigned WDTPS4 : 1;
809 unsigned : 1;
810 unsigned : 1;
811 };
812
813 struct
814 {
815 unsigned : 1;
816 unsigned WDTPS : 5;
817 unsigned : 2;
818 };
819 } __WDTCONbits_t;
820
821 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
822
823 #define _SWDTEN 0x01
824 #define _WDTPS0 0x02
825 #define _WDTPS1 0x04
826 #define _WDTPS2 0x08
827 #define _WDTPS3 0x10
828 #define _WDTPS4 0x20
829
830 //==============================================================================
831
832
833 //==============================================================================
834 // OSCTUNE Bits
835
836 extern __at(0x0098) __sfr OSCTUNE;
837
838 typedef union
839 {
840 struct
841 {
842 unsigned TUN0 : 1;
843 unsigned TUN1 : 1;
844 unsigned TUN2 : 1;
845 unsigned TUN3 : 1;
846 unsigned TUN4 : 1;
847 unsigned TUN5 : 1;
848 unsigned : 1;
849 unsigned : 1;
850 };
851
852 struct
853 {
854 unsigned TUN : 6;
855 unsigned : 2;
856 };
857 } __OSCTUNEbits_t;
858
859 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
860
861 #define _TUN0 0x01
862 #define _TUN1 0x02
863 #define _TUN2 0x04
864 #define _TUN3 0x08
865 #define _TUN4 0x10
866 #define _TUN5 0x20
867
868 //==============================================================================
869
870
871 //==============================================================================
872 // OSCCON Bits
873
874 extern __at(0x0099) __sfr OSCCON;
875
876 typedef union
877 {
878 struct
879 {
880 unsigned SCS0 : 1;
881 unsigned SCS1 : 1;
882 unsigned : 1;
883 unsigned IRCF0 : 1;
884 unsigned IRCF1 : 1;
885 unsigned IRCF2 : 1;
886 unsigned IRCF3 : 1;
887 unsigned SPLLEN : 1;
888 };
889
890 struct
891 {
892 unsigned SCS : 2;
893 unsigned : 6;
894 };
895
896 struct
897 {
898 unsigned : 3;
899 unsigned IRCF : 4;
900 unsigned : 1;
901 };
902 } __OSCCONbits_t;
903
904 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
905
906 #define _SCS0 0x01
907 #define _SCS1 0x02
908 #define _IRCF0 0x08
909 #define _IRCF1 0x10
910 #define _IRCF2 0x20
911 #define _IRCF3 0x40
912 #define _SPLLEN 0x80
913
914 //==============================================================================
915
916
917 //==============================================================================
918 // OSCSTAT Bits
919
920 extern __at(0x009A) __sfr OSCSTAT;
921
922 typedef struct
923 {
924 unsigned HFIOFS : 1;
925 unsigned LFIOFR : 1;
926 unsigned MFIOFR : 1;
927 unsigned HFIOFL : 1;
928 unsigned HFIOFR : 1;
929 unsigned OSTS : 1;
930 unsigned PLLR : 1;
931 unsigned : 1;
932 } __OSCSTATbits_t;
933
934 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
935
936 #define _HFIOFS 0x01
937 #define _LFIOFR 0x02
938 #define _MFIOFR 0x04
939 #define _HFIOFL 0x08
940 #define _HFIOFR 0x10
941 #define _OSTS 0x20
942 #define _PLLR 0x40
943
944 //==============================================================================
945
946 extern __at(0x009B) __sfr ADRES;
947 extern __at(0x009B) __sfr ADRESL;
948 extern __at(0x009C) __sfr ADRESH;
949
950 //==============================================================================
951 // ADCON0 Bits
952
953 extern __at(0x009D) __sfr ADCON0;
954
955 typedef union
956 {
957 struct
958 {
959 unsigned ADON : 1;
960 unsigned GO_NOT_DONE : 1;
961 unsigned CHS0 : 1;
962 unsigned CHS1 : 1;
963 unsigned CHS2 : 1;
964 unsigned CHS3 : 1;
965 unsigned CHS4 : 1;
966 unsigned : 1;
967 };
968
969 struct
970 {
971 unsigned : 1;
972 unsigned ADGO : 1;
973 unsigned : 1;
974 unsigned : 1;
975 unsigned : 1;
976 unsigned : 1;
977 unsigned : 1;
978 unsigned : 1;
979 };
980
981 struct
982 {
983 unsigned : 1;
984 unsigned GO : 1;
985 unsigned : 1;
986 unsigned : 1;
987 unsigned : 1;
988 unsigned : 1;
989 unsigned : 1;
990 unsigned : 1;
991 };
992
993 struct
994 {
995 unsigned : 1;
996 unsigned NOT_DONE : 1;
997 unsigned : 1;
998 unsigned : 1;
999 unsigned : 1;
1000 unsigned : 1;
1001 unsigned : 1;
1002 unsigned : 1;
1003 };
1004
1005 struct
1006 {
1007 unsigned : 2;
1008 unsigned CHS : 5;
1009 unsigned : 1;
1010 };
1011 } __ADCON0bits_t;
1012
1013 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
1014
1015 #define _ADON 0x01
1016 #define _GO_NOT_DONE 0x02
1017 #define _ADGO 0x02
1018 #define _GO 0x02
1019 #define _NOT_DONE 0x02
1020 #define _CHS0 0x04
1021 #define _CHS1 0x08
1022 #define _CHS2 0x10
1023 #define _CHS3 0x20
1024 #define _CHS4 0x40
1025
1026 //==============================================================================
1027
1028
1029 //==============================================================================
1030 // ADCON1 Bits
1031
1032 extern __at(0x009E) __sfr ADCON1;
1033
1034 typedef union
1035 {
1036 struct
1037 {
1038 unsigned ADPREF0 : 1;
1039 unsigned ADPREF1 : 1;
1040 unsigned : 1;
1041 unsigned : 1;
1042 unsigned ADCS0 : 1;
1043 unsigned ADCS1 : 1;
1044 unsigned ADCS2 : 1;
1045 unsigned ADFM : 1;
1046 };
1047
1048 struct
1049 {
1050 unsigned ADPREF : 2;
1051 unsigned : 6;
1052 };
1053
1054 struct
1055 {
1056 unsigned : 4;
1057 unsigned ADCS : 3;
1058 unsigned : 1;
1059 };
1060 } __ADCON1bits_t;
1061
1062 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1063
1064 #define _ADPREF0 0x01
1065 #define _ADPREF1 0x02
1066 #define _ADCS0 0x10
1067 #define _ADCS1 0x20
1068 #define _ADCS2 0x40
1069 #define _ADFM 0x80
1070
1071 //==============================================================================
1072
1073
1074 //==============================================================================
1075 // ADCON2 Bits
1076
1077 extern __at(0x009F) __sfr ADCON2;
1078
1079 typedef union
1080 {
1081 struct
1082 {
1083 unsigned : 1;
1084 unsigned : 1;
1085 unsigned : 1;
1086 unsigned : 1;
1087 unsigned TRIGSEL0 : 1;
1088 unsigned TRIGSEL1 : 1;
1089 unsigned TRIGSEL2 : 1;
1090 unsigned TRIGSEL3 : 1;
1091 };
1092
1093 struct
1094 {
1095 unsigned : 4;
1096 unsigned TRIGSEL : 4;
1097 };
1098 } __ADCON2bits_t;
1099
1100 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1101
1102 #define _TRIGSEL0 0x10
1103 #define _TRIGSEL1 0x20
1104 #define _TRIGSEL2 0x40
1105 #define _TRIGSEL3 0x80
1106
1107 //==============================================================================
1108
1109
1110 //==============================================================================
1111 // LATA Bits
1112
1113 extern __at(0x010C) __sfr LATA;
1114
1115 typedef struct
1116 {
1117 unsigned LATA0 : 1;
1118 unsigned LATA1 : 1;
1119 unsigned LATA2 : 1;
1120 unsigned : 1;
1121 unsigned LATA4 : 1;
1122 unsigned LATA5 : 1;
1123 unsigned : 1;
1124 unsigned : 1;
1125 } __LATAbits_t;
1126
1127 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1128
1129 #define _LATA0 0x01
1130 #define _LATA1 0x02
1131 #define _LATA2 0x04
1132 #define _LATA4 0x10
1133 #define _LATA5 0x20
1134
1135 //==============================================================================
1136
1137
1138 //==============================================================================
1139 // CM1CON0 Bits
1140
1141 extern __at(0x0111) __sfr CM1CON0;
1142
1143 typedef struct
1144 {
1145 unsigned C1SYNC : 1;
1146 unsigned C1HYS : 1;
1147 unsigned C1SP : 1;
1148 unsigned : 1;
1149 unsigned C1POL : 1;
1150 unsigned C1OE : 1;
1151 unsigned C1OUT : 1;
1152 unsigned C1ON : 1;
1153 } __CM1CON0bits_t;
1154
1155 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1156
1157 #define _C1SYNC 0x01
1158 #define _C1HYS 0x02
1159 #define _C1SP 0x04
1160 #define _C1POL 0x10
1161 #define _C1OE 0x20
1162 #define _C1OUT 0x40
1163 #define _C1ON 0x80
1164
1165 //==============================================================================
1166
1167
1168 //==============================================================================
1169 // CM1CON1 Bits
1170
1171 extern __at(0x0112) __sfr CM1CON1;
1172
1173 typedef union
1174 {
1175 struct
1176 {
1177 unsigned C1NCH0 : 1;
1178 unsigned C1NCH1 : 1;
1179 unsigned C1NCH2 : 1;
1180 unsigned : 1;
1181 unsigned C1PCH0 : 1;
1182 unsigned C1PCH1 : 1;
1183 unsigned C1INTN : 1;
1184 unsigned C1INTP : 1;
1185 };
1186
1187 struct
1188 {
1189 unsigned C1NCH : 3;
1190 unsigned : 5;
1191 };
1192
1193 struct
1194 {
1195 unsigned : 4;
1196 unsigned C1PCH : 2;
1197 unsigned : 2;
1198 };
1199 } __CM1CON1bits_t;
1200
1201 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1202
1203 #define _C1NCH0 0x01
1204 #define _C1NCH1 0x02
1205 #define _C1NCH2 0x04
1206 #define _C1PCH0 0x10
1207 #define _C1PCH1 0x20
1208 #define _C1INTN 0x40
1209 #define _C1INTP 0x80
1210
1211 //==============================================================================
1212
1213
1214 //==============================================================================
1215 // CMOUT Bits
1216
1217 extern __at(0x0115) __sfr CMOUT;
1218
1219 typedef struct
1220 {
1221 unsigned MC1OUT : 1;
1222 unsigned : 1;
1223 unsigned : 1;
1224 unsigned : 1;
1225 unsigned : 1;
1226 unsigned : 1;
1227 unsigned : 1;
1228 unsigned : 1;
1229 } __CMOUTbits_t;
1230
1231 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1232
1233 #define _MC1OUT 0x01
1234
1235 //==============================================================================
1236
1237
1238 //==============================================================================
1239 // BORCON Bits
1240
1241 extern __at(0x0116) __sfr BORCON;
1242
1243 typedef struct
1244 {
1245 unsigned BORRDY : 1;
1246 unsigned : 1;
1247 unsigned : 1;
1248 unsigned : 1;
1249 unsigned : 1;
1250 unsigned : 1;
1251 unsigned BORFS : 1;
1252 unsigned SBOREN : 1;
1253 } __BORCONbits_t;
1254
1255 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1256
1257 #define _BORRDY 0x01
1258 #define _BORFS 0x40
1259 #define _SBOREN 0x80
1260
1261 //==============================================================================
1262
1263
1264 //==============================================================================
1265 // FVRCON Bits
1266
1267 extern __at(0x0117) __sfr FVRCON;
1268
1269 typedef union
1270 {
1271 struct
1272 {
1273 unsigned ADFVR0 : 1;
1274 unsigned ADFVR1 : 1;
1275 unsigned CDAFVR0 : 1;
1276 unsigned CDAFVR1 : 1;
1277 unsigned TSRNG : 1;
1278 unsigned TSEN : 1;
1279 unsigned FVRRDY : 1;
1280 unsigned FVREN : 1;
1281 };
1282
1283 struct
1284 {
1285 unsigned ADFVR : 2;
1286 unsigned : 6;
1287 };
1288
1289 struct
1290 {
1291 unsigned : 2;
1292 unsigned CDAFVR : 2;
1293 unsigned : 4;
1294 };
1295 } __FVRCONbits_t;
1296
1297 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1298
1299 #define _ADFVR0 0x01
1300 #define _ADFVR1 0x02
1301 #define _CDAFVR0 0x04
1302 #define _CDAFVR1 0x08
1303 #define _TSRNG 0x10
1304 #define _TSEN 0x20
1305 #define _FVRRDY 0x40
1306 #define _FVREN 0x80
1307
1308 //==============================================================================
1309
1310
1311 //==============================================================================
1312 // DACCON0 Bits
1313
1314 extern __at(0x0118) __sfr DACCON0;
1315
1316 typedef union
1317 {
1318 struct
1319 {
1320 unsigned : 1;
1321 unsigned : 1;
1322 unsigned DACPSS0 : 1;
1323 unsigned DACPSS1 : 1;
1324 unsigned : 1;
1325 unsigned DACOE : 1;
1326 unsigned DACLPS : 1;
1327 unsigned DACEN : 1;
1328 };
1329
1330 struct
1331 {
1332 unsigned : 2;
1333 unsigned DACPSS : 2;
1334 unsigned : 4;
1335 };
1336 } __DACCON0bits_t;
1337
1338 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1339
1340 #define _DACPSS0 0x04
1341 #define _DACPSS1 0x08
1342 #define _DACOE 0x20
1343 #define _DACLPS 0x40
1344 #define _DACEN 0x80
1345
1346 //==============================================================================
1347
1348
1349 //==============================================================================
1350 // DACCON1 Bits
1351
1352 extern __at(0x0119) __sfr DACCON1;
1353
1354 typedef union
1355 {
1356 struct
1357 {
1358 unsigned DACR0 : 1;
1359 unsigned DACR1 : 1;
1360 unsigned DACR2 : 1;
1361 unsigned DACR3 : 1;
1362 unsigned DACR4 : 1;
1363 unsigned : 1;
1364 unsigned : 1;
1365 unsigned : 1;
1366 };
1367
1368 struct
1369 {
1370 unsigned DACR : 5;
1371 unsigned : 3;
1372 };
1373 } __DACCON1bits_t;
1374
1375 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1376
1377 #define _DACR0 0x01
1378 #define _DACR1 0x02
1379 #define _DACR2 0x04
1380 #define _DACR3 0x08
1381 #define _DACR4 0x10
1382
1383 //==============================================================================
1384
1385
1386 //==============================================================================
1387 // APFCON Bits
1388
1389 extern __at(0x011D) __sfr APFCON;
1390
1391 typedef struct
1392 {
1393 unsigned P1SEL : 1;
1394 unsigned P2SEL : 1;
1395 unsigned : 1;
1396 unsigned T1GSEL : 1;
1397 unsigned : 1;
1398 unsigned CWGBSEL : 1;
1399 unsigned CWGASEL : 1;
1400 unsigned : 1;
1401 } __APFCONbits_t;
1402
1403 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1404
1405 #define _P1SEL 0x01
1406 #define _P2SEL 0x02
1407 #define _T1GSEL 0x08
1408 #define _CWGBSEL 0x20
1409 #define _CWGASEL 0x40
1410
1411 //==============================================================================
1412
1413
1414 //==============================================================================
1415 // APFCON0 Bits
1416
1417 extern __at(0x011D) __sfr APFCON0;
1418
1419 typedef struct
1420 {
1421 unsigned P1SEL : 1;
1422 unsigned P2SEL : 1;
1423 unsigned : 1;
1424 unsigned T1GSEL : 1;
1425 unsigned : 1;
1426 unsigned CWGBSEL : 1;
1427 unsigned CWGASEL : 1;
1428 unsigned : 1;
1429 } __APFCON0bits_t;
1430
1431 extern __at(0x011D) volatile __APFCON0bits_t APFCON0bits;
1432
1433 #define _APFCON0_P1SEL 0x01
1434 #define _APFCON0_P2SEL 0x02
1435 #define _APFCON0_T1GSEL 0x08
1436 #define _APFCON0_CWGBSEL 0x20
1437 #define _APFCON0_CWGASEL 0x40
1438
1439 //==============================================================================
1440
1441
1442 //==============================================================================
1443 // ANSELA Bits
1444
1445 extern __at(0x018C) __sfr ANSELA;
1446
1447 typedef struct
1448 {
1449 unsigned ANSA0 : 1;
1450 unsigned ANSA1 : 1;
1451 unsigned ANSA2 : 1;
1452 unsigned : 1;
1453 unsigned ANSA4 : 1;
1454 unsigned : 1;
1455 unsigned : 1;
1456 unsigned : 1;
1457 } __ANSELAbits_t;
1458
1459 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1460
1461 #define _ANSA0 0x01
1462 #define _ANSA1 0x02
1463 #define _ANSA2 0x04
1464 #define _ANSA4 0x10
1465
1466 //==============================================================================
1467
1468 extern __at(0x0191) __sfr PMADR;
1469 extern __at(0x0191) __sfr PMADRL;
1470 extern __at(0x0192) __sfr PMADRH;
1471 extern __at(0x0193) __sfr PMDAT;
1472 extern __at(0x0193) __sfr PMDATL;
1473 extern __at(0x0194) __sfr PMDATH;
1474
1475 //==============================================================================
1476 // PMCON1 Bits
1477
1478 extern __at(0x0195) __sfr PMCON1;
1479
1480 typedef struct
1481 {
1482 unsigned RD : 1;
1483 unsigned WR : 1;
1484 unsigned WREN : 1;
1485 unsigned WRERR : 1;
1486 unsigned FREE : 1;
1487 unsigned LWLO : 1;
1488 unsigned CFGS : 1;
1489 unsigned : 1;
1490 } __PMCON1bits_t;
1491
1492 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1493
1494 #define _RD 0x01
1495 #define _WR 0x02
1496 #define _WREN 0x04
1497 #define _WRERR 0x08
1498 #define _FREE 0x10
1499 #define _LWLO 0x20
1500 #define _CFGS 0x40
1501
1502 //==============================================================================
1503
1504 extern __at(0x0196) __sfr PMCON2;
1505
1506 //==============================================================================
1507 // WPUA Bits
1508
1509 extern __at(0x020C) __sfr WPUA;
1510
1511 typedef union
1512 {
1513 struct
1514 {
1515 unsigned WPUA0 : 1;
1516 unsigned WPUA1 : 1;
1517 unsigned WPUA2 : 1;
1518 unsigned WPUA3 : 1;
1519 unsigned WPUA4 : 1;
1520 unsigned WPUA5 : 1;
1521 unsigned : 1;
1522 unsigned : 1;
1523 };
1524
1525 struct
1526 {
1527 unsigned WPUA : 6;
1528 unsigned : 2;
1529 };
1530 } __WPUAbits_t;
1531
1532 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1533
1534 #define _WPUA0 0x01
1535 #define _WPUA1 0x02
1536 #define _WPUA2 0x04
1537 #define _WPUA3 0x08
1538 #define _WPUA4 0x10
1539 #define _WPUA5 0x20
1540
1541 //==============================================================================
1542
1543
1544 //==============================================================================
1545 // ODCONA Bits
1546
1547 extern __at(0x028C) __sfr ODCONA;
1548
1549 typedef struct
1550 {
1551 unsigned ODA0 : 1;
1552 unsigned ODA1 : 1;
1553 unsigned ODA2 : 1;
1554 unsigned : 1;
1555 unsigned ODA4 : 1;
1556 unsigned ODA5 : 1;
1557 unsigned : 1;
1558 unsigned : 1;
1559 } __ODCONAbits_t;
1560
1561 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits;
1562
1563 #define _ODA0 0x01
1564 #define _ODA1 0x02
1565 #define _ODA2 0x04
1566 #define _ODA4 0x10
1567 #define _ODA5 0x20
1568
1569 //==============================================================================
1570
1571
1572 //==============================================================================
1573 // SLRCONA Bits
1574
1575 extern __at(0x030C) __sfr SLRCONA;
1576
1577 typedef struct
1578 {
1579 unsigned SLRA0 : 1;
1580 unsigned SLRA1 : 1;
1581 unsigned SLRA2 : 1;
1582 unsigned : 1;
1583 unsigned SLRA4 : 1;
1584 unsigned SLRA5 : 1;
1585 unsigned : 1;
1586 unsigned : 1;
1587 } __SLRCONAbits_t;
1588
1589 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits;
1590
1591 #define _SLRA0 0x01
1592 #define _SLRA1 0x02
1593 #define _SLRA2 0x04
1594 #define _SLRA4 0x10
1595 #define _SLRA5 0x20
1596
1597 //==============================================================================
1598
1599
1600 //==============================================================================
1601 // INLVLA Bits
1602
1603 extern __at(0x038C) __sfr INLVLA;
1604
1605 typedef union
1606 {
1607 struct
1608 {
1609 unsigned INLVLA0 : 1;
1610 unsigned INLVLA1 : 1;
1611 unsigned INLVLA2 : 1;
1612 unsigned INLVLA3 : 1;
1613 unsigned INLVLA4 : 1;
1614 unsigned INLVLA5 : 1;
1615 unsigned : 1;
1616 unsigned : 1;
1617 };
1618
1619 struct
1620 {
1621 unsigned INLVLA : 6;
1622 unsigned : 2;
1623 };
1624 } __INLVLAbits_t;
1625
1626 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits;
1627
1628 #define _INLVLA0 0x01
1629 #define _INLVLA1 0x02
1630 #define _INLVLA2 0x04
1631 #define _INLVLA3 0x08
1632 #define _INLVLA4 0x10
1633 #define _INLVLA5 0x20
1634
1635 //==============================================================================
1636
1637
1638 //==============================================================================
1639 // IOCAP Bits
1640
1641 extern __at(0x0391) __sfr IOCAP;
1642
1643 typedef union
1644 {
1645 struct
1646 {
1647 unsigned IOCAP0 : 1;
1648 unsigned IOCAP1 : 1;
1649 unsigned IOCAP2 : 1;
1650 unsigned IOCAP3 : 1;
1651 unsigned IOCAP4 : 1;
1652 unsigned IOCAP5 : 1;
1653 unsigned : 1;
1654 unsigned : 1;
1655 };
1656
1657 struct
1658 {
1659 unsigned IOCAP : 6;
1660 unsigned : 2;
1661 };
1662 } __IOCAPbits_t;
1663
1664 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
1665
1666 #define _IOCAP0 0x01
1667 #define _IOCAP1 0x02
1668 #define _IOCAP2 0x04
1669 #define _IOCAP3 0x08
1670 #define _IOCAP4 0x10
1671 #define _IOCAP5 0x20
1672
1673 //==============================================================================
1674
1675
1676 //==============================================================================
1677 // IOCAN Bits
1678
1679 extern __at(0x0392) __sfr IOCAN;
1680
1681 typedef union
1682 {
1683 struct
1684 {
1685 unsigned IOCAN0 : 1;
1686 unsigned IOCAN1 : 1;
1687 unsigned IOCAN2 : 1;
1688 unsigned IOCAN3 : 1;
1689 unsigned IOCAN4 : 1;
1690 unsigned IOCAN5 : 1;
1691 unsigned : 1;
1692 unsigned : 1;
1693 };
1694
1695 struct
1696 {
1697 unsigned IOCAN : 6;
1698 unsigned : 2;
1699 };
1700 } __IOCANbits_t;
1701
1702 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
1703
1704 #define _IOCAN0 0x01
1705 #define _IOCAN1 0x02
1706 #define _IOCAN2 0x04
1707 #define _IOCAN3 0x08
1708 #define _IOCAN4 0x10
1709 #define _IOCAN5 0x20
1710
1711 //==============================================================================
1712
1713
1714 //==============================================================================
1715 // IOCAF Bits
1716
1717 extern __at(0x0393) __sfr IOCAF;
1718
1719 typedef union
1720 {
1721 struct
1722 {
1723 unsigned IOCAF0 : 1;
1724 unsigned IOCAF1 : 1;
1725 unsigned IOCAF2 : 1;
1726 unsigned IOCAF3 : 1;
1727 unsigned IOCAF4 : 1;
1728 unsigned IOCAF5 : 1;
1729 unsigned : 1;
1730 unsigned : 1;
1731 };
1732
1733 struct
1734 {
1735 unsigned IOCAF : 6;
1736 unsigned : 2;
1737 };
1738 } __IOCAFbits_t;
1739
1740 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
1741
1742 #define _IOCAF0 0x01
1743 #define _IOCAF1 0x02
1744 #define _IOCAF2 0x04
1745 #define _IOCAF3 0x08
1746 #define _IOCAF4 0x10
1747 #define _IOCAF5 0x20
1748
1749 //==============================================================================
1750
1751
1752 //==============================================================================
1753 // CWG1DBR Bits
1754
1755 extern __at(0x0691) __sfr CWG1DBR;
1756
1757 typedef union
1758 {
1759 struct
1760 {
1761 unsigned CWG1DBR0 : 1;
1762 unsigned CWG1DBR1 : 1;
1763 unsigned CWG1DBR2 : 1;
1764 unsigned CWG1DBR3 : 1;
1765 unsigned CWG1DBR4 : 1;
1766 unsigned CWG1DBR5 : 1;
1767 unsigned : 1;
1768 unsigned : 1;
1769 };
1770
1771 struct
1772 {
1773 unsigned CWG1DBR : 6;
1774 unsigned : 2;
1775 };
1776 } __CWG1DBRbits_t;
1777
1778 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
1779
1780 #define _CWG1DBR0 0x01
1781 #define _CWG1DBR1 0x02
1782 #define _CWG1DBR2 0x04
1783 #define _CWG1DBR3 0x08
1784 #define _CWG1DBR4 0x10
1785 #define _CWG1DBR5 0x20
1786
1787 //==============================================================================
1788
1789
1790 //==============================================================================
1791 // CWG1DBF Bits
1792
1793 extern __at(0x0692) __sfr CWG1DBF;
1794
1795 typedef union
1796 {
1797 struct
1798 {
1799 unsigned CWG1DBF0 : 1;
1800 unsigned CWG1DBF1 : 1;
1801 unsigned CWG1DBF2 : 1;
1802 unsigned CWG1DBF3 : 1;
1803 unsigned CWG1DBF4 : 1;
1804 unsigned CWG1DBF5 : 1;
1805 unsigned : 1;
1806 unsigned : 1;
1807 };
1808
1809 struct
1810 {
1811 unsigned CWG1DBF : 6;
1812 unsigned : 2;
1813 };
1814 } __CWG1DBFbits_t;
1815
1816 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
1817
1818 #define _CWG1DBF0 0x01
1819 #define _CWG1DBF1 0x02
1820 #define _CWG1DBF2 0x04
1821 #define _CWG1DBF3 0x08
1822 #define _CWG1DBF4 0x10
1823 #define _CWG1DBF5 0x20
1824
1825 //==============================================================================
1826
1827
1828 //==============================================================================
1829 // CWG1CON0 Bits
1830
1831 extern __at(0x0693) __sfr CWG1CON0;
1832
1833 typedef struct
1834 {
1835 unsigned G1CS0 : 1;
1836 unsigned : 1;
1837 unsigned : 1;
1838 unsigned G1POLA : 1;
1839 unsigned G1POLB : 1;
1840 unsigned G1OEA : 1;
1841 unsigned G1OEB : 1;
1842 unsigned G1EN : 1;
1843 } __CWG1CON0bits_t;
1844
1845 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
1846
1847 #define _G1CS0 0x01
1848 #define _G1POLA 0x08
1849 #define _G1POLB 0x10
1850 #define _G1OEA 0x20
1851 #define _G1OEB 0x40
1852 #define _G1EN 0x80
1853
1854 //==============================================================================
1855
1856
1857 //==============================================================================
1858 // CWG1CON1 Bits
1859
1860 extern __at(0x0694) __sfr CWG1CON1;
1861
1862 typedef union
1863 {
1864 struct
1865 {
1866 unsigned G1IS0 : 1;
1867 unsigned G1IS1 : 1;
1868 unsigned G1IS2 : 1;
1869 unsigned : 1;
1870 unsigned G1ASDLA0 : 1;
1871 unsigned G1ASDLA1 : 1;
1872 unsigned G1ASDLB0 : 1;
1873 unsigned G1ASDLB1 : 1;
1874 };
1875
1876 struct
1877 {
1878 unsigned G1IS : 3;
1879 unsigned : 5;
1880 };
1881
1882 struct
1883 {
1884 unsigned : 4;
1885 unsigned G1ASDLA : 2;
1886 unsigned : 2;
1887 };
1888
1889 struct
1890 {
1891 unsigned : 6;
1892 unsigned G1ASDLB : 2;
1893 };
1894 } __CWG1CON1bits_t;
1895
1896 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
1897
1898 #define _G1IS0 0x01
1899 #define _G1IS1 0x02
1900 #define _G1IS2 0x04
1901 #define _G1ASDLA0 0x10
1902 #define _G1ASDLA1 0x20
1903 #define _G1ASDLB0 0x40
1904 #define _G1ASDLB1 0x80
1905
1906 //==============================================================================
1907
1908
1909 //==============================================================================
1910 // CWG1CON2 Bits
1911
1912 extern __at(0x0695) __sfr CWG1CON2;
1913
1914 typedef struct
1915 {
1916 unsigned : 1;
1917 unsigned G1ASDSFLT : 1;
1918 unsigned G1ASDSC1 : 1;
1919 unsigned : 1;
1920 unsigned : 1;
1921 unsigned : 1;
1922 unsigned G1ARSEN : 1;
1923 unsigned G1ASE : 1;
1924 } __CWG1CON2bits_t;
1925
1926 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
1927
1928 #define _G1ASDSFLT 0x02
1929 #define _G1ASDSC1 0x04
1930 #define _G1ARSEN 0x40
1931 #define _G1ASE 0x80
1932
1933 //==============================================================================
1934
1935
1936 //==============================================================================
1937 // PWMEN Bits
1938
1939 extern __at(0x0D8E) __sfr PWMEN;
1940
1941 typedef union
1942 {
1943 struct
1944 {
1945 unsigned PWM1EN_A : 1;
1946 unsigned PWM2EN_A : 1;
1947 unsigned PWM3EN_A : 1;
1948 unsigned : 1;
1949 unsigned : 1;
1950 unsigned : 1;
1951 unsigned : 1;
1952 unsigned : 1;
1953 };
1954
1955 struct
1956 {
1957 unsigned MPWM1EN : 1;
1958 unsigned MPWM2EN : 1;
1959 unsigned MPWM3EN : 1;
1960 unsigned : 1;
1961 unsigned : 1;
1962 unsigned : 1;
1963 unsigned : 1;
1964 unsigned : 1;
1965 };
1966 } __PWMENbits_t;
1967
1968 extern __at(0x0D8E) volatile __PWMENbits_t PWMENbits;
1969
1970 #define _PWM1EN_A 0x01
1971 #define _MPWM1EN 0x01
1972 #define _PWM2EN_A 0x02
1973 #define _MPWM2EN 0x02
1974 #define _PWM3EN_A 0x04
1975 #define _MPWM3EN 0x04
1976
1977 //==============================================================================
1978
1979
1980 //==============================================================================
1981 // PWMLD Bits
1982
1983 extern __at(0x0D8F) __sfr PWMLD;
1984
1985 typedef union
1986 {
1987 struct
1988 {
1989 unsigned PWM1LDA_A : 1;
1990 unsigned PWM2LDA_A : 1;
1991 unsigned PWM3LDA_A : 1;
1992 unsigned : 1;
1993 unsigned : 1;
1994 unsigned : 1;
1995 unsigned : 1;
1996 unsigned : 1;
1997 };
1998
1999 struct
2000 {
2001 unsigned MPWM1LD : 1;
2002 unsigned MPWM2LD : 1;
2003 unsigned MPWM3LD : 1;
2004 unsigned : 1;
2005 unsigned : 1;
2006 unsigned : 1;
2007 unsigned : 1;
2008 unsigned : 1;
2009 };
2010 } __PWMLDbits_t;
2011
2012 extern __at(0x0D8F) volatile __PWMLDbits_t PWMLDbits;
2013
2014 #define _PWM1LDA_A 0x01
2015 #define _MPWM1LD 0x01
2016 #define _PWM2LDA_A 0x02
2017 #define _MPWM2LD 0x02
2018 #define _PWM3LDA_A 0x04
2019 #define _MPWM3LD 0x04
2020
2021 //==============================================================================
2022
2023
2024 //==============================================================================
2025 // PWMOUT Bits
2026
2027 extern __at(0x0D90) __sfr PWMOUT;
2028
2029 typedef union
2030 {
2031 struct
2032 {
2033 unsigned PWM1OUT_A : 1;
2034 unsigned PWM2OUT_A : 1;
2035 unsigned PWM3OUT_A : 1;
2036 unsigned : 1;
2037 unsigned : 1;
2038 unsigned : 1;
2039 unsigned : 1;
2040 unsigned : 1;
2041 };
2042
2043 struct
2044 {
2045 unsigned MPWM1OUT : 1;
2046 unsigned MPWM2OUT : 1;
2047 unsigned MPWM3OUT : 1;
2048 unsigned : 1;
2049 unsigned : 1;
2050 unsigned : 1;
2051 unsigned : 1;
2052 unsigned : 1;
2053 };
2054 } __PWMOUTbits_t;
2055
2056 extern __at(0x0D90) volatile __PWMOUTbits_t PWMOUTbits;
2057
2058 #define _PWM1OUT_A 0x01
2059 #define _MPWM1OUT 0x01
2060 #define _PWM2OUT_A 0x02
2061 #define _MPWM2OUT 0x02
2062 #define _PWM3OUT_A 0x04
2063 #define _MPWM3OUT 0x04
2064
2065 //==============================================================================
2066
2067 extern __at(0x0D91) __sfr PWM1PH;
2068
2069 //==============================================================================
2070 // PWM1PHL Bits
2071
2072 extern __at(0x0D91) __sfr PWM1PHL;
2073
2074 typedef struct
2075 {
2076 unsigned PWM1PHL0 : 1;
2077 unsigned PWM1PHL1 : 1;
2078 unsigned PWM1PHL2 : 1;
2079 unsigned PWM1PHL3 : 1;
2080 unsigned PWM1PHL4 : 1;
2081 unsigned PWM1PHL5 : 1;
2082 unsigned PWM1PHL6 : 1;
2083 unsigned PWM1PHL7 : 1;
2084 } __PWM1PHLbits_t;
2085
2086 extern __at(0x0D91) volatile __PWM1PHLbits_t PWM1PHLbits;
2087
2088 #define _PWM1PHL0 0x01
2089 #define _PWM1PHL1 0x02
2090 #define _PWM1PHL2 0x04
2091 #define _PWM1PHL3 0x08
2092 #define _PWM1PHL4 0x10
2093 #define _PWM1PHL5 0x20
2094 #define _PWM1PHL6 0x40
2095 #define _PWM1PHL7 0x80
2096
2097 //==============================================================================
2098
2099
2100 //==============================================================================
2101 // PWM1PHH Bits
2102
2103 extern __at(0x0D92) __sfr PWM1PHH;
2104
2105 typedef struct
2106 {
2107 unsigned PWM1PHH0 : 1;
2108 unsigned PWM1PHH1 : 1;
2109 unsigned PWM1PHH2 : 1;
2110 unsigned PWM1PHH3 : 1;
2111 unsigned PWM1PHH4 : 1;
2112 unsigned PWM1PHH5 : 1;
2113 unsigned PWM1PHH6 : 1;
2114 unsigned PWM1PHH7 : 1;
2115 } __PWM1PHHbits_t;
2116
2117 extern __at(0x0D92) volatile __PWM1PHHbits_t PWM1PHHbits;
2118
2119 #define _PWM1PHH0 0x01
2120 #define _PWM1PHH1 0x02
2121 #define _PWM1PHH2 0x04
2122 #define _PWM1PHH3 0x08
2123 #define _PWM1PHH4 0x10
2124 #define _PWM1PHH5 0x20
2125 #define _PWM1PHH6 0x40
2126 #define _PWM1PHH7 0x80
2127
2128 //==============================================================================
2129
2130 extern __at(0x0D93) __sfr PWM1DC;
2131
2132 //==============================================================================
2133 // PWM1DCL Bits
2134
2135 extern __at(0x0D93) __sfr PWM1DCL;
2136
2137 typedef struct
2138 {
2139 unsigned PWM1DCL0 : 1;
2140 unsigned PWM1DCL1 : 1;
2141 unsigned PWM1DCL2 : 1;
2142 unsigned PWM1DCL3 : 1;
2143 unsigned PWM1DCL4 : 1;
2144 unsigned PWM1DCL5 : 1;
2145 unsigned PWM1DCL6 : 1;
2146 unsigned PWM1DCL7 : 1;
2147 } __PWM1DCLbits_t;
2148
2149 extern __at(0x0D93) volatile __PWM1DCLbits_t PWM1DCLbits;
2150
2151 #define _PWM1DCL0 0x01
2152 #define _PWM1DCL1 0x02
2153 #define _PWM1DCL2 0x04
2154 #define _PWM1DCL3 0x08
2155 #define _PWM1DCL4 0x10
2156 #define _PWM1DCL5 0x20
2157 #define _PWM1DCL6 0x40
2158 #define _PWM1DCL7 0x80
2159
2160 //==============================================================================
2161
2162
2163 //==============================================================================
2164 // PWM1DCH Bits
2165
2166 extern __at(0x0D94) __sfr PWM1DCH;
2167
2168 typedef struct
2169 {
2170 unsigned PWM1DCH0 : 1;
2171 unsigned PWM1DCH1 : 1;
2172 unsigned PWM1DCH2 : 1;
2173 unsigned PWM1DCH3 : 1;
2174 unsigned PWM1DCH4 : 1;
2175 unsigned PWM1DCH5 : 1;
2176 unsigned PWM1DCH6 : 1;
2177 unsigned PWM1DCH7 : 1;
2178 } __PWM1DCHbits_t;
2179
2180 extern __at(0x0D94) volatile __PWM1DCHbits_t PWM1DCHbits;
2181
2182 #define _PWM1DCH0 0x01
2183 #define _PWM1DCH1 0x02
2184 #define _PWM1DCH2 0x04
2185 #define _PWM1DCH3 0x08
2186 #define _PWM1DCH4 0x10
2187 #define _PWM1DCH5 0x20
2188 #define _PWM1DCH6 0x40
2189 #define _PWM1DCH7 0x80
2190
2191 //==============================================================================
2192
2193 extern __at(0x0D95) __sfr PWM1PR;
2194
2195 //==============================================================================
2196 // PWM1PRL Bits
2197
2198 extern __at(0x0D95) __sfr PWM1PRL;
2199
2200 typedef struct
2201 {
2202 unsigned PWM1PRL0 : 1;
2203 unsigned PWM1PRL1 : 1;
2204 unsigned PWM1PRL2 : 1;
2205 unsigned PWM1PRL3 : 1;
2206 unsigned PWM1PRL4 : 1;
2207 unsigned PWM1PRL5 : 1;
2208 unsigned PWM1PRL6 : 1;
2209 unsigned PWM1PRL7 : 1;
2210 } __PWM1PRLbits_t;
2211
2212 extern __at(0x0D95) volatile __PWM1PRLbits_t PWM1PRLbits;
2213
2214 #define _PWM1PRL0 0x01
2215 #define _PWM1PRL1 0x02
2216 #define _PWM1PRL2 0x04
2217 #define _PWM1PRL3 0x08
2218 #define _PWM1PRL4 0x10
2219 #define _PWM1PRL5 0x20
2220 #define _PWM1PRL6 0x40
2221 #define _PWM1PRL7 0x80
2222
2223 //==============================================================================
2224
2225
2226 //==============================================================================
2227 // PWM1PRH Bits
2228
2229 extern __at(0x0D96) __sfr PWM1PRH;
2230
2231 typedef struct
2232 {
2233 unsigned PWM1PRH0 : 1;
2234 unsigned PWM1PRH1 : 1;
2235 unsigned PWM1PRH2 : 1;
2236 unsigned PWM1PRH3 : 1;
2237 unsigned PWM1PRH4 : 1;
2238 unsigned PWM1PRH5 : 1;
2239 unsigned PWM1PRH6 : 1;
2240 unsigned PWM1PRH7 : 1;
2241 } __PWM1PRHbits_t;
2242
2243 extern __at(0x0D96) volatile __PWM1PRHbits_t PWM1PRHbits;
2244
2245 #define _PWM1PRH0 0x01
2246 #define _PWM1PRH1 0x02
2247 #define _PWM1PRH2 0x04
2248 #define _PWM1PRH3 0x08
2249 #define _PWM1PRH4 0x10
2250 #define _PWM1PRH5 0x20
2251 #define _PWM1PRH6 0x40
2252 #define _PWM1PRH7 0x80
2253
2254 //==============================================================================
2255
2256 extern __at(0x0D97) __sfr PWM1OF;
2257
2258 //==============================================================================
2259 // PWM1OFL Bits
2260
2261 extern __at(0x0D97) __sfr PWM1OFL;
2262
2263 typedef struct
2264 {
2265 unsigned PWM1OFL0 : 1;
2266 unsigned PWM1OFL1 : 1;
2267 unsigned PWM1OFL2 : 1;
2268 unsigned PWM1OFL3 : 1;
2269 unsigned PWM1OFL4 : 1;
2270 unsigned PWM1OFL5 : 1;
2271 unsigned PWM1OFL6 : 1;
2272 unsigned PWM1OFL7 : 1;
2273 } __PWM1OFLbits_t;
2274
2275 extern __at(0x0D97) volatile __PWM1OFLbits_t PWM1OFLbits;
2276
2277 #define _PWM1OFL0 0x01
2278 #define _PWM1OFL1 0x02
2279 #define _PWM1OFL2 0x04
2280 #define _PWM1OFL3 0x08
2281 #define _PWM1OFL4 0x10
2282 #define _PWM1OFL5 0x20
2283 #define _PWM1OFL6 0x40
2284 #define _PWM1OFL7 0x80
2285
2286 //==============================================================================
2287
2288
2289 //==============================================================================
2290 // PWM1OFH Bits
2291
2292 extern __at(0x0D98) __sfr PWM1OFH;
2293
2294 typedef struct
2295 {
2296 unsigned PWM1OFH0 : 1;
2297 unsigned PWM1OFH1 : 1;
2298 unsigned PWM1OFH2 : 1;
2299 unsigned PWM1OFH3 : 1;
2300 unsigned PWM1OFH4 : 1;
2301 unsigned PWM1OFH5 : 1;
2302 unsigned PWM1OFH6 : 1;
2303 unsigned PWM1OFH7 : 1;
2304 } __PWM1OFHbits_t;
2305
2306 extern __at(0x0D98) volatile __PWM1OFHbits_t PWM1OFHbits;
2307
2308 #define _PWM1OFH0 0x01
2309 #define _PWM1OFH1 0x02
2310 #define _PWM1OFH2 0x04
2311 #define _PWM1OFH3 0x08
2312 #define _PWM1OFH4 0x10
2313 #define _PWM1OFH5 0x20
2314 #define _PWM1OFH6 0x40
2315 #define _PWM1OFH7 0x80
2316
2317 //==============================================================================
2318
2319 extern __at(0x0D99) __sfr PWM1TMR;
2320
2321 //==============================================================================
2322 // PWM1TMRL Bits
2323
2324 extern __at(0x0D99) __sfr PWM1TMRL;
2325
2326 typedef struct
2327 {
2328 unsigned PWM1TMRL0 : 1;
2329 unsigned PWM1TMRL1 : 1;
2330 unsigned PWM1TMRL2 : 1;
2331 unsigned PWM1TMRL3 : 1;
2332 unsigned PWM1TMRL4 : 1;
2333 unsigned PWM1TMRL5 : 1;
2334 unsigned PWM1TMRL6 : 1;
2335 unsigned PWM1TMRL7 : 1;
2336 } __PWM1TMRLbits_t;
2337
2338 extern __at(0x0D99) volatile __PWM1TMRLbits_t PWM1TMRLbits;
2339
2340 #define _PWM1TMRL0 0x01
2341 #define _PWM1TMRL1 0x02
2342 #define _PWM1TMRL2 0x04
2343 #define _PWM1TMRL3 0x08
2344 #define _PWM1TMRL4 0x10
2345 #define _PWM1TMRL5 0x20
2346 #define _PWM1TMRL6 0x40
2347 #define _PWM1TMRL7 0x80
2348
2349 //==============================================================================
2350
2351
2352 //==============================================================================
2353 // PWM1TMRH Bits
2354
2355 extern __at(0x0D9A) __sfr PWM1TMRH;
2356
2357 typedef struct
2358 {
2359 unsigned PWM1TMRH0 : 1;
2360 unsigned PWM1TMRH1 : 1;
2361 unsigned PWM1TMRH2 : 1;
2362 unsigned PWM1TMRH3 : 1;
2363 unsigned PWM1TMRH4 : 1;
2364 unsigned PWM1TMRH5 : 1;
2365 unsigned PWM1TMRH6 : 1;
2366 unsigned PWM1TMRH7 : 1;
2367 } __PWM1TMRHbits_t;
2368
2369 extern __at(0x0D9A) volatile __PWM1TMRHbits_t PWM1TMRHbits;
2370
2371 #define _PWM1TMRH0 0x01
2372 #define _PWM1TMRH1 0x02
2373 #define _PWM1TMRH2 0x04
2374 #define _PWM1TMRH3 0x08
2375 #define _PWM1TMRH4 0x10
2376 #define _PWM1TMRH5 0x20
2377 #define _PWM1TMRH6 0x40
2378 #define _PWM1TMRH7 0x80
2379
2380 //==============================================================================
2381
2382
2383 //==============================================================================
2384 // PWM1CON Bits
2385
2386 extern __at(0x0D9B) __sfr PWM1CON;
2387
2388 typedef union
2389 {
2390 struct
2391 {
2392 unsigned : 1;
2393 unsigned : 1;
2394 unsigned PWM1MODE0 : 1;
2395 unsigned PWM1MODE1 : 1;
2396 unsigned POL : 1;
2397 unsigned OUT : 1;
2398 unsigned OE : 1;
2399 unsigned EN : 1;
2400 };
2401
2402 struct
2403 {
2404 unsigned : 1;
2405 unsigned : 1;
2406 unsigned MODE0 : 1;
2407 unsigned MODE1 : 1;
2408 unsigned PWM1POL : 1;
2409 unsigned PWM1OUT : 1;
2410 unsigned PWM1OE : 1;
2411 unsigned PWM1EN : 1;
2412 };
2413
2414 struct
2415 {
2416 unsigned : 2;
2417 unsigned PWM1MODE : 2;
2418 unsigned : 4;
2419 };
2420
2421 struct
2422 {
2423 unsigned : 2;
2424 unsigned MODE : 2;
2425 unsigned : 4;
2426 };
2427 } __PWM1CONbits_t;
2428
2429 extern __at(0x0D9B) volatile __PWM1CONbits_t PWM1CONbits;
2430
2431 #define _PWM1MODE0 0x04
2432 #define _MODE0 0x04
2433 #define _PWM1MODE1 0x08
2434 #define _MODE1 0x08
2435 #define _POL 0x10
2436 #define _PWM1POL 0x10
2437 #define _OUT 0x20
2438 #define _PWM1OUT 0x20
2439 #define _OE 0x40
2440 #define _PWM1OE 0x40
2441 #define _EN 0x80
2442 #define _PWM1EN 0x80
2443
2444 //==============================================================================
2445
2446
2447 //==============================================================================
2448 // PWM1INTCON Bits
2449
2450 extern __at(0x0D9C) __sfr PWM1INTCON;
2451
2452 typedef union
2453 {
2454 struct
2455 {
2456 unsigned PRIE : 1;
2457 unsigned DCIE : 1;
2458 unsigned PHIE : 1;
2459 unsigned OFIE : 1;
2460 unsigned : 1;
2461 unsigned : 1;
2462 unsigned : 1;
2463 unsigned : 1;
2464 };
2465
2466 struct
2467 {
2468 unsigned PWM1PRIE : 1;
2469 unsigned PWM1DCIE : 1;
2470 unsigned PWM1PHIE : 1;
2471 unsigned PWM1OFIE : 1;
2472 unsigned : 1;
2473 unsigned : 1;
2474 unsigned : 1;
2475 unsigned : 1;
2476 };
2477 } __PWM1INTCONbits_t;
2478
2479 extern __at(0x0D9C) volatile __PWM1INTCONbits_t PWM1INTCONbits;
2480
2481 #define _PRIE 0x01
2482 #define _PWM1PRIE 0x01
2483 #define _DCIE 0x02
2484 #define _PWM1DCIE 0x02
2485 #define _PHIE 0x04
2486 #define _PWM1PHIE 0x04
2487 #define _OFIE 0x08
2488 #define _PWM1OFIE 0x08
2489
2490 //==============================================================================
2491
2492
2493 //==============================================================================
2494 // PWM1INTE Bits
2495
2496 extern __at(0x0D9C) __sfr PWM1INTE;
2497
2498 typedef union
2499 {
2500 struct
2501 {
2502 unsigned PRIE : 1;
2503 unsigned DCIE : 1;
2504 unsigned PHIE : 1;
2505 unsigned OFIE : 1;
2506 unsigned : 1;
2507 unsigned : 1;
2508 unsigned : 1;
2509 unsigned : 1;
2510 };
2511
2512 struct
2513 {
2514 unsigned PWM1PRIE : 1;
2515 unsigned PWM1DCIE : 1;
2516 unsigned PWM1PHIE : 1;
2517 unsigned PWM1OFIE : 1;
2518 unsigned : 1;
2519 unsigned : 1;
2520 unsigned : 1;
2521 unsigned : 1;
2522 };
2523 } __PWM1INTEbits_t;
2524
2525 extern __at(0x0D9C) volatile __PWM1INTEbits_t PWM1INTEbits;
2526
2527 #define _PWM1INTE_PRIE 0x01
2528 #define _PWM1INTE_PWM1PRIE 0x01
2529 #define _PWM1INTE_DCIE 0x02
2530 #define _PWM1INTE_PWM1DCIE 0x02
2531 #define _PWM1INTE_PHIE 0x04
2532 #define _PWM1INTE_PWM1PHIE 0x04
2533 #define _PWM1INTE_OFIE 0x08
2534 #define _PWM1INTE_PWM1OFIE 0x08
2535
2536 //==============================================================================
2537
2538
2539 //==============================================================================
2540 // PWM1INTF Bits
2541
2542 extern __at(0x0D9D) __sfr PWM1INTF;
2543
2544 typedef union
2545 {
2546 struct
2547 {
2548 unsigned PRIF : 1;
2549 unsigned DCIF : 1;
2550 unsigned PHIF : 1;
2551 unsigned OFIF : 1;
2552 unsigned : 1;
2553 unsigned : 1;
2554 unsigned : 1;
2555 unsigned : 1;
2556 };
2557
2558 struct
2559 {
2560 unsigned PWM1PRIF : 1;
2561 unsigned PWM1DCIF : 1;
2562 unsigned PWM1PHIF : 1;
2563 unsigned PWM1OFIF : 1;
2564 unsigned : 1;
2565 unsigned : 1;
2566 unsigned : 1;
2567 unsigned : 1;
2568 };
2569 } __PWM1INTFbits_t;
2570
2571 extern __at(0x0D9D) volatile __PWM1INTFbits_t PWM1INTFbits;
2572
2573 #define _PRIF 0x01
2574 #define _PWM1PRIF 0x01
2575 #define _DCIF 0x02
2576 #define _PWM1DCIF 0x02
2577 #define _PHIF 0x04
2578 #define _PWM1PHIF 0x04
2579 #define _OFIF 0x08
2580 #define _PWM1OFIF 0x08
2581
2582 //==============================================================================
2583
2584
2585 //==============================================================================
2586 // PWM1INTFLG Bits
2587
2588 extern __at(0x0D9D) __sfr PWM1INTFLG;
2589
2590 typedef union
2591 {
2592 struct
2593 {
2594 unsigned PRIF : 1;
2595 unsigned DCIF : 1;
2596 unsigned PHIF : 1;
2597 unsigned OFIF : 1;
2598 unsigned : 1;
2599 unsigned : 1;
2600 unsigned : 1;
2601 unsigned : 1;
2602 };
2603
2604 struct
2605 {
2606 unsigned PWM1PRIF : 1;
2607 unsigned PWM1DCIF : 1;
2608 unsigned PWM1PHIF : 1;
2609 unsigned PWM1OFIF : 1;
2610 unsigned : 1;
2611 unsigned : 1;
2612 unsigned : 1;
2613 unsigned : 1;
2614 };
2615 } __PWM1INTFLGbits_t;
2616
2617 extern __at(0x0D9D) volatile __PWM1INTFLGbits_t PWM1INTFLGbits;
2618
2619 #define _PWM1INTFLG_PRIF 0x01
2620 #define _PWM1INTFLG_PWM1PRIF 0x01
2621 #define _PWM1INTFLG_DCIF 0x02
2622 #define _PWM1INTFLG_PWM1DCIF 0x02
2623 #define _PWM1INTFLG_PHIF 0x04
2624 #define _PWM1INTFLG_PWM1PHIF 0x04
2625 #define _PWM1INTFLG_OFIF 0x08
2626 #define _PWM1INTFLG_PWM1OFIF 0x08
2627
2628 //==============================================================================
2629
2630
2631 //==============================================================================
2632 // PWM1CLKCON Bits
2633
2634 extern __at(0x0D9E) __sfr PWM1CLKCON;
2635
2636 typedef union
2637 {
2638 struct
2639 {
2640 unsigned PWM1CS0 : 1;
2641 unsigned PWM1CS1 : 1;
2642 unsigned : 1;
2643 unsigned : 1;
2644 unsigned PWM1PS0 : 1;
2645 unsigned PWM1PS1 : 1;
2646 unsigned PWM1PS2 : 1;
2647 unsigned : 1;
2648 };
2649
2650 struct
2651 {
2652 unsigned CS0 : 1;
2653 unsigned CS1 : 1;
2654 unsigned : 1;
2655 unsigned : 1;
2656 unsigned PS0 : 1;
2657 unsigned PS1 : 1;
2658 unsigned PS2 : 1;
2659 unsigned : 1;
2660 };
2661
2662 struct
2663 {
2664 unsigned CS : 2;
2665 unsigned : 6;
2666 };
2667
2668 struct
2669 {
2670 unsigned PWM1CS : 2;
2671 unsigned : 6;
2672 };
2673
2674 struct
2675 {
2676 unsigned : 4;
2677 unsigned PS : 3;
2678 unsigned : 1;
2679 };
2680
2681 struct
2682 {
2683 unsigned : 4;
2684 unsigned PWM1PS : 3;
2685 unsigned : 1;
2686 };
2687 } __PWM1CLKCONbits_t;
2688
2689 extern __at(0x0D9E) volatile __PWM1CLKCONbits_t PWM1CLKCONbits;
2690
2691 #define _PWM1CLKCON_PWM1CS0 0x01
2692 #define _PWM1CLKCON_CS0 0x01
2693 #define _PWM1CLKCON_PWM1CS1 0x02
2694 #define _PWM1CLKCON_CS1 0x02
2695 #define _PWM1CLKCON_PWM1PS0 0x10
2696 #define _PWM1CLKCON_PS0 0x10
2697 #define _PWM1CLKCON_PWM1PS1 0x20
2698 #define _PWM1CLKCON_PS1 0x20
2699 #define _PWM1CLKCON_PWM1PS2 0x40
2700 #define _PWM1CLKCON_PS2 0x40
2701
2702 //==============================================================================
2703
2704
2705 //==============================================================================
2706 // PWM1LDCON Bits
2707
2708 extern __at(0x0D9F) __sfr PWM1LDCON;
2709
2710 typedef union
2711 {
2712 struct
2713 {
2714 unsigned PWM1LDS0 : 1;
2715 unsigned PWM1LDS1 : 1;
2716 unsigned : 1;
2717 unsigned : 1;
2718 unsigned : 1;
2719 unsigned : 1;
2720 unsigned LDT : 1;
2721 unsigned LDA : 1;
2722 };
2723
2724 struct
2725 {
2726 unsigned LDS0 : 1;
2727 unsigned LDS1 : 1;
2728 unsigned : 1;
2729 unsigned : 1;
2730 unsigned : 1;
2731 unsigned : 1;
2732 unsigned PWM1LDM : 1;
2733 unsigned PWM1LD : 1;
2734 };
2735
2736 struct
2737 {
2738 unsigned PWM1LDS : 2;
2739 unsigned : 6;
2740 };
2741
2742 struct
2743 {
2744 unsigned LDS : 2;
2745 unsigned : 6;
2746 };
2747 } __PWM1LDCONbits_t;
2748
2749 extern __at(0x0D9F) volatile __PWM1LDCONbits_t PWM1LDCONbits;
2750
2751 #define _PWM1LDS0 0x01
2752 #define _LDS0 0x01
2753 #define _PWM1LDS1 0x02
2754 #define _LDS1 0x02
2755 #define _LDT 0x40
2756 #define _PWM1LDM 0x40
2757 #define _LDA 0x80
2758 #define _PWM1LD 0x80
2759
2760 //==============================================================================
2761
2762
2763 //==============================================================================
2764 // PWM1OFCON Bits
2765
2766 extern __at(0x0DA0) __sfr PWM1OFCON;
2767
2768 typedef union
2769 {
2770 struct
2771 {
2772 unsigned PWM1OFS0 : 1;
2773 unsigned PWM1OFS1 : 1;
2774 unsigned : 1;
2775 unsigned : 1;
2776 unsigned OFO : 1;
2777 unsigned PWM1OFM0 : 1;
2778 unsigned PWM1OFM1 : 1;
2779 unsigned : 1;
2780 };
2781
2782 struct
2783 {
2784 unsigned OFS0 : 1;
2785 unsigned OFS1 : 1;
2786 unsigned : 1;
2787 unsigned : 1;
2788 unsigned PWM1OFMC : 1;
2789 unsigned OFM0 : 1;
2790 unsigned OFM1 : 1;
2791 unsigned : 1;
2792 };
2793
2794 struct
2795 {
2796 unsigned OFS : 2;
2797 unsigned : 6;
2798 };
2799
2800 struct
2801 {
2802 unsigned PWM1OFS : 2;
2803 unsigned : 6;
2804 };
2805
2806 struct
2807 {
2808 unsigned : 5;
2809 unsigned OFM : 2;
2810 unsigned : 1;
2811 };
2812
2813 struct
2814 {
2815 unsigned : 5;
2816 unsigned PWM1OFM : 2;
2817 unsigned : 1;
2818 };
2819 } __PWM1OFCONbits_t;
2820
2821 extern __at(0x0DA0) volatile __PWM1OFCONbits_t PWM1OFCONbits;
2822
2823 #define _PWM1OFS0 0x01
2824 #define _OFS0 0x01
2825 #define _PWM1OFS1 0x02
2826 #define _OFS1 0x02
2827 #define _OFO 0x10
2828 #define _PWM1OFMC 0x10
2829 #define _PWM1OFM0 0x20
2830 #define _OFM0 0x20
2831 #define _PWM1OFM1 0x40
2832 #define _OFM1 0x40
2833
2834 //==============================================================================
2835
2836 extern __at(0x0DA1) __sfr PWM2PH;
2837
2838 //==============================================================================
2839 // PWM2PHL Bits
2840
2841 extern __at(0x0DA1) __sfr PWM2PHL;
2842
2843 typedef struct
2844 {
2845 unsigned PWM2PHL0 : 1;
2846 unsigned PWM2PHL1 : 1;
2847 unsigned PWM2PHL2 : 1;
2848 unsigned PWM2PHL3 : 1;
2849 unsigned PWM2PHL4 : 1;
2850 unsigned PWM2PHL5 : 1;
2851 unsigned PWM2PHL6 : 1;
2852 unsigned PWM2PHL7 : 1;
2853 } __PWM2PHLbits_t;
2854
2855 extern __at(0x0DA1) volatile __PWM2PHLbits_t PWM2PHLbits;
2856
2857 #define _PWM2PHL0 0x01
2858 #define _PWM2PHL1 0x02
2859 #define _PWM2PHL2 0x04
2860 #define _PWM2PHL3 0x08
2861 #define _PWM2PHL4 0x10
2862 #define _PWM2PHL5 0x20
2863 #define _PWM2PHL6 0x40
2864 #define _PWM2PHL7 0x80
2865
2866 //==============================================================================
2867
2868
2869 //==============================================================================
2870 // PWM2PHH Bits
2871
2872 extern __at(0x0DA2) __sfr PWM2PHH;
2873
2874 typedef struct
2875 {
2876 unsigned PWM2PHH0 : 1;
2877 unsigned PWM2PHH1 : 1;
2878 unsigned PWM2PHH2 : 1;
2879 unsigned PWM2PHH3 : 1;
2880 unsigned PWM2PHH4 : 1;
2881 unsigned PWM2PHH5 : 1;
2882 unsigned PWM2PHH6 : 1;
2883 unsigned PWM2PHH7 : 1;
2884 } __PWM2PHHbits_t;
2885
2886 extern __at(0x0DA2) volatile __PWM2PHHbits_t PWM2PHHbits;
2887
2888 #define _PWM2PHH0 0x01
2889 #define _PWM2PHH1 0x02
2890 #define _PWM2PHH2 0x04
2891 #define _PWM2PHH3 0x08
2892 #define _PWM2PHH4 0x10
2893 #define _PWM2PHH5 0x20
2894 #define _PWM2PHH6 0x40
2895 #define _PWM2PHH7 0x80
2896
2897 //==============================================================================
2898
2899 extern __at(0x0DA3) __sfr PWM2DC;
2900
2901 //==============================================================================
2902 // PWM2DCL Bits
2903
2904 extern __at(0x0DA3) __sfr PWM2DCL;
2905
2906 typedef struct
2907 {
2908 unsigned PWM2DCL0 : 1;
2909 unsigned PWM2DCL1 : 1;
2910 unsigned PWM2DCL2 : 1;
2911 unsigned PWM2DCL3 : 1;
2912 unsigned PWM2DCL4 : 1;
2913 unsigned PWM2DCL5 : 1;
2914 unsigned PWM2DCL6 : 1;
2915 unsigned PWM2DCL7 : 1;
2916 } __PWM2DCLbits_t;
2917
2918 extern __at(0x0DA3) volatile __PWM2DCLbits_t PWM2DCLbits;
2919
2920 #define _PWM2DCL0 0x01
2921 #define _PWM2DCL1 0x02
2922 #define _PWM2DCL2 0x04
2923 #define _PWM2DCL3 0x08
2924 #define _PWM2DCL4 0x10
2925 #define _PWM2DCL5 0x20
2926 #define _PWM2DCL6 0x40
2927 #define _PWM2DCL7 0x80
2928
2929 //==============================================================================
2930
2931
2932 //==============================================================================
2933 // PWM2DCH Bits
2934
2935 extern __at(0x0DA4) __sfr PWM2DCH;
2936
2937 typedef struct
2938 {
2939 unsigned PWM2DCH0 : 1;
2940 unsigned PWM2DCH1 : 1;
2941 unsigned PWM2DCH2 : 1;
2942 unsigned PWM2DCH3 : 1;
2943 unsigned PWM2DCH4 : 1;
2944 unsigned PWM2DCH5 : 1;
2945 unsigned PWM2DCH6 : 1;
2946 unsigned PWM2DCH7 : 1;
2947 } __PWM2DCHbits_t;
2948
2949 extern __at(0x0DA4) volatile __PWM2DCHbits_t PWM2DCHbits;
2950
2951 #define _PWM2DCH0 0x01
2952 #define _PWM2DCH1 0x02
2953 #define _PWM2DCH2 0x04
2954 #define _PWM2DCH3 0x08
2955 #define _PWM2DCH4 0x10
2956 #define _PWM2DCH5 0x20
2957 #define _PWM2DCH6 0x40
2958 #define _PWM2DCH7 0x80
2959
2960 //==============================================================================
2961
2962 extern __at(0x0DA5) __sfr PWM2PR;
2963
2964 //==============================================================================
2965 // PWM2PRL Bits
2966
2967 extern __at(0x0DA5) __sfr PWM2PRL;
2968
2969 typedef struct
2970 {
2971 unsigned PWM2PRL0 : 1;
2972 unsigned PWM2PRL1 : 1;
2973 unsigned PWM2PRL2 : 1;
2974 unsigned PWM2PRL3 : 1;
2975 unsigned PWM2PRL4 : 1;
2976 unsigned PWM2PRL5 : 1;
2977 unsigned PWM2PRL6 : 1;
2978 unsigned PWM2PRL7 : 1;
2979 } __PWM2PRLbits_t;
2980
2981 extern __at(0x0DA5) volatile __PWM2PRLbits_t PWM2PRLbits;
2982
2983 #define _PWM2PRL0 0x01
2984 #define _PWM2PRL1 0x02
2985 #define _PWM2PRL2 0x04
2986 #define _PWM2PRL3 0x08
2987 #define _PWM2PRL4 0x10
2988 #define _PWM2PRL5 0x20
2989 #define _PWM2PRL6 0x40
2990 #define _PWM2PRL7 0x80
2991
2992 //==============================================================================
2993
2994
2995 //==============================================================================
2996 // PWM2PRH Bits
2997
2998 extern __at(0x0DA6) __sfr PWM2PRH;
2999
3000 typedef struct
3001 {
3002 unsigned PWM2PRH0 : 1;
3003 unsigned PWM2PRH1 : 1;
3004 unsigned PWM2PRH2 : 1;
3005 unsigned PWM2PRH3 : 1;
3006 unsigned PWM2PRH4 : 1;
3007 unsigned PWM2PRH5 : 1;
3008 unsigned PWM2PRH6 : 1;
3009 unsigned PWM2PRH7 : 1;
3010 } __PWM2PRHbits_t;
3011
3012 extern __at(0x0DA6) volatile __PWM2PRHbits_t PWM2PRHbits;
3013
3014 #define _PWM2PRH0 0x01
3015 #define _PWM2PRH1 0x02
3016 #define _PWM2PRH2 0x04
3017 #define _PWM2PRH3 0x08
3018 #define _PWM2PRH4 0x10
3019 #define _PWM2PRH5 0x20
3020 #define _PWM2PRH6 0x40
3021 #define _PWM2PRH7 0x80
3022
3023 //==============================================================================
3024
3025 extern __at(0x0DA7) __sfr PWM2OF;
3026
3027 //==============================================================================
3028 // PWM2OFL Bits
3029
3030 extern __at(0x0DA7) __sfr PWM2OFL;
3031
3032 typedef struct
3033 {
3034 unsigned PWM2OFL0 : 1;
3035 unsigned PWM2OFL1 : 1;
3036 unsigned PWM2OFL2 : 1;
3037 unsigned PWM2OFL3 : 1;
3038 unsigned PWM2OFL4 : 1;
3039 unsigned PWM2OFL5 : 1;
3040 unsigned PWM2OFL6 : 1;
3041 unsigned PWM2OFL7 : 1;
3042 } __PWM2OFLbits_t;
3043
3044 extern __at(0x0DA7) volatile __PWM2OFLbits_t PWM2OFLbits;
3045
3046 #define _PWM2OFL0 0x01
3047 #define _PWM2OFL1 0x02
3048 #define _PWM2OFL2 0x04
3049 #define _PWM2OFL3 0x08
3050 #define _PWM2OFL4 0x10
3051 #define _PWM2OFL5 0x20
3052 #define _PWM2OFL6 0x40
3053 #define _PWM2OFL7 0x80
3054
3055 //==============================================================================
3056
3057
3058 //==============================================================================
3059 // PWM2OFH Bits
3060
3061 extern __at(0x0DA8) __sfr PWM2OFH;
3062
3063 typedef struct
3064 {
3065 unsigned PWM2OFH0 : 1;
3066 unsigned PWM2OFH1 : 1;
3067 unsigned PWM2OFH2 : 1;
3068 unsigned PWM2OFH3 : 1;
3069 unsigned PWM2OFH4 : 1;
3070 unsigned PWM2OFH5 : 1;
3071 unsigned PWM2OFH6 : 1;
3072 unsigned PWM2OFH7 : 1;
3073 } __PWM2OFHbits_t;
3074
3075 extern __at(0x0DA8) volatile __PWM2OFHbits_t PWM2OFHbits;
3076
3077 #define _PWM2OFH0 0x01
3078 #define _PWM2OFH1 0x02
3079 #define _PWM2OFH2 0x04
3080 #define _PWM2OFH3 0x08
3081 #define _PWM2OFH4 0x10
3082 #define _PWM2OFH5 0x20
3083 #define _PWM2OFH6 0x40
3084 #define _PWM2OFH7 0x80
3085
3086 //==============================================================================
3087
3088 extern __at(0x0DA9) __sfr PWM2TMR;
3089
3090 //==============================================================================
3091 // PWM2TMRL Bits
3092
3093 extern __at(0x0DA9) __sfr PWM2TMRL;
3094
3095 typedef struct
3096 {
3097 unsigned PWM2TMRL0 : 1;
3098 unsigned PWM2TMRL1 : 1;
3099 unsigned PWM2TMRL2 : 1;
3100 unsigned PWM2TMRL3 : 1;
3101 unsigned PWM2TMRL4 : 1;
3102 unsigned PWM2TMRL5 : 1;
3103 unsigned PWM2TMRL6 : 1;
3104 unsigned PWM2TMRL7 : 1;
3105 } __PWM2TMRLbits_t;
3106
3107 extern __at(0x0DA9) volatile __PWM2TMRLbits_t PWM2TMRLbits;
3108
3109 #define _PWM2TMRL0 0x01
3110 #define _PWM2TMRL1 0x02
3111 #define _PWM2TMRL2 0x04
3112 #define _PWM2TMRL3 0x08
3113 #define _PWM2TMRL4 0x10
3114 #define _PWM2TMRL5 0x20
3115 #define _PWM2TMRL6 0x40
3116 #define _PWM2TMRL7 0x80
3117
3118 //==============================================================================
3119
3120
3121 //==============================================================================
3122 // PWM2TMRH Bits
3123
3124 extern __at(0x0DAA) __sfr PWM2TMRH;
3125
3126 typedef struct
3127 {
3128 unsigned PWM2TMRH0 : 1;
3129 unsigned PWM2TMRH1 : 1;
3130 unsigned PWM2TMRH2 : 1;
3131 unsigned PWM2TMRH3 : 1;
3132 unsigned PWM2TMRH4 : 1;
3133 unsigned PWM2TMRH5 : 1;
3134 unsigned PWM2TMRH6 : 1;
3135 unsigned PWM2TMRH7 : 1;
3136 } __PWM2TMRHbits_t;
3137
3138 extern __at(0x0DAA) volatile __PWM2TMRHbits_t PWM2TMRHbits;
3139
3140 #define _PWM2TMRH0 0x01
3141 #define _PWM2TMRH1 0x02
3142 #define _PWM2TMRH2 0x04
3143 #define _PWM2TMRH3 0x08
3144 #define _PWM2TMRH4 0x10
3145 #define _PWM2TMRH5 0x20
3146 #define _PWM2TMRH6 0x40
3147 #define _PWM2TMRH7 0x80
3148
3149 //==============================================================================
3150
3151
3152 //==============================================================================
3153 // PWM2CON Bits
3154
3155 extern __at(0x0DAB) __sfr PWM2CON;
3156
3157 typedef union
3158 {
3159 struct
3160 {
3161 unsigned : 1;
3162 unsigned : 1;
3163 unsigned PWM2MODE0 : 1;
3164 unsigned PWM2MODE1 : 1;
3165 unsigned POL : 1;
3166 unsigned OUT : 1;
3167 unsigned OE : 1;
3168 unsigned EN : 1;
3169 };
3170
3171 struct
3172 {
3173 unsigned : 1;
3174 unsigned : 1;
3175 unsigned MODE0 : 1;
3176 unsigned MODE1 : 1;
3177 unsigned PWM2POL : 1;
3178 unsigned PWM2OUT : 1;
3179 unsigned PWM2OE : 1;
3180 unsigned PWM2EN : 1;
3181 };
3182
3183 struct
3184 {
3185 unsigned : 2;
3186 unsigned PWM2MODE : 2;
3187 unsigned : 4;
3188 };
3189
3190 struct
3191 {
3192 unsigned : 2;
3193 unsigned MODE : 2;
3194 unsigned : 4;
3195 };
3196 } __PWM2CONbits_t;
3197
3198 extern __at(0x0DAB) volatile __PWM2CONbits_t PWM2CONbits;
3199
3200 #define _PWM2CON_PWM2MODE0 0x04
3201 #define _PWM2CON_MODE0 0x04
3202 #define _PWM2CON_PWM2MODE1 0x08
3203 #define _PWM2CON_MODE1 0x08
3204 #define _PWM2CON_POL 0x10
3205 #define _PWM2CON_PWM2POL 0x10
3206 #define _PWM2CON_OUT 0x20
3207 #define _PWM2CON_PWM2OUT 0x20
3208 #define _PWM2CON_OE 0x40
3209 #define _PWM2CON_PWM2OE 0x40
3210 #define _PWM2CON_EN 0x80
3211 #define _PWM2CON_PWM2EN 0x80
3212
3213 //==============================================================================
3214
3215
3216 //==============================================================================
3217 // PWM2INTCON Bits
3218
3219 extern __at(0x0DAC) __sfr PWM2INTCON;
3220
3221 typedef union
3222 {
3223 struct
3224 {
3225 unsigned PRIE : 1;
3226 unsigned DCIE : 1;
3227 unsigned PHIE : 1;
3228 unsigned OFIE : 1;
3229 unsigned : 1;
3230 unsigned : 1;
3231 unsigned : 1;
3232 unsigned : 1;
3233 };
3234
3235 struct
3236 {
3237 unsigned PWM2PRIE : 1;
3238 unsigned PWM2DCIE : 1;
3239 unsigned PWM2PHIE : 1;
3240 unsigned PWM2OFIE : 1;
3241 unsigned : 1;
3242 unsigned : 1;
3243 unsigned : 1;
3244 unsigned : 1;
3245 };
3246 } __PWM2INTCONbits_t;
3247
3248 extern __at(0x0DAC) volatile __PWM2INTCONbits_t PWM2INTCONbits;
3249
3250 #define _PWM2INTCON_PRIE 0x01
3251 #define _PWM2INTCON_PWM2PRIE 0x01
3252 #define _PWM2INTCON_DCIE 0x02
3253 #define _PWM2INTCON_PWM2DCIE 0x02
3254 #define _PWM2INTCON_PHIE 0x04
3255 #define _PWM2INTCON_PWM2PHIE 0x04
3256 #define _PWM2INTCON_OFIE 0x08
3257 #define _PWM2INTCON_PWM2OFIE 0x08
3258
3259 //==============================================================================
3260
3261
3262 //==============================================================================
3263 // PWM2INTE Bits
3264
3265 extern __at(0x0DAC) __sfr PWM2INTE;
3266
3267 typedef union
3268 {
3269 struct
3270 {
3271 unsigned PRIE : 1;
3272 unsigned DCIE : 1;
3273 unsigned PHIE : 1;
3274 unsigned OFIE : 1;
3275 unsigned : 1;
3276 unsigned : 1;
3277 unsigned : 1;
3278 unsigned : 1;
3279 };
3280
3281 struct
3282 {
3283 unsigned PWM2PRIE : 1;
3284 unsigned PWM2DCIE : 1;
3285 unsigned PWM2PHIE : 1;
3286 unsigned PWM2OFIE : 1;
3287 unsigned : 1;
3288 unsigned : 1;
3289 unsigned : 1;
3290 unsigned : 1;
3291 };
3292 } __PWM2INTEbits_t;
3293
3294 extern __at(0x0DAC) volatile __PWM2INTEbits_t PWM2INTEbits;
3295
3296 #define _PWM2INTE_PRIE 0x01
3297 #define _PWM2INTE_PWM2PRIE 0x01
3298 #define _PWM2INTE_DCIE 0x02
3299 #define _PWM2INTE_PWM2DCIE 0x02
3300 #define _PWM2INTE_PHIE 0x04
3301 #define _PWM2INTE_PWM2PHIE 0x04
3302 #define _PWM2INTE_OFIE 0x08
3303 #define _PWM2INTE_PWM2OFIE 0x08
3304
3305 //==============================================================================
3306
3307
3308 //==============================================================================
3309 // PWM2INTF Bits
3310
3311 extern __at(0x0DAD) __sfr PWM2INTF;
3312
3313 typedef union
3314 {
3315 struct
3316 {
3317 unsigned PRIF : 1;
3318 unsigned DCIF : 1;
3319 unsigned PHIF : 1;
3320 unsigned OFIF : 1;
3321 unsigned : 1;
3322 unsigned : 1;
3323 unsigned : 1;
3324 unsigned : 1;
3325 };
3326
3327 struct
3328 {
3329 unsigned PWM2PRIF : 1;
3330 unsigned PWM2DCIF : 1;
3331 unsigned PWM2PHIF : 1;
3332 unsigned PWM2OFIF : 1;
3333 unsigned : 1;
3334 unsigned : 1;
3335 unsigned : 1;
3336 unsigned : 1;
3337 };
3338 } __PWM2INTFbits_t;
3339
3340 extern __at(0x0DAD) volatile __PWM2INTFbits_t PWM2INTFbits;
3341
3342 #define _PWM2INTF_PRIF 0x01
3343 #define _PWM2INTF_PWM2PRIF 0x01
3344 #define _PWM2INTF_DCIF 0x02
3345 #define _PWM2INTF_PWM2DCIF 0x02
3346 #define _PWM2INTF_PHIF 0x04
3347 #define _PWM2INTF_PWM2PHIF 0x04
3348 #define _PWM2INTF_OFIF 0x08
3349 #define _PWM2INTF_PWM2OFIF 0x08
3350
3351 //==============================================================================
3352
3353
3354 //==============================================================================
3355 // PWM2INTFLG Bits
3356
3357 extern __at(0x0DAD) __sfr PWM2INTFLG;
3358
3359 typedef union
3360 {
3361 struct
3362 {
3363 unsigned PRIF : 1;
3364 unsigned DCIF : 1;
3365 unsigned PHIF : 1;
3366 unsigned OFIF : 1;
3367 unsigned : 1;
3368 unsigned : 1;
3369 unsigned : 1;
3370 unsigned : 1;
3371 };
3372
3373 struct
3374 {
3375 unsigned PWM2PRIF : 1;
3376 unsigned PWM2DCIF : 1;
3377 unsigned PWM2PHIF : 1;
3378 unsigned PWM2OFIF : 1;
3379 unsigned : 1;
3380 unsigned : 1;
3381 unsigned : 1;
3382 unsigned : 1;
3383 };
3384 } __PWM2INTFLGbits_t;
3385
3386 extern __at(0x0DAD) volatile __PWM2INTFLGbits_t PWM2INTFLGbits;
3387
3388 #define _PWM2INTFLG_PRIF 0x01
3389 #define _PWM2INTFLG_PWM2PRIF 0x01
3390 #define _PWM2INTFLG_DCIF 0x02
3391 #define _PWM2INTFLG_PWM2DCIF 0x02
3392 #define _PWM2INTFLG_PHIF 0x04
3393 #define _PWM2INTFLG_PWM2PHIF 0x04
3394 #define _PWM2INTFLG_OFIF 0x08
3395 #define _PWM2INTFLG_PWM2OFIF 0x08
3396
3397 //==============================================================================
3398
3399
3400 //==============================================================================
3401 // PWM2CLKCON Bits
3402
3403 extern __at(0x0DAE) __sfr PWM2CLKCON;
3404
3405 typedef union
3406 {
3407 struct
3408 {
3409 unsigned PWM2CS0 : 1;
3410 unsigned PWM2CS1 : 1;
3411 unsigned : 1;
3412 unsigned : 1;
3413 unsigned PWM2PS0 : 1;
3414 unsigned PWM2PS1 : 1;
3415 unsigned PWM2PS2 : 1;
3416 unsigned : 1;
3417 };
3418
3419 struct
3420 {
3421 unsigned CS0 : 1;
3422 unsigned CS1 : 1;
3423 unsigned : 1;
3424 unsigned : 1;
3425 unsigned PS0 : 1;
3426 unsigned PS1 : 1;
3427 unsigned PS2 : 1;
3428 unsigned : 1;
3429 };
3430
3431 struct
3432 {
3433 unsigned PWM2CS : 2;
3434 unsigned : 6;
3435 };
3436
3437 struct
3438 {
3439 unsigned CS : 2;
3440 unsigned : 6;
3441 };
3442
3443 struct
3444 {
3445 unsigned : 4;
3446 unsigned PWM2PS : 3;
3447 unsigned : 1;
3448 };
3449
3450 struct
3451 {
3452 unsigned : 4;
3453 unsigned PS : 3;
3454 unsigned : 1;
3455 };
3456 } __PWM2CLKCONbits_t;
3457
3458 extern __at(0x0DAE) volatile __PWM2CLKCONbits_t PWM2CLKCONbits;
3459
3460 #define _PWM2CLKCON_PWM2CS0 0x01
3461 #define _PWM2CLKCON_CS0 0x01
3462 #define _PWM2CLKCON_PWM2CS1 0x02
3463 #define _PWM2CLKCON_CS1 0x02
3464 #define _PWM2CLKCON_PWM2PS0 0x10
3465 #define _PWM2CLKCON_PS0 0x10
3466 #define _PWM2CLKCON_PWM2PS1 0x20
3467 #define _PWM2CLKCON_PS1 0x20
3468 #define _PWM2CLKCON_PWM2PS2 0x40
3469 #define _PWM2CLKCON_PS2 0x40
3470
3471 //==============================================================================
3472
3473
3474 //==============================================================================
3475 // PWM2LDCON Bits
3476
3477 extern __at(0x0DAF) __sfr PWM2LDCON;
3478
3479 typedef union
3480 {
3481 struct
3482 {
3483 unsigned PWM2LDS0 : 1;
3484 unsigned PWM2LDS1 : 1;
3485 unsigned : 1;
3486 unsigned : 1;
3487 unsigned : 1;
3488 unsigned : 1;
3489 unsigned LDT : 1;
3490 unsigned LDA : 1;
3491 };
3492
3493 struct
3494 {
3495 unsigned LDS0 : 1;
3496 unsigned LDS1 : 1;
3497 unsigned : 1;
3498 unsigned : 1;
3499 unsigned : 1;
3500 unsigned : 1;
3501 unsigned PWM2LDM : 1;
3502 unsigned PWM2LD : 1;
3503 };
3504
3505 struct
3506 {
3507 unsigned PWM2LDS : 2;
3508 unsigned : 6;
3509 };
3510
3511 struct
3512 {
3513 unsigned LDS : 2;
3514 unsigned : 6;
3515 };
3516 } __PWM2LDCONbits_t;
3517
3518 extern __at(0x0DAF) volatile __PWM2LDCONbits_t PWM2LDCONbits;
3519
3520 #define _PWM2LDCON_PWM2LDS0 0x01
3521 #define _PWM2LDCON_LDS0 0x01
3522 #define _PWM2LDCON_PWM2LDS1 0x02
3523 #define _PWM2LDCON_LDS1 0x02
3524 #define _PWM2LDCON_LDT 0x40
3525 #define _PWM2LDCON_PWM2LDM 0x40
3526 #define _PWM2LDCON_LDA 0x80
3527 #define _PWM2LDCON_PWM2LD 0x80
3528
3529 //==============================================================================
3530
3531
3532 //==============================================================================
3533 // PWM2OFCON Bits
3534
3535 extern __at(0x0DB0) __sfr PWM2OFCON;
3536
3537 typedef union
3538 {
3539 struct
3540 {
3541 unsigned PWM2OFS0 : 1;
3542 unsigned PWM2OFS1 : 1;
3543 unsigned : 1;
3544 unsigned : 1;
3545 unsigned OFO : 1;
3546 unsigned PWM2OFM0 : 1;
3547 unsigned PWM2OFM1 : 1;
3548 unsigned : 1;
3549 };
3550
3551 struct
3552 {
3553 unsigned OFS0 : 1;
3554 unsigned OFS1 : 1;
3555 unsigned : 1;
3556 unsigned : 1;
3557 unsigned PWM2OFMC : 1;
3558 unsigned OFM0 : 1;
3559 unsigned OFM1 : 1;
3560 unsigned : 1;
3561 };
3562
3563 struct
3564 {
3565 unsigned OFS : 2;
3566 unsigned : 6;
3567 };
3568
3569 struct
3570 {
3571 unsigned PWM2OFS : 2;
3572 unsigned : 6;
3573 };
3574
3575 struct
3576 {
3577 unsigned : 5;
3578 unsigned PWM2OFM : 2;
3579 unsigned : 1;
3580 };
3581
3582 struct
3583 {
3584 unsigned : 5;
3585 unsigned OFM : 2;
3586 unsigned : 1;
3587 };
3588 } __PWM2OFCONbits_t;
3589
3590 extern __at(0x0DB0) volatile __PWM2OFCONbits_t PWM2OFCONbits;
3591
3592 #define _PWM2OFCON_PWM2OFS0 0x01
3593 #define _PWM2OFCON_OFS0 0x01
3594 #define _PWM2OFCON_PWM2OFS1 0x02
3595 #define _PWM2OFCON_OFS1 0x02
3596 #define _PWM2OFCON_OFO 0x10
3597 #define _PWM2OFCON_PWM2OFMC 0x10
3598 #define _PWM2OFCON_PWM2OFM0 0x20
3599 #define _PWM2OFCON_OFM0 0x20
3600 #define _PWM2OFCON_PWM2OFM1 0x40
3601 #define _PWM2OFCON_OFM1 0x40
3602
3603 //==============================================================================
3604
3605 extern __at(0x0DB1) __sfr PWM3PH;
3606
3607 //==============================================================================
3608 // PWM3PHL Bits
3609
3610 extern __at(0x0DB1) __sfr PWM3PHL;
3611
3612 typedef struct
3613 {
3614 unsigned PWM3PHL0 : 1;
3615 unsigned PWM3PHL1 : 1;
3616 unsigned PWM3PHL2 : 1;
3617 unsigned PWM3PHL3 : 1;
3618 unsigned PWM3PHL4 : 1;
3619 unsigned PWM3PHL5 : 1;
3620 unsigned PWM3PHL6 : 1;
3621 unsigned PWM3PHL7 : 1;
3622 } __PWM3PHLbits_t;
3623
3624 extern __at(0x0DB1) volatile __PWM3PHLbits_t PWM3PHLbits;
3625
3626 #define _PWM3PHL0 0x01
3627 #define _PWM3PHL1 0x02
3628 #define _PWM3PHL2 0x04
3629 #define _PWM3PHL3 0x08
3630 #define _PWM3PHL4 0x10
3631 #define _PWM3PHL5 0x20
3632 #define _PWM3PHL6 0x40
3633 #define _PWM3PHL7 0x80
3634
3635 //==============================================================================
3636
3637
3638 //==============================================================================
3639 // PWM3PHH Bits
3640
3641 extern __at(0x0DB2) __sfr PWM3PHH;
3642
3643 typedef struct
3644 {
3645 unsigned PWM3PHH0 : 1;
3646 unsigned PWM3PHH1 : 1;
3647 unsigned PWM3PHH2 : 1;
3648 unsigned PWM3PHH3 : 1;
3649 unsigned PWM3PHH4 : 1;
3650 unsigned PWM3PHH5 : 1;
3651 unsigned PWM3PHH6 : 1;
3652 unsigned PWM3PHH7 : 1;
3653 } __PWM3PHHbits_t;
3654
3655 extern __at(0x0DB2) volatile __PWM3PHHbits_t PWM3PHHbits;
3656
3657 #define _PWM3PHH0 0x01
3658 #define _PWM3PHH1 0x02
3659 #define _PWM3PHH2 0x04
3660 #define _PWM3PHH3 0x08
3661 #define _PWM3PHH4 0x10
3662 #define _PWM3PHH5 0x20
3663 #define _PWM3PHH6 0x40
3664 #define _PWM3PHH7 0x80
3665
3666 //==============================================================================
3667
3668 extern __at(0x0DB3) __sfr PWM3DC;
3669
3670 //==============================================================================
3671 // PWM3DCL Bits
3672
3673 extern __at(0x0DB3) __sfr PWM3DCL;
3674
3675 typedef struct
3676 {
3677 unsigned PWM3DCL0 : 1;
3678 unsigned PWM3DCL1 : 1;
3679 unsigned PWM3DCL2 : 1;
3680 unsigned PWM3DCL3 : 1;
3681 unsigned PWM3DCL4 : 1;
3682 unsigned PWM3DCL5 : 1;
3683 unsigned PWM3DCL6 : 1;
3684 unsigned PWM3DCL7 : 1;
3685 } __PWM3DCLbits_t;
3686
3687 extern __at(0x0DB3) volatile __PWM3DCLbits_t PWM3DCLbits;
3688
3689 #define _PWM3DCL0 0x01
3690 #define _PWM3DCL1 0x02
3691 #define _PWM3DCL2 0x04
3692 #define _PWM3DCL3 0x08
3693 #define _PWM3DCL4 0x10
3694 #define _PWM3DCL5 0x20
3695 #define _PWM3DCL6 0x40
3696 #define _PWM3DCL7 0x80
3697
3698 //==============================================================================
3699
3700
3701 //==============================================================================
3702 // PWM3DCH Bits
3703
3704 extern __at(0x0DB4) __sfr PWM3DCH;
3705
3706 typedef struct
3707 {
3708 unsigned PWM3DCH0 : 1;
3709 unsigned PWM3DCH1 : 1;
3710 unsigned PWM3DCH2 : 1;
3711 unsigned PWM3DCH3 : 1;
3712 unsigned PWM3DCH4 : 1;
3713 unsigned PWM3DCH5 : 1;
3714 unsigned PWM3DCH6 : 1;
3715 unsigned PWM3DCH7 : 1;
3716 } __PWM3DCHbits_t;
3717
3718 extern __at(0x0DB4) volatile __PWM3DCHbits_t PWM3DCHbits;
3719
3720 #define _PWM3DCH0 0x01
3721 #define _PWM3DCH1 0x02
3722 #define _PWM3DCH2 0x04
3723 #define _PWM3DCH3 0x08
3724 #define _PWM3DCH4 0x10
3725 #define _PWM3DCH5 0x20
3726 #define _PWM3DCH6 0x40
3727 #define _PWM3DCH7 0x80
3728
3729 //==============================================================================
3730
3731 extern __at(0x0DB5) __sfr PWM3PR;
3732
3733 //==============================================================================
3734 // PWM3PRL Bits
3735
3736 extern __at(0x0DB5) __sfr PWM3PRL;
3737
3738 typedef struct
3739 {
3740 unsigned PWM3PRL0 : 1;
3741 unsigned PWM3PRL1 : 1;
3742 unsigned PWM3PRL2 : 1;
3743 unsigned PWM3PRL3 : 1;
3744 unsigned PWM3PRL4 : 1;
3745 unsigned PWM3PRL5 : 1;
3746 unsigned PWM3PRL6 : 1;
3747 unsigned PWM3PRL7 : 1;
3748 } __PWM3PRLbits_t;
3749
3750 extern __at(0x0DB5) volatile __PWM3PRLbits_t PWM3PRLbits;
3751
3752 #define _PWM3PRL0 0x01
3753 #define _PWM3PRL1 0x02
3754 #define _PWM3PRL2 0x04
3755 #define _PWM3PRL3 0x08
3756 #define _PWM3PRL4 0x10
3757 #define _PWM3PRL5 0x20
3758 #define _PWM3PRL6 0x40
3759 #define _PWM3PRL7 0x80
3760
3761 //==============================================================================
3762
3763
3764 //==============================================================================
3765 // PWM3PRH Bits
3766
3767 extern __at(0x0DB6) __sfr PWM3PRH;
3768
3769 typedef struct
3770 {
3771 unsigned PWM3PRH0 : 1;
3772 unsigned PWM3PRH1 : 1;
3773 unsigned PWM3PRH2 : 1;
3774 unsigned PWM3PRH3 : 1;
3775 unsigned PWM3PRH4 : 1;
3776 unsigned PWM3PRH5 : 1;
3777 unsigned PWM3PRH6 : 1;
3778 unsigned PWM3PRH7 : 1;
3779 } __PWM3PRHbits_t;
3780
3781 extern __at(0x0DB6) volatile __PWM3PRHbits_t PWM3PRHbits;
3782
3783 #define _PWM3PRH0 0x01
3784 #define _PWM3PRH1 0x02
3785 #define _PWM3PRH2 0x04
3786 #define _PWM3PRH3 0x08
3787 #define _PWM3PRH4 0x10
3788 #define _PWM3PRH5 0x20
3789 #define _PWM3PRH6 0x40
3790 #define _PWM3PRH7 0x80
3791
3792 //==============================================================================
3793
3794 extern __at(0x0DB7) __sfr PWM3OF;
3795
3796 //==============================================================================
3797 // PWM3OFL Bits
3798
3799 extern __at(0x0DB7) __sfr PWM3OFL;
3800
3801 typedef struct
3802 {
3803 unsigned PWM3OFL0 : 1;
3804 unsigned PWM3OFL1 : 1;
3805 unsigned PWM3OFL2 : 1;
3806 unsigned PWM3OFL3 : 1;
3807 unsigned PWM3OFL4 : 1;
3808 unsigned PWM3OFL5 : 1;
3809 unsigned PWM3OFL6 : 1;
3810 unsigned PWM3OFL7 : 1;
3811 } __PWM3OFLbits_t;
3812
3813 extern __at(0x0DB7) volatile __PWM3OFLbits_t PWM3OFLbits;
3814
3815 #define _PWM3OFL0 0x01
3816 #define _PWM3OFL1 0x02
3817 #define _PWM3OFL2 0x04
3818 #define _PWM3OFL3 0x08
3819 #define _PWM3OFL4 0x10
3820 #define _PWM3OFL5 0x20
3821 #define _PWM3OFL6 0x40
3822 #define _PWM3OFL7 0x80
3823
3824 //==============================================================================
3825
3826
3827 //==============================================================================
3828 // PWM3OFH Bits
3829
3830 extern __at(0x0DB8) __sfr PWM3OFH;
3831
3832 typedef struct
3833 {
3834 unsigned PWM3OFH0 : 1;
3835 unsigned PWM3OFH1 : 1;
3836 unsigned PWM3OFH2 : 1;
3837 unsigned PWM3OFH3 : 1;
3838 unsigned PWM3OFH4 : 1;
3839 unsigned PWM3OFH5 : 1;
3840 unsigned PWM3OFH6 : 1;
3841 unsigned PWM3OFH7 : 1;
3842 } __PWM3OFHbits_t;
3843
3844 extern __at(0x0DB8) volatile __PWM3OFHbits_t PWM3OFHbits;
3845
3846 #define _PWM3OFH0 0x01
3847 #define _PWM3OFH1 0x02
3848 #define _PWM3OFH2 0x04
3849 #define _PWM3OFH3 0x08
3850 #define _PWM3OFH4 0x10
3851 #define _PWM3OFH5 0x20
3852 #define _PWM3OFH6 0x40
3853 #define _PWM3OFH7 0x80
3854
3855 //==============================================================================
3856
3857 extern __at(0x0DB9) __sfr PWM3TMR;
3858
3859 //==============================================================================
3860 // PWM3TMRL Bits
3861
3862 extern __at(0x0DB9) __sfr PWM3TMRL;
3863
3864 typedef struct
3865 {
3866 unsigned PWM3TMRL0 : 1;
3867 unsigned PWM3TMRL1 : 1;
3868 unsigned PWM3TMRL2 : 1;
3869 unsigned PWM3TMRL3 : 1;
3870 unsigned PWM3TMRL4 : 1;
3871 unsigned PWM3TMRL5 : 1;
3872 unsigned PWM3TMRL6 : 1;
3873 unsigned PWM3TMRL7 : 1;
3874 } __PWM3TMRLbits_t;
3875
3876 extern __at(0x0DB9) volatile __PWM3TMRLbits_t PWM3TMRLbits;
3877
3878 #define _PWM3TMRL0 0x01
3879 #define _PWM3TMRL1 0x02
3880 #define _PWM3TMRL2 0x04
3881 #define _PWM3TMRL3 0x08
3882 #define _PWM3TMRL4 0x10
3883 #define _PWM3TMRL5 0x20
3884 #define _PWM3TMRL6 0x40
3885 #define _PWM3TMRL7 0x80
3886
3887 //==============================================================================
3888
3889
3890 //==============================================================================
3891 // PWM3TMRH Bits
3892
3893 extern __at(0x0DBA) __sfr PWM3TMRH;
3894
3895 typedef struct
3896 {
3897 unsigned PWM3TMRH0 : 1;
3898 unsigned PWM3TMRH1 : 1;
3899 unsigned PWM3TMRH2 : 1;
3900 unsigned PWM3TMRH3 : 1;
3901 unsigned PWM3TMRH4 : 1;
3902 unsigned PWM3TMRH5 : 1;
3903 unsigned PWM3TMRH6 : 1;
3904 unsigned PWM3TMRH7 : 1;
3905 } __PWM3TMRHbits_t;
3906
3907 extern __at(0x0DBA) volatile __PWM3TMRHbits_t PWM3TMRHbits;
3908
3909 #define _PWM3TMRH0 0x01
3910 #define _PWM3TMRH1 0x02
3911 #define _PWM3TMRH2 0x04
3912 #define _PWM3TMRH3 0x08
3913 #define _PWM3TMRH4 0x10
3914 #define _PWM3TMRH5 0x20
3915 #define _PWM3TMRH6 0x40
3916 #define _PWM3TMRH7 0x80
3917
3918 //==============================================================================
3919
3920
3921 //==============================================================================
3922 // PWM3CON Bits
3923
3924 extern __at(0x0DBB) __sfr PWM3CON;
3925
3926 typedef union
3927 {
3928 struct
3929 {
3930 unsigned : 1;
3931 unsigned : 1;
3932 unsigned PWM3MODE0 : 1;
3933 unsigned PWM3MODE1 : 1;
3934 unsigned POL : 1;
3935 unsigned OUT : 1;
3936 unsigned OE : 1;
3937 unsigned EN : 1;
3938 };
3939
3940 struct
3941 {
3942 unsigned : 1;
3943 unsigned : 1;
3944 unsigned MODE0 : 1;
3945 unsigned MODE1 : 1;
3946 unsigned PWM3POL : 1;
3947 unsigned PWM3OUT : 1;
3948 unsigned PWM3OE : 1;
3949 unsigned PWM3EN : 1;
3950 };
3951
3952 struct
3953 {
3954 unsigned : 2;
3955 unsigned PWM3MODE : 2;
3956 unsigned : 4;
3957 };
3958
3959 struct
3960 {
3961 unsigned : 2;
3962 unsigned MODE : 2;
3963 unsigned : 4;
3964 };
3965 } __PWM3CONbits_t;
3966
3967 extern __at(0x0DBB) volatile __PWM3CONbits_t PWM3CONbits;
3968
3969 #define _PWM3CON_PWM3MODE0 0x04
3970 #define _PWM3CON_MODE0 0x04
3971 #define _PWM3CON_PWM3MODE1 0x08
3972 #define _PWM3CON_MODE1 0x08
3973 #define _PWM3CON_POL 0x10
3974 #define _PWM3CON_PWM3POL 0x10
3975 #define _PWM3CON_OUT 0x20
3976 #define _PWM3CON_PWM3OUT 0x20
3977 #define _PWM3CON_OE 0x40
3978 #define _PWM3CON_PWM3OE 0x40
3979 #define _PWM3CON_EN 0x80
3980 #define _PWM3CON_PWM3EN 0x80
3981
3982 //==============================================================================
3983
3984
3985 //==============================================================================
3986 // PWM3INTCON Bits
3987
3988 extern __at(0x0DBC) __sfr PWM3INTCON;
3989
3990 typedef union
3991 {
3992 struct
3993 {
3994 unsigned PRIE : 1;
3995 unsigned DCIE : 1;
3996 unsigned PHIE : 1;
3997 unsigned OFIE : 1;
3998 unsigned : 1;
3999 unsigned : 1;
4000 unsigned : 1;
4001 unsigned : 1;
4002 };
4003
4004 struct
4005 {
4006 unsigned PWM3PRIE : 1;
4007 unsigned PWM3DCIE : 1;
4008 unsigned PWM3PHIE : 1;
4009 unsigned PWM3OFIE : 1;
4010 unsigned : 1;
4011 unsigned : 1;
4012 unsigned : 1;
4013 unsigned : 1;
4014 };
4015 } __PWM3INTCONbits_t;
4016
4017 extern __at(0x0DBC) volatile __PWM3INTCONbits_t PWM3INTCONbits;
4018
4019 #define _PWM3INTCON_PRIE 0x01
4020 #define _PWM3INTCON_PWM3PRIE 0x01
4021 #define _PWM3INTCON_DCIE 0x02
4022 #define _PWM3INTCON_PWM3DCIE 0x02
4023 #define _PWM3INTCON_PHIE 0x04
4024 #define _PWM3INTCON_PWM3PHIE 0x04
4025 #define _PWM3INTCON_OFIE 0x08
4026 #define _PWM3INTCON_PWM3OFIE 0x08
4027
4028 //==============================================================================
4029
4030
4031 //==============================================================================
4032 // PWM3INTE Bits
4033
4034 extern __at(0x0DBC) __sfr PWM3INTE;
4035
4036 typedef union
4037 {
4038 struct
4039 {
4040 unsigned PRIE : 1;
4041 unsigned DCIE : 1;
4042 unsigned PHIE : 1;
4043 unsigned OFIE : 1;
4044 unsigned : 1;
4045 unsigned : 1;
4046 unsigned : 1;
4047 unsigned : 1;
4048 };
4049
4050 struct
4051 {
4052 unsigned PWM3PRIE : 1;
4053 unsigned PWM3DCIE : 1;
4054 unsigned PWM3PHIE : 1;
4055 unsigned PWM3OFIE : 1;
4056 unsigned : 1;
4057 unsigned : 1;
4058 unsigned : 1;
4059 unsigned : 1;
4060 };
4061 } __PWM3INTEbits_t;
4062
4063 extern __at(0x0DBC) volatile __PWM3INTEbits_t PWM3INTEbits;
4064
4065 #define _PWM3INTE_PRIE 0x01
4066 #define _PWM3INTE_PWM3PRIE 0x01
4067 #define _PWM3INTE_DCIE 0x02
4068 #define _PWM3INTE_PWM3DCIE 0x02
4069 #define _PWM3INTE_PHIE 0x04
4070 #define _PWM3INTE_PWM3PHIE 0x04
4071 #define _PWM3INTE_OFIE 0x08
4072 #define _PWM3INTE_PWM3OFIE 0x08
4073
4074 //==============================================================================
4075
4076
4077 //==============================================================================
4078 // PWM3INTF Bits
4079
4080 extern __at(0x0DBD) __sfr PWM3INTF;
4081
4082 typedef union
4083 {
4084 struct
4085 {
4086 unsigned PRIF : 1;
4087 unsigned DCIF : 1;
4088 unsigned PHIF : 1;
4089 unsigned OFIF : 1;
4090 unsigned : 1;
4091 unsigned : 1;
4092 unsigned : 1;
4093 unsigned : 1;
4094 };
4095
4096 struct
4097 {
4098 unsigned PWM3PRIF : 1;
4099 unsigned PWM3DCIF : 1;
4100 unsigned PWM3PHIF : 1;
4101 unsigned PWM3OFIF : 1;
4102 unsigned : 1;
4103 unsigned : 1;
4104 unsigned : 1;
4105 unsigned : 1;
4106 };
4107 } __PWM3INTFbits_t;
4108
4109 extern __at(0x0DBD) volatile __PWM3INTFbits_t PWM3INTFbits;
4110
4111 #define _PWM3INTF_PRIF 0x01
4112 #define _PWM3INTF_PWM3PRIF 0x01
4113 #define _PWM3INTF_DCIF 0x02
4114 #define _PWM3INTF_PWM3DCIF 0x02
4115 #define _PWM3INTF_PHIF 0x04
4116 #define _PWM3INTF_PWM3PHIF 0x04
4117 #define _PWM3INTF_OFIF 0x08
4118 #define _PWM3INTF_PWM3OFIF 0x08
4119
4120 //==============================================================================
4121
4122
4123 //==============================================================================
4124 // PWM3INTFLG Bits
4125
4126 extern __at(0x0DBD) __sfr PWM3INTFLG;
4127
4128 typedef union
4129 {
4130 struct
4131 {
4132 unsigned PRIF : 1;
4133 unsigned DCIF : 1;
4134 unsigned PHIF : 1;
4135 unsigned OFIF : 1;
4136 unsigned : 1;
4137 unsigned : 1;
4138 unsigned : 1;
4139 unsigned : 1;
4140 };
4141
4142 struct
4143 {
4144 unsigned PWM3PRIF : 1;
4145 unsigned PWM3DCIF : 1;
4146 unsigned PWM3PHIF : 1;
4147 unsigned PWM3OFIF : 1;
4148 unsigned : 1;
4149 unsigned : 1;
4150 unsigned : 1;
4151 unsigned : 1;
4152 };
4153 } __PWM3INTFLGbits_t;
4154
4155 extern __at(0x0DBD) volatile __PWM3INTFLGbits_t PWM3INTFLGbits;
4156
4157 #define _PWM3INTFLG_PRIF 0x01
4158 #define _PWM3INTFLG_PWM3PRIF 0x01
4159 #define _PWM3INTFLG_DCIF 0x02
4160 #define _PWM3INTFLG_PWM3DCIF 0x02
4161 #define _PWM3INTFLG_PHIF 0x04
4162 #define _PWM3INTFLG_PWM3PHIF 0x04
4163 #define _PWM3INTFLG_OFIF 0x08
4164 #define _PWM3INTFLG_PWM3OFIF 0x08
4165
4166 //==============================================================================
4167
4168
4169 //==============================================================================
4170 // PWM3CLKCON Bits
4171
4172 extern __at(0x0DBE) __sfr PWM3CLKCON;
4173
4174 typedef union
4175 {
4176 struct
4177 {
4178 unsigned PWM3CS0 : 1;
4179 unsigned PWM3CS1 : 1;
4180 unsigned : 1;
4181 unsigned : 1;
4182 unsigned PWM3PS0 : 1;
4183 unsigned PWM3PS1 : 1;
4184 unsigned PWM3PS2 : 1;
4185 unsigned : 1;
4186 };
4187
4188 struct
4189 {
4190 unsigned CS0 : 1;
4191 unsigned CS1 : 1;
4192 unsigned : 1;
4193 unsigned : 1;
4194 unsigned PS0 : 1;
4195 unsigned PS1 : 1;
4196 unsigned PS2 : 1;
4197 unsigned : 1;
4198 };
4199
4200 struct
4201 {
4202 unsigned PWM3CS : 2;
4203 unsigned : 6;
4204 };
4205
4206 struct
4207 {
4208 unsigned CS : 2;
4209 unsigned : 6;
4210 };
4211
4212 struct
4213 {
4214 unsigned : 4;
4215 unsigned PWM3PS : 3;
4216 unsigned : 1;
4217 };
4218
4219 struct
4220 {
4221 unsigned : 4;
4222 unsigned PS : 3;
4223 unsigned : 1;
4224 };
4225 } __PWM3CLKCONbits_t;
4226
4227 extern __at(0x0DBE) volatile __PWM3CLKCONbits_t PWM3CLKCONbits;
4228
4229 #define _PWM3CLKCON_PWM3CS0 0x01
4230 #define _PWM3CLKCON_CS0 0x01
4231 #define _PWM3CLKCON_PWM3CS1 0x02
4232 #define _PWM3CLKCON_CS1 0x02
4233 #define _PWM3CLKCON_PWM3PS0 0x10
4234 #define _PWM3CLKCON_PS0 0x10
4235 #define _PWM3CLKCON_PWM3PS1 0x20
4236 #define _PWM3CLKCON_PS1 0x20
4237 #define _PWM3CLKCON_PWM3PS2 0x40
4238 #define _PWM3CLKCON_PS2 0x40
4239
4240 //==============================================================================
4241
4242
4243 //==============================================================================
4244 // PWM3LDCON Bits
4245
4246 extern __at(0x0DBF) __sfr PWM3LDCON;
4247
4248 typedef union
4249 {
4250 struct
4251 {
4252 unsigned PWM3LDS0 : 1;
4253 unsigned PWM3LDS1 : 1;
4254 unsigned : 1;
4255 unsigned : 1;
4256 unsigned : 1;
4257 unsigned : 1;
4258 unsigned LDT : 1;
4259 unsigned LDA : 1;
4260 };
4261
4262 struct
4263 {
4264 unsigned LDS0 : 1;
4265 unsigned LDS1 : 1;
4266 unsigned : 1;
4267 unsigned : 1;
4268 unsigned : 1;
4269 unsigned : 1;
4270 unsigned PWM3LDM : 1;
4271 unsigned PWM3LD : 1;
4272 };
4273
4274 struct
4275 {
4276 unsigned PWM3LDS : 2;
4277 unsigned : 6;
4278 };
4279
4280 struct
4281 {
4282 unsigned LDS : 2;
4283 unsigned : 6;
4284 };
4285 } __PWM3LDCONbits_t;
4286
4287 extern __at(0x0DBF) volatile __PWM3LDCONbits_t PWM3LDCONbits;
4288
4289 #define _PWM3LDCON_PWM3LDS0 0x01
4290 #define _PWM3LDCON_LDS0 0x01
4291 #define _PWM3LDCON_PWM3LDS1 0x02
4292 #define _PWM3LDCON_LDS1 0x02
4293 #define _PWM3LDCON_LDT 0x40
4294 #define _PWM3LDCON_PWM3LDM 0x40
4295 #define _PWM3LDCON_LDA 0x80
4296 #define _PWM3LDCON_PWM3LD 0x80
4297
4298 //==============================================================================
4299
4300
4301 //==============================================================================
4302 // PWM3OFCON Bits
4303
4304 extern __at(0x0DC0) __sfr PWM3OFCON;
4305
4306 typedef union
4307 {
4308 struct
4309 {
4310 unsigned PWM3OFS0 : 1;
4311 unsigned PWM3OFS1 : 1;
4312 unsigned : 1;
4313 unsigned : 1;
4314 unsigned OFO : 1;
4315 unsigned PWM3OFM0 : 1;
4316 unsigned PWM3OFM1 : 1;
4317 unsigned : 1;
4318 };
4319
4320 struct
4321 {
4322 unsigned OFS0 : 1;
4323 unsigned OFS1 : 1;
4324 unsigned : 1;
4325 unsigned : 1;
4326 unsigned PWM3OFMC : 1;
4327 unsigned OFM0 : 1;
4328 unsigned OFM1 : 1;
4329 unsigned : 1;
4330 };
4331
4332 struct
4333 {
4334 unsigned OFS : 2;
4335 unsigned : 6;
4336 };
4337
4338 struct
4339 {
4340 unsigned PWM3OFS : 2;
4341 unsigned : 6;
4342 };
4343
4344 struct
4345 {
4346 unsigned : 5;
4347 unsigned OFM : 2;
4348 unsigned : 1;
4349 };
4350
4351 struct
4352 {
4353 unsigned : 5;
4354 unsigned PWM3OFM : 2;
4355 unsigned : 1;
4356 };
4357 } __PWM3OFCONbits_t;
4358
4359 extern __at(0x0DC0) volatile __PWM3OFCONbits_t PWM3OFCONbits;
4360
4361 #define _PWM3OFCON_PWM3OFS0 0x01
4362 #define _PWM3OFCON_OFS0 0x01
4363 #define _PWM3OFCON_PWM3OFS1 0x02
4364 #define _PWM3OFCON_OFS1 0x02
4365 #define _PWM3OFCON_OFO 0x10
4366 #define _PWM3OFCON_PWM3OFMC 0x10
4367 #define _PWM3OFCON_PWM3OFM0 0x20
4368 #define _PWM3OFCON_OFM0 0x20
4369 #define _PWM3OFCON_PWM3OFM1 0x40
4370 #define _PWM3OFCON_OFM1 0x40
4371
4372 //==============================================================================
4373
4374
4375 //==============================================================================
4376 // STATUS_SHAD Bits
4377
4378 extern __at(0x0FE4) __sfr STATUS_SHAD;
4379
4380 typedef struct
4381 {
4382 unsigned C_SHAD : 1;
4383 unsigned DC_SHAD : 1;
4384 unsigned Z_SHAD : 1;
4385 unsigned : 1;
4386 unsigned : 1;
4387 unsigned : 1;
4388 unsigned : 1;
4389 unsigned : 1;
4390 } __STATUS_SHADbits_t;
4391
4392 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
4393
4394 #define _C_SHAD 0x01
4395 #define _DC_SHAD 0x02
4396 #define _Z_SHAD 0x04
4397
4398 //==============================================================================
4399
4400 extern __at(0x0FE5) __sfr WREG_SHAD;
4401 extern __at(0x0FE6) __sfr BSR_SHAD;
4402 extern __at(0x0FE7) __sfr PCLATH_SHAD;
4403 extern __at(0x0FE8) __sfr FSR0L_SHAD;
4404 extern __at(0x0FE8) __sfr FSR0_SHAD;
4405 extern __at(0x0FE9) __sfr FSR0H_SHAD;
4406 extern __at(0x0FEA) __sfr FSR1L_SHAD;
4407 extern __at(0x0FEA) __sfr FSR1_SHAD;
4408 extern __at(0x0FEB) __sfr FSR1H_SHAD;
4409 extern __at(0x0FED) __sfr STKPTR;
4410 extern __at(0x0FEE) __sfr TOS;
4411 extern __at(0x0FEE) __sfr TOSL;
4412 extern __at(0x0FEF) __sfr TOSH;
4413
4414 //==============================================================================
4415 //
4416 // Configuration Bits
4417 //
4418 //==============================================================================
4419
4420 #define _CONFIG1 0x8007
4421 #define _CONFIG2 0x8008
4422
4423 //----------------------------- CONFIG1 Options -------------------------------
4424
4425 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator; I/O function on CLKIN pin.
4426 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin.
4427 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin.
4428 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin.
4429 #define _WDTE_OFF 0x3FE7 // WDT disabled.
4430 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
4431 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
4432 #define _WDTE_ON 0x3FFF // WDT enabled.
4433 #define _PWRTE_ON 0x3FDF // PWRT enabled.
4434 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
4435 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
4436 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
4437 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
4438 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
4439 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
4440 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
4441 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
4442 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
4443 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
4444 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
4445
4446 //----------------------------- CONFIG2 Options -------------------------------
4447
4448 #define _WRT_ALL 0x3FFC // 000h to 3FFh write protected, no addresses may be modified by EECON control.
4449 #define _WRT_HALF 0x3FFD // 000h to 1FFh write protected, 200h to 3FFh may be modified by EECON control.
4450 #define _WRT_BOOT 0x3FFE // 000h to 0FFh write protected, 100h to 3FFh may be modified by EECON control.
4451 #define _WRT_OFF 0x3FFF // Write protection off.
4452 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled.
4453 #define _PLLEN_ON 0x3FFF // 4x PLL enabled.
4454 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
4455 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
4456 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
4457 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
4458 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
4459 #define _LPBOREN_ON 0x37FF // LPBOR is enabled.
4460 #define _LPBOREN_OFF 0x3FFF // LPBOR is disabled.
4461 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
4462 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
4463 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
4464 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
4465
4466 //==============================================================================
4467
4468 #define _DEVID1 0x8006
4469
4470 #define _IDLOC0 0x8000
4471 #define _IDLOC1 0x8001
4472 #define _IDLOC2 0x8002
4473 #define _IDLOC3 0x8003
4474
4475 //==============================================================================
4476
4477 #ifndef NO_BIT_DEFINES
4478
4479 #define ADON ADCON0bits.ADON // bit 0
4480 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
4481 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
4482 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
4483 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
4484 #define CHS0 ADCON0bits.CHS0 // bit 2
4485 #define CHS1 ADCON0bits.CHS1 // bit 3
4486 #define CHS2 ADCON0bits.CHS2 // bit 4
4487 #define CHS3 ADCON0bits.CHS3 // bit 5
4488 #define CHS4 ADCON0bits.CHS4 // bit 6
4489
4490 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
4491 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
4492 #define ADCS0 ADCON1bits.ADCS0 // bit 4
4493 #define ADCS1 ADCON1bits.ADCS1 // bit 5
4494 #define ADCS2 ADCON1bits.ADCS2 // bit 6
4495 #define ADFM ADCON1bits.ADFM // bit 7
4496
4497 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
4498 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
4499 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
4500 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
4501
4502 #define ANSA0 ANSELAbits.ANSA0 // bit 0
4503 #define ANSA1 ANSELAbits.ANSA1 // bit 1
4504 #define ANSA2 ANSELAbits.ANSA2 // bit 2
4505 #define ANSA4 ANSELAbits.ANSA4 // bit 4
4506
4507 #define P1SEL APFCONbits.P1SEL // bit 0
4508 #define P2SEL APFCONbits.P2SEL // bit 1
4509 #define T1GSEL APFCONbits.T1GSEL // bit 3
4510 #define CWGBSEL APFCONbits.CWGBSEL // bit 5
4511 #define CWGASEL APFCONbits.CWGASEL // bit 6
4512
4513 #define BORRDY BORCONbits.BORRDY // bit 0
4514 #define BORFS BORCONbits.BORFS // bit 6
4515 #define SBOREN BORCONbits.SBOREN // bit 7
4516
4517 #define BSR0 BSRbits.BSR0 // bit 0
4518 #define BSR1 BSRbits.BSR1 // bit 1
4519 #define BSR2 BSRbits.BSR2 // bit 2
4520 #define BSR3 BSRbits.BSR3 // bit 3
4521 #define BSR4 BSRbits.BSR4 // bit 4
4522
4523 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
4524 #define C1HYS CM1CON0bits.C1HYS // bit 1
4525 #define C1SP CM1CON0bits.C1SP // bit 2
4526 #define C1POL CM1CON0bits.C1POL // bit 4
4527 #define C1OE CM1CON0bits.C1OE // bit 5
4528 #define C1OUT CM1CON0bits.C1OUT // bit 6
4529 #define C1ON CM1CON0bits.C1ON // bit 7
4530
4531 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
4532 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
4533 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
4534 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
4535 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
4536 #define C1INTN CM1CON1bits.C1INTN // bit 6
4537 #define C1INTP CM1CON1bits.C1INTP // bit 7
4538
4539 #define MC1OUT CMOUTbits.MC1OUT // bit 0
4540
4541 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
4542 #define G1POLA CWG1CON0bits.G1POLA // bit 3
4543 #define G1POLB CWG1CON0bits.G1POLB // bit 4
4544 #define G1OEA CWG1CON0bits.G1OEA // bit 5
4545 #define G1OEB CWG1CON0bits.G1OEB // bit 6
4546 #define G1EN CWG1CON0bits.G1EN // bit 7
4547
4548 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
4549 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
4550 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
4551 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
4552 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
4553 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
4554 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
4555
4556 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1
4557 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
4558 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
4559 #define G1ASE CWG1CON2bits.G1ASE // bit 7
4560
4561 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
4562 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
4563 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
4564 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
4565 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
4566 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
4567
4568 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
4569 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
4570 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
4571 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
4572 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
4573 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
4574
4575 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2
4576 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3
4577 #define DACOE DACCON0bits.DACOE // bit 5
4578 #define DACLPS DACCON0bits.DACLPS // bit 6
4579 #define DACEN DACCON0bits.DACEN // bit 7
4580
4581 #define DACR0 DACCON1bits.DACR0 // bit 0
4582 #define DACR1 DACCON1bits.DACR1 // bit 1
4583 #define DACR2 DACCON1bits.DACR2 // bit 2
4584 #define DACR3 DACCON1bits.DACR3 // bit 3
4585 #define DACR4 DACCON1bits.DACR4 // bit 4
4586
4587 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
4588 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
4589 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
4590 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
4591 #define TSRNG FVRCONbits.TSRNG // bit 4
4592 #define TSEN FVRCONbits.TSEN // bit 5
4593 #define FVRRDY FVRCONbits.FVRRDY // bit 6
4594 #define FVREN FVRCONbits.FVREN // bit 7
4595
4596 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
4597 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
4598 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
4599 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
4600 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
4601 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
4602
4603 #define IOCIF INTCONbits.IOCIF // bit 0
4604 #define INTF INTCONbits.INTF // bit 1
4605 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
4606 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
4607 #define IOCIE INTCONbits.IOCIE // bit 3
4608 #define INTE INTCONbits.INTE // bit 4
4609 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
4610 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
4611 #define PEIE INTCONbits.PEIE // bit 6
4612 #define GIE INTCONbits.GIE // bit 7
4613
4614 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
4615 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
4616 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
4617 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
4618 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
4619 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
4620
4621 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
4622 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
4623 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
4624 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
4625 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
4626 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
4627
4628 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
4629 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
4630 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
4631 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
4632 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
4633 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
4634
4635 #define LATA0 LATAbits.LATA0 // bit 0
4636 #define LATA1 LATAbits.LATA1 // bit 1
4637 #define LATA2 LATAbits.LATA2 // bit 2
4638 #define LATA4 LATAbits.LATA4 // bit 4
4639 #define LATA5 LATAbits.LATA5 // bit 5
4640
4641 #define ODA0 ODCONAbits.ODA0 // bit 0
4642 #define ODA1 ODCONAbits.ODA1 // bit 1
4643 #define ODA2 ODCONAbits.ODA2 // bit 2
4644 #define ODA4 ODCONAbits.ODA4 // bit 4
4645 #define ODA5 ODCONAbits.ODA5 // bit 5
4646
4647 #define PS0 OPTION_REGbits.PS0 // bit 0
4648 #define PS1 OPTION_REGbits.PS1 // bit 1
4649 #define PS2 OPTION_REGbits.PS2 // bit 2
4650 #define PSA OPTION_REGbits.PSA // bit 3
4651 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
4652 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
4653 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
4654 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
4655 #define INTEDG OPTION_REGbits.INTEDG // bit 6
4656 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
4657
4658 #define SCS0 OSCCONbits.SCS0 // bit 0
4659 #define SCS1 OSCCONbits.SCS1 // bit 1
4660 #define IRCF0 OSCCONbits.IRCF0 // bit 3
4661 #define IRCF1 OSCCONbits.IRCF1 // bit 4
4662 #define IRCF2 OSCCONbits.IRCF2 // bit 5
4663 #define IRCF3 OSCCONbits.IRCF3 // bit 6
4664 #define SPLLEN OSCCONbits.SPLLEN // bit 7
4665
4666 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
4667 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
4668 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
4669 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
4670 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
4671 #define OSTS OSCSTATbits.OSTS // bit 5
4672 #define PLLR OSCSTATbits.PLLR // bit 6
4673
4674 #define TUN0 OSCTUNEbits.TUN0 // bit 0
4675 #define TUN1 OSCTUNEbits.TUN1 // bit 1
4676 #define TUN2 OSCTUNEbits.TUN2 // bit 2
4677 #define TUN3 OSCTUNEbits.TUN3 // bit 3
4678 #define TUN4 OSCTUNEbits.TUN4 // bit 4
4679 #define TUN5 OSCTUNEbits.TUN5 // bit 5
4680
4681 #define NOT_BOR PCONbits.NOT_BOR // bit 0
4682 #define NOT_POR PCONbits.NOT_POR // bit 1
4683 #define NOT_RI PCONbits.NOT_RI // bit 2
4684 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
4685 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
4686 #define STKUNF PCONbits.STKUNF // bit 6
4687 #define STKOVF PCONbits.STKOVF // bit 7
4688
4689 #define TMR1IE PIE1bits.TMR1IE // bit 0
4690 #define TMR2IE PIE1bits.TMR2IE // bit 1
4691 #define ADIE PIE1bits.ADIE // bit 6
4692 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
4693
4694 #define C1IE PIE2bits.C1IE // bit 5
4695
4696 #define PWM1IE PIE3bits.PWM1IE // bit 4
4697 #define PWM2IE PIE3bits.PWM2IE // bit 5
4698 #define PWM3IE PIE3bits.PWM3IE // bit 6
4699
4700 #define TMR1IF PIR1bits.TMR1IF // bit 0
4701 #define TMR2IF PIR1bits.TMR2IF // bit 1
4702 #define ADIF PIR1bits.ADIF // bit 6
4703 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
4704
4705 #define C1IF PIR2bits.C1IF // bit 5
4706
4707 #define PWM1IF PIR3bits.PWM1IF // bit 4
4708 #define PWM2IF PIR3bits.PWM2IF // bit 5
4709 #define PWM3IF PIR3bits.PWM3IF // bit 6
4710
4711 #define RD PMCON1bits.RD // bit 0
4712 #define WR PMCON1bits.WR // bit 1
4713 #define WREN PMCON1bits.WREN // bit 2
4714 #define WRERR PMCON1bits.WRERR // bit 3
4715 #define FREE PMCON1bits.FREE // bit 4
4716 #define LWLO PMCON1bits.LWLO // bit 5
4717 #define CFGS PMCON1bits.CFGS // bit 6
4718
4719 #define RA0 PORTAbits.RA0 // bit 0
4720 #define RA1 PORTAbits.RA1 // bit 1
4721 #define RA2 PORTAbits.RA2 // bit 2
4722 #define RA3 PORTAbits.RA3 // bit 3
4723 #define RA4 PORTAbits.RA4 // bit 4
4724 #define RA5 PORTAbits.RA5 // bit 5
4725
4726 #define PWM1MODE0 PWM1CONbits.PWM1MODE0 // bit 2, shadows bit in PWM1CONbits
4727 #define MODE0 PWM1CONbits.MODE0 // bit 2, shadows bit in PWM1CONbits
4728 #define PWM1MODE1 PWM1CONbits.PWM1MODE1 // bit 3, shadows bit in PWM1CONbits
4729 #define MODE1 PWM1CONbits.MODE1 // bit 3, shadows bit in PWM1CONbits
4730 #define POL PWM1CONbits.POL // bit 4, shadows bit in PWM1CONbits
4731 #define PWM1POL PWM1CONbits.PWM1POL // bit 4, shadows bit in PWM1CONbits
4732 #define OUT PWM1CONbits.OUT // bit 5, shadows bit in PWM1CONbits
4733 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5, shadows bit in PWM1CONbits
4734 #define OE PWM1CONbits.OE // bit 6, shadows bit in PWM1CONbits
4735 #define PWM1OE PWM1CONbits.PWM1OE // bit 6, shadows bit in PWM1CONbits
4736 #define EN PWM1CONbits.EN // bit 7, shadows bit in PWM1CONbits
4737 #define PWM1EN PWM1CONbits.PWM1EN // bit 7, shadows bit in PWM1CONbits
4738
4739 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
4740 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
4741 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
4742 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
4743 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
4744 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
4745 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
4746 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
4747
4748 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 0
4749 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 1
4750 #define PWM1DCL2 PWM1DCLbits.PWM1DCL2 // bit 2
4751 #define PWM1DCL3 PWM1DCLbits.PWM1DCL3 // bit 3
4752 #define PWM1DCL4 PWM1DCLbits.PWM1DCL4 // bit 4
4753 #define PWM1DCL5 PWM1DCLbits.PWM1DCL5 // bit 5
4754 #define PWM1DCL6 PWM1DCLbits.PWM1DCL6 // bit 6
4755 #define PWM1DCL7 PWM1DCLbits.PWM1DCL7 // bit 7
4756
4757 #define PRIE PWM1INTCONbits.PRIE // bit 0, shadows bit in PWM1INTCONbits
4758 #define PWM1PRIE PWM1INTCONbits.PWM1PRIE // bit 0, shadows bit in PWM1INTCONbits
4759 #define DCIE PWM1INTCONbits.DCIE // bit 1, shadows bit in PWM1INTCONbits
4760 #define PWM1DCIE PWM1INTCONbits.PWM1DCIE // bit 1, shadows bit in PWM1INTCONbits
4761 #define PHIE PWM1INTCONbits.PHIE // bit 2, shadows bit in PWM1INTCONbits
4762 #define PWM1PHIE PWM1INTCONbits.PWM1PHIE // bit 2, shadows bit in PWM1INTCONbits
4763 #define OFIE PWM1INTCONbits.OFIE // bit 3, shadows bit in PWM1INTCONbits
4764 #define PWM1OFIE PWM1INTCONbits.PWM1OFIE // bit 3, shadows bit in PWM1INTCONbits
4765
4766 #define PRIF PWM1INTFbits.PRIF // bit 0, shadows bit in PWM1INTFbits
4767 #define PWM1PRIF PWM1INTFbits.PWM1PRIF // bit 0, shadows bit in PWM1INTFbits
4768 #define DCIF PWM1INTFbits.DCIF // bit 1, shadows bit in PWM1INTFbits
4769 #define PWM1DCIF PWM1INTFbits.PWM1DCIF // bit 1, shadows bit in PWM1INTFbits
4770 #define PHIF PWM1INTFbits.PHIF // bit 2, shadows bit in PWM1INTFbits
4771 #define PWM1PHIF PWM1INTFbits.PWM1PHIF // bit 2, shadows bit in PWM1INTFbits
4772 #define OFIF PWM1INTFbits.OFIF // bit 3, shadows bit in PWM1INTFbits
4773 #define PWM1OFIF PWM1INTFbits.PWM1OFIF // bit 3, shadows bit in PWM1INTFbits
4774
4775 #define PWM1LDS0 PWM1LDCONbits.PWM1LDS0 // bit 0, shadows bit in PWM1LDCONbits
4776 #define LDS0 PWM1LDCONbits.LDS0 // bit 0, shadows bit in PWM1LDCONbits
4777 #define PWM1LDS1 PWM1LDCONbits.PWM1LDS1 // bit 1, shadows bit in PWM1LDCONbits
4778 #define LDS1 PWM1LDCONbits.LDS1 // bit 1, shadows bit in PWM1LDCONbits
4779 #define LDT PWM1LDCONbits.LDT // bit 6, shadows bit in PWM1LDCONbits
4780 #define PWM1LDM PWM1LDCONbits.PWM1LDM // bit 6, shadows bit in PWM1LDCONbits
4781 #define LDA PWM1LDCONbits.LDA // bit 7, shadows bit in PWM1LDCONbits
4782 #define PWM1LD PWM1LDCONbits.PWM1LD // bit 7, shadows bit in PWM1LDCONbits
4783
4784 #define PWM1OFS0 PWM1OFCONbits.PWM1OFS0 // bit 0, shadows bit in PWM1OFCONbits
4785 #define OFS0 PWM1OFCONbits.OFS0 // bit 0, shadows bit in PWM1OFCONbits
4786 #define PWM1OFS1 PWM1OFCONbits.PWM1OFS1 // bit 1, shadows bit in PWM1OFCONbits
4787 #define OFS1 PWM1OFCONbits.OFS1 // bit 1, shadows bit in PWM1OFCONbits
4788 #define OFO PWM1OFCONbits.OFO // bit 4, shadows bit in PWM1OFCONbits
4789 #define PWM1OFMC PWM1OFCONbits.PWM1OFMC // bit 4, shadows bit in PWM1OFCONbits
4790 #define PWM1OFM0 PWM1OFCONbits.PWM1OFM0 // bit 5, shadows bit in PWM1OFCONbits
4791 #define OFM0 PWM1OFCONbits.OFM0 // bit 5, shadows bit in PWM1OFCONbits
4792 #define PWM1OFM1 PWM1OFCONbits.PWM1OFM1 // bit 6, shadows bit in PWM1OFCONbits
4793 #define OFM1 PWM1OFCONbits.OFM1 // bit 6, shadows bit in PWM1OFCONbits
4794
4795 #define PWM1OFH0 PWM1OFHbits.PWM1OFH0 // bit 0
4796 #define PWM1OFH1 PWM1OFHbits.PWM1OFH1 // bit 1
4797 #define PWM1OFH2 PWM1OFHbits.PWM1OFH2 // bit 2
4798 #define PWM1OFH3 PWM1OFHbits.PWM1OFH3 // bit 3
4799 #define PWM1OFH4 PWM1OFHbits.PWM1OFH4 // bit 4
4800 #define PWM1OFH5 PWM1OFHbits.PWM1OFH5 // bit 5
4801 #define PWM1OFH6 PWM1OFHbits.PWM1OFH6 // bit 6
4802 #define PWM1OFH7 PWM1OFHbits.PWM1OFH7 // bit 7
4803
4804 #define PWM1OFL0 PWM1OFLbits.PWM1OFL0 // bit 0
4805 #define PWM1OFL1 PWM1OFLbits.PWM1OFL1 // bit 1
4806 #define PWM1OFL2 PWM1OFLbits.PWM1OFL2 // bit 2
4807 #define PWM1OFL3 PWM1OFLbits.PWM1OFL3 // bit 3
4808 #define PWM1OFL4 PWM1OFLbits.PWM1OFL4 // bit 4
4809 #define PWM1OFL5 PWM1OFLbits.PWM1OFL5 // bit 5
4810 #define PWM1OFL6 PWM1OFLbits.PWM1OFL6 // bit 6
4811 #define PWM1OFL7 PWM1OFLbits.PWM1OFL7 // bit 7
4812
4813 #define PWM1PHH0 PWM1PHHbits.PWM1PHH0 // bit 0
4814 #define PWM1PHH1 PWM1PHHbits.PWM1PHH1 // bit 1
4815 #define PWM1PHH2 PWM1PHHbits.PWM1PHH2 // bit 2
4816 #define PWM1PHH3 PWM1PHHbits.PWM1PHH3 // bit 3
4817 #define PWM1PHH4 PWM1PHHbits.PWM1PHH4 // bit 4
4818 #define PWM1PHH5 PWM1PHHbits.PWM1PHH5 // bit 5
4819 #define PWM1PHH6 PWM1PHHbits.PWM1PHH6 // bit 6
4820 #define PWM1PHH7 PWM1PHHbits.PWM1PHH7 // bit 7
4821
4822 #define PWM1PHL0 PWM1PHLbits.PWM1PHL0 // bit 0
4823 #define PWM1PHL1 PWM1PHLbits.PWM1PHL1 // bit 1
4824 #define PWM1PHL2 PWM1PHLbits.PWM1PHL2 // bit 2
4825 #define PWM1PHL3 PWM1PHLbits.PWM1PHL3 // bit 3
4826 #define PWM1PHL4 PWM1PHLbits.PWM1PHL4 // bit 4
4827 #define PWM1PHL5 PWM1PHLbits.PWM1PHL5 // bit 5
4828 #define PWM1PHL6 PWM1PHLbits.PWM1PHL6 // bit 6
4829 #define PWM1PHL7 PWM1PHLbits.PWM1PHL7 // bit 7
4830
4831 #define PWM1PRH0 PWM1PRHbits.PWM1PRH0 // bit 0
4832 #define PWM1PRH1 PWM1PRHbits.PWM1PRH1 // bit 1
4833 #define PWM1PRH2 PWM1PRHbits.PWM1PRH2 // bit 2
4834 #define PWM1PRH3 PWM1PRHbits.PWM1PRH3 // bit 3
4835 #define PWM1PRH4 PWM1PRHbits.PWM1PRH4 // bit 4
4836 #define PWM1PRH5 PWM1PRHbits.PWM1PRH5 // bit 5
4837 #define PWM1PRH6 PWM1PRHbits.PWM1PRH6 // bit 6
4838 #define PWM1PRH7 PWM1PRHbits.PWM1PRH7 // bit 7
4839
4840 #define PWM1PRL0 PWM1PRLbits.PWM1PRL0 // bit 0
4841 #define PWM1PRL1 PWM1PRLbits.PWM1PRL1 // bit 1
4842 #define PWM1PRL2 PWM1PRLbits.PWM1PRL2 // bit 2
4843 #define PWM1PRL3 PWM1PRLbits.PWM1PRL3 // bit 3
4844 #define PWM1PRL4 PWM1PRLbits.PWM1PRL4 // bit 4
4845 #define PWM1PRL5 PWM1PRLbits.PWM1PRL5 // bit 5
4846 #define PWM1PRL6 PWM1PRLbits.PWM1PRL6 // bit 6
4847 #define PWM1PRL7 PWM1PRLbits.PWM1PRL7 // bit 7
4848
4849 #define PWM1TMRH0 PWM1TMRHbits.PWM1TMRH0 // bit 0
4850 #define PWM1TMRH1 PWM1TMRHbits.PWM1TMRH1 // bit 1
4851 #define PWM1TMRH2 PWM1TMRHbits.PWM1TMRH2 // bit 2
4852 #define PWM1TMRH3 PWM1TMRHbits.PWM1TMRH3 // bit 3
4853 #define PWM1TMRH4 PWM1TMRHbits.PWM1TMRH4 // bit 4
4854 #define PWM1TMRH5 PWM1TMRHbits.PWM1TMRH5 // bit 5
4855 #define PWM1TMRH6 PWM1TMRHbits.PWM1TMRH6 // bit 6
4856 #define PWM1TMRH7 PWM1TMRHbits.PWM1TMRH7 // bit 7
4857
4858 #define PWM1TMRL0 PWM1TMRLbits.PWM1TMRL0 // bit 0
4859 #define PWM1TMRL1 PWM1TMRLbits.PWM1TMRL1 // bit 1
4860 #define PWM1TMRL2 PWM1TMRLbits.PWM1TMRL2 // bit 2
4861 #define PWM1TMRL3 PWM1TMRLbits.PWM1TMRL3 // bit 3
4862 #define PWM1TMRL4 PWM1TMRLbits.PWM1TMRL4 // bit 4
4863 #define PWM1TMRL5 PWM1TMRLbits.PWM1TMRL5 // bit 5
4864 #define PWM1TMRL6 PWM1TMRLbits.PWM1TMRL6 // bit 6
4865 #define PWM1TMRL7 PWM1TMRLbits.PWM1TMRL7 // bit 7
4866
4867 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
4868 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
4869 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
4870 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
4871 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
4872 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
4873 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
4874 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
4875
4876 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 0
4877 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 1
4878 #define PWM2DCL2 PWM2DCLbits.PWM2DCL2 // bit 2
4879 #define PWM2DCL3 PWM2DCLbits.PWM2DCL3 // bit 3
4880 #define PWM2DCL4 PWM2DCLbits.PWM2DCL4 // bit 4
4881 #define PWM2DCL5 PWM2DCLbits.PWM2DCL5 // bit 5
4882 #define PWM2DCL6 PWM2DCLbits.PWM2DCL6 // bit 6
4883 #define PWM2DCL7 PWM2DCLbits.PWM2DCL7 // bit 7
4884
4885 #define PWM2OFH0 PWM2OFHbits.PWM2OFH0 // bit 0
4886 #define PWM2OFH1 PWM2OFHbits.PWM2OFH1 // bit 1
4887 #define PWM2OFH2 PWM2OFHbits.PWM2OFH2 // bit 2
4888 #define PWM2OFH3 PWM2OFHbits.PWM2OFH3 // bit 3
4889 #define PWM2OFH4 PWM2OFHbits.PWM2OFH4 // bit 4
4890 #define PWM2OFH5 PWM2OFHbits.PWM2OFH5 // bit 5
4891 #define PWM2OFH6 PWM2OFHbits.PWM2OFH6 // bit 6
4892 #define PWM2OFH7 PWM2OFHbits.PWM2OFH7 // bit 7
4893
4894 #define PWM2OFL0 PWM2OFLbits.PWM2OFL0 // bit 0
4895 #define PWM2OFL1 PWM2OFLbits.PWM2OFL1 // bit 1
4896 #define PWM2OFL2 PWM2OFLbits.PWM2OFL2 // bit 2
4897 #define PWM2OFL3 PWM2OFLbits.PWM2OFL3 // bit 3
4898 #define PWM2OFL4 PWM2OFLbits.PWM2OFL4 // bit 4
4899 #define PWM2OFL5 PWM2OFLbits.PWM2OFL5 // bit 5
4900 #define PWM2OFL6 PWM2OFLbits.PWM2OFL6 // bit 6
4901 #define PWM2OFL7 PWM2OFLbits.PWM2OFL7 // bit 7
4902
4903 #define PWM2PHH0 PWM2PHHbits.PWM2PHH0 // bit 0
4904 #define PWM2PHH1 PWM2PHHbits.PWM2PHH1 // bit 1
4905 #define PWM2PHH2 PWM2PHHbits.PWM2PHH2 // bit 2
4906 #define PWM2PHH3 PWM2PHHbits.PWM2PHH3 // bit 3
4907 #define PWM2PHH4 PWM2PHHbits.PWM2PHH4 // bit 4
4908 #define PWM2PHH5 PWM2PHHbits.PWM2PHH5 // bit 5
4909 #define PWM2PHH6 PWM2PHHbits.PWM2PHH6 // bit 6
4910 #define PWM2PHH7 PWM2PHHbits.PWM2PHH7 // bit 7
4911
4912 #define PWM2PHL0 PWM2PHLbits.PWM2PHL0 // bit 0
4913 #define PWM2PHL1 PWM2PHLbits.PWM2PHL1 // bit 1
4914 #define PWM2PHL2 PWM2PHLbits.PWM2PHL2 // bit 2
4915 #define PWM2PHL3 PWM2PHLbits.PWM2PHL3 // bit 3
4916 #define PWM2PHL4 PWM2PHLbits.PWM2PHL4 // bit 4
4917 #define PWM2PHL5 PWM2PHLbits.PWM2PHL5 // bit 5
4918 #define PWM2PHL6 PWM2PHLbits.PWM2PHL6 // bit 6
4919 #define PWM2PHL7 PWM2PHLbits.PWM2PHL7 // bit 7
4920
4921 #define PWM2PRH0 PWM2PRHbits.PWM2PRH0 // bit 0
4922 #define PWM2PRH1 PWM2PRHbits.PWM2PRH1 // bit 1
4923 #define PWM2PRH2 PWM2PRHbits.PWM2PRH2 // bit 2
4924 #define PWM2PRH3 PWM2PRHbits.PWM2PRH3 // bit 3
4925 #define PWM2PRH4 PWM2PRHbits.PWM2PRH4 // bit 4
4926 #define PWM2PRH5 PWM2PRHbits.PWM2PRH5 // bit 5
4927 #define PWM2PRH6 PWM2PRHbits.PWM2PRH6 // bit 6
4928 #define PWM2PRH7 PWM2PRHbits.PWM2PRH7 // bit 7
4929
4930 #define PWM2PRL0 PWM2PRLbits.PWM2PRL0 // bit 0
4931 #define PWM2PRL1 PWM2PRLbits.PWM2PRL1 // bit 1
4932 #define PWM2PRL2 PWM2PRLbits.PWM2PRL2 // bit 2
4933 #define PWM2PRL3 PWM2PRLbits.PWM2PRL3 // bit 3
4934 #define PWM2PRL4 PWM2PRLbits.PWM2PRL4 // bit 4
4935 #define PWM2PRL5 PWM2PRLbits.PWM2PRL5 // bit 5
4936 #define PWM2PRL6 PWM2PRLbits.PWM2PRL6 // bit 6
4937 #define PWM2PRL7 PWM2PRLbits.PWM2PRL7 // bit 7
4938
4939 #define PWM2TMRH0 PWM2TMRHbits.PWM2TMRH0 // bit 0
4940 #define PWM2TMRH1 PWM2TMRHbits.PWM2TMRH1 // bit 1
4941 #define PWM2TMRH2 PWM2TMRHbits.PWM2TMRH2 // bit 2
4942 #define PWM2TMRH3 PWM2TMRHbits.PWM2TMRH3 // bit 3
4943 #define PWM2TMRH4 PWM2TMRHbits.PWM2TMRH4 // bit 4
4944 #define PWM2TMRH5 PWM2TMRHbits.PWM2TMRH5 // bit 5
4945 #define PWM2TMRH6 PWM2TMRHbits.PWM2TMRH6 // bit 6
4946 #define PWM2TMRH7 PWM2TMRHbits.PWM2TMRH7 // bit 7
4947
4948 #define PWM2TMRL0 PWM2TMRLbits.PWM2TMRL0 // bit 0
4949 #define PWM2TMRL1 PWM2TMRLbits.PWM2TMRL1 // bit 1
4950 #define PWM2TMRL2 PWM2TMRLbits.PWM2TMRL2 // bit 2
4951 #define PWM2TMRL3 PWM2TMRLbits.PWM2TMRL3 // bit 3
4952 #define PWM2TMRL4 PWM2TMRLbits.PWM2TMRL4 // bit 4
4953 #define PWM2TMRL5 PWM2TMRLbits.PWM2TMRL5 // bit 5
4954 #define PWM2TMRL6 PWM2TMRLbits.PWM2TMRL6 // bit 6
4955 #define PWM2TMRL7 PWM2TMRLbits.PWM2TMRL7 // bit 7
4956
4957 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
4958 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
4959 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
4960 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
4961 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
4962 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
4963 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
4964 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
4965
4966 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 0
4967 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 1
4968 #define PWM3DCL2 PWM3DCLbits.PWM3DCL2 // bit 2
4969 #define PWM3DCL3 PWM3DCLbits.PWM3DCL3 // bit 3
4970 #define PWM3DCL4 PWM3DCLbits.PWM3DCL4 // bit 4
4971 #define PWM3DCL5 PWM3DCLbits.PWM3DCL5 // bit 5
4972 #define PWM3DCL6 PWM3DCLbits.PWM3DCL6 // bit 6
4973 #define PWM3DCL7 PWM3DCLbits.PWM3DCL7 // bit 7
4974
4975 #define PWM3OFH0 PWM3OFHbits.PWM3OFH0 // bit 0
4976 #define PWM3OFH1 PWM3OFHbits.PWM3OFH1 // bit 1
4977 #define PWM3OFH2 PWM3OFHbits.PWM3OFH2 // bit 2
4978 #define PWM3OFH3 PWM3OFHbits.PWM3OFH3 // bit 3
4979 #define PWM3OFH4 PWM3OFHbits.PWM3OFH4 // bit 4
4980 #define PWM3OFH5 PWM3OFHbits.PWM3OFH5 // bit 5
4981 #define PWM3OFH6 PWM3OFHbits.PWM3OFH6 // bit 6
4982 #define PWM3OFH7 PWM3OFHbits.PWM3OFH7 // bit 7
4983
4984 #define PWM3OFL0 PWM3OFLbits.PWM3OFL0 // bit 0
4985 #define PWM3OFL1 PWM3OFLbits.PWM3OFL1 // bit 1
4986 #define PWM3OFL2 PWM3OFLbits.PWM3OFL2 // bit 2
4987 #define PWM3OFL3 PWM3OFLbits.PWM3OFL3 // bit 3
4988 #define PWM3OFL4 PWM3OFLbits.PWM3OFL4 // bit 4
4989 #define PWM3OFL5 PWM3OFLbits.PWM3OFL5 // bit 5
4990 #define PWM3OFL6 PWM3OFLbits.PWM3OFL6 // bit 6
4991 #define PWM3OFL7 PWM3OFLbits.PWM3OFL7 // bit 7
4992
4993 #define PWM3PHH0 PWM3PHHbits.PWM3PHH0 // bit 0
4994 #define PWM3PHH1 PWM3PHHbits.PWM3PHH1 // bit 1
4995 #define PWM3PHH2 PWM3PHHbits.PWM3PHH2 // bit 2
4996 #define PWM3PHH3 PWM3PHHbits.PWM3PHH3 // bit 3
4997 #define PWM3PHH4 PWM3PHHbits.PWM3PHH4 // bit 4
4998 #define PWM3PHH5 PWM3PHHbits.PWM3PHH5 // bit 5
4999 #define PWM3PHH6 PWM3PHHbits.PWM3PHH6 // bit 6
5000 #define PWM3PHH7 PWM3PHHbits.PWM3PHH7 // bit 7
5001
5002 #define PWM3PHL0 PWM3PHLbits.PWM3PHL0 // bit 0
5003 #define PWM3PHL1 PWM3PHLbits.PWM3PHL1 // bit 1
5004 #define PWM3PHL2 PWM3PHLbits.PWM3PHL2 // bit 2
5005 #define PWM3PHL3 PWM3PHLbits.PWM3PHL3 // bit 3
5006 #define PWM3PHL4 PWM3PHLbits.PWM3PHL4 // bit 4
5007 #define PWM3PHL5 PWM3PHLbits.PWM3PHL5 // bit 5
5008 #define PWM3PHL6 PWM3PHLbits.PWM3PHL6 // bit 6
5009 #define PWM3PHL7 PWM3PHLbits.PWM3PHL7 // bit 7
5010
5011 #define PWM3PRH0 PWM3PRHbits.PWM3PRH0 // bit 0
5012 #define PWM3PRH1 PWM3PRHbits.PWM3PRH1 // bit 1
5013 #define PWM3PRH2 PWM3PRHbits.PWM3PRH2 // bit 2
5014 #define PWM3PRH3 PWM3PRHbits.PWM3PRH3 // bit 3
5015 #define PWM3PRH4 PWM3PRHbits.PWM3PRH4 // bit 4
5016 #define PWM3PRH5 PWM3PRHbits.PWM3PRH5 // bit 5
5017 #define PWM3PRH6 PWM3PRHbits.PWM3PRH6 // bit 6
5018 #define PWM3PRH7 PWM3PRHbits.PWM3PRH7 // bit 7
5019
5020 #define PWM3PRL0 PWM3PRLbits.PWM3PRL0 // bit 0
5021 #define PWM3PRL1 PWM3PRLbits.PWM3PRL1 // bit 1
5022 #define PWM3PRL2 PWM3PRLbits.PWM3PRL2 // bit 2
5023 #define PWM3PRL3 PWM3PRLbits.PWM3PRL3 // bit 3
5024 #define PWM3PRL4 PWM3PRLbits.PWM3PRL4 // bit 4
5025 #define PWM3PRL5 PWM3PRLbits.PWM3PRL5 // bit 5
5026 #define PWM3PRL6 PWM3PRLbits.PWM3PRL6 // bit 6
5027 #define PWM3PRL7 PWM3PRLbits.PWM3PRL7 // bit 7
5028
5029 #define PWM3TMRH0 PWM3TMRHbits.PWM3TMRH0 // bit 0
5030 #define PWM3TMRH1 PWM3TMRHbits.PWM3TMRH1 // bit 1
5031 #define PWM3TMRH2 PWM3TMRHbits.PWM3TMRH2 // bit 2
5032 #define PWM3TMRH3 PWM3TMRHbits.PWM3TMRH3 // bit 3
5033 #define PWM3TMRH4 PWM3TMRHbits.PWM3TMRH4 // bit 4
5034 #define PWM3TMRH5 PWM3TMRHbits.PWM3TMRH5 // bit 5
5035 #define PWM3TMRH6 PWM3TMRHbits.PWM3TMRH6 // bit 6
5036 #define PWM3TMRH7 PWM3TMRHbits.PWM3TMRH7 // bit 7
5037
5038 #define PWM3TMRL0 PWM3TMRLbits.PWM3TMRL0 // bit 0
5039 #define PWM3TMRL1 PWM3TMRLbits.PWM3TMRL1 // bit 1
5040 #define PWM3TMRL2 PWM3TMRLbits.PWM3TMRL2 // bit 2
5041 #define PWM3TMRL3 PWM3TMRLbits.PWM3TMRL3 // bit 3
5042 #define PWM3TMRL4 PWM3TMRLbits.PWM3TMRL4 // bit 4
5043 #define PWM3TMRL5 PWM3TMRLbits.PWM3TMRL5 // bit 5
5044 #define PWM3TMRL6 PWM3TMRLbits.PWM3TMRL6 // bit 6
5045 #define PWM3TMRL7 PWM3TMRLbits.PWM3TMRL7 // bit 7
5046
5047 #define PWM1EN_A PWMENbits.PWM1EN_A // bit 0, shadows bit in PWMENbits
5048 #define MPWM1EN PWMENbits.MPWM1EN // bit 0, shadows bit in PWMENbits
5049 #define PWM2EN_A PWMENbits.PWM2EN_A // bit 1, shadows bit in PWMENbits
5050 #define MPWM2EN PWMENbits.MPWM2EN // bit 1, shadows bit in PWMENbits
5051 #define PWM3EN_A PWMENbits.PWM3EN_A // bit 2, shadows bit in PWMENbits
5052 #define MPWM3EN PWMENbits.MPWM3EN // bit 2, shadows bit in PWMENbits
5053
5054 #define PWM1LDA_A PWMLDbits.PWM1LDA_A // bit 0, shadows bit in PWMLDbits
5055 #define MPWM1LD PWMLDbits.MPWM1LD // bit 0, shadows bit in PWMLDbits
5056 #define PWM2LDA_A PWMLDbits.PWM2LDA_A // bit 1, shadows bit in PWMLDbits
5057 #define MPWM2LD PWMLDbits.MPWM2LD // bit 1, shadows bit in PWMLDbits
5058 #define PWM3LDA_A PWMLDbits.PWM3LDA_A // bit 2, shadows bit in PWMLDbits
5059 #define MPWM3LD PWMLDbits.MPWM3LD // bit 2, shadows bit in PWMLDbits
5060
5061 #define PWM1OUT_A PWMOUTbits.PWM1OUT_A // bit 0, shadows bit in PWMOUTbits
5062 #define MPWM1OUT PWMOUTbits.MPWM1OUT // bit 0, shadows bit in PWMOUTbits
5063 #define PWM2OUT_A PWMOUTbits.PWM2OUT_A // bit 1, shadows bit in PWMOUTbits
5064 #define MPWM2OUT PWMOUTbits.MPWM2OUT // bit 1, shadows bit in PWMOUTbits
5065 #define PWM3OUT_A PWMOUTbits.PWM3OUT_A // bit 2, shadows bit in PWMOUTbits
5066 #define MPWM3OUT PWMOUTbits.MPWM3OUT // bit 2, shadows bit in PWMOUTbits
5067
5068 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
5069 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
5070 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
5071 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
5072 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
5073
5074 #define C STATUSbits.C // bit 0
5075 #define DC STATUSbits.DC // bit 1
5076 #define Z STATUSbits.Z // bit 2
5077 #define NOT_PD STATUSbits.NOT_PD // bit 3
5078 #define NOT_TO STATUSbits.NOT_TO // bit 4
5079
5080 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
5081 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
5082 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
5083
5084 #define TMR1ON T1CONbits.TMR1ON // bit 0
5085 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
5086 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
5087 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
5088 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
5089 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
5090
5091 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
5092 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
5093 #define T1GVAL T1GCONbits.T1GVAL // bit 2
5094 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
5095 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits
5096 #define T1GSPM T1GCONbits.T1GSPM // bit 4
5097 #define T1GTM T1GCONbits.T1GTM // bit 5
5098 #define T1GPOL T1GCONbits.T1GPOL // bit 6
5099 #define TMR1GE T1GCONbits.TMR1GE // bit 7
5100
5101 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
5102 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
5103 #define TMR2ON T2CONbits.TMR2ON // bit 2
5104 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
5105 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
5106 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
5107 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
5108
5109 #define TRISA0 TRISAbits.TRISA0 // bit 0
5110 #define TRISA1 TRISAbits.TRISA1 // bit 1
5111 #define TRISA2 TRISAbits.TRISA2 // bit 2
5112 #define TRISA3 TRISAbits.TRISA3 // bit 3
5113 #define TRISA4 TRISAbits.TRISA4 // bit 4
5114 #define TRISA5 TRISAbits.TRISA5 // bit 5
5115
5116 #define SWDTEN WDTCONbits.SWDTEN // bit 0
5117 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
5118 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
5119 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
5120 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
5121 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
5122
5123 #define WPUA0 WPUAbits.WPUA0 // bit 0
5124 #define WPUA1 WPUAbits.WPUA1 // bit 1
5125 #define WPUA2 WPUAbits.WPUA2 // bit 2
5126 #define WPUA3 WPUAbits.WPUA3 // bit 3
5127 #define WPUA4 WPUAbits.WPUA4 // bit 4
5128 #define WPUA5 WPUAbits.WPUA5 // bit 5
5129
5130 #endif // #ifndef NO_BIT_DEFINES
5131
5132 #endif // #ifndef __PIC12LF1571_H__
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