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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic12lf1840t39a.h
blob9f24e9c38ed68f6a0386bbc689574472c451fac2
1 /*
2 * This declarations of the PIC12LF1840T39A MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:21 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC12LF1840T39A_H__
26 #define __PIC12LF1840T39A_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PIR1_ADDR 0x0011
52 #define PIR2_ADDR 0x0012
53 #define TMR0_ADDR 0x0015
54 #define TMR1_ADDR 0x0016
55 #define TMR1L_ADDR 0x0016
56 #define TMR1H_ADDR 0x0017
57 #define T1CON_ADDR 0x0018
58 #define T1GCON_ADDR 0x0019
59 #define TMR2_ADDR 0x001A
60 #define PR2_ADDR 0x001B
61 #define T2CON_ADDR 0x001C
62 #define CPSCON0_ADDR 0x001E
63 #define CPSCON1_ADDR 0x001F
64 #define TRISA_ADDR 0x008C
65 #define PIE1_ADDR 0x0091
66 #define PIE2_ADDR 0x0092
67 #define OPTION_REG_ADDR 0x0095
68 #define PCON_ADDR 0x0096
69 #define WDTCON_ADDR 0x0097
70 #define OSCTUNE_ADDR 0x0098
71 #define OSCCON_ADDR 0x0099
72 #define OSCSTAT_ADDR 0x009A
73 #define ADRES_ADDR 0x009B
74 #define ADRESL_ADDR 0x009B
75 #define ADRESH_ADDR 0x009C
76 #define ADCON0_ADDR 0x009D
77 #define ADCON1_ADDR 0x009E
78 #define LATA_ADDR 0x010C
79 #define CM1CON0_ADDR 0x0111
80 #define CM1CON1_ADDR 0x0112
81 #define CMOUT_ADDR 0x0115
82 #define BORCON_ADDR 0x0116
83 #define FVRCON_ADDR 0x0117
84 #define DACCON0_ADDR 0x0118
85 #define DACCON1_ADDR 0x0119
86 #define SRCON0_ADDR 0x011A
87 #define SRCON1_ADDR 0x011B
88 #define APFCON_ADDR 0x011D
89 #define APFCON0_ADDR 0x011D
90 #define ANSELA_ADDR 0x018C
91 #define EEADR_ADDR 0x0191
92 #define EEADRL_ADDR 0x0191
93 #define EEADRH_ADDR 0x0192
94 #define EEDAT_ADDR 0x0193
95 #define EEDATL_ADDR 0x0193
96 #define EEDATH_ADDR 0x0194
97 #define EECON1_ADDR 0x0195
98 #define EECON2_ADDR 0x0196
99 #define RCREG_ADDR 0x0199
100 #define TXREG_ADDR 0x019A
101 #define SP1BRG_ADDR 0x019B
102 #define SP1BRGL_ADDR 0x019B
103 #define SPBRG_ADDR 0x019B
104 #define SPBRGL_ADDR 0x019B
105 #define SP1BRGH_ADDR 0x019C
106 #define SPBRGH_ADDR 0x019C
107 #define RCSTA_ADDR 0x019D
108 #define TXSTA_ADDR 0x019E
109 #define BAUDCON_ADDR 0x019F
110 #define WPUA_ADDR 0x020C
111 #define SSP1BUF_ADDR 0x0211
112 #define SSPBUF_ADDR 0x0211
113 #define SSP1ADD_ADDR 0x0212
114 #define SSPADD_ADDR 0x0212
115 #define SSP1MSK_ADDR 0x0213
116 #define SSPMSK_ADDR 0x0213
117 #define SSP1STAT_ADDR 0x0214
118 #define SSPSTAT_ADDR 0x0214
119 #define SSP1CON1_ADDR 0x0215
120 #define SSPCON_ADDR 0x0215
121 #define SSPCON1_ADDR 0x0215
122 #define SSP1CON2_ADDR 0x0216
123 #define SSPCON2_ADDR 0x0216
124 #define SSP1CON3_ADDR 0x0217
125 #define SSPCON3_ADDR 0x0217
126 #define CCPR1_ADDR 0x0291
127 #define CCPR1L_ADDR 0x0291
128 #define CCPR1H_ADDR 0x0292
129 #define CCP1CON_ADDR 0x0293
130 #define PWM1CON_ADDR 0x0294
131 #define CCP1AS_ADDR 0x0295
132 #define ECCP1AS_ADDR 0x0295
133 #define PSTR1CON_ADDR 0x0296
134 #define IOCAP_ADDR 0x0391
135 #define IOCAN_ADDR 0x0392
136 #define IOCAF_ADDR 0x0393
137 #define CLKRCON_ADDR 0x039A
138 #define MDCON_ADDR 0x039C
139 #define MDSRC_ADDR 0x039D
140 #define MDCARL_ADDR 0x039E
141 #define MDCARH_ADDR 0x039F
142 #define STATUS_SHAD_ADDR 0x0FE4
143 #define WREG_SHAD_ADDR 0x0FE5
144 #define BSR_SHAD_ADDR 0x0FE6
145 #define PCLATH_SHAD_ADDR 0x0FE7
146 #define FSR0L_SHAD_ADDR 0x0FE8
147 #define FSR0H_SHAD_ADDR 0x0FE9
148 #define FSR1L_SHAD_ADDR 0x0FEA
149 #define FSR1H_SHAD_ADDR 0x0FEB
150 #define STKPTR_ADDR 0x0FED
151 #define TOSL_ADDR 0x0FEE
152 #define TOSH_ADDR 0x0FEF
153
154 #endif // #ifndef NO_ADDR_DEFINES
155
156 //==============================================================================
157 //
158 // Register Definitions
159 //
160 //==============================================================================
161
162 extern __at(0x0000) __sfr INDF0;
163 extern __at(0x0001) __sfr INDF1;
164 extern __at(0x0002) __sfr PCL;
165
166 //==============================================================================
167 // STATUS Bits
168
169 extern __at(0x0003) __sfr STATUS;
170
171 typedef struct
172 {
173 unsigned C : 1;
174 unsigned DC : 1;
175 unsigned Z : 1;
176 unsigned NOT_PD : 1;
177 unsigned NOT_TO : 1;
178 unsigned : 1;
179 unsigned : 1;
180 unsigned : 1;
181 } __STATUSbits_t;
182
183 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
184
185 #define _C 0x01
186 #define _DC 0x02
187 #define _Z 0x04
188 #define _NOT_PD 0x08
189 #define _NOT_TO 0x10
190
191 //==============================================================================
192
193 extern __at(0x0004) __sfr FSR0;
194 extern __at(0x0004) __sfr FSR0L;
195 extern __at(0x0005) __sfr FSR0H;
196 extern __at(0x0006) __sfr FSR1;
197 extern __at(0x0006) __sfr FSR1L;
198 extern __at(0x0007) __sfr FSR1H;
199
200 //==============================================================================
201 // BSR Bits
202
203 extern __at(0x0008) __sfr BSR;
204
205 typedef union
206 {
207 struct
208 {
209 unsigned BSR0 : 1;
210 unsigned BSR1 : 1;
211 unsigned BSR2 : 1;
212 unsigned BSR3 : 1;
213 unsigned BSR4 : 1;
214 unsigned : 1;
215 unsigned : 1;
216 unsigned : 1;
217 };
218
219 struct
220 {
221 unsigned BSR : 5;
222 unsigned : 3;
223 };
224 } __BSRbits_t;
225
226 extern __at(0x0008) volatile __BSRbits_t BSRbits;
227
228 #define _BSR0 0x01
229 #define _BSR1 0x02
230 #define _BSR2 0x04
231 #define _BSR3 0x08
232 #define _BSR4 0x10
233
234 //==============================================================================
235
236 extern __at(0x0009) __sfr WREG;
237 extern __at(0x000A) __sfr PCLATH;
238
239 //==============================================================================
240 // INTCON Bits
241
242 extern __at(0x000B) __sfr INTCON;
243
244 typedef union
245 {
246 struct
247 {
248 unsigned IOCIF : 1;
249 unsigned INTF : 1;
250 unsigned TMR0IF : 1;
251 unsigned IOCIE : 1;
252 unsigned INTE : 1;
253 unsigned TMR0IE : 1;
254 unsigned PEIE : 1;
255 unsigned GIE : 1;
256 };
257
258 struct
259 {
260 unsigned : 1;
261 unsigned : 1;
262 unsigned T0IF : 1;
263 unsigned : 1;
264 unsigned : 1;
265 unsigned T0IE : 1;
266 unsigned : 1;
267 unsigned : 1;
268 };
269 } __INTCONbits_t;
270
271 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
272
273 #define _IOCIF 0x01
274 #define _INTF 0x02
275 #define _TMR0IF 0x04
276 #define _T0IF 0x04
277 #define _IOCIE 0x08
278 #define _INTE 0x10
279 #define _TMR0IE 0x20
280 #define _T0IE 0x20
281 #define _PEIE 0x40
282 #define _GIE 0x80
283
284 //==============================================================================
285
286
287 //==============================================================================
288 // PORTA Bits
289
290 extern __at(0x000C) __sfr PORTA;
291
292 typedef union
293 {
294 struct
295 {
296 unsigned RA0 : 1;
297 unsigned RA1 : 1;
298 unsigned RA2 : 1;
299 unsigned RA3 : 1;
300 unsigned RA4 : 1;
301 unsigned RA5 : 1;
302 unsigned : 1;
303 unsigned : 1;
304 };
305
306 struct
307 {
308 unsigned RA : 6;
309 unsigned : 2;
310 };
311 } __PORTAbits_t;
312
313 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
314
315 #define _RA0 0x01
316 #define _RA1 0x02
317 #define _RA2 0x04
318 #define _RA3 0x08
319 #define _RA4 0x10
320 #define _RA5 0x20
321
322 //==============================================================================
323
324
325 //==============================================================================
326 // PIR1 Bits
327
328 extern __at(0x0011) __sfr PIR1;
329
330 typedef struct
331 {
332 unsigned TMR1IF : 1;
333 unsigned TMR2IF : 1;
334 unsigned CCP1IF : 1;
335 unsigned SSP1IF : 1;
336 unsigned TXIF : 1;
337 unsigned RCIF : 1;
338 unsigned ADIF : 1;
339 unsigned TMR1GIF : 1;
340 } __PIR1bits_t;
341
342 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
343
344 #define _TMR1IF 0x01
345 #define _TMR2IF 0x02
346 #define _CCP1IF 0x04
347 #define _SSP1IF 0x08
348 #define _TXIF 0x10
349 #define _RCIF 0x20
350 #define _ADIF 0x40
351 #define _TMR1GIF 0x80
352
353 //==============================================================================
354
355
356 //==============================================================================
357 // PIR2 Bits
358
359 extern __at(0x0012) __sfr PIR2;
360
361 typedef struct
362 {
363 unsigned : 1;
364 unsigned : 1;
365 unsigned : 1;
366 unsigned BCL1IF : 1;
367 unsigned EEIF : 1;
368 unsigned C1IF : 1;
369 unsigned : 1;
370 unsigned OSFIF : 1;
371 } __PIR2bits_t;
372
373 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
374
375 #define _BCL1IF 0x08
376 #define _EEIF 0x10
377 #define _C1IF 0x20
378 #define _OSFIF 0x80
379
380 //==============================================================================
381
382 extern __at(0x0015) __sfr TMR0;
383 extern __at(0x0016) __sfr TMR1;
384 extern __at(0x0016) __sfr TMR1L;
385 extern __at(0x0017) __sfr TMR1H;
386
387 //==============================================================================
388 // T1CON Bits
389
390 extern __at(0x0018) __sfr T1CON;
391
392 typedef union
393 {
394 struct
395 {
396 unsigned TMR1ON : 1;
397 unsigned : 1;
398 unsigned NOT_T1SYNC : 1;
399 unsigned T1OSCEN : 1;
400 unsigned T1CKPS0 : 1;
401 unsigned T1CKPS1 : 1;
402 unsigned TMR1CS0 : 1;
403 unsigned TMR1CS1 : 1;
404 };
405
406 struct
407 {
408 unsigned : 4;
409 unsigned T1CKPS : 2;
410 unsigned : 2;
411 };
412
413 struct
414 {
415 unsigned : 6;
416 unsigned TMR1CS : 2;
417 };
418 } __T1CONbits_t;
419
420 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
421
422 #define _TMR1ON 0x01
423 #define _NOT_T1SYNC 0x04
424 #define _T1OSCEN 0x08
425 #define _T1CKPS0 0x10
426 #define _T1CKPS1 0x20
427 #define _TMR1CS0 0x40
428 #define _TMR1CS1 0x80
429
430 //==============================================================================
431
432
433 //==============================================================================
434 // T1GCON Bits
435
436 extern __at(0x0019) __sfr T1GCON;
437
438 typedef union
439 {
440 struct
441 {
442 unsigned T1GSS0 : 1;
443 unsigned T1GSS1 : 1;
444 unsigned T1GVAL : 1;
445 unsigned T1GGO : 1;
446 unsigned T1GSPM : 1;
447 unsigned T1GTM : 1;
448 unsigned T1GPOL : 1;
449 unsigned TMR1GE : 1;
450 };
451
452 struct
453 {
454 unsigned T1GSS : 2;
455 unsigned : 6;
456 };
457 } __T1GCONbits_t;
458
459 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
460
461 #define _T1GSS0 0x01
462 #define _T1GSS1 0x02
463 #define _T1GVAL 0x04
464 #define _T1GGO 0x08
465 #define _T1GSPM 0x10
466 #define _T1GTM 0x20
467 #define _T1GPOL 0x40
468 #define _TMR1GE 0x80
469
470 //==============================================================================
471
472 extern __at(0x001A) __sfr TMR2;
473 extern __at(0x001B) __sfr PR2;
474
475 //==============================================================================
476 // T2CON Bits
477
478 extern __at(0x001C) __sfr T2CON;
479
480 typedef union
481 {
482 struct
483 {
484 unsigned T2CKPS0 : 1;
485 unsigned T2CKPS1 : 1;
486 unsigned TMR2ON : 1;
487 unsigned T2OUTPS0 : 1;
488 unsigned T2OUTPS1 : 1;
489 unsigned T2OUTPS2 : 1;
490 unsigned T2OUTPS3 : 1;
491 unsigned : 1;
492 };
493
494 struct
495 {
496 unsigned T2CKPS : 2;
497 unsigned : 6;
498 };
499
500 struct
501 {
502 unsigned : 3;
503 unsigned T2OUTPS : 4;
504 unsigned : 1;
505 };
506 } __T2CONbits_t;
507
508 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
509
510 #define _T2CKPS0 0x01
511 #define _T2CKPS1 0x02
512 #define _TMR2ON 0x04
513 #define _T2OUTPS0 0x08
514 #define _T2OUTPS1 0x10
515 #define _T2OUTPS2 0x20
516 #define _T2OUTPS3 0x40
517
518 //==============================================================================
519
520
521 //==============================================================================
522 // CPSCON0 Bits
523
524 extern __at(0x001E) __sfr CPSCON0;
525
526 typedef union
527 {
528 struct
529 {
530 unsigned T0XCS : 1;
531 unsigned CPSOUT : 1;
532 unsigned CPSRNG0 : 1;
533 unsigned CPSRNG1 : 1;
534 unsigned : 1;
535 unsigned : 1;
536 unsigned CPSRM : 1;
537 unsigned CPSON : 1;
538 };
539
540 struct
541 {
542 unsigned : 2;
543 unsigned CPSRNG : 2;
544 unsigned : 4;
545 };
546 } __CPSCON0bits_t;
547
548 extern __at(0x001E) volatile __CPSCON0bits_t CPSCON0bits;
549
550 #define _T0XCS 0x01
551 #define _CPSOUT 0x02
552 #define _CPSRNG0 0x04
553 #define _CPSRNG1 0x08
554 #define _CPSRM 0x40
555 #define _CPSON 0x80
556
557 //==============================================================================
558
559
560 //==============================================================================
561 // CPSCON1 Bits
562
563 extern __at(0x001F) __sfr CPSCON1;
564
565 typedef union
566 {
567 struct
568 {
569 unsigned CPSCH0 : 1;
570 unsigned CPSCH1 : 1;
571 unsigned : 1;
572 unsigned : 1;
573 unsigned : 1;
574 unsigned : 1;
575 unsigned : 1;
576 unsigned : 1;
577 };
578
579 struct
580 {
581 unsigned CPSCH : 2;
582 unsigned : 6;
583 };
584 } __CPSCON1bits_t;
585
586 extern __at(0x001F) volatile __CPSCON1bits_t CPSCON1bits;
587
588 #define _CPSCH0 0x01
589 #define _CPSCH1 0x02
590
591 //==============================================================================
592
593
594 //==============================================================================
595 // TRISA Bits
596
597 extern __at(0x008C) __sfr TRISA;
598
599 typedef union
600 {
601 struct
602 {
603 unsigned TRISA0 : 1;
604 unsigned TRISA1 : 1;
605 unsigned TRISA2 : 1;
606 unsigned TRISA3 : 1;
607 unsigned TRISA4 : 1;
608 unsigned TRISA5 : 1;
609 unsigned : 1;
610 unsigned : 1;
611 };
612
613 struct
614 {
615 unsigned TRISA : 6;
616 unsigned : 2;
617 };
618 } __TRISAbits_t;
619
620 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
621
622 #define _TRISA0 0x01
623 #define _TRISA1 0x02
624 #define _TRISA2 0x04
625 #define _TRISA3 0x08
626 #define _TRISA4 0x10
627 #define _TRISA5 0x20
628
629 //==============================================================================
630
631
632 //==============================================================================
633 // PIE1 Bits
634
635 extern __at(0x0091) __sfr PIE1;
636
637 typedef struct
638 {
639 unsigned TMR1IE : 1;
640 unsigned TMR2IE : 1;
641 unsigned CCP1IE : 1;
642 unsigned SSP1IE : 1;
643 unsigned TXIE : 1;
644 unsigned RCIE : 1;
645 unsigned ADIE : 1;
646 unsigned TMR1GIE : 1;
647 } __PIE1bits_t;
648
649 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
650
651 #define _TMR1IE 0x01
652 #define _TMR2IE 0x02
653 #define _CCP1IE 0x04
654 #define _SSP1IE 0x08
655 #define _TXIE 0x10
656 #define _RCIE 0x20
657 #define _ADIE 0x40
658 #define _TMR1GIE 0x80
659
660 //==============================================================================
661
662
663 //==============================================================================
664 // PIE2 Bits
665
666 extern __at(0x0092) __sfr PIE2;
667
668 typedef struct
669 {
670 unsigned : 1;
671 unsigned : 1;
672 unsigned : 1;
673 unsigned BCL1IE : 1;
674 unsigned EEIE : 1;
675 unsigned C1IE : 1;
676 unsigned : 1;
677 unsigned OSFIE : 1;
678 } __PIE2bits_t;
679
680 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
681
682 #define _BCL1IE 0x08
683 #define _EEIE 0x10
684 #define _C1IE 0x20
685 #define _OSFIE 0x80
686
687 //==============================================================================
688
689
690 //==============================================================================
691 // OPTION_REG Bits
692
693 extern __at(0x0095) __sfr OPTION_REG;
694
695 typedef union
696 {
697 struct
698 {
699 unsigned PS0 : 1;
700 unsigned PS1 : 1;
701 unsigned PS2 : 1;
702 unsigned PSA : 1;
703 unsigned TMR0SE : 1;
704 unsigned TMR0CS : 1;
705 unsigned INTEDG : 1;
706 unsigned NOT_WPUEN : 1;
707 };
708
709 struct
710 {
711 unsigned : 1;
712 unsigned : 1;
713 unsigned : 1;
714 unsigned : 1;
715 unsigned T0SE : 1;
716 unsigned T0CS : 1;
717 unsigned : 1;
718 unsigned : 1;
719 };
720
721 struct
722 {
723 unsigned PS : 3;
724 unsigned : 5;
725 };
726 } __OPTION_REGbits_t;
727
728 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
729
730 #define _PS0 0x01
731 #define _PS1 0x02
732 #define _PS2 0x04
733 #define _PSA 0x08
734 #define _TMR0SE 0x10
735 #define _T0SE 0x10
736 #define _TMR0CS 0x20
737 #define _T0CS 0x20
738 #define _INTEDG 0x40
739 #define _NOT_WPUEN 0x80
740
741 //==============================================================================
742
743
744 //==============================================================================
745 // PCON Bits
746
747 extern __at(0x0096) __sfr PCON;
748
749 typedef struct
750 {
751 unsigned NOT_BOR : 1;
752 unsigned NOT_POR : 1;
753 unsigned NOT_RI : 1;
754 unsigned NOT_RMCLR : 1;
755 unsigned : 1;
756 unsigned : 1;
757 unsigned STKUNF : 1;
758 unsigned STKOVF : 1;
759 } __PCONbits_t;
760
761 extern __at(0x0096) volatile __PCONbits_t PCONbits;
762
763 #define _NOT_BOR 0x01
764 #define _NOT_POR 0x02
765 #define _NOT_RI 0x04
766 #define _NOT_RMCLR 0x08
767 #define _STKUNF 0x40
768 #define _STKOVF 0x80
769
770 //==============================================================================
771
772
773 //==============================================================================
774 // WDTCON Bits
775
776 extern __at(0x0097) __sfr WDTCON;
777
778 typedef union
779 {
780 struct
781 {
782 unsigned SWDTEN : 1;
783 unsigned WDTPS0 : 1;
784 unsigned WDTPS1 : 1;
785 unsigned WDTPS2 : 1;
786 unsigned WDTPS3 : 1;
787 unsigned WDTPS4 : 1;
788 unsigned : 1;
789 unsigned : 1;
790 };
791
792 struct
793 {
794 unsigned : 1;
795 unsigned WDTPS : 5;
796 unsigned : 2;
797 };
798 } __WDTCONbits_t;
799
800 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
801
802 #define _SWDTEN 0x01
803 #define _WDTPS0 0x02
804 #define _WDTPS1 0x04
805 #define _WDTPS2 0x08
806 #define _WDTPS3 0x10
807 #define _WDTPS4 0x20
808
809 //==============================================================================
810
811
812 //==============================================================================
813 // OSCTUNE Bits
814
815 extern __at(0x0098) __sfr OSCTUNE;
816
817 typedef union
818 {
819 struct
820 {
821 unsigned TUN0 : 1;
822 unsigned TUN1 : 1;
823 unsigned TUN2 : 1;
824 unsigned TUN3 : 1;
825 unsigned TUN4 : 1;
826 unsigned TUN5 : 1;
827 unsigned : 1;
828 unsigned : 1;
829 };
830
831 struct
832 {
833 unsigned TUN : 6;
834 unsigned : 2;
835 };
836 } __OSCTUNEbits_t;
837
838 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
839
840 #define _TUN0 0x01
841 #define _TUN1 0x02
842 #define _TUN2 0x04
843 #define _TUN3 0x08
844 #define _TUN4 0x10
845 #define _TUN5 0x20
846
847 //==============================================================================
848
849
850 //==============================================================================
851 // OSCCON Bits
852
853 extern __at(0x0099) __sfr OSCCON;
854
855 typedef union
856 {
857 struct
858 {
859 unsigned SCS0 : 1;
860 unsigned SCS1 : 1;
861 unsigned : 1;
862 unsigned IRCF0 : 1;
863 unsigned IRCF1 : 1;
864 unsigned IRCF2 : 1;
865 unsigned IRCF3 : 1;
866 unsigned SPLLEN : 1;
867 };
868
869 struct
870 {
871 unsigned SCS : 2;
872 unsigned : 6;
873 };
874
875 struct
876 {
877 unsigned : 3;
878 unsigned IRCF : 4;
879 unsigned : 1;
880 };
881 } __OSCCONbits_t;
882
883 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
884
885 #define _SCS0 0x01
886 #define _SCS1 0x02
887 #define _IRCF0 0x08
888 #define _IRCF1 0x10
889 #define _IRCF2 0x20
890 #define _IRCF3 0x40
891 #define _SPLLEN 0x80
892
893 //==============================================================================
894
895
896 //==============================================================================
897 // OSCSTAT Bits
898
899 extern __at(0x009A) __sfr OSCSTAT;
900
901 typedef struct
902 {
903 unsigned HFIOFS : 1;
904 unsigned LFIOFR : 1;
905 unsigned MFIOFR : 1;
906 unsigned HFIOFL : 1;
907 unsigned HFIOFR : 1;
908 unsigned OSTS : 1;
909 unsigned PLLR : 1;
910 unsigned T1OSCR : 1;
911 } __OSCSTATbits_t;
912
913 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
914
915 #define _HFIOFS 0x01
916 #define _LFIOFR 0x02
917 #define _MFIOFR 0x04
918 #define _HFIOFL 0x08
919 #define _HFIOFR 0x10
920 #define _OSTS 0x20
921 #define _PLLR 0x40
922 #define _T1OSCR 0x80
923
924 //==============================================================================
925
926 extern __at(0x009B) __sfr ADRES;
927 extern __at(0x009B) __sfr ADRESL;
928 extern __at(0x009C) __sfr ADRESH;
929
930 //==============================================================================
931 // ADCON0 Bits
932
933 extern __at(0x009D) __sfr ADCON0;
934
935 typedef union
936 {
937 struct
938 {
939 unsigned ADON : 1;
940 unsigned GO_NOT_DONE : 1;
941 unsigned CHS0 : 1;
942 unsigned CHS1 : 1;
943 unsigned CHS2 : 1;
944 unsigned CHS3 : 1;
945 unsigned CHS4 : 1;
946 unsigned : 1;
947 };
948
949 struct
950 {
951 unsigned : 1;
952 unsigned ADGO : 1;
953 unsigned : 1;
954 unsigned : 1;
955 unsigned : 1;
956 unsigned : 1;
957 unsigned : 1;
958 unsigned : 1;
959 };
960
961 struct
962 {
963 unsigned : 1;
964 unsigned GO : 1;
965 unsigned : 1;
966 unsigned : 1;
967 unsigned : 1;
968 unsigned : 1;
969 unsigned : 1;
970 unsigned : 1;
971 };
972
973 struct
974 {
975 unsigned : 2;
976 unsigned CHS : 5;
977 unsigned : 1;
978 };
979 } __ADCON0bits_t;
980
981 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
982
983 #define _ADON 0x01
984 #define _GO_NOT_DONE 0x02
985 #define _ADGO 0x02
986 #define _GO 0x02
987 #define _CHS0 0x04
988 #define _CHS1 0x08
989 #define _CHS2 0x10
990 #define _CHS3 0x20
991 #define _CHS4 0x40
992
993 //==============================================================================
994
995
996 //==============================================================================
997 // ADCON1 Bits
998
999 extern __at(0x009E) __sfr ADCON1;
1000
1001 typedef union
1002 {
1003 struct
1004 {
1005 unsigned ADPREF0 : 1;
1006 unsigned ADPREF1 : 1;
1007 unsigned : 1;
1008 unsigned : 1;
1009 unsigned ADCS0 : 1;
1010 unsigned ADCS1 : 1;
1011 unsigned ADCS2 : 1;
1012 unsigned ADFM : 1;
1013 };
1014
1015 struct
1016 {
1017 unsigned ADPREF : 2;
1018 unsigned : 6;
1019 };
1020
1021 struct
1022 {
1023 unsigned : 4;
1024 unsigned ADCS : 3;
1025 unsigned : 1;
1026 };
1027 } __ADCON1bits_t;
1028
1029 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1030
1031 #define _ADPREF0 0x01
1032 #define _ADPREF1 0x02
1033 #define _ADCS0 0x10
1034 #define _ADCS1 0x20
1035 #define _ADCS2 0x40
1036 #define _ADFM 0x80
1037
1038 //==============================================================================
1039
1040
1041 //==============================================================================
1042 // LATA Bits
1043
1044 extern __at(0x010C) __sfr LATA;
1045
1046 typedef struct
1047 {
1048 unsigned LATA0 : 1;
1049 unsigned LATA1 : 1;
1050 unsigned LATA2 : 1;
1051 unsigned : 1;
1052 unsigned LATA4 : 1;
1053 unsigned LATA5 : 1;
1054 unsigned : 1;
1055 unsigned : 1;
1056 } __LATAbits_t;
1057
1058 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1059
1060 #define _LATA0 0x01
1061 #define _LATA1 0x02
1062 #define _LATA2 0x04
1063 #define _LATA4 0x10
1064 #define _LATA5 0x20
1065
1066 //==============================================================================
1067
1068
1069 //==============================================================================
1070 // CM1CON0 Bits
1071
1072 extern __at(0x0111) __sfr CM1CON0;
1073
1074 typedef struct
1075 {
1076 unsigned C1SYNC : 1;
1077 unsigned C1HYS : 1;
1078 unsigned C1SP : 1;
1079 unsigned : 1;
1080 unsigned C1POL : 1;
1081 unsigned C1OE : 1;
1082 unsigned C1OUT : 1;
1083 unsigned C1ON : 1;
1084 } __CM1CON0bits_t;
1085
1086 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1087
1088 #define _C1SYNC 0x01
1089 #define _C1HYS 0x02
1090 #define _C1SP 0x04
1091 #define _C1POL 0x10
1092 #define _C1OE 0x20
1093 #define _C1OUT 0x40
1094 #define _C1ON 0x80
1095
1096 //==============================================================================
1097
1098
1099 //==============================================================================
1100 // CM1CON1 Bits
1101
1102 extern __at(0x0112) __sfr CM1CON1;
1103
1104 typedef union
1105 {
1106 struct
1107 {
1108 unsigned C1NCH : 1;
1109 unsigned : 1;
1110 unsigned : 1;
1111 unsigned : 1;
1112 unsigned C1PCH0 : 1;
1113 unsigned C1PCH1 : 1;
1114 unsigned C1INTN : 1;
1115 unsigned C1INTP : 1;
1116 };
1117
1118 struct
1119 {
1120 unsigned C1NCH0 : 1;
1121 unsigned : 1;
1122 unsigned : 1;
1123 unsigned : 1;
1124 unsigned : 1;
1125 unsigned : 1;
1126 unsigned : 1;
1127 unsigned : 1;
1128 };
1129
1130 struct
1131 {
1132 unsigned : 4;
1133 unsigned C1PCH : 2;
1134 unsigned : 2;
1135 };
1136 } __CM1CON1bits_t;
1137
1138 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1139
1140 #define _C1NCH 0x01
1141 #define _C1NCH0 0x01
1142 #define _C1PCH0 0x10
1143 #define _C1PCH1 0x20
1144 #define _C1INTN 0x40
1145 #define _C1INTP 0x80
1146
1147 //==============================================================================
1148
1149
1150 //==============================================================================
1151 // CMOUT Bits
1152
1153 extern __at(0x0115) __sfr CMOUT;
1154
1155 typedef struct
1156 {
1157 unsigned MC1OUT : 1;
1158 unsigned : 1;
1159 unsigned : 1;
1160 unsigned : 1;
1161 unsigned : 1;
1162 unsigned : 1;
1163 unsigned : 1;
1164 unsigned : 1;
1165 } __CMOUTbits_t;
1166
1167 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1168
1169 #define _MC1OUT 0x01
1170
1171 //==============================================================================
1172
1173
1174 //==============================================================================
1175 // BORCON Bits
1176
1177 extern __at(0x0116) __sfr BORCON;
1178
1179 typedef struct
1180 {
1181 unsigned BORRDY : 1;
1182 unsigned : 1;
1183 unsigned : 1;
1184 unsigned : 1;
1185 unsigned : 1;
1186 unsigned : 1;
1187 unsigned BORFS : 1;
1188 unsigned SBOREN : 1;
1189 } __BORCONbits_t;
1190
1191 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1192
1193 #define _BORRDY 0x01
1194 #define _BORFS 0x40
1195 #define _SBOREN 0x80
1196
1197 //==============================================================================
1198
1199
1200 //==============================================================================
1201 // FVRCON Bits
1202
1203 extern __at(0x0117) __sfr FVRCON;
1204
1205 typedef union
1206 {
1207 struct
1208 {
1209 unsigned ADFVR0 : 1;
1210 unsigned ADFVR1 : 1;
1211 unsigned CDAFVR0 : 1;
1212 unsigned CDAFVR1 : 1;
1213 unsigned TSRNG : 1;
1214 unsigned TSEN : 1;
1215 unsigned FVRRDY : 1;
1216 unsigned FVREN : 1;
1217 };
1218
1219 struct
1220 {
1221 unsigned ADFVR : 2;
1222 unsigned : 6;
1223 };
1224
1225 struct
1226 {
1227 unsigned : 2;
1228 unsigned CDAFVR : 2;
1229 unsigned : 4;
1230 };
1231 } __FVRCONbits_t;
1232
1233 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1234
1235 #define _ADFVR0 0x01
1236 #define _ADFVR1 0x02
1237 #define _CDAFVR0 0x04
1238 #define _CDAFVR1 0x08
1239 #define _TSRNG 0x10
1240 #define _TSEN 0x20
1241 #define _FVRRDY 0x40
1242 #define _FVREN 0x80
1243
1244 //==============================================================================
1245
1246
1247 //==============================================================================
1248 // DACCON0 Bits
1249
1250 extern __at(0x0118) __sfr DACCON0;
1251
1252 typedef union
1253 {
1254 struct
1255 {
1256 unsigned : 1;
1257 unsigned : 1;
1258 unsigned DACPSS0 : 1;
1259 unsigned DACPSS1 : 1;
1260 unsigned : 1;
1261 unsigned DACOE : 1;
1262 unsigned DACLPS : 1;
1263 unsigned DACEN : 1;
1264 };
1265
1266 struct
1267 {
1268 unsigned : 2;
1269 unsigned DACPSS : 2;
1270 unsigned : 4;
1271 };
1272 } __DACCON0bits_t;
1273
1274 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1275
1276 #define _DACPSS0 0x04
1277 #define _DACPSS1 0x08
1278 #define _DACOE 0x20
1279 #define _DACLPS 0x40
1280 #define _DACEN 0x80
1281
1282 //==============================================================================
1283
1284
1285 //==============================================================================
1286 // DACCON1 Bits
1287
1288 extern __at(0x0119) __sfr DACCON1;
1289
1290 typedef union
1291 {
1292 struct
1293 {
1294 unsigned DACR0 : 1;
1295 unsigned DACR1 : 1;
1296 unsigned DACR2 : 1;
1297 unsigned DACR3 : 1;
1298 unsigned DACR4 : 1;
1299 unsigned : 1;
1300 unsigned : 1;
1301 unsigned : 1;
1302 };
1303
1304 struct
1305 {
1306 unsigned DACR : 5;
1307 unsigned : 3;
1308 };
1309 } __DACCON1bits_t;
1310
1311 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1312
1313 #define _DACR0 0x01
1314 #define _DACR1 0x02
1315 #define _DACR2 0x04
1316 #define _DACR3 0x08
1317 #define _DACR4 0x10
1318
1319 //==============================================================================
1320
1321
1322 //==============================================================================
1323 // SRCON0 Bits
1324
1325 extern __at(0x011A) __sfr SRCON0;
1326
1327 typedef union
1328 {
1329 struct
1330 {
1331 unsigned SRPR : 1;
1332 unsigned SRPS : 1;
1333 unsigned SRNQEN : 1;
1334 unsigned SRQEN : 1;
1335 unsigned SRCLK0 : 1;
1336 unsigned SRCLK1 : 1;
1337 unsigned SRCLK2 : 1;
1338 unsigned SRLEN : 1;
1339 };
1340
1341 struct
1342 {
1343 unsigned : 4;
1344 unsigned SRCLK : 3;
1345 unsigned : 1;
1346 };
1347 } __SRCON0bits_t;
1348
1349 extern __at(0x011A) volatile __SRCON0bits_t SRCON0bits;
1350
1351 #define _SRPR 0x01
1352 #define _SRPS 0x02
1353 #define _SRNQEN 0x04
1354 #define _SRQEN 0x08
1355 #define _SRCLK0 0x10
1356 #define _SRCLK1 0x20
1357 #define _SRCLK2 0x40
1358 #define _SRLEN 0x80
1359
1360 //==============================================================================
1361
1362
1363 //==============================================================================
1364 // SRCON1 Bits
1365
1366 extern __at(0x011B) __sfr SRCON1;
1367
1368 typedef struct
1369 {
1370 unsigned SRRC1E : 1;
1371 unsigned : 1;
1372 unsigned SRRCKE : 1;
1373 unsigned SRRPE : 1;
1374 unsigned SRSC1E : 1;
1375 unsigned : 1;
1376 unsigned SRSCKE : 1;
1377 unsigned SRSPE : 1;
1378 } __SRCON1bits_t;
1379
1380 extern __at(0x011B) volatile __SRCON1bits_t SRCON1bits;
1381
1382 #define _SRRC1E 0x01
1383 #define _SRRCKE 0x04
1384 #define _SRRPE 0x08
1385 #define _SRSC1E 0x10
1386 #define _SRSCKE 0x40
1387 #define _SRSPE 0x80
1388
1389 //==============================================================================
1390
1391
1392 //==============================================================================
1393 // APFCON Bits
1394
1395 extern __at(0x011D) __sfr APFCON;
1396
1397 typedef union
1398 {
1399 struct
1400 {
1401 unsigned CCP1SEL : 1;
1402 unsigned P1BSEL : 1;
1403 unsigned TXCKSEL : 1;
1404 unsigned T1GSEL : 1;
1405 unsigned : 1;
1406 unsigned SSSEL : 1;
1407 unsigned SDOSEL : 1;
1408 unsigned RXDTSEL : 1;
1409 };
1410
1411 struct
1412 {
1413 unsigned : 1;
1414 unsigned : 1;
1415 unsigned : 1;
1416 unsigned : 1;
1417 unsigned : 1;
1418 unsigned SS1SEL : 1;
1419 unsigned SDO1SEL : 1;
1420 unsigned : 1;
1421 };
1422 } __APFCONbits_t;
1423
1424 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1425
1426 #define _CCP1SEL 0x01
1427 #define _P1BSEL 0x02
1428 #define _TXCKSEL 0x04
1429 #define _T1GSEL 0x08
1430 #define _SSSEL 0x20
1431 #define _SS1SEL 0x20
1432 #define _SDOSEL 0x40
1433 #define _SDO1SEL 0x40
1434 #define _RXDTSEL 0x80
1435
1436 //==============================================================================
1437
1438
1439 //==============================================================================
1440 // APFCON0 Bits
1441
1442 extern __at(0x011D) __sfr APFCON0;
1443
1444 typedef union
1445 {
1446 struct
1447 {
1448 unsigned CCP1SEL : 1;
1449 unsigned P1BSEL : 1;
1450 unsigned TXCKSEL : 1;
1451 unsigned T1GSEL : 1;
1452 unsigned : 1;
1453 unsigned SSSEL : 1;
1454 unsigned SDOSEL : 1;
1455 unsigned RXDTSEL : 1;
1456 };
1457
1458 struct
1459 {
1460 unsigned : 1;
1461 unsigned : 1;
1462 unsigned : 1;
1463 unsigned : 1;
1464 unsigned : 1;
1465 unsigned SS1SEL : 1;
1466 unsigned SDO1SEL : 1;
1467 unsigned : 1;
1468 };
1469 } __APFCON0bits_t;
1470
1471 extern __at(0x011D) volatile __APFCON0bits_t APFCON0bits;
1472
1473 #define _APFCON0_CCP1SEL 0x01
1474 #define _APFCON0_P1BSEL 0x02
1475 #define _APFCON0_TXCKSEL 0x04
1476 #define _APFCON0_T1GSEL 0x08
1477 #define _APFCON0_SSSEL 0x20
1478 #define _APFCON0_SS1SEL 0x20
1479 #define _APFCON0_SDOSEL 0x40
1480 #define _APFCON0_SDO1SEL 0x40
1481 #define _APFCON0_RXDTSEL 0x80
1482
1483 //==============================================================================
1484
1485
1486 //==============================================================================
1487 // ANSELA Bits
1488
1489 extern __at(0x018C) __sfr ANSELA;
1490
1491 typedef struct
1492 {
1493 unsigned ANSA0 : 1;
1494 unsigned ANSA1 : 1;
1495 unsigned ANSA2 : 1;
1496 unsigned : 1;
1497 unsigned ANSA4 : 1;
1498 unsigned : 1;
1499 unsigned : 1;
1500 unsigned : 1;
1501 } __ANSELAbits_t;
1502
1503 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1504
1505 #define _ANSA0 0x01
1506 #define _ANSA1 0x02
1507 #define _ANSA2 0x04
1508 #define _ANSA4 0x10
1509
1510 //==============================================================================
1511
1512 extern __at(0x0191) __sfr EEADR;
1513 extern __at(0x0191) __sfr EEADRL;
1514 extern __at(0x0192) __sfr EEADRH;
1515 extern __at(0x0193) __sfr EEDAT;
1516 extern __at(0x0193) __sfr EEDATL;
1517 extern __at(0x0194) __sfr EEDATH;
1518
1519 //==============================================================================
1520 // EECON1 Bits
1521
1522 extern __at(0x0195) __sfr EECON1;
1523
1524 typedef struct
1525 {
1526 unsigned RD : 1;
1527 unsigned WR : 1;
1528 unsigned WREN : 1;
1529 unsigned WRERR : 1;
1530 unsigned FREE : 1;
1531 unsigned LWLO : 1;
1532 unsigned CFGS : 1;
1533 unsigned EEPGD : 1;
1534 } __EECON1bits_t;
1535
1536 extern __at(0x0195) volatile __EECON1bits_t EECON1bits;
1537
1538 #define _RD 0x01
1539 #define _WR 0x02
1540 #define _WREN 0x04
1541 #define _WRERR 0x08
1542 #define _FREE 0x10
1543 #define _LWLO 0x20
1544 #define _CFGS 0x40
1545 #define _EEPGD 0x80
1546
1547 //==============================================================================
1548
1549 extern __at(0x0196) __sfr EECON2;
1550 extern __at(0x0199) __sfr RCREG;
1551 extern __at(0x019A) __sfr TXREG;
1552 extern __at(0x019B) __sfr SP1BRG;
1553 extern __at(0x019B) __sfr SP1BRGL;
1554 extern __at(0x019B) __sfr SPBRG;
1555 extern __at(0x019B) __sfr SPBRGL;
1556 extern __at(0x019C) __sfr SP1BRGH;
1557 extern __at(0x019C) __sfr SPBRGH;
1558
1559 //==============================================================================
1560 // RCSTA Bits
1561
1562 extern __at(0x019D) __sfr RCSTA;
1563
1564 typedef struct
1565 {
1566 unsigned RX9D : 1;
1567 unsigned OERR : 1;
1568 unsigned FERR : 1;
1569 unsigned ADDEN : 1;
1570 unsigned CREN : 1;
1571 unsigned SREN : 1;
1572 unsigned RX9 : 1;
1573 unsigned SPEN : 1;
1574 } __RCSTAbits_t;
1575
1576 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
1577
1578 #define _RX9D 0x01
1579 #define _OERR 0x02
1580 #define _FERR 0x04
1581 #define _ADDEN 0x08
1582 #define _CREN 0x10
1583 #define _SREN 0x20
1584 #define _RX9 0x40
1585 #define _SPEN 0x80
1586
1587 //==============================================================================
1588
1589
1590 //==============================================================================
1591 // TXSTA Bits
1592
1593 extern __at(0x019E) __sfr TXSTA;
1594
1595 typedef struct
1596 {
1597 unsigned TX9D : 1;
1598 unsigned TRMT : 1;
1599 unsigned BRGH : 1;
1600 unsigned SENDB : 1;
1601 unsigned SYNC : 1;
1602 unsigned TXEN : 1;
1603 unsigned TX9 : 1;
1604 unsigned CSRC : 1;
1605 } __TXSTAbits_t;
1606
1607 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
1608
1609 #define _TX9D 0x01
1610 #define _TRMT 0x02
1611 #define _BRGH 0x04
1612 #define _SENDB 0x08
1613 #define _SYNC 0x10
1614 #define _TXEN 0x20
1615 #define _TX9 0x40
1616 #define _CSRC 0x80
1617
1618 //==============================================================================
1619
1620
1621 //==============================================================================
1622 // BAUDCON Bits
1623
1624 extern __at(0x019F) __sfr BAUDCON;
1625
1626 typedef struct
1627 {
1628 unsigned ABDEN : 1;
1629 unsigned WUE : 1;
1630 unsigned : 1;
1631 unsigned BRG16 : 1;
1632 unsigned SCKP : 1;
1633 unsigned : 1;
1634 unsigned RCIDL : 1;
1635 unsigned ABDOVF : 1;
1636 } __BAUDCONbits_t;
1637
1638 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
1639
1640 #define _ABDEN 0x01
1641 #define _WUE 0x02
1642 #define _BRG16 0x08
1643 #define _SCKP 0x10
1644 #define _RCIDL 0x40
1645 #define _ABDOVF 0x80
1646
1647 //==============================================================================
1648
1649
1650 //==============================================================================
1651 // WPUA Bits
1652
1653 extern __at(0x020C) __sfr WPUA;
1654
1655 typedef union
1656 {
1657 struct
1658 {
1659 unsigned WPUA0 : 1;
1660 unsigned WPUA1 : 1;
1661 unsigned WPUA2 : 1;
1662 unsigned WPUA3 : 1;
1663 unsigned WPUA4 : 1;
1664 unsigned WPUA5 : 1;
1665 unsigned : 1;
1666 unsigned : 1;
1667 };
1668
1669 struct
1670 {
1671 unsigned WPUA : 6;
1672 unsigned : 2;
1673 };
1674 } __WPUAbits_t;
1675
1676 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1677
1678 #define _WPUA0 0x01
1679 #define _WPUA1 0x02
1680 #define _WPUA2 0x04
1681 #define _WPUA3 0x08
1682 #define _WPUA4 0x10
1683 #define _WPUA5 0x20
1684
1685 //==============================================================================
1686
1687 extern __at(0x0211) __sfr SSP1BUF;
1688 extern __at(0x0211) __sfr SSPBUF;
1689 extern __at(0x0212) __sfr SSP1ADD;
1690 extern __at(0x0212) __sfr SSPADD;
1691 extern __at(0x0213) __sfr SSP1MSK;
1692 extern __at(0x0213) __sfr SSPMSK;
1693
1694 //==============================================================================
1695 // SSP1STAT Bits
1696
1697 extern __at(0x0214) __sfr SSP1STAT;
1698
1699 typedef struct
1700 {
1701 unsigned BF : 1;
1702 unsigned UA : 1;
1703 unsigned R_NOT_W : 1;
1704 unsigned S : 1;
1705 unsigned P : 1;
1706 unsigned D_NOT_A : 1;
1707 unsigned CKE : 1;
1708 unsigned SMP : 1;
1709 } __SSP1STATbits_t;
1710
1711 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
1712
1713 #define _BF 0x01
1714 #define _UA 0x02
1715 #define _R_NOT_W 0x04
1716 #define _S 0x08
1717 #define _P 0x10
1718 #define _D_NOT_A 0x20
1719 #define _CKE 0x40
1720 #define _SMP 0x80
1721
1722 //==============================================================================
1723
1724
1725 //==============================================================================
1726 // SSPSTAT Bits
1727
1728 extern __at(0x0214) __sfr SSPSTAT;
1729
1730 typedef struct
1731 {
1732 unsigned BF : 1;
1733 unsigned UA : 1;
1734 unsigned R_NOT_W : 1;
1735 unsigned S : 1;
1736 unsigned P : 1;
1737 unsigned D_NOT_A : 1;
1738 unsigned CKE : 1;
1739 unsigned SMP : 1;
1740 } __SSPSTATbits_t;
1741
1742 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
1743
1744 #define _SSPSTAT_BF 0x01
1745 #define _SSPSTAT_UA 0x02
1746 #define _SSPSTAT_R_NOT_W 0x04
1747 #define _SSPSTAT_S 0x08
1748 #define _SSPSTAT_P 0x10
1749 #define _SSPSTAT_D_NOT_A 0x20
1750 #define _SSPSTAT_CKE 0x40
1751 #define _SSPSTAT_SMP 0x80
1752
1753 //==============================================================================
1754
1755
1756 //==============================================================================
1757 // SSP1CON1 Bits
1758
1759 extern __at(0x0215) __sfr SSP1CON1;
1760
1761 typedef union
1762 {
1763 struct
1764 {
1765 unsigned SSPM0 : 1;
1766 unsigned SSPM1 : 1;
1767 unsigned SSPM2 : 1;
1768 unsigned SSPM3 : 1;
1769 unsigned CKP : 1;
1770 unsigned SSPEN : 1;
1771 unsigned SSPOV : 1;
1772 unsigned WCOL : 1;
1773 };
1774
1775 struct
1776 {
1777 unsigned SSPM : 4;
1778 unsigned : 4;
1779 };
1780 } __SSP1CON1bits_t;
1781
1782 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
1783
1784 #define _SSPM0 0x01
1785 #define _SSPM1 0x02
1786 #define _SSPM2 0x04
1787 #define _SSPM3 0x08
1788 #define _CKP 0x10
1789 #define _SSPEN 0x20
1790 #define _SSPOV 0x40
1791 #define _WCOL 0x80
1792
1793 //==============================================================================
1794
1795
1796 //==============================================================================
1797 // SSPCON Bits
1798
1799 extern __at(0x0215) __sfr SSPCON;
1800
1801 typedef union
1802 {
1803 struct
1804 {
1805 unsigned SSPM0 : 1;
1806 unsigned SSPM1 : 1;
1807 unsigned SSPM2 : 1;
1808 unsigned SSPM3 : 1;
1809 unsigned CKP : 1;
1810 unsigned SSPEN : 1;
1811 unsigned SSPOV : 1;
1812 unsigned WCOL : 1;
1813 };
1814
1815 struct
1816 {
1817 unsigned SSPM : 4;
1818 unsigned : 4;
1819 };
1820 } __SSPCONbits_t;
1821
1822 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
1823
1824 #define _SSPCON_SSPM0 0x01
1825 #define _SSPCON_SSPM1 0x02
1826 #define _SSPCON_SSPM2 0x04
1827 #define _SSPCON_SSPM3 0x08
1828 #define _SSPCON_CKP 0x10
1829 #define _SSPCON_SSPEN 0x20
1830 #define _SSPCON_SSPOV 0x40
1831 #define _SSPCON_WCOL 0x80
1832
1833 //==============================================================================
1834
1835
1836 //==============================================================================
1837 // SSPCON1 Bits
1838
1839 extern __at(0x0215) __sfr SSPCON1;
1840
1841 typedef union
1842 {
1843 struct
1844 {
1845 unsigned SSPM0 : 1;
1846 unsigned SSPM1 : 1;
1847 unsigned SSPM2 : 1;
1848 unsigned SSPM3 : 1;
1849 unsigned CKP : 1;
1850 unsigned SSPEN : 1;
1851 unsigned SSPOV : 1;
1852 unsigned WCOL : 1;
1853 };
1854
1855 struct
1856 {
1857 unsigned SSPM : 4;
1858 unsigned : 4;
1859 };
1860 } __SSPCON1bits_t;
1861
1862 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
1863
1864 #define _SSPCON1_SSPM0 0x01
1865 #define _SSPCON1_SSPM1 0x02
1866 #define _SSPCON1_SSPM2 0x04
1867 #define _SSPCON1_SSPM3 0x08
1868 #define _SSPCON1_CKP 0x10
1869 #define _SSPCON1_SSPEN 0x20
1870 #define _SSPCON1_SSPOV 0x40
1871 #define _SSPCON1_WCOL 0x80
1872
1873 //==============================================================================
1874
1875
1876 //==============================================================================
1877 // SSP1CON2 Bits
1878
1879 extern __at(0x0216) __sfr SSP1CON2;
1880
1881 typedef struct
1882 {
1883 unsigned SEN : 1;
1884 unsigned RSEN : 1;
1885 unsigned PEN : 1;
1886 unsigned RCEN : 1;
1887 unsigned ACKEN : 1;
1888 unsigned ACKDT : 1;
1889 unsigned ACKSTAT : 1;
1890 unsigned GCEN : 1;
1891 } __SSP1CON2bits_t;
1892
1893 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
1894
1895 #define _SEN 0x01
1896 #define _RSEN 0x02
1897 #define _PEN 0x04
1898 #define _RCEN 0x08
1899 #define _ACKEN 0x10
1900 #define _ACKDT 0x20
1901 #define _ACKSTAT 0x40
1902 #define _GCEN 0x80
1903
1904 //==============================================================================
1905
1906
1907 //==============================================================================
1908 // SSPCON2 Bits
1909
1910 extern __at(0x0216) __sfr SSPCON2;
1911
1912 typedef struct
1913 {
1914 unsigned SEN : 1;
1915 unsigned RSEN : 1;
1916 unsigned PEN : 1;
1917 unsigned RCEN : 1;
1918 unsigned ACKEN : 1;
1919 unsigned ACKDT : 1;
1920 unsigned ACKSTAT : 1;
1921 unsigned GCEN : 1;
1922 } __SSPCON2bits_t;
1923
1924 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
1925
1926 #define _SSPCON2_SEN 0x01
1927 #define _SSPCON2_RSEN 0x02
1928 #define _SSPCON2_PEN 0x04
1929 #define _SSPCON2_RCEN 0x08
1930 #define _SSPCON2_ACKEN 0x10
1931 #define _SSPCON2_ACKDT 0x20
1932 #define _SSPCON2_ACKSTAT 0x40
1933 #define _SSPCON2_GCEN 0x80
1934
1935 //==============================================================================
1936
1937
1938 //==============================================================================
1939 // SSP1CON3 Bits
1940
1941 extern __at(0x0217) __sfr SSP1CON3;
1942
1943 typedef struct
1944 {
1945 unsigned DHEN : 1;
1946 unsigned AHEN : 1;
1947 unsigned SBCDE : 1;
1948 unsigned SDAHT : 1;
1949 unsigned BOEN : 1;
1950 unsigned SCIE : 1;
1951 unsigned PCIE : 1;
1952 unsigned ACKTIM : 1;
1953 } __SSP1CON3bits_t;
1954
1955 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
1956
1957 #define _DHEN 0x01
1958 #define _AHEN 0x02
1959 #define _SBCDE 0x04
1960 #define _SDAHT 0x08
1961 #define _BOEN 0x10
1962 #define _SCIE 0x20
1963 #define _PCIE 0x40
1964 #define _ACKTIM 0x80
1965
1966 //==============================================================================
1967
1968
1969 //==============================================================================
1970 // SSPCON3 Bits
1971
1972 extern __at(0x0217) __sfr SSPCON3;
1973
1974 typedef struct
1975 {
1976 unsigned DHEN : 1;
1977 unsigned AHEN : 1;
1978 unsigned SBCDE : 1;
1979 unsigned SDAHT : 1;
1980 unsigned BOEN : 1;
1981 unsigned SCIE : 1;
1982 unsigned PCIE : 1;
1983 unsigned ACKTIM : 1;
1984 } __SSPCON3bits_t;
1985
1986 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
1987
1988 #define _SSPCON3_DHEN 0x01
1989 #define _SSPCON3_AHEN 0x02
1990 #define _SSPCON3_SBCDE 0x04
1991 #define _SSPCON3_SDAHT 0x08
1992 #define _SSPCON3_BOEN 0x10
1993 #define _SSPCON3_SCIE 0x20
1994 #define _SSPCON3_PCIE 0x40
1995 #define _SSPCON3_ACKTIM 0x80
1996
1997 //==============================================================================
1998
1999 extern __at(0x0291) __sfr CCPR1;
2000 extern __at(0x0291) __sfr CCPR1L;
2001 extern __at(0x0292) __sfr CCPR1H;
2002
2003 //==============================================================================
2004 // CCP1CON Bits
2005
2006 extern __at(0x0293) __sfr CCP1CON;
2007
2008 typedef union
2009 {
2010 struct
2011 {
2012 unsigned CCP1M0 : 1;
2013 unsigned CCP1M1 : 1;
2014 unsigned CCP1M2 : 1;
2015 unsigned CCP1M3 : 1;
2016 unsigned DC1B0 : 1;
2017 unsigned DC1B1 : 1;
2018 unsigned P1M0 : 1;
2019 unsigned P1M1 : 1;
2020 };
2021
2022 struct
2023 {
2024 unsigned CCP1M : 4;
2025 unsigned : 4;
2026 };
2027
2028 struct
2029 {
2030 unsigned : 4;
2031 unsigned DC1B : 2;
2032 unsigned : 2;
2033 };
2034
2035 struct
2036 {
2037 unsigned : 6;
2038 unsigned P1M : 2;
2039 };
2040 } __CCP1CONbits_t;
2041
2042 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits;
2043
2044 #define _CCP1M0 0x01
2045 #define _CCP1M1 0x02
2046 #define _CCP1M2 0x04
2047 #define _CCP1M3 0x08
2048 #define _DC1B0 0x10
2049 #define _DC1B1 0x20
2050 #define _P1M0 0x40
2051 #define _P1M1 0x80
2052
2053 //==============================================================================
2054
2055
2056 //==============================================================================
2057 // PWM1CON Bits
2058
2059 extern __at(0x0294) __sfr PWM1CON;
2060
2061 typedef union
2062 {
2063 struct
2064 {
2065 unsigned P1DC0 : 1;
2066 unsigned P1DC1 : 1;
2067 unsigned P1DC2 : 1;
2068 unsigned P1DC3 : 1;
2069 unsigned P1DC4 : 1;
2070 unsigned P1DC5 : 1;
2071 unsigned P1DC6 : 1;
2072 unsigned P1RSEN : 1;
2073 };
2074
2075 struct
2076 {
2077 unsigned P1DC : 7;
2078 unsigned : 1;
2079 };
2080 } __PWM1CONbits_t;
2081
2082 extern __at(0x0294) volatile __PWM1CONbits_t PWM1CONbits;
2083
2084 #define _P1DC0 0x01
2085 #define _P1DC1 0x02
2086 #define _P1DC2 0x04
2087 #define _P1DC3 0x08
2088 #define _P1DC4 0x10
2089 #define _P1DC5 0x20
2090 #define _P1DC6 0x40
2091 #define _P1RSEN 0x80
2092
2093 //==============================================================================
2094
2095
2096 //==============================================================================
2097 // CCP1AS Bits
2098
2099 extern __at(0x0295) __sfr CCP1AS;
2100
2101 typedef union
2102 {
2103 struct
2104 {
2105 unsigned PSS1BD0 : 1;
2106 unsigned PSS1BD1 : 1;
2107 unsigned PSS1AC0 : 1;
2108 unsigned PSS1AC1 : 1;
2109 unsigned CCP1AS0 : 1;
2110 unsigned CCP1AS1 : 1;
2111 unsigned CCP1AS2 : 1;
2112 unsigned CCP1ASE : 1;
2113 };
2114
2115 struct
2116 {
2117 unsigned PSS1BD : 2;
2118 unsigned : 6;
2119 };
2120
2121 struct
2122 {
2123 unsigned : 2;
2124 unsigned PSS1AC : 2;
2125 unsigned : 4;
2126 };
2127
2128 struct
2129 {
2130 unsigned : 4;
2131 unsigned CCP1AS : 3;
2132 unsigned : 1;
2133 };
2134 } __CCP1ASbits_t;
2135
2136 extern __at(0x0295) volatile __CCP1ASbits_t CCP1ASbits;
2137
2138 #define _PSS1BD0 0x01
2139 #define _PSS1BD1 0x02
2140 #define _PSS1AC0 0x04
2141 #define _PSS1AC1 0x08
2142 #define _CCP1AS0 0x10
2143 #define _CCP1AS1 0x20
2144 #define _CCP1AS2 0x40
2145 #define _CCP1ASE 0x80
2146
2147 //==============================================================================
2148
2149
2150 //==============================================================================
2151 // ECCP1AS Bits
2152
2153 extern __at(0x0295) __sfr ECCP1AS;
2154
2155 typedef union
2156 {
2157 struct
2158 {
2159 unsigned PSS1BD0 : 1;
2160 unsigned PSS1BD1 : 1;
2161 unsigned PSS1AC0 : 1;
2162 unsigned PSS1AC1 : 1;
2163 unsigned CCP1AS0 : 1;
2164 unsigned CCP1AS1 : 1;
2165 unsigned CCP1AS2 : 1;
2166 unsigned CCP1ASE : 1;
2167 };
2168
2169 struct
2170 {
2171 unsigned PSS1BD : 2;
2172 unsigned : 6;
2173 };
2174
2175 struct
2176 {
2177 unsigned : 2;
2178 unsigned PSS1AC : 2;
2179 unsigned : 4;
2180 };
2181
2182 struct
2183 {
2184 unsigned : 4;
2185 unsigned CCP1AS : 3;
2186 unsigned : 1;
2187 };
2188 } __ECCP1ASbits_t;
2189
2190 extern __at(0x0295) volatile __ECCP1ASbits_t ECCP1ASbits;
2191
2192 #define _ECCP1AS_PSS1BD0 0x01
2193 #define _ECCP1AS_PSS1BD1 0x02
2194 #define _ECCP1AS_PSS1AC0 0x04
2195 #define _ECCP1AS_PSS1AC1 0x08
2196 #define _ECCP1AS_CCP1AS0 0x10
2197 #define _ECCP1AS_CCP1AS1 0x20
2198 #define _ECCP1AS_CCP1AS2 0x40
2199 #define _ECCP1AS_CCP1ASE 0x80
2200
2201 //==============================================================================
2202
2203
2204 //==============================================================================
2205 // PSTR1CON Bits
2206
2207 extern __at(0x0296) __sfr PSTR1CON;
2208
2209 typedef struct
2210 {
2211 unsigned STR1A : 1;
2212 unsigned STR1B : 1;
2213 unsigned : 1;
2214 unsigned : 1;
2215 unsigned STR1SYNC : 1;
2216 unsigned : 1;
2217 unsigned : 1;
2218 unsigned : 1;
2219 } __PSTR1CONbits_t;
2220
2221 extern __at(0x0296) volatile __PSTR1CONbits_t PSTR1CONbits;
2222
2223 #define _STR1A 0x01
2224 #define _STR1B 0x02
2225 #define _STR1SYNC 0x10
2226
2227 //==============================================================================
2228
2229
2230 //==============================================================================
2231 // IOCAP Bits
2232
2233 extern __at(0x0391) __sfr IOCAP;
2234
2235 typedef union
2236 {
2237 struct
2238 {
2239 unsigned IOCAP0 : 1;
2240 unsigned IOCAP1 : 1;
2241 unsigned IOCAP2 : 1;
2242 unsigned IOCAP3 : 1;
2243 unsigned IOCAP4 : 1;
2244 unsigned IOCAP5 : 1;
2245 unsigned : 1;
2246 unsigned : 1;
2247 };
2248
2249 struct
2250 {
2251 unsigned IOCAP : 6;
2252 unsigned : 2;
2253 };
2254 } __IOCAPbits_t;
2255
2256 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
2257
2258 #define _IOCAP0 0x01
2259 #define _IOCAP1 0x02
2260 #define _IOCAP2 0x04
2261 #define _IOCAP3 0x08
2262 #define _IOCAP4 0x10
2263 #define _IOCAP5 0x20
2264
2265 //==============================================================================
2266
2267
2268 //==============================================================================
2269 // IOCAN Bits
2270
2271 extern __at(0x0392) __sfr IOCAN;
2272
2273 typedef union
2274 {
2275 struct
2276 {
2277 unsigned IOCAN0 : 1;
2278 unsigned IOCAN1 : 1;
2279 unsigned IOCAN2 : 1;
2280 unsigned IOCAN3 : 1;
2281 unsigned IOCAN4 : 1;
2282 unsigned IOCAN5 : 1;
2283 unsigned : 1;
2284 unsigned : 1;
2285 };
2286
2287 struct
2288 {
2289 unsigned IOCAN : 6;
2290 unsigned : 2;
2291 };
2292 } __IOCANbits_t;
2293
2294 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
2295
2296 #define _IOCAN0 0x01
2297 #define _IOCAN1 0x02
2298 #define _IOCAN2 0x04
2299 #define _IOCAN3 0x08
2300 #define _IOCAN4 0x10
2301 #define _IOCAN5 0x20
2302
2303 //==============================================================================
2304
2305
2306 //==============================================================================
2307 // IOCAF Bits
2308
2309 extern __at(0x0393) __sfr IOCAF;
2310
2311 typedef union
2312 {
2313 struct
2314 {
2315 unsigned IOCAF0 : 1;
2316 unsigned IOCAF1 : 1;
2317 unsigned IOCAF2 : 1;
2318 unsigned IOCAF3 : 1;
2319 unsigned IOCAF4 : 1;
2320 unsigned IOCAF5 : 1;
2321 unsigned : 1;
2322 unsigned : 1;
2323 };
2324
2325 struct
2326 {
2327 unsigned IOCAF : 6;
2328 unsigned : 2;
2329 };
2330 } __IOCAFbits_t;
2331
2332 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
2333
2334 #define _IOCAF0 0x01
2335 #define _IOCAF1 0x02
2336 #define _IOCAF2 0x04
2337 #define _IOCAF3 0x08
2338 #define _IOCAF4 0x10
2339 #define _IOCAF5 0x20
2340
2341 //==============================================================================
2342
2343
2344 //==============================================================================
2345 // CLKRCON Bits
2346
2347 extern __at(0x039A) __sfr CLKRCON;
2348
2349 typedef union
2350 {
2351 struct
2352 {
2353 unsigned CLKRDIV0 : 1;
2354 unsigned CLKRDIV1 : 1;
2355 unsigned CLKRDIV2 : 1;
2356 unsigned CLKRDC0 : 1;
2357 unsigned CLKRDC1 : 1;
2358 unsigned CLKRSLR : 1;
2359 unsigned CLKROE : 1;
2360 unsigned CLKREN : 1;
2361 };
2362
2363 struct
2364 {
2365 unsigned CLKRDIV : 3;
2366 unsigned : 5;
2367 };
2368
2369 struct
2370 {
2371 unsigned : 3;
2372 unsigned CLKRDC : 2;
2373 unsigned : 3;
2374 };
2375 } __CLKRCONbits_t;
2376
2377 extern __at(0x039A) volatile __CLKRCONbits_t CLKRCONbits;
2378
2379 #define _CLKRDIV0 0x01
2380 #define _CLKRDIV1 0x02
2381 #define _CLKRDIV2 0x04
2382 #define _CLKRDC0 0x08
2383 #define _CLKRDC1 0x10
2384 #define _CLKRSLR 0x20
2385 #define _CLKROE 0x40
2386 #define _CLKREN 0x80
2387
2388 //==============================================================================
2389
2390
2391 //==============================================================================
2392 // MDCON Bits
2393
2394 extern __at(0x039C) __sfr MDCON;
2395
2396 typedef struct
2397 {
2398 unsigned MDBIT : 1;
2399 unsigned : 1;
2400 unsigned : 1;
2401 unsigned MDOUT : 1;
2402 unsigned MDOPOL : 1;
2403 unsigned MDSLR : 1;
2404 unsigned MDOE : 1;
2405 unsigned MDEN : 1;
2406 } __MDCONbits_t;
2407
2408 extern __at(0x039C) volatile __MDCONbits_t MDCONbits;
2409
2410 #define _MDBIT 0x01
2411 #define _MDOUT 0x08
2412 #define _MDOPOL 0x10
2413 #define _MDSLR 0x20
2414 #define _MDOE 0x40
2415 #define _MDEN 0x80
2416
2417 //==============================================================================
2418
2419
2420 //==============================================================================
2421 // MDSRC Bits
2422
2423 extern __at(0x039D) __sfr MDSRC;
2424
2425 typedef union
2426 {
2427 struct
2428 {
2429 unsigned MDMS0 : 1;
2430 unsigned MDMS1 : 1;
2431 unsigned MDMS2 : 1;
2432 unsigned MDMS3 : 1;
2433 unsigned : 1;
2434 unsigned : 1;
2435 unsigned : 1;
2436 unsigned MDMSODIS : 1;
2437 };
2438
2439 struct
2440 {
2441 unsigned MDMS : 4;
2442 unsigned : 4;
2443 };
2444 } __MDSRCbits_t;
2445
2446 extern __at(0x039D) volatile __MDSRCbits_t MDSRCbits;
2447
2448 #define _MDMS0 0x01
2449 #define _MDMS1 0x02
2450 #define _MDMS2 0x04
2451 #define _MDMS3 0x08
2452 #define _MDMSODIS 0x80
2453
2454 //==============================================================================
2455
2456
2457 //==============================================================================
2458 // MDCARL Bits
2459
2460 extern __at(0x039E) __sfr MDCARL;
2461
2462 typedef union
2463 {
2464 struct
2465 {
2466 unsigned MDCL0 : 1;
2467 unsigned MDCL1 : 1;
2468 unsigned MDCL2 : 1;
2469 unsigned MDCL3 : 1;
2470 unsigned : 1;
2471 unsigned MDCLSYNC : 1;
2472 unsigned MDCLPOL : 1;
2473 unsigned MDCLODIS : 1;
2474 };
2475
2476 struct
2477 {
2478 unsigned MDCL : 4;
2479 unsigned : 4;
2480 };
2481 } __MDCARLbits_t;
2482
2483 extern __at(0x039E) volatile __MDCARLbits_t MDCARLbits;
2484
2485 #define _MDCL0 0x01
2486 #define _MDCL1 0x02
2487 #define _MDCL2 0x04
2488 #define _MDCL3 0x08
2489 #define _MDCLSYNC 0x20
2490 #define _MDCLPOL 0x40
2491 #define _MDCLODIS 0x80
2492
2493 //==============================================================================
2494
2495
2496 //==============================================================================
2497 // MDCARH Bits
2498
2499 extern __at(0x039F) __sfr MDCARH;
2500
2501 typedef union
2502 {
2503 struct
2504 {
2505 unsigned MDCH0 : 1;
2506 unsigned MDCH1 : 1;
2507 unsigned MDCH2 : 1;
2508 unsigned MDCH3 : 1;
2509 unsigned : 1;
2510 unsigned MDCHSYNC : 1;
2511 unsigned MDCHPOL : 1;
2512 unsigned MDCHODIS : 1;
2513 };
2514
2515 struct
2516 {
2517 unsigned MDCH : 4;
2518 unsigned : 4;
2519 };
2520 } __MDCARHbits_t;
2521
2522 extern __at(0x039F) volatile __MDCARHbits_t MDCARHbits;
2523
2524 #define _MDCH0 0x01
2525 #define _MDCH1 0x02
2526 #define _MDCH2 0x04
2527 #define _MDCH3 0x08
2528 #define _MDCHSYNC 0x20
2529 #define _MDCHPOL 0x40
2530 #define _MDCHODIS 0x80
2531
2532 //==============================================================================
2533
2534
2535 //==============================================================================
2536 // STATUS_SHAD Bits
2537
2538 extern __at(0x0FE4) __sfr STATUS_SHAD;
2539
2540 typedef struct
2541 {
2542 unsigned C_SHAD : 1;
2543 unsigned DC_SHAD : 1;
2544 unsigned Z_SHAD : 1;
2545 unsigned : 1;
2546 unsigned : 1;
2547 unsigned : 1;
2548 unsigned : 1;
2549 unsigned : 1;
2550 } __STATUS_SHADbits_t;
2551
2552 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
2553
2554 #define _C_SHAD 0x01
2555 #define _DC_SHAD 0x02
2556 #define _Z_SHAD 0x04
2557
2558 //==============================================================================
2559
2560 extern __at(0x0FE5) __sfr WREG_SHAD;
2561 extern __at(0x0FE6) __sfr BSR_SHAD;
2562 extern __at(0x0FE7) __sfr PCLATH_SHAD;
2563 extern __at(0x0FE8) __sfr FSR0L_SHAD;
2564 extern __at(0x0FE9) __sfr FSR0H_SHAD;
2565 extern __at(0x0FEA) __sfr FSR1L_SHAD;
2566 extern __at(0x0FEB) __sfr FSR1H_SHAD;
2567 extern __at(0x0FED) __sfr STKPTR;
2568 extern __at(0x0FEE) __sfr TOSL;
2569 extern __at(0x0FEF) __sfr TOSH;
2570
2571 //==============================================================================
2572 //
2573 // Configuration Bits
2574 //
2575 //==============================================================================
2576
2577 #define _CONFIG1 0x8007
2578 #define _CONFIG2 0x8008
2579
2580 //----------------------------- CONFIG1 Options -------------------------------
2581
2582 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
2583 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
2584 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
2585 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
2586 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
2587 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin.
2588 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin.
2589 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin.
2590 #define _WDTE_OFF 0x3FE7 // WDT disabled.
2591 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
2592 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
2593 #define _WDTE_ON 0x3FFF // WDT enabled.
2594 #define _PWRTE_ON 0x3FDF // PWRT enabled.
2595 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
2596 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
2597 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
2598 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
2599 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
2600 #define _CPD_ON 0x3EFF // Data memory code protection is enabled.
2601 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
2602 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
2603 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
2604 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
2605 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
2606 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
2607 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
2608 #define _IESO_OFF 0x2FFF // Internal/External Switchover mode is disabled.
2609 #define _IESO_ON 0x3FFF // Internal/External Switchover mode is enabled.
2610 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
2611 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
2612
2613 //----------------------------- CONFIG2 Options -------------------------------
2614
2615 #define _WRT_ALL 0x3FFC // 000h to FFFh write protected, no addresses may be modified by EECON control.
2616 #define _WRT_HALF 0x3FFD // 000h to 7FFh write protected, 800h to FFFh may be modified by EECON control.
2617 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to FFFh may be modified by EECON control.
2618 #define _WRT_OFF 0x3FFF // Write protection off.
2619 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled.
2620 #define _PLLEN_ON 0x3FFF // 4x PLL enabled.
2621 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
2622 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
2623 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
2624 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
2625 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
2626 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled.
2627 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled.
2628 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
2629 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
2630
2631 //==============================================================================
2632
2633 #define _DEVID1 0x8006
2634
2635 #define _IDLOC0 0x8000
2636 #define _IDLOC1 0x8001
2637 #define _IDLOC2 0x8002
2638 #define _IDLOC3 0x8003
2639
2640 //==============================================================================
2641
2642 #ifndef NO_BIT_DEFINES
2643
2644 #define ADON ADCON0bits.ADON // bit 0
2645 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
2646 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
2647 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
2648 #define CHS0 ADCON0bits.CHS0 // bit 2
2649 #define CHS1 ADCON0bits.CHS1 // bit 3
2650 #define CHS2 ADCON0bits.CHS2 // bit 4
2651 #define CHS3 ADCON0bits.CHS3 // bit 5
2652 #define CHS4 ADCON0bits.CHS4 // bit 6
2653
2654 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
2655 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
2656 #define ADCS0 ADCON1bits.ADCS0 // bit 4
2657 #define ADCS1 ADCON1bits.ADCS1 // bit 5
2658 #define ADCS2 ADCON1bits.ADCS2 // bit 6
2659 #define ADFM ADCON1bits.ADFM // bit 7
2660
2661 #define ANSA0 ANSELAbits.ANSA0 // bit 0
2662 #define ANSA1 ANSELAbits.ANSA1 // bit 1
2663 #define ANSA2 ANSELAbits.ANSA2 // bit 2
2664 #define ANSA4 ANSELAbits.ANSA4 // bit 4
2665
2666 #define CCP1SEL APFCONbits.CCP1SEL // bit 0
2667 #define P1BSEL APFCONbits.P1BSEL // bit 1
2668 #define TXCKSEL APFCONbits.TXCKSEL // bit 2
2669 #define T1GSEL APFCONbits.T1GSEL // bit 3
2670 #define SSSEL APFCONbits.SSSEL // bit 5, shadows bit in APFCONbits
2671 #define SS1SEL APFCONbits.SS1SEL // bit 5, shadows bit in APFCONbits
2672 #define SDOSEL APFCONbits.SDOSEL // bit 6, shadows bit in APFCONbits
2673 #define SDO1SEL APFCONbits.SDO1SEL // bit 6, shadows bit in APFCONbits
2674 #define RXDTSEL APFCONbits.RXDTSEL // bit 7
2675
2676 #define ABDEN BAUDCONbits.ABDEN // bit 0
2677 #define WUE BAUDCONbits.WUE // bit 1
2678 #define BRG16 BAUDCONbits.BRG16 // bit 3
2679 #define SCKP BAUDCONbits.SCKP // bit 4
2680 #define RCIDL BAUDCONbits.RCIDL // bit 6
2681 #define ABDOVF BAUDCONbits.ABDOVF // bit 7
2682
2683 #define BORRDY BORCONbits.BORRDY // bit 0
2684 #define BORFS BORCONbits.BORFS // bit 6
2685 #define SBOREN BORCONbits.SBOREN // bit 7
2686
2687 #define BSR0 BSRbits.BSR0 // bit 0
2688 #define BSR1 BSRbits.BSR1 // bit 1
2689 #define BSR2 BSRbits.BSR2 // bit 2
2690 #define BSR3 BSRbits.BSR3 // bit 3
2691 #define BSR4 BSRbits.BSR4 // bit 4
2692
2693 #define PSS1BD0 CCP1ASbits.PSS1BD0 // bit 0
2694 #define PSS1BD1 CCP1ASbits.PSS1BD1 // bit 1
2695 #define PSS1AC0 CCP1ASbits.PSS1AC0 // bit 2
2696 #define PSS1AC1 CCP1ASbits.PSS1AC1 // bit 3
2697 #define CCP1AS0 CCP1ASbits.CCP1AS0 // bit 4
2698 #define CCP1AS1 CCP1ASbits.CCP1AS1 // bit 5
2699 #define CCP1AS2 CCP1ASbits.CCP1AS2 // bit 6
2700 #define CCP1ASE CCP1ASbits.CCP1ASE // bit 7
2701
2702 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
2703 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
2704 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
2705 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
2706 #define DC1B0 CCP1CONbits.DC1B0 // bit 4
2707 #define DC1B1 CCP1CONbits.DC1B1 // bit 5
2708 #define P1M0 CCP1CONbits.P1M0 // bit 6
2709 #define P1M1 CCP1CONbits.P1M1 // bit 7
2710
2711 #define CLKRDIV0 CLKRCONbits.CLKRDIV0 // bit 0
2712 #define CLKRDIV1 CLKRCONbits.CLKRDIV1 // bit 1
2713 #define CLKRDIV2 CLKRCONbits.CLKRDIV2 // bit 2
2714 #define CLKRDC0 CLKRCONbits.CLKRDC0 // bit 3
2715 #define CLKRDC1 CLKRCONbits.CLKRDC1 // bit 4
2716 #define CLKRSLR CLKRCONbits.CLKRSLR // bit 5
2717 #define CLKROE CLKRCONbits.CLKROE // bit 6
2718 #define CLKREN CLKRCONbits.CLKREN // bit 7
2719
2720 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
2721 #define C1HYS CM1CON0bits.C1HYS // bit 1
2722 #define C1SP CM1CON0bits.C1SP // bit 2
2723 #define C1POL CM1CON0bits.C1POL // bit 4
2724 #define C1OE CM1CON0bits.C1OE // bit 5
2725 #define C1OUT CM1CON0bits.C1OUT // bit 6
2726 #define C1ON CM1CON0bits.C1ON // bit 7
2727
2728 #define C1NCH CM1CON1bits.C1NCH // bit 0, shadows bit in CM1CON1bits
2729 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0, shadows bit in CM1CON1bits
2730 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
2731 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
2732 #define C1INTN CM1CON1bits.C1INTN // bit 6
2733 #define C1INTP CM1CON1bits.C1INTP // bit 7
2734
2735 #define MC1OUT CMOUTbits.MC1OUT // bit 0
2736
2737 #define T0XCS CPSCON0bits.T0XCS // bit 0
2738 #define CPSOUT CPSCON0bits.CPSOUT // bit 1
2739 #define CPSRNG0 CPSCON0bits.CPSRNG0 // bit 2
2740 #define CPSRNG1 CPSCON0bits.CPSRNG1 // bit 3
2741 #define CPSRM CPSCON0bits.CPSRM // bit 6
2742 #define CPSON CPSCON0bits.CPSON // bit 7
2743
2744 #define CPSCH0 CPSCON1bits.CPSCH0 // bit 0
2745 #define CPSCH1 CPSCON1bits.CPSCH1 // bit 1
2746
2747 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2
2748 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3
2749 #define DACOE DACCON0bits.DACOE // bit 5
2750 #define DACLPS DACCON0bits.DACLPS // bit 6
2751 #define DACEN DACCON0bits.DACEN // bit 7
2752
2753 #define DACR0 DACCON1bits.DACR0 // bit 0
2754 #define DACR1 DACCON1bits.DACR1 // bit 1
2755 #define DACR2 DACCON1bits.DACR2 // bit 2
2756 #define DACR3 DACCON1bits.DACR3 // bit 3
2757 #define DACR4 DACCON1bits.DACR4 // bit 4
2758
2759 #define RD EECON1bits.RD // bit 0
2760 #define WR EECON1bits.WR // bit 1
2761 #define WREN EECON1bits.WREN // bit 2
2762 #define WRERR EECON1bits.WRERR // bit 3
2763 #define FREE EECON1bits.FREE // bit 4
2764 #define LWLO EECON1bits.LWLO // bit 5
2765 #define CFGS EECON1bits.CFGS // bit 6
2766 #define EEPGD EECON1bits.EEPGD // bit 7
2767
2768 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
2769 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
2770 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
2771 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
2772 #define TSRNG FVRCONbits.TSRNG // bit 4
2773 #define TSEN FVRCONbits.TSEN // bit 5
2774 #define FVRRDY FVRCONbits.FVRRDY // bit 6
2775 #define FVREN FVRCONbits.FVREN // bit 7
2776
2777 #define IOCIF INTCONbits.IOCIF // bit 0
2778 #define INTF INTCONbits.INTF // bit 1
2779 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
2780 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
2781 #define IOCIE INTCONbits.IOCIE // bit 3
2782 #define INTE INTCONbits.INTE // bit 4
2783 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
2784 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
2785 #define PEIE INTCONbits.PEIE // bit 6
2786 #define GIE INTCONbits.GIE // bit 7
2787
2788 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
2789 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
2790 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
2791 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
2792 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
2793 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
2794
2795 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
2796 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
2797 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
2798 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
2799 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
2800 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
2801
2802 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
2803 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
2804 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
2805 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
2806 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
2807 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
2808
2809 #define LATA0 LATAbits.LATA0 // bit 0
2810 #define LATA1 LATAbits.LATA1 // bit 1
2811 #define LATA2 LATAbits.LATA2 // bit 2
2812 #define LATA4 LATAbits.LATA4 // bit 4
2813 #define LATA5 LATAbits.LATA5 // bit 5
2814
2815 #define MDCH0 MDCARHbits.MDCH0 // bit 0
2816 #define MDCH1 MDCARHbits.MDCH1 // bit 1
2817 #define MDCH2 MDCARHbits.MDCH2 // bit 2
2818 #define MDCH3 MDCARHbits.MDCH3 // bit 3
2819 #define MDCHSYNC MDCARHbits.MDCHSYNC // bit 5
2820 #define MDCHPOL MDCARHbits.MDCHPOL // bit 6
2821 #define MDCHODIS MDCARHbits.MDCHODIS // bit 7
2822
2823 #define MDCL0 MDCARLbits.MDCL0 // bit 0
2824 #define MDCL1 MDCARLbits.MDCL1 // bit 1
2825 #define MDCL2 MDCARLbits.MDCL2 // bit 2
2826 #define MDCL3 MDCARLbits.MDCL3 // bit 3
2827 #define MDCLSYNC MDCARLbits.MDCLSYNC // bit 5
2828 #define MDCLPOL MDCARLbits.MDCLPOL // bit 6
2829 #define MDCLODIS MDCARLbits.MDCLODIS // bit 7
2830
2831 #define MDBIT MDCONbits.MDBIT // bit 0
2832 #define MDOUT MDCONbits.MDOUT // bit 3
2833 #define MDOPOL MDCONbits.MDOPOL // bit 4
2834 #define MDSLR MDCONbits.MDSLR // bit 5
2835 #define MDOE MDCONbits.MDOE // bit 6
2836 #define MDEN MDCONbits.MDEN // bit 7
2837
2838 #define MDMS0 MDSRCbits.MDMS0 // bit 0
2839 #define MDMS1 MDSRCbits.MDMS1 // bit 1
2840 #define MDMS2 MDSRCbits.MDMS2 // bit 2
2841 #define MDMS3 MDSRCbits.MDMS3 // bit 3
2842 #define MDMSODIS MDSRCbits.MDMSODIS // bit 7
2843
2844 #define PS0 OPTION_REGbits.PS0 // bit 0
2845 #define PS1 OPTION_REGbits.PS1 // bit 1
2846 #define PS2 OPTION_REGbits.PS2 // bit 2
2847 #define PSA OPTION_REGbits.PSA // bit 3
2848 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
2849 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
2850 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
2851 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
2852 #define INTEDG OPTION_REGbits.INTEDG // bit 6
2853 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
2854
2855 #define SCS0 OSCCONbits.SCS0 // bit 0
2856 #define SCS1 OSCCONbits.SCS1 // bit 1
2857 #define IRCF0 OSCCONbits.IRCF0 // bit 3
2858 #define IRCF1 OSCCONbits.IRCF1 // bit 4
2859 #define IRCF2 OSCCONbits.IRCF2 // bit 5
2860 #define IRCF3 OSCCONbits.IRCF3 // bit 6
2861 #define SPLLEN OSCCONbits.SPLLEN // bit 7
2862
2863 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
2864 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
2865 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
2866 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
2867 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
2868 #define OSTS OSCSTATbits.OSTS // bit 5
2869 #define PLLR OSCSTATbits.PLLR // bit 6
2870 #define T1OSCR OSCSTATbits.T1OSCR // bit 7
2871
2872 #define TUN0 OSCTUNEbits.TUN0 // bit 0
2873 #define TUN1 OSCTUNEbits.TUN1 // bit 1
2874 #define TUN2 OSCTUNEbits.TUN2 // bit 2
2875 #define TUN3 OSCTUNEbits.TUN3 // bit 3
2876 #define TUN4 OSCTUNEbits.TUN4 // bit 4
2877 #define TUN5 OSCTUNEbits.TUN5 // bit 5
2878
2879 #define NOT_BOR PCONbits.NOT_BOR // bit 0
2880 #define NOT_POR PCONbits.NOT_POR // bit 1
2881 #define NOT_RI PCONbits.NOT_RI // bit 2
2882 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
2883 #define STKUNF PCONbits.STKUNF // bit 6
2884 #define STKOVF PCONbits.STKOVF // bit 7
2885
2886 #define TMR1IE PIE1bits.TMR1IE // bit 0
2887 #define TMR2IE PIE1bits.TMR2IE // bit 1
2888 #define CCP1IE PIE1bits.CCP1IE // bit 2
2889 #define SSP1IE PIE1bits.SSP1IE // bit 3
2890 #define TXIE PIE1bits.TXIE // bit 4
2891 #define RCIE PIE1bits.RCIE // bit 5
2892 #define ADIE PIE1bits.ADIE // bit 6
2893 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
2894
2895 #define BCL1IE PIE2bits.BCL1IE // bit 3
2896 #define EEIE PIE2bits.EEIE // bit 4
2897 #define C1IE PIE2bits.C1IE // bit 5
2898 #define OSFIE PIE2bits.OSFIE // bit 7
2899
2900 #define TMR1IF PIR1bits.TMR1IF // bit 0
2901 #define TMR2IF PIR1bits.TMR2IF // bit 1
2902 #define CCP1IF PIR1bits.CCP1IF // bit 2
2903 #define SSP1IF PIR1bits.SSP1IF // bit 3
2904 #define TXIF PIR1bits.TXIF // bit 4
2905 #define RCIF PIR1bits.RCIF // bit 5
2906 #define ADIF PIR1bits.ADIF // bit 6
2907 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
2908
2909 #define BCL1IF PIR2bits.BCL1IF // bit 3
2910 #define EEIF PIR2bits.EEIF // bit 4
2911 #define C1IF PIR2bits.C1IF // bit 5
2912 #define OSFIF PIR2bits.OSFIF // bit 7
2913
2914 #define RA0 PORTAbits.RA0 // bit 0
2915 #define RA1 PORTAbits.RA1 // bit 1
2916 #define RA2 PORTAbits.RA2 // bit 2
2917 #define RA3 PORTAbits.RA3 // bit 3
2918 #define RA4 PORTAbits.RA4 // bit 4
2919 #define RA5 PORTAbits.RA5 // bit 5
2920
2921 #define STR1A PSTR1CONbits.STR1A // bit 0
2922 #define STR1B PSTR1CONbits.STR1B // bit 1
2923 #define STR1SYNC PSTR1CONbits.STR1SYNC // bit 4
2924
2925 #define P1DC0 PWM1CONbits.P1DC0 // bit 0
2926 #define P1DC1 PWM1CONbits.P1DC1 // bit 1
2927 #define P1DC2 PWM1CONbits.P1DC2 // bit 2
2928 #define P1DC3 PWM1CONbits.P1DC3 // bit 3
2929 #define P1DC4 PWM1CONbits.P1DC4 // bit 4
2930 #define P1DC5 PWM1CONbits.P1DC5 // bit 5
2931 #define P1DC6 PWM1CONbits.P1DC6 // bit 6
2932 #define P1RSEN PWM1CONbits.P1RSEN // bit 7
2933
2934 #define RX9D RCSTAbits.RX9D // bit 0
2935 #define OERR RCSTAbits.OERR // bit 1
2936 #define FERR RCSTAbits.FERR // bit 2
2937 #define ADDEN RCSTAbits.ADDEN // bit 3
2938 #define CREN RCSTAbits.CREN // bit 4
2939 #define SREN RCSTAbits.SREN // bit 5
2940 #define RX9 RCSTAbits.RX9 // bit 6
2941 #define SPEN RCSTAbits.SPEN // bit 7
2942
2943 #define SRPR SRCON0bits.SRPR // bit 0
2944 #define SRPS SRCON0bits.SRPS // bit 1
2945 #define SRNQEN SRCON0bits.SRNQEN // bit 2
2946 #define SRQEN SRCON0bits.SRQEN // bit 3
2947 #define SRCLK0 SRCON0bits.SRCLK0 // bit 4
2948 #define SRCLK1 SRCON0bits.SRCLK1 // bit 5
2949 #define SRCLK2 SRCON0bits.SRCLK2 // bit 6
2950 #define SRLEN SRCON0bits.SRLEN // bit 7
2951
2952 #define SRRC1E SRCON1bits.SRRC1E // bit 0
2953 #define SRRCKE SRCON1bits.SRRCKE // bit 2
2954 #define SRRPE SRCON1bits.SRRPE // bit 3
2955 #define SRSC1E SRCON1bits.SRSC1E // bit 4
2956 #define SRSCKE SRCON1bits.SRSCKE // bit 6
2957 #define SRSPE SRCON1bits.SRSPE // bit 7
2958
2959 #define SSPM0 SSP1CON1bits.SSPM0 // bit 0
2960 #define SSPM1 SSP1CON1bits.SSPM1 // bit 1
2961 #define SSPM2 SSP1CON1bits.SSPM2 // bit 2
2962 #define SSPM3 SSP1CON1bits.SSPM3 // bit 3
2963 #define CKP SSP1CON1bits.CKP // bit 4
2964 #define SSPEN SSP1CON1bits.SSPEN // bit 5
2965 #define SSPOV SSP1CON1bits.SSPOV // bit 6
2966 #define WCOL SSP1CON1bits.WCOL // bit 7
2967
2968 #define SEN SSP1CON2bits.SEN // bit 0
2969 #define RSEN SSP1CON2bits.RSEN // bit 1
2970 #define PEN SSP1CON2bits.PEN // bit 2
2971 #define RCEN SSP1CON2bits.RCEN // bit 3
2972 #define ACKEN SSP1CON2bits.ACKEN // bit 4
2973 #define ACKDT SSP1CON2bits.ACKDT // bit 5
2974 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
2975 #define GCEN SSP1CON2bits.GCEN // bit 7
2976
2977 #define DHEN SSP1CON3bits.DHEN // bit 0
2978 #define AHEN SSP1CON3bits.AHEN // bit 1
2979 #define SBCDE SSP1CON3bits.SBCDE // bit 2
2980 #define SDAHT SSP1CON3bits.SDAHT // bit 3
2981 #define BOEN SSP1CON3bits.BOEN // bit 4
2982 #define SCIE SSP1CON3bits.SCIE // bit 5
2983 #define PCIE SSP1CON3bits.PCIE // bit 6
2984 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
2985
2986 #define BF SSP1STATbits.BF // bit 0
2987 #define UA SSP1STATbits.UA // bit 1
2988 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
2989 #define S SSP1STATbits.S // bit 3
2990 #define P SSP1STATbits.P // bit 4
2991 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
2992 #define CKE SSP1STATbits.CKE // bit 6
2993 #define SMP SSP1STATbits.SMP // bit 7
2994
2995 #define C STATUSbits.C // bit 0
2996 #define DC STATUSbits.DC // bit 1
2997 #define Z STATUSbits.Z // bit 2
2998 #define NOT_PD STATUSbits.NOT_PD // bit 3
2999 #define NOT_TO STATUSbits.NOT_TO // bit 4
3000
3001 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
3002 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
3003 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
3004
3005 #define TMR1ON T1CONbits.TMR1ON // bit 0
3006 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
3007 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
3008 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
3009 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
3010 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
3011 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
3012
3013 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
3014 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
3015 #define T1GVAL T1GCONbits.T1GVAL // bit 2
3016 #define T1GGO T1GCONbits.T1GGO // bit 3
3017 #define T1GSPM T1GCONbits.T1GSPM // bit 4
3018 #define T1GTM T1GCONbits.T1GTM // bit 5
3019 #define T1GPOL T1GCONbits.T1GPOL // bit 6
3020 #define TMR1GE T1GCONbits.TMR1GE // bit 7
3021
3022 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
3023 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
3024 #define TMR2ON T2CONbits.TMR2ON // bit 2
3025 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
3026 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
3027 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
3028 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
3029
3030 #define TRISA0 TRISAbits.TRISA0 // bit 0
3031 #define TRISA1 TRISAbits.TRISA1 // bit 1
3032 #define TRISA2 TRISAbits.TRISA2 // bit 2
3033 #define TRISA3 TRISAbits.TRISA3 // bit 3
3034 #define TRISA4 TRISAbits.TRISA4 // bit 4
3035 #define TRISA5 TRISAbits.TRISA5 // bit 5
3036
3037 #define TX9D TXSTAbits.TX9D // bit 0
3038 #define TRMT TXSTAbits.TRMT // bit 1
3039 #define BRGH TXSTAbits.BRGH // bit 2
3040 #define SENDB TXSTAbits.SENDB // bit 3
3041 #define SYNC TXSTAbits.SYNC // bit 4
3042 #define TXEN TXSTAbits.TXEN // bit 5
3043 #define TX9 TXSTAbits.TX9 // bit 6
3044 #define CSRC TXSTAbits.CSRC // bit 7
3045
3046 #define SWDTEN WDTCONbits.SWDTEN // bit 0
3047 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
3048 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
3049 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
3050 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
3051 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
3052
3053 #define WPUA0 WPUAbits.WPUA0 // bit 0
3054 #define WPUA1 WPUAbits.WPUA1 // bit 1
3055 #define WPUA2 WPUAbits.WPUA2 // bit 2
3056 #define WPUA3 WPUAbits.WPUA3 // bit 3
3057 #define WPUA4 WPUAbits.WPUA4 // bit 4
3058 #define WPUA5 WPUAbits.WPUA5 // bit 5
3059
3060 #endif // #ifndef NO_BIT_DEFINES
3061
3062 #endif // #ifndef __PIC12LF1840T39A_H__
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