2 * This declarations of the PIC16C710 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:02 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16C710_H__
26 #define __PIC16C710_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define ADCON0_ADDR 0x0008
44 #define ADRES_ADDR 0x0009
45 #define PCLATH_ADDR 0x000A
46 #define INTCON_ADDR 0x000B
47 #define OPTION_REG_ADDR 0x0081
48 #define TRISA_ADDR 0x0085
49 #define TRISB_ADDR 0x0086
50 #define PCON_ADDR 0x0087
51 #define ADCON1_ADDR 0x0088
53 #endif // #ifndef NO_ADDR_DEFINES
55 //==============================================================================
57 // Register Definitions
59 //==============================================================================
61 extern __at(0x0000) __sfr INDF
;
62 extern __at(0x0001) __sfr TMR0
;
63 extern __at(0x0002) __sfr PCL
;
65 //==============================================================================
68 extern __at(0x0003) __sfr STATUS
;
92 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
103 //==============================================================================
105 extern __at(0x0004) __sfr FSR
;
107 //==============================================================================
110 extern __at(0x0005) __sfr PORTA
;
133 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
141 //==============================================================================
144 //==============================================================================
147 extern __at(0x0006) __sfr PORTB
;
161 extern __at(0x0006) volatile __PORTBbits_t PORTBbits
;
172 //==============================================================================
175 //==============================================================================
178 extern __at(0x0008) __sfr ADCON0
;
186 unsigned GO_NOT_DONE
: 1;
210 unsigned NOT_DONE
: 1;
222 unsigned GO_DONE
: 1;
244 extern __at(0x0008) volatile __ADCON0bits_t ADCON0bits
;
248 #define _GO_NOT_DONE 0x04
250 #define _NOT_DONE 0x04
251 #define _GO_DONE 0x04
257 //==============================================================================
259 extern __at(0x0009) __sfr ADRES
;
260 extern __at(0x000A) __sfr PCLATH
;
262 //==============================================================================
265 extern __at(0x000B) __sfr INTCON
;
294 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
307 //==============================================================================
310 //==============================================================================
313 extern __at(0x0081) __sfr OPTION_REG
;
326 unsigned NOT_RBPU
: 1;
334 } __OPTION_REGbits_t
;
336 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
345 #define _NOT_RBPU 0x80
347 //==============================================================================
350 //==============================================================================
353 extern __at(0x0085) __sfr TRISA
;
376 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
384 //==============================================================================
387 //==============================================================================
390 extern __at(0x0086) __sfr TRISB
;
404 extern __at(0x0086) volatile __TRISBbits_t TRISBbits
;
415 //==============================================================================
418 //==============================================================================
421 extern __at(0x0087) __sfr PCON
;
427 unsigned NOT_BOR
: 1;
428 unsigned NOT_POR
: 1;
450 extern __at(0x0087) volatile __PCONbits_t PCONbits
;
452 #define _NOT_BOR 0x01
454 #define _NOT_POR 0x02
456 //==============================================================================
459 //==============================================================================
462 extern __at(0x0088) __sfr ADCON1
;
485 extern __at(0x0088) volatile __ADCON1bits_t ADCON1bits
;
490 //==============================================================================
493 //==============================================================================
495 // Configuration Bits
497 //==============================================================================
499 #define _CONFIG1 0x2007
501 //----------------------------- CONFIG1 Options -------------------------------
503 #define _FOSC_LP 0x3FFC // LP oscillator.
504 #define _LP_OSC 0x3FFC // LP oscillator.
505 #define _FOSC_XT 0x3FFD // XT oscillator.
506 #define _XT_OSC 0x3FFD // XT oscillator.
507 #define _FOSC_HS 0x3FFE // HS oscillator.
508 #define _HS_OSC 0x3FFE // HS oscillator.
509 #define _FOSC_RC 0x3FFF // RC oscillator.
510 #define _RC_OSC 0x3FFF // RC oscillator.
511 #define _WDTE_OFF 0x3FFB // WDT disabled.
512 #define _WDT_OFF 0x3FFB // WDT disabled.
513 #define _WDTE_ON 0x3FFF // WDT enabled.
514 #define _WDT_ON 0x3FFF // WDT enabled.
515 #define _PWRTE_ON 0x3FF7 // PWRT enabled.
516 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
517 #define _CP_ON 0x004F // Code protection on.
518 #define _CP_OFF 0x3FFF // Code protection off.
519 #define _BOREN_OFF 0x3FBF // BOR disabled.
520 #define _BODEN_OFF 0x3FBF // BOR disabled.
521 #define _BOREN_ON 0x3FFF // BOR enabled.
522 #define _BODEN_ON 0x3FFF // BOR enabled.
524 //==============================================================================
526 #define _IDLOC0 0x2000
527 #define _IDLOC1 0x2001
528 #define _IDLOC2 0x2002
529 #define _IDLOC3 0x2003
531 //==============================================================================
533 #ifndef NO_BIT_DEFINES
535 #define ADON ADCON0bits.ADON // bit 0
536 #define ADIF ADCON0bits.ADIF // bit 1
537 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 2, shadows bit in ADCON0bits
538 #define GO ADCON0bits.GO // bit 2, shadows bit in ADCON0bits
539 #define NOT_DONE ADCON0bits.NOT_DONE // bit 2, shadows bit in ADCON0bits
540 #define GO_DONE ADCON0bits.GO_DONE // bit 2, shadows bit in ADCON0bits
541 #define CHS0 ADCON0bits.CHS0 // bit 3
542 #define CHS1 ADCON0bits.CHS1 // bit 4
543 #define ADCS0 ADCON0bits.ADCS0 // bit 6
544 #define ADCS1 ADCON0bits.ADCS1 // bit 7
546 #define PCFG0 ADCON1bits.PCFG0 // bit 0
547 #define PCFG1 ADCON1bits.PCFG1 // bit 1
549 #define RBIF INTCONbits.RBIF // bit 0
550 #define INTF INTCONbits.INTF // bit 1
551 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
552 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
553 #define RBIE INTCONbits.RBIE // bit 3
554 #define INTE INTCONbits.INTE // bit 4
555 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
556 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
557 #define ADIE INTCONbits.ADIE // bit 6
558 #define GIE INTCONbits.GIE // bit 7
560 #define PS0 OPTION_REGbits.PS0 // bit 0
561 #define PS1 OPTION_REGbits.PS1 // bit 1
562 #define PS2 OPTION_REGbits.PS2 // bit 2
563 #define PSA OPTION_REGbits.PSA // bit 3
564 #define T0SE OPTION_REGbits.T0SE // bit 4
565 #define T0CS OPTION_REGbits.T0CS // bit 5
566 #define INTEDG OPTION_REGbits.INTEDG // bit 6
567 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
569 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
570 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
571 #define NOT_POR PCONbits.NOT_POR // bit 1
573 #define RA0 PORTAbits.RA0 // bit 0
574 #define RA1 PORTAbits.RA1 // bit 1
575 #define RA2 PORTAbits.RA2 // bit 2
576 #define RA3 PORTAbits.RA3 // bit 3
577 #define RA4 PORTAbits.RA4 // bit 4
579 #define RB0 PORTBbits.RB0 // bit 0
580 #define RB1 PORTBbits.RB1 // bit 1
581 #define RB2 PORTBbits.RB2 // bit 2
582 #define RB3 PORTBbits.RB3 // bit 3
583 #define RB4 PORTBbits.RB4 // bit 4
584 #define RB5 PORTBbits.RB5 // bit 5
585 #define RB6 PORTBbits.RB6 // bit 6
586 #define RB7 PORTBbits.RB7 // bit 7
588 #define C STATUSbits.C // bit 0
589 #define DC STATUSbits.DC // bit 1
590 #define Z STATUSbits.Z // bit 2
591 #define NOT_PD STATUSbits.NOT_PD // bit 3
592 #define NOT_TO STATUSbits.NOT_TO // bit 4
593 #define RP0 STATUSbits.RP0 // bit 5
594 #define RP1 STATUSbits.RP1 // bit 6
595 #define IRP STATUSbits.IRP // bit 7
597 #define TRISA0 TRISAbits.TRISA0 // bit 0
598 #define TRISA1 TRISAbits.TRISA1 // bit 1
599 #define TRISA2 TRISAbits.TRISA2 // bit 2
600 #define TRISA3 TRISAbits.TRISA3 // bit 3
601 #define TRISA4 TRISAbits.TRISA4 // bit 4
603 #define TRISB0 TRISBbits.TRISB0 // bit 0
604 #define TRISB1 TRISBbits.TRISB1 // bit 1
605 #define TRISB2 TRISBbits.TRISB2 // bit 2
606 #define TRISB3 TRISBbits.TRISB3 // bit 3
607 #define TRISB4 TRISBbits.TRISB4 // bit 4
608 #define TRISB5 TRISBbits.TRISB5 // bit 5
609 #define TRISB6 TRISBbits.TRISB6 // bit 6
610 #define TRISB7 TRISBbits.TRISB7 // bit 7
612 #endif // #ifndef NO_BIT_DEFINES
614 #endif // #ifndef __PIC16C710_H__