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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16f1508.h
blob21c736fd0cbee94427565f60bf30ec5cbf2692e0
1 /*
2 * This declarations of the PIC16F1508 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:06 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16F1508_H__
26 #define __PIC16F1508_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PIR1_ADDR 0x0011
54 #define PIR2_ADDR 0x0012
55 #define PIR3_ADDR 0x0013
56 #define TMR0_ADDR 0x0015
57 #define TMR1_ADDR 0x0016
58 #define TMR1L_ADDR 0x0016
59 #define TMR1H_ADDR 0x0017
60 #define T1CON_ADDR 0x0018
61 #define T1GCON_ADDR 0x0019
62 #define TMR2_ADDR 0x001A
63 #define PR2_ADDR 0x001B
64 #define T2CON_ADDR 0x001C
65 #define TRISA_ADDR 0x008C
66 #define TRISB_ADDR 0x008D
67 #define TRISC_ADDR 0x008E
68 #define PIE1_ADDR 0x0091
69 #define PIE2_ADDR 0x0092
70 #define PIE3_ADDR 0x0093
71 #define OPTION_REG_ADDR 0x0095
72 #define PCON_ADDR 0x0096
73 #define WDTCON_ADDR 0x0097
74 #define OSCCON_ADDR 0x0099
75 #define OSCSTAT_ADDR 0x009A
76 #define ADRES_ADDR 0x009B
77 #define ADRESL_ADDR 0x009B
78 #define ADRESH_ADDR 0x009C
79 #define ADCON0_ADDR 0x009D
80 #define ADCON1_ADDR 0x009E
81 #define ADCON2_ADDR 0x009F
82 #define LATA_ADDR 0x010C
83 #define LATB_ADDR 0x010D
84 #define LATC_ADDR 0x010E
85 #define CM1CON0_ADDR 0x0111
86 #define CM1CON1_ADDR 0x0112
87 #define CM2CON0_ADDR 0x0113
88 #define CM2CON1_ADDR 0x0114
89 #define CMOUT_ADDR 0x0115
90 #define BORCON_ADDR 0x0116
91 #define FVRCON_ADDR 0x0117
92 #define DACCON0_ADDR 0x0118
93 #define DACCON1_ADDR 0x0119
94 #define APFCON_ADDR 0x011D
95 #define ANSELA_ADDR 0x018C
96 #define ANSELB_ADDR 0x018D
97 #define ANSELC_ADDR 0x018E
98 #define PMADR_ADDR 0x0191
99 #define PMADRL_ADDR 0x0191
100 #define PMADRH_ADDR 0x0192
101 #define PMDAT_ADDR 0x0193
102 #define PMDATL_ADDR 0x0193
103 #define PMDATH_ADDR 0x0194
104 #define PMCON1_ADDR 0x0195
105 #define PMCON2_ADDR 0x0196
106 #define VREGCON_ADDR 0x0197
107 #define RCREG_ADDR 0x0199
108 #define TXREG_ADDR 0x019A
109 #define SPBRG_ADDR 0x019B
110 #define SPBRGL_ADDR 0x019B
111 #define SPBRGH_ADDR 0x019C
112 #define RCSTA_ADDR 0x019D
113 #define TXSTA_ADDR 0x019E
114 #define BAUDCON_ADDR 0x019F
115 #define WPUA_ADDR 0x020C
116 #define WPUB_ADDR 0x020D
117 #define SSP1BUF_ADDR 0x0211
118 #define SSPBUF_ADDR 0x0211
119 #define SSP1ADD_ADDR 0x0212
120 #define SSPADD_ADDR 0x0212
121 #define SSP1MSK_ADDR 0x0213
122 #define SSPMSK_ADDR 0x0213
123 #define SSP1STAT_ADDR 0x0214
124 #define SSPSTAT_ADDR 0x0214
125 #define SSP1CON1_ADDR 0x0215
126 #define SSPCON_ADDR 0x0215
127 #define SSPCON1_ADDR 0x0215
128 #define SSP1CON2_ADDR 0x0216
129 #define SSPCON2_ADDR 0x0216
130 #define SSP1CON3_ADDR 0x0217
131 #define SSPCON3_ADDR 0x0217
132 #define IOCAP_ADDR 0x0391
133 #define IOCAN_ADDR 0x0392
134 #define IOCAF_ADDR 0x0393
135 #define IOCBP_ADDR 0x0394
136 #define IOCBN_ADDR 0x0395
137 #define IOCBF_ADDR 0x0396
138 #define NCO1ACC_ADDR 0x0498
139 #define NCO1ACCL_ADDR 0x0498
140 #define NCO1ACCH_ADDR 0x0499
141 #define NCO1ACCU_ADDR 0x049A
142 #define NCO1INC_ADDR 0x049B
143 #define NCO1INCL_ADDR 0x049B
144 #define NCO1INCH_ADDR 0x049C
145 #define NCO1INCU_ADDR 0x049D
146 #define NCO1CON_ADDR 0x049E
147 #define NCO1CLK_ADDR 0x049F
148 #define PWM1DCL_ADDR 0x0611
149 #define PWM1DCH_ADDR 0x0612
150 #define PWM1CON_ADDR 0x0613
151 #define PWM1CON0_ADDR 0x0613
152 #define PWM2DCL_ADDR 0x0614
153 #define PWM2DCH_ADDR 0x0615
154 #define PWM2CON_ADDR 0x0616
155 #define PWM2CON0_ADDR 0x0616
156 #define PWM3DCL_ADDR 0x0617
157 #define PWM3DCH_ADDR 0x0618
158 #define PWM3CON_ADDR 0x0619
159 #define PWM3CON0_ADDR 0x0619
160 #define PWM4DCL_ADDR 0x061A
161 #define PWM4DCH_ADDR 0x061B
162 #define PWM4CON_ADDR 0x061C
163 #define PWM4CON0_ADDR 0x061C
164 #define CWG1DBR_ADDR 0x0691
165 #define CWG1DBF_ADDR 0x0692
166 #define CWG1CON0_ADDR 0x0693
167 #define CWG1CON1_ADDR 0x0694
168 #define CWG1CON2_ADDR 0x0695
169 #define CLCDATA_ADDR 0x0F0F
170 #define CLC1CON_ADDR 0x0F10
171 #define CLC1POL_ADDR 0x0F11
172 #define CLC1SEL0_ADDR 0x0F12
173 #define CLC1SEL1_ADDR 0x0F13
174 #define CLC1GLS0_ADDR 0x0F14
175 #define CLC1GLS1_ADDR 0x0F15
176 #define CLC1GLS2_ADDR 0x0F16
177 #define CLC1GLS3_ADDR 0x0F17
178 #define CLC2CON_ADDR 0x0F18
179 #define CLC2POL_ADDR 0x0F19
180 #define CLC2SEL0_ADDR 0x0F1A
181 #define CLC2SEL1_ADDR 0x0F1B
182 #define CLC2GLS0_ADDR 0x0F1C
183 #define CLC2GLS1_ADDR 0x0F1D
184 #define CLC2GLS2_ADDR 0x0F1E
185 #define CLC2GLS3_ADDR 0x0F1F
186 #define CLC3CON_ADDR 0x0F20
187 #define CLC3POL_ADDR 0x0F21
188 #define CLC3SEL0_ADDR 0x0F22
189 #define CLC3SEL1_ADDR 0x0F23
190 #define CLC3GLS0_ADDR 0x0F24
191 #define CLC3GLS1_ADDR 0x0F25
192 #define CLC3GLS2_ADDR 0x0F26
193 #define CLC3GLS3_ADDR 0x0F27
194 #define CLC4CON_ADDR 0x0F28
195 #define CLC4POL_ADDR 0x0F29
196 #define CLC4SEL0_ADDR 0x0F2A
197 #define CLC4SEL1_ADDR 0x0F2B
198 #define CLC4GLS0_ADDR 0x0F2C
199 #define CLC4GLS1_ADDR 0x0F2D
200 #define CLC4GLS2_ADDR 0x0F2E
201 #define CLC4GLS3_ADDR 0x0F2F
202 #define ICDIO_ADDR 0x0F8C
203 #define ICDCON0_ADDR 0x0F8D
204 #define ICDSTAT_ADDR 0x0F91
205 #define DEVSEL_ADDR 0x0F95
206 #define ICDINSTL_ADDR 0x0F96
207 #define ICDINSTH_ADDR 0x0F97
208 #define ICDBK0CON_ADDR 0x0F9C
209 #define ICDBK0L_ADDR 0x0F9D
210 #define ICDBK0H_ADDR 0x0F9E
211 #define BSRICDSHAD_ADDR 0x0FE3
212 #define STATUS_SHAD_ADDR 0x0FE4
213 #define WREG_SHAD_ADDR 0x0FE5
214 #define BSR_SHAD_ADDR 0x0FE6
215 #define PCLATH_SHAD_ADDR 0x0FE7
216 #define FSR0L_SHAD_ADDR 0x0FE8
217 #define FSR0H_SHAD_ADDR 0x0FE9
218 #define FSR1L_SHAD_ADDR 0x0FEA
219 #define FSR1H_SHAD_ADDR 0x0FEB
220 #define STKPTR_ADDR 0x0FED
221 #define TOSL_ADDR 0x0FEE
222 #define TOSH_ADDR 0x0FEF
223
224 #endif // #ifndef NO_ADDR_DEFINES
225
226 //==============================================================================
227 //
228 // Register Definitions
229 //
230 //==============================================================================
231
232 extern __at(0x0000) __sfr INDF0;
233 extern __at(0x0001) __sfr INDF1;
234 extern __at(0x0002) __sfr PCL;
235
236 //==============================================================================
237 // STATUS Bits
238
239 extern __at(0x0003) __sfr STATUS;
240
241 typedef struct
242 {
243 unsigned C : 1;
244 unsigned DC : 1;
245 unsigned Z : 1;
246 unsigned NOT_PD : 1;
247 unsigned NOT_TO : 1;
248 unsigned : 1;
249 unsigned : 1;
250 unsigned : 1;
251 } __STATUSbits_t;
252
253 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
254
255 #define _C 0x01
256 #define _DC 0x02
257 #define _Z 0x04
258 #define _NOT_PD 0x08
259 #define _NOT_TO 0x10
260
261 //==============================================================================
262
263 extern __at(0x0004) __sfr FSR0;
264 extern __at(0x0004) __sfr FSR0L;
265 extern __at(0x0005) __sfr FSR0H;
266 extern __at(0x0006) __sfr FSR1;
267 extern __at(0x0006) __sfr FSR1L;
268 extern __at(0x0007) __sfr FSR1H;
269
270 //==============================================================================
271 // BSR Bits
272
273 extern __at(0x0008) __sfr BSR;
274
275 typedef union
276 {
277 struct
278 {
279 unsigned BSR0 : 1;
280 unsigned BSR1 : 1;
281 unsigned BSR2 : 1;
282 unsigned BSR3 : 1;
283 unsigned BSR4 : 1;
284 unsigned : 1;
285 unsigned : 1;
286 unsigned : 1;
287 };
288
289 struct
290 {
291 unsigned BSR : 5;
292 unsigned : 3;
293 };
294 } __BSRbits_t;
295
296 extern __at(0x0008) volatile __BSRbits_t BSRbits;
297
298 #define _BSR0 0x01
299 #define _BSR1 0x02
300 #define _BSR2 0x04
301 #define _BSR3 0x08
302 #define _BSR4 0x10
303
304 //==============================================================================
305
306 extern __at(0x0009) __sfr WREG;
307 extern __at(0x000A) __sfr PCLATH;
308
309 //==============================================================================
310 // INTCON Bits
311
312 extern __at(0x000B) __sfr INTCON;
313
314 typedef union
315 {
316 struct
317 {
318 unsigned IOCIF : 1;
319 unsigned INTF : 1;
320 unsigned TMR0IF : 1;
321 unsigned IOCIE : 1;
322 unsigned INTE : 1;
323 unsigned TMR0IE : 1;
324 unsigned PEIE : 1;
325 unsigned GIE : 1;
326 };
327
328 struct
329 {
330 unsigned : 1;
331 unsigned : 1;
332 unsigned T0IF : 1;
333 unsigned : 1;
334 unsigned : 1;
335 unsigned T0IE : 1;
336 unsigned : 1;
337 unsigned : 1;
338 };
339 } __INTCONbits_t;
340
341 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
342
343 #define _IOCIF 0x01
344 #define _INTF 0x02
345 #define _TMR0IF 0x04
346 #define _T0IF 0x04
347 #define _IOCIE 0x08
348 #define _INTE 0x10
349 #define _TMR0IE 0x20
350 #define _T0IE 0x20
351 #define _PEIE 0x40
352 #define _GIE 0x80
353
354 //==============================================================================
355
356
357 //==============================================================================
358 // PORTA Bits
359
360 extern __at(0x000C) __sfr PORTA;
361
362 typedef union
363 {
364 struct
365 {
366 unsigned RA0 : 1;
367 unsigned RA1 : 1;
368 unsigned RA2 : 1;
369 unsigned RA3 : 1;
370 unsigned RA4 : 1;
371 unsigned RA5 : 1;
372 unsigned : 1;
373 unsigned : 1;
374 };
375
376 struct
377 {
378 unsigned RA : 6;
379 unsigned : 2;
380 };
381 } __PORTAbits_t;
382
383 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
384
385 #define _RA0 0x01
386 #define _RA1 0x02
387 #define _RA2 0x04
388 #define _RA3 0x08
389 #define _RA4 0x10
390 #define _RA5 0x20
391
392 //==============================================================================
393
394
395 //==============================================================================
396 // PORTB Bits
397
398 extern __at(0x000D) __sfr PORTB;
399
400 typedef struct
401 {
402 unsigned : 1;
403 unsigned : 1;
404 unsigned : 1;
405 unsigned : 1;
406 unsigned RB4 : 1;
407 unsigned RB5 : 1;
408 unsigned RB6 : 1;
409 unsigned RB7 : 1;
410 } __PORTBbits_t;
411
412 extern __at(0x000D) volatile __PORTBbits_t PORTBbits;
413
414 #define _RB4 0x10
415 #define _RB5 0x20
416 #define _RB6 0x40
417 #define _RB7 0x80
418
419 //==============================================================================
420
421
422 //==============================================================================
423 // PORTC Bits
424
425 extern __at(0x000E) __sfr PORTC;
426
427 typedef struct
428 {
429 unsigned RC0 : 1;
430 unsigned RC1 : 1;
431 unsigned RC2 : 1;
432 unsigned RC3 : 1;
433 unsigned RC4 : 1;
434 unsigned RC5 : 1;
435 unsigned RC6 : 1;
436 unsigned RC7 : 1;
437 } __PORTCbits_t;
438
439 extern __at(0x000E) volatile __PORTCbits_t PORTCbits;
440
441 #define _RC0 0x01
442 #define _RC1 0x02
443 #define _RC2 0x04
444 #define _RC3 0x08
445 #define _RC4 0x10
446 #define _RC5 0x20
447 #define _RC6 0x40
448 #define _RC7 0x80
449
450 //==============================================================================
451
452
453 //==============================================================================
454 // PIR1 Bits
455
456 extern __at(0x0011) __sfr PIR1;
457
458 typedef struct
459 {
460 unsigned TMR1IF : 1;
461 unsigned TMR2IF : 1;
462 unsigned : 1;
463 unsigned SSP1IF : 1;
464 unsigned TXIF : 1;
465 unsigned RCIF : 1;
466 unsigned ADIF : 1;
467 unsigned TMR1GIF : 1;
468 } __PIR1bits_t;
469
470 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
471
472 #define _TMR1IF 0x01
473 #define _TMR2IF 0x02
474 #define _SSP1IF 0x08
475 #define _TXIF 0x10
476 #define _RCIF 0x20
477 #define _ADIF 0x40
478 #define _TMR1GIF 0x80
479
480 //==============================================================================
481
482
483 //==============================================================================
484 // PIR2 Bits
485
486 extern __at(0x0012) __sfr PIR2;
487
488 typedef struct
489 {
490 unsigned : 1;
491 unsigned : 1;
492 unsigned NCO1IF : 1;
493 unsigned BCL1IF : 1;
494 unsigned : 1;
495 unsigned C1IF : 1;
496 unsigned C2IF : 1;
497 unsigned OSFIF : 1;
498 } __PIR2bits_t;
499
500 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
501
502 #define _NCO1IF 0x04
503 #define _BCL1IF 0x08
504 #define _C1IF 0x20
505 #define _C2IF 0x40
506 #define _OSFIF 0x80
507
508 //==============================================================================
509
510
511 //==============================================================================
512 // PIR3 Bits
513
514 extern __at(0x0013) __sfr PIR3;
515
516 typedef struct
517 {
518 unsigned CLC1IF : 1;
519 unsigned CLC2IF : 1;
520 unsigned CLC3IF : 1;
521 unsigned CLC4IF : 1;
522 unsigned : 1;
523 unsigned : 1;
524 unsigned : 1;
525 unsigned : 1;
526 } __PIR3bits_t;
527
528 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
529
530 #define _CLC1IF 0x01
531 #define _CLC2IF 0x02
532 #define _CLC3IF 0x04
533 #define _CLC4IF 0x08
534
535 //==============================================================================
536
537 extern __at(0x0015) __sfr TMR0;
538 extern __at(0x0016) __sfr TMR1;
539 extern __at(0x0016) __sfr TMR1L;
540 extern __at(0x0017) __sfr TMR1H;
541
542 //==============================================================================
543 // T1CON Bits
544
545 extern __at(0x0018) __sfr T1CON;
546
547 typedef union
548 {
549 struct
550 {
551 unsigned TMR1ON : 1;
552 unsigned : 1;
553 unsigned NOT_T1SYNC : 1;
554 unsigned T1OSCEN : 1;
555 unsigned T1CKPS0 : 1;
556 unsigned T1CKPS1 : 1;
557 unsigned TMR1CS0 : 1;
558 unsigned TMR1CS1 : 1;
559 };
560
561 struct
562 {
563 unsigned : 4;
564 unsigned T1CKPS : 2;
565 unsigned : 2;
566 };
567
568 struct
569 {
570 unsigned : 6;
571 unsigned TMR1CS : 2;
572 };
573 } __T1CONbits_t;
574
575 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
576
577 #define _TMR1ON 0x01
578 #define _NOT_T1SYNC 0x04
579 #define _T1OSCEN 0x08
580 #define _T1CKPS0 0x10
581 #define _T1CKPS1 0x20
582 #define _TMR1CS0 0x40
583 #define _TMR1CS1 0x80
584
585 //==============================================================================
586
587
588 //==============================================================================
589 // T1GCON Bits
590
591 extern __at(0x0019) __sfr T1GCON;
592
593 typedef union
594 {
595 struct
596 {
597 unsigned T1GSS0 : 1;
598 unsigned T1GSS1 : 1;
599 unsigned T1GVAL : 1;
600 unsigned T1GGO_NOT_DONE : 1;
601 unsigned T1GSPM : 1;
602 unsigned T1GTM : 1;
603 unsigned T1GPOL : 1;
604 unsigned TMR1GE : 1;
605 };
606
607 struct
608 {
609 unsigned T1GSS : 2;
610 unsigned : 6;
611 };
612 } __T1GCONbits_t;
613
614 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
615
616 #define _T1GSS0 0x01
617 #define _T1GSS1 0x02
618 #define _T1GVAL 0x04
619 #define _T1GGO_NOT_DONE 0x08
620 #define _T1GSPM 0x10
621 #define _T1GTM 0x20
622 #define _T1GPOL 0x40
623 #define _TMR1GE 0x80
624
625 //==============================================================================
626
627 extern __at(0x001A) __sfr TMR2;
628 extern __at(0x001B) __sfr PR2;
629
630 //==============================================================================
631 // T2CON Bits
632
633 extern __at(0x001C) __sfr T2CON;
634
635 typedef union
636 {
637 struct
638 {
639 unsigned T2CKPS0 : 1;
640 unsigned T2CKPS1 : 1;
641 unsigned TMR2ON : 1;
642 unsigned T2OUTPS0 : 1;
643 unsigned T2OUTPS1 : 1;
644 unsigned T2OUTPS2 : 1;
645 unsigned T2OUTPS3 : 1;
646 unsigned : 1;
647 };
648
649 struct
650 {
651 unsigned T2CKPS : 2;
652 unsigned : 6;
653 };
654
655 struct
656 {
657 unsigned : 3;
658 unsigned T2OUTPS : 4;
659 unsigned : 1;
660 };
661 } __T2CONbits_t;
662
663 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
664
665 #define _T2CKPS0 0x01
666 #define _T2CKPS1 0x02
667 #define _TMR2ON 0x04
668 #define _T2OUTPS0 0x08
669 #define _T2OUTPS1 0x10
670 #define _T2OUTPS2 0x20
671 #define _T2OUTPS3 0x40
672
673 //==============================================================================
674
675
676 //==============================================================================
677 // TRISA Bits
678
679 extern __at(0x008C) __sfr TRISA;
680
681 typedef union
682 {
683 struct
684 {
685 unsigned TRISA0 : 1;
686 unsigned TRISA1 : 1;
687 unsigned TRISA2 : 1;
688 unsigned TRISA3 : 1;
689 unsigned TRISA4 : 1;
690 unsigned TRISA5 : 1;
691 unsigned : 1;
692 unsigned : 1;
693 };
694
695 struct
696 {
697 unsigned TRISA : 6;
698 unsigned : 2;
699 };
700 } __TRISAbits_t;
701
702 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
703
704 #define _TRISA0 0x01
705 #define _TRISA1 0x02
706 #define _TRISA2 0x04
707 #define _TRISA3 0x08
708 #define _TRISA4 0x10
709 #define _TRISA5 0x20
710
711 //==============================================================================
712
713
714 //==============================================================================
715 // TRISB Bits
716
717 extern __at(0x008D) __sfr TRISB;
718
719 typedef struct
720 {
721 unsigned : 1;
722 unsigned : 1;
723 unsigned : 1;
724 unsigned : 1;
725 unsigned TRISB4 : 1;
726 unsigned TRISB5 : 1;
727 unsigned TRISB6 : 1;
728 unsigned TRISB7 : 1;
729 } __TRISBbits_t;
730
731 extern __at(0x008D) volatile __TRISBbits_t TRISBbits;
732
733 #define _TRISB4 0x10
734 #define _TRISB5 0x20
735 #define _TRISB6 0x40
736 #define _TRISB7 0x80
737
738 //==============================================================================
739
740
741 //==============================================================================
742 // TRISC Bits
743
744 extern __at(0x008E) __sfr TRISC;
745
746 typedef struct
747 {
748 unsigned TRISC0 : 1;
749 unsigned TRISC1 : 1;
750 unsigned TRISC2 : 1;
751 unsigned TRISC3 : 1;
752 unsigned TRISC4 : 1;
753 unsigned TRISC5 : 1;
754 unsigned TRISC6 : 1;
755 unsigned TRISC7 : 1;
756 } __TRISCbits_t;
757
758 extern __at(0x008E) volatile __TRISCbits_t TRISCbits;
759
760 #define _TRISC0 0x01
761 #define _TRISC1 0x02
762 #define _TRISC2 0x04
763 #define _TRISC3 0x08
764 #define _TRISC4 0x10
765 #define _TRISC5 0x20
766 #define _TRISC6 0x40
767 #define _TRISC7 0x80
768
769 //==============================================================================
770
771
772 //==============================================================================
773 // PIE1 Bits
774
775 extern __at(0x0091) __sfr PIE1;
776
777 typedef struct
778 {
779 unsigned TMR1IE : 1;
780 unsigned TMR2IE : 1;
781 unsigned : 1;
782 unsigned SSP1IE : 1;
783 unsigned TXIE : 1;
784 unsigned RCIE : 1;
785 unsigned ADIE : 1;
786 unsigned TMR1GIE : 1;
787 } __PIE1bits_t;
788
789 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
790
791 #define _TMR1IE 0x01
792 #define _TMR2IE 0x02
793 #define _SSP1IE 0x08
794 #define _TXIE 0x10
795 #define _RCIE 0x20
796 #define _ADIE 0x40
797 #define _TMR1GIE 0x80
798
799 //==============================================================================
800
801
802 //==============================================================================
803 // PIE2 Bits
804
805 extern __at(0x0092) __sfr PIE2;
806
807 typedef struct
808 {
809 unsigned : 1;
810 unsigned : 1;
811 unsigned NCO1IE : 1;
812 unsigned BCL1IE : 1;
813 unsigned : 1;
814 unsigned C1IE : 1;
815 unsigned C2IE : 1;
816 unsigned OSFIE : 1;
817 } __PIE2bits_t;
818
819 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
820
821 #define _NCO1IE 0x04
822 #define _BCL1IE 0x08
823 #define _C1IE 0x20
824 #define _C2IE 0x40
825 #define _OSFIE 0x80
826
827 //==============================================================================
828
829
830 //==============================================================================
831 // PIE3 Bits
832
833 extern __at(0x0093) __sfr PIE3;
834
835 typedef struct
836 {
837 unsigned CLC1IE : 1;
838 unsigned CLC2IE : 1;
839 unsigned CLC3IE : 1;
840 unsigned CLC4IE : 1;
841 unsigned : 1;
842 unsigned : 1;
843 unsigned : 1;
844 unsigned : 1;
845 } __PIE3bits_t;
846
847 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
848
849 #define _CLC1IE 0x01
850 #define _CLC2IE 0x02
851 #define _CLC3IE 0x04
852 #define _CLC4IE 0x08
853
854 //==============================================================================
855
856
857 //==============================================================================
858 // OPTION_REG Bits
859
860 extern __at(0x0095) __sfr OPTION_REG;
861
862 typedef union
863 {
864 struct
865 {
866 unsigned PS0 : 1;
867 unsigned PS1 : 1;
868 unsigned PS2 : 1;
869 unsigned PSA : 1;
870 unsigned TMR0SE : 1;
871 unsigned TMR0CS : 1;
872 unsigned INTEDG : 1;
873 unsigned NOT_WPUEN : 1;
874 };
875
876 struct
877 {
878 unsigned : 1;
879 unsigned : 1;
880 unsigned : 1;
881 unsigned : 1;
882 unsigned T0SE : 1;
883 unsigned T0CS : 1;
884 unsigned : 1;
885 unsigned : 1;
886 };
887
888 struct
889 {
890 unsigned PS : 3;
891 unsigned : 5;
892 };
893 } __OPTION_REGbits_t;
894
895 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
896
897 #define _PS0 0x01
898 #define _PS1 0x02
899 #define _PS2 0x04
900 #define _PSA 0x08
901 #define _TMR0SE 0x10
902 #define _T0SE 0x10
903 #define _TMR0CS 0x20
904 #define _T0CS 0x20
905 #define _INTEDG 0x40
906 #define _NOT_WPUEN 0x80
907
908 //==============================================================================
909
910
911 //==============================================================================
912 // PCON Bits
913
914 extern __at(0x0096) __sfr PCON;
915
916 typedef struct
917 {
918 unsigned NOT_BOR : 1;
919 unsigned NOT_POR : 1;
920 unsigned NOT_RI : 1;
921 unsigned NOT_RMCLR : 1;
922 unsigned NOT_RWDT : 1;
923 unsigned : 1;
924 unsigned STKUNF : 1;
925 unsigned STKOVF : 1;
926 } __PCONbits_t;
927
928 extern __at(0x0096) volatile __PCONbits_t PCONbits;
929
930 #define _NOT_BOR 0x01
931 #define _NOT_POR 0x02
932 #define _NOT_RI 0x04
933 #define _NOT_RMCLR 0x08
934 #define _NOT_RWDT 0x10
935 #define _STKUNF 0x40
936 #define _STKOVF 0x80
937
938 //==============================================================================
939
940
941 //==============================================================================
942 // WDTCON Bits
943
944 extern __at(0x0097) __sfr WDTCON;
945
946 typedef union
947 {
948 struct
949 {
950 unsigned SWDTEN : 1;
951 unsigned WDTPS0 : 1;
952 unsigned WDTPS1 : 1;
953 unsigned WDTPS2 : 1;
954 unsigned WDTPS3 : 1;
955 unsigned WDTPS4 : 1;
956 unsigned : 1;
957 unsigned : 1;
958 };
959
960 struct
961 {
962 unsigned : 1;
963 unsigned WDTPS : 5;
964 unsigned : 2;
965 };
966 } __WDTCONbits_t;
967
968 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
969
970 #define _SWDTEN 0x01
971 #define _WDTPS0 0x02
972 #define _WDTPS1 0x04
973 #define _WDTPS2 0x08
974 #define _WDTPS3 0x10
975 #define _WDTPS4 0x20
976
977 //==============================================================================
978
979
980 //==============================================================================
981 // OSCCON Bits
982
983 extern __at(0x0099) __sfr OSCCON;
984
985 typedef union
986 {
987 struct
988 {
989 unsigned SCS0 : 1;
990 unsigned SCS1 : 1;
991 unsigned : 1;
992 unsigned IRCF0 : 1;
993 unsigned IRCF1 : 1;
994 unsigned IRCF2 : 1;
995 unsigned IRCF3 : 1;
996 unsigned : 1;
997 };
998
999 struct
1000 {
1001 unsigned SCS : 2;
1002 unsigned : 6;
1003 };
1004
1005 struct
1006 {
1007 unsigned : 3;
1008 unsigned IRCF : 4;
1009 unsigned : 1;
1010 };
1011 } __OSCCONbits_t;
1012
1013 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
1014
1015 #define _SCS0 0x01
1016 #define _SCS1 0x02
1017 #define _IRCF0 0x08
1018 #define _IRCF1 0x10
1019 #define _IRCF2 0x20
1020 #define _IRCF3 0x40
1021
1022 //==============================================================================
1023
1024
1025 //==============================================================================
1026 // OSCSTAT Bits
1027
1028 extern __at(0x009A) __sfr OSCSTAT;
1029
1030 typedef struct
1031 {
1032 unsigned HFIOFS : 1;
1033 unsigned LFIOFR : 1;
1034 unsigned : 1;
1035 unsigned : 1;
1036 unsigned HFIOFR : 1;
1037 unsigned OSTS : 1;
1038 unsigned : 1;
1039 unsigned SOSCR : 1;
1040 } __OSCSTATbits_t;
1041
1042 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
1043
1044 #define _HFIOFS 0x01
1045 #define _LFIOFR 0x02
1046 #define _HFIOFR 0x10
1047 #define _OSTS 0x20
1048 #define _SOSCR 0x80
1049
1050 //==============================================================================
1051
1052 extern __at(0x009B) __sfr ADRES;
1053 extern __at(0x009B) __sfr ADRESL;
1054 extern __at(0x009C) __sfr ADRESH;
1055
1056 //==============================================================================
1057 // ADCON0 Bits
1058
1059 extern __at(0x009D) __sfr ADCON0;
1060
1061 typedef union
1062 {
1063 struct
1064 {
1065 unsigned ADON : 1;
1066 unsigned GO_NOT_DONE : 1;
1067 unsigned CHS0 : 1;
1068 unsigned CHS1 : 1;
1069 unsigned CHS2 : 1;
1070 unsigned CHS3 : 1;
1071 unsigned CHS4 : 1;
1072 unsigned : 1;
1073 };
1074
1075 struct
1076 {
1077 unsigned : 1;
1078 unsigned ADGO : 1;
1079 unsigned : 1;
1080 unsigned : 1;
1081 unsigned : 1;
1082 unsigned : 1;
1083 unsigned : 1;
1084 unsigned : 1;
1085 };
1086
1087 struct
1088 {
1089 unsigned : 1;
1090 unsigned GO : 1;
1091 unsigned : 1;
1092 unsigned : 1;
1093 unsigned : 1;
1094 unsigned : 1;
1095 unsigned : 1;
1096 unsigned : 1;
1097 };
1098
1099 struct
1100 {
1101 unsigned : 2;
1102 unsigned CHS : 5;
1103 unsigned : 1;
1104 };
1105 } __ADCON0bits_t;
1106
1107 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
1108
1109 #define _ADON 0x01
1110 #define _GO_NOT_DONE 0x02
1111 #define _ADGO 0x02
1112 #define _GO 0x02
1113 #define _CHS0 0x04
1114 #define _CHS1 0x08
1115 #define _CHS2 0x10
1116 #define _CHS3 0x20
1117 #define _CHS4 0x40
1118
1119 //==============================================================================
1120
1121
1122 //==============================================================================
1123 // ADCON1 Bits
1124
1125 extern __at(0x009E) __sfr ADCON1;
1126
1127 typedef union
1128 {
1129 struct
1130 {
1131 unsigned ADPREF0 : 1;
1132 unsigned ADPREF1 : 1;
1133 unsigned : 1;
1134 unsigned : 1;
1135 unsigned : 1;
1136 unsigned : 1;
1137 unsigned : 1;
1138 unsigned ADFM : 1;
1139 };
1140
1141 struct
1142 {
1143 unsigned ADPREF : 2;
1144 unsigned : 6;
1145 };
1146 } __ADCON1bits_t;
1147
1148 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1149
1150 #define _ADPREF0 0x01
1151 #define _ADPREF1 0x02
1152 #define _ADFM 0x80
1153
1154 //==============================================================================
1155
1156
1157 //==============================================================================
1158 // ADCON2 Bits
1159
1160 extern __at(0x009F) __sfr ADCON2;
1161
1162 typedef union
1163 {
1164 struct
1165 {
1166 unsigned : 1;
1167 unsigned : 1;
1168 unsigned : 1;
1169 unsigned : 1;
1170 unsigned TRIGSEL0 : 1;
1171 unsigned TRIGSEL1 : 1;
1172 unsigned TRIGSEL2 : 1;
1173 unsigned TRIGSEL3 : 1;
1174 };
1175
1176 struct
1177 {
1178 unsigned : 4;
1179 unsigned TRIGSEL : 4;
1180 };
1181 } __ADCON2bits_t;
1182
1183 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1184
1185 #define _TRIGSEL0 0x10
1186 #define _TRIGSEL1 0x20
1187 #define _TRIGSEL2 0x40
1188 #define _TRIGSEL3 0x80
1189
1190 //==============================================================================
1191
1192
1193 //==============================================================================
1194 // LATA Bits
1195
1196 extern __at(0x010C) __sfr LATA;
1197
1198 typedef struct
1199 {
1200 unsigned LATA0 : 1;
1201 unsigned LATA1 : 1;
1202 unsigned LATA2 : 1;
1203 unsigned : 1;
1204 unsigned LATA4 : 1;
1205 unsigned LATA5 : 1;
1206 unsigned : 1;
1207 unsigned : 1;
1208 } __LATAbits_t;
1209
1210 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1211
1212 #define _LATA0 0x01
1213 #define _LATA1 0x02
1214 #define _LATA2 0x04
1215 #define _LATA4 0x10
1216 #define _LATA5 0x20
1217
1218 //==============================================================================
1219
1220
1221 //==============================================================================
1222 // LATB Bits
1223
1224 extern __at(0x010D) __sfr LATB;
1225
1226 typedef struct
1227 {
1228 unsigned : 1;
1229 unsigned : 1;
1230 unsigned : 1;
1231 unsigned : 1;
1232 unsigned LATB4 : 1;
1233 unsigned LATB5 : 1;
1234 unsigned LATB6 : 1;
1235 unsigned LATB7 : 1;
1236 } __LATBbits_t;
1237
1238 extern __at(0x010D) volatile __LATBbits_t LATBbits;
1239
1240 #define _LATB4 0x10
1241 #define _LATB5 0x20
1242 #define _LATB6 0x40
1243 #define _LATB7 0x80
1244
1245 //==============================================================================
1246
1247
1248 //==============================================================================
1249 // LATC Bits
1250
1251 extern __at(0x010E) __sfr LATC;
1252
1253 typedef struct
1254 {
1255 unsigned LATC0 : 1;
1256 unsigned LATC1 : 1;
1257 unsigned LATC2 : 1;
1258 unsigned LATC3 : 1;
1259 unsigned LATC4 : 1;
1260 unsigned LATC5 : 1;
1261 unsigned LATC6 : 1;
1262 unsigned LATC7 : 1;
1263 } __LATCbits_t;
1264
1265 extern __at(0x010E) volatile __LATCbits_t LATCbits;
1266
1267 #define _LATC0 0x01
1268 #define _LATC1 0x02
1269 #define _LATC2 0x04
1270 #define _LATC3 0x08
1271 #define _LATC4 0x10
1272 #define _LATC5 0x20
1273 #define _LATC6 0x40
1274 #define _LATC7 0x80
1275
1276 //==============================================================================
1277
1278
1279 //==============================================================================
1280 // CM1CON0 Bits
1281
1282 extern __at(0x0111) __sfr CM1CON0;
1283
1284 typedef struct
1285 {
1286 unsigned C1SYNC : 1;
1287 unsigned C1HYS : 1;
1288 unsigned C1SP : 1;
1289 unsigned : 1;
1290 unsigned C1POL : 1;
1291 unsigned C1OE : 1;
1292 unsigned C1OUT : 1;
1293 unsigned C1ON : 1;
1294 } __CM1CON0bits_t;
1295
1296 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1297
1298 #define _C1SYNC 0x01
1299 #define _C1HYS 0x02
1300 #define _C1SP 0x04
1301 #define _C1POL 0x10
1302 #define _C1OE 0x20
1303 #define _C1OUT 0x40
1304 #define _C1ON 0x80
1305
1306 //==============================================================================
1307
1308
1309 //==============================================================================
1310 // CM1CON1 Bits
1311
1312 extern __at(0x0112) __sfr CM1CON1;
1313
1314 typedef union
1315 {
1316 struct
1317 {
1318 unsigned C1NCH0 : 1;
1319 unsigned C1NCH1 : 1;
1320 unsigned C1NCH2 : 1;
1321 unsigned : 1;
1322 unsigned C1PCH0 : 1;
1323 unsigned C1PCH1 : 1;
1324 unsigned C1INTN : 1;
1325 unsigned C1INTP : 1;
1326 };
1327
1328 struct
1329 {
1330 unsigned C1NCH : 3;
1331 unsigned : 5;
1332 };
1333
1334 struct
1335 {
1336 unsigned : 4;
1337 unsigned C1PCH : 2;
1338 unsigned : 2;
1339 };
1340 } __CM1CON1bits_t;
1341
1342 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1343
1344 #define _C1NCH0 0x01
1345 #define _C1NCH1 0x02
1346 #define _C1NCH2 0x04
1347 #define _C1PCH0 0x10
1348 #define _C1PCH1 0x20
1349 #define _C1INTN 0x40
1350 #define _C1INTP 0x80
1351
1352 //==============================================================================
1353
1354
1355 //==============================================================================
1356 // CM2CON0 Bits
1357
1358 extern __at(0x0113) __sfr CM2CON0;
1359
1360 typedef struct
1361 {
1362 unsigned C2SYNC : 1;
1363 unsigned C2HYS : 1;
1364 unsigned C2SP : 1;
1365 unsigned : 1;
1366 unsigned C2POL : 1;
1367 unsigned C2OE : 1;
1368 unsigned C2OUT : 1;
1369 unsigned C2ON : 1;
1370 } __CM2CON0bits_t;
1371
1372 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits;
1373
1374 #define _C2SYNC 0x01
1375 #define _C2HYS 0x02
1376 #define _C2SP 0x04
1377 #define _C2POL 0x10
1378 #define _C2OE 0x20
1379 #define _C2OUT 0x40
1380 #define _C2ON 0x80
1381
1382 //==============================================================================
1383
1384
1385 //==============================================================================
1386 // CM2CON1 Bits
1387
1388 extern __at(0x0114) __sfr CM2CON1;
1389
1390 typedef union
1391 {
1392 struct
1393 {
1394 unsigned C2NCH0 : 1;
1395 unsigned C2NCH1 : 1;
1396 unsigned C2NCH2 : 1;
1397 unsigned : 1;
1398 unsigned C2PCH0 : 1;
1399 unsigned C2PCH1 : 1;
1400 unsigned C2INTN : 1;
1401 unsigned C2INTP : 1;
1402 };
1403
1404 struct
1405 {
1406 unsigned C2NCH : 3;
1407 unsigned : 5;
1408 };
1409
1410 struct
1411 {
1412 unsigned : 4;
1413 unsigned C2PCH : 2;
1414 unsigned : 2;
1415 };
1416 } __CM2CON1bits_t;
1417
1418 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits;
1419
1420 #define _C2NCH0 0x01
1421 #define _C2NCH1 0x02
1422 #define _C2NCH2 0x04
1423 #define _C2PCH0 0x10
1424 #define _C2PCH1 0x20
1425 #define _C2INTN 0x40
1426 #define _C2INTP 0x80
1427
1428 //==============================================================================
1429
1430
1431 //==============================================================================
1432 // CMOUT Bits
1433
1434 extern __at(0x0115) __sfr CMOUT;
1435
1436 typedef struct
1437 {
1438 unsigned MC1OUT : 1;
1439 unsigned MC2OUT : 1;
1440 unsigned : 1;
1441 unsigned : 1;
1442 unsigned : 1;
1443 unsigned : 1;
1444 unsigned : 1;
1445 unsigned : 1;
1446 } __CMOUTbits_t;
1447
1448 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1449
1450 #define _MC1OUT 0x01
1451 #define _MC2OUT 0x02
1452
1453 //==============================================================================
1454
1455
1456 //==============================================================================
1457 // BORCON Bits
1458
1459 extern __at(0x0116) __sfr BORCON;
1460
1461 typedef struct
1462 {
1463 unsigned BORRDY : 1;
1464 unsigned : 1;
1465 unsigned : 1;
1466 unsigned : 1;
1467 unsigned : 1;
1468 unsigned : 1;
1469 unsigned BORFS : 1;
1470 unsigned SBOREN : 1;
1471 } __BORCONbits_t;
1472
1473 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1474
1475 #define _BORRDY 0x01
1476 #define _BORFS 0x40
1477 #define _SBOREN 0x80
1478
1479 //==============================================================================
1480
1481
1482 //==============================================================================
1483 // FVRCON Bits
1484
1485 extern __at(0x0117) __sfr FVRCON;
1486
1487 typedef union
1488 {
1489 struct
1490 {
1491 unsigned ADFVR0 : 1;
1492 unsigned ADFVR1 : 1;
1493 unsigned CDAFVR0 : 1;
1494 unsigned CDAFVR1 : 1;
1495 unsigned TSRNG : 1;
1496 unsigned TSEN : 1;
1497 unsigned FVRRDY : 1;
1498 unsigned FVREN : 1;
1499 };
1500
1501 struct
1502 {
1503 unsigned ADFVR : 2;
1504 unsigned : 6;
1505 };
1506
1507 struct
1508 {
1509 unsigned : 2;
1510 unsigned CDAFVR : 2;
1511 unsigned : 4;
1512 };
1513 } __FVRCONbits_t;
1514
1515 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1516
1517 #define _ADFVR0 0x01
1518 #define _ADFVR1 0x02
1519 #define _CDAFVR0 0x04
1520 #define _CDAFVR1 0x08
1521 #define _TSRNG 0x10
1522 #define _TSEN 0x20
1523 #define _FVRRDY 0x40
1524 #define _FVREN 0x80
1525
1526 //==============================================================================
1527
1528
1529 //==============================================================================
1530 // DACCON0 Bits
1531
1532 extern __at(0x0118) __sfr DACCON0;
1533
1534 typedef struct
1535 {
1536 unsigned : 1;
1537 unsigned : 1;
1538 unsigned DACPSS : 1;
1539 unsigned : 1;
1540 unsigned DACOE2 : 1;
1541 unsigned DACOE1 : 1;
1542 unsigned : 1;
1543 unsigned DACEN : 1;
1544 } __DACCON0bits_t;
1545
1546 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1547
1548 #define _DACPSS 0x04
1549 #define _DACOE2 0x10
1550 #define _DACOE1 0x20
1551 #define _DACEN 0x80
1552
1553 //==============================================================================
1554
1555
1556 //==============================================================================
1557 // DACCON1 Bits
1558
1559 extern __at(0x0119) __sfr DACCON1;
1560
1561 typedef union
1562 {
1563 struct
1564 {
1565 unsigned DACR0 : 1;
1566 unsigned DACR1 : 1;
1567 unsigned DACR2 : 1;
1568 unsigned DACR3 : 1;
1569 unsigned DACR4 : 1;
1570 unsigned : 1;
1571 unsigned : 1;
1572 unsigned : 1;
1573 };
1574
1575 struct
1576 {
1577 unsigned DACR : 5;
1578 unsigned : 3;
1579 };
1580 } __DACCON1bits_t;
1581
1582 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1583
1584 #define _DACR0 0x01
1585 #define _DACR1 0x02
1586 #define _DACR2 0x04
1587 #define _DACR3 0x08
1588 #define _DACR4 0x10
1589
1590 //==============================================================================
1591
1592
1593 //==============================================================================
1594 // APFCON Bits
1595
1596 extern __at(0x011D) __sfr APFCON;
1597
1598 typedef union
1599 {
1600 struct
1601 {
1602 unsigned NCO1SEL : 1;
1603 unsigned CLC1SEL : 1;
1604 unsigned : 1;
1605 unsigned T1GSEL : 1;
1606 unsigned SSSEL : 1;
1607 unsigned : 1;
1608 unsigned : 1;
1609 unsigned : 1;
1610 };
1611
1612 struct
1613 {
1614 unsigned NCOSEL : 1;
1615 unsigned : 1;
1616 unsigned : 1;
1617 unsigned : 1;
1618 unsigned : 1;
1619 unsigned : 1;
1620 unsigned : 1;
1621 unsigned : 1;
1622 };
1623 } __APFCONbits_t;
1624
1625 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1626
1627 #define _NCO1SEL 0x01
1628 #define _NCOSEL 0x01
1629 #define _CLC1SEL 0x02
1630 #define _T1GSEL 0x08
1631 #define _SSSEL 0x10
1632
1633 //==============================================================================
1634
1635
1636 //==============================================================================
1637 // ANSELA Bits
1638
1639 extern __at(0x018C) __sfr ANSELA;
1640
1641 typedef struct
1642 {
1643 unsigned ANSA0 : 1;
1644 unsigned ANSA1 : 1;
1645 unsigned ANSA2 : 1;
1646 unsigned : 1;
1647 unsigned ANSA4 : 1;
1648 unsigned : 1;
1649 unsigned : 1;
1650 unsigned : 1;
1651 } __ANSELAbits_t;
1652
1653 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1654
1655 #define _ANSA0 0x01
1656 #define _ANSA1 0x02
1657 #define _ANSA2 0x04
1658 #define _ANSA4 0x10
1659
1660 //==============================================================================
1661
1662
1663 //==============================================================================
1664 // ANSELB Bits
1665
1666 extern __at(0x018D) __sfr ANSELB;
1667
1668 typedef struct
1669 {
1670 unsigned : 1;
1671 unsigned : 1;
1672 unsigned : 1;
1673 unsigned : 1;
1674 unsigned ANSB4 : 1;
1675 unsigned ANSB5 : 1;
1676 unsigned : 1;
1677 unsigned : 1;
1678 } __ANSELBbits_t;
1679
1680 extern __at(0x018D) volatile __ANSELBbits_t ANSELBbits;
1681
1682 #define _ANSB4 0x10
1683 #define _ANSB5 0x20
1684
1685 //==============================================================================
1686
1687
1688 //==============================================================================
1689 // ANSELC Bits
1690
1691 extern __at(0x018E) __sfr ANSELC;
1692
1693 typedef struct
1694 {
1695 unsigned ANSC0 : 1;
1696 unsigned ANSC1 : 1;
1697 unsigned ANSC2 : 1;
1698 unsigned ANSC3 : 1;
1699 unsigned : 1;
1700 unsigned : 1;
1701 unsigned ANSC6 : 1;
1702 unsigned ANSC7 : 1;
1703 } __ANSELCbits_t;
1704
1705 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
1706
1707 #define _ANSC0 0x01
1708 #define _ANSC1 0x02
1709 #define _ANSC2 0x04
1710 #define _ANSC3 0x08
1711 #define _ANSC6 0x40
1712 #define _ANSC7 0x80
1713
1714 //==============================================================================
1715
1716 extern __at(0x0191) __sfr PMADR;
1717 extern __at(0x0191) __sfr PMADRL;
1718 extern __at(0x0192) __sfr PMADRH;
1719 extern __at(0x0193) __sfr PMDAT;
1720 extern __at(0x0193) __sfr PMDATL;
1721 extern __at(0x0194) __sfr PMDATH;
1722
1723 //==============================================================================
1724 // PMCON1 Bits
1725
1726 extern __at(0x0195) __sfr PMCON1;
1727
1728 typedef struct
1729 {
1730 unsigned RD : 1;
1731 unsigned WR : 1;
1732 unsigned WREN : 1;
1733 unsigned WRERR : 1;
1734 unsigned FREE : 1;
1735 unsigned LWLO : 1;
1736 unsigned CFGS : 1;
1737 unsigned : 1;
1738 } __PMCON1bits_t;
1739
1740 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1741
1742 #define _RD 0x01
1743 #define _WR 0x02
1744 #define _WREN 0x04
1745 #define _WRERR 0x08
1746 #define _FREE 0x10
1747 #define _LWLO 0x20
1748 #define _CFGS 0x40
1749
1750 //==============================================================================
1751
1752 extern __at(0x0196) __sfr PMCON2;
1753
1754 //==============================================================================
1755 // VREGCON Bits
1756
1757 extern __at(0x0197) __sfr VREGCON;
1758
1759 typedef struct
1760 {
1761 unsigned Reserved : 1;
1762 unsigned VREGPM : 1;
1763 unsigned : 1;
1764 unsigned : 1;
1765 unsigned : 1;
1766 unsigned : 1;
1767 unsigned : 1;
1768 unsigned : 1;
1769 } __VREGCONbits_t;
1770
1771 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
1772
1773 #define _Reserved 0x01
1774 #define _VREGPM 0x02
1775
1776 //==============================================================================
1777
1778 extern __at(0x0199) __sfr RCREG;
1779 extern __at(0x019A) __sfr TXREG;
1780 extern __at(0x019B) __sfr SPBRG;
1781 extern __at(0x019B) __sfr SPBRGL;
1782 extern __at(0x019C) __sfr SPBRGH;
1783
1784 //==============================================================================
1785 // RCSTA Bits
1786
1787 extern __at(0x019D) __sfr RCSTA;
1788
1789 typedef struct
1790 {
1791 unsigned RX9D : 1;
1792 unsigned OERR : 1;
1793 unsigned FERR : 1;
1794 unsigned ADDEN : 1;
1795 unsigned CREN : 1;
1796 unsigned SREN : 1;
1797 unsigned RX9 : 1;
1798 unsigned SPEN : 1;
1799 } __RCSTAbits_t;
1800
1801 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
1802
1803 #define _RX9D 0x01
1804 #define _OERR 0x02
1805 #define _FERR 0x04
1806 #define _ADDEN 0x08
1807 #define _CREN 0x10
1808 #define _SREN 0x20
1809 #define _RX9 0x40
1810 #define _SPEN 0x80
1811
1812 //==============================================================================
1813
1814
1815 //==============================================================================
1816 // TXSTA Bits
1817
1818 extern __at(0x019E) __sfr TXSTA;
1819
1820 typedef struct
1821 {
1822 unsigned TX9D : 1;
1823 unsigned TRMT : 1;
1824 unsigned BRGH : 1;
1825 unsigned SENDB : 1;
1826 unsigned SYNC : 1;
1827 unsigned TXEN : 1;
1828 unsigned TX9 : 1;
1829 unsigned CSRC : 1;
1830 } __TXSTAbits_t;
1831
1832 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
1833
1834 #define _TX9D 0x01
1835 #define _TRMT 0x02
1836 #define _BRGH 0x04
1837 #define _SENDB 0x08
1838 #define _SYNC 0x10
1839 #define _TXEN 0x20
1840 #define _TX9 0x40
1841 #define _CSRC 0x80
1842
1843 //==============================================================================
1844
1845
1846 //==============================================================================
1847 // BAUDCON Bits
1848
1849 extern __at(0x019F) __sfr BAUDCON;
1850
1851 typedef struct
1852 {
1853 unsigned ABDEN : 1;
1854 unsigned WUE : 1;
1855 unsigned : 1;
1856 unsigned BRG16 : 1;
1857 unsigned SCKP : 1;
1858 unsigned : 1;
1859 unsigned RCIDL : 1;
1860 unsigned ABDOVF : 1;
1861 } __BAUDCONbits_t;
1862
1863 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
1864
1865 #define _ABDEN 0x01
1866 #define _WUE 0x02
1867 #define _BRG16 0x08
1868 #define _SCKP 0x10
1869 #define _RCIDL 0x40
1870 #define _ABDOVF 0x80
1871
1872 //==============================================================================
1873
1874
1875 //==============================================================================
1876 // WPUA Bits
1877
1878 extern __at(0x020C) __sfr WPUA;
1879
1880 typedef union
1881 {
1882 struct
1883 {
1884 unsigned WPUA0 : 1;
1885 unsigned WPUA1 : 1;
1886 unsigned WPUA2 : 1;
1887 unsigned WPUA3 : 1;
1888 unsigned WPUA4 : 1;
1889 unsigned WPUA5 : 1;
1890 unsigned : 1;
1891 unsigned : 1;
1892 };
1893
1894 struct
1895 {
1896 unsigned WPUA : 6;
1897 unsigned : 2;
1898 };
1899 } __WPUAbits_t;
1900
1901 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1902
1903 #define _WPUA0 0x01
1904 #define _WPUA1 0x02
1905 #define _WPUA2 0x04
1906 #define _WPUA3 0x08
1907 #define _WPUA4 0x10
1908 #define _WPUA5 0x20
1909
1910 //==============================================================================
1911
1912
1913 //==============================================================================
1914 // WPUB Bits
1915
1916 extern __at(0x020D) __sfr WPUB;
1917
1918 typedef struct
1919 {
1920 unsigned : 1;
1921 unsigned : 1;
1922 unsigned : 1;
1923 unsigned : 1;
1924 unsigned WPUB4 : 1;
1925 unsigned WPUB5 : 1;
1926 unsigned WPUB6 : 1;
1927 unsigned WPUB7 : 1;
1928 } __WPUBbits_t;
1929
1930 extern __at(0x020D) volatile __WPUBbits_t WPUBbits;
1931
1932 #define _WPUB4 0x10
1933 #define _WPUB5 0x20
1934 #define _WPUB6 0x40
1935 #define _WPUB7 0x80
1936
1937 //==============================================================================
1938
1939 extern __at(0x0211) __sfr SSP1BUF;
1940 extern __at(0x0211) __sfr SSPBUF;
1941 extern __at(0x0212) __sfr SSP1ADD;
1942 extern __at(0x0212) __sfr SSPADD;
1943 extern __at(0x0213) __sfr SSP1MSK;
1944 extern __at(0x0213) __sfr SSPMSK;
1945
1946 //==============================================================================
1947 // SSP1STAT Bits
1948
1949 extern __at(0x0214) __sfr SSP1STAT;
1950
1951 typedef struct
1952 {
1953 unsigned BF : 1;
1954 unsigned UA : 1;
1955 unsigned R_NOT_W : 1;
1956 unsigned S : 1;
1957 unsigned P : 1;
1958 unsigned D_NOT_A : 1;
1959 unsigned CKE : 1;
1960 unsigned SMP : 1;
1961 } __SSP1STATbits_t;
1962
1963 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
1964
1965 #define _BF 0x01
1966 #define _UA 0x02
1967 #define _R_NOT_W 0x04
1968 #define _S 0x08
1969 #define _P 0x10
1970 #define _D_NOT_A 0x20
1971 #define _CKE 0x40
1972 #define _SMP 0x80
1973
1974 //==============================================================================
1975
1976
1977 //==============================================================================
1978 // SSPSTAT Bits
1979
1980 extern __at(0x0214) __sfr SSPSTAT;
1981
1982 typedef struct
1983 {
1984 unsigned BF : 1;
1985 unsigned UA : 1;
1986 unsigned R_NOT_W : 1;
1987 unsigned S : 1;
1988 unsigned P : 1;
1989 unsigned D_NOT_A : 1;
1990 unsigned CKE : 1;
1991 unsigned SMP : 1;
1992 } __SSPSTATbits_t;
1993
1994 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
1995
1996 #define _SSPSTAT_BF 0x01
1997 #define _SSPSTAT_UA 0x02
1998 #define _SSPSTAT_R_NOT_W 0x04
1999 #define _SSPSTAT_S 0x08
2000 #define _SSPSTAT_P 0x10
2001 #define _SSPSTAT_D_NOT_A 0x20
2002 #define _SSPSTAT_CKE 0x40
2003 #define _SSPSTAT_SMP 0x80
2004
2005 //==============================================================================
2006
2007
2008 //==============================================================================
2009 // SSP1CON1 Bits
2010
2011 extern __at(0x0215) __sfr SSP1CON1;
2012
2013 typedef union
2014 {
2015 struct
2016 {
2017 unsigned SSPM0 : 1;
2018 unsigned SSPM1 : 1;
2019 unsigned SSPM2 : 1;
2020 unsigned SSPM3 : 1;
2021 unsigned CKP : 1;
2022 unsigned SSPEN : 1;
2023 unsigned SSPOV : 1;
2024 unsigned WCOL : 1;
2025 };
2026
2027 struct
2028 {
2029 unsigned SSPM : 4;
2030 unsigned : 4;
2031 };
2032 } __SSP1CON1bits_t;
2033
2034 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
2035
2036 #define _SSPM0 0x01
2037 #define _SSPM1 0x02
2038 #define _SSPM2 0x04
2039 #define _SSPM3 0x08
2040 #define _CKP 0x10
2041 #define _SSPEN 0x20
2042 #define _SSPOV 0x40
2043 #define _WCOL 0x80
2044
2045 //==============================================================================
2046
2047
2048 //==============================================================================
2049 // SSPCON Bits
2050
2051 extern __at(0x0215) __sfr SSPCON;
2052
2053 typedef union
2054 {
2055 struct
2056 {
2057 unsigned SSPM0 : 1;
2058 unsigned SSPM1 : 1;
2059 unsigned SSPM2 : 1;
2060 unsigned SSPM3 : 1;
2061 unsigned CKP : 1;
2062 unsigned SSPEN : 1;
2063 unsigned SSPOV : 1;
2064 unsigned WCOL : 1;
2065 };
2066
2067 struct
2068 {
2069 unsigned SSPM : 4;
2070 unsigned : 4;
2071 };
2072 } __SSPCONbits_t;
2073
2074 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
2075
2076 #define _SSPCON_SSPM0 0x01
2077 #define _SSPCON_SSPM1 0x02
2078 #define _SSPCON_SSPM2 0x04
2079 #define _SSPCON_SSPM3 0x08
2080 #define _SSPCON_CKP 0x10
2081 #define _SSPCON_SSPEN 0x20
2082 #define _SSPCON_SSPOV 0x40
2083 #define _SSPCON_WCOL 0x80
2084
2085 //==============================================================================
2086
2087
2088 //==============================================================================
2089 // SSPCON1 Bits
2090
2091 extern __at(0x0215) __sfr SSPCON1;
2092
2093 typedef union
2094 {
2095 struct
2096 {
2097 unsigned SSPM0 : 1;
2098 unsigned SSPM1 : 1;
2099 unsigned SSPM2 : 1;
2100 unsigned SSPM3 : 1;
2101 unsigned CKP : 1;
2102 unsigned SSPEN : 1;
2103 unsigned SSPOV : 1;
2104 unsigned WCOL : 1;
2105 };
2106
2107 struct
2108 {
2109 unsigned SSPM : 4;
2110 unsigned : 4;
2111 };
2112 } __SSPCON1bits_t;
2113
2114 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
2115
2116 #define _SSPCON1_SSPM0 0x01
2117 #define _SSPCON1_SSPM1 0x02
2118 #define _SSPCON1_SSPM2 0x04
2119 #define _SSPCON1_SSPM3 0x08
2120 #define _SSPCON1_CKP 0x10
2121 #define _SSPCON1_SSPEN 0x20
2122 #define _SSPCON1_SSPOV 0x40
2123 #define _SSPCON1_WCOL 0x80
2124
2125 //==============================================================================
2126
2127
2128 //==============================================================================
2129 // SSP1CON2 Bits
2130
2131 extern __at(0x0216) __sfr SSP1CON2;
2132
2133 typedef struct
2134 {
2135 unsigned SEN : 1;
2136 unsigned RSEN : 1;
2137 unsigned PEN : 1;
2138 unsigned RCEN : 1;
2139 unsigned ACKEN : 1;
2140 unsigned ACKDT : 1;
2141 unsigned ACKSTAT : 1;
2142 unsigned GCEN : 1;
2143 } __SSP1CON2bits_t;
2144
2145 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
2146
2147 #define _SEN 0x01
2148 #define _RSEN 0x02
2149 #define _PEN 0x04
2150 #define _RCEN 0x08
2151 #define _ACKEN 0x10
2152 #define _ACKDT 0x20
2153 #define _ACKSTAT 0x40
2154 #define _GCEN 0x80
2155
2156 //==============================================================================
2157
2158
2159 //==============================================================================
2160 // SSPCON2 Bits
2161
2162 extern __at(0x0216) __sfr SSPCON2;
2163
2164 typedef struct
2165 {
2166 unsigned SEN : 1;
2167 unsigned RSEN : 1;
2168 unsigned PEN : 1;
2169 unsigned RCEN : 1;
2170 unsigned ACKEN : 1;
2171 unsigned ACKDT : 1;
2172 unsigned ACKSTAT : 1;
2173 unsigned GCEN : 1;
2174 } __SSPCON2bits_t;
2175
2176 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
2177
2178 #define _SSPCON2_SEN 0x01
2179 #define _SSPCON2_RSEN 0x02
2180 #define _SSPCON2_PEN 0x04
2181 #define _SSPCON2_RCEN 0x08
2182 #define _SSPCON2_ACKEN 0x10
2183 #define _SSPCON2_ACKDT 0x20
2184 #define _SSPCON2_ACKSTAT 0x40
2185 #define _SSPCON2_GCEN 0x80
2186
2187 //==============================================================================
2188
2189
2190 //==============================================================================
2191 // SSP1CON3 Bits
2192
2193 extern __at(0x0217) __sfr SSP1CON3;
2194
2195 typedef struct
2196 {
2197 unsigned DHEN : 1;
2198 unsigned AHEN : 1;
2199 unsigned SBCDE : 1;
2200 unsigned SDAHT : 1;
2201 unsigned BOEN : 1;
2202 unsigned SCIE : 1;
2203 unsigned PCIE : 1;
2204 unsigned ACKTIM : 1;
2205 } __SSP1CON3bits_t;
2206
2207 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
2208
2209 #define _DHEN 0x01
2210 #define _AHEN 0x02
2211 #define _SBCDE 0x04
2212 #define _SDAHT 0x08
2213 #define _BOEN 0x10
2214 #define _SCIE 0x20
2215 #define _PCIE 0x40
2216 #define _ACKTIM 0x80
2217
2218 //==============================================================================
2219
2220
2221 //==============================================================================
2222 // SSPCON3 Bits
2223
2224 extern __at(0x0217) __sfr SSPCON3;
2225
2226 typedef struct
2227 {
2228 unsigned DHEN : 1;
2229 unsigned AHEN : 1;
2230 unsigned SBCDE : 1;
2231 unsigned SDAHT : 1;
2232 unsigned BOEN : 1;
2233 unsigned SCIE : 1;
2234 unsigned PCIE : 1;
2235 unsigned ACKTIM : 1;
2236 } __SSPCON3bits_t;
2237
2238 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
2239
2240 #define _SSPCON3_DHEN 0x01
2241 #define _SSPCON3_AHEN 0x02
2242 #define _SSPCON3_SBCDE 0x04
2243 #define _SSPCON3_SDAHT 0x08
2244 #define _SSPCON3_BOEN 0x10
2245 #define _SSPCON3_SCIE 0x20
2246 #define _SSPCON3_PCIE 0x40
2247 #define _SSPCON3_ACKTIM 0x80
2248
2249 //==============================================================================
2250
2251
2252 //==============================================================================
2253 // IOCAP Bits
2254
2255 extern __at(0x0391) __sfr IOCAP;
2256
2257 typedef union
2258 {
2259 struct
2260 {
2261 unsigned IOCAP0 : 1;
2262 unsigned IOCAP1 : 1;
2263 unsigned IOCAP2 : 1;
2264 unsigned IOCAP3 : 1;
2265 unsigned IOCAP4 : 1;
2266 unsigned IOCAP5 : 1;
2267 unsigned : 1;
2268 unsigned : 1;
2269 };
2270
2271 struct
2272 {
2273 unsigned IOCAP : 6;
2274 unsigned : 2;
2275 };
2276 } __IOCAPbits_t;
2277
2278 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
2279
2280 #define _IOCAP0 0x01
2281 #define _IOCAP1 0x02
2282 #define _IOCAP2 0x04
2283 #define _IOCAP3 0x08
2284 #define _IOCAP4 0x10
2285 #define _IOCAP5 0x20
2286
2287 //==============================================================================
2288
2289
2290 //==============================================================================
2291 // IOCAN Bits
2292
2293 extern __at(0x0392) __sfr IOCAN;
2294
2295 typedef union
2296 {
2297 struct
2298 {
2299 unsigned IOCAN0 : 1;
2300 unsigned IOCAN1 : 1;
2301 unsigned IOCAN2 : 1;
2302 unsigned IOCAN3 : 1;
2303 unsigned IOCAN4 : 1;
2304 unsigned IOCAN5 : 1;
2305 unsigned : 1;
2306 unsigned : 1;
2307 };
2308
2309 struct
2310 {
2311 unsigned IOCAN : 6;
2312 unsigned : 2;
2313 };
2314 } __IOCANbits_t;
2315
2316 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
2317
2318 #define _IOCAN0 0x01
2319 #define _IOCAN1 0x02
2320 #define _IOCAN2 0x04
2321 #define _IOCAN3 0x08
2322 #define _IOCAN4 0x10
2323 #define _IOCAN5 0x20
2324
2325 //==============================================================================
2326
2327
2328 //==============================================================================
2329 // IOCAF Bits
2330
2331 extern __at(0x0393) __sfr IOCAF;
2332
2333 typedef union
2334 {
2335 struct
2336 {
2337 unsigned IOCAF0 : 1;
2338 unsigned IOCAF1 : 1;
2339 unsigned IOCAF2 : 1;
2340 unsigned IOCAF3 : 1;
2341 unsigned IOCAF4 : 1;
2342 unsigned IOCAF5 : 1;
2343 unsigned : 1;
2344 unsigned : 1;
2345 };
2346
2347 struct
2348 {
2349 unsigned IOCAF : 6;
2350 unsigned : 2;
2351 };
2352 } __IOCAFbits_t;
2353
2354 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
2355
2356 #define _IOCAF0 0x01
2357 #define _IOCAF1 0x02
2358 #define _IOCAF2 0x04
2359 #define _IOCAF3 0x08
2360 #define _IOCAF4 0x10
2361 #define _IOCAF5 0x20
2362
2363 //==============================================================================
2364
2365
2366 //==============================================================================
2367 // IOCBP Bits
2368
2369 extern __at(0x0394) __sfr IOCBP;
2370
2371 typedef struct
2372 {
2373 unsigned : 1;
2374 unsigned : 1;
2375 unsigned : 1;
2376 unsigned : 1;
2377 unsigned IOCBP4 : 1;
2378 unsigned IOCBP5 : 1;
2379 unsigned IOCBP6 : 1;
2380 unsigned IOCBP7 : 1;
2381 } __IOCBPbits_t;
2382
2383 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits;
2384
2385 #define _IOCBP4 0x10
2386 #define _IOCBP5 0x20
2387 #define _IOCBP6 0x40
2388 #define _IOCBP7 0x80
2389
2390 //==============================================================================
2391
2392
2393 //==============================================================================
2394 // IOCBN Bits
2395
2396 extern __at(0x0395) __sfr IOCBN;
2397
2398 typedef struct
2399 {
2400 unsigned : 1;
2401 unsigned : 1;
2402 unsigned : 1;
2403 unsigned : 1;
2404 unsigned IOCBN4 : 1;
2405 unsigned IOCBN5 : 1;
2406 unsigned IOCBN6 : 1;
2407 unsigned IOCBN7 : 1;
2408 } __IOCBNbits_t;
2409
2410 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits;
2411
2412 #define _IOCBN4 0x10
2413 #define _IOCBN5 0x20
2414 #define _IOCBN6 0x40
2415 #define _IOCBN7 0x80
2416
2417 //==============================================================================
2418
2419
2420 //==============================================================================
2421 // IOCBF Bits
2422
2423 extern __at(0x0396) __sfr IOCBF;
2424
2425 typedef struct
2426 {
2427 unsigned : 1;
2428 unsigned : 1;
2429 unsigned : 1;
2430 unsigned : 1;
2431 unsigned IOCBF4 : 1;
2432 unsigned IOCBF5 : 1;
2433 unsigned IOCBF6 : 1;
2434 unsigned IOCBF7 : 1;
2435 } __IOCBFbits_t;
2436
2437 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits;
2438
2439 #define _IOCBF4 0x10
2440 #define _IOCBF5 0x20
2441 #define _IOCBF6 0x40
2442 #define _IOCBF7 0x80
2443
2444 //==============================================================================
2445
2446 extern __at(0x0498) __sfr NCO1ACC;
2447
2448 //==============================================================================
2449 // NCO1ACCL Bits
2450
2451 extern __at(0x0498) __sfr NCO1ACCL;
2452
2453 typedef struct
2454 {
2455 unsigned NCO1ACC0 : 1;
2456 unsigned NCO1ACC1 : 1;
2457 unsigned NCO1ACC2 : 1;
2458 unsigned NCO1ACC3 : 1;
2459 unsigned NCO1ACC4 : 1;
2460 unsigned NCO1ACC5 : 1;
2461 unsigned NCO1ACC6 : 1;
2462 unsigned NCO1ACC7 : 1;
2463 } __NCO1ACCLbits_t;
2464
2465 extern __at(0x0498) volatile __NCO1ACCLbits_t NCO1ACCLbits;
2466
2467 #define _NCO1ACC0 0x01
2468 #define _NCO1ACC1 0x02
2469 #define _NCO1ACC2 0x04
2470 #define _NCO1ACC3 0x08
2471 #define _NCO1ACC4 0x10
2472 #define _NCO1ACC5 0x20
2473 #define _NCO1ACC6 0x40
2474 #define _NCO1ACC7 0x80
2475
2476 //==============================================================================
2477
2478
2479 //==============================================================================
2480 // NCO1ACCH Bits
2481
2482 extern __at(0x0499) __sfr NCO1ACCH;
2483
2484 typedef struct
2485 {
2486 unsigned NCO1ACC8 : 1;
2487 unsigned NCO1ACC9 : 1;
2488 unsigned NCO1ACC10 : 1;
2489 unsigned NCO1ACC11 : 1;
2490 unsigned NCO1ACC12 : 1;
2491 unsigned NCO1ACC13 : 1;
2492 unsigned NCO1ACC14 : 1;
2493 unsigned NCO1ACC15 : 1;
2494 } __NCO1ACCHbits_t;
2495
2496 extern __at(0x0499) volatile __NCO1ACCHbits_t NCO1ACCHbits;
2497
2498 #define _NCO1ACC8 0x01
2499 #define _NCO1ACC9 0x02
2500 #define _NCO1ACC10 0x04
2501 #define _NCO1ACC11 0x08
2502 #define _NCO1ACC12 0x10
2503 #define _NCO1ACC13 0x20
2504 #define _NCO1ACC14 0x40
2505 #define _NCO1ACC15 0x80
2506
2507 //==============================================================================
2508
2509
2510 //==============================================================================
2511 // NCO1ACCU Bits
2512
2513 extern __at(0x049A) __sfr NCO1ACCU;
2514
2515 typedef struct
2516 {
2517 unsigned NCO1ACC16 : 1;
2518 unsigned NCO1ACC17 : 1;
2519 unsigned NCO1ACC18 : 1;
2520 unsigned NCO1ACC19 : 1;
2521 unsigned : 1;
2522 unsigned : 1;
2523 unsigned : 1;
2524 unsigned : 1;
2525 } __NCO1ACCUbits_t;
2526
2527 extern __at(0x049A) volatile __NCO1ACCUbits_t NCO1ACCUbits;
2528
2529 #define _NCO1ACC16 0x01
2530 #define _NCO1ACC17 0x02
2531 #define _NCO1ACC18 0x04
2532 #define _NCO1ACC19 0x08
2533
2534 //==============================================================================
2535
2536 extern __at(0x049B) __sfr NCO1INC;
2537
2538 //==============================================================================
2539 // NCO1INCL Bits
2540
2541 extern __at(0x049B) __sfr NCO1INCL;
2542
2543 typedef struct
2544 {
2545 unsigned NCO1INC0 : 1;
2546 unsigned NCO1INC1 : 1;
2547 unsigned NCO1INC2 : 1;
2548 unsigned NCO1INC3 : 1;
2549 unsigned NCO1INC4 : 1;
2550 unsigned NCO1INC5 : 1;
2551 unsigned NCO1INC6 : 1;
2552 unsigned NCO1INC7 : 1;
2553 } __NCO1INCLbits_t;
2554
2555 extern __at(0x049B) volatile __NCO1INCLbits_t NCO1INCLbits;
2556
2557 #define _NCO1INC0 0x01
2558 #define _NCO1INC1 0x02
2559 #define _NCO1INC2 0x04
2560 #define _NCO1INC3 0x08
2561 #define _NCO1INC4 0x10
2562 #define _NCO1INC5 0x20
2563 #define _NCO1INC6 0x40
2564 #define _NCO1INC7 0x80
2565
2566 //==============================================================================
2567
2568
2569 //==============================================================================
2570 // NCO1INCH Bits
2571
2572 extern __at(0x049C) __sfr NCO1INCH;
2573
2574 typedef struct
2575 {
2576 unsigned NCO1INC8 : 1;
2577 unsigned NCO1INC9 : 1;
2578 unsigned NCO1INC10 : 1;
2579 unsigned NCO1INC11 : 1;
2580 unsigned NCO1INC12 : 1;
2581 unsigned NCO1INC13 : 1;
2582 unsigned NCO1INC14 : 1;
2583 unsigned NCO1INC15 : 1;
2584 } __NCO1INCHbits_t;
2585
2586 extern __at(0x049C) volatile __NCO1INCHbits_t NCO1INCHbits;
2587
2588 #define _NCO1INC8 0x01
2589 #define _NCO1INC9 0x02
2590 #define _NCO1INC10 0x04
2591 #define _NCO1INC11 0x08
2592 #define _NCO1INC12 0x10
2593 #define _NCO1INC13 0x20
2594 #define _NCO1INC14 0x40
2595 #define _NCO1INC15 0x80
2596
2597 //==============================================================================
2598
2599 extern __at(0x049D) __sfr NCO1INCU;
2600
2601 //==============================================================================
2602 // NCO1CON Bits
2603
2604 extern __at(0x049E) __sfr NCO1CON;
2605
2606 typedef struct
2607 {
2608 unsigned N1PFM : 1;
2609 unsigned : 1;
2610 unsigned : 1;
2611 unsigned : 1;
2612 unsigned N1POL : 1;
2613 unsigned N1OUT : 1;
2614 unsigned N1OE : 1;
2615 unsigned N1EN : 1;
2616 } __NCO1CONbits_t;
2617
2618 extern __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits;
2619
2620 #define _N1PFM 0x01
2621 #define _N1POL 0x10
2622 #define _N1OUT 0x20
2623 #define _N1OE 0x40
2624 #define _N1EN 0x80
2625
2626 //==============================================================================
2627
2628
2629 //==============================================================================
2630 // NCO1CLK Bits
2631
2632 extern __at(0x049F) __sfr NCO1CLK;
2633
2634 typedef union
2635 {
2636 struct
2637 {
2638 unsigned N1CKS0 : 1;
2639 unsigned N1CKS1 : 1;
2640 unsigned : 1;
2641 unsigned : 1;
2642 unsigned : 1;
2643 unsigned N1PWS0 : 1;
2644 unsigned N1PWS1 : 1;
2645 unsigned N1PWS2 : 1;
2646 };
2647
2648 struct
2649 {
2650 unsigned N1CKS : 2;
2651 unsigned : 6;
2652 };
2653
2654 struct
2655 {
2656 unsigned : 5;
2657 unsigned N1PWS : 3;
2658 };
2659 } __NCO1CLKbits_t;
2660
2661 extern __at(0x049F) volatile __NCO1CLKbits_t NCO1CLKbits;
2662
2663 #define _N1CKS0 0x01
2664 #define _N1CKS1 0x02
2665 #define _N1PWS0 0x20
2666 #define _N1PWS1 0x40
2667 #define _N1PWS2 0x80
2668
2669 //==============================================================================
2670
2671
2672 //==============================================================================
2673 // PWM1DCL Bits
2674
2675 extern __at(0x0611) __sfr PWM1DCL;
2676
2677 typedef union
2678 {
2679 struct
2680 {
2681 unsigned : 1;
2682 unsigned : 1;
2683 unsigned : 1;
2684 unsigned : 1;
2685 unsigned : 1;
2686 unsigned : 1;
2687 unsigned PWM1DCL0 : 1;
2688 unsigned PWM1DCL1 : 1;
2689 };
2690
2691 struct
2692 {
2693 unsigned : 6;
2694 unsigned PWM1DCL : 2;
2695 };
2696 } __PWM1DCLbits_t;
2697
2698 extern __at(0x0611) volatile __PWM1DCLbits_t PWM1DCLbits;
2699
2700 #define _PWM1DCL0 0x40
2701 #define _PWM1DCL1 0x80
2702
2703 //==============================================================================
2704
2705
2706 //==============================================================================
2707 // PWM1DCH Bits
2708
2709 extern __at(0x0612) __sfr PWM1DCH;
2710
2711 typedef struct
2712 {
2713 unsigned PWM1DCH0 : 1;
2714 unsigned PWM1DCH1 : 1;
2715 unsigned PWM1DCH2 : 1;
2716 unsigned PWM1DCH3 : 1;
2717 unsigned PWM1DCH4 : 1;
2718 unsigned PWM1DCH5 : 1;
2719 unsigned PWM1DCH6 : 1;
2720 unsigned PWM1DCH7 : 1;
2721 } __PWM1DCHbits_t;
2722
2723 extern __at(0x0612) volatile __PWM1DCHbits_t PWM1DCHbits;
2724
2725 #define _PWM1DCH0 0x01
2726 #define _PWM1DCH1 0x02
2727 #define _PWM1DCH2 0x04
2728 #define _PWM1DCH3 0x08
2729 #define _PWM1DCH4 0x10
2730 #define _PWM1DCH5 0x20
2731 #define _PWM1DCH6 0x40
2732 #define _PWM1DCH7 0x80
2733
2734 //==============================================================================
2735
2736
2737 //==============================================================================
2738 // PWM1CON Bits
2739
2740 extern __at(0x0613) __sfr PWM1CON;
2741
2742 typedef struct
2743 {
2744 unsigned : 1;
2745 unsigned : 1;
2746 unsigned : 1;
2747 unsigned : 1;
2748 unsigned PWM1POL : 1;
2749 unsigned PWM1OUT : 1;
2750 unsigned PWM1OE : 1;
2751 unsigned PWM1EN : 1;
2752 } __PWM1CONbits_t;
2753
2754 extern __at(0x0613) volatile __PWM1CONbits_t PWM1CONbits;
2755
2756 #define _PWM1POL 0x10
2757 #define _PWM1OUT 0x20
2758 #define _PWM1OE 0x40
2759 #define _PWM1EN 0x80
2760
2761 //==============================================================================
2762
2763
2764 //==============================================================================
2765 // PWM1CON0 Bits
2766
2767 extern __at(0x0613) __sfr PWM1CON0;
2768
2769 typedef struct
2770 {
2771 unsigned : 1;
2772 unsigned : 1;
2773 unsigned : 1;
2774 unsigned : 1;
2775 unsigned PWM1POL : 1;
2776 unsigned PWM1OUT : 1;
2777 unsigned PWM1OE : 1;
2778 unsigned PWM1EN : 1;
2779 } __PWM1CON0bits_t;
2780
2781 extern __at(0x0613) volatile __PWM1CON0bits_t PWM1CON0bits;
2782
2783 #define _PWM1CON0_PWM1POL 0x10
2784 #define _PWM1CON0_PWM1OUT 0x20
2785 #define _PWM1CON0_PWM1OE 0x40
2786 #define _PWM1CON0_PWM1EN 0x80
2787
2788 //==============================================================================
2789
2790
2791 //==============================================================================
2792 // PWM2DCL Bits
2793
2794 extern __at(0x0614) __sfr PWM2DCL;
2795
2796 typedef union
2797 {
2798 struct
2799 {
2800 unsigned : 1;
2801 unsigned : 1;
2802 unsigned : 1;
2803 unsigned : 1;
2804 unsigned : 1;
2805 unsigned : 1;
2806 unsigned PWM2DCL0 : 1;
2807 unsigned PWM2DCL1 : 1;
2808 };
2809
2810 struct
2811 {
2812 unsigned : 6;
2813 unsigned PWM2DCL : 2;
2814 };
2815 } __PWM2DCLbits_t;
2816
2817 extern __at(0x0614) volatile __PWM2DCLbits_t PWM2DCLbits;
2818
2819 #define _PWM2DCL0 0x40
2820 #define _PWM2DCL1 0x80
2821
2822 //==============================================================================
2823
2824
2825 //==============================================================================
2826 // PWM2DCH Bits
2827
2828 extern __at(0x0615) __sfr PWM2DCH;
2829
2830 typedef struct
2831 {
2832 unsigned PWM2DCH0 : 1;
2833 unsigned PWM2DCH1 : 1;
2834 unsigned PWM2DCH2 : 1;
2835 unsigned PWM2DCH3 : 1;
2836 unsigned PWM2DCH4 : 1;
2837 unsigned PWM2DCH5 : 1;
2838 unsigned PWM2DCH6 : 1;
2839 unsigned PWM2DCH7 : 1;
2840 } __PWM2DCHbits_t;
2841
2842 extern __at(0x0615) volatile __PWM2DCHbits_t PWM2DCHbits;
2843
2844 #define _PWM2DCH0 0x01
2845 #define _PWM2DCH1 0x02
2846 #define _PWM2DCH2 0x04
2847 #define _PWM2DCH3 0x08
2848 #define _PWM2DCH4 0x10
2849 #define _PWM2DCH5 0x20
2850 #define _PWM2DCH6 0x40
2851 #define _PWM2DCH7 0x80
2852
2853 //==============================================================================
2854
2855
2856 //==============================================================================
2857 // PWM2CON Bits
2858
2859 extern __at(0x0616) __sfr PWM2CON;
2860
2861 typedef struct
2862 {
2863 unsigned : 1;
2864 unsigned : 1;
2865 unsigned : 1;
2866 unsigned : 1;
2867 unsigned PWM2POL : 1;
2868 unsigned PWM2OUT : 1;
2869 unsigned PWM2OE : 1;
2870 unsigned PWM2EN : 1;
2871 } __PWM2CONbits_t;
2872
2873 extern __at(0x0616) volatile __PWM2CONbits_t PWM2CONbits;
2874
2875 #define _PWM2POL 0x10
2876 #define _PWM2OUT 0x20
2877 #define _PWM2OE 0x40
2878 #define _PWM2EN 0x80
2879
2880 //==============================================================================
2881
2882
2883 //==============================================================================
2884 // PWM2CON0 Bits
2885
2886 extern __at(0x0616) __sfr PWM2CON0;
2887
2888 typedef struct
2889 {
2890 unsigned : 1;
2891 unsigned : 1;
2892 unsigned : 1;
2893 unsigned : 1;
2894 unsigned PWM2POL : 1;
2895 unsigned PWM2OUT : 1;
2896 unsigned PWM2OE : 1;
2897 unsigned PWM2EN : 1;
2898 } __PWM2CON0bits_t;
2899
2900 extern __at(0x0616) volatile __PWM2CON0bits_t PWM2CON0bits;
2901
2902 #define _PWM2CON0_PWM2POL 0x10
2903 #define _PWM2CON0_PWM2OUT 0x20
2904 #define _PWM2CON0_PWM2OE 0x40
2905 #define _PWM2CON0_PWM2EN 0x80
2906
2907 //==============================================================================
2908
2909
2910 //==============================================================================
2911 // PWM3DCL Bits
2912
2913 extern __at(0x0617) __sfr PWM3DCL;
2914
2915 typedef union
2916 {
2917 struct
2918 {
2919 unsigned : 1;
2920 unsigned : 1;
2921 unsigned : 1;
2922 unsigned : 1;
2923 unsigned : 1;
2924 unsigned : 1;
2925 unsigned PWM3DCL0 : 1;
2926 unsigned PWM3DCL1 : 1;
2927 };
2928
2929 struct
2930 {
2931 unsigned : 6;
2932 unsigned PWM3DCL : 2;
2933 };
2934 } __PWM3DCLbits_t;
2935
2936 extern __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits;
2937
2938 #define _PWM3DCL0 0x40
2939 #define _PWM3DCL1 0x80
2940
2941 //==============================================================================
2942
2943
2944 //==============================================================================
2945 // PWM3DCH Bits
2946
2947 extern __at(0x0618) __sfr PWM3DCH;
2948
2949 typedef struct
2950 {
2951 unsigned PWM3DCH0 : 1;
2952 unsigned PWM3DCH1 : 1;
2953 unsigned PWM3DCH2 : 1;
2954 unsigned PWM3DCH3 : 1;
2955 unsigned PWM3DCH4 : 1;
2956 unsigned PWM3DCH5 : 1;
2957 unsigned PWM3DCH6 : 1;
2958 unsigned PWM3DCH7 : 1;
2959 } __PWM3DCHbits_t;
2960
2961 extern __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits;
2962
2963 #define _PWM3DCH0 0x01
2964 #define _PWM3DCH1 0x02
2965 #define _PWM3DCH2 0x04
2966 #define _PWM3DCH3 0x08
2967 #define _PWM3DCH4 0x10
2968 #define _PWM3DCH5 0x20
2969 #define _PWM3DCH6 0x40
2970 #define _PWM3DCH7 0x80
2971
2972 //==============================================================================
2973
2974
2975 //==============================================================================
2976 // PWM3CON Bits
2977
2978 extern __at(0x0619) __sfr PWM3CON;
2979
2980 typedef struct
2981 {
2982 unsigned : 1;
2983 unsigned : 1;
2984 unsigned : 1;
2985 unsigned : 1;
2986 unsigned PWM3POL : 1;
2987 unsigned PWM3OUT : 1;
2988 unsigned PWM3OE : 1;
2989 unsigned PWM3EN : 1;
2990 } __PWM3CONbits_t;
2991
2992 extern __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits;
2993
2994 #define _PWM3POL 0x10
2995 #define _PWM3OUT 0x20
2996 #define _PWM3OE 0x40
2997 #define _PWM3EN 0x80
2998
2999 //==============================================================================
3000
3001
3002 //==============================================================================
3003 // PWM3CON0 Bits
3004
3005 extern __at(0x0619) __sfr PWM3CON0;
3006
3007 typedef struct
3008 {
3009 unsigned : 1;
3010 unsigned : 1;
3011 unsigned : 1;
3012 unsigned : 1;
3013 unsigned PWM3POL : 1;
3014 unsigned PWM3OUT : 1;
3015 unsigned PWM3OE : 1;
3016 unsigned PWM3EN : 1;
3017 } __PWM3CON0bits_t;
3018
3019 extern __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits;
3020
3021 #define _PWM3CON0_PWM3POL 0x10
3022 #define _PWM3CON0_PWM3OUT 0x20
3023 #define _PWM3CON0_PWM3OE 0x40
3024 #define _PWM3CON0_PWM3EN 0x80
3025
3026 //==============================================================================
3027
3028
3029 //==============================================================================
3030 // PWM4DCL Bits
3031
3032 extern __at(0x061A) __sfr PWM4DCL;
3033
3034 typedef union
3035 {
3036 struct
3037 {
3038 unsigned : 1;
3039 unsigned : 1;
3040 unsigned : 1;
3041 unsigned : 1;
3042 unsigned : 1;
3043 unsigned : 1;
3044 unsigned PWM4DCL0 : 1;
3045 unsigned PWM4DCL1 : 1;
3046 };
3047
3048 struct
3049 {
3050 unsigned : 6;
3051 unsigned PWM4DCL : 2;
3052 };
3053 } __PWM4DCLbits_t;
3054
3055 extern __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits;
3056
3057 #define _PWM4DCL0 0x40
3058 #define _PWM4DCL1 0x80
3059
3060 //==============================================================================
3061
3062
3063 //==============================================================================
3064 // PWM4DCH Bits
3065
3066 extern __at(0x061B) __sfr PWM4DCH;
3067
3068 typedef struct
3069 {
3070 unsigned PWM4DCH0 : 1;
3071 unsigned PWM4DCH1 : 1;
3072 unsigned PWM4DCH2 : 1;
3073 unsigned PWM4DCH3 : 1;
3074 unsigned PWM4DCH4 : 1;
3075 unsigned PWM4DCH5 : 1;
3076 unsigned PWM4DCH6 : 1;
3077 unsigned PWM4DCH7 : 1;
3078 } __PWM4DCHbits_t;
3079
3080 extern __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits;
3081
3082 #define _PWM4DCH0 0x01
3083 #define _PWM4DCH1 0x02
3084 #define _PWM4DCH2 0x04
3085 #define _PWM4DCH3 0x08
3086 #define _PWM4DCH4 0x10
3087 #define _PWM4DCH5 0x20
3088 #define _PWM4DCH6 0x40
3089 #define _PWM4DCH7 0x80
3090
3091 //==============================================================================
3092
3093
3094 //==============================================================================
3095 // PWM4CON Bits
3096
3097 extern __at(0x061C) __sfr PWM4CON;
3098
3099 typedef struct
3100 {
3101 unsigned : 1;
3102 unsigned : 1;
3103 unsigned : 1;
3104 unsigned : 1;
3105 unsigned PWM4POL : 1;
3106 unsigned PWM4OUT : 1;
3107 unsigned PWM4OE : 1;
3108 unsigned PWM4EN : 1;
3109 } __PWM4CONbits_t;
3110
3111 extern __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits;
3112
3113 #define _PWM4POL 0x10
3114 #define _PWM4OUT 0x20
3115 #define _PWM4OE 0x40
3116 #define _PWM4EN 0x80
3117
3118 //==============================================================================
3119
3120
3121 //==============================================================================
3122 // PWM4CON0 Bits
3123
3124 extern __at(0x061C) __sfr PWM4CON0;
3125
3126 typedef struct
3127 {
3128 unsigned : 1;
3129 unsigned : 1;
3130 unsigned : 1;
3131 unsigned : 1;
3132 unsigned PWM4POL : 1;
3133 unsigned PWM4OUT : 1;
3134 unsigned PWM4OE : 1;
3135 unsigned PWM4EN : 1;
3136 } __PWM4CON0bits_t;
3137
3138 extern __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits;
3139
3140 #define _PWM4CON0_PWM4POL 0x10
3141 #define _PWM4CON0_PWM4OUT 0x20
3142 #define _PWM4CON0_PWM4OE 0x40
3143 #define _PWM4CON0_PWM4EN 0x80
3144
3145 //==============================================================================
3146
3147
3148 //==============================================================================
3149 // CWG1DBR Bits
3150
3151 extern __at(0x0691) __sfr CWG1DBR;
3152
3153 typedef union
3154 {
3155 struct
3156 {
3157 unsigned CWG1DBR0 : 1;
3158 unsigned CWG1DBR1 : 1;
3159 unsigned CWG1DBR2 : 1;
3160 unsigned CWG1DBR3 : 1;
3161 unsigned CWG1DBR4 : 1;
3162 unsigned CWG1DBR5 : 1;
3163 unsigned : 1;
3164 unsigned : 1;
3165 };
3166
3167 struct
3168 {
3169 unsigned CWG1DBR : 6;
3170 unsigned : 2;
3171 };
3172 } __CWG1DBRbits_t;
3173
3174 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
3175
3176 #define _CWG1DBR0 0x01
3177 #define _CWG1DBR1 0x02
3178 #define _CWG1DBR2 0x04
3179 #define _CWG1DBR3 0x08
3180 #define _CWG1DBR4 0x10
3181 #define _CWG1DBR5 0x20
3182
3183 //==============================================================================
3184
3185
3186 //==============================================================================
3187 // CWG1DBF Bits
3188
3189 extern __at(0x0692) __sfr CWG1DBF;
3190
3191 typedef union
3192 {
3193 struct
3194 {
3195 unsigned CWG1DBF0 : 1;
3196 unsigned CWG1DBF1 : 1;
3197 unsigned CWG1DBF2 : 1;
3198 unsigned CWG1DBF3 : 1;
3199 unsigned CWG1DBF4 : 1;
3200 unsigned CWG1DBF5 : 1;
3201 unsigned : 1;
3202 unsigned : 1;
3203 };
3204
3205 struct
3206 {
3207 unsigned CWG1DBF : 6;
3208 unsigned : 2;
3209 };
3210 } __CWG1DBFbits_t;
3211
3212 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
3213
3214 #define _CWG1DBF0 0x01
3215 #define _CWG1DBF1 0x02
3216 #define _CWG1DBF2 0x04
3217 #define _CWG1DBF3 0x08
3218 #define _CWG1DBF4 0x10
3219 #define _CWG1DBF5 0x20
3220
3221 //==============================================================================
3222
3223
3224 //==============================================================================
3225 // CWG1CON0 Bits
3226
3227 extern __at(0x0693) __sfr CWG1CON0;
3228
3229 typedef struct
3230 {
3231 unsigned G1CS0 : 1;
3232 unsigned : 1;
3233 unsigned : 1;
3234 unsigned G1POLA : 1;
3235 unsigned G1POLB : 1;
3236 unsigned G1OEA : 1;
3237 unsigned G1OEB : 1;
3238 unsigned G1EN : 1;
3239 } __CWG1CON0bits_t;
3240
3241 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
3242
3243 #define _G1CS0 0x01
3244 #define _G1POLA 0x08
3245 #define _G1POLB 0x10
3246 #define _G1OEA 0x20
3247 #define _G1OEB 0x40
3248 #define _G1EN 0x80
3249
3250 //==============================================================================
3251
3252
3253 //==============================================================================
3254 // CWG1CON1 Bits
3255
3256 extern __at(0x0694) __sfr CWG1CON1;
3257
3258 typedef union
3259 {
3260 struct
3261 {
3262 unsigned G1IS0 : 1;
3263 unsigned G1IS1 : 1;
3264 unsigned G1IS2 : 1;
3265 unsigned : 1;
3266 unsigned G1ASDLA0 : 1;
3267 unsigned G1ASDLA1 : 1;
3268 unsigned G1ASDLB0 : 1;
3269 unsigned G1ASDLB1 : 1;
3270 };
3271
3272 struct
3273 {
3274 unsigned G1IS : 3;
3275 unsigned : 5;
3276 };
3277
3278 struct
3279 {
3280 unsigned : 4;
3281 unsigned G1ASDLA : 2;
3282 unsigned : 2;
3283 };
3284
3285 struct
3286 {
3287 unsigned : 6;
3288 unsigned G1ASDLB : 2;
3289 };
3290 } __CWG1CON1bits_t;
3291
3292 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
3293
3294 #define _G1IS0 0x01
3295 #define _G1IS1 0x02
3296 #define _G1IS2 0x04
3297 #define _G1ASDLA0 0x10
3298 #define _G1ASDLA1 0x20
3299 #define _G1ASDLB0 0x40
3300 #define _G1ASDLB1 0x80
3301
3302 //==============================================================================
3303
3304
3305 //==============================================================================
3306 // CWG1CON2 Bits
3307
3308 extern __at(0x0695) __sfr CWG1CON2;
3309
3310 typedef struct
3311 {
3312 unsigned G1ASDSCLC2 : 1;
3313 unsigned G1ASDSFLT : 1;
3314 unsigned G1ASDSC1 : 1;
3315 unsigned G1ASDSC2 : 1;
3316 unsigned : 1;
3317 unsigned : 1;
3318 unsigned G1ARSEN : 1;
3319 unsigned G1ASE : 1;
3320 } __CWG1CON2bits_t;
3321
3322 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
3323
3324 #define _G1ASDSCLC2 0x01
3325 #define _G1ASDSFLT 0x02
3326 #define _G1ASDSC1 0x04
3327 #define _G1ASDSC2 0x08
3328 #define _G1ARSEN 0x40
3329 #define _G1ASE 0x80
3330
3331 //==============================================================================
3332
3333
3334 //==============================================================================
3335 // CLCDATA Bits
3336
3337 extern __at(0x0F0F) __sfr CLCDATA;
3338
3339 typedef struct
3340 {
3341 unsigned MCLC1OUT : 1;
3342 unsigned MCLC2OUT : 1;
3343 unsigned MCLC3OUT : 1;
3344 unsigned MCLC4OUT : 1;
3345 unsigned : 1;
3346 unsigned : 1;
3347 unsigned : 1;
3348 unsigned : 1;
3349 } __CLCDATAbits_t;
3350
3351 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits;
3352
3353 #define _MCLC1OUT 0x01
3354 #define _MCLC2OUT 0x02
3355 #define _MCLC3OUT 0x04
3356 #define _MCLC4OUT 0x08
3357
3358 //==============================================================================
3359
3360
3361 //==============================================================================
3362 // CLC1CON Bits
3363
3364 extern __at(0x0F10) __sfr CLC1CON;
3365
3366 typedef union
3367 {
3368 struct
3369 {
3370 unsigned LC1MODE0 : 1;
3371 unsigned LC1MODE1 : 1;
3372 unsigned LC1MODE2 : 1;
3373 unsigned LC1INTN : 1;
3374 unsigned LC1INTP : 1;
3375 unsigned LC1OUT : 1;
3376 unsigned LC1OE : 1;
3377 unsigned LC1EN : 1;
3378 };
3379
3380 struct
3381 {
3382 unsigned LCMODE0 : 1;
3383 unsigned LCMODE1 : 1;
3384 unsigned LCMODE2 : 1;
3385 unsigned LCINTN : 1;
3386 unsigned LCINTP : 1;
3387 unsigned LCOUT : 1;
3388 unsigned LCOE : 1;
3389 unsigned LCEN : 1;
3390 };
3391
3392 struct
3393 {
3394 unsigned LCMODE : 3;
3395 unsigned : 5;
3396 };
3397
3398 struct
3399 {
3400 unsigned LC1MODE : 3;
3401 unsigned : 5;
3402 };
3403 } __CLC1CONbits_t;
3404
3405 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits;
3406
3407 #define _LC1MODE0 0x01
3408 #define _LCMODE0 0x01
3409 #define _LC1MODE1 0x02
3410 #define _LCMODE1 0x02
3411 #define _LC1MODE2 0x04
3412 #define _LCMODE2 0x04
3413 #define _LC1INTN 0x08
3414 #define _LCINTN 0x08
3415 #define _LC1INTP 0x10
3416 #define _LCINTP 0x10
3417 #define _LC1OUT 0x20
3418 #define _LCOUT 0x20
3419 #define _LC1OE 0x40
3420 #define _LCOE 0x40
3421 #define _LC1EN 0x80
3422 #define _LCEN 0x80
3423
3424 //==============================================================================
3425
3426
3427 //==============================================================================
3428 // CLC1POL Bits
3429
3430 extern __at(0x0F11) __sfr CLC1POL;
3431
3432 typedef union
3433 {
3434 struct
3435 {
3436 unsigned LC1G1POL : 1;
3437 unsigned LC1G2POL : 1;
3438 unsigned LC1G3POL : 1;
3439 unsigned LC1G4POL : 1;
3440 unsigned : 1;
3441 unsigned : 1;
3442 unsigned : 1;
3443 unsigned LC1POL : 1;
3444 };
3445
3446 struct
3447 {
3448 unsigned G1POL : 1;
3449 unsigned G2POL : 1;
3450 unsigned G3POL : 1;
3451 unsigned G4POL : 1;
3452 unsigned : 1;
3453 unsigned : 1;
3454 unsigned : 1;
3455 unsigned POL : 1;
3456 };
3457 } __CLC1POLbits_t;
3458
3459 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits;
3460
3461 #define _LC1G1POL 0x01
3462 #define _G1POL 0x01
3463 #define _LC1G2POL 0x02
3464 #define _G2POL 0x02
3465 #define _LC1G3POL 0x04
3466 #define _G3POL 0x04
3467 #define _LC1G4POL 0x08
3468 #define _G4POL 0x08
3469 #define _LC1POL 0x80
3470 #define _POL 0x80
3471
3472 //==============================================================================
3473
3474
3475 //==============================================================================
3476 // CLC1SEL0 Bits
3477
3478 extern __at(0x0F12) __sfr CLC1SEL0;
3479
3480 typedef union
3481 {
3482 struct
3483 {
3484 unsigned LC1D1S0 : 1;
3485 unsigned LC1D1S1 : 1;
3486 unsigned LC1D1S2 : 1;
3487 unsigned : 1;
3488 unsigned LC1D2S0 : 1;
3489 unsigned LC1D2S1 : 1;
3490 unsigned LC1D2S2 : 1;
3491 unsigned : 1;
3492 };
3493
3494 struct
3495 {
3496 unsigned D1S0 : 1;
3497 unsigned D1S1 : 1;
3498 unsigned D1S2 : 1;
3499 unsigned : 1;
3500 unsigned D2S0 : 1;
3501 unsigned D2S1 : 1;
3502 unsigned D2S2 : 1;
3503 unsigned : 1;
3504 };
3505
3506 struct
3507 {
3508 unsigned LC1D1S : 3;
3509 unsigned : 5;
3510 };
3511
3512 struct
3513 {
3514 unsigned D1S : 3;
3515 unsigned : 5;
3516 };
3517
3518 struct
3519 {
3520 unsigned : 4;
3521 unsigned D2S : 3;
3522 unsigned : 1;
3523 };
3524
3525 struct
3526 {
3527 unsigned : 4;
3528 unsigned LC1D2S : 3;
3529 unsigned : 1;
3530 };
3531 } __CLC1SEL0bits_t;
3532
3533 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits;
3534
3535 #define _LC1D1S0 0x01
3536 #define _D1S0 0x01
3537 #define _LC1D1S1 0x02
3538 #define _D1S1 0x02
3539 #define _LC1D1S2 0x04
3540 #define _D1S2 0x04
3541 #define _LC1D2S0 0x10
3542 #define _D2S0 0x10
3543 #define _LC1D2S1 0x20
3544 #define _D2S1 0x20
3545 #define _LC1D2S2 0x40
3546 #define _D2S2 0x40
3547
3548 //==============================================================================
3549
3550
3551 //==============================================================================
3552 // CLC1SEL1 Bits
3553
3554 extern __at(0x0F13) __sfr CLC1SEL1;
3555
3556 typedef union
3557 {
3558 struct
3559 {
3560 unsigned LC1D3S0 : 1;
3561 unsigned LC1D3S1 : 1;
3562 unsigned LC1D3S2 : 1;
3563 unsigned : 1;
3564 unsigned LC1D4S0 : 1;
3565 unsigned LC1D4S1 : 1;
3566 unsigned LC1D4S2 : 1;
3567 unsigned : 1;
3568 };
3569
3570 struct
3571 {
3572 unsigned D3S0 : 1;
3573 unsigned D3S1 : 1;
3574 unsigned D3S2 : 1;
3575 unsigned : 1;
3576 unsigned D4S0 : 1;
3577 unsigned D4S1 : 1;
3578 unsigned D4S2 : 1;
3579 unsigned : 1;
3580 };
3581
3582 struct
3583 {
3584 unsigned D3S : 3;
3585 unsigned : 5;
3586 };
3587
3588 struct
3589 {
3590 unsigned LC1D3S : 3;
3591 unsigned : 5;
3592 };
3593
3594 struct
3595 {
3596 unsigned : 4;
3597 unsigned LC1D4S : 3;
3598 unsigned : 1;
3599 };
3600
3601 struct
3602 {
3603 unsigned : 4;
3604 unsigned D4S : 3;
3605 unsigned : 1;
3606 };
3607 } __CLC1SEL1bits_t;
3608
3609 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits;
3610
3611 #define _LC1D3S0 0x01
3612 #define _D3S0 0x01
3613 #define _LC1D3S1 0x02
3614 #define _D3S1 0x02
3615 #define _LC1D3S2 0x04
3616 #define _D3S2 0x04
3617 #define _LC1D4S0 0x10
3618 #define _D4S0 0x10
3619 #define _LC1D4S1 0x20
3620 #define _D4S1 0x20
3621 #define _LC1D4S2 0x40
3622 #define _D4S2 0x40
3623
3624 //==============================================================================
3625
3626
3627 //==============================================================================
3628 // CLC1GLS0 Bits
3629
3630 extern __at(0x0F14) __sfr CLC1GLS0;
3631
3632 typedef union
3633 {
3634 struct
3635 {
3636 unsigned LC1G1D1N : 1;
3637 unsigned LC1G1D1T : 1;
3638 unsigned LC1G1D2N : 1;
3639 unsigned LC1G1D2T : 1;
3640 unsigned LC1G1D3N : 1;
3641 unsigned LC1G1D3T : 1;
3642 unsigned LC1G1D4N : 1;
3643 unsigned LC1G1D4T : 1;
3644 };
3645
3646 struct
3647 {
3648 unsigned D1N : 1;
3649 unsigned D1T : 1;
3650 unsigned D2N : 1;
3651 unsigned D2T : 1;
3652 unsigned D3N : 1;
3653 unsigned D3T : 1;
3654 unsigned D4N : 1;
3655 unsigned D4T : 1;
3656 };
3657 } __CLC1GLS0bits_t;
3658
3659 extern __at(0x0F14) volatile __CLC1GLS0bits_t CLC1GLS0bits;
3660
3661 #define _LC1G1D1N 0x01
3662 #define _D1N 0x01
3663 #define _LC1G1D1T 0x02
3664 #define _D1T 0x02
3665 #define _LC1G1D2N 0x04
3666 #define _D2N 0x04
3667 #define _LC1G1D2T 0x08
3668 #define _D2T 0x08
3669 #define _LC1G1D3N 0x10
3670 #define _D3N 0x10
3671 #define _LC1G1D3T 0x20
3672 #define _D3T 0x20
3673 #define _LC1G1D4N 0x40
3674 #define _D4N 0x40
3675 #define _LC1G1D4T 0x80
3676 #define _D4T 0x80
3677
3678 //==============================================================================
3679
3680
3681 //==============================================================================
3682 // CLC1GLS1 Bits
3683
3684 extern __at(0x0F15) __sfr CLC1GLS1;
3685
3686 typedef union
3687 {
3688 struct
3689 {
3690 unsigned LC1G2D1N : 1;
3691 unsigned LC1G2D1T : 1;
3692 unsigned LC1G2D2N : 1;
3693 unsigned LC1G2D2T : 1;
3694 unsigned LC1G2D3N : 1;
3695 unsigned LC1G2D3T : 1;
3696 unsigned LC1G2D4N : 1;
3697 unsigned LC1G2D4T : 1;
3698 };
3699
3700 struct
3701 {
3702 unsigned D1N : 1;
3703 unsigned D1T : 1;
3704 unsigned D2N : 1;
3705 unsigned D2T : 1;
3706 unsigned D3N : 1;
3707 unsigned D3T : 1;
3708 unsigned D4N : 1;
3709 unsigned D4T : 1;
3710 };
3711 } __CLC1GLS1bits_t;
3712
3713 extern __at(0x0F15) volatile __CLC1GLS1bits_t CLC1GLS1bits;
3714
3715 #define _CLC1GLS1_LC1G2D1N 0x01
3716 #define _CLC1GLS1_D1N 0x01
3717 #define _CLC1GLS1_LC1G2D1T 0x02
3718 #define _CLC1GLS1_D1T 0x02
3719 #define _CLC1GLS1_LC1G2D2N 0x04
3720 #define _CLC1GLS1_D2N 0x04
3721 #define _CLC1GLS1_LC1G2D2T 0x08
3722 #define _CLC1GLS1_D2T 0x08
3723 #define _CLC1GLS1_LC1G2D3N 0x10
3724 #define _CLC1GLS1_D3N 0x10
3725 #define _CLC1GLS1_LC1G2D3T 0x20
3726 #define _CLC1GLS1_D3T 0x20
3727 #define _CLC1GLS1_LC1G2D4N 0x40
3728 #define _CLC1GLS1_D4N 0x40
3729 #define _CLC1GLS1_LC1G2D4T 0x80
3730 #define _CLC1GLS1_D4T 0x80
3731
3732 //==============================================================================
3733
3734
3735 //==============================================================================
3736 // CLC1GLS2 Bits
3737
3738 extern __at(0x0F16) __sfr CLC1GLS2;
3739
3740 typedef union
3741 {
3742 struct
3743 {
3744 unsigned LC1G3D1N : 1;
3745 unsigned LC1G3D1T : 1;
3746 unsigned LC1G3D2N : 1;
3747 unsigned LC1G3D2T : 1;
3748 unsigned LC1G3D3N : 1;
3749 unsigned LC1G3D3T : 1;
3750 unsigned LC1G3D4N : 1;
3751 unsigned LC1G3D4T : 1;
3752 };
3753
3754 struct
3755 {
3756 unsigned D1N : 1;
3757 unsigned D1T : 1;
3758 unsigned D2N : 1;
3759 unsigned D2T : 1;
3760 unsigned D3N : 1;
3761 unsigned D3T : 1;
3762 unsigned D4N : 1;
3763 unsigned D4T : 1;
3764 };
3765 } __CLC1GLS2bits_t;
3766
3767 extern __at(0x0F16) volatile __CLC1GLS2bits_t CLC1GLS2bits;
3768
3769 #define _CLC1GLS2_LC1G3D1N 0x01
3770 #define _CLC1GLS2_D1N 0x01
3771 #define _CLC1GLS2_LC1G3D1T 0x02
3772 #define _CLC1GLS2_D1T 0x02
3773 #define _CLC1GLS2_LC1G3D2N 0x04
3774 #define _CLC1GLS2_D2N 0x04
3775 #define _CLC1GLS2_LC1G3D2T 0x08
3776 #define _CLC1GLS2_D2T 0x08
3777 #define _CLC1GLS2_LC1G3D3N 0x10
3778 #define _CLC1GLS2_D3N 0x10
3779 #define _CLC1GLS2_LC1G3D3T 0x20
3780 #define _CLC1GLS2_D3T 0x20
3781 #define _CLC1GLS2_LC1G3D4N 0x40
3782 #define _CLC1GLS2_D4N 0x40
3783 #define _CLC1GLS2_LC1G3D4T 0x80
3784 #define _CLC1GLS2_D4T 0x80
3785
3786 //==============================================================================
3787
3788
3789 //==============================================================================
3790 // CLC1GLS3 Bits
3791
3792 extern __at(0x0F17) __sfr CLC1GLS3;
3793
3794 typedef union
3795 {
3796 struct
3797 {
3798 unsigned LC1G4D1N : 1;
3799 unsigned LC1G4D1T : 1;
3800 unsigned LC1G4D2N : 1;
3801 unsigned LC1G4D2T : 1;
3802 unsigned LC1G4D3N : 1;
3803 unsigned LC1G4D3T : 1;
3804 unsigned LC1G4D4N : 1;
3805 unsigned LC1G4D4T : 1;
3806 };
3807
3808 struct
3809 {
3810 unsigned G4D1N : 1;
3811 unsigned G4D1T : 1;
3812 unsigned G4D2N : 1;
3813 unsigned G4D2T : 1;
3814 unsigned G4D3N : 1;
3815 unsigned G4D3T : 1;
3816 unsigned G4D4N : 1;
3817 unsigned G4D4T : 1;
3818 };
3819 } __CLC1GLS3bits_t;
3820
3821 extern __at(0x0F17) volatile __CLC1GLS3bits_t CLC1GLS3bits;
3822
3823 #define _LC1G4D1N 0x01
3824 #define _G4D1N 0x01
3825 #define _LC1G4D1T 0x02
3826 #define _G4D1T 0x02
3827 #define _LC1G4D2N 0x04
3828 #define _G4D2N 0x04
3829 #define _LC1G4D2T 0x08
3830 #define _G4D2T 0x08
3831 #define _LC1G4D3N 0x10
3832 #define _G4D3N 0x10
3833 #define _LC1G4D3T 0x20
3834 #define _G4D3T 0x20
3835 #define _LC1G4D4N 0x40
3836 #define _G4D4N 0x40
3837 #define _LC1G4D4T 0x80
3838 #define _G4D4T 0x80
3839
3840 //==============================================================================
3841
3842
3843 //==============================================================================
3844 // CLC2CON Bits
3845
3846 extern __at(0x0F18) __sfr CLC2CON;
3847
3848 typedef union
3849 {
3850 struct
3851 {
3852 unsigned LC2MODE0 : 1;
3853 unsigned LC2MODE1 : 1;
3854 unsigned LC2MODE2 : 1;
3855 unsigned LC2INTN : 1;
3856 unsigned LC2INTP : 1;
3857 unsigned LC2OUT : 1;
3858 unsigned LC2OE : 1;
3859 unsigned LC2EN : 1;
3860 };
3861
3862 struct
3863 {
3864 unsigned LCMODE0 : 1;
3865 unsigned LCMODE1 : 1;
3866 unsigned LCMODE2 : 1;
3867 unsigned LCINTN : 1;
3868 unsigned LCINTP : 1;
3869 unsigned LCOUT : 1;
3870 unsigned LCOE : 1;
3871 unsigned LCEN : 1;
3872 };
3873
3874 struct
3875 {
3876 unsigned LCMODE : 3;
3877 unsigned : 5;
3878 };
3879
3880 struct
3881 {
3882 unsigned LC2MODE : 3;
3883 unsigned : 5;
3884 };
3885 } __CLC2CONbits_t;
3886
3887 extern __at(0x0F18) volatile __CLC2CONbits_t CLC2CONbits;
3888
3889 #define _CLC2CON_LC2MODE0 0x01
3890 #define _CLC2CON_LCMODE0 0x01
3891 #define _CLC2CON_LC2MODE1 0x02
3892 #define _CLC2CON_LCMODE1 0x02
3893 #define _CLC2CON_LC2MODE2 0x04
3894 #define _CLC2CON_LCMODE2 0x04
3895 #define _CLC2CON_LC2INTN 0x08
3896 #define _CLC2CON_LCINTN 0x08
3897 #define _CLC2CON_LC2INTP 0x10
3898 #define _CLC2CON_LCINTP 0x10
3899 #define _CLC2CON_LC2OUT 0x20
3900 #define _CLC2CON_LCOUT 0x20
3901 #define _CLC2CON_LC2OE 0x40
3902 #define _CLC2CON_LCOE 0x40
3903 #define _CLC2CON_LC2EN 0x80
3904 #define _CLC2CON_LCEN 0x80
3905
3906 //==============================================================================
3907
3908
3909 //==============================================================================
3910 // CLC2POL Bits
3911
3912 extern __at(0x0F19) __sfr CLC2POL;
3913
3914 typedef union
3915 {
3916 struct
3917 {
3918 unsigned LC2G1POL : 1;
3919 unsigned LC2G2POL : 1;
3920 unsigned LC2G3POL : 1;
3921 unsigned LC2G4POL : 1;
3922 unsigned : 1;
3923 unsigned : 1;
3924 unsigned : 1;
3925 unsigned LC2POL : 1;
3926 };
3927
3928 struct
3929 {
3930 unsigned G1POL : 1;
3931 unsigned G2POL : 1;
3932 unsigned G3POL : 1;
3933 unsigned G4POL : 1;
3934 unsigned : 1;
3935 unsigned : 1;
3936 unsigned : 1;
3937 unsigned POL : 1;
3938 };
3939 } __CLC2POLbits_t;
3940
3941 extern __at(0x0F19) volatile __CLC2POLbits_t CLC2POLbits;
3942
3943 #define _CLC2POL_LC2G1POL 0x01
3944 #define _CLC2POL_G1POL 0x01
3945 #define _CLC2POL_LC2G2POL 0x02
3946 #define _CLC2POL_G2POL 0x02
3947 #define _CLC2POL_LC2G3POL 0x04
3948 #define _CLC2POL_G3POL 0x04
3949 #define _CLC2POL_LC2G4POL 0x08
3950 #define _CLC2POL_G4POL 0x08
3951 #define _CLC2POL_LC2POL 0x80
3952 #define _CLC2POL_POL 0x80
3953
3954 //==============================================================================
3955
3956
3957 //==============================================================================
3958 // CLC2SEL0 Bits
3959
3960 extern __at(0x0F1A) __sfr CLC2SEL0;
3961
3962 typedef union
3963 {
3964 struct
3965 {
3966 unsigned LC2D1S0 : 1;
3967 unsigned LC2D1S1 : 1;
3968 unsigned LC2D1S2 : 1;
3969 unsigned : 1;
3970 unsigned LC2D2S0 : 1;
3971 unsigned LC2D2S1 : 1;
3972 unsigned LC2D2S2 : 1;
3973 unsigned : 1;
3974 };
3975
3976 struct
3977 {
3978 unsigned D1S0 : 1;
3979 unsigned D1S1 : 1;
3980 unsigned D1S2 : 1;
3981 unsigned : 1;
3982 unsigned D2S0 : 1;
3983 unsigned D2S1 : 1;
3984 unsigned D2S2 : 1;
3985 unsigned : 1;
3986 };
3987
3988 struct
3989 {
3990 unsigned D1S : 3;
3991 unsigned : 5;
3992 };
3993
3994 struct
3995 {
3996 unsigned LC2D1S : 3;
3997 unsigned : 5;
3998 };
3999
4000 struct
4001 {
4002 unsigned : 4;
4003 unsigned D2S : 3;
4004 unsigned : 1;
4005 };
4006
4007 struct
4008 {
4009 unsigned : 4;
4010 unsigned LC2D2S : 3;
4011 unsigned : 1;
4012 };
4013 } __CLC2SEL0bits_t;
4014
4015 extern __at(0x0F1A) volatile __CLC2SEL0bits_t CLC2SEL0bits;
4016
4017 #define _CLC2SEL0_LC2D1S0 0x01
4018 #define _CLC2SEL0_D1S0 0x01
4019 #define _CLC2SEL0_LC2D1S1 0x02
4020 #define _CLC2SEL0_D1S1 0x02
4021 #define _CLC2SEL0_LC2D1S2 0x04
4022 #define _CLC2SEL0_D1S2 0x04
4023 #define _CLC2SEL0_LC2D2S0 0x10
4024 #define _CLC2SEL0_D2S0 0x10
4025 #define _CLC2SEL0_LC2D2S1 0x20
4026 #define _CLC2SEL0_D2S1 0x20
4027 #define _CLC2SEL0_LC2D2S2 0x40
4028 #define _CLC2SEL0_D2S2 0x40
4029
4030 //==============================================================================
4031
4032
4033 //==============================================================================
4034 // CLC2SEL1 Bits
4035
4036 extern __at(0x0F1B) __sfr CLC2SEL1;
4037
4038 typedef union
4039 {
4040 struct
4041 {
4042 unsigned LC2D3S0 : 1;
4043 unsigned LC2D3S1 : 1;
4044 unsigned LC2D3S2 : 1;
4045 unsigned : 1;
4046 unsigned LC2D4S0 : 1;
4047 unsigned LC2D4S1 : 1;
4048 unsigned LC2D4S2 : 1;
4049 unsigned : 1;
4050 };
4051
4052 struct
4053 {
4054 unsigned D3S0 : 1;
4055 unsigned D3S1 : 1;
4056 unsigned D3S2 : 1;
4057 unsigned : 1;
4058 unsigned D4S0 : 1;
4059 unsigned D4S1 : 1;
4060 unsigned D4S2 : 1;
4061 unsigned : 1;
4062 };
4063
4064 struct
4065 {
4066 unsigned LC2D3S : 3;
4067 unsigned : 5;
4068 };
4069
4070 struct
4071 {
4072 unsigned D3S : 3;
4073 unsigned : 5;
4074 };
4075
4076 struct
4077 {
4078 unsigned : 4;
4079 unsigned D4S : 3;
4080 unsigned : 1;
4081 };
4082
4083 struct
4084 {
4085 unsigned : 4;
4086 unsigned LC2D4S : 3;
4087 unsigned : 1;
4088 };
4089 } __CLC2SEL1bits_t;
4090
4091 extern __at(0x0F1B) volatile __CLC2SEL1bits_t CLC2SEL1bits;
4092
4093 #define _CLC2SEL1_LC2D3S0 0x01
4094 #define _CLC2SEL1_D3S0 0x01
4095 #define _CLC2SEL1_LC2D3S1 0x02
4096 #define _CLC2SEL1_D3S1 0x02
4097 #define _CLC2SEL1_LC2D3S2 0x04
4098 #define _CLC2SEL1_D3S2 0x04
4099 #define _CLC2SEL1_LC2D4S0 0x10
4100 #define _CLC2SEL1_D4S0 0x10
4101 #define _CLC2SEL1_LC2D4S1 0x20
4102 #define _CLC2SEL1_D4S1 0x20
4103 #define _CLC2SEL1_LC2D4S2 0x40
4104 #define _CLC2SEL1_D4S2 0x40
4105
4106 //==============================================================================
4107
4108
4109 //==============================================================================
4110 // CLC2GLS0 Bits
4111
4112 extern __at(0x0F1C) __sfr CLC2GLS0;
4113
4114 typedef union
4115 {
4116 struct
4117 {
4118 unsigned LC2G1D1N : 1;
4119 unsigned LC2G1D1T : 1;
4120 unsigned LC2G1D2N : 1;
4121 unsigned LC2G1D2T : 1;
4122 unsigned LC2G1D3N : 1;
4123 unsigned LC2G1D3T : 1;
4124 unsigned LC2G1D4N : 1;
4125 unsigned LC2G1D4T : 1;
4126 };
4127
4128 struct
4129 {
4130 unsigned D1N : 1;
4131 unsigned D1T : 1;
4132 unsigned D2N : 1;
4133 unsigned D2T : 1;
4134 unsigned D3N : 1;
4135 unsigned D3T : 1;
4136 unsigned D4N : 1;
4137 unsigned D4T : 1;
4138 };
4139 } __CLC2GLS0bits_t;
4140
4141 extern __at(0x0F1C) volatile __CLC2GLS0bits_t CLC2GLS0bits;
4142
4143 #define _CLC2GLS0_LC2G1D1N 0x01
4144 #define _CLC2GLS0_D1N 0x01
4145 #define _CLC2GLS0_LC2G1D1T 0x02
4146 #define _CLC2GLS0_D1T 0x02
4147 #define _CLC2GLS0_LC2G1D2N 0x04
4148 #define _CLC2GLS0_D2N 0x04
4149 #define _CLC2GLS0_LC2G1D2T 0x08
4150 #define _CLC2GLS0_D2T 0x08
4151 #define _CLC2GLS0_LC2G1D3N 0x10
4152 #define _CLC2GLS0_D3N 0x10
4153 #define _CLC2GLS0_LC2G1D3T 0x20
4154 #define _CLC2GLS0_D3T 0x20
4155 #define _CLC2GLS0_LC2G1D4N 0x40
4156 #define _CLC2GLS0_D4N 0x40
4157 #define _CLC2GLS0_LC2G1D4T 0x80
4158 #define _CLC2GLS0_D4T 0x80
4159
4160 //==============================================================================
4161
4162
4163 //==============================================================================
4164 // CLC2GLS1 Bits
4165
4166 extern __at(0x0F1D) __sfr CLC2GLS1;
4167
4168 typedef union
4169 {
4170 struct
4171 {
4172 unsigned LC2G2D1N : 1;
4173 unsigned LC2G2D1T : 1;
4174 unsigned LC2G2D2N : 1;
4175 unsigned LC2G2D2T : 1;
4176 unsigned LC2G2D3N : 1;
4177 unsigned LC2G2D3T : 1;
4178 unsigned LC2G2D4N : 1;
4179 unsigned LC2G2D4T : 1;
4180 };
4181
4182 struct
4183 {
4184 unsigned D1N : 1;
4185 unsigned D1T : 1;
4186 unsigned D2N : 1;
4187 unsigned D2T : 1;
4188 unsigned D3N : 1;
4189 unsigned D3T : 1;
4190 unsigned D4N : 1;
4191 unsigned D4T : 1;
4192 };
4193 } __CLC2GLS1bits_t;
4194
4195 extern __at(0x0F1D) volatile __CLC2GLS1bits_t CLC2GLS1bits;
4196
4197 #define _CLC2GLS1_LC2G2D1N 0x01
4198 #define _CLC2GLS1_D1N 0x01
4199 #define _CLC2GLS1_LC2G2D1T 0x02
4200 #define _CLC2GLS1_D1T 0x02
4201 #define _CLC2GLS1_LC2G2D2N 0x04
4202 #define _CLC2GLS1_D2N 0x04
4203 #define _CLC2GLS1_LC2G2D2T 0x08
4204 #define _CLC2GLS1_D2T 0x08
4205 #define _CLC2GLS1_LC2G2D3N 0x10
4206 #define _CLC2GLS1_D3N 0x10
4207 #define _CLC2GLS1_LC2G2D3T 0x20
4208 #define _CLC2GLS1_D3T 0x20
4209 #define _CLC2GLS1_LC2G2D4N 0x40
4210 #define _CLC2GLS1_D4N 0x40
4211 #define _CLC2GLS1_LC2G2D4T 0x80
4212 #define _CLC2GLS1_D4T 0x80
4213
4214 //==============================================================================
4215
4216
4217 //==============================================================================
4218 // CLC2GLS2 Bits
4219
4220 extern __at(0x0F1E) __sfr CLC2GLS2;
4221
4222 typedef union
4223 {
4224 struct
4225 {
4226 unsigned LC2G3D1N : 1;
4227 unsigned LC2G3D1T : 1;
4228 unsigned LC2G3D2N : 1;
4229 unsigned LC2G3D2T : 1;
4230 unsigned LC2G3D3N : 1;
4231 unsigned LC2G3D3T : 1;
4232 unsigned LC2G3D4N : 1;
4233 unsigned LC2G3D4T : 1;
4234 };
4235
4236 struct
4237 {
4238 unsigned D1N : 1;
4239 unsigned D1T : 1;
4240 unsigned D2N : 1;
4241 unsigned D2T : 1;
4242 unsigned D3N : 1;
4243 unsigned D3T : 1;
4244 unsigned D4N : 1;
4245 unsigned D4T : 1;
4246 };
4247 } __CLC2GLS2bits_t;
4248
4249 extern __at(0x0F1E) volatile __CLC2GLS2bits_t CLC2GLS2bits;
4250
4251 #define _CLC2GLS2_LC2G3D1N 0x01
4252 #define _CLC2GLS2_D1N 0x01
4253 #define _CLC2GLS2_LC2G3D1T 0x02
4254 #define _CLC2GLS2_D1T 0x02
4255 #define _CLC2GLS2_LC2G3D2N 0x04
4256 #define _CLC2GLS2_D2N 0x04
4257 #define _CLC2GLS2_LC2G3D2T 0x08
4258 #define _CLC2GLS2_D2T 0x08
4259 #define _CLC2GLS2_LC2G3D3N 0x10
4260 #define _CLC2GLS2_D3N 0x10
4261 #define _CLC2GLS2_LC2G3D3T 0x20
4262 #define _CLC2GLS2_D3T 0x20
4263 #define _CLC2GLS2_LC2G3D4N 0x40
4264 #define _CLC2GLS2_D4N 0x40
4265 #define _CLC2GLS2_LC2G3D4T 0x80
4266 #define _CLC2GLS2_D4T 0x80
4267
4268 //==============================================================================
4269
4270
4271 //==============================================================================
4272 // CLC2GLS3 Bits
4273
4274 extern __at(0x0F1F) __sfr CLC2GLS3;
4275
4276 typedef union
4277 {
4278 struct
4279 {
4280 unsigned LC2G4D1N : 1;
4281 unsigned LC2G4D1T : 1;
4282 unsigned LC2G4D2N : 1;
4283 unsigned LC2G4D2T : 1;
4284 unsigned LC2G4D3N : 1;
4285 unsigned LC2G4D3T : 1;
4286 unsigned LC2G4D4N : 1;
4287 unsigned LC2G4D4T : 1;
4288 };
4289
4290 struct
4291 {
4292 unsigned G4D1N : 1;
4293 unsigned G4D1T : 1;
4294 unsigned G4D2N : 1;
4295 unsigned G4D2T : 1;
4296 unsigned G4D3N : 1;
4297 unsigned G4D3T : 1;
4298 unsigned G4D4N : 1;
4299 unsigned G4D4T : 1;
4300 };
4301 } __CLC2GLS3bits_t;
4302
4303 extern __at(0x0F1F) volatile __CLC2GLS3bits_t CLC2GLS3bits;
4304
4305 #define _CLC2GLS3_LC2G4D1N 0x01
4306 #define _CLC2GLS3_G4D1N 0x01
4307 #define _CLC2GLS3_LC2G4D1T 0x02
4308 #define _CLC2GLS3_G4D1T 0x02
4309 #define _CLC2GLS3_LC2G4D2N 0x04
4310 #define _CLC2GLS3_G4D2N 0x04
4311 #define _CLC2GLS3_LC2G4D2T 0x08
4312 #define _CLC2GLS3_G4D2T 0x08
4313 #define _CLC2GLS3_LC2G4D3N 0x10
4314 #define _CLC2GLS3_G4D3N 0x10
4315 #define _CLC2GLS3_LC2G4D3T 0x20
4316 #define _CLC2GLS3_G4D3T 0x20
4317 #define _CLC2GLS3_LC2G4D4N 0x40
4318 #define _CLC2GLS3_G4D4N 0x40
4319 #define _CLC2GLS3_LC2G4D4T 0x80
4320 #define _CLC2GLS3_G4D4T 0x80
4321
4322 //==============================================================================
4323
4324
4325 //==============================================================================
4326 // CLC3CON Bits
4327
4328 extern __at(0x0F20) __sfr CLC3CON;
4329
4330 typedef union
4331 {
4332 struct
4333 {
4334 unsigned LC3MODE0 : 1;
4335 unsigned LC3MODE1 : 1;
4336 unsigned LC3MODE2 : 1;
4337 unsigned LC3INTN : 1;
4338 unsigned LC3INTP : 1;
4339 unsigned LC3OUT : 1;
4340 unsigned LC3OE : 1;
4341 unsigned LC3EN : 1;
4342 };
4343
4344 struct
4345 {
4346 unsigned LCMODE0 : 1;
4347 unsigned LCMODE1 : 1;
4348 unsigned LCMODE2 : 1;
4349 unsigned LCINTN : 1;
4350 unsigned LCINTP : 1;
4351 unsigned LCOUT : 1;
4352 unsigned LCOE : 1;
4353 unsigned LCEN : 1;
4354 };
4355
4356 struct
4357 {
4358 unsigned LCMODE : 3;
4359 unsigned : 5;
4360 };
4361
4362 struct
4363 {
4364 unsigned LC3MODE : 3;
4365 unsigned : 5;
4366 };
4367 } __CLC3CONbits_t;
4368
4369 extern __at(0x0F20) volatile __CLC3CONbits_t CLC3CONbits;
4370
4371 #define _CLC3CON_LC3MODE0 0x01
4372 #define _CLC3CON_LCMODE0 0x01
4373 #define _CLC3CON_LC3MODE1 0x02
4374 #define _CLC3CON_LCMODE1 0x02
4375 #define _CLC3CON_LC3MODE2 0x04
4376 #define _CLC3CON_LCMODE2 0x04
4377 #define _CLC3CON_LC3INTN 0x08
4378 #define _CLC3CON_LCINTN 0x08
4379 #define _CLC3CON_LC3INTP 0x10
4380 #define _CLC3CON_LCINTP 0x10
4381 #define _CLC3CON_LC3OUT 0x20
4382 #define _CLC3CON_LCOUT 0x20
4383 #define _CLC3CON_LC3OE 0x40
4384 #define _CLC3CON_LCOE 0x40
4385 #define _CLC3CON_LC3EN 0x80
4386 #define _CLC3CON_LCEN 0x80
4387
4388 //==============================================================================
4389
4390
4391 //==============================================================================
4392 // CLC3POL Bits
4393
4394 extern __at(0x0F21) __sfr CLC3POL;
4395
4396 typedef union
4397 {
4398 struct
4399 {
4400 unsigned LC3G1POL : 1;
4401 unsigned LC3G2POL : 1;
4402 unsigned LC3G3POL : 1;
4403 unsigned LC3G4POL : 1;
4404 unsigned : 1;
4405 unsigned : 1;
4406 unsigned : 1;
4407 unsigned LC3POL : 1;
4408 };
4409
4410 struct
4411 {
4412 unsigned G1POL : 1;
4413 unsigned G2POL : 1;
4414 unsigned G3POL : 1;
4415 unsigned G4POL : 1;
4416 unsigned : 1;
4417 unsigned : 1;
4418 unsigned : 1;
4419 unsigned POL : 1;
4420 };
4421 } __CLC3POLbits_t;
4422
4423 extern __at(0x0F21) volatile __CLC3POLbits_t CLC3POLbits;
4424
4425 #define _CLC3POL_LC3G1POL 0x01
4426 #define _CLC3POL_G1POL 0x01
4427 #define _CLC3POL_LC3G2POL 0x02
4428 #define _CLC3POL_G2POL 0x02
4429 #define _CLC3POL_LC3G3POL 0x04
4430 #define _CLC3POL_G3POL 0x04
4431 #define _CLC3POL_LC3G4POL 0x08
4432 #define _CLC3POL_G4POL 0x08
4433 #define _CLC3POL_LC3POL 0x80
4434 #define _CLC3POL_POL 0x80
4435
4436 //==============================================================================
4437
4438
4439 //==============================================================================
4440 // CLC3SEL0 Bits
4441
4442 extern __at(0x0F22) __sfr CLC3SEL0;
4443
4444 typedef union
4445 {
4446 struct
4447 {
4448 unsigned LC3D1S0 : 1;
4449 unsigned LC3D1S1 : 1;
4450 unsigned LC3D1S2 : 1;
4451 unsigned : 1;
4452 unsigned LC3D2S0 : 1;
4453 unsigned LC3D2S1 : 1;
4454 unsigned LC3D2S2 : 1;
4455 unsigned : 1;
4456 };
4457
4458 struct
4459 {
4460 unsigned D1S0 : 1;
4461 unsigned D1S1 : 1;
4462 unsigned D1S2 : 1;
4463 unsigned : 1;
4464 unsigned D2S0 : 1;
4465 unsigned D2S1 : 1;
4466 unsigned D2S2 : 1;
4467 unsigned : 1;
4468 };
4469
4470 struct
4471 {
4472 unsigned LC3D1S : 3;
4473 unsigned : 5;
4474 };
4475
4476 struct
4477 {
4478 unsigned D1S : 3;
4479 unsigned : 5;
4480 };
4481
4482 struct
4483 {
4484 unsigned : 4;
4485 unsigned LC3D2S : 3;
4486 unsigned : 1;
4487 };
4488
4489 struct
4490 {
4491 unsigned : 4;
4492 unsigned D2S : 3;
4493 unsigned : 1;
4494 };
4495 } __CLC3SEL0bits_t;
4496
4497 extern __at(0x0F22) volatile __CLC3SEL0bits_t CLC3SEL0bits;
4498
4499 #define _CLC3SEL0_LC3D1S0 0x01
4500 #define _CLC3SEL0_D1S0 0x01
4501 #define _CLC3SEL0_LC3D1S1 0x02
4502 #define _CLC3SEL0_D1S1 0x02
4503 #define _CLC3SEL0_LC3D1S2 0x04
4504 #define _CLC3SEL0_D1S2 0x04
4505 #define _CLC3SEL0_LC3D2S0 0x10
4506 #define _CLC3SEL0_D2S0 0x10
4507 #define _CLC3SEL0_LC3D2S1 0x20
4508 #define _CLC3SEL0_D2S1 0x20
4509 #define _CLC3SEL0_LC3D2S2 0x40
4510 #define _CLC3SEL0_D2S2 0x40
4511
4512 //==============================================================================
4513
4514
4515 //==============================================================================
4516 // CLC3SEL1 Bits
4517
4518 extern __at(0x0F23) __sfr CLC3SEL1;
4519
4520 typedef union
4521 {
4522 struct
4523 {
4524 unsigned LC3D3S0 : 1;
4525 unsigned LC3D3S1 : 1;
4526 unsigned LC3D3S2 : 1;
4527 unsigned : 1;
4528 unsigned LC3D4S0 : 1;
4529 unsigned LC3D4S1 : 1;
4530 unsigned LC3D4S2 : 1;
4531 unsigned : 1;
4532 };
4533
4534 struct
4535 {
4536 unsigned D3S0 : 1;
4537 unsigned D3S1 : 1;
4538 unsigned D3S2 : 1;
4539 unsigned : 1;
4540 unsigned D4S0 : 1;
4541 unsigned D4S1 : 1;
4542 unsigned D4S2 : 1;
4543 unsigned : 1;
4544 };
4545
4546 struct
4547 {
4548 unsigned D3S : 3;
4549 unsigned : 5;
4550 };
4551
4552 struct
4553 {
4554 unsigned LC3D3S : 3;
4555 unsigned : 5;
4556 };
4557
4558 struct
4559 {
4560 unsigned : 4;
4561 unsigned LC3D4S : 3;
4562 unsigned : 1;
4563 };
4564
4565 struct
4566 {
4567 unsigned : 4;
4568 unsigned D4S : 3;
4569 unsigned : 1;
4570 };
4571 } __CLC3SEL1bits_t;
4572
4573 extern __at(0x0F23) volatile __CLC3SEL1bits_t CLC3SEL1bits;
4574
4575 #define _CLC3SEL1_LC3D3S0 0x01
4576 #define _CLC3SEL1_D3S0 0x01
4577 #define _CLC3SEL1_LC3D3S1 0x02
4578 #define _CLC3SEL1_D3S1 0x02
4579 #define _CLC3SEL1_LC3D3S2 0x04
4580 #define _CLC3SEL1_D3S2 0x04
4581 #define _CLC3SEL1_LC3D4S0 0x10
4582 #define _CLC3SEL1_D4S0 0x10
4583 #define _CLC3SEL1_LC3D4S1 0x20
4584 #define _CLC3SEL1_D4S1 0x20
4585 #define _CLC3SEL1_LC3D4S2 0x40
4586 #define _CLC3SEL1_D4S2 0x40
4587
4588 //==============================================================================
4589
4590
4591 //==============================================================================
4592 // CLC3GLS0 Bits
4593
4594 extern __at(0x0F24) __sfr CLC3GLS0;
4595
4596 typedef union
4597 {
4598 struct
4599 {
4600 unsigned LC3G1D1N : 1;
4601 unsigned LC3G1D1T : 1;
4602 unsigned LC3G1D2N : 1;
4603 unsigned LC3G1D2T : 1;
4604 unsigned LC3G1D3N : 1;
4605 unsigned LC3G1D3T : 1;
4606 unsigned LC3G1D4N : 1;
4607 unsigned LC3G1D4T : 1;
4608 };
4609
4610 struct
4611 {
4612 unsigned D1N : 1;
4613 unsigned D1T : 1;
4614 unsigned D2N : 1;
4615 unsigned D2T : 1;
4616 unsigned D3N : 1;
4617 unsigned D3T : 1;
4618 unsigned D4N : 1;
4619 unsigned D4T : 1;
4620 };
4621 } __CLC3GLS0bits_t;
4622
4623 extern __at(0x0F24) volatile __CLC3GLS0bits_t CLC3GLS0bits;
4624
4625 #define _CLC3GLS0_LC3G1D1N 0x01
4626 #define _CLC3GLS0_D1N 0x01
4627 #define _CLC3GLS0_LC3G1D1T 0x02
4628 #define _CLC3GLS0_D1T 0x02
4629 #define _CLC3GLS0_LC3G1D2N 0x04
4630 #define _CLC3GLS0_D2N 0x04
4631 #define _CLC3GLS0_LC3G1D2T 0x08
4632 #define _CLC3GLS0_D2T 0x08
4633 #define _CLC3GLS0_LC3G1D3N 0x10
4634 #define _CLC3GLS0_D3N 0x10
4635 #define _CLC3GLS0_LC3G1D3T 0x20
4636 #define _CLC3GLS0_D3T 0x20
4637 #define _CLC3GLS0_LC3G1D4N 0x40
4638 #define _CLC3GLS0_D4N 0x40
4639 #define _CLC3GLS0_LC3G1D4T 0x80
4640 #define _CLC3GLS0_D4T 0x80
4641
4642 //==============================================================================
4643
4644
4645 //==============================================================================
4646 // CLC3GLS1 Bits
4647
4648 extern __at(0x0F25) __sfr CLC3GLS1;
4649
4650 typedef union
4651 {
4652 struct
4653 {
4654 unsigned LC3G2D1N : 1;
4655 unsigned LC3G2D1T : 1;
4656 unsigned LC3G2D2N : 1;
4657 unsigned LC3G2D2T : 1;
4658 unsigned LC3G2D3N : 1;
4659 unsigned LC3G2D3T : 1;
4660 unsigned LC3G2D4N : 1;
4661 unsigned LC3G2D4T : 1;
4662 };
4663
4664 struct
4665 {
4666 unsigned D1N : 1;
4667 unsigned D1T : 1;
4668 unsigned D2N : 1;
4669 unsigned D2T : 1;
4670 unsigned D3N : 1;
4671 unsigned D3T : 1;
4672 unsigned D4N : 1;
4673 unsigned D4T : 1;
4674 };
4675 } __CLC3GLS1bits_t;
4676
4677 extern __at(0x0F25) volatile __CLC3GLS1bits_t CLC3GLS1bits;
4678
4679 #define _CLC3GLS1_LC3G2D1N 0x01
4680 #define _CLC3GLS1_D1N 0x01
4681 #define _CLC3GLS1_LC3G2D1T 0x02
4682 #define _CLC3GLS1_D1T 0x02
4683 #define _CLC3GLS1_LC3G2D2N 0x04
4684 #define _CLC3GLS1_D2N 0x04
4685 #define _CLC3GLS1_LC3G2D2T 0x08
4686 #define _CLC3GLS1_D2T 0x08
4687 #define _CLC3GLS1_LC3G2D3N 0x10
4688 #define _CLC3GLS1_D3N 0x10
4689 #define _CLC3GLS1_LC3G2D3T 0x20
4690 #define _CLC3GLS1_D3T 0x20
4691 #define _CLC3GLS1_LC3G2D4N 0x40
4692 #define _CLC3GLS1_D4N 0x40
4693 #define _CLC3GLS1_LC3G2D4T 0x80
4694 #define _CLC3GLS1_D4T 0x80
4695
4696 //==============================================================================
4697
4698
4699 //==============================================================================
4700 // CLC3GLS2 Bits
4701
4702 extern __at(0x0F26) __sfr CLC3GLS2;
4703
4704 typedef union
4705 {
4706 struct
4707 {
4708 unsigned LC3G3D1N : 1;
4709 unsigned LC3G3D1T : 1;
4710 unsigned LC3G3D2N : 1;
4711 unsigned LC3G3D2T : 1;
4712 unsigned LC3G3D3N : 1;
4713 unsigned LC3G3D3T : 1;
4714 unsigned LC3G3D4N : 1;
4715 unsigned LC3G3D4T : 1;
4716 };
4717
4718 struct
4719 {
4720 unsigned D1N : 1;
4721 unsigned D1T : 1;
4722 unsigned D2N : 1;
4723 unsigned D2T : 1;
4724 unsigned D3N : 1;
4725 unsigned D3T : 1;
4726 unsigned D4N : 1;
4727 unsigned D4T : 1;
4728 };
4729 } __CLC3GLS2bits_t;
4730
4731 extern __at(0x0F26) volatile __CLC3GLS2bits_t CLC3GLS2bits;
4732
4733 #define _CLC3GLS2_LC3G3D1N 0x01
4734 #define _CLC3GLS2_D1N 0x01
4735 #define _CLC3GLS2_LC3G3D1T 0x02
4736 #define _CLC3GLS2_D1T 0x02
4737 #define _CLC3GLS2_LC3G3D2N 0x04
4738 #define _CLC3GLS2_D2N 0x04
4739 #define _CLC3GLS2_LC3G3D2T 0x08
4740 #define _CLC3GLS2_D2T 0x08
4741 #define _CLC3GLS2_LC3G3D3N 0x10
4742 #define _CLC3GLS2_D3N 0x10
4743 #define _CLC3GLS2_LC3G3D3T 0x20
4744 #define _CLC3GLS2_D3T 0x20
4745 #define _CLC3GLS2_LC3G3D4N 0x40
4746 #define _CLC3GLS2_D4N 0x40
4747 #define _CLC3GLS2_LC3G3D4T 0x80
4748 #define _CLC3GLS2_D4T 0x80
4749
4750 //==============================================================================
4751
4752
4753 //==============================================================================
4754 // CLC3GLS3 Bits
4755
4756 extern __at(0x0F27) __sfr CLC3GLS3;
4757
4758 typedef union
4759 {
4760 struct
4761 {
4762 unsigned LC3G4D1N : 1;
4763 unsigned LC3G4D1T : 1;
4764 unsigned LC3G4D2N : 1;
4765 unsigned LC3G4D2T : 1;
4766 unsigned LC3G4D3N : 1;
4767 unsigned LC3G4D3T : 1;
4768 unsigned LC3G4D4N : 1;
4769 unsigned LC3G4D4T : 1;
4770 };
4771
4772 struct
4773 {
4774 unsigned G4D1N : 1;
4775 unsigned G4D1T : 1;
4776 unsigned G4D2N : 1;
4777 unsigned G4D2T : 1;
4778 unsigned G4D3N : 1;
4779 unsigned G4D3T : 1;
4780 unsigned G4D4N : 1;
4781 unsigned G4D4T : 1;
4782 };
4783 } __CLC3GLS3bits_t;
4784
4785 extern __at(0x0F27) volatile __CLC3GLS3bits_t CLC3GLS3bits;
4786
4787 #define _CLC3GLS3_LC3G4D1N 0x01
4788 #define _CLC3GLS3_G4D1N 0x01
4789 #define _CLC3GLS3_LC3G4D1T 0x02
4790 #define _CLC3GLS3_G4D1T 0x02
4791 #define _CLC3GLS3_LC3G4D2N 0x04
4792 #define _CLC3GLS3_G4D2N 0x04
4793 #define _CLC3GLS3_LC3G4D2T 0x08
4794 #define _CLC3GLS3_G4D2T 0x08
4795 #define _CLC3GLS3_LC3G4D3N 0x10
4796 #define _CLC3GLS3_G4D3N 0x10
4797 #define _CLC3GLS3_LC3G4D3T 0x20
4798 #define _CLC3GLS3_G4D3T 0x20
4799 #define _CLC3GLS3_LC3G4D4N 0x40
4800 #define _CLC3GLS3_G4D4N 0x40
4801 #define _CLC3GLS3_LC3G4D4T 0x80
4802 #define _CLC3GLS3_G4D4T 0x80
4803
4804 //==============================================================================
4805
4806
4807 //==============================================================================
4808 // CLC4CON Bits
4809
4810 extern __at(0x0F28) __sfr CLC4CON;
4811
4812 typedef union
4813 {
4814 struct
4815 {
4816 unsigned LC4MODE0 : 1;
4817 unsigned LC4MODE1 : 1;
4818 unsigned LC4MODE2 : 1;
4819 unsigned LC4INTN : 1;
4820 unsigned LC4INTP : 1;
4821 unsigned LC4OUT : 1;
4822 unsigned LC4OE : 1;
4823 unsigned LC4EN : 1;
4824 };
4825
4826 struct
4827 {
4828 unsigned LCMODE0 : 1;
4829 unsigned LCMODE1 : 1;
4830 unsigned LCMODE2 : 1;
4831 unsigned LCINTN : 1;
4832 unsigned LCINTP : 1;
4833 unsigned LCOUT : 1;
4834 unsigned LCOE : 1;
4835 unsigned LCEN : 1;
4836 };
4837
4838 struct
4839 {
4840 unsigned LC4MODE : 3;
4841 unsigned : 5;
4842 };
4843
4844 struct
4845 {
4846 unsigned LCMODE : 3;
4847 unsigned : 5;
4848 };
4849 } __CLC4CONbits_t;
4850
4851 extern __at(0x0F28) volatile __CLC4CONbits_t CLC4CONbits;
4852
4853 #define _CLC4CON_LC4MODE0 0x01
4854 #define _CLC4CON_LCMODE0 0x01
4855 #define _CLC4CON_LC4MODE1 0x02
4856 #define _CLC4CON_LCMODE1 0x02
4857 #define _CLC4CON_LC4MODE2 0x04
4858 #define _CLC4CON_LCMODE2 0x04
4859 #define _CLC4CON_LC4INTN 0x08
4860 #define _CLC4CON_LCINTN 0x08
4861 #define _CLC4CON_LC4INTP 0x10
4862 #define _CLC4CON_LCINTP 0x10
4863 #define _CLC4CON_LC4OUT 0x20
4864 #define _CLC4CON_LCOUT 0x20
4865 #define _CLC4CON_LC4OE 0x40
4866 #define _CLC4CON_LCOE 0x40
4867 #define _CLC4CON_LC4EN 0x80
4868 #define _CLC4CON_LCEN 0x80
4869
4870 //==============================================================================
4871
4872
4873 //==============================================================================
4874 // CLC4POL Bits
4875
4876 extern __at(0x0F29) __sfr CLC4POL;
4877
4878 typedef union
4879 {
4880 struct
4881 {
4882 unsigned LC4G1POL : 1;
4883 unsigned LC4G2POL : 1;
4884 unsigned LC4G3POL : 1;
4885 unsigned LC4G4POL : 1;
4886 unsigned : 1;
4887 unsigned : 1;
4888 unsigned : 1;
4889 unsigned LC4POL : 1;
4890 };
4891
4892 struct
4893 {
4894 unsigned G1POL : 1;
4895 unsigned G2POL : 1;
4896 unsigned G3POL : 1;
4897 unsigned G4POL : 1;
4898 unsigned : 1;
4899 unsigned : 1;
4900 unsigned : 1;
4901 unsigned POL : 1;
4902 };
4903 } __CLC4POLbits_t;
4904
4905 extern __at(0x0F29) volatile __CLC4POLbits_t CLC4POLbits;
4906
4907 #define _CLC4POL_LC4G1POL 0x01
4908 #define _CLC4POL_G1POL 0x01
4909 #define _CLC4POL_LC4G2POL 0x02
4910 #define _CLC4POL_G2POL 0x02
4911 #define _CLC4POL_LC4G3POL 0x04
4912 #define _CLC4POL_G3POL 0x04
4913 #define _CLC4POL_LC4G4POL 0x08
4914 #define _CLC4POL_G4POL 0x08
4915 #define _CLC4POL_LC4POL 0x80
4916 #define _CLC4POL_POL 0x80
4917
4918 //==============================================================================
4919
4920
4921 //==============================================================================
4922 // CLC4SEL0 Bits
4923
4924 extern __at(0x0F2A) __sfr CLC4SEL0;
4925
4926 typedef union
4927 {
4928 struct
4929 {
4930 unsigned LC4D1S0 : 1;
4931 unsigned LC4D1S1 : 1;
4932 unsigned LC4D1S2 : 1;
4933 unsigned : 1;
4934 unsigned LC4D2S0 : 1;
4935 unsigned LC4D2S1 : 1;
4936 unsigned LC4D2S2 : 1;
4937 unsigned : 1;
4938 };
4939
4940 struct
4941 {
4942 unsigned D1S0 : 1;
4943 unsigned D1S1 : 1;
4944 unsigned D1S2 : 1;
4945 unsigned : 1;
4946 unsigned D2S0 : 1;
4947 unsigned D2S1 : 1;
4948 unsigned D2S2 : 1;
4949 unsigned : 1;
4950 };
4951
4952 struct
4953 {
4954 unsigned D1S : 3;
4955 unsigned : 5;
4956 };
4957
4958 struct
4959 {
4960 unsigned LC4D1S : 3;
4961 unsigned : 5;
4962 };
4963
4964 struct
4965 {
4966 unsigned : 4;
4967 unsigned D2S : 3;
4968 unsigned : 1;
4969 };
4970
4971 struct
4972 {
4973 unsigned : 4;
4974 unsigned LC4D2S : 3;
4975 unsigned : 1;
4976 };
4977 } __CLC4SEL0bits_t;
4978
4979 extern __at(0x0F2A) volatile __CLC4SEL0bits_t CLC4SEL0bits;
4980
4981 #define _CLC4SEL0_LC4D1S0 0x01
4982 #define _CLC4SEL0_D1S0 0x01
4983 #define _CLC4SEL0_LC4D1S1 0x02
4984 #define _CLC4SEL0_D1S1 0x02
4985 #define _CLC4SEL0_LC4D1S2 0x04
4986 #define _CLC4SEL0_D1S2 0x04
4987 #define _CLC4SEL0_LC4D2S0 0x10
4988 #define _CLC4SEL0_D2S0 0x10
4989 #define _CLC4SEL0_LC4D2S1 0x20
4990 #define _CLC4SEL0_D2S1 0x20
4991 #define _CLC4SEL0_LC4D2S2 0x40
4992 #define _CLC4SEL0_D2S2 0x40
4993
4994 //==============================================================================
4995
4996
4997 //==============================================================================
4998 // CLC4SEL1 Bits
4999
5000 extern __at(0x0F2B) __sfr CLC4SEL1;
5001
5002 typedef union
5003 {
5004 struct
5005 {
5006 unsigned LC4D3S0 : 1;
5007 unsigned LC4D3S1 : 1;
5008 unsigned LC4D3S2 : 1;
5009 unsigned : 1;
5010 unsigned LC4D4S0 : 1;
5011 unsigned LC4D4S1 : 1;
5012 unsigned LC4D4S2 : 1;
5013 unsigned : 1;
5014 };
5015
5016 struct
5017 {
5018 unsigned D3S0 : 1;
5019 unsigned D3S1 : 1;
5020 unsigned D3S2 : 1;
5021 unsigned : 1;
5022 unsigned D4S0 : 1;
5023 unsigned D4S1 : 1;
5024 unsigned D4S2 : 1;
5025 unsigned : 1;
5026 };
5027
5028 struct
5029 {
5030 unsigned LC4D3S : 3;
5031 unsigned : 5;
5032 };
5033
5034 struct
5035 {
5036 unsigned D3S : 3;
5037 unsigned : 5;
5038 };
5039
5040 struct
5041 {
5042 unsigned : 4;
5043 unsigned LC4D4S : 3;
5044 unsigned : 1;
5045 };
5046
5047 struct
5048 {
5049 unsigned : 4;
5050 unsigned D4S : 3;
5051 unsigned : 1;
5052 };
5053 } __CLC4SEL1bits_t;
5054
5055 extern __at(0x0F2B) volatile __CLC4SEL1bits_t CLC4SEL1bits;
5056
5057 #define _CLC4SEL1_LC4D3S0 0x01
5058 #define _CLC4SEL1_D3S0 0x01
5059 #define _CLC4SEL1_LC4D3S1 0x02
5060 #define _CLC4SEL1_D3S1 0x02
5061 #define _CLC4SEL1_LC4D3S2 0x04
5062 #define _CLC4SEL1_D3S2 0x04
5063 #define _CLC4SEL1_LC4D4S0 0x10
5064 #define _CLC4SEL1_D4S0 0x10
5065 #define _CLC4SEL1_LC4D4S1 0x20
5066 #define _CLC4SEL1_D4S1 0x20
5067 #define _CLC4SEL1_LC4D4S2 0x40
5068 #define _CLC4SEL1_D4S2 0x40
5069
5070 //==============================================================================
5071
5072
5073 //==============================================================================
5074 // CLC4GLS0 Bits
5075
5076 extern __at(0x0F2C) __sfr CLC4GLS0;
5077
5078 typedef union
5079 {
5080 struct
5081 {
5082 unsigned LC4G1D1N : 1;
5083 unsigned LC4G1D1T : 1;
5084 unsigned LC4G1D2N : 1;
5085 unsigned LC4G1D2T : 1;
5086 unsigned LC4G1D3N : 1;
5087 unsigned LC4G1D3T : 1;
5088 unsigned LC4G1D4N : 1;
5089 unsigned LC4G1D4T : 1;
5090 };
5091
5092 struct
5093 {
5094 unsigned D1N : 1;
5095 unsigned D1T : 1;
5096 unsigned D2N : 1;
5097 unsigned D2T : 1;
5098 unsigned D3N : 1;
5099 unsigned D3T : 1;
5100 unsigned D4N : 1;
5101 unsigned D4T : 1;
5102 };
5103 } __CLC4GLS0bits_t;
5104
5105 extern __at(0x0F2C) volatile __CLC4GLS0bits_t CLC4GLS0bits;
5106
5107 #define _CLC4GLS0_LC4G1D1N 0x01
5108 #define _CLC4GLS0_D1N 0x01
5109 #define _CLC4GLS0_LC4G1D1T 0x02
5110 #define _CLC4GLS0_D1T 0x02
5111 #define _CLC4GLS0_LC4G1D2N 0x04
5112 #define _CLC4GLS0_D2N 0x04
5113 #define _CLC4GLS0_LC4G1D2T 0x08
5114 #define _CLC4GLS0_D2T 0x08
5115 #define _CLC4GLS0_LC4G1D3N 0x10
5116 #define _CLC4GLS0_D3N 0x10
5117 #define _CLC4GLS0_LC4G1D3T 0x20
5118 #define _CLC4GLS0_D3T 0x20
5119 #define _CLC4GLS0_LC4G1D4N 0x40
5120 #define _CLC4GLS0_D4N 0x40
5121 #define _CLC4GLS0_LC4G1D4T 0x80
5122 #define _CLC4GLS0_D4T 0x80
5123
5124 //==============================================================================
5125
5126
5127 //==============================================================================
5128 // CLC4GLS1 Bits
5129
5130 extern __at(0x0F2D) __sfr CLC4GLS1;
5131
5132 typedef union
5133 {
5134 struct
5135 {
5136 unsigned LC4G2D1N : 1;
5137 unsigned LC4G2D1T : 1;
5138 unsigned LC4G2D2N : 1;
5139 unsigned LC4G2D2T : 1;
5140 unsigned LC4G2D3N : 1;
5141 unsigned LC4G2D3T : 1;
5142 unsigned LC4G2D4N : 1;
5143 unsigned LC4G2D4T : 1;
5144 };
5145
5146 struct
5147 {
5148 unsigned D1N : 1;
5149 unsigned D1T : 1;
5150 unsigned D2N : 1;
5151 unsigned D2T : 1;
5152 unsigned D3N : 1;
5153 unsigned D3T : 1;
5154 unsigned D4N : 1;
5155 unsigned D4T : 1;
5156 };
5157 } __CLC4GLS1bits_t;
5158
5159 extern __at(0x0F2D) volatile __CLC4GLS1bits_t CLC4GLS1bits;
5160
5161 #define _CLC4GLS1_LC4G2D1N 0x01
5162 #define _CLC4GLS1_D1N 0x01
5163 #define _CLC4GLS1_LC4G2D1T 0x02
5164 #define _CLC4GLS1_D1T 0x02
5165 #define _CLC4GLS1_LC4G2D2N 0x04
5166 #define _CLC4GLS1_D2N 0x04
5167 #define _CLC4GLS1_LC4G2D2T 0x08
5168 #define _CLC4GLS1_D2T 0x08
5169 #define _CLC4GLS1_LC4G2D3N 0x10
5170 #define _CLC4GLS1_D3N 0x10
5171 #define _CLC4GLS1_LC4G2D3T 0x20
5172 #define _CLC4GLS1_D3T 0x20
5173 #define _CLC4GLS1_LC4G2D4N 0x40
5174 #define _CLC4GLS1_D4N 0x40
5175 #define _CLC4GLS1_LC4G2D4T 0x80
5176 #define _CLC4GLS1_D4T 0x80
5177
5178 //==============================================================================
5179
5180
5181 //==============================================================================
5182 // CLC4GLS2 Bits
5183
5184 extern __at(0x0F2E) __sfr CLC4GLS2;
5185
5186 typedef union
5187 {
5188 struct
5189 {
5190 unsigned LC4G3D1N : 1;
5191 unsigned LC4G3D1T : 1;
5192 unsigned LC4G3D2N : 1;
5193 unsigned LC4G3D2T : 1;
5194 unsigned LC4G3D3N : 1;
5195 unsigned LC4G3D3T : 1;
5196 unsigned LC4G3D4N : 1;
5197 unsigned LC4G3D4T : 1;
5198 };
5199
5200 struct
5201 {
5202 unsigned D1N : 1;
5203 unsigned D1T : 1;
5204 unsigned D2N : 1;
5205 unsigned D2T : 1;
5206 unsigned D3N : 1;
5207 unsigned D3T : 1;
5208 unsigned D4N : 1;
5209 unsigned D4T : 1;
5210 };
5211 } __CLC4GLS2bits_t;
5212
5213 extern __at(0x0F2E) volatile __CLC4GLS2bits_t CLC4GLS2bits;
5214
5215 #define _CLC4GLS2_LC4G3D1N 0x01
5216 #define _CLC4GLS2_D1N 0x01
5217 #define _CLC4GLS2_LC4G3D1T 0x02
5218 #define _CLC4GLS2_D1T 0x02
5219 #define _CLC4GLS2_LC4G3D2N 0x04
5220 #define _CLC4GLS2_D2N 0x04
5221 #define _CLC4GLS2_LC4G3D2T 0x08
5222 #define _CLC4GLS2_D2T 0x08
5223 #define _CLC4GLS2_LC4G3D3N 0x10
5224 #define _CLC4GLS2_D3N 0x10
5225 #define _CLC4GLS2_LC4G3D3T 0x20
5226 #define _CLC4GLS2_D3T 0x20
5227 #define _CLC4GLS2_LC4G3D4N 0x40
5228 #define _CLC4GLS2_D4N 0x40
5229 #define _CLC4GLS2_LC4G3D4T 0x80
5230 #define _CLC4GLS2_D4T 0x80
5231
5232 //==============================================================================
5233
5234
5235 //==============================================================================
5236 // CLC4GLS3 Bits
5237
5238 extern __at(0x0F2F) __sfr CLC4GLS3;
5239
5240 typedef union
5241 {
5242 struct
5243 {
5244 unsigned LC4G4D1N : 1;
5245 unsigned LC4G4D1T : 1;
5246 unsigned LC4G4D2N : 1;
5247 unsigned LC4G4D2T : 1;
5248 unsigned LC4G4D3N : 1;
5249 unsigned LC4G4D3T : 1;
5250 unsigned LC4G4D4N : 1;
5251 unsigned LC4G4D4T : 1;
5252 };
5253
5254 struct
5255 {
5256 unsigned G4D1N : 1;
5257 unsigned G4D1T : 1;
5258 unsigned G4D2N : 1;
5259 unsigned G4D2T : 1;
5260 unsigned G4D3N : 1;
5261 unsigned G4D3T : 1;
5262 unsigned G4D4N : 1;
5263 unsigned G4D4T : 1;
5264 };
5265 } __CLC4GLS3bits_t;
5266
5267 extern __at(0x0F2F) volatile __CLC4GLS3bits_t CLC4GLS3bits;
5268
5269 #define _CLC4GLS3_LC4G4D1N 0x01
5270 #define _CLC4GLS3_G4D1N 0x01
5271 #define _CLC4GLS3_LC4G4D1T 0x02
5272 #define _CLC4GLS3_G4D1T 0x02
5273 #define _CLC4GLS3_LC4G4D2N 0x04
5274 #define _CLC4GLS3_G4D2N 0x04
5275 #define _CLC4GLS3_LC4G4D2T 0x08
5276 #define _CLC4GLS3_G4D2T 0x08
5277 #define _CLC4GLS3_LC4G4D3N 0x10
5278 #define _CLC4GLS3_G4D3N 0x10
5279 #define _CLC4GLS3_LC4G4D3T 0x20
5280 #define _CLC4GLS3_G4D3T 0x20
5281 #define _CLC4GLS3_LC4G4D4N 0x40
5282 #define _CLC4GLS3_G4D4N 0x40
5283 #define _CLC4GLS3_LC4G4D4T 0x80
5284 #define _CLC4GLS3_G4D4T 0x80
5285
5286 //==============================================================================
5287
5288
5289 //==============================================================================
5290 // ICDIO Bits
5291
5292 extern __at(0x0F8C) __sfr ICDIO;
5293
5294 typedef struct
5295 {
5296 unsigned : 1;
5297 unsigned : 1;
5298 unsigned TRIS_ICDCLK : 1;
5299 unsigned TRIS_ICDDAT : 1;
5300 unsigned LAT_ICDCLK : 1;
5301 unsigned LAT_ICDDAT : 1;
5302 unsigned PORT_ICDCLK : 1;
5303 unsigned PORT_ICDDAT : 1;
5304 } __ICDIObits_t;
5305
5306 extern __at(0x0F8C) volatile __ICDIObits_t ICDIObits;
5307
5308 #define _TRIS_ICDCLK 0x04
5309 #define _TRIS_ICDDAT 0x08
5310 #define _LAT_ICDCLK 0x10
5311 #define _LAT_ICDDAT 0x20
5312 #define _PORT_ICDCLK 0x40
5313 #define _PORT_ICDDAT 0x80
5314
5315 //==============================================================================
5316
5317
5318 //==============================================================================
5319 // ICDCON0 Bits
5320
5321 extern __at(0x0F8D) __sfr ICDCON0;
5322
5323 typedef struct
5324 {
5325 unsigned RSTVEC : 1;
5326 unsigned : 1;
5327 unsigned : 1;
5328 unsigned DBGINEX : 1;
5329 unsigned : 1;
5330 unsigned SSTEP : 1;
5331 unsigned FREEZ : 1;
5332 unsigned INBUG : 1;
5333 } __ICDCON0bits_t;
5334
5335 extern __at(0x0F8D) volatile __ICDCON0bits_t ICDCON0bits;
5336
5337 #define _RSTVEC 0x01
5338 #define _DBGINEX 0x08
5339 #define _SSTEP 0x20
5340 #define _FREEZ 0x40
5341 #define _INBUG 0x80
5342
5343 //==============================================================================
5344
5345
5346 //==============================================================================
5347 // ICDSTAT Bits
5348
5349 extern __at(0x0F91) __sfr ICDSTAT;
5350
5351 typedef struct
5352 {
5353 unsigned : 1;
5354 unsigned USRHLTF : 1;
5355 unsigned : 1;
5356 unsigned : 1;
5357 unsigned : 1;
5358 unsigned : 1;
5359 unsigned TRP0HLTF : 1;
5360 unsigned TRP1HLTF : 1;
5361 } __ICDSTATbits_t;
5362
5363 extern __at(0x0F91) volatile __ICDSTATbits_t ICDSTATbits;
5364
5365 #define _USRHLTF 0x02
5366 #define _TRP0HLTF 0x40
5367 #define _TRP1HLTF 0x80
5368
5369 //==============================================================================
5370
5371
5372 //==============================================================================
5373 // DEVSEL Bits
5374
5375 extern __at(0x0F95) __sfr DEVSEL;
5376
5377 typedef union
5378 {
5379 struct
5380 {
5381 unsigned DEVSEL0 : 1;
5382 unsigned DEVSEL1 : 1;
5383 unsigned DEVSEL2 : 1;
5384 unsigned : 1;
5385 unsigned : 1;
5386 unsigned : 1;
5387 unsigned : 1;
5388 unsigned : 1;
5389 };
5390
5391 struct
5392 {
5393 unsigned DEVSEL : 3;
5394 unsigned : 5;
5395 };
5396 } __DEVSELbits_t;
5397
5398 extern __at(0x0F95) volatile __DEVSELbits_t DEVSELbits;
5399
5400 #define _DEVSEL0 0x01
5401 #define _DEVSEL1 0x02
5402 #define _DEVSEL2 0x04
5403
5404 //==============================================================================
5405
5406
5407 //==============================================================================
5408 // ICDINSTL Bits
5409
5410 extern __at(0x0F96) __sfr ICDINSTL;
5411
5412 typedef struct
5413 {
5414 unsigned DBGIN0 : 1;
5415 unsigned DBGIN1 : 1;
5416 unsigned DBGIN2 : 1;
5417 unsigned DBGIN3 : 1;
5418 unsigned DBGIN4 : 1;
5419 unsigned DBGIN5 : 1;
5420 unsigned DBGIN6 : 1;
5421 unsigned DBGIN7 : 1;
5422 } __ICDINSTLbits_t;
5423
5424 extern __at(0x0F96) volatile __ICDINSTLbits_t ICDINSTLbits;
5425
5426 #define _DBGIN0 0x01
5427 #define _DBGIN1 0x02
5428 #define _DBGIN2 0x04
5429 #define _DBGIN3 0x08
5430 #define _DBGIN4 0x10
5431 #define _DBGIN5 0x20
5432 #define _DBGIN6 0x40
5433 #define _DBGIN7 0x80
5434
5435 //==============================================================================
5436
5437
5438 //==============================================================================
5439 // ICDINSTH Bits
5440
5441 extern __at(0x0F97) __sfr ICDINSTH;
5442
5443 typedef struct
5444 {
5445 unsigned DBGIN8 : 1;
5446 unsigned DBGIN9 : 1;
5447 unsigned DBGIN10 : 1;
5448 unsigned DBGIN11 : 1;
5449 unsigned DBGIN12 : 1;
5450 unsigned DBGIN13 : 1;
5451 unsigned : 1;
5452 unsigned : 1;
5453 } __ICDINSTHbits_t;
5454
5455 extern __at(0x0F97) volatile __ICDINSTHbits_t ICDINSTHbits;
5456
5457 #define _DBGIN8 0x01
5458 #define _DBGIN9 0x02
5459 #define _DBGIN10 0x04
5460 #define _DBGIN11 0x08
5461 #define _DBGIN12 0x10
5462 #define _DBGIN13 0x20
5463
5464 //==============================================================================
5465
5466
5467 //==============================================================================
5468 // ICDBK0CON Bits
5469
5470 extern __at(0x0F9C) __sfr ICDBK0CON;
5471
5472 typedef struct
5473 {
5474 unsigned BKHLT : 1;
5475 unsigned : 1;
5476 unsigned : 1;
5477 unsigned : 1;
5478 unsigned : 1;
5479 unsigned : 1;
5480 unsigned : 1;
5481 unsigned BKEN : 1;
5482 } __ICDBK0CONbits_t;
5483
5484 extern __at(0x0F9C) volatile __ICDBK0CONbits_t ICDBK0CONbits;
5485
5486 #define _BKHLT 0x01
5487 #define _BKEN 0x80
5488
5489 //==============================================================================
5490
5491
5492 //==============================================================================
5493 // ICDBK0L Bits
5494
5495 extern __at(0x0F9D) __sfr ICDBK0L;
5496
5497 typedef struct
5498 {
5499 unsigned BKA0 : 1;
5500 unsigned BKA1 : 1;
5501 unsigned BKA2 : 1;
5502 unsigned BKA3 : 1;
5503 unsigned BKA4 : 1;
5504 unsigned BKA5 : 1;
5505 unsigned BKA6 : 1;
5506 unsigned BKA7 : 1;
5507 } __ICDBK0Lbits_t;
5508
5509 extern __at(0x0F9D) volatile __ICDBK0Lbits_t ICDBK0Lbits;
5510
5511 #define _BKA0 0x01
5512 #define _BKA1 0x02
5513 #define _BKA2 0x04
5514 #define _BKA3 0x08
5515 #define _BKA4 0x10
5516 #define _BKA5 0x20
5517 #define _BKA6 0x40
5518 #define _BKA7 0x80
5519
5520 //==============================================================================
5521
5522
5523 //==============================================================================
5524 // ICDBK0H Bits
5525
5526 extern __at(0x0F9E) __sfr ICDBK0H;
5527
5528 typedef struct
5529 {
5530 unsigned BKA8 : 1;
5531 unsigned BKA9 : 1;
5532 unsigned BKA10 : 1;
5533 unsigned BKA11 : 1;
5534 unsigned BKA12 : 1;
5535 unsigned BKA13 : 1;
5536 unsigned BKA14 : 1;
5537 unsigned : 1;
5538 } __ICDBK0Hbits_t;
5539
5540 extern __at(0x0F9E) volatile __ICDBK0Hbits_t ICDBK0Hbits;
5541
5542 #define _BKA8 0x01
5543 #define _BKA9 0x02
5544 #define _BKA10 0x04
5545 #define _BKA11 0x08
5546 #define _BKA12 0x10
5547 #define _BKA13 0x20
5548 #define _BKA14 0x40
5549
5550 //==============================================================================
5551
5552 extern __at(0x0FE3) __sfr BSRICDSHAD;
5553
5554 //==============================================================================
5555 // STATUS_SHAD Bits
5556
5557 extern __at(0x0FE4) __sfr STATUS_SHAD;
5558
5559 typedef struct
5560 {
5561 unsigned C_SHAD : 1;
5562 unsigned DC_SHAD : 1;
5563 unsigned Z_SHAD : 1;
5564 unsigned : 1;
5565 unsigned : 1;
5566 unsigned : 1;
5567 unsigned : 1;
5568 unsigned : 1;
5569 } __STATUS_SHADbits_t;
5570
5571 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
5572
5573 #define _C_SHAD 0x01
5574 #define _DC_SHAD 0x02
5575 #define _Z_SHAD 0x04
5576
5577 //==============================================================================
5578
5579 extern __at(0x0FE5) __sfr WREG_SHAD;
5580 extern __at(0x0FE6) __sfr BSR_SHAD;
5581 extern __at(0x0FE7) __sfr PCLATH_SHAD;
5582 extern __at(0x0FE8) __sfr FSR0L_SHAD;
5583 extern __at(0x0FE9) __sfr FSR0H_SHAD;
5584 extern __at(0x0FEA) __sfr FSR1L_SHAD;
5585 extern __at(0x0FEB) __sfr FSR1H_SHAD;
5586 extern __at(0x0FED) __sfr STKPTR;
5587 extern __at(0x0FEE) __sfr TOSL;
5588 extern __at(0x0FEF) __sfr TOSH;
5589
5590 //==============================================================================
5591 //
5592 // Configuration Bits
5593 //
5594 //==============================================================================
5595
5596 #define _CONFIG1 0x8007
5597 #define _CONFIG2 0x8008
5598
5599 //----------------------------- CONFIG1 Options -------------------------------
5600
5601 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
5602 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
5603 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
5604 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
5605 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
5606 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
5607 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
5608 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
5609 #define _WDTE_OFF 0x3FE7 // WDT disabled.
5610 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
5611 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
5612 #define _WDTE_ON 0x3FFF // WDT enabled.
5613 #define _PWRTE_ON 0x3FDF // PWRT enabled.
5614 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
5615 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
5616 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
5617 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
5618 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
5619 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
5620 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
5621 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
5622 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
5623 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
5624 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
5625 #define _IESO_OFF 0x2FFF // Internal/External Switchover Mode is disabled.
5626 #define _IESO_ON 0x3FFF // Internal/External Switchover Mode is enabled.
5627 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
5628 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
5629
5630 //----------------------------- CONFIG2 Options -------------------------------
5631
5632 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control.
5633 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
5634 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control.
5635 #define _WRT_OFF 0x3FFF // Write protection off.
5636 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
5637 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
5638 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
5639 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
5640 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
5641 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
5642 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
5643 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
5644 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
5645 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
5646
5647 //==============================================================================
5648
5649 #define _DEVID1 0x8006
5650
5651 #define _IDLOC0 0x8000
5652 #define _IDLOC1 0x8001
5653 #define _IDLOC2 0x8002
5654 #define _IDLOC3 0x8003
5655
5656 //==============================================================================
5657
5658 #ifndef NO_BIT_DEFINES
5659
5660 #define ADON ADCON0bits.ADON // bit 0
5661 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
5662 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
5663 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
5664 #define CHS0 ADCON0bits.CHS0 // bit 2
5665 #define CHS1 ADCON0bits.CHS1 // bit 3
5666 #define CHS2 ADCON0bits.CHS2 // bit 4
5667 #define CHS3 ADCON0bits.CHS3 // bit 5
5668 #define CHS4 ADCON0bits.CHS4 // bit 6
5669
5670 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
5671 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
5672 #define ADFM ADCON1bits.ADFM // bit 7
5673
5674 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
5675 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
5676 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
5677 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
5678
5679 #define ANSA0 ANSELAbits.ANSA0 // bit 0
5680 #define ANSA1 ANSELAbits.ANSA1 // bit 1
5681 #define ANSA2 ANSELAbits.ANSA2 // bit 2
5682 #define ANSA4 ANSELAbits.ANSA4 // bit 4
5683
5684 #define ANSB4 ANSELBbits.ANSB4 // bit 4
5685 #define ANSB5 ANSELBbits.ANSB5 // bit 5
5686
5687 #define ANSC0 ANSELCbits.ANSC0 // bit 0
5688 #define ANSC1 ANSELCbits.ANSC1 // bit 1
5689 #define ANSC2 ANSELCbits.ANSC2 // bit 2
5690 #define ANSC3 ANSELCbits.ANSC3 // bit 3
5691 #define ANSC6 ANSELCbits.ANSC6 // bit 6
5692 #define ANSC7 ANSELCbits.ANSC7 // bit 7
5693
5694 #define NCO1SEL APFCONbits.NCO1SEL // bit 0, shadows bit in APFCONbits
5695 #define NCOSEL APFCONbits.NCOSEL // bit 0, shadows bit in APFCONbits
5696 #define CLC1SEL APFCONbits.CLC1SEL // bit 1
5697 #define T1GSEL APFCONbits.T1GSEL // bit 3
5698 #define SSSEL APFCONbits.SSSEL // bit 4
5699
5700 #define ABDEN BAUDCONbits.ABDEN // bit 0
5701 #define WUE BAUDCONbits.WUE // bit 1
5702 #define BRG16 BAUDCONbits.BRG16 // bit 3
5703 #define SCKP BAUDCONbits.SCKP // bit 4
5704 #define RCIDL BAUDCONbits.RCIDL // bit 6
5705 #define ABDOVF BAUDCONbits.ABDOVF // bit 7
5706
5707 #define BORRDY BORCONbits.BORRDY // bit 0
5708 #define BORFS BORCONbits.BORFS // bit 6
5709 #define SBOREN BORCONbits.SBOREN // bit 7
5710
5711 #define BSR0 BSRbits.BSR0 // bit 0
5712 #define BSR1 BSRbits.BSR1 // bit 1
5713 #define BSR2 BSRbits.BSR2 // bit 2
5714 #define BSR3 BSRbits.BSR3 // bit 3
5715 #define BSR4 BSRbits.BSR4 // bit 4
5716
5717 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits
5718 #define LCMODE0 CLC1CONbits.LCMODE0 // bit 0, shadows bit in CLC1CONbits
5719 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits
5720 #define LCMODE1 CLC1CONbits.LCMODE1 // bit 1, shadows bit in CLC1CONbits
5721 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits
5722 #define LCMODE2 CLC1CONbits.LCMODE2 // bit 2, shadows bit in CLC1CONbits
5723 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits
5724 #define LCINTN CLC1CONbits.LCINTN // bit 3, shadows bit in CLC1CONbits
5725 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits
5726 #define LCINTP CLC1CONbits.LCINTP // bit 4, shadows bit in CLC1CONbits
5727 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits
5728 #define LCOUT CLC1CONbits.LCOUT // bit 5, shadows bit in CLC1CONbits
5729 #define LC1OE CLC1CONbits.LC1OE // bit 6, shadows bit in CLC1CONbits
5730 #define LCOE CLC1CONbits.LCOE // bit 6, shadows bit in CLC1CONbits
5731 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits
5732 #define LCEN CLC1CONbits.LCEN // bit 7, shadows bit in CLC1CONbits
5733
5734 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
5735 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
5736 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
5737 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
5738 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
5739 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
5740 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
5741 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
5742 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
5743 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
5744 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
5745 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
5746 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
5747 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
5748 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
5749 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
5750
5751 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
5752 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
5753 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
5754 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
5755 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
5756 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
5757 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
5758 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
5759 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
5760 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
5761 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
5762 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
5763 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
5764 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
5765 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
5766 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
5767
5768 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
5769 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
5770 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
5771 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
5772 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
5773 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
5774 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
5775 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
5776 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
5777 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
5778
5779 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
5780 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
5781 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
5782 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
5783 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
5784 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
5785 #define LC1D2S0 CLC1SEL0bits.LC1D2S0 // bit 4, shadows bit in CLC1SEL0bits
5786 #define D2S0 CLC1SEL0bits.D2S0 // bit 4, shadows bit in CLC1SEL0bits
5787 #define LC1D2S1 CLC1SEL0bits.LC1D2S1 // bit 5, shadows bit in CLC1SEL0bits
5788 #define D2S1 CLC1SEL0bits.D2S1 // bit 5, shadows bit in CLC1SEL0bits
5789 #define LC1D2S2 CLC1SEL0bits.LC1D2S2 // bit 6, shadows bit in CLC1SEL0bits
5790 #define D2S2 CLC1SEL0bits.D2S2 // bit 6, shadows bit in CLC1SEL0bits
5791
5792 #define LC1D3S0 CLC1SEL1bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL1bits
5793 #define D3S0 CLC1SEL1bits.D3S0 // bit 0, shadows bit in CLC1SEL1bits
5794 #define LC1D3S1 CLC1SEL1bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL1bits
5795 #define D3S1 CLC1SEL1bits.D3S1 // bit 1, shadows bit in CLC1SEL1bits
5796 #define LC1D3S2 CLC1SEL1bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL1bits
5797 #define D3S2 CLC1SEL1bits.D3S2 // bit 2, shadows bit in CLC1SEL1bits
5798 #define LC1D4S0 CLC1SEL1bits.LC1D4S0 // bit 4, shadows bit in CLC1SEL1bits
5799 #define D4S0 CLC1SEL1bits.D4S0 // bit 4, shadows bit in CLC1SEL1bits
5800 #define LC1D4S1 CLC1SEL1bits.LC1D4S1 // bit 5, shadows bit in CLC1SEL1bits
5801 #define D4S1 CLC1SEL1bits.D4S1 // bit 5, shadows bit in CLC1SEL1bits
5802 #define LC1D4S2 CLC1SEL1bits.LC1D4S2 // bit 6, shadows bit in CLC1SEL1bits
5803 #define D4S2 CLC1SEL1bits.D4S2 // bit 6, shadows bit in CLC1SEL1bits
5804
5805 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0
5806 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1
5807 #define MCLC3OUT CLCDATAbits.MCLC3OUT // bit 2
5808 #define MCLC4OUT CLCDATAbits.MCLC4OUT // bit 3
5809
5810 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
5811 #define C1HYS CM1CON0bits.C1HYS // bit 1
5812 #define C1SP CM1CON0bits.C1SP // bit 2
5813 #define C1POL CM1CON0bits.C1POL // bit 4
5814 #define C1OE CM1CON0bits.C1OE // bit 5
5815 #define C1OUT CM1CON0bits.C1OUT // bit 6
5816 #define C1ON CM1CON0bits.C1ON // bit 7
5817
5818 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
5819 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
5820 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
5821 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
5822 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
5823 #define C1INTN CM1CON1bits.C1INTN // bit 6
5824 #define C1INTP CM1CON1bits.C1INTP // bit 7
5825
5826 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
5827 #define C2HYS CM2CON0bits.C2HYS // bit 1
5828 #define C2SP CM2CON0bits.C2SP // bit 2
5829 #define C2POL CM2CON0bits.C2POL // bit 4
5830 #define C2OE CM2CON0bits.C2OE // bit 5
5831 #define C2OUT CM2CON0bits.C2OUT // bit 6
5832 #define C2ON CM2CON0bits.C2ON // bit 7
5833
5834 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
5835 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
5836 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
5837 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4
5838 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5
5839 #define C2INTN CM2CON1bits.C2INTN // bit 6
5840 #define C2INTP CM2CON1bits.C2INTP // bit 7
5841
5842 #define MC1OUT CMOUTbits.MC1OUT // bit 0
5843 #define MC2OUT CMOUTbits.MC2OUT // bit 1
5844
5845 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
5846 #define G1POLA CWG1CON0bits.G1POLA // bit 3
5847 #define G1POLB CWG1CON0bits.G1POLB // bit 4
5848 #define G1OEA CWG1CON0bits.G1OEA // bit 5
5849 #define G1OEB CWG1CON0bits.G1OEB // bit 6
5850 #define G1EN CWG1CON0bits.G1EN // bit 7
5851
5852 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
5853 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
5854 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
5855 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
5856 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
5857 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
5858 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
5859
5860 #define G1ASDSCLC2 CWG1CON2bits.G1ASDSCLC2 // bit 0
5861 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1
5862 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
5863 #define G1ASDSC2 CWG1CON2bits.G1ASDSC2 // bit 3
5864 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
5865 #define G1ASE CWG1CON2bits.G1ASE // bit 7
5866
5867 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
5868 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
5869 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
5870 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
5871 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
5872 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
5873
5874 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
5875 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
5876 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
5877 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
5878 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
5879 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
5880
5881 #define DACPSS DACCON0bits.DACPSS // bit 2
5882 #define DACOE2 DACCON0bits.DACOE2 // bit 4
5883 #define DACOE1 DACCON0bits.DACOE1 // bit 5
5884 #define DACEN DACCON0bits.DACEN // bit 7
5885
5886 #define DACR0 DACCON1bits.DACR0 // bit 0
5887 #define DACR1 DACCON1bits.DACR1 // bit 1
5888 #define DACR2 DACCON1bits.DACR2 // bit 2
5889 #define DACR3 DACCON1bits.DACR3 // bit 3
5890 #define DACR4 DACCON1bits.DACR4 // bit 4
5891
5892 #define DEVSEL0 DEVSELbits.DEVSEL0 // bit 0
5893 #define DEVSEL1 DEVSELbits.DEVSEL1 // bit 1
5894 #define DEVSEL2 DEVSELbits.DEVSEL2 // bit 2
5895
5896 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
5897 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
5898 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
5899 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
5900 #define TSRNG FVRCONbits.TSRNG // bit 4
5901 #define TSEN FVRCONbits.TSEN // bit 5
5902 #define FVRRDY FVRCONbits.FVRRDY // bit 6
5903 #define FVREN FVRCONbits.FVREN // bit 7
5904
5905 #define BKHLT ICDBK0CONbits.BKHLT // bit 0
5906 #define BKEN ICDBK0CONbits.BKEN // bit 7
5907
5908 #define BKA8 ICDBK0Hbits.BKA8 // bit 0
5909 #define BKA9 ICDBK0Hbits.BKA9 // bit 1
5910 #define BKA10 ICDBK0Hbits.BKA10 // bit 2
5911 #define BKA11 ICDBK0Hbits.BKA11 // bit 3
5912 #define BKA12 ICDBK0Hbits.BKA12 // bit 4
5913 #define BKA13 ICDBK0Hbits.BKA13 // bit 5
5914 #define BKA14 ICDBK0Hbits.BKA14 // bit 6
5915
5916 #define BKA0 ICDBK0Lbits.BKA0 // bit 0
5917 #define BKA1 ICDBK0Lbits.BKA1 // bit 1
5918 #define BKA2 ICDBK0Lbits.BKA2 // bit 2
5919 #define BKA3 ICDBK0Lbits.BKA3 // bit 3
5920 #define BKA4 ICDBK0Lbits.BKA4 // bit 4
5921 #define BKA5 ICDBK0Lbits.BKA5 // bit 5
5922 #define BKA6 ICDBK0Lbits.BKA6 // bit 6
5923 #define BKA7 ICDBK0Lbits.BKA7 // bit 7
5924
5925 #define RSTVEC ICDCON0bits.RSTVEC // bit 0
5926 #define DBGINEX ICDCON0bits.DBGINEX // bit 3
5927 #define SSTEP ICDCON0bits.SSTEP // bit 5
5928 #define FREEZ ICDCON0bits.FREEZ // bit 6
5929 #define INBUG ICDCON0bits.INBUG // bit 7
5930
5931 #define DBGIN8 ICDINSTHbits.DBGIN8 // bit 0
5932 #define DBGIN9 ICDINSTHbits.DBGIN9 // bit 1
5933 #define DBGIN10 ICDINSTHbits.DBGIN10 // bit 2
5934 #define DBGIN11 ICDINSTHbits.DBGIN11 // bit 3
5935 #define DBGIN12 ICDINSTHbits.DBGIN12 // bit 4
5936 #define DBGIN13 ICDINSTHbits.DBGIN13 // bit 5
5937
5938 #define DBGIN0 ICDINSTLbits.DBGIN0 // bit 0
5939 #define DBGIN1 ICDINSTLbits.DBGIN1 // bit 1
5940 #define DBGIN2 ICDINSTLbits.DBGIN2 // bit 2
5941 #define DBGIN3 ICDINSTLbits.DBGIN3 // bit 3
5942 #define DBGIN4 ICDINSTLbits.DBGIN4 // bit 4
5943 #define DBGIN5 ICDINSTLbits.DBGIN5 // bit 5
5944 #define DBGIN6 ICDINSTLbits.DBGIN6 // bit 6
5945 #define DBGIN7 ICDINSTLbits.DBGIN7 // bit 7
5946
5947 #define TRIS_ICDCLK ICDIObits.TRIS_ICDCLK // bit 2
5948 #define TRIS_ICDDAT ICDIObits.TRIS_ICDDAT // bit 3
5949 #define LAT_ICDCLK ICDIObits.LAT_ICDCLK // bit 4
5950 #define LAT_ICDDAT ICDIObits.LAT_ICDDAT // bit 5
5951 #define PORT_ICDCLK ICDIObits.PORT_ICDCLK // bit 6
5952 #define PORT_ICDDAT ICDIObits.PORT_ICDDAT // bit 7
5953
5954 #define USRHLTF ICDSTATbits.USRHLTF // bit 1
5955 #define TRP0HLTF ICDSTATbits.TRP0HLTF // bit 6
5956 #define TRP1HLTF ICDSTATbits.TRP1HLTF // bit 7
5957
5958 #define IOCIF INTCONbits.IOCIF // bit 0
5959 #define INTF INTCONbits.INTF // bit 1
5960 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
5961 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
5962 #define IOCIE INTCONbits.IOCIE // bit 3
5963 #define INTE INTCONbits.INTE // bit 4
5964 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
5965 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
5966 #define PEIE INTCONbits.PEIE // bit 6
5967 #define GIE INTCONbits.GIE // bit 7
5968
5969 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
5970 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
5971 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
5972 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
5973 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
5974 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
5975
5976 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
5977 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
5978 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
5979 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
5980 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
5981 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
5982
5983 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
5984 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
5985 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
5986 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
5987 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
5988 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
5989
5990 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
5991 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
5992 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
5993 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
5994
5995 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
5996 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
5997 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
5998 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
5999
6000 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
6001 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
6002 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
6003 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
6004
6005 #define LATA0 LATAbits.LATA0 // bit 0
6006 #define LATA1 LATAbits.LATA1 // bit 1
6007 #define LATA2 LATAbits.LATA2 // bit 2
6008 #define LATA4 LATAbits.LATA4 // bit 4
6009 #define LATA5 LATAbits.LATA5 // bit 5
6010
6011 #define LATB4 LATBbits.LATB4 // bit 4
6012 #define LATB5 LATBbits.LATB5 // bit 5
6013 #define LATB6 LATBbits.LATB6 // bit 6
6014 #define LATB7 LATBbits.LATB7 // bit 7
6015
6016 #define LATC0 LATCbits.LATC0 // bit 0
6017 #define LATC1 LATCbits.LATC1 // bit 1
6018 #define LATC2 LATCbits.LATC2 // bit 2
6019 #define LATC3 LATCbits.LATC3 // bit 3
6020 #define LATC4 LATCbits.LATC4 // bit 4
6021 #define LATC5 LATCbits.LATC5 // bit 5
6022 #define LATC6 LATCbits.LATC6 // bit 6
6023 #define LATC7 LATCbits.LATC7 // bit 7
6024
6025 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
6026 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
6027 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
6028 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
6029 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
6030 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
6031 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
6032 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
6033
6034 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
6035 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
6036 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
6037 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
6038 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
6039 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
6040 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
6041 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
6042
6043 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
6044 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
6045 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
6046 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
6047
6048 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
6049 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
6050 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
6051 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
6052 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
6053
6054 #define N1PFM NCO1CONbits.N1PFM // bit 0
6055 #define N1POL NCO1CONbits.N1POL // bit 4
6056 #define N1OUT NCO1CONbits.N1OUT // bit 5
6057 #define N1OE NCO1CONbits.N1OE // bit 6
6058 #define N1EN NCO1CONbits.N1EN // bit 7
6059
6060 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
6061 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
6062 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
6063 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
6064 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
6065 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
6066 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
6067 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
6068
6069 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
6070 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
6071 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
6072 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
6073 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
6074 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
6075 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
6076 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
6077
6078 #define PS0 OPTION_REGbits.PS0 // bit 0
6079 #define PS1 OPTION_REGbits.PS1 // bit 1
6080 #define PS2 OPTION_REGbits.PS2 // bit 2
6081 #define PSA OPTION_REGbits.PSA // bit 3
6082 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
6083 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
6084 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
6085 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
6086 #define INTEDG OPTION_REGbits.INTEDG // bit 6
6087 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
6088
6089 #define SCS0 OSCCONbits.SCS0 // bit 0
6090 #define SCS1 OSCCONbits.SCS1 // bit 1
6091 #define IRCF0 OSCCONbits.IRCF0 // bit 3
6092 #define IRCF1 OSCCONbits.IRCF1 // bit 4
6093 #define IRCF2 OSCCONbits.IRCF2 // bit 5
6094 #define IRCF3 OSCCONbits.IRCF3 // bit 6
6095
6096 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
6097 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
6098 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
6099 #define OSTS OSCSTATbits.OSTS // bit 5
6100 #define SOSCR OSCSTATbits.SOSCR // bit 7
6101
6102 #define NOT_BOR PCONbits.NOT_BOR // bit 0
6103 #define NOT_POR PCONbits.NOT_POR // bit 1
6104 #define NOT_RI PCONbits.NOT_RI // bit 2
6105 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
6106 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
6107 #define STKUNF PCONbits.STKUNF // bit 6
6108 #define STKOVF PCONbits.STKOVF // bit 7
6109
6110 #define TMR1IE PIE1bits.TMR1IE // bit 0
6111 #define TMR2IE PIE1bits.TMR2IE // bit 1
6112 #define SSP1IE PIE1bits.SSP1IE // bit 3
6113 #define TXIE PIE1bits.TXIE // bit 4
6114 #define RCIE PIE1bits.RCIE // bit 5
6115 #define ADIE PIE1bits.ADIE // bit 6
6116 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
6117
6118 #define NCO1IE PIE2bits.NCO1IE // bit 2
6119 #define BCL1IE PIE2bits.BCL1IE // bit 3
6120 #define C1IE PIE2bits.C1IE // bit 5
6121 #define C2IE PIE2bits.C2IE // bit 6
6122 #define OSFIE PIE2bits.OSFIE // bit 7
6123
6124 #define CLC1IE PIE3bits.CLC1IE // bit 0
6125 #define CLC2IE PIE3bits.CLC2IE // bit 1
6126 #define CLC3IE PIE3bits.CLC3IE // bit 2
6127 #define CLC4IE PIE3bits.CLC4IE // bit 3
6128
6129 #define TMR1IF PIR1bits.TMR1IF // bit 0
6130 #define TMR2IF PIR1bits.TMR2IF // bit 1
6131 #define SSP1IF PIR1bits.SSP1IF // bit 3
6132 #define TXIF PIR1bits.TXIF // bit 4
6133 #define RCIF PIR1bits.RCIF // bit 5
6134 #define ADIF PIR1bits.ADIF // bit 6
6135 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
6136
6137 #define NCO1IF PIR2bits.NCO1IF // bit 2
6138 #define BCL1IF PIR2bits.BCL1IF // bit 3
6139 #define C1IF PIR2bits.C1IF // bit 5
6140 #define C2IF PIR2bits.C2IF // bit 6
6141 #define OSFIF PIR2bits.OSFIF // bit 7
6142
6143 #define CLC1IF PIR3bits.CLC1IF // bit 0
6144 #define CLC2IF PIR3bits.CLC2IF // bit 1
6145 #define CLC3IF PIR3bits.CLC3IF // bit 2
6146 #define CLC4IF PIR3bits.CLC4IF // bit 3
6147
6148 #define RD PMCON1bits.RD // bit 0
6149 #define WR PMCON1bits.WR // bit 1
6150 #define WREN PMCON1bits.WREN // bit 2
6151 #define WRERR PMCON1bits.WRERR // bit 3
6152 #define FREE PMCON1bits.FREE // bit 4
6153 #define LWLO PMCON1bits.LWLO // bit 5
6154 #define CFGS PMCON1bits.CFGS // bit 6
6155
6156 #define RA0 PORTAbits.RA0 // bit 0
6157 #define RA1 PORTAbits.RA1 // bit 1
6158 #define RA2 PORTAbits.RA2 // bit 2
6159 #define RA3 PORTAbits.RA3 // bit 3
6160 #define RA4 PORTAbits.RA4 // bit 4
6161 #define RA5 PORTAbits.RA5 // bit 5
6162
6163 #define RB4 PORTBbits.RB4 // bit 4
6164 #define RB5 PORTBbits.RB5 // bit 5
6165 #define RB6 PORTBbits.RB6 // bit 6
6166 #define RB7 PORTBbits.RB7 // bit 7
6167
6168 #define RC0 PORTCbits.RC0 // bit 0
6169 #define RC1 PORTCbits.RC1 // bit 1
6170 #define RC2 PORTCbits.RC2 // bit 2
6171 #define RC3 PORTCbits.RC3 // bit 3
6172 #define RC4 PORTCbits.RC4 // bit 4
6173 #define RC5 PORTCbits.RC5 // bit 5
6174 #define RC6 PORTCbits.RC6 // bit 6
6175 #define RC7 PORTCbits.RC7 // bit 7
6176
6177 #define PWM1POL PWM1CONbits.PWM1POL // bit 4
6178 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5
6179 #define PWM1OE PWM1CONbits.PWM1OE // bit 6
6180 #define PWM1EN PWM1CONbits.PWM1EN // bit 7
6181
6182 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
6183 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
6184 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
6185 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
6186 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
6187 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
6188 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
6189 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
6190
6191 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 6
6192 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 7
6193
6194 #define PWM2POL PWM2CONbits.PWM2POL // bit 4
6195 #define PWM2OUT PWM2CONbits.PWM2OUT // bit 5
6196 #define PWM2OE PWM2CONbits.PWM2OE // bit 6
6197 #define PWM2EN PWM2CONbits.PWM2EN // bit 7
6198
6199 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
6200 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
6201 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
6202 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
6203 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
6204 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
6205 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
6206 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
6207
6208 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 6
6209 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 7
6210
6211 #define PWM3POL PWM3CONbits.PWM3POL // bit 4
6212 #define PWM3OUT PWM3CONbits.PWM3OUT // bit 5
6213 #define PWM3OE PWM3CONbits.PWM3OE // bit 6
6214 #define PWM3EN PWM3CONbits.PWM3EN // bit 7
6215
6216 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
6217 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
6218 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
6219 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
6220 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
6221 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
6222 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
6223 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
6224
6225 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 6
6226 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 7
6227
6228 #define PWM4POL PWM4CONbits.PWM4POL // bit 4
6229 #define PWM4OUT PWM4CONbits.PWM4OUT // bit 5
6230 #define PWM4OE PWM4CONbits.PWM4OE // bit 6
6231 #define PWM4EN PWM4CONbits.PWM4EN // bit 7
6232
6233 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
6234 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
6235 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
6236 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
6237 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
6238 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
6239 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
6240 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
6241
6242 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 6
6243 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 7
6244
6245 #define RX9D RCSTAbits.RX9D // bit 0
6246 #define OERR RCSTAbits.OERR // bit 1
6247 #define FERR RCSTAbits.FERR // bit 2
6248 #define ADDEN RCSTAbits.ADDEN // bit 3
6249 #define CREN RCSTAbits.CREN // bit 4
6250 #define SREN RCSTAbits.SREN // bit 5
6251 #define RX9 RCSTAbits.RX9 // bit 6
6252 #define SPEN RCSTAbits.SPEN // bit 7
6253
6254 #define SSPM0 SSP1CON1bits.SSPM0 // bit 0
6255 #define SSPM1 SSP1CON1bits.SSPM1 // bit 1
6256 #define SSPM2 SSP1CON1bits.SSPM2 // bit 2
6257 #define SSPM3 SSP1CON1bits.SSPM3 // bit 3
6258 #define CKP SSP1CON1bits.CKP // bit 4
6259 #define SSPEN SSP1CON1bits.SSPEN // bit 5
6260 #define SSPOV SSP1CON1bits.SSPOV // bit 6
6261 #define WCOL SSP1CON1bits.WCOL // bit 7
6262
6263 #define SEN SSP1CON2bits.SEN // bit 0
6264 #define RSEN SSP1CON2bits.RSEN // bit 1
6265 #define PEN SSP1CON2bits.PEN // bit 2
6266 #define RCEN SSP1CON2bits.RCEN // bit 3
6267 #define ACKEN SSP1CON2bits.ACKEN // bit 4
6268 #define ACKDT SSP1CON2bits.ACKDT // bit 5
6269 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
6270 #define GCEN SSP1CON2bits.GCEN // bit 7
6271
6272 #define DHEN SSP1CON3bits.DHEN // bit 0
6273 #define AHEN SSP1CON3bits.AHEN // bit 1
6274 #define SBCDE SSP1CON3bits.SBCDE // bit 2
6275 #define SDAHT SSP1CON3bits.SDAHT // bit 3
6276 #define BOEN SSP1CON3bits.BOEN // bit 4
6277 #define SCIE SSP1CON3bits.SCIE // bit 5
6278 #define PCIE SSP1CON3bits.PCIE // bit 6
6279 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
6280
6281 #define BF SSP1STATbits.BF // bit 0
6282 #define UA SSP1STATbits.UA // bit 1
6283 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
6284 #define S SSP1STATbits.S // bit 3
6285 #define P SSP1STATbits.P // bit 4
6286 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
6287 #define CKE SSP1STATbits.CKE // bit 6
6288 #define SMP SSP1STATbits.SMP // bit 7
6289
6290 #define C STATUSbits.C // bit 0
6291 #define DC STATUSbits.DC // bit 1
6292 #define Z STATUSbits.Z // bit 2
6293 #define NOT_PD STATUSbits.NOT_PD // bit 3
6294 #define NOT_TO STATUSbits.NOT_TO // bit 4
6295
6296 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
6297 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
6298 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
6299
6300 #define TMR1ON T1CONbits.TMR1ON // bit 0
6301 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
6302 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
6303 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
6304 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
6305 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
6306 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
6307
6308 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
6309 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
6310 #define T1GVAL T1GCONbits.T1GVAL // bit 2
6311 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
6312 #define T1GSPM T1GCONbits.T1GSPM // bit 4
6313 #define T1GTM T1GCONbits.T1GTM // bit 5
6314 #define T1GPOL T1GCONbits.T1GPOL // bit 6
6315 #define TMR1GE T1GCONbits.TMR1GE // bit 7
6316
6317 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
6318 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
6319 #define TMR2ON T2CONbits.TMR2ON // bit 2
6320 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
6321 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
6322 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
6323 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
6324
6325 #define TRISA0 TRISAbits.TRISA0 // bit 0
6326 #define TRISA1 TRISAbits.TRISA1 // bit 1
6327 #define TRISA2 TRISAbits.TRISA2 // bit 2
6328 #define TRISA3 TRISAbits.TRISA3 // bit 3
6329 #define TRISA4 TRISAbits.TRISA4 // bit 4
6330 #define TRISA5 TRISAbits.TRISA5 // bit 5
6331
6332 #define TRISB4 TRISBbits.TRISB4 // bit 4
6333 #define TRISB5 TRISBbits.TRISB5 // bit 5
6334 #define TRISB6 TRISBbits.TRISB6 // bit 6
6335 #define TRISB7 TRISBbits.TRISB7 // bit 7
6336
6337 #define TRISC0 TRISCbits.TRISC0 // bit 0
6338 #define TRISC1 TRISCbits.TRISC1 // bit 1
6339 #define TRISC2 TRISCbits.TRISC2 // bit 2
6340 #define TRISC3 TRISCbits.TRISC3 // bit 3
6341 #define TRISC4 TRISCbits.TRISC4 // bit 4
6342 #define TRISC5 TRISCbits.TRISC5 // bit 5
6343 #define TRISC6 TRISCbits.TRISC6 // bit 6
6344 #define TRISC7 TRISCbits.TRISC7 // bit 7
6345
6346 #define TX9D TXSTAbits.TX9D // bit 0
6347 #define TRMT TXSTAbits.TRMT // bit 1
6348 #define BRGH TXSTAbits.BRGH // bit 2
6349 #define SENDB TXSTAbits.SENDB // bit 3
6350 #define SYNC TXSTAbits.SYNC // bit 4
6351 #define TXEN TXSTAbits.TXEN // bit 5
6352 #define TX9 TXSTAbits.TX9 // bit 6
6353 #define CSRC TXSTAbits.CSRC // bit 7
6354
6355 #define Reserved VREGCONbits.Reserved // bit 0
6356 #define VREGPM VREGCONbits.VREGPM // bit 1
6357
6358 #define SWDTEN WDTCONbits.SWDTEN // bit 0
6359 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
6360 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
6361 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
6362 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
6363 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
6364
6365 #define WPUA0 WPUAbits.WPUA0 // bit 0
6366 #define WPUA1 WPUAbits.WPUA1 // bit 1
6367 #define WPUA2 WPUAbits.WPUA2 // bit 2
6368 #define WPUA3 WPUAbits.WPUA3 // bit 3
6369 #define WPUA4 WPUAbits.WPUA4 // bit 4
6370 #define WPUA5 WPUAbits.WPUA5 // bit 5
6371
6372 #define WPUB4 WPUBbits.WPUB4 // bit 4
6373 #define WPUB5 WPUBbits.WPUB5 // bit 5
6374 #define WPUB6 WPUBbits.WPUB6 // bit 6
6375 #define WPUB7 WPUBbits.WPUB7 // bit 7
6376
6377 #endif // #ifndef NO_BIT_DEFINES
6378
6379 #endif // #ifndef __PIC16F1508_H__
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