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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16f1575.h
blob00be3fa7fdf07fda348e2c6772f5174ed7b8fcd4
1 /*
2 * This declarations of the PIC16F1575 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:08 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16F1575_H__
26 #define __PIC16F1575_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTC_ADDR 0x000E
52 #define PIR1_ADDR 0x0011
53 #define PIR2_ADDR 0x0012
54 #define PIR3_ADDR 0x0013
55 #define TMR0_ADDR 0x0015
56 #define TMR1_ADDR 0x0016
57 #define TMR1L_ADDR 0x0016
58 #define TMR1H_ADDR 0x0017
59 #define T1CON_ADDR 0x0018
60 #define T1GCON_ADDR 0x0019
61 #define TMR2_ADDR 0x001A
62 #define PR2_ADDR 0x001B
63 #define T2CON_ADDR 0x001C
64 #define TRISA_ADDR 0x008C
65 #define TRISC_ADDR 0x008E
66 #define PIE1_ADDR 0x0091
67 #define PIE2_ADDR 0x0092
68 #define PIE3_ADDR 0x0093
69 #define OPTION_REG_ADDR 0x0095
70 #define PCON_ADDR 0x0096
71 #define WDTCON_ADDR 0x0097
72 #define OSCTUNE_ADDR 0x0098
73 #define OSCCON_ADDR 0x0099
74 #define OSCSTAT_ADDR 0x009A
75 #define ADRES_ADDR 0x009B
76 #define ADRESL_ADDR 0x009B
77 #define ADRESH_ADDR 0x009C
78 #define ADCON0_ADDR 0x009D
79 #define ADCON1_ADDR 0x009E
80 #define ADCON2_ADDR 0x009F
81 #define LATA_ADDR 0x010C
82 #define LATC_ADDR 0x010E
83 #define CM1CON0_ADDR 0x0111
84 #define CM1CON1_ADDR 0x0112
85 #define CM2CON0_ADDR 0x0113
86 #define CM2CON1_ADDR 0x0114
87 #define CMOUT_ADDR 0x0115
88 #define BORCON_ADDR 0x0116
89 #define FVRCON_ADDR 0x0117
90 #define DACCON0_ADDR 0x0118
91 #define DACCON1_ADDR 0x0119
92 #define ANSELA_ADDR 0x018C
93 #define ANSELC_ADDR 0x018E
94 #define PMADR_ADDR 0x0191
95 #define PMADRL_ADDR 0x0191
96 #define PMADRH_ADDR 0x0192
97 #define PMDAT_ADDR 0x0193
98 #define PMDATL_ADDR 0x0193
99 #define PMDATH_ADDR 0x0194
100 #define PMCON1_ADDR 0x0195
101 #define PMCON2_ADDR 0x0196
102 #define VREGCON_ADDR 0x0197
103 #define RCREG_ADDR 0x0199
104 #define TXREG_ADDR 0x019A
105 #define SPBRG_ADDR 0x019B
106 #define SPBRGL_ADDR 0x019B
107 #define SPBRGH_ADDR 0x019C
108 #define RCSTA_ADDR 0x019D
109 #define TXSTA_ADDR 0x019E
110 #define BAUDCON_ADDR 0x019F
111 #define WPUA_ADDR 0x020C
112 #define WPUC_ADDR 0x020E
113 #define ODCONA_ADDR 0x028C
114 #define ODCONC_ADDR 0x028E
115 #define SLRCONA_ADDR 0x030C
116 #define SLRCONC_ADDR 0x030E
117 #define INLVLA_ADDR 0x038C
118 #define INLVLC_ADDR 0x038E
119 #define IOCAP_ADDR 0x0391
120 #define IOCAN_ADDR 0x0392
121 #define IOCAF_ADDR 0x0393
122 #define IOCCP_ADDR 0x0397
123 #define IOCCN_ADDR 0x0398
124 #define IOCCF_ADDR 0x0399
125 #define CWG1DBR_ADDR 0x0691
126 #define CWG1DBF_ADDR 0x0692
127 #define CWG1CON0_ADDR 0x0693
128 #define CWG1CON1_ADDR 0x0694
129 #define CWG1CON2_ADDR 0x0695
130 #define PWMEN_ADDR 0x0D8E
131 #define PWMLD_ADDR 0x0D8F
132 #define PWMOUT_ADDR 0x0D90
133 #define PWM1PH_ADDR 0x0D91
134 #define PWM1PHL_ADDR 0x0D91
135 #define PWM1PHH_ADDR 0x0D92
136 #define PWM1DC_ADDR 0x0D93
137 #define PWM1DCL_ADDR 0x0D93
138 #define PWM1DCH_ADDR 0x0D94
139 #define PWM1PR_ADDR 0x0D95
140 #define PWM1PRL_ADDR 0x0D95
141 #define PWM1PRH_ADDR 0x0D96
142 #define PWM1OF_ADDR 0x0D97
143 #define PWM1OFL_ADDR 0x0D97
144 #define PWM1OFH_ADDR 0x0D98
145 #define PWM1TMR_ADDR 0x0D99
146 #define PWM1TMRL_ADDR 0x0D99
147 #define PWM1TMRH_ADDR 0x0D9A
148 #define PWM1CON_ADDR 0x0D9B
149 #define PWM1INTCON_ADDR 0x0D9C
150 #define PWM1INTE_ADDR 0x0D9C
151 #define PWM1INTF_ADDR 0x0D9D
152 #define PWM1INTFLG_ADDR 0x0D9D
153 #define PWM1CLKCON_ADDR 0x0D9E
154 #define PWM1LDCON_ADDR 0x0D9F
155 #define PWM1OFCON_ADDR 0x0DA0
156 #define PWM2PH_ADDR 0x0DA1
157 #define PWM2PHL_ADDR 0x0DA1
158 #define PWM2PHH_ADDR 0x0DA2
159 #define PWM2DC_ADDR 0x0DA3
160 #define PWM2DCL_ADDR 0x0DA3
161 #define PWM2DCH_ADDR 0x0DA4
162 #define PWM2PR_ADDR 0x0DA5
163 #define PWM2PRL_ADDR 0x0DA5
164 #define PWM2PRH_ADDR 0x0DA6
165 #define PWM2OF_ADDR 0x0DA7
166 #define PWM2OFL_ADDR 0x0DA7
167 #define PWM2OFH_ADDR 0x0DA8
168 #define PWM2TMR_ADDR 0x0DA9
169 #define PWM2TMRL_ADDR 0x0DA9
170 #define PWM2TMRH_ADDR 0x0DAA
171 #define PWM2CON_ADDR 0x0DAB
172 #define PWM2INTCON_ADDR 0x0DAC
173 #define PWM2INTE_ADDR 0x0DAC
174 #define PWM2INTF_ADDR 0x0DAD
175 #define PWM2INTFLG_ADDR 0x0DAD
176 #define PWM2CLKCON_ADDR 0x0DAE
177 #define PWM2LDCON_ADDR 0x0DAF
178 #define PWM2OFCON_ADDR 0x0DB0
179 #define PWM3PH_ADDR 0x0DB1
180 #define PWM3PHL_ADDR 0x0DB1
181 #define PWM3PHH_ADDR 0x0DB2
182 #define PWM3DC_ADDR 0x0DB3
183 #define PWM3DCL_ADDR 0x0DB3
184 #define PWM3DCH_ADDR 0x0DB4
185 #define PWM3PR_ADDR 0x0DB5
186 #define PWM3PRL_ADDR 0x0DB5
187 #define PWM3PRH_ADDR 0x0DB6
188 #define PWM3OF_ADDR 0x0DB7
189 #define PWM3OFL_ADDR 0x0DB7
190 #define PWM3OFH_ADDR 0x0DB8
191 #define PWM3TMR_ADDR 0x0DB9
192 #define PWM3TMRL_ADDR 0x0DB9
193 #define PWM3TMRH_ADDR 0x0DBA
194 #define PWM3CON_ADDR 0x0DBB
195 #define PWM3INTCON_ADDR 0x0DBC
196 #define PWM3INTE_ADDR 0x0DBC
197 #define PWM3INTF_ADDR 0x0DBD
198 #define PWM3INTFLG_ADDR 0x0DBD
199 #define PWM3CLKCON_ADDR 0x0DBE
200 #define PWM3LDCON_ADDR 0x0DBF
201 #define PWM3OFCON_ADDR 0x0DC0
202 #define PWM4PH_ADDR 0x0DC1
203 #define PWM4PHL_ADDR 0x0DC1
204 #define PWM4PHH_ADDR 0x0DC2
205 #define PWM4DC_ADDR 0x0DC3
206 #define PWM4DCL_ADDR 0x0DC3
207 #define PWM4DCH_ADDR 0x0DC4
208 #define PWM4PR_ADDR 0x0DC5
209 #define PWM4PRL_ADDR 0x0DC5
210 #define PWM4PRH_ADDR 0x0DC6
211 #define PWM4OF_ADDR 0x0DC7
212 #define PWM4OFL_ADDR 0x0DC7
213 #define PWM4OFH_ADDR 0x0DC8
214 #define PWM4TMR_ADDR 0x0DC9
215 #define PWM4TMRL_ADDR 0x0DC9
216 #define PWM4TMRH_ADDR 0x0DCA
217 #define PWM4CON_ADDR 0x0DCB
218 #define PWM4INTCON_ADDR 0x0DCC
219 #define PWM4INTE_ADDR 0x0DCC
220 #define PWM4INTF_ADDR 0x0DCD
221 #define PWM4INTFLG_ADDR 0x0DCD
222 #define PWM4CLKCON_ADDR 0x0DCE
223 #define PWM4LDCON_ADDR 0x0DCF
224 #define PWM4OFCON_ADDR 0x0DD0
225 #define PPSLOCK_ADDR 0x0E0F
226 #define INTPPS_ADDR 0x0E10
227 #define T0CKIPPS_ADDR 0x0E11
228 #define T1CKIPPS_ADDR 0x0E12
229 #define T1GPPS_ADDR 0x0E13
230 #define CWG1INPPS_ADDR 0x0E14
231 #define RXPPS_ADDR 0x0E15
232 #define CKPPS_ADDR 0x0E16
233 #define ADCACTPPS_ADDR 0x0E17
234 #define RA0PPS_ADDR 0x0E90
235 #define RA1PPS_ADDR 0x0E91
236 #define RA2PPS_ADDR 0x0E92
237 #define RA4PPS_ADDR 0x0E94
238 #define RA5PPS_ADDR 0x0E95
239 #define RC0PPS_ADDR 0x0EA0
240 #define RC1PPS_ADDR 0x0EA1
241 #define RC2PPS_ADDR 0x0EA2
242 #define RC3PPS_ADDR 0x0EA3
243 #define RC4PPS_ADDR 0x0EA4
244 #define RC5PPS_ADDR 0x0EA5
245 #define STATUS_SHAD_ADDR 0x0FE4
246 #define WREG_SHAD_ADDR 0x0FE5
247 #define BSR_SHAD_ADDR 0x0FE6
248 #define PCLATH_SHAD_ADDR 0x0FE7
249 #define FSR0L_SHAD_ADDR 0x0FE8
250 #define FSR0_SHAD_ADDR 0x0FE8
251 #define FSR0H_SHAD_ADDR 0x0FE9
252 #define FSR1L_SHAD_ADDR 0x0FEA
253 #define FSR1_SHAD_ADDR 0x0FEA
254 #define FSR1H_SHAD_ADDR 0x0FEB
255 #define STKPTR_ADDR 0x0FED
256 #define TOS_ADDR 0x0FEE
257 #define TOSL_ADDR 0x0FEE
258 #define TOSH_ADDR 0x0FEF
259
260 #endif // #ifndef NO_ADDR_DEFINES
261
262 //==============================================================================
263 //
264 // Register Definitions
265 //
266 //==============================================================================
267
268 extern __at(0x0000) __sfr INDF0;
269 extern __at(0x0001) __sfr INDF1;
270 extern __at(0x0002) __sfr PCL;
271
272 //==============================================================================
273 // STATUS Bits
274
275 extern __at(0x0003) __sfr STATUS;
276
277 typedef struct
278 {
279 unsigned C : 1;
280 unsigned DC : 1;
281 unsigned Z : 1;
282 unsigned NOT_PD : 1;
283 unsigned NOT_TO : 1;
284 unsigned : 1;
285 unsigned : 1;
286 unsigned : 1;
287 } __STATUSbits_t;
288
289 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
290
291 #define _C 0x01
292 #define _DC 0x02
293 #define _Z 0x04
294 #define _NOT_PD 0x08
295 #define _NOT_TO 0x10
296
297 //==============================================================================
298
299 extern __at(0x0004) __sfr FSR0;
300 extern __at(0x0004) __sfr FSR0L;
301 extern __at(0x0005) __sfr FSR0H;
302 extern __at(0x0006) __sfr FSR1;
303 extern __at(0x0006) __sfr FSR1L;
304 extern __at(0x0007) __sfr FSR1H;
305
306 //==============================================================================
307 // BSR Bits
308
309 extern __at(0x0008) __sfr BSR;
310
311 typedef union
312 {
313 struct
314 {
315 unsigned BSR0 : 1;
316 unsigned BSR1 : 1;
317 unsigned BSR2 : 1;
318 unsigned BSR3 : 1;
319 unsigned BSR4 : 1;
320 unsigned : 1;
321 unsigned : 1;
322 unsigned : 1;
323 };
324
325 struct
326 {
327 unsigned BSR : 5;
328 unsigned : 3;
329 };
330 } __BSRbits_t;
331
332 extern __at(0x0008) volatile __BSRbits_t BSRbits;
333
334 #define _BSR0 0x01
335 #define _BSR1 0x02
336 #define _BSR2 0x04
337 #define _BSR3 0x08
338 #define _BSR4 0x10
339
340 //==============================================================================
341
342 extern __at(0x0009) __sfr WREG;
343 extern __at(0x000A) __sfr PCLATH;
344
345 //==============================================================================
346 // INTCON Bits
347
348 extern __at(0x000B) __sfr INTCON;
349
350 typedef union
351 {
352 struct
353 {
354 unsigned IOCIF : 1;
355 unsigned INTF : 1;
356 unsigned TMR0IF : 1;
357 unsigned IOCIE : 1;
358 unsigned INTE : 1;
359 unsigned TMR0IE : 1;
360 unsigned PEIE : 1;
361 unsigned GIE : 1;
362 };
363
364 struct
365 {
366 unsigned : 1;
367 unsigned : 1;
368 unsigned T0IF : 1;
369 unsigned : 1;
370 unsigned : 1;
371 unsigned T0IE : 1;
372 unsigned : 1;
373 unsigned : 1;
374 };
375 } __INTCONbits_t;
376
377 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
378
379 #define _IOCIF 0x01
380 #define _INTF 0x02
381 #define _TMR0IF 0x04
382 #define _T0IF 0x04
383 #define _IOCIE 0x08
384 #define _INTE 0x10
385 #define _TMR0IE 0x20
386 #define _T0IE 0x20
387 #define _PEIE 0x40
388 #define _GIE 0x80
389
390 //==============================================================================
391
392
393 //==============================================================================
394 // PORTA Bits
395
396 extern __at(0x000C) __sfr PORTA;
397
398 typedef union
399 {
400 struct
401 {
402 unsigned RA0 : 1;
403 unsigned RA1 : 1;
404 unsigned RA2 : 1;
405 unsigned RA3 : 1;
406 unsigned RA4 : 1;
407 unsigned RA5 : 1;
408 unsigned : 1;
409 unsigned : 1;
410 };
411
412 struct
413 {
414 unsigned RA : 6;
415 unsigned : 2;
416 };
417 } __PORTAbits_t;
418
419 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
420
421 #define _RA0 0x01
422 #define _RA1 0x02
423 #define _RA2 0x04
424 #define _RA3 0x08
425 #define _RA4 0x10
426 #define _RA5 0x20
427
428 //==============================================================================
429
430
431 //==============================================================================
432 // PORTC Bits
433
434 extern __at(0x000E) __sfr PORTC;
435
436 typedef union
437 {
438 struct
439 {
440 unsigned RC0 : 1;
441 unsigned RC1 : 1;
442 unsigned RC2 : 1;
443 unsigned RC3 : 1;
444 unsigned RC4 : 1;
445 unsigned RC5 : 1;
446 unsigned : 1;
447 unsigned : 1;
448 };
449
450 struct
451 {
452 unsigned RC : 6;
453 unsigned : 2;
454 };
455 } __PORTCbits_t;
456
457 extern __at(0x000E) volatile __PORTCbits_t PORTCbits;
458
459 #define _RC0 0x01
460 #define _RC1 0x02
461 #define _RC2 0x04
462 #define _RC3 0x08
463 #define _RC4 0x10
464 #define _RC5 0x20
465
466 //==============================================================================
467
468
469 //==============================================================================
470 // PIR1 Bits
471
472 extern __at(0x0011) __sfr PIR1;
473
474 typedef struct
475 {
476 unsigned TMR1IF : 1;
477 unsigned TMR2IF : 1;
478 unsigned : 1;
479 unsigned : 1;
480 unsigned TXIF : 1;
481 unsigned RCIF : 1;
482 unsigned ADIF : 1;
483 unsigned TMR1GIF : 1;
484 } __PIR1bits_t;
485
486 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
487
488 #define _TMR1IF 0x01
489 #define _TMR2IF 0x02
490 #define _TXIF 0x10
491 #define _RCIF 0x20
492 #define _ADIF 0x40
493 #define _TMR1GIF 0x80
494
495 //==============================================================================
496
497
498 //==============================================================================
499 // PIR2 Bits
500
501 extern __at(0x0012) __sfr PIR2;
502
503 typedef struct
504 {
505 unsigned : 1;
506 unsigned : 1;
507 unsigned : 1;
508 unsigned : 1;
509 unsigned : 1;
510 unsigned C1IF : 1;
511 unsigned C2IF : 1;
512 unsigned : 1;
513 } __PIR2bits_t;
514
515 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
516
517 #define _C1IF 0x20
518 #define _C2IF 0x40
519
520 //==============================================================================
521
522
523 //==============================================================================
524 // PIR3 Bits
525
526 extern __at(0x0013) __sfr PIR3;
527
528 typedef struct
529 {
530 unsigned : 1;
531 unsigned : 1;
532 unsigned : 1;
533 unsigned : 1;
534 unsigned PWM1IF : 1;
535 unsigned PWM2IF : 1;
536 unsigned PWM3IF : 1;
537 unsigned PWM4IF : 1;
538 } __PIR3bits_t;
539
540 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
541
542 #define _PWM1IF 0x10
543 #define _PWM2IF 0x20
544 #define _PWM3IF 0x40
545 #define _PWM4IF 0x80
546
547 //==============================================================================
548
549 extern __at(0x0015) __sfr TMR0;
550 extern __at(0x0016) __sfr TMR1;
551 extern __at(0x0016) __sfr TMR1L;
552 extern __at(0x0017) __sfr TMR1H;
553
554 //==============================================================================
555 // T1CON Bits
556
557 extern __at(0x0018) __sfr T1CON;
558
559 typedef union
560 {
561 struct
562 {
563 unsigned TMR1ON : 1;
564 unsigned : 1;
565 unsigned NOT_T1SYNC : 1;
566 unsigned T1OSCEN : 1;
567 unsigned T1CKPS0 : 1;
568 unsigned T1CKPS1 : 1;
569 unsigned TMR1CS0 : 1;
570 unsigned TMR1CS1 : 1;
571 };
572
573 struct
574 {
575 unsigned : 4;
576 unsigned T1CKPS : 2;
577 unsigned : 2;
578 };
579
580 struct
581 {
582 unsigned : 6;
583 unsigned TMR1CS : 2;
584 };
585 } __T1CONbits_t;
586
587 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
588
589 #define _TMR1ON 0x01
590 #define _NOT_T1SYNC 0x04
591 #define _T1OSCEN 0x08
592 #define _T1CKPS0 0x10
593 #define _T1CKPS1 0x20
594 #define _TMR1CS0 0x40
595 #define _TMR1CS1 0x80
596
597 //==============================================================================
598
599
600 //==============================================================================
601 // T1GCON Bits
602
603 extern __at(0x0019) __sfr T1GCON;
604
605 typedef union
606 {
607 struct
608 {
609 unsigned T1GSS0 : 1;
610 unsigned T1GSS1 : 1;
611 unsigned T1GVAL : 1;
612 unsigned T1GGO_NOT_DONE : 1;
613 unsigned T1GSPM : 1;
614 unsigned T1GTM : 1;
615 unsigned T1GPOL : 1;
616 unsigned TMR1GE : 1;
617 };
618
619 struct
620 {
621 unsigned : 1;
622 unsigned : 1;
623 unsigned : 1;
624 unsigned T1GGO : 1;
625 unsigned : 1;
626 unsigned : 1;
627 unsigned : 1;
628 unsigned : 1;
629 };
630
631 struct
632 {
633 unsigned T1GSS : 2;
634 unsigned : 6;
635 };
636 } __T1GCONbits_t;
637
638 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
639
640 #define _T1GSS0 0x01
641 #define _T1GSS1 0x02
642 #define _T1GVAL 0x04
643 #define _T1GGO_NOT_DONE 0x08
644 #define _T1GGO 0x08
645 #define _T1GSPM 0x10
646 #define _T1GTM 0x20
647 #define _T1GPOL 0x40
648 #define _TMR1GE 0x80
649
650 //==============================================================================
651
652 extern __at(0x001A) __sfr TMR2;
653 extern __at(0x001B) __sfr PR2;
654
655 //==============================================================================
656 // T2CON Bits
657
658 extern __at(0x001C) __sfr T2CON;
659
660 typedef union
661 {
662 struct
663 {
664 unsigned T2CKPS0 : 1;
665 unsigned T2CKPS1 : 1;
666 unsigned TMR2ON : 1;
667 unsigned T2OUTPS0 : 1;
668 unsigned T2OUTPS1 : 1;
669 unsigned T2OUTPS2 : 1;
670 unsigned T2OUTPS3 : 1;
671 unsigned : 1;
672 };
673
674 struct
675 {
676 unsigned T2CKPS : 2;
677 unsigned : 6;
678 };
679
680 struct
681 {
682 unsigned : 3;
683 unsigned T2OUTPS : 4;
684 unsigned : 1;
685 };
686 } __T2CONbits_t;
687
688 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
689
690 #define _T2CKPS0 0x01
691 #define _T2CKPS1 0x02
692 #define _TMR2ON 0x04
693 #define _T2OUTPS0 0x08
694 #define _T2OUTPS1 0x10
695 #define _T2OUTPS2 0x20
696 #define _T2OUTPS3 0x40
697
698 //==============================================================================
699
700
701 //==============================================================================
702 // TRISA Bits
703
704 extern __at(0x008C) __sfr TRISA;
705
706 typedef union
707 {
708 struct
709 {
710 unsigned TRISA0 : 1;
711 unsigned TRISA1 : 1;
712 unsigned TRISA2 : 1;
713 unsigned TRISA3 : 1;
714 unsigned TRISA4 : 1;
715 unsigned TRISA5 : 1;
716 unsigned : 1;
717 unsigned : 1;
718 };
719
720 struct
721 {
722 unsigned TRISA : 6;
723 unsigned : 2;
724 };
725 } __TRISAbits_t;
726
727 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
728
729 #define _TRISA0 0x01
730 #define _TRISA1 0x02
731 #define _TRISA2 0x04
732 #define _TRISA3 0x08
733 #define _TRISA4 0x10
734 #define _TRISA5 0x20
735
736 //==============================================================================
737
738
739 //==============================================================================
740 // TRISC Bits
741
742 extern __at(0x008E) __sfr TRISC;
743
744 typedef union
745 {
746 struct
747 {
748 unsigned TRISC0 : 1;
749 unsigned TRISC1 : 1;
750 unsigned TRISC2 : 1;
751 unsigned TRISC3 : 1;
752 unsigned TRISC4 : 1;
753 unsigned TRISC5 : 1;
754 unsigned : 1;
755 unsigned : 1;
756 };
757
758 struct
759 {
760 unsigned TRISC : 6;
761 unsigned : 2;
762 };
763 } __TRISCbits_t;
764
765 extern __at(0x008E) volatile __TRISCbits_t TRISCbits;
766
767 #define _TRISC0 0x01
768 #define _TRISC1 0x02
769 #define _TRISC2 0x04
770 #define _TRISC3 0x08
771 #define _TRISC4 0x10
772 #define _TRISC5 0x20
773
774 //==============================================================================
775
776
777 //==============================================================================
778 // PIE1 Bits
779
780 extern __at(0x0091) __sfr PIE1;
781
782 typedef struct
783 {
784 unsigned TMR1IE : 1;
785 unsigned TMR2IE : 1;
786 unsigned : 1;
787 unsigned : 1;
788 unsigned TXIE : 1;
789 unsigned RCIE : 1;
790 unsigned ADIE : 1;
791 unsigned TMR1GIE : 1;
792 } __PIE1bits_t;
793
794 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
795
796 #define _TMR1IE 0x01
797 #define _TMR2IE 0x02
798 #define _TXIE 0x10
799 #define _RCIE 0x20
800 #define _ADIE 0x40
801 #define _TMR1GIE 0x80
802
803 //==============================================================================
804
805
806 //==============================================================================
807 // PIE2 Bits
808
809 extern __at(0x0092) __sfr PIE2;
810
811 typedef struct
812 {
813 unsigned : 1;
814 unsigned : 1;
815 unsigned : 1;
816 unsigned : 1;
817 unsigned : 1;
818 unsigned C1IE : 1;
819 unsigned C2IE : 1;
820 unsigned : 1;
821 } __PIE2bits_t;
822
823 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
824
825 #define _C1IE 0x20
826 #define _C2IE 0x40
827
828 //==============================================================================
829
830
831 //==============================================================================
832 // PIE3 Bits
833
834 extern __at(0x0093) __sfr PIE3;
835
836 typedef struct
837 {
838 unsigned : 1;
839 unsigned : 1;
840 unsigned : 1;
841 unsigned : 1;
842 unsigned PWM1IE : 1;
843 unsigned PWM2IE : 1;
844 unsigned PWM3IE : 1;
845 unsigned PWM4IE : 1;
846 } __PIE3bits_t;
847
848 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
849
850 #define _PWM1IE 0x10
851 #define _PWM2IE 0x20
852 #define _PWM3IE 0x40
853 #define _PWM4IE 0x80
854
855 //==============================================================================
856
857
858 //==============================================================================
859 // OPTION_REG Bits
860
861 extern __at(0x0095) __sfr OPTION_REG;
862
863 typedef union
864 {
865 struct
866 {
867 unsigned PS0 : 1;
868 unsigned PS1 : 1;
869 unsigned PS2 : 1;
870 unsigned PSA : 1;
871 unsigned TMR0SE : 1;
872 unsigned TMR0CS : 1;
873 unsigned INTEDG : 1;
874 unsigned NOT_WPUEN : 1;
875 };
876
877 struct
878 {
879 unsigned : 1;
880 unsigned : 1;
881 unsigned : 1;
882 unsigned : 1;
883 unsigned T0SE : 1;
884 unsigned T0CS : 1;
885 unsigned : 1;
886 unsigned : 1;
887 };
888
889 struct
890 {
891 unsigned PS : 3;
892 unsigned : 5;
893 };
894 } __OPTION_REGbits_t;
895
896 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
897
898 #define _PS0 0x01
899 #define _PS1 0x02
900 #define _PS2 0x04
901 #define _PSA 0x08
902 #define _TMR0SE 0x10
903 #define _T0SE 0x10
904 #define _TMR0CS 0x20
905 #define _T0CS 0x20
906 #define _INTEDG 0x40
907 #define _NOT_WPUEN 0x80
908
909 //==============================================================================
910
911
912 //==============================================================================
913 // PCON Bits
914
915 extern __at(0x0096) __sfr PCON;
916
917 typedef struct
918 {
919 unsigned NOT_BOR : 1;
920 unsigned NOT_POR : 1;
921 unsigned NOT_RI : 1;
922 unsigned NOT_RMCLR : 1;
923 unsigned NOT_RWDT : 1;
924 unsigned : 1;
925 unsigned STKUNF : 1;
926 unsigned STKOVF : 1;
927 } __PCONbits_t;
928
929 extern __at(0x0096) volatile __PCONbits_t PCONbits;
930
931 #define _NOT_BOR 0x01
932 #define _NOT_POR 0x02
933 #define _NOT_RI 0x04
934 #define _NOT_RMCLR 0x08
935 #define _NOT_RWDT 0x10
936 #define _STKUNF 0x40
937 #define _STKOVF 0x80
938
939 //==============================================================================
940
941
942 //==============================================================================
943 // WDTCON Bits
944
945 extern __at(0x0097) __sfr WDTCON;
946
947 typedef union
948 {
949 struct
950 {
951 unsigned SWDTEN : 1;
952 unsigned WDTPS0 : 1;
953 unsigned WDTPS1 : 1;
954 unsigned WDTPS2 : 1;
955 unsigned WDTPS3 : 1;
956 unsigned WDTPS4 : 1;
957 unsigned : 1;
958 unsigned : 1;
959 };
960
961 struct
962 {
963 unsigned : 1;
964 unsigned WDTPS : 5;
965 unsigned : 2;
966 };
967 } __WDTCONbits_t;
968
969 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
970
971 #define _SWDTEN 0x01
972 #define _WDTPS0 0x02
973 #define _WDTPS1 0x04
974 #define _WDTPS2 0x08
975 #define _WDTPS3 0x10
976 #define _WDTPS4 0x20
977
978 //==============================================================================
979
980
981 //==============================================================================
982 // OSCTUNE Bits
983
984 extern __at(0x0098) __sfr OSCTUNE;
985
986 typedef union
987 {
988 struct
989 {
990 unsigned TUN0 : 1;
991 unsigned TUN1 : 1;
992 unsigned TUN2 : 1;
993 unsigned TUN3 : 1;
994 unsigned TUN4 : 1;
995 unsigned TUN5 : 1;
996 unsigned : 1;
997 unsigned : 1;
998 };
999
1000 struct
1001 {
1002 unsigned TUN : 6;
1003 unsigned : 2;
1004 };
1005 } __OSCTUNEbits_t;
1006
1007 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
1008
1009 #define _TUN0 0x01
1010 #define _TUN1 0x02
1011 #define _TUN2 0x04
1012 #define _TUN3 0x08
1013 #define _TUN4 0x10
1014 #define _TUN5 0x20
1015
1016 //==============================================================================
1017
1018
1019 //==============================================================================
1020 // OSCCON Bits
1021
1022 extern __at(0x0099) __sfr OSCCON;
1023
1024 typedef union
1025 {
1026 struct
1027 {
1028 unsigned SCS0 : 1;
1029 unsigned SCS1 : 1;
1030 unsigned : 1;
1031 unsigned IRCF0 : 1;
1032 unsigned IRCF1 : 1;
1033 unsigned IRCF2 : 1;
1034 unsigned IRCF3 : 1;
1035 unsigned SPLLEN : 1;
1036 };
1037
1038 struct
1039 {
1040 unsigned SCS : 2;
1041 unsigned : 6;
1042 };
1043
1044 struct
1045 {
1046 unsigned : 3;
1047 unsigned IRCF : 4;
1048 unsigned : 1;
1049 };
1050 } __OSCCONbits_t;
1051
1052 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
1053
1054 #define _SCS0 0x01
1055 #define _SCS1 0x02
1056 #define _IRCF0 0x08
1057 #define _IRCF1 0x10
1058 #define _IRCF2 0x20
1059 #define _IRCF3 0x40
1060 #define _SPLLEN 0x80
1061
1062 //==============================================================================
1063
1064
1065 //==============================================================================
1066 // OSCSTAT Bits
1067
1068 extern __at(0x009A) __sfr OSCSTAT;
1069
1070 typedef struct
1071 {
1072 unsigned HFIOFS : 1;
1073 unsigned LFIOFR : 1;
1074 unsigned MFIOFR : 1;
1075 unsigned HFIOFL : 1;
1076 unsigned HFIOFR : 1;
1077 unsigned OSTS : 1;
1078 unsigned PLLR : 1;
1079 unsigned : 1;
1080 } __OSCSTATbits_t;
1081
1082 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
1083
1084 #define _HFIOFS 0x01
1085 #define _LFIOFR 0x02
1086 #define _MFIOFR 0x04
1087 #define _HFIOFL 0x08
1088 #define _HFIOFR 0x10
1089 #define _OSTS 0x20
1090 #define _PLLR 0x40
1091
1092 //==============================================================================
1093
1094 extern __at(0x009B) __sfr ADRES;
1095 extern __at(0x009B) __sfr ADRESL;
1096 extern __at(0x009C) __sfr ADRESH;
1097
1098 //==============================================================================
1099 // ADCON0 Bits
1100
1101 extern __at(0x009D) __sfr ADCON0;
1102
1103 typedef union
1104 {
1105 struct
1106 {
1107 unsigned ADON : 1;
1108 unsigned GO_NOT_DONE : 1;
1109 unsigned CHS0 : 1;
1110 unsigned CHS1 : 1;
1111 unsigned CHS2 : 1;
1112 unsigned CHS3 : 1;
1113 unsigned CHS4 : 1;
1114 unsigned : 1;
1115 };
1116
1117 struct
1118 {
1119 unsigned : 1;
1120 unsigned ADGO : 1;
1121 unsigned : 1;
1122 unsigned : 1;
1123 unsigned : 1;
1124 unsigned : 1;
1125 unsigned : 1;
1126 unsigned : 1;
1127 };
1128
1129 struct
1130 {
1131 unsigned : 1;
1132 unsigned GO : 1;
1133 unsigned : 1;
1134 unsigned : 1;
1135 unsigned : 1;
1136 unsigned : 1;
1137 unsigned : 1;
1138 unsigned : 1;
1139 };
1140
1141 struct
1142 {
1143 unsigned : 1;
1144 unsigned NOT_DONE : 1;
1145 unsigned : 1;
1146 unsigned : 1;
1147 unsigned : 1;
1148 unsigned : 1;
1149 unsigned : 1;
1150 unsigned : 1;
1151 };
1152
1153 struct
1154 {
1155 unsigned : 2;
1156 unsigned CHS : 5;
1157 unsigned : 1;
1158 };
1159 } __ADCON0bits_t;
1160
1161 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
1162
1163 #define _ADON 0x01
1164 #define _GO_NOT_DONE 0x02
1165 #define _ADGO 0x02
1166 #define _GO 0x02
1167 #define _NOT_DONE 0x02
1168 #define _CHS0 0x04
1169 #define _CHS1 0x08
1170 #define _CHS2 0x10
1171 #define _CHS3 0x20
1172 #define _CHS4 0x40
1173
1174 //==============================================================================
1175
1176
1177 //==============================================================================
1178 // ADCON1 Bits
1179
1180 extern __at(0x009E) __sfr ADCON1;
1181
1182 typedef union
1183 {
1184 struct
1185 {
1186 unsigned ADPREF0 : 1;
1187 unsigned ADPREF1 : 1;
1188 unsigned : 1;
1189 unsigned : 1;
1190 unsigned ADCS0 : 1;
1191 unsigned ADCS1 : 1;
1192 unsigned ADCS2 : 1;
1193 unsigned ADFM : 1;
1194 };
1195
1196 struct
1197 {
1198 unsigned ADPREF : 2;
1199 unsigned : 6;
1200 };
1201
1202 struct
1203 {
1204 unsigned : 4;
1205 unsigned ADCS : 3;
1206 unsigned : 1;
1207 };
1208 } __ADCON1bits_t;
1209
1210 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1211
1212 #define _ADPREF0 0x01
1213 #define _ADPREF1 0x02
1214 #define _ADCS0 0x10
1215 #define _ADCS1 0x20
1216 #define _ADCS2 0x40
1217 #define _ADFM 0x80
1218
1219 //==============================================================================
1220
1221
1222 //==============================================================================
1223 // ADCON2 Bits
1224
1225 extern __at(0x009F) __sfr ADCON2;
1226
1227 typedef union
1228 {
1229 struct
1230 {
1231 unsigned : 1;
1232 unsigned : 1;
1233 unsigned : 1;
1234 unsigned : 1;
1235 unsigned TRIGSEL0 : 1;
1236 unsigned TRIGSEL1 : 1;
1237 unsigned TRIGSEL2 : 1;
1238 unsigned TRIGSEL3 : 1;
1239 };
1240
1241 struct
1242 {
1243 unsigned : 4;
1244 unsigned TRIGSEL : 4;
1245 };
1246 } __ADCON2bits_t;
1247
1248 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1249
1250 #define _TRIGSEL0 0x10
1251 #define _TRIGSEL1 0x20
1252 #define _TRIGSEL2 0x40
1253 #define _TRIGSEL3 0x80
1254
1255 //==============================================================================
1256
1257
1258 //==============================================================================
1259 // LATA Bits
1260
1261 extern __at(0x010C) __sfr LATA;
1262
1263 typedef struct
1264 {
1265 unsigned LATA0 : 1;
1266 unsigned LATA1 : 1;
1267 unsigned LATA2 : 1;
1268 unsigned : 1;
1269 unsigned LATA4 : 1;
1270 unsigned LATA5 : 1;
1271 unsigned : 1;
1272 unsigned : 1;
1273 } __LATAbits_t;
1274
1275 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1276
1277 #define _LATA0 0x01
1278 #define _LATA1 0x02
1279 #define _LATA2 0x04
1280 #define _LATA4 0x10
1281 #define _LATA5 0x20
1282
1283 //==============================================================================
1284
1285
1286 //==============================================================================
1287 // LATC Bits
1288
1289 extern __at(0x010E) __sfr LATC;
1290
1291 typedef union
1292 {
1293 struct
1294 {
1295 unsigned LATC0 : 1;
1296 unsigned LATC1 : 1;
1297 unsigned LATC2 : 1;
1298 unsigned LATC3 : 1;
1299 unsigned LATC4 : 1;
1300 unsigned LATC5 : 1;
1301 unsigned : 1;
1302 unsigned : 1;
1303 };
1304
1305 struct
1306 {
1307 unsigned LATC : 6;
1308 unsigned : 2;
1309 };
1310 } __LATCbits_t;
1311
1312 extern __at(0x010E) volatile __LATCbits_t LATCbits;
1313
1314 #define _LATC0 0x01
1315 #define _LATC1 0x02
1316 #define _LATC2 0x04
1317 #define _LATC3 0x08
1318 #define _LATC4 0x10
1319 #define _LATC5 0x20
1320
1321 //==============================================================================
1322
1323
1324 //==============================================================================
1325 // CM1CON0 Bits
1326
1327 extern __at(0x0111) __sfr CM1CON0;
1328
1329 typedef struct
1330 {
1331 unsigned C1SYNC : 1;
1332 unsigned C1HYS : 1;
1333 unsigned C1SP : 1;
1334 unsigned : 1;
1335 unsigned C1POL : 1;
1336 unsigned C1OE : 1;
1337 unsigned C1OUT : 1;
1338 unsigned C1ON : 1;
1339 } __CM1CON0bits_t;
1340
1341 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1342
1343 #define _C1SYNC 0x01
1344 #define _C1HYS 0x02
1345 #define _C1SP 0x04
1346 #define _C1POL 0x10
1347 #define _C1OE 0x20
1348 #define _C1OUT 0x40
1349 #define _C1ON 0x80
1350
1351 //==============================================================================
1352
1353
1354 //==============================================================================
1355 // CM1CON1 Bits
1356
1357 extern __at(0x0112) __sfr CM1CON1;
1358
1359 typedef union
1360 {
1361 struct
1362 {
1363 unsigned C1NCH0 : 1;
1364 unsigned C1NCH1 : 1;
1365 unsigned C1NCH2 : 1;
1366 unsigned : 1;
1367 unsigned C1PCH0 : 1;
1368 unsigned C1PCH1 : 1;
1369 unsigned C1INTN : 1;
1370 unsigned C1INTP : 1;
1371 };
1372
1373 struct
1374 {
1375 unsigned C1NCH : 3;
1376 unsigned : 5;
1377 };
1378
1379 struct
1380 {
1381 unsigned : 4;
1382 unsigned C1PCH : 2;
1383 unsigned : 2;
1384 };
1385 } __CM1CON1bits_t;
1386
1387 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1388
1389 #define _C1NCH0 0x01
1390 #define _C1NCH1 0x02
1391 #define _C1NCH2 0x04
1392 #define _C1PCH0 0x10
1393 #define _C1PCH1 0x20
1394 #define _C1INTN 0x40
1395 #define _C1INTP 0x80
1396
1397 //==============================================================================
1398
1399
1400 //==============================================================================
1401 // CM2CON0 Bits
1402
1403 extern __at(0x0113) __sfr CM2CON0;
1404
1405 typedef struct
1406 {
1407 unsigned C2SYNC : 1;
1408 unsigned C2HYS : 1;
1409 unsigned C2SP : 1;
1410 unsigned : 1;
1411 unsigned C2POL : 1;
1412 unsigned C2OE : 1;
1413 unsigned C2OUT : 1;
1414 unsigned C2ON : 1;
1415 } __CM2CON0bits_t;
1416
1417 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits;
1418
1419 #define _C2SYNC 0x01
1420 #define _C2HYS 0x02
1421 #define _C2SP 0x04
1422 #define _C2POL 0x10
1423 #define _C2OE 0x20
1424 #define _C2OUT 0x40
1425 #define _C2ON 0x80
1426
1427 //==============================================================================
1428
1429
1430 //==============================================================================
1431 // CM2CON1 Bits
1432
1433 extern __at(0x0114) __sfr CM2CON1;
1434
1435 typedef union
1436 {
1437 struct
1438 {
1439 unsigned C2NCH0 : 1;
1440 unsigned C2NCH1 : 1;
1441 unsigned C2NCH2 : 1;
1442 unsigned : 1;
1443 unsigned C2PCH0 : 1;
1444 unsigned C2PCH1 : 1;
1445 unsigned C2INTN : 1;
1446 unsigned C2INTP : 1;
1447 };
1448
1449 struct
1450 {
1451 unsigned C2NCH : 3;
1452 unsigned : 5;
1453 };
1454
1455 struct
1456 {
1457 unsigned : 4;
1458 unsigned C2PCH : 2;
1459 unsigned : 2;
1460 };
1461 } __CM2CON1bits_t;
1462
1463 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits;
1464
1465 #define _C2NCH0 0x01
1466 #define _C2NCH1 0x02
1467 #define _C2NCH2 0x04
1468 #define _C2PCH0 0x10
1469 #define _C2PCH1 0x20
1470 #define _C2INTN 0x40
1471 #define _C2INTP 0x80
1472
1473 //==============================================================================
1474
1475
1476 //==============================================================================
1477 // CMOUT Bits
1478
1479 extern __at(0x0115) __sfr CMOUT;
1480
1481 typedef struct
1482 {
1483 unsigned MC1OUT : 1;
1484 unsigned MC2OUT : 1;
1485 unsigned : 1;
1486 unsigned : 1;
1487 unsigned : 1;
1488 unsigned : 1;
1489 unsigned : 1;
1490 unsigned : 1;
1491 } __CMOUTbits_t;
1492
1493 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1494
1495 #define _MC1OUT 0x01
1496 #define _MC2OUT 0x02
1497
1498 //==============================================================================
1499
1500
1501 //==============================================================================
1502 // BORCON Bits
1503
1504 extern __at(0x0116) __sfr BORCON;
1505
1506 typedef struct
1507 {
1508 unsigned BORRDY : 1;
1509 unsigned : 1;
1510 unsigned : 1;
1511 unsigned : 1;
1512 unsigned : 1;
1513 unsigned : 1;
1514 unsigned BORFS : 1;
1515 unsigned SBOREN : 1;
1516 } __BORCONbits_t;
1517
1518 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1519
1520 #define _BORRDY 0x01
1521 #define _BORFS 0x40
1522 #define _SBOREN 0x80
1523
1524 //==============================================================================
1525
1526
1527 //==============================================================================
1528 // FVRCON Bits
1529
1530 extern __at(0x0117) __sfr FVRCON;
1531
1532 typedef union
1533 {
1534 struct
1535 {
1536 unsigned ADFVR0 : 1;
1537 unsigned ADFVR1 : 1;
1538 unsigned CDAFVR0 : 1;
1539 unsigned CDAFVR1 : 1;
1540 unsigned TSRNG : 1;
1541 unsigned TSEN : 1;
1542 unsigned FVRRDY : 1;
1543 unsigned FVREN : 1;
1544 };
1545
1546 struct
1547 {
1548 unsigned ADFVR : 2;
1549 unsigned : 6;
1550 };
1551
1552 struct
1553 {
1554 unsigned : 2;
1555 unsigned CDAFVR : 2;
1556 unsigned : 4;
1557 };
1558 } __FVRCONbits_t;
1559
1560 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1561
1562 #define _ADFVR0 0x01
1563 #define _ADFVR1 0x02
1564 #define _CDAFVR0 0x04
1565 #define _CDAFVR1 0x08
1566 #define _TSRNG 0x10
1567 #define _TSEN 0x20
1568 #define _FVRRDY 0x40
1569 #define _FVREN 0x80
1570
1571 //==============================================================================
1572
1573
1574 //==============================================================================
1575 // DACCON0 Bits
1576
1577 extern __at(0x0118) __sfr DACCON0;
1578
1579 typedef union
1580 {
1581 struct
1582 {
1583 unsigned : 1;
1584 unsigned : 1;
1585 unsigned DACPSS0 : 1;
1586 unsigned DACPSS1 : 1;
1587 unsigned : 1;
1588 unsigned DACOE : 1;
1589 unsigned DACLPS : 1;
1590 unsigned DACEN : 1;
1591 };
1592
1593 struct
1594 {
1595 unsigned : 2;
1596 unsigned DACPSS : 2;
1597 unsigned : 4;
1598 };
1599 } __DACCON0bits_t;
1600
1601 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1602
1603 #define _DACPSS0 0x04
1604 #define _DACPSS1 0x08
1605 #define _DACOE 0x20
1606 #define _DACLPS 0x40
1607 #define _DACEN 0x80
1608
1609 //==============================================================================
1610
1611
1612 //==============================================================================
1613 // DACCON1 Bits
1614
1615 extern __at(0x0119) __sfr DACCON1;
1616
1617 typedef union
1618 {
1619 struct
1620 {
1621 unsigned DACR0 : 1;
1622 unsigned DACR1 : 1;
1623 unsigned DACR2 : 1;
1624 unsigned DACR3 : 1;
1625 unsigned DACR4 : 1;
1626 unsigned : 1;
1627 unsigned : 1;
1628 unsigned : 1;
1629 };
1630
1631 struct
1632 {
1633 unsigned DACR : 5;
1634 unsigned : 3;
1635 };
1636 } __DACCON1bits_t;
1637
1638 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1639
1640 #define _DACR0 0x01
1641 #define _DACR1 0x02
1642 #define _DACR2 0x04
1643 #define _DACR3 0x08
1644 #define _DACR4 0x10
1645
1646 //==============================================================================
1647
1648
1649 //==============================================================================
1650 // ANSELA Bits
1651
1652 extern __at(0x018C) __sfr ANSELA;
1653
1654 typedef struct
1655 {
1656 unsigned ANSA0 : 1;
1657 unsigned ANSA1 : 1;
1658 unsigned ANSA2 : 1;
1659 unsigned : 1;
1660 unsigned ANSA4 : 1;
1661 unsigned : 1;
1662 unsigned : 1;
1663 unsigned : 1;
1664 } __ANSELAbits_t;
1665
1666 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1667
1668 #define _ANSA0 0x01
1669 #define _ANSA1 0x02
1670 #define _ANSA2 0x04
1671 #define _ANSA4 0x10
1672
1673 //==============================================================================
1674
1675
1676 //==============================================================================
1677 // ANSELC Bits
1678
1679 extern __at(0x018E) __sfr ANSELC;
1680
1681 typedef union
1682 {
1683 struct
1684 {
1685 unsigned ANSC0 : 1;
1686 unsigned ANSC1 : 1;
1687 unsigned ANSC2 : 1;
1688 unsigned ANSC3 : 1;
1689 unsigned : 1;
1690 unsigned : 1;
1691 unsigned : 1;
1692 unsigned : 1;
1693 };
1694
1695 struct
1696 {
1697 unsigned ANSC : 4;
1698 unsigned : 4;
1699 };
1700 } __ANSELCbits_t;
1701
1702 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
1703
1704 #define _ANSC0 0x01
1705 #define _ANSC1 0x02
1706 #define _ANSC2 0x04
1707 #define _ANSC3 0x08
1708
1709 //==============================================================================
1710
1711 extern __at(0x0191) __sfr PMADR;
1712 extern __at(0x0191) __sfr PMADRL;
1713 extern __at(0x0192) __sfr PMADRH;
1714 extern __at(0x0193) __sfr PMDAT;
1715 extern __at(0x0193) __sfr PMDATL;
1716 extern __at(0x0194) __sfr PMDATH;
1717
1718 //==============================================================================
1719 // PMCON1 Bits
1720
1721 extern __at(0x0195) __sfr PMCON1;
1722
1723 typedef struct
1724 {
1725 unsigned RD : 1;
1726 unsigned WR : 1;
1727 unsigned WREN : 1;
1728 unsigned WRERR : 1;
1729 unsigned FREE : 1;
1730 unsigned LWLO : 1;
1731 unsigned CFGS : 1;
1732 unsigned : 1;
1733 } __PMCON1bits_t;
1734
1735 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1736
1737 #define _RD 0x01
1738 #define _WR 0x02
1739 #define _WREN 0x04
1740 #define _WRERR 0x08
1741 #define _FREE 0x10
1742 #define _LWLO 0x20
1743 #define _CFGS 0x40
1744
1745 //==============================================================================
1746
1747 extern __at(0x0196) __sfr PMCON2;
1748
1749 //==============================================================================
1750 // VREGCON Bits
1751
1752 extern __at(0x0197) __sfr VREGCON;
1753
1754 typedef struct
1755 {
1756 unsigned Reserved : 1;
1757 unsigned VREGPM : 1;
1758 unsigned : 1;
1759 unsigned : 1;
1760 unsigned : 1;
1761 unsigned : 1;
1762 unsigned : 1;
1763 unsigned : 1;
1764 } __VREGCONbits_t;
1765
1766 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
1767
1768 #define _Reserved 0x01
1769 #define _VREGPM 0x02
1770
1771 //==============================================================================
1772
1773 extern __at(0x0199) __sfr RCREG;
1774 extern __at(0x019A) __sfr TXREG;
1775 extern __at(0x019B) __sfr SPBRG;
1776 extern __at(0x019B) __sfr SPBRGL;
1777 extern __at(0x019C) __sfr SPBRGH;
1778
1779 //==============================================================================
1780 // RCSTA Bits
1781
1782 extern __at(0x019D) __sfr RCSTA;
1783
1784 typedef struct
1785 {
1786 unsigned RX9D : 1;
1787 unsigned OERR : 1;
1788 unsigned FERR : 1;
1789 unsigned ADDEN : 1;
1790 unsigned CREN : 1;
1791 unsigned SREN : 1;
1792 unsigned RX9 : 1;
1793 unsigned SPEN : 1;
1794 } __RCSTAbits_t;
1795
1796 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
1797
1798 #define _RX9D 0x01
1799 #define _OERR 0x02
1800 #define _FERR 0x04
1801 #define _ADDEN 0x08
1802 #define _CREN 0x10
1803 #define _SREN 0x20
1804 #define _RX9 0x40
1805 #define _SPEN 0x80
1806
1807 //==============================================================================
1808
1809
1810 //==============================================================================
1811 // TXSTA Bits
1812
1813 extern __at(0x019E) __sfr TXSTA;
1814
1815 typedef struct
1816 {
1817 unsigned TX9D : 1;
1818 unsigned TRMT : 1;
1819 unsigned BRGH : 1;
1820 unsigned SENDB : 1;
1821 unsigned SYNC : 1;
1822 unsigned TXEN : 1;
1823 unsigned TX9 : 1;
1824 unsigned CSRC : 1;
1825 } __TXSTAbits_t;
1826
1827 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
1828
1829 #define _TX9D 0x01
1830 #define _TRMT 0x02
1831 #define _BRGH 0x04
1832 #define _SENDB 0x08
1833 #define _SYNC 0x10
1834 #define _TXEN 0x20
1835 #define _TX9 0x40
1836 #define _CSRC 0x80
1837
1838 //==============================================================================
1839
1840
1841 //==============================================================================
1842 // BAUDCON Bits
1843
1844 extern __at(0x019F) __sfr BAUDCON;
1845
1846 typedef struct
1847 {
1848 unsigned ABDEN : 1;
1849 unsigned WUE : 1;
1850 unsigned : 1;
1851 unsigned BRG16 : 1;
1852 unsigned SCKP : 1;
1853 unsigned : 1;
1854 unsigned RCIDL : 1;
1855 unsigned ABDOVF : 1;
1856 } __BAUDCONbits_t;
1857
1858 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
1859
1860 #define _ABDEN 0x01
1861 #define _WUE 0x02
1862 #define _BRG16 0x08
1863 #define _SCKP 0x10
1864 #define _RCIDL 0x40
1865 #define _ABDOVF 0x80
1866
1867 //==============================================================================
1868
1869
1870 //==============================================================================
1871 // WPUA Bits
1872
1873 extern __at(0x020C) __sfr WPUA;
1874
1875 typedef union
1876 {
1877 struct
1878 {
1879 unsigned WPUA0 : 1;
1880 unsigned WPUA1 : 1;
1881 unsigned WPUA2 : 1;
1882 unsigned WPUA3 : 1;
1883 unsigned WPUA4 : 1;
1884 unsigned WPUA5 : 1;
1885 unsigned : 1;
1886 unsigned : 1;
1887 };
1888
1889 struct
1890 {
1891 unsigned WPUA : 6;
1892 unsigned : 2;
1893 };
1894 } __WPUAbits_t;
1895
1896 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1897
1898 #define _WPUA0 0x01
1899 #define _WPUA1 0x02
1900 #define _WPUA2 0x04
1901 #define _WPUA3 0x08
1902 #define _WPUA4 0x10
1903 #define _WPUA5 0x20
1904
1905 //==============================================================================
1906
1907
1908 //==============================================================================
1909 // WPUC Bits
1910
1911 extern __at(0x020E) __sfr WPUC;
1912
1913 typedef union
1914 {
1915 struct
1916 {
1917 unsigned WPUC0 : 1;
1918 unsigned WPUC1 : 1;
1919 unsigned WPUC2 : 1;
1920 unsigned WPUC3 : 1;
1921 unsigned WPUC4 : 1;
1922 unsigned WPUC5 : 1;
1923 unsigned : 1;
1924 unsigned : 1;
1925 };
1926
1927 struct
1928 {
1929 unsigned WPUC : 6;
1930 unsigned : 2;
1931 };
1932 } __WPUCbits_t;
1933
1934 extern __at(0x020E) volatile __WPUCbits_t WPUCbits;
1935
1936 #define _WPUC0 0x01
1937 #define _WPUC1 0x02
1938 #define _WPUC2 0x04
1939 #define _WPUC3 0x08
1940 #define _WPUC4 0x10
1941 #define _WPUC5 0x20
1942
1943 //==============================================================================
1944
1945
1946 //==============================================================================
1947 // ODCONA Bits
1948
1949 extern __at(0x028C) __sfr ODCONA;
1950
1951 typedef struct
1952 {
1953 unsigned ODA0 : 1;
1954 unsigned ODA1 : 1;
1955 unsigned ODA2 : 1;
1956 unsigned : 1;
1957 unsigned ODA4 : 1;
1958 unsigned ODA5 : 1;
1959 unsigned : 1;
1960 unsigned : 1;
1961 } __ODCONAbits_t;
1962
1963 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits;
1964
1965 #define _ODA0 0x01
1966 #define _ODA1 0x02
1967 #define _ODA2 0x04
1968 #define _ODA4 0x10
1969 #define _ODA5 0x20
1970
1971 //==============================================================================
1972
1973
1974 //==============================================================================
1975 // ODCONC Bits
1976
1977 extern __at(0x028E) __sfr ODCONC;
1978
1979 typedef union
1980 {
1981 struct
1982 {
1983 unsigned ODC0 : 1;
1984 unsigned ODC1 : 1;
1985 unsigned ODC2 : 1;
1986 unsigned ODC3 : 1;
1987 unsigned ODC4 : 1;
1988 unsigned ODC5 : 1;
1989 unsigned : 1;
1990 unsigned : 1;
1991 };
1992
1993 struct
1994 {
1995 unsigned ODC : 6;
1996 unsigned : 2;
1997 };
1998 } __ODCONCbits_t;
1999
2000 extern __at(0x028E) volatile __ODCONCbits_t ODCONCbits;
2001
2002 #define _ODC0 0x01
2003 #define _ODC1 0x02
2004 #define _ODC2 0x04
2005 #define _ODC3 0x08
2006 #define _ODC4 0x10
2007 #define _ODC5 0x20
2008
2009 //==============================================================================
2010
2011
2012 //==============================================================================
2013 // SLRCONA Bits
2014
2015 extern __at(0x030C) __sfr SLRCONA;
2016
2017 typedef struct
2018 {
2019 unsigned SLRA0 : 1;
2020 unsigned SLRA1 : 1;
2021 unsigned SLRA2 : 1;
2022 unsigned : 1;
2023 unsigned SLRA4 : 1;
2024 unsigned SLRA5 : 1;
2025 unsigned : 1;
2026 unsigned : 1;
2027 } __SLRCONAbits_t;
2028
2029 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits;
2030
2031 #define _SLRA0 0x01
2032 #define _SLRA1 0x02
2033 #define _SLRA2 0x04
2034 #define _SLRA4 0x10
2035 #define _SLRA5 0x20
2036
2037 //==============================================================================
2038
2039
2040 //==============================================================================
2041 // SLRCONC Bits
2042
2043 extern __at(0x030E) __sfr SLRCONC;
2044
2045 typedef union
2046 {
2047 struct
2048 {
2049 unsigned SLRC0 : 1;
2050 unsigned SLRC1 : 1;
2051 unsigned SLRC2 : 1;
2052 unsigned SLRC3 : 1;
2053 unsigned SLRC4 : 1;
2054 unsigned SLRC5 : 1;
2055 unsigned : 1;
2056 unsigned : 1;
2057 };
2058
2059 struct
2060 {
2061 unsigned SLRC : 6;
2062 unsigned : 2;
2063 };
2064 } __SLRCONCbits_t;
2065
2066 extern __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits;
2067
2068 #define _SLRC0 0x01
2069 #define _SLRC1 0x02
2070 #define _SLRC2 0x04
2071 #define _SLRC3 0x08
2072 #define _SLRC4 0x10
2073 #define _SLRC5 0x20
2074
2075 //==============================================================================
2076
2077
2078 //==============================================================================
2079 // INLVLA Bits
2080
2081 extern __at(0x038C) __sfr INLVLA;
2082
2083 typedef union
2084 {
2085 struct
2086 {
2087 unsigned INLVLA0 : 1;
2088 unsigned INLVLA1 : 1;
2089 unsigned INLVLA2 : 1;
2090 unsigned INLVLA3 : 1;
2091 unsigned INLVLA4 : 1;
2092 unsigned INLVLA5 : 1;
2093 unsigned : 1;
2094 unsigned : 1;
2095 };
2096
2097 struct
2098 {
2099 unsigned INLVLA : 6;
2100 unsigned : 2;
2101 };
2102 } __INLVLAbits_t;
2103
2104 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits;
2105
2106 #define _INLVLA0 0x01
2107 #define _INLVLA1 0x02
2108 #define _INLVLA2 0x04
2109 #define _INLVLA3 0x08
2110 #define _INLVLA4 0x10
2111 #define _INLVLA5 0x20
2112
2113 //==============================================================================
2114
2115
2116 //==============================================================================
2117 // INLVLC Bits
2118
2119 extern __at(0x038E) __sfr INLVLC;
2120
2121 typedef union
2122 {
2123 struct
2124 {
2125 unsigned INLVLC0 : 1;
2126 unsigned INLVLC1 : 1;
2127 unsigned INLVLC2 : 1;
2128 unsigned INLVLC3 : 1;
2129 unsigned INLVLC4 : 1;
2130 unsigned INLVLC5 : 1;
2131 unsigned : 1;
2132 unsigned : 1;
2133 };
2134
2135 struct
2136 {
2137 unsigned INLVLC : 6;
2138 unsigned : 2;
2139 };
2140 } __INLVLCbits_t;
2141
2142 extern __at(0x038E) volatile __INLVLCbits_t INLVLCbits;
2143
2144 #define _INLVLC0 0x01
2145 #define _INLVLC1 0x02
2146 #define _INLVLC2 0x04
2147 #define _INLVLC3 0x08
2148 #define _INLVLC4 0x10
2149 #define _INLVLC5 0x20
2150
2151 //==============================================================================
2152
2153
2154 //==============================================================================
2155 // IOCAP Bits
2156
2157 extern __at(0x0391) __sfr IOCAP;
2158
2159 typedef union
2160 {
2161 struct
2162 {
2163 unsigned IOCAP0 : 1;
2164 unsigned IOCAP1 : 1;
2165 unsigned IOCAP2 : 1;
2166 unsigned IOCAP3 : 1;
2167 unsigned IOCAP4 : 1;
2168 unsigned IOCAP5 : 1;
2169 unsigned : 1;
2170 unsigned : 1;
2171 };
2172
2173 struct
2174 {
2175 unsigned IOCAP : 6;
2176 unsigned : 2;
2177 };
2178 } __IOCAPbits_t;
2179
2180 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
2181
2182 #define _IOCAP0 0x01
2183 #define _IOCAP1 0x02
2184 #define _IOCAP2 0x04
2185 #define _IOCAP3 0x08
2186 #define _IOCAP4 0x10
2187 #define _IOCAP5 0x20
2188
2189 //==============================================================================
2190
2191
2192 //==============================================================================
2193 // IOCAN Bits
2194
2195 extern __at(0x0392) __sfr IOCAN;
2196
2197 typedef union
2198 {
2199 struct
2200 {
2201 unsigned IOCAN0 : 1;
2202 unsigned IOCAN1 : 1;
2203 unsigned IOCAN2 : 1;
2204 unsigned IOCAN3 : 1;
2205 unsigned IOCAN4 : 1;
2206 unsigned IOCAN5 : 1;
2207 unsigned : 1;
2208 unsigned : 1;
2209 };
2210
2211 struct
2212 {
2213 unsigned IOCAN : 6;
2214 unsigned : 2;
2215 };
2216 } __IOCANbits_t;
2217
2218 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
2219
2220 #define _IOCAN0 0x01
2221 #define _IOCAN1 0x02
2222 #define _IOCAN2 0x04
2223 #define _IOCAN3 0x08
2224 #define _IOCAN4 0x10
2225 #define _IOCAN5 0x20
2226
2227 //==============================================================================
2228
2229
2230 //==============================================================================
2231 // IOCAF Bits
2232
2233 extern __at(0x0393) __sfr IOCAF;
2234
2235 typedef union
2236 {
2237 struct
2238 {
2239 unsigned IOCAF0 : 1;
2240 unsigned IOCAF1 : 1;
2241 unsigned IOCAF2 : 1;
2242 unsigned IOCAF3 : 1;
2243 unsigned IOCAF4 : 1;
2244 unsigned IOCAF5 : 1;
2245 unsigned : 1;
2246 unsigned : 1;
2247 };
2248
2249 struct
2250 {
2251 unsigned IOCAF : 6;
2252 unsigned : 2;
2253 };
2254 } __IOCAFbits_t;
2255
2256 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
2257
2258 #define _IOCAF0 0x01
2259 #define _IOCAF1 0x02
2260 #define _IOCAF2 0x04
2261 #define _IOCAF3 0x08
2262 #define _IOCAF4 0x10
2263 #define _IOCAF5 0x20
2264
2265 //==============================================================================
2266
2267
2268 //==============================================================================
2269 // IOCCP Bits
2270
2271 extern __at(0x0397) __sfr IOCCP;
2272
2273 typedef union
2274 {
2275 struct
2276 {
2277 unsigned IOCCP0 : 1;
2278 unsigned IOCCP1 : 1;
2279 unsigned IOCCP2 : 1;
2280 unsigned IOCCP3 : 1;
2281 unsigned IOCCP4 : 1;
2282 unsigned IOCCP5 : 1;
2283 unsigned : 1;
2284 unsigned : 1;
2285 };
2286
2287 struct
2288 {
2289 unsigned IOCCP : 6;
2290 unsigned : 2;
2291 };
2292 } __IOCCPbits_t;
2293
2294 extern __at(0x0397) volatile __IOCCPbits_t IOCCPbits;
2295
2296 #define _IOCCP0 0x01
2297 #define _IOCCP1 0x02
2298 #define _IOCCP2 0x04
2299 #define _IOCCP3 0x08
2300 #define _IOCCP4 0x10
2301 #define _IOCCP5 0x20
2302
2303 //==============================================================================
2304
2305
2306 //==============================================================================
2307 // IOCCN Bits
2308
2309 extern __at(0x0398) __sfr IOCCN;
2310
2311 typedef union
2312 {
2313 struct
2314 {
2315 unsigned IOCCN0 : 1;
2316 unsigned IOCCN1 : 1;
2317 unsigned IOCCN2 : 1;
2318 unsigned IOCCN3 : 1;
2319 unsigned IOCCN4 : 1;
2320 unsigned IOCCN5 : 1;
2321 unsigned : 1;
2322 unsigned : 1;
2323 };
2324
2325 struct
2326 {
2327 unsigned IOCCN : 6;
2328 unsigned : 2;
2329 };
2330 } __IOCCNbits_t;
2331
2332 extern __at(0x0398) volatile __IOCCNbits_t IOCCNbits;
2333
2334 #define _IOCCN0 0x01
2335 #define _IOCCN1 0x02
2336 #define _IOCCN2 0x04
2337 #define _IOCCN3 0x08
2338 #define _IOCCN4 0x10
2339 #define _IOCCN5 0x20
2340
2341 //==============================================================================
2342
2343
2344 //==============================================================================
2345 // IOCCF Bits
2346
2347 extern __at(0x0399) __sfr IOCCF;
2348
2349 typedef union
2350 {
2351 struct
2352 {
2353 unsigned IOCCF0 : 1;
2354 unsigned IOCCF1 : 1;
2355 unsigned IOCCF2 : 1;
2356 unsigned IOCCF3 : 1;
2357 unsigned IOCCF4 : 1;
2358 unsigned IOCCF5 : 1;
2359 unsigned : 1;
2360 unsigned : 1;
2361 };
2362
2363 struct
2364 {
2365 unsigned IOCCF : 6;
2366 unsigned : 2;
2367 };
2368 } __IOCCFbits_t;
2369
2370 extern __at(0x0399) volatile __IOCCFbits_t IOCCFbits;
2371
2372 #define _IOCCF0 0x01
2373 #define _IOCCF1 0x02
2374 #define _IOCCF2 0x04
2375 #define _IOCCF3 0x08
2376 #define _IOCCF4 0x10
2377 #define _IOCCF5 0x20
2378
2379 //==============================================================================
2380
2381
2382 //==============================================================================
2383 // CWG1DBR Bits
2384
2385 extern __at(0x0691) __sfr CWG1DBR;
2386
2387 typedef union
2388 {
2389 struct
2390 {
2391 unsigned CWG1DBR0 : 1;
2392 unsigned CWG1DBR1 : 1;
2393 unsigned CWG1DBR2 : 1;
2394 unsigned CWG1DBR3 : 1;
2395 unsigned CWG1DBR4 : 1;
2396 unsigned CWG1DBR5 : 1;
2397 unsigned : 1;
2398 unsigned : 1;
2399 };
2400
2401 struct
2402 {
2403 unsigned CWG1DBR : 6;
2404 unsigned : 2;
2405 };
2406 } __CWG1DBRbits_t;
2407
2408 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
2409
2410 #define _CWG1DBR0 0x01
2411 #define _CWG1DBR1 0x02
2412 #define _CWG1DBR2 0x04
2413 #define _CWG1DBR3 0x08
2414 #define _CWG1DBR4 0x10
2415 #define _CWG1DBR5 0x20
2416
2417 //==============================================================================
2418
2419
2420 //==============================================================================
2421 // CWG1DBF Bits
2422
2423 extern __at(0x0692) __sfr CWG1DBF;
2424
2425 typedef union
2426 {
2427 struct
2428 {
2429 unsigned CWG1DBF0 : 1;
2430 unsigned CWG1DBF1 : 1;
2431 unsigned CWG1DBF2 : 1;
2432 unsigned CWG1DBF3 : 1;
2433 unsigned CWG1DBF4 : 1;
2434 unsigned CWG1DBF5 : 1;
2435 unsigned : 1;
2436 unsigned : 1;
2437 };
2438
2439 struct
2440 {
2441 unsigned CWG1DBF : 6;
2442 unsigned : 2;
2443 };
2444 } __CWG1DBFbits_t;
2445
2446 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
2447
2448 #define _CWG1DBF0 0x01
2449 #define _CWG1DBF1 0x02
2450 #define _CWG1DBF2 0x04
2451 #define _CWG1DBF3 0x08
2452 #define _CWG1DBF4 0x10
2453 #define _CWG1DBF5 0x20
2454
2455 //==============================================================================
2456
2457
2458 //==============================================================================
2459 // CWG1CON0 Bits
2460
2461 extern __at(0x0693) __sfr CWG1CON0;
2462
2463 typedef struct
2464 {
2465 unsigned G1CS0 : 1;
2466 unsigned : 1;
2467 unsigned : 1;
2468 unsigned G1POLA : 1;
2469 unsigned G1POLB : 1;
2470 unsigned G1OEA : 1;
2471 unsigned G1OEB : 1;
2472 unsigned G1EN : 1;
2473 } __CWG1CON0bits_t;
2474
2475 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
2476
2477 #define _G1CS0 0x01
2478 #define _G1POLA 0x08
2479 #define _G1POLB 0x10
2480 #define _G1OEA 0x20
2481 #define _G1OEB 0x40
2482 #define _G1EN 0x80
2483
2484 //==============================================================================
2485
2486
2487 //==============================================================================
2488 // CWG1CON1 Bits
2489
2490 extern __at(0x0694) __sfr CWG1CON1;
2491
2492 typedef union
2493 {
2494 struct
2495 {
2496 unsigned G1IS0 : 1;
2497 unsigned G1IS1 : 1;
2498 unsigned G1IS2 : 1;
2499 unsigned : 1;
2500 unsigned G1ASDLA0 : 1;
2501 unsigned G1ASDLA1 : 1;
2502 unsigned G1ASDLB0 : 1;
2503 unsigned G1ASDLB1 : 1;
2504 };
2505
2506 struct
2507 {
2508 unsigned G1IS : 3;
2509 unsigned : 5;
2510 };
2511
2512 struct
2513 {
2514 unsigned : 4;
2515 unsigned G1ASDLA : 2;
2516 unsigned : 2;
2517 };
2518
2519 struct
2520 {
2521 unsigned : 6;
2522 unsigned G1ASDLB : 2;
2523 };
2524 } __CWG1CON1bits_t;
2525
2526 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
2527
2528 #define _G1IS0 0x01
2529 #define _G1IS1 0x02
2530 #define _G1IS2 0x04
2531 #define _G1ASDLA0 0x10
2532 #define _G1ASDLA1 0x20
2533 #define _G1ASDLB0 0x40
2534 #define _G1ASDLB1 0x80
2535
2536 //==============================================================================
2537
2538
2539 //==============================================================================
2540 // CWG1CON2 Bits
2541
2542 extern __at(0x0695) __sfr CWG1CON2;
2543
2544 typedef struct
2545 {
2546 unsigned : 1;
2547 unsigned G1ASDSPPS : 1;
2548 unsigned G1ASDSC1 : 1;
2549 unsigned G1ASDSC2 : 1;
2550 unsigned : 1;
2551 unsigned : 1;
2552 unsigned G1ARSEN : 1;
2553 unsigned G1ASE : 1;
2554 } __CWG1CON2bits_t;
2555
2556 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
2557
2558 #define _G1ASDSPPS 0x02
2559 #define _G1ASDSC1 0x04
2560 #define _G1ASDSC2 0x08
2561 #define _G1ARSEN 0x40
2562 #define _G1ASE 0x80
2563
2564 //==============================================================================
2565
2566
2567 //==============================================================================
2568 // PWMEN Bits
2569
2570 extern __at(0x0D8E) __sfr PWMEN;
2571
2572 typedef union
2573 {
2574 struct
2575 {
2576 unsigned PWM1EN_A : 1;
2577 unsigned PWM2EN_A : 1;
2578 unsigned PWM3EN_A : 1;
2579 unsigned PWM4EN_A : 1;
2580 unsigned : 1;
2581 unsigned : 1;
2582 unsigned : 1;
2583 unsigned : 1;
2584 };
2585
2586 struct
2587 {
2588 unsigned MPWM1EN : 1;
2589 unsigned MPWM2EN : 1;
2590 unsigned MPWM3EN : 1;
2591 unsigned : 1;
2592 unsigned : 1;
2593 unsigned : 1;
2594 unsigned : 1;
2595 unsigned : 1;
2596 };
2597 } __PWMENbits_t;
2598
2599 extern __at(0x0D8E) volatile __PWMENbits_t PWMENbits;
2600
2601 #define _PWM1EN_A 0x01
2602 #define _MPWM1EN 0x01
2603 #define _PWM2EN_A 0x02
2604 #define _MPWM2EN 0x02
2605 #define _PWM3EN_A 0x04
2606 #define _MPWM3EN 0x04
2607 #define _PWM4EN_A 0x08
2608
2609 //==============================================================================
2610
2611
2612 //==============================================================================
2613 // PWMLD Bits
2614
2615 extern __at(0x0D8F) __sfr PWMLD;
2616
2617 typedef union
2618 {
2619 struct
2620 {
2621 unsigned PWM1LDA_A : 1;
2622 unsigned PWM2LDA_A : 1;
2623 unsigned PWM3LDA_A : 1;
2624 unsigned PWM4LDA_A : 1;
2625 unsigned : 1;
2626 unsigned : 1;
2627 unsigned : 1;
2628 unsigned : 1;
2629 };
2630
2631 struct
2632 {
2633 unsigned MPWM1LD : 1;
2634 unsigned MPWM2LD : 1;
2635 unsigned MPWM3LD : 1;
2636 unsigned : 1;
2637 unsigned : 1;
2638 unsigned : 1;
2639 unsigned : 1;
2640 unsigned : 1;
2641 };
2642 } __PWMLDbits_t;
2643
2644 extern __at(0x0D8F) volatile __PWMLDbits_t PWMLDbits;
2645
2646 #define _PWM1LDA_A 0x01
2647 #define _MPWM1LD 0x01
2648 #define _PWM2LDA_A 0x02
2649 #define _MPWM2LD 0x02
2650 #define _PWM3LDA_A 0x04
2651 #define _MPWM3LD 0x04
2652 #define _PWM4LDA_A 0x08
2653
2654 //==============================================================================
2655
2656
2657 //==============================================================================
2658 // PWMOUT Bits
2659
2660 extern __at(0x0D90) __sfr PWMOUT;
2661
2662 typedef union
2663 {
2664 struct
2665 {
2666 unsigned PWM1OUT_A : 1;
2667 unsigned PWM2OUT_A : 1;
2668 unsigned PWM3OUT_A : 1;
2669 unsigned PWM4OUT_A : 1;
2670 unsigned : 1;
2671 unsigned : 1;
2672 unsigned : 1;
2673 unsigned : 1;
2674 };
2675
2676 struct
2677 {
2678 unsigned MPWM1OUT : 1;
2679 unsigned MPWM2OUT : 1;
2680 unsigned MPWM3OUT : 1;
2681 unsigned : 1;
2682 unsigned : 1;
2683 unsigned : 1;
2684 unsigned : 1;
2685 unsigned : 1;
2686 };
2687 } __PWMOUTbits_t;
2688
2689 extern __at(0x0D90) volatile __PWMOUTbits_t PWMOUTbits;
2690
2691 #define _PWM1OUT_A 0x01
2692 #define _MPWM1OUT 0x01
2693 #define _PWM2OUT_A 0x02
2694 #define _MPWM2OUT 0x02
2695 #define _PWM3OUT_A 0x04
2696 #define _MPWM3OUT 0x04
2697 #define _PWM4OUT_A 0x08
2698
2699 //==============================================================================
2700
2701 extern __at(0x0D91) __sfr PWM1PH;
2702
2703 //==============================================================================
2704 // PWM1PHL Bits
2705
2706 extern __at(0x0D91) __sfr PWM1PHL;
2707
2708 typedef struct
2709 {
2710 unsigned PWM1PHL0 : 1;
2711 unsigned PWM1PHL1 : 1;
2712 unsigned PWM1PHL2 : 1;
2713 unsigned PWM1PHL3 : 1;
2714 unsigned PWM1PHL4 : 1;
2715 unsigned PWM1PHL5 : 1;
2716 unsigned PWM1PHL6 : 1;
2717 unsigned PWM1PHL7 : 1;
2718 } __PWM1PHLbits_t;
2719
2720 extern __at(0x0D91) volatile __PWM1PHLbits_t PWM1PHLbits;
2721
2722 #define _PWM1PHL0 0x01
2723 #define _PWM1PHL1 0x02
2724 #define _PWM1PHL2 0x04
2725 #define _PWM1PHL3 0x08
2726 #define _PWM1PHL4 0x10
2727 #define _PWM1PHL5 0x20
2728 #define _PWM1PHL6 0x40
2729 #define _PWM1PHL7 0x80
2730
2731 //==============================================================================
2732
2733
2734 //==============================================================================
2735 // PWM1PHH Bits
2736
2737 extern __at(0x0D92) __sfr PWM1PHH;
2738
2739 typedef struct
2740 {
2741 unsigned PWM1PHH0 : 1;
2742 unsigned PWM1PHH1 : 1;
2743 unsigned PWM1PHH2 : 1;
2744 unsigned PWM1PHH3 : 1;
2745 unsigned PWM1PHH4 : 1;
2746 unsigned PWM1PHH5 : 1;
2747 unsigned PWM1PHH6 : 1;
2748 unsigned PWM1PHH7 : 1;
2749 } __PWM1PHHbits_t;
2750
2751 extern __at(0x0D92) volatile __PWM1PHHbits_t PWM1PHHbits;
2752
2753 #define _PWM1PHH0 0x01
2754 #define _PWM1PHH1 0x02
2755 #define _PWM1PHH2 0x04
2756 #define _PWM1PHH3 0x08
2757 #define _PWM1PHH4 0x10
2758 #define _PWM1PHH5 0x20
2759 #define _PWM1PHH6 0x40
2760 #define _PWM1PHH7 0x80
2761
2762 //==============================================================================
2763
2764 extern __at(0x0D93) __sfr PWM1DC;
2765
2766 //==============================================================================
2767 // PWM1DCL Bits
2768
2769 extern __at(0x0D93) __sfr PWM1DCL;
2770
2771 typedef struct
2772 {
2773 unsigned PWM1DCL0 : 1;
2774 unsigned PWM1DCL1 : 1;
2775 unsigned PWM1DCL2 : 1;
2776 unsigned PWM1DCL3 : 1;
2777 unsigned PWM1DCL4 : 1;
2778 unsigned PWM1DCL5 : 1;
2779 unsigned PWM1DCL6 : 1;
2780 unsigned PWM1DCL7 : 1;
2781 } __PWM1DCLbits_t;
2782
2783 extern __at(0x0D93) volatile __PWM1DCLbits_t PWM1DCLbits;
2784
2785 #define _PWM1DCL0 0x01
2786 #define _PWM1DCL1 0x02
2787 #define _PWM1DCL2 0x04
2788 #define _PWM1DCL3 0x08
2789 #define _PWM1DCL4 0x10
2790 #define _PWM1DCL5 0x20
2791 #define _PWM1DCL6 0x40
2792 #define _PWM1DCL7 0x80
2793
2794 //==============================================================================
2795
2796
2797 //==============================================================================
2798 // PWM1DCH Bits
2799
2800 extern __at(0x0D94) __sfr PWM1DCH;
2801
2802 typedef struct
2803 {
2804 unsigned PWM1DCH0 : 1;
2805 unsigned PWM1DCH1 : 1;
2806 unsigned PWM1DCH2 : 1;
2807 unsigned PWM1DCH3 : 1;
2808 unsigned PWM1DCH4 : 1;
2809 unsigned PWM1DCH5 : 1;
2810 unsigned PWM1DCH6 : 1;
2811 unsigned PWM1DCH7 : 1;
2812 } __PWM1DCHbits_t;
2813
2814 extern __at(0x0D94) volatile __PWM1DCHbits_t PWM1DCHbits;
2815
2816 #define _PWM1DCH0 0x01
2817 #define _PWM1DCH1 0x02
2818 #define _PWM1DCH2 0x04
2819 #define _PWM1DCH3 0x08
2820 #define _PWM1DCH4 0x10
2821 #define _PWM1DCH5 0x20
2822 #define _PWM1DCH6 0x40
2823 #define _PWM1DCH7 0x80
2824
2825 //==============================================================================
2826
2827 extern __at(0x0D95) __sfr PWM1PR;
2828
2829 //==============================================================================
2830 // PWM1PRL Bits
2831
2832 extern __at(0x0D95) __sfr PWM1PRL;
2833
2834 typedef struct
2835 {
2836 unsigned PWM1PRL0 : 1;
2837 unsigned PWM1PRL1 : 1;
2838 unsigned PWM1PRL2 : 1;
2839 unsigned PWM1PRL3 : 1;
2840 unsigned PWM1PRL4 : 1;
2841 unsigned PWM1PRL5 : 1;
2842 unsigned PWM1PRL6 : 1;
2843 unsigned PWM1PRL7 : 1;
2844 } __PWM1PRLbits_t;
2845
2846 extern __at(0x0D95) volatile __PWM1PRLbits_t PWM1PRLbits;
2847
2848 #define _PWM1PRL0 0x01
2849 #define _PWM1PRL1 0x02
2850 #define _PWM1PRL2 0x04
2851 #define _PWM1PRL3 0x08
2852 #define _PWM1PRL4 0x10
2853 #define _PWM1PRL5 0x20
2854 #define _PWM1PRL6 0x40
2855 #define _PWM1PRL7 0x80
2856
2857 //==============================================================================
2858
2859
2860 //==============================================================================
2861 // PWM1PRH Bits
2862
2863 extern __at(0x0D96) __sfr PWM1PRH;
2864
2865 typedef struct
2866 {
2867 unsigned PWM1PRH0 : 1;
2868 unsigned PWM1PRH1 : 1;
2869 unsigned PWM1PRH2 : 1;
2870 unsigned PWM1PRH3 : 1;
2871 unsigned PWM1PRH4 : 1;
2872 unsigned PWM1PRH5 : 1;
2873 unsigned PWM1PRH6 : 1;
2874 unsigned PWM1PRH7 : 1;
2875 } __PWM1PRHbits_t;
2876
2877 extern __at(0x0D96) volatile __PWM1PRHbits_t PWM1PRHbits;
2878
2879 #define _PWM1PRH0 0x01
2880 #define _PWM1PRH1 0x02
2881 #define _PWM1PRH2 0x04
2882 #define _PWM1PRH3 0x08
2883 #define _PWM1PRH4 0x10
2884 #define _PWM1PRH5 0x20
2885 #define _PWM1PRH6 0x40
2886 #define _PWM1PRH7 0x80
2887
2888 //==============================================================================
2889
2890 extern __at(0x0D97) __sfr PWM1OF;
2891
2892 //==============================================================================
2893 // PWM1OFL Bits
2894
2895 extern __at(0x0D97) __sfr PWM1OFL;
2896
2897 typedef struct
2898 {
2899 unsigned PWM1OFL0 : 1;
2900 unsigned PWM1OFL1 : 1;
2901 unsigned PWM1OFL2 : 1;
2902 unsigned PWM1OFL3 : 1;
2903 unsigned PWM1OFL4 : 1;
2904 unsigned PWM1OFL5 : 1;
2905 unsigned PWM1OFL6 : 1;
2906 unsigned PWM1OFL7 : 1;
2907 } __PWM1OFLbits_t;
2908
2909 extern __at(0x0D97) volatile __PWM1OFLbits_t PWM1OFLbits;
2910
2911 #define _PWM1OFL0 0x01
2912 #define _PWM1OFL1 0x02
2913 #define _PWM1OFL2 0x04
2914 #define _PWM1OFL3 0x08
2915 #define _PWM1OFL4 0x10
2916 #define _PWM1OFL5 0x20
2917 #define _PWM1OFL6 0x40
2918 #define _PWM1OFL7 0x80
2919
2920 //==============================================================================
2921
2922
2923 //==============================================================================
2924 // PWM1OFH Bits
2925
2926 extern __at(0x0D98) __sfr PWM1OFH;
2927
2928 typedef struct
2929 {
2930 unsigned PWM1OFH0 : 1;
2931 unsigned PWM1OFH1 : 1;
2932 unsigned PWM1OFH2 : 1;
2933 unsigned PWM1OFH3 : 1;
2934 unsigned PWM1OFH4 : 1;
2935 unsigned PWM1OFH5 : 1;
2936 unsigned PWM1OFH6 : 1;
2937 unsigned PWM1OFH7 : 1;
2938 } __PWM1OFHbits_t;
2939
2940 extern __at(0x0D98) volatile __PWM1OFHbits_t PWM1OFHbits;
2941
2942 #define _PWM1OFH0 0x01
2943 #define _PWM1OFH1 0x02
2944 #define _PWM1OFH2 0x04
2945 #define _PWM1OFH3 0x08
2946 #define _PWM1OFH4 0x10
2947 #define _PWM1OFH5 0x20
2948 #define _PWM1OFH6 0x40
2949 #define _PWM1OFH7 0x80
2950
2951 //==============================================================================
2952
2953 extern __at(0x0D99) __sfr PWM1TMR;
2954
2955 //==============================================================================
2956 // PWM1TMRL Bits
2957
2958 extern __at(0x0D99) __sfr PWM1TMRL;
2959
2960 typedef struct
2961 {
2962 unsigned PWM1TMRL0 : 1;
2963 unsigned PWM1TMRL1 : 1;
2964 unsigned PWM1TMRL2 : 1;
2965 unsigned PWM1TMRL3 : 1;
2966 unsigned PWM1TMRL4 : 1;
2967 unsigned PWM1TMRL5 : 1;
2968 unsigned PWM1TMRL6 : 1;
2969 unsigned PWM1TMRL7 : 1;
2970 } __PWM1TMRLbits_t;
2971
2972 extern __at(0x0D99) volatile __PWM1TMRLbits_t PWM1TMRLbits;
2973
2974 #define _PWM1TMRL0 0x01
2975 #define _PWM1TMRL1 0x02
2976 #define _PWM1TMRL2 0x04
2977 #define _PWM1TMRL3 0x08
2978 #define _PWM1TMRL4 0x10
2979 #define _PWM1TMRL5 0x20
2980 #define _PWM1TMRL6 0x40
2981 #define _PWM1TMRL7 0x80
2982
2983 //==============================================================================
2984
2985
2986 //==============================================================================
2987 // PWM1TMRH Bits
2988
2989 extern __at(0x0D9A) __sfr PWM1TMRH;
2990
2991 typedef struct
2992 {
2993 unsigned PWM1TMRH0 : 1;
2994 unsigned PWM1TMRH1 : 1;
2995 unsigned PWM1TMRH2 : 1;
2996 unsigned PWM1TMRH3 : 1;
2997 unsigned PWM1TMRH4 : 1;
2998 unsigned PWM1TMRH5 : 1;
2999 unsigned PWM1TMRH6 : 1;
3000 unsigned PWM1TMRH7 : 1;
3001 } __PWM1TMRHbits_t;
3002
3003 extern __at(0x0D9A) volatile __PWM1TMRHbits_t PWM1TMRHbits;
3004
3005 #define _PWM1TMRH0 0x01
3006 #define _PWM1TMRH1 0x02
3007 #define _PWM1TMRH2 0x04
3008 #define _PWM1TMRH3 0x08
3009 #define _PWM1TMRH4 0x10
3010 #define _PWM1TMRH5 0x20
3011 #define _PWM1TMRH6 0x40
3012 #define _PWM1TMRH7 0x80
3013
3014 //==============================================================================
3015
3016
3017 //==============================================================================
3018 // PWM1CON Bits
3019
3020 extern __at(0x0D9B) __sfr PWM1CON;
3021
3022 typedef union
3023 {
3024 struct
3025 {
3026 unsigned : 1;
3027 unsigned : 1;
3028 unsigned PWM1MODE0 : 1;
3029 unsigned PWM1MODE1 : 1;
3030 unsigned POL : 1;
3031 unsigned OUT : 1;
3032 unsigned OE : 1;
3033 unsigned EN : 1;
3034 };
3035
3036 struct
3037 {
3038 unsigned : 1;
3039 unsigned : 1;
3040 unsigned MODE0 : 1;
3041 unsigned MODE1 : 1;
3042 unsigned PWM1POL : 1;
3043 unsigned PWM1OUT : 1;
3044 unsigned PWM1OE : 1;
3045 unsigned PWM1EN : 1;
3046 };
3047
3048 struct
3049 {
3050 unsigned : 2;
3051 unsigned MODE : 2;
3052 unsigned : 4;
3053 };
3054
3055 struct
3056 {
3057 unsigned : 2;
3058 unsigned PWM1MODE : 2;
3059 unsigned : 4;
3060 };
3061 } __PWM1CONbits_t;
3062
3063 extern __at(0x0D9B) volatile __PWM1CONbits_t PWM1CONbits;
3064
3065 #define _PWM1MODE0 0x04
3066 #define _MODE0 0x04
3067 #define _PWM1MODE1 0x08
3068 #define _MODE1 0x08
3069 #define _POL 0x10
3070 #define _PWM1POL 0x10
3071 #define _OUT 0x20
3072 #define _PWM1OUT 0x20
3073 #define _OE 0x40
3074 #define _PWM1OE 0x40
3075 #define _EN 0x80
3076 #define _PWM1EN 0x80
3077
3078 //==============================================================================
3079
3080
3081 //==============================================================================
3082 // PWM1INTCON Bits
3083
3084 extern __at(0x0D9C) __sfr PWM1INTCON;
3085
3086 typedef union
3087 {
3088 struct
3089 {
3090 unsigned PRIE : 1;
3091 unsigned DCIE : 1;
3092 unsigned PHIE : 1;
3093 unsigned OFIE : 1;
3094 unsigned : 1;
3095 unsigned : 1;
3096 unsigned : 1;
3097 unsigned : 1;
3098 };
3099
3100 struct
3101 {
3102 unsigned PWM1PRIE : 1;
3103 unsigned PWM1DCIE : 1;
3104 unsigned PWM1PHIE : 1;
3105 unsigned PWM1OFIE : 1;
3106 unsigned : 1;
3107 unsigned : 1;
3108 unsigned : 1;
3109 unsigned : 1;
3110 };
3111 } __PWM1INTCONbits_t;
3112
3113 extern __at(0x0D9C) volatile __PWM1INTCONbits_t PWM1INTCONbits;
3114
3115 #define _PRIE 0x01
3116 #define _PWM1PRIE 0x01
3117 #define _DCIE 0x02
3118 #define _PWM1DCIE 0x02
3119 #define _PHIE 0x04
3120 #define _PWM1PHIE 0x04
3121 #define _OFIE 0x08
3122 #define _PWM1OFIE 0x08
3123
3124 //==============================================================================
3125
3126
3127 //==============================================================================
3128 // PWM1INTE Bits
3129
3130 extern __at(0x0D9C) __sfr PWM1INTE;
3131
3132 typedef union
3133 {
3134 struct
3135 {
3136 unsigned PRIE : 1;
3137 unsigned DCIE : 1;
3138 unsigned PHIE : 1;
3139 unsigned OFIE : 1;
3140 unsigned : 1;
3141 unsigned : 1;
3142 unsigned : 1;
3143 unsigned : 1;
3144 };
3145
3146 struct
3147 {
3148 unsigned PWM1PRIE : 1;
3149 unsigned PWM1DCIE : 1;
3150 unsigned PWM1PHIE : 1;
3151 unsigned PWM1OFIE : 1;
3152 unsigned : 1;
3153 unsigned : 1;
3154 unsigned : 1;
3155 unsigned : 1;
3156 };
3157 } __PWM1INTEbits_t;
3158
3159 extern __at(0x0D9C) volatile __PWM1INTEbits_t PWM1INTEbits;
3160
3161 #define _PWM1INTE_PRIE 0x01
3162 #define _PWM1INTE_PWM1PRIE 0x01
3163 #define _PWM1INTE_DCIE 0x02
3164 #define _PWM1INTE_PWM1DCIE 0x02
3165 #define _PWM1INTE_PHIE 0x04
3166 #define _PWM1INTE_PWM1PHIE 0x04
3167 #define _PWM1INTE_OFIE 0x08
3168 #define _PWM1INTE_PWM1OFIE 0x08
3169
3170 //==============================================================================
3171
3172
3173 //==============================================================================
3174 // PWM1INTF Bits
3175
3176 extern __at(0x0D9D) __sfr PWM1INTF;
3177
3178 typedef union
3179 {
3180 struct
3181 {
3182 unsigned PRIF : 1;
3183 unsigned DCIF : 1;
3184 unsigned PHIF : 1;
3185 unsigned OFIF : 1;
3186 unsigned : 1;
3187 unsigned : 1;
3188 unsigned : 1;
3189 unsigned : 1;
3190 };
3191
3192 struct
3193 {
3194 unsigned PWM1PRIF : 1;
3195 unsigned PWM1DCIF : 1;
3196 unsigned PWM1PHIF : 1;
3197 unsigned PWM1OFIF : 1;
3198 unsigned : 1;
3199 unsigned : 1;
3200 unsigned : 1;
3201 unsigned : 1;
3202 };
3203 } __PWM1INTFbits_t;
3204
3205 extern __at(0x0D9D) volatile __PWM1INTFbits_t PWM1INTFbits;
3206
3207 #define _PRIF 0x01
3208 #define _PWM1PRIF 0x01
3209 #define _DCIF 0x02
3210 #define _PWM1DCIF 0x02
3211 #define _PHIF 0x04
3212 #define _PWM1PHIF 0x04
3213 #define _OFIF 0x08
3214 #define _PWM1OFIF 0x08
3215
3216 //==============================================================================
3217
3218
3219 //==============================================================================
3220 // PWM1INTFLG Bits
3221
3222 extern __at(0x0D9D) __sfr PWM1INTFLG;
3223
3224 typedef union
3225 {
3226 struct
3227 {
3228 unsigned PRIF : 1;
3229 unsigned DCIF : 1;
3230 unsigned PHIF : 1;
3231 unsigned OFIF : 1;
3232 unsigned : 1;
3233 unsigned : 1;
3234 unsigned : 1;
3235 unsigned : 1;
3236 };
3237
3238 struct
3239 {
3240 unsigned PWM1PRIF : 1;
3241 unsigned PWM1DCIF : 1;
3242 unsigned PWM1PHIF : 1;
3243 unsigned PWM1OFIF : 1;
3244 unsigned : 1;
3245 unsigned : 1;
3246 unsigned : 1;
3247 unsigned : 1;
3248 };
3249 } __PWM1INTFLGbits_t;
3250
3251 extern __at(0x0D9D) volatile __PWM1INTFLGbits_t PWM1INTFLGbits;
3252
3253 #define _PWM1INTFLG_PRIF 0x01
3254 #define _PWM1INTFLG_PWM1PRIF 0x01
3255 #define _PWM1INTFLG_DCIF 0x02
3256 #define _PWM1INTFLG_PWM1DCIF 0x02
3257 #define _PWM1INTFLG_PHIF 0x04
3258 #define _PWM1INTFLG_PWM1PHIF 0x04
3259 #define _PWM1INTFLG_OFIF 0x08
3260 #define _PWM1INTFLG_PWM1OFIF 0x08
3261
3262 //==============================================================================
3263
3264
3265 //==============================================================================
3266 // PWM1CLKCON Bits
3267
3268 extern __at(0x0D9E) __sfr PWM1CLKCON;
3269
3270 typedef union
3271 {
3272 struct
3273 {
3274 unsigned PWM1CS0 : 1;
3275 unsigned PWM1CS1 : 1;
3276 unsigned : 1;
3277 unsigned : 1;
3278 unsigned PWM1PS0 : 1;
3279 unsigned PWM1PS1 : 1;
3280 unsigned PWM1PS2 : 1;
3281 unsigned : 1;
3282 };
3283
3284 struct
3285 {
3286 unsigned CS0 : 1;
3287 unsigned CS1 : 1;
3288 unsigned : 1;
3289 unsigned : 1;
3290 unsigned PS0 : 1;
3291 unsigned PS1 : 1;
3292 unsigned PS2 : 1;
3293 unsigned : 1;
3294 };
3295
3296 struct
3297 {
3298 unsigned PWM1CS : 2;
3299 unsigned : 6;
3300 };
3301
3302 struct
3303 {
3304 unsigned CS : 2;
3305 unsigned : 6;
3306 };
3307
3308 struct
3309 {
3310 unsigned : 4;
3311 unsigned PS : 3;
3312 unsigned : 1;
3313 };
3314
3315 struct
3316 {
3317 unsigned : 4;
3318 unsigned PWM1PS : 3;
3319 unsigned : 1;
3320 };
3321 } __PWM1CLKCONbits_t;
3322
3323 extern __at(0x0D9E) volatile __PWM1CLKCONbits_t PWM1CLKCONbits;
3324
3325 #define _PWM1CLKCON_PWM1CS0 0x01
3326 #define _PWM1CLKCON_CS0 0x01
3327 #define _PWM1CLKCON_PWM1CS1 0x02
3328 #define _PWM1CLKCON_CS1 0x02
3329 #define _PWM1CLKCON_PWM1PS0 0x10
3330 #define _PWM1CLKCON_PS0 0x10
3331 #define _PWM1CLKCON_PWM1PS1 0x20
3332 #define _PWM1CLKCON_PS1 0x20
3333 #define _PWM1CLKCON_PWM1PS2 0x40
3334 #define _PWM1CLKCON_PS2 0x40
3335
3336 //==============================================================================
3337
3338
3339 //==============================================================================
3340 // PWM1LDCON Bits
3341
3342 extern __at(0x0D9F) __sfr PWM1LDCON;
3343
3344 typedef union
3345 {
3346 struct
3347 {
3348 unsigned PWM1LDS0 : 1;
3349 unsigned PWM1LDS1 : 1;
3350 unsigned : 1;
3351 unsigned : 1;
3352 unsigned : 1;
3353 unsigned : 1;
3354 unsigned LDT : 1;
3355 unsigned LDA : 1;
3356 };
3357
3358 struct
3359 {
3360 unsigned LDS0 : 1;
3361 unsigned LDS1 : 1;
3362 unsigned : 1;
3363 unsigned : 1;
3364 unsigned : 1;
3365 unsigned : 1;
3366 unsigned PWM1LDM : 1;
3367 unsigned PWM1LD : 1;
3368 };
3369
3370 struct
3371 {
3372 unsigned PWM1LDS : 2;
3373 unsigned : 6;
3374 };
3375
3376 struct
3377 {
3378 unsigned LDS : 2;
3379 unsigned : 6;
3380 };
3381 } __PWM1LDCONbits_t;
3382
3383 extern __at(0x0D9F) volatile __PWM1LDCONbits_t PWM1LDCONbits;
3384
3385 #define _PWM1LDS0 0x01
3386 #define _LDS0 0x01
3387 #define _PWM1LDS1 0x02
3388 #define _LDS1 0x02
3389 #define _LDT 0x40
3390 #define _PWM1LDM 0x40
3391 #define _LDA 0x80
3392 #define _PWM1LD 0x80
3393
3394 //==============================================================================
3395
3396
3397 //==============================================================================
3398 // PWM1OFCON Bits
3399
3400 extern __at(0x0DA0) __sfr PWM1OFCON;
3401
3402 typedef union
3403 {
3404 struct
3405 {
3406 unsigned PWM1OFS0 : 1;
3407 unsigned PWM1OFS1 : 1;
3408 unsigned : 1;
3409 unsigned : 1;
3410 unsigned OFO : 1;
3411 unsigned PWM1OFM0 : 1;
3412 unsigned PWM1OFM1 : 1;
3413 unsigned : 1;
3414 };
3415
3416 struct
3417 {
3418 unsigned OFS0 : 1;
3419 unsigned OFS1 : 1;
3420 unsigned : 1;
3421 unsigned : 1;
3422 unsigned PWM1OFMC : 1;
3423 unsigned OFM0 : 1;
3424 unsigned OFM1 : 1;
3425 unsigned : 1;
3426 };
3427
3428 struct
3429 {
3430 unsigned PWM1OFS : 2;
3431 unsigned : 6;
3432 };
3433
3434 struct
3435 {
3436 unsigned OFS : 2;
3437 unsigned : 6;
3438 };
3439
3440 struct
3441 {
3442 unsigned : 5;
3443 unsigned PWM1OFM : 2;
3444 unsigned : 1;
3445 };
3446
3447 struct
3448 {
3449 unsigned : 5;
3450 unsigned OFM : 2;
3451 unsigned : 1;
3452 };
3453 } __PWM1OFCONbits_t;
3454
3455 extern __at(0x0DA0) volatile __PWM1OFCONbits_t PWM1OFCONbits;
3456
3457 #define _PWM1OFS0 0x01
3458 #define _OFS0 0x01
3459 #define _PWM1OFS1 0x02
3460 #define _OFS1 0x02
3461 #define _OFO 0x10
3462 #define _PWM1OFMC 0x10
3463 #define _PWM1OFM0 0x20
3464 #define _OFM0 0x20
3465 #define _PWM1OFM1 0x40
3466 #define _OFM1 0x40
3467
3468 //==============================================================================
3469
3470 extern __at(0x0DA1) __sfr PWM2PH;
3471
3472 //==============================================================================
3473 // PWM2PHL Bits
3474
3475 extern __at(0x0DA1) __sfr PWM2PHL;
3476
3477 typedef struct
3478 {
3479 unsigned PWM2PHL0 : 1;
3480 unsigned PWM2PHL1 : 1;
3481 unsigned PWM2PHL2 : 1;
3482 unsigned PWM2PHL3 : 1;
3483 unsigned PWM2PHL4 : 1;
3484 unsigned PWM2PHL5 : 1;
3485 unsigned PWM2PHL6 : 1;
3486 unsigned PWM2PHL7 : 1;
3487 } __PWM2PHLbits_t;
3488
3489 extern __at(0x0DA1) volatile __PWM2PHLbits_t PWM2PHLbits;
3490
3491 #define _PWM2PHL0 0x01
3492 #define _PWM2PHL1 0x02
3493 #define _PWM2PHL2 0x04
3494 #define _PWM2PHL3 0x08
3495 #define _PWM2PHL4 0x10
3496 #define _PWM2PHL5 0x20
3497 #define _PWM2PHL6 0x40
3498 #define _PWM2PHL7 0x80
3499
3500 //==============================================================================
3501
3502
3503 //==============================================================================
3504 // PWM2PHH Bits
3505
3506 extern __at(0x0DA2) __sfr PWM2PHH;
3507
3508 typedef struct
3509 {
3510 unsigned PWM2PHH0 : 1;
3511 unsigned PWM2PHH1 : 1;
3512 unsigned PWM2PHH2 : 1;
3513 unsigned PWM2PHH3 : 1;
3514 unsigned PWM2PHH4 : 1;
3515 unsigned PWM2PHH5 : 1;
3516 unsigned PWM2PHH6 : 1;
3517 unsigned PWM2PHH7 : 1;
3518 } __PWM2PHHbits_t;
3519
3520 extern __at(0x0DA2) volatile __PWM2PHHbits_t PWM2PHHbits;
3521
3522 #define _PWM2PHH0 0x01
3523 #define _PWM2PHH1 0x02
3524 #define _PWM2PHH2 0x04
3525 #define _PWM2PHH3 0x08
3526 #define _PWM2PHH4 0x10
3527 #define _PWM2PHH5 0x20
3528 #define _PWM2PHH6 0x40
3529 #define _PWM2PHH7 0x80
3530
3531 //==============================================================================
3532
3533 extern __at(0x0DA3) __sfr PWM2DC;
3534
3535 //==============================================================================
3536 // PWM2DCL Bits
3537
3538 extern __at(0x0DA3) __sfr PWM2DCL;
3539
3540 typedef struct
3541 {
3542 unsigned PWM2DCL0 : 1;
3543 unsigned PWM2DCL1 : 1;
3544 unsigned PWM2DCL2 : 1;
3545 unsigned PWM2DCL3 : 1;
3546 unsigned PWM2DCL4 : 1;
3547 unsigned PWM2DCL5 : 1;
3548 unsigned PWM2DCL6 : 1;
3549 unsigned PWM2DCL7 : 1;
3550 } __PWM2DCLbits_t;
3551
3552 extern __at(0x0DA3) volatile __PWM2DCLbits_t PWM2DCLbits;
3553
3554 #define _PWM2DCL0 0x01
3555 #define _PWM2DCL1 0x02
3556 #define _PWM2DCL2 0x04
3557 #define _PWM2DCL3 0x08
3558 #define _PWM2DCL4 0x10
3559 #define _PWM2DCL5 0x20
3560 #define _PWM2DCL6 0x40
3561 #define _PWM2DCL7 0x80
3562
3563 //==============================================================================
3564
3565
3566 //==============================================================================
3567 // PWM2DCH Bits
3568
3569 extern __at(0x0DA4) __sfr PWM2DCH;
3570
3571 typedef struct
3572 {
3573 unsigned PWM2DCH0 : 1;
3574 unsigned PWM2DCH1 : 1;
3575 unsigned PWM2DCH2 : 1;
3576 unsigned PWM2DCH3 : 1;
3577 unsigned PWM2DCH4 : 1;
3578 unsigned PWM2DCH5 : 1;
3579 unsigned PWM2DCH6 : 1;
3580 unsigned PWM2DCH7 : 1;
3581 } __PWM2DCHbits_t;
3582
3583 extern __at(0x0DA4) volatile __PWM2DCHbits_t PWM2DCHbits;
3584
3585 #define _PWM2DCH0 0x01
3586 #define _PWM2DCH1 0x02
3587 #define _PWM2DCH2 0x04
3588 #define _PWM2DCH3 0x08
3589 #define _PWM2DCH4 0x10
3590 #define _PWM2DCH5 0x20
3591 #define _PWM2DCH6 0x40
3592 #define _PWM2DCH7 0x80
3593
3594 //==============================================================================
3595
3596 extern __at(0x0DA5) __sfr PWM2PR;
3597
3598 //==============================================================================
3599 // PWM2PRL Bits
3600
3601 extern __at(0x0DA5) __sfr PWM2PRL;
3602
3603 typedef struct
3604 {
3605 unsigned PWM2PRL0 : 1;
3606 unsigned PWM2PRL1 : 1;
3607 unsigned PWM2PRL2 : 1;
3608 unsigned PWM2PRL3 : 1;
3609 unsigned PWM2PRL4 : 1;
3610 unsigned PWM2PRL5 : 1;
3611 unsigned PWM2PRL6 : 1;
3612 unsigned PWM2PRL7 : 1;
3613 } __PWM2PRLbits_t;
3614
3615 extern __at(0x0DA5) volatile __PWM2PRLbits_t PWM2PRLbits;
3616
3617 #define _PWM2PRL0 0x01
3618 #define _PWM2PRL1 0x02
3619 #define _PWM2PRL2 0x04
3620 #define _PWM2PRL3 0x08
3621 #define _PWM2PRL4 0x10
3622 #define _PWM2PRL5 0x20
3623 #define _PWM2PRL6 0x40
3624 #define _PWM2PRL7 0x80
3625
3626 //==============================================================================
3627
3628
3629 //==============================================================================
3630 // PWM2PRH Bits
3631
3632 extern __at(0x0DA6) __sfr PWM2PRH;
3633
3634 typedef struct
3635 {
3636 unsigned PWM2PRH0 : 1;
3637 unsigned PWM2PRH1 : 1;
3638 unsigned PWM2PRH2 : 1;
3639 unsigned PWM2PRH3 : 1;
3640 unsigned PWM2PRH4 : 1;
3641 unsigned PWM2PRH5 : 1;
3642 unsigned PWM2PRH6 : 1;
3643 unsigned PWM2PRH7 : 1;
3644 } __PWM2PRHbits_t;
3645
3646 extern __at(0x0DA6) volatile __PWM2PRHbits_t PWM2PRHbits;
3647
3648 #define _PWM2PRH0 0x01
3649 #define _PWM2PRH1 0x02
3650 #define _PWM2PRH2 0x04
3651 #define _PWM2PRH3 0x08
3652 #define _PWM2PRH4 0x10
3653 #define _PWM2PRH5 0x20
3654 #define _PWM2PRH6 0x40
3655 #define _PWM2PRH7 0x80
3656
3657 //==============================================================================
3658
3659 extern __at(0x0DA7) __sfr PWM2OF;
3660
3661 //==============================================================================
3662 // PWM2OFL Bits
3663
3664 extern __at(0x0DA7) __sfr PWM2OFL;
3665
3666 typedef struct
3667 {
3668 unsigned PWM2OFL0 : 1;
3669 unsigned PWM2OFL1 : 1;
3670 unsigned PWM2OFL2 : 1;
3671 unsigned PWM2OFL3 : 1;
3672 unsigned PWM2OFL4 : 1;
3673 unsigned PWM2OFL5 : 1;
3674 unsigned PWM2OFL6 : 1;
3675 unsigned PWM2OFL7 : 1;
3676 } __PWM2OFLbits_t;
3677
3678 extern __at(0x0DA7) volatile __PWM2OFLbits_t PWM2OFLbits;
3679
3680 #define _PWM2OFL0 0x01
3681 #define _PWM2OFL1 0x02
3682 #define _PWM2OFL2 0x04
3683 #define _PWM2OFL3 0x08
3684 #define _PWM2OFL4 0x10
3685 #define _PWM2OFL5 0x20
3686 #define _PWM2OFL6 0x40
3687 #define _PWM2OFL7 0x80
3688
3689 //==============================================================================
3690
3691
3692 //==============================================================================
3693 // PWM2OFH Bits
3694
3695 extern __at(0x0DA8) __sfr PWM2OFH;
3696
3697 typedef struct
3698 {
3699 unsigned PWM2OFH0 : 1;
3700 unsigned PWM2OFH1 : 1;
3701 unsigned PWM2OFH2 : 1;
3702 unsigned PWM2OFH3 : 1;
3703 unsigned PWM2OFH4 : 1;
3704 unsigned PWM2OFH5 : 1;
3705 unsigned PWM2OFH6 : 1;
3706 unsigned PWM2OFH7 : 1;
3707 } __PWM2OFHbits_t;
3708
3709 extern __at(0x0DA8) volatile __PWM2OFHbits_t PWM2OFHbits;
3710
3711 #define _PWM2OFH0 0x01
3712 #define _PWM2OFH1 0x02
3713 #define _PWM2OFH2 0x04
3714 #define _PWM2OFH3 0x08
3715 #define _PWM2OFH4 0x10
3716 #define _PWM2OFH5 0x20
3717 #define _PWM2OFH6 0x40
3718 #define _PWM2OFH7 0x80
3719
3720 //==============================================================================
3721
3722 extern __at(0x0DA9) __sfr PWM2TMR;
3723
3724 //==============================================================================
3725 // PWM2TMRL Bits
3726
3727 extern __at(0x0DA9) __sfr PWM2TMRL;
3728
3729 typedef struct
3730 {
3731 unsigned PWM2TMRL0 : 1;
3732 unsigned PWM2TMRL1 : 1;
3733 unsigned PWM2TMRL2 : 1;
3734 unsigned PWM2TMRL3 : 1;
3735 unsigned PWM2TMRL4 : 1;
3736 unsigned PWM2TMRL5 : 1;
3737 unsigned PWM2TMRL6 : 1;
3738 unsigned PWM2TMRL7 : 1;
3739 } __PWM2TMRLbits_t;
3740
3741 extern __at(0x0DA9) volatile __PWM2TMRLbits_t PWM2TMRLbits;
3742
3743 #define _PWM2TMRL0 0x01
3744 #define _PWM2TMRL1 0x02
3745 #define _PWM2TMRL2 0x04
3746 #define _PWM2TMRL3 0x08
3747 #define _PWM2TMRL4 0x10
3748 #define _PWM2TMRL5 0x20
3749 #define _PWM2TMRL6 0x40
3750 #define _PWM2TMRL7 0x80
3751
3752 //==============================================================================
3753
3754
3755 //==============================================================================
3756 // PWM2TMRH Bits
3757
3758 extern __at(0x0DAA) __sfr PWM2TMRH;
3759
3760 typedef struct
3761 {
3762 unsigned PWM2TMRH0 : 1;
3763 unsigned PWM2TMRH1 : 1;
3764 unsigned PWM2TMRH2 : 1;
3765 unsigned PWM2TMRH3 : 1;
3766 unsigned PWM2TMRH4 : 1;
3767 unsigned PWM2TMRH5 : 1;
3768 unsigned PWM2TMRH6 : 1;
3769 unsigned PWM2TMRH7 : 1;
3770 } __PWM2TMRHbits_t;
3771
3772 extern __at(0x0DAA) volatile __PWM2TMRHbits_t PWM2TMRHbits;
3773
3774 #define _PWM2TMRH0 0x01
3775 #define _PWM2TMRH1 0x02
3776 #define _PWM2TMRH2 0x04
3777 #define _PWM2TMRH3 0x08
3778 #define _PWM2TMRH4 0x10
3779 #define _PWM2TMRH5 0x20
3780 #define _PWM2TMRH6 0x40
3781 #define _PWM2TMRH7 0x80
3782
3783 //==============================================================================
3784
3785
3786 //==============================================================================
3787 // PWM2CON Bits
3788
3789 extern __at(0x0DAB) __sfr PWM2CON;
3790
3791 typedef union
3792 {
3793 struct
3794 {
3795 unsigned : 1;
3796 unsigned : 1;
3797 unsigned PWM2MODE0 : 1;
3798 unsigned PWM2MODE1 : 1;
3799 unsigned POL : 1;
3800 unsigned OUT : 1;
3801 unsigned OE : 1;
3802 unsigned EN : 1;
3803 };
3804
3805 struct
3806 {
3807 unsigned : 1;
3808 unsigned : 1;
3809 unsigned MODE0 : 1;
3810 unsigned MODE1 : 1;
3811 unsigned PWM2POL : 1;
3812 unsigned PWM2OUT : 1;
3813 unsigned PWM2OE : 1;
3814 unsigned PWM2EN : 1;
3815 };
3816
3817 struct
3818 {
3819 unsigned : 2;
3820 unsigned PWM2MODE : 2;
3821 unsigned : 4;
3822 };
3823
3824 struct
3825 {
3826 unsigned : 2;
3827 unsigned MODE : 2;
3828 unsigned : 4;
3829 };
3830 } __PWM2CONbits_t;
3831
3832 extern __at(0x0DAB) volatile __PWM2CONbits_t PWM2CONbits;
3833
3834 #define _PWM2CON_PWM2MODE0 0x04
3835 #define _PWM2CON_MODE0 0x04
3836 #define _PWM2CON_PWM2MODE1 0x08
3837 #define _PWM2CON_MODE1 0x08
3838 #define _PWM2CON_POL 0x10
3839 #define _PWM2CON_PWM2POL 0x10
3840 #define _PWM2CON_OUT 0x20
3841 #define _PWM2CON_PWM2OUT 0x20
3842 #define _PWM2CON_OE 0x40
3843 #define _PWM2CON_PWM2OE 0x40
3844 #define _PWM2CON_EN 0x80
3845 #define _PWM2CON_PWM2EN 0x80
3846
3847 //==============================================================================
3848
3849
3850 //==============================================================================
3851 // PWM2INTCON Bits
3852
3853 extern __at(0x0DAC) __sfr PWM2INTCON;
3854
3855 typedef union
3856 {
3857 struct
3858 {
3859 unsigned PRIE : 1;
3860 unsigned DCIE : 1;
3861 unsigned PHIE : 1;
3862 unsigned OFIE : 1;
3863 unsigned : 1;
3864 unsigned : 1;
3865 unsigned : 1;
3866 unsigned : 1;
3867 };
3868
3869 struct
3870 {
3871 unsigned PWM2PRIE : 1;
3872 unsigned PWM2DCIE : 1;
3873 unsigned PWM2PHIE : 1;
3874 unsigned PWM2OFIE : 1;
3875 unsigned : 1;
3876 unsigned : 1;
3877 unsigned : 1;
3878 unsigned : 1;
3879 };
3880 } __PWM2INTCONbits_t;
3881
3882 extern __at(0x0DAC) volatile __PWM2INTCONbits_t PWM2INTCONbits;
3883
3884 #define _PWM2INTCON_PRIE 0x01
3885 #define _PWM2INTCON_PWM2PRIE 0x01
3886 #define _PWM2INTCON_DCIE 0x02
3887 #define _PWM2INTCON_PWM2DCIE 0x02
3888 #define _PWM2INTCON_PHIE 0x04
3889 #define _PWM2INTCON_PWM2PHIE 0x04
3890 #define _PWM2INTCON_OFIE 0x08
3891 #define _PWM2INTCON_PWM2OFIE 0x08
3892
3893 //==============================================================================
3894
3895
3896 //==============================================================================
3897 // PWM2INTE Bits
3898
3899 extern __at(0x0DAC) __sfr PWM2INTE;
3900
3901 typedef union
3902 {
3903 struct
3904 {
3905 unsigned PRIE : 1;
3906 unsigned DCIE : 1;
3907 unsigned PHIE : 1;
3908 unsigned OFIE : 1;
3909 unsigned : 1;
3910 unsigned : 1;
3911 unsigned : 1;
3912 unsigned : 1;
3913 };
3914
3915 struct
3916 {
3917 unsigned PWM2PRIE : 1;
3918 unsigned PWM2DCIE : 1;
3919 unsigned PWM2PHIE : 1;
3920 unsigned PWM2OFIE : 1;
3921 unsigned : 1;
3922 unsigned : 1;
3923 unsigned : 1;
3924 unsigned : 1;
3925 };
3926 } __PWM2INTEbits_t;
3927
3928 extern __at(0x0DAC) volatile __PWM2INTEbits_t PWM2INTEbits;
3929
3930 #define _PWM2INTE_PRIE 0x01
3931 #define _PWM2INTE_PWM2PRIE 0x01
3932 #define _PWM2INTE_DCIE 0x02
3933 #define _PWM2INTE_PWM2DCIE 0x02
3934 #define _PWM2INTE_PHIE 0x04
3935 #define _PWM2INTE_PWM2PHIE 0x04
3936 #define _PWM2INTE_OFIE 0x08
3937 #define _PWM2INTE_PWM2OFIE 0x08
3938
3939 //==============================================================================
3940
3941
3942 //==============================================================================
3943 // PWM2INTF Bits
3944
3945 extern __at(0x0DAD) __sfr PWM2INTF;
3946
3947 typedef union
3948 {
3949 struct
3950 {
3951 unsigned PRIF : 1;
3952 unsigned DCIF : 1;
3953 unsigned PHIF : 1;
3954 unsigned OFIF : 1;
3955 unsigned : 1;
3956 unsigned : 1;
3957 unsigned : 1;
3958 unsigned : 1;
3959 };
3960
3961 struct
3962 {
3963 unsigned PWM2PRIF : 1;
3964 unsigned PWM2DCIF : 1;
3965 unsigned PWM2PHIF : 1;
3966 unsigned PWM2OFIF : 1;
3967 unsigned : 1;
3968 unsigned : 1;
3969 unsigned : 1;
3970 unsigned : 1;
3971 };
3972 } __PWM2INTFbits_t;
3973
3974 extern __at(0x0DAD) volatile __PWM2INTFbits_t PWM2INTFbits;
3975
3976 #define _PWM2INTF_PRIF 0x01
3977 #define _PWM2INTF_PWM2PRIF 0x01
3978 #define _PWM2INTF_DCIF 0x02
3979 #define _PWM2INTF_PWM2DCIF 0x02
3980 #define _PWM2INTF_PHIF 0x04
3981 #define _PWM2INTF_PWM2PHIF 0x04
3982 #define _PWM2INTF_OFIF 0x08
3983 #define _PWM2INTF_PWM2OFIF 0x08
3984
3985 //==============================================================================
3986
3987
3988 //==============================================================================
3989 // PWM2INTFLG Bits
3990
3991 extern __at(0x0DAD) __sfr PWM2INTFLG;
3992
3993 typedef union
3994 {
3995 struct
3996 {
3997 unsigned PRIF : 1;
3998 unsigned DCIF : 1;
3999 unsigned PHIF : 1;
4000 unsigned OFIF : 1;
4001 unsigned : 1;
4002 unsigned : 1;
4003 unsigned : 1;
4004 unsigned : 1;
4005 };
4006
4007 struct
4008 {
4009 unsigned PWM2PRIF : 1;
4010 unsigned PWM2DCIF : 1;
4011 unsigned PWM2PHIF : 1;
4012 unsigned PWM2OFIF : 1;
4013 unsigned : 1;
4014 unsigned : 1;
4015 unsigned : 1;
4016 unsigned : 1;
4017 };
4018 } __PWM2INTFLGbits_t;
4019
4020 extern __at(0x0DAD) volatile __PWM2INTFLGbits_t PWM2INTFLGbits;
4021
4022 #define _PWM2INTFLG_PRIF 0x01
4023 #define _PWM2INTFLG_PWM2PRIF 0x01
4024 #define _PWM2INTFLG_DCIF 0x02
4025 #define _PWM2INTFLG_PWM2DCIF 0x02
4026 #define _PWM2INTFLG_PHIF 0x04
4027 #define _PWM2INTFLG_PWM2PHIF 0x04
4028 #define _PWM2INTFLG_OFIF 0x08
4029 #define _PWM2INTFLG_PWM2OFIF 0x08
4030
4031 //==============================================================================
4032
4033
4034 //==============================================================================
4035 // PWM2CLKCON Bits
4036
4037 extern __at(0x0DAE) __sfr PWM2CLKCON;
4038
4039 typedef union
4040 {
4041 struct
4042 {
4043 unsigned PWM2CS0 : 1;
4044 unsigned PWM2CS1 : 1;
4045 unsigned : 1;
4046 unsigned : 1;
4047 unsigned PWM2PS0 : 1;
4048 unsigned PWM2PS1 : 1;
4049 unsigned PWM2PS2 : 1;
4050 unsigned : 1;
4051 };
4052
4053 struct
4054 {
4055 unsigned CS0 : 1;
4056 unsigned CS1 : 1;
4057 unsigned : 1;
4058 unsigned : 1;
4059 unsigned PS0 : 1;
4060 unsigned PS1 : 1;
4061 unsigned PS2 : 1;
4062 unsigned : 1;
4063 };
4064
4065 struct
4066 {
4067 unsigned CS : 2;
4068 unsigned : 6;
4069 };
4070
4071 struct
4072 {
4073 unsigned PWM2CS : 2;
4074 unsigned : 6;
4075 };
4076
4077 struct
4078 {
4079 unsigned : 4;
4080 unsigned PS : 3;
4081 unsigned : 1;
4082 };
4083
4084 struct
4085 {
4086 unsigned : 4;
4087 unsigned PWM2PS : 3;
4088 unsigned : 1;
4089 };
4090 } __PWM2CLKCONbits_t;
4091
4092 extern __at(0x0DAE) volatile __PWM2CLKCONbits_t PWM2CLKCONbits;
4093
4094 #define _PWM2CLKCON_PWM2CS0 0x01
4095 #define _PWM2CLKCON_CS0 0x01
4096 #define _PWM2CLKCON_PWM2CS1 0x02
4097 #define _PWM2CLKCON_CS1 0x02
4098 #define _PWM2CLKCON_PWM2PS0 0x10
4099 #define _PWM2CLKCON_PS0 0x10
4100 #define _PWM2CLKCON_PWM2PS1 0x20
4101 #define _PWM2CLKCON_PS1 0x20
4102 #define _PWM2CLKCON_PWM2PS2 0x40
4103 #define _PWM2CLKCON_PS2 0x40
4104
4105 //==============================================================================
4106
4107
4108 //==============================================================================
4109 // PWM2LDCON Bits
4110
4111 extern __at(0x0DAF) __sfr PWM2LDCON;
4112
4113 typedef union
4114 {
4115 struct
4116 {
4117 unsigned PWM2LDS0 : 1;
4118 unsigned PWM2LDS1 : 1;
4119 unsigned : 1;
4120 unsigned : 1;
4121 unsigned : 1;
4122 unsigned : 1;
4123 unsigned LDT : 1;
4124 unsigned LDA : 1;
4125 };
4126
4127 struct
4128 {
4129 unsigned LDS0 : 1;
4130 unsigned LDS1 : 1;
4131 unsigned : 1;
4132 unsigned : 1;
4133 unsigned : 1;
4134 unsigned : 1;
4135 unsigned PWM2LDM : 1;
4136 unsigned PWM2LD : 1;
4137 };
4138
4139 struct
4140 {
4141 unsigned LDS : 2;
4142 unsigned : 6;
4143 };
4144
4145 struct
4146 {
4147 unsigned PWM2LDS : 2;
4148 unsigned : 6;
4149 };
4150 } __PWM2LDCONbits_t;
4151
4152 extern __at(0x0DAF) volatile __PWM2LDCONbits_t PWM2LDCONbits;
4153
4154 #define _PWM2LDCON_PWM2LDS0 0x01
4155 #define _PWM2LDCON_LDS0 0x01
4156 #define _PWM2LDCON_PWM2LDS1 0x02
4157 #define _PWM2LDCON_LDS1 0x02
4158 #define _PWM2LDCON_LDT 0x40
4159 #define _PWM2LDCON_PWM2LDM 0x40
4160 #define _PWM2LDCON_LDA 0x80
4161 #define _PWM2LDCON_PWM2LD 0x80
4162
4163 //==============================================================================
4164
4165
4166 //==============================================================================
4167 // PWM2OFCON Bits
4168
4169 extern __at(0x0DB0) __sfr PWM2OFCON;
4170
4171 typedef union
4172 {
4173 struct
4174 {
4175 unsigned PWM2OFS0 : 1;
4176 unsigned PWM2OFS1 : 1;
4177 unsigned : 1;
4178 unsigned : 1;
4179 unsigned OFO : 1;
4180 unsigned PWM2OFM0 : 1;
4181 unsigned PWM2OFM1 : 1;
4182 unsigned : 1;
4183 };
4184
4185 struct
4186 {
4187 unsigned OFS0 : 1;
4188 unsigned OFS1 : 1;
4189 unsigned : 1;
4190 unsigned : 1;
4191 unsigned PWM2OFMC : 1;
4192 unsigned OFM0 : 1;
4193 unsigned OFM1 : 1;
4194 unsigned : 1;
4195 };
4196
4197 struct
4198 {
4199 unsigned OFS : 2;
4200 unsigned : 6;
4201 };
4202
4203 struct
4204 {
4205 unsigned PWM2OFS : 2;
4206 unsigned : 6;
4207 };
4208
4209 struct
4210 {
4211 unsigned : 5;
4212 unsigned OFM : 2;
4213 unsigned : 1;
4214 };
4215
4216 struct
4217 {
4218 unsigned : 5;
4219 unsigned PWM2OFM : 2;
4220 unsigned : 1;
4221 };
4222 } __PWM2OFCONbits_t;
4223
4224 extern __at(0x0DB0) volatile __PWM2OFCONbits_t PWM2OFCONbits;
4225
4226 #define _PWM2OFCON_PWM2OFS0 0x01
4227 #define _PWM2OFCON_OFS0 0x01
4228 #define _PWM2OFCON_PWM2OFS1 0x02
4229 #define _PWM2OFCON_OFS1 0x02
4230 #define _PWM2OFCON_OFO 0x10
4231 #define _PWM2OFCON_PWM2OFMC 0x10
4232 #define _PWM2OFCON_PWM2OFM0 0x20
4233 #define _PWM2OFCON_OFM0 0x20
4234 #define _PWM2OFCON_PWM2OFM1 0x40
4235 #define _PWM2OFCON_OFM1 0x40
4236
4237 //==============================================================================
4238
4239 extern __at(0x0DB1) __sfr PWM3PH;
4240
4241 //==============================================================================
4242 // PWM3PHL Bits
4243
4244 extern __at(0x0DB1) __sfr PWM3PHL;
4245
4246 typedef struct
4247 {
4248 unsigned PWM3PHL0 : 1;
4249 unsigned PWM3PHL1 : 1;
4250 unsigned PWM3PHL2 : 1;
4251 unsigned PWM3PHL3 : 1;
4252 unsigned PWM3PHL4 : 1;
4253 unsigned PWM3PHL5 : 1;
4254 unsigned PWM3PHL6 : 1;
4255 unsigned PWM3PHL7 : 1;
4256 } __PWM3PHLbits_t;
4257
4258 extern __at(0x0DB1) volatile __PWM3PHLbits_t PWM3PHLbits;
4259
4260 #define _PWM3PHL0 0x01
4261 #define _PWM3PHL1 0x02
4262 #define _PWM3PHL2 0x04
4263 #define _PWM3PHL3 0x08
4264 #define _PWM3PHL4 0x10
4265 #define _PWM3PHL5 0x20
4266 #define _PWM3PHL6 0x40
4267 #define _PWM3PHL7 0x80
4268
4269 //==============================================================================
4270
4271
4272 //==============================================================================
4273 // PWM3PHH Bits
4274
4275 extern __at(0x0DB2) __sfr PWM3PHH;
4276
4277 typedef struct
4278 {
4279 unsigned PWM3PHH0 : 1;
4280 unsigned PWM3PHH1 : 1;
4281 unsigned PWM3PHH2 : 1;
4282 unsigned PWM3PHH3 : 1;
4283 unsigned PWM3PHH4 : 1;
4284 unsigned PWM3PHH5 : 1;
4285 unsigned PWM3PHH6 : 1;
4286 unsigned PWM3PHH7 : 1;
4287 } __PWM3PHHbits_t;
4288
4289 extern __at(0x0DB2) volatile __PWM3PHHbits_t PWM3PHHbits;
4290
4291 #define _PWM3PHH0 0x01
4292 #define _PWM3PHH1 0x02
4293 #define _PWM3PHH2 0x04
4294 #define _PWM3PHH3 0x08
4295 #define _PWM3PHH4 0x10
4296 #define _PWM3PHH5 0x20
4297 #define _PWM3PHH6 0x40
4298 #define _PWM3PHH7 0x80
4299
4300 //==============================================================================
4301
4302 extern __at(0x0DB3) __sfr PWM3DC;
4303
4304 //==============================================================================
4305 // PWM3DCL Bits
4306
4307 extern __at(0x0DB3) __sfr PWM3DCL;
4308
4309 typedef struct
4310 {
4311 unsigned PWM3DCL0 : 1;
4312 unsigned PWM3DCL1 : 1;
4313 unsigned PWM3DCL2 : 1;
4314 unsigned PWM3DCL3 : 1;
4315 unsigned PWM3DCL4 : 1;
4316 unsigned PWM3DCL5 : 1;
4317 unsigned PWM3DCL6 : 1;
4318 unsigned PWM3DCL7 : 1;
4319 } __PWM3DCLbits_t;
4320
4321 extern __at(0x0DB3) volatile __PWM3DCLbits_t PWM3DCLbits;
4322
4323 #define _PWM3DCL0 0x01
4324 #define _PWM3DCL1 0x02
4325 #define _PWM3DCL2 0x04
4326 #define _PWM3DCL3 0x08
4327 #define _PWM3DCL4 0x10
4328 #define _PWM3DCL5 0x20
4329 #define _PWM3DCL6 0x40
4330 #define _PWM3DCL7 0x80
4331
4332 //==============================================================================
4333
4334
4335 //==============================================================================
4336 // PWM3DCH Bits
4337
4338 extern __at(0x0DB4) __sfr PWM3DCH;
4339
4340 typedef struct
4341 {
4342 unsigned PWM3DCH0 : 1;
4343 unsigned PWM3DCH1 : 1;
4344 unsigned PWM3DCH2 : 1;
4345 unsigned PWM3DCH3 : 1;
4346 unsigned PWM3DCH4 : 1;
4347 unsigned PWM3DCH5 : 1;
4348 unsigned PWM3DCH6 : 1;
4349 unsigned PWM3DCH7 : 1;
4350 } __PWM3DCHbits_t;
4351
4352 extern __at(0x0DB4) volatile __PWM3DCHbits_t PWM3DCHbits;
4353
4354 #define _PWM3DCH0 0x01
4355 #define _PWM3DCH1 0x02
4356 #define _PWM3DCH2 0x04
4357 #define _PWM3DCH3 0x08
4358 #define _PWM3DCH4 0x10
4359 #define _PWM3DCH5 0x20
4360 #define _PWM3DCH6 0x40
4361 #define _PWM3DCH7 0x80
4362
4363 //==============================================================================
4364
4365 extern __at(0x0DB5) __sfr PWM3PR;
4366
4367 //==============================================================================
4368 // PWM3PRL Bits
4369
4370 extern __at(0x0DB5) __sfr PWM3PRL;
4371
4372 typedef struct
4373 {
4374 unsigned PWM3PRL0 : 1;
4375 unsigned PWM3PRL1 : 1;
4376 unsigned PWM3PRL2 : 1;
4377 unsigned PWM3PRL3 : 1;
4378 unsigned PWM3PRL4 : 1;
4379 unsigned PWM3PRL5 : 1;
4380 unsigned PWM3PRL6 : 1;
4381 unsigned PWM3PRL7 : 1;
4382 } __PWM3PRLbits_t;
4383
4384 extern __at(0x0DB5) volatile __PWM3PRLbits_t PWM3PRLbits;
4385
4386 #define _PWM3PRL0 0x01
4387 #define _PWM3PRL1 0x02
4388 #define _PWM3PRL2 0x04
4389 #define _PWM3PRL3 0x08
4390 #define _PWM3PRL4 0x10
4391 #define _PWM3PRL5 0x20
4392 #define _PWM3PRL6 0x40
4393 #define _PWM3PRL7 0x80
4394
4395 //==============================================================================
4396
4397
4398 //==============================================================================
4399 // PWM3PRH Bits
4400
4401 extern __at(0x0DB6) __sfr PWM3PRH;
4402
4403 typedef struct
4404 {
4405 unsigned PWM3PRH0 : 1;
4406 unsigned PWM3PRH1 : 1;
4407 unsigned PWM3PRH2 : 1;
4408 unsigned PWM3PRH3 : 1;
4409 unsigned PWM3PRH4 : 1;
4410 unsigned PWM3PRH5 : 1;
4411 unsigned PWM3PRH6 : 1;
4412 unsigned PWM3PRH7 : 1;
4413 } __PWM3PRHbits_t;
4414
4415 extern __at(0x0DB6) volatile __PWM3PRHbits_t PWM3PRHbits;
4416
4417 #define _PWM3PRH0 0x01
4418 #define _PWM3PRH1 0x02
4419 #define _PWM3PRH2 0x04
4420 #define _PWM3PRH3 0x08
4421 #define _PWM3PRH4 0x10
4422 #define _PWM3PRH5 0x20
4423 #define _PWM3PRH6 0x40
4424 #define _PWM3PRH7 0x80
4425
4426 //==============================================================================
4427
4428 extern __at(0x0DB7) __sfr PWM3OF;
4429
4430 //==============================================================================
4431 // PWM3OFL Bits
4432
4433 extern __at(0x0DB7) __sfr PWM3OFL;
4434
4435 typedef struct
4436 {
4437 unsigned PWM3OFL0 : 1;
4438 unsigned PWM3OFL1 : 1;
4439 unsigned PWM3OFL2 : 1;
4440 unsigned PWM3OFL3 : 1;
4441 unsigned PWM3OFL4 : 1;
4442 unsigned PWM3OFL5 : 1;
4443 unsigned PWM3OFL6 : 1;
4444 unsigned PWM3OFL7 : 1;
4445 } __PWM3OFLbits_t;
4446
4447 extern __at(0x0DB7) volatile __PWM3OFLbits_t PWM3OFLbits;
4448
4449 #define _PWM3OFL0 0x01
4450 #define _PWM3OFL1 0x02
4451 #define _PWM3OFL2 0x04
4452 #define _PWM3OFL3 0x08
4453 #define _PWM3OFL4 0x10
4454 #define _PWM3OFL5 0x20
4455 #define _PWM3OFL6 0x40
4456 #define _PWM3OFL7 0x80
4457
4458 //==============================================================================
4459
4460
4461 //==============================================================================
4462 // PWM3OFH Bits
4463
4464 extern __at(0x0DB8) __sfr PWM3OFH;
4465
4466 typedef struct
4467 {
4468 unsigned PWM3OFH0 : 1;
4469 unsigned PWM3OFH1 : 1;
4470 unsigned PWM3OFH2 : 1;
4471 unsigned PWM3OFH3 : 1;
4472 unsigned PWM3OFH4 : 1;
4473 unsigned PWM3OFH5 : 1;
4474 unsigned PWM3OFH6 : 1;
4475 unsigned PWM3OFH7 : 1;
4476 } __PWM3OFHbits_t;
4477
4478 extern __at(0x0DB8) volatile __PWM3OFHbits_t PWM3OFHbits;
4479
4480 #define _PWM3OFH0 0x01
4481 #define _PWM3OFH1 0x02
4482 #define _PWM3OFH2 0x04
4483 #define _PWM3OFH3 0x08
4484 #define _PWM3OFH4 0x10
4485 #define _PWM3OFH5 0x20
4486 #define _PWM3OFH6 0x40
4487 #define _PWM3OFH7 0x80
4488
4489 //==============================================================================
4490
4491 extern __at(0x0DB9) __sfr PWM3TMR;
4492
4493 //==============================================================================
4494 // PWM3TMRL Bits
4495
4496 extern __at(0x0DB9) __sfr PWM3TMRL;
4497
4498 typedef struct
4499 {
4500 unsigned PWM3TMRL0 : 1;
4501 unsigned PWM3TMRL1 : 1;
4502 unsigned PWM3TMRL2 : 1;
4503 unsigned PWM3TMRL3 : 1;
4504 unsigned PWM3TMRL4 : 1;
4505 unsigned PWM3TMRL5 : 1;
4506 unsigned PWM3TMRL6 : 1;
4507 unsigned PWM3TMRL7 : 1;
4508 } __PWM3TMRLbits_t;
4509
4510 extern __at(0x0DB9) volatile __PWM3TMRLbits_t PWM3TMRLbits;
4511
4512 #define _PWM3TMRL0 0x01
4513 #define _PWM3TMRL1 0x02
4514 #define _PWM3TMRL2 0x04
4515 #define _PWM3TMRL3 0x08
4516 #define _PWM3TMRL4 0x10
4517 #define _PWM3TMRL5 0x20
4518 #define _PWM3TMRL6 0x40
4519 #define _PWM3TMRL7 0x80
4520
4521 //==============================================================================
4522
4523
4524 //==============================================================================
4525 // PWM3TMRH Bits
4526
4527 extern __at(0x0DBA) __sfr PWM3TMRH;
4528
4529 typedef struct
4530 {
4531 unsigned PWM3TMRH0 : 1;
4532 unsigned PWM3TMRH1 : 1;
4533 unsigned PWM3TMRH2 : 1;
4534 unsigned PWM3TMRH3 : 1;
4535 unsigned PWM3TMRH4 : 1;
4536 unsigned PWM3TMRH5 : 1;
4537 unsigned PWM3TMRH6 : 1;
4538 unsigned PWM3TMRH7 : 1;
4539 } __PWM3TMRHbits_t;
4540
4541 extern __at(0x0DBA) volatile __PWM3TMRHbits_t PWM3TMRHbits;
4542
4543 #define _PWM3TMRH0 0x01
4544 #define _PWM3TMRH1 0x02
4545 #define _PWM3TMRH2 0x04
4546 #define _PWM3TMRH3 0x08
4547 #define _PWM3TMRH4 0x10
4548 #define _PWM3TMRH5 0x20
4549 #define _PWM3TMRH6 0x40
4550 #define _PWM3TMRH7 0x80
4551
4552 //==============================================================================
4553
4554
4555 //==============================================================================
4556 // PWM3CON Bits
4557
4558 extern __at(0x0DBB) __sfr PWM3CON;
4559
4560 typedef union
4561 {
4562 struct
4563 {
4564 unsigned : 1;
4565 unsigned : 1;
4566 unsigned PWM3MODE0 : 1;
4567 unsigned PWM3MODE1 : 1;
4568 unsigned POL : 1;
4569 unsigned OUT : 1;
4570 unsigned OE : 1;
4571 unsigned EN : 1;
4572 };
4573
4574 struct
4575 {
4576 unsigned : 1;
4577 unsigned : 1;
4578 unsigned MODE0 : 1;
4579 unsigned MODE1 : 1;
4580 unsigned PWM3POL : 1;
4581 unsigned PWM3OUT : 1;
4582 unsigned PWM3OE : 1;
4583 unsigned PWM3EN : 1;
4584 };
4585
4586 struct
4587 {
4588 unsigned : 2;
4589 unsigned MODE : 2;
4590 unsigned : 4;
4591 };
4592
4593 struct
4594 {
4595 unsigned : 2;
4596 unsigned PWM3MODE : 2;
4597 unsigned : 4;
4598 };
4599 } __PWM3CONbits_t;
4600
4601 extern __at(0x0DBB) volatile __PWM3CONbits_t PWM3CONbits;
4602
4603 #define _PWM3CON_PWM3MODE0 0x04
4604 #define _PWM3CON_MODE0 0x04
4605 #define _PWM3CON_PWM3MODE1 0x08
4606 #define _PWM3CON_MODE1 0x08
4607 #define _PWM3CON_POL 0x10
4608 #define _PWM3CON_PWM3POL 0x10
4609 #define _PWM3CON_OUT 0x20
4610 #define _PWM3CON_PWM3OUT 0x20
4611 #define _PWM3CON_OE 0x40
4612 #define _PWM3CON_PWM3OE 0x40
4613 #define _PWM3CON_EN 0x80
4614 #define _PWM3CON_PWM3EN 0x80
4615
4616 //==============================================================================
4617
4618
4619 //==============================================================================
4620 // PWM3INTCON Bits
4621
4622 extern __at(0x0DBC) __sfr PWM3INTCON;
4623
4624 typedef union
4625 {
4626 struct
4627 {
4628 unsigned PRIE : 1;
4629 unsigned DCIE : 1;
4630 unsigned PHIE : 1;
4631 unsigned OFIE : 1;
4632 unsigned : 1;
4633 unsigned : 1;
4634 unsigned : 1;
4635 unsigned : 1;
4636 };
4637
4638 struct
4639 {
4640 unsigned PWM3PRIE : 1;
4641 unsigned PWM3DCIE : 1;
4642 unsigned PWM3PHIE : 1;
4643 unsigned PWM3OFIE : 1;
4644 unsigned : 1;
4645 unsigned : 1;
4646 unsigned : 1;
4647 unsigned : 1;
4648 };
4649 } __PWM3INTCONbits_t;
4650
4651 extern __at(0x0DBC) volatile __PWM3INTCONbits_t PWM3INTCONbits;
4652
4653 #define _PWM3INTCON_PRIE 0x01
4654 #define _PWM3INTCON_PWM3PRIE 0x01
4655 #define _PWM3INTCON_DCIE 0x02
4656 #define _PWM3INTCON_PWM3DCIE 0x02
4657 #define _PWM3INTCON_PHIE 0x04
4658 #define _PWM3INTCON_PWM3PHIE 0x04
4659 #define _PWM3INTCON_OFIE 0x08
4660 #define _PWM3INTCON_PWM3OFIE 0x08
4661
4662 //==============================================================================
4663
4664
4665 //==============================================================================
4666 // PWM3INTE Bits
4667
4668 extern __at(0x0DBC) __sfr PWM3INTE;
4669
4670 typedef union
4671 {
4672 struct
4673 {
4674 unsigned PRIE : 1;
4675 unsigned DCIE : 1;
4676 unsigned PHIE : 1;
4677 unsigned OFIE : 1;
4678 unsigned : 1;
4679 unsigned : 1;
4680 unsigned : 1;
4681 unsigned : 1;
4682 };
4683
4684 struct
4685 {
4686 unsigned PWM3PRIE : 1;
4687 unsigned PWM3DCIE : 1;
4688 unsigned PWM3PHIE : 1;
4689 unsigned PWM3OFIE : 1;
4690 unsigned : 1;
4691 unsigned : 1;
4692 unsigned : 1;
4693 unsigned : 1;
4694 };
4695 } __PWM3INTEbits_t;
4696
4697 extern __at(0x0DBC) volatile __PWM3INTEbits_t PWM3INTEbits;
4698
4699 #define _PWM3INTE_PRIE 0x01
4700 #define _PWM3INTE_PWM3PRIE 0x01
4701 #define _PWM3INTE_DCIE 0x02
4702 #define _PWM3INTE_PWM3DCIE 0x02
4703 #define _PWM3INTE_PHIE 0x04
4704 #define _PWM3INTE_PWM3PHIE 0x04
4705 #define _PWM3INTE_OFIE 0x08
4706 #define _PWM3INTE_PWM3OFIE 0x08
4707
4708 //==============================================================================
4709
4710
4711 //==============================================================================
4712 // PWM3INTF Bits
4713
4714 extern __at(0x0DBD) __sfr PWM3INTF;
4715
4716 typedef union
4717 {
4718 struct
4719 {
4720 unsigned PRIF : 1;
4721 unsigned DCIF : 1;
4722 unsigned PHIF : 1;
4723 unsigned OFIF : 1;
4724 unsigned : 1;
4725 unsigned : 1;
4726 unsigned : 1;
4727 unsigned : 1;
4728 };
4729
4730 struct
4731 {
4732 unsigned PWM3PRIF : 1;
4733 unsigned PWM3DCIF : 1;
4734 unsigned PWM3PHIF : 1;
4735 unsigned PWM3OFIF : 1;
4736 unsigned : 1;
4737 unsigned : 1;
4738 unsigned : 1;
4739 unsigned : 1;
4740 };
4741 } __PWM3INTFbits_t;
4742
4743 extern __at(0x0DBD) volatile __PWM3INTFbits_t PWM3INTFbits;
4744
4745 #define _PWM3INTF_PRIF 0x01
4746 #define _PWM3INTF_PWM3PRIF 0x01
4747 #define _PWM3INTF_DCIF 0x02
4748 #define _PWM3INTF_PWM3DCIF 0x02
4749 #define _PWM3INTF_PHIF 0x04
4750 #define _PWM3INTF_PWM3PHIF 0x04
4751 #define _PWM3INTF_OFIF 0x08
4752 #define _PWM3INTF_PWM3OFIF 0x08
4753
4754 //==============================================================================
4755
4756
4757 //==============================================================================
4758 // PWM3INTFLG Bits
4759
4760 extern __at(0x0DBD) __sfr PWM3INTFLG;
4761
4762 typedef union
4763 {
4764 struct
4765 {
4766 unsigned PRIF : 1;
4767 unsigned DCIF : 1;
4768 unsigned PHIF : 1;
4769 unsigned OFIF : 1;
4770 unsigned : 1;
4771 unsigned : 1;
4772 unsigned : 1;
4773 unsigned : 1;
4774 };
4775
4776 struct
4777 {
4778 unsigned PWM3PRIF : 1;
4779 unsigned PWM3DCIF : 1;
4780 unsigned PWM3PHIF : 1;
4781 unsigned PWM3OFIF : 1;
4782 unsigned : 1;
4783 unsigned : 1;
4784 unsigned : 1;
4785 unsigned : 1;
4786 };
4787 } __PWM3INTFLGbits_t;
4788
4789 extern __at(0x0DBD) volatile __PWM3INTFLGbits_t PWM3INTFLGbits;
4790
4791 #define _PWM3INTFLG_PRIF 0x01
4792 #define _PWM3INTFLG_PWM3PRIF 0x01
4793 #define _PWM3INTFLG_DCIF 0x02
4794 #define _PWM3INTFLG_PWM3DCIF 0x02
4795 #define _PWM3INTFLG_PHIF 0x04
4796 #define _PWM3INTFLG_PWM3PHIF 0x04
4797 #define _PWM3INTFLG_OFIF 0x08
4798 #define _PWM3INTFLG_PWM3OFIF 0x08
4799
4800 //==============================================================================
4801
4802
4803 //==============================================================================
4804 // PWM3CLKCON Bits
4805
4806 extern __at(0x0DBE) __sfr PWM3CLKCON;
4807
4808 typedef union
4809 {
4810 struct
4811 {
4812 unsigned PWM3CS0 : 1;
4813 unsigned PWM3CS1 : 1;
4814 unsigned : 1;
4815 unsigned : 1;
4816 unsigned PWM3PS0 : 1;
4817 unsigned PWM3PS1 : 1;
4818 unsigned PWM3PS2 : 1;
4819 unsigned : 1;
4820 };
4821
4822 struct
4823 {
4824 unsigned CS0 : 1;
4825 unsigned CS1 : 1;
4826 unsigned : 1;
4827 unsigned : 1;
4828 unsigned PS0 : 1;
4829 unsigned PS1 : 1;
4830 unsigned PS2 : 1;
4831 unsigned : 1;
4832 };
4833
4834 struct
4835 {
4836 unsigned PWM3CS : 2;
4837 unsigned : 6;
4838 };
4839
4840 struct
4841 {
4842 unsigned CS : 2;
4843 unsigned : 6;
4844 };
4845
4846 struct
4847 {
4848 unsigned : 4;
4849 unsigned PS : 3;
4850 unsigned : 1;
4851 };
4852
4853 struct
4854 {
4855 unsigned : 4;
4856 unsigned PWM3PS : 3;
4857 unsigned : 1;
4858 };
4859 } __PWM3CLKCONbits_t;
4860
4861 extern __at(0x0DBE) volatile __PWM3CLKCONbits_t PWM3CLKCONbits;
4862
4863 #define _PWM3CLKCON_PWM3CS0 0x01
4864 #define _PWM3CLKCON_CS0 0x01
4865 #define _PWM3CLKCON_PWM3CS1 0x02
4866 #define _PWM3CLKCON_CS1 0x02
4867 #define _PWM3CLKCON_PWM3PS0 0x10
4868 #define _PWM3CLKCON_PS0 0x10
4869 #define _PWM3CLKCON_PWM3PS1 0x20
4870 #define _PWM3CLKCON_PS1 0x20
4871 #define _PWM3CLKCON_PWM3PS2 0x40
4872 #define _PWM3CLKCON_PS2 0x40
4873
4874 //==============================================================================
4875
4876
4877 //==============================================================================
4878 // PWM3LDCON Bits
4879
4880 extern __at(0x0DBF) __sfr PWM3LDCON;
4881
4882 typedef union
4883 {
4884 struct
4885 {
4886 unsigned PWM3LDS0 : 1;
4887 unsigned PWM3LDS1 : 1;
4888 unsigned : 1;
4889 unsigned : 1;
4890 unsigned : 1;
4891 unsigned : 1;
4892 unsigned LDT : 1;
4893 unsigned LDA : 1;
4894 };
4895
4896 struct
4897 {
4898 unsigned LDS0 : 1;
4899 unsigned LDS1 : 1;
4900 unsigned : 1;
4901 unsigned : 1;
4902 unsigned : 1;
4903 unsigned : 1;
4904 unsigned PWM3LDM : 1;
4905 unsigned PWM3LD : 1;
4906 };
4907
4908 struct
4909 {
4910 unsigned LDS : 2;
4911 unsigned : 6;
4912 };
4913
4914 struct
4915 {
4916 unsigned PWM3LDS : 2;
4917 unsigned : 6;
4918 };
4919 } __PWM3LDCONbits_t;
4920
4921 extern __at(0x0DBF) volatile __PWM3LDCONbits_t PWM3LDCONbits;
4922
4923 #define _PWM3LDCON_PWM3LDS0 0x01
4924 #define _PWM3LDCON_LDS0 0x01
4925 #define _PWM3LDCON_PWM3LDS1 0x02
4926 #define _PWM3LDCON_LDS1 0x02
4927 #define _PWM3LDCON_LDT 0x40
4928 #define _PWM3LDCON_PWM3LDM 0x40
4929 #define _PWM3LDCON_LDA 0x80
4930 #define _PWM3LDCON_PWM3LD 0x80
4931
4932 //==============================================================================
4933
4934
4935 //==============================================================================
4936 // PWM3OFCON Bits
4937
4938 extern __at(0x0DC0) __sfr PWM3OFCON;
4939
4940 typedef union
4941 {
4942 struct
4943 {
4944 unsigned PWM3OFS0 : 1;
4945 unsigned PWM3OFS1 : 1;
4946 unsigned : 1;
4947 unsigned : 1;
4948 unsigned OFO : 1;
4949 unsigned PWM3OFM0 : 1;
4950 unsigned PWM3OFM1 : 1;
4951 unsigned : 1;
4952 };
4953
4954 struct
4955 {
4956 unsigned OFS0 : 1;
4957 unsigned OFS1 : 1;
4958 unsigned : 1;
4959 unsigned : 1;
4960 unsigned PWM3OFMC : 1;
4961 unsigned OFM0 : 1;
4962 unsigned OFM1 : 1;
4963 unsigned : 1;
4964 };
4965
4966 struct
4967 {
4968 unsigned OFS : 2;
4969 unsigned : 6;
4970 };
4971
4972 struct
4973 {
4974 unsigned PWM3OFS : 2;
4975 unsigned : 6;
4976 };
4977
4978 struct
4979 {
4980 unsigned : 5;
4981 unsigned OFM : 2;
4982 unsigned : 1;
4983 };
4984
4985 struct
4986 {
4987 unsigned : 5;
4988 unsigned PWM3OFM : 2;
4989 unsigned : 1;
4990 };
4991 } __PWM3OFCONbits_t;
4992
4993 extern __at(0x0DC0) volatile __PWM3OFCONbits_t PWM3OFCONbits;
4994
4995 #define _PWM3OFCON_PWM3OFS0 0x01
4996 #define _PWM3OFCON_OFS0 0x01
4997 #define _PWM3OFCON_PWM3OFS1 0x02
4998 #define _PWM3OFCON_OFS1 0x02
4999 #define _PWM3OFCON_OFO 0x10
5000 #define _PWM3OFCON_PWM3OFMC 0x10
5001 #define _PWM3OFCON_PWM3OFM0 0x20
5002 #define _PWM3OFCON_OFM0 0x20
5003 #define _PWM3OFCON_PWM3OFM1 0x40
5004 #define _PWM3OFCON_OFM1 0x40
5005
5006 //==============================================================================
5007
5008 extern __at(0x0DC1) __sfr PWM4PH;
5009
5010 //==============================================================================
5011 // PWM4PHL Bits
5012
5013 extern __at(0x0DC1) __sfr PWM4PHL;
5014
5015 typedef struct
5016 {
5017 unsigned PWM4PHL0 : 1;
5018 unsigned PWM4PHL1 : 1;
5019 unsigned PWM4PHL2 : 1;
5020 unsigned PWM4PHL3 : 1;
5021 unsigned PWM4PHL4 : 1;
5022 unsigned PWM4PHL5 : 1;
5023 unsigned PWM4PHL6 : 1;
5024 unsigned PWM4PHL7 : 1;
5025 } __PWM4PHLbits_t;
5026
5027 extern __at(0x0DC1) volatile __PWM4PHLbits_t PWM4PHLbits;
5028
5029 #define _PWM4PHL0 0x01
5030 #define _PWM4PHL1 0x02
5031 #define _PWM4PHL2 0x04
5032 #define _PWM4PHL3 0x08
5033 #define _PWM4PHL4 0x10
5034 #define _PWM4PHL5 0x20
5035 #define _PWM4PHL6 0x40
5036 #define _PWM4PHL7 0x80
5037
5038 //==============================================================================
5039
5040
5041 //==============================================================================
5042 // PWM4PHH Bits
5043
5044 extern __at(0x0DC2) __sfr PWM4PHH;
5045
5046 typedef struct
5047 {
5048 unsigned PWM4PHH0 : 1;
5049 unsigned PWM4PHH1 : 1;
5050 unsigned PWM4PHH2 : 1;
5051 unsigned PWM4PHH3 : 1;
5052 unsigned PWM4PHH4 : 1;
5053 unsigned PWM4PHH5 : 1;
5054 unsigned PWM4PHH6 : 1;
5055 unsigned PWM4PHH7 : 1;
5056 } __PWM4PHHbits_t;
5057
5058 extern __at(0x0DC2) volatile __PWM4PHHbits_t PWM4PHHbits;
5059
5060 #define _PWM4PHH0 0x01
5061 #define _PWM4PHH1 0x02
5062 #define _PWM4PHH2 0x04
5063 #define _PWM4PHH3 0x08
5064 #define _PWM4PHH4 0x10
5065 #define _PWM4PHH5 0x20
5066 #define _PWM4PHH6 0x40
5067 #define _PWM4PHH7 0x80
5068
5069 //==============================================================================
5070
5071 extern __at(0x0DC3) __sfr PWM4DC;
5072
5073 //==============================================================================
5074 // PWM4DCL Bits
5075
5076 extern __at(0x0DC3) __sfr PWM4DCL;
5077
5078 typedef struct
5079 {
5080 unsigned PWM4DCL0 : 1;
5081 unsigned PWM4DCL1 : 1;
5082 unsigned PWM4DCL2 : 1;
5083 unsigned PWM4DCL3 : 1;
5084 unsigned PWM4DCL4 : 1;
5085 unsigned PWM4DCL5 : 1;
5086 unsigned PWM4DCL6 : 1;
5087 unsigned PWM4DCL7 : 1;
5088 } __PWM4DCLbits_t;
5089
5090 extern __at(0x0DC3) volatile __PWM4DCLbits_t PWM4DCLbits;
5091
5092 #define _PWM4DCL0 0x01
5093 #define _PWM4DCL1 0x02
5094 #define _PWM4DCL2 0x04
5095 #define _PWM4DCL3 0x08
5096 #define _PWM4DCL4 0x10
5097 #define _PWM4DCL5 0x20
5098 #define _PWM4DCL6 0x40
5099 #define _PWM4DCL7 0x80
5100
5101 //==============================================================================
5102
5103
5104 //==============================================================================
5105 // PWM4DCH Bits
5106
5107 extern __at(0x0DC4) __sfr PWM4DCH;
5108
5109 typedef struct
5110 {
5111 unsigned PWM4DCH0 : 1;
5112 unsigned PWM4DCH1 : 1;
5113 unsigned PWM4DCH2 : 1;
5114 unsigned PWM4DCH3 : 1;
5115 unsigned PWM4DCH4 : 1;
5116 unsigned PWM4DCH5 : 1;
5117 unsigned PWM4DCH6 : 1;
5118 unsigned PWM4DCH7 : 1;
5119 } __PWM4DCHbits_t;
5120
5121 extern __at(0x0DC4) volatile __PWM4DCHbits_t PWM4DCHbits;
5122
5123 #define _PWM4DCH0 0x01
5124 #define _PWM4DCH1 0x02
5125 #define _PWM4DCH2 0x04
5126 #define _PWM4DCH3 0x08
5127 #define _PWM4DCH4 0x10
5128 #define _PWM4DCH5 0x20
5129 #define _PWM4DCH6 0x40
5130 #define _PWM4DCH7 0x80
5131
5132 //==============================================================================
5133
5134 extern __at(0x0DC5) __sfr PWM4PR;
5135
5136 //==============================================================================
5137 // PWM4PRL Bits
5138
5139 extern __at(0x0DC5) __sfr PWM4PRL;
5140
5141 typedef struct
5142 {
5143 unsigned PWM4PRL0 : 1;
5144 unsigned PWM4PRL1 : 1;
5145 unsigned PWM4PRL2 : 1;
5146 unsigned PWM4PRL3 : 1;
5147 unsigned PWM4PRL4 : 1;
5148 unsigned PWM4PRL5 : 1;
5149 unsigned PWM4PRL6 : 1;
5150 unsigned PWM4PRL7 : 1;
5151 } __PWM4PRLbits_t;
5152
5153 extern __at(0x0DC5) volatile __PWM4PRLbits_t PWM4PRLbits;
5154
5155 #define _PWM4PRL0 0x01
5156 #define _PWM4PRL1 0x02
5157 #define _PWM4PRL2 0x04
5158 #define _PWM4PRL3 0x08
5159 #define _PWM4PRL4 0x10
5160 #define _PWM4PRL5 0x20
5161 #define _PWM4PRL6 0x40
5162 #define _PWM4PRL7 0x80
5163
5164 //==============================================================================
5165
5166
5167 //==============================================================================
5168 // PWM4PRH Bits
5169
5170 extern __at(0x0DC6) __sfr PWM4PRH;
5171
5172 typedef struct
5173 {
5174 unsigned PWM4PRH0 : 1;
5175 unsigned PWM4PRH1 : 1;
5176 unsigned PWM4PRH2 : 1;
5177 unsigned PWM4PRH3 : 1;
5178 unsigned PWM4PRH4 : 1;
5179 unsigned PWM4PRH5 : 1;
5180 unsigned PWM4PRH6 : 1;
5181 unsigned PWM4PRH7 : 1;
5182 } __PWM4PRHbits_t;
5183
5184 extern __at(0x0DC6) volatile __PWM4PRHbits_t PWM4PRHbits;
5185
5186 #define _PWM4PRH0 0x01
5187 #define _PWM4PRH1 0x02
5188 #define _PWM4PRH2 0x04
5189 #define _PWM4PRH3 0x08
5190 #define _PWM4PRH4 0x10
5191 #define _PWM4PRH5 0x20
5192 #define _PWM4PRH6 0x40
5193 #define _PWM4PRH7 0x80
5194
5195 //==============================================================================
5196
5197 extern __at(0x0DC7) __sfr PWM4OF;
5198
5199 //==============================================================================
5200 // PWM4OFL Bits
5201
5202 extern __at(0x0DC7) __sfr PWM4OFL;
5203
5204 typedef struct
5205 {
5206 unsigned PWM4OFL0 : 1;
5207 unsigned PWM4OFL1 : 1;
5208 unsigned PWM4OFL2 : 1;
5209 unsigned PWM4OFL3 : 1;
5210 unsigned PWM4OFL4 : 1;
5211 unsigned PWM4OFL5 : 1;
5212 unsigned PWM4OFL6 : 1;
5213 unsigned PWM4OFL7 : 1;
5214 } __PWM4OFLbits_t;
5215
5216 extern __at(0x0DC7) volatile __PWM4OFLbits_t PWM4OFLbits;
5217
5218 #define _PWM4OFL0 0x01
5219 #define _PWM4OFL1 0x02
5220 #define _PWM4OFL2 0x04
5221 #define _PWM4OFL3 0x08
5222 #define _PWM4OFL4 0x10
5223 #define _PWM4OFL5 0x20
5224 #define _PWM4OFL6 0x40
5225 #define _PWM4OFL7 0x80
5226
5227 //==============================================================================
5228
5229
5230 //==============================================================================
5231 // PWM4OFH Bits
5232
5233 extern __at(0x0DC8) __sfr PWM4OFH;
5234
5235 typedef struct
5236 {
5237 unsigned PWM4OFH0 : 1;
5238 unsigned PWM4OFH1 : 1;
5239 unsigned PWM4OFH2 : 1;
5240 unsigned PWM4OFH3 : 1;
5241 unsigned PWM4OFH4 : 1;
5242 unsigned PWM4OFH5 : 1;
5243 unsigned PWM4OFH6 : 1;
5244 unsigned PWM4OFH7 : 1;
5245 } __PWM4OFHbits_t;
5246
5247 extern __at(0x0DC8) volatile __PWM4OFHbits_t PWM4OFHbits;
5248
5249 #define _PWM4OFH0 0x01
5250 #define _PWM4OFH1 0x02
5251 #define _PWM4OFH2 0x04
5252 #define _PWM4OFH3 0x08
5253 #define _PWM4OFH4 0x10
5254 #define _PWM4OFH5 0x20
5255 #define _PWM4OFH6 0x40
5256 #define _PWM4OFH7 0x80
5257
5258 //==============================================================================
5259
5260 extern __at(0x0DC9) __sfr PWM4TMR;
5261
5262 //==============================================================================
5263 // PWM4TMRL Bits
5264
5265 extern __at(0x0DC9) __sfr PWM4TMRL;
5266
5267 typedef struct
5268 {
5269 unsigned PWM4TMRL0 : 1;
5270 unsigned PWM4TMRL1 : 1;
5271 unsigned PWM4TMRL2 : 1;
5272 unsigned PWM4TMRL3 : 1;
5273 unsigned PWM4TMRL4 : 1;
5274 unsigned PWM4TMRL5 : 1;
5275 unsigned PWM4TMRL6 : 1;
5276 unsigned PWM4TMRL7 : 1;
5277 } __PWM4TMRLbits_t;
5278
5279 extern __at(0x0DC9) volatile __PWM4TMRLbits_t PWM4TMRLbits;
5280
5281 #define _PWM4TMRL0 0x01
5282 #define _PWM4TMRL1 0x02
5283 #define _PWM4TMRL2 0x04
5284 #define _PWM4TMRL3 0x08
5285 #define _PWM4TMRL4 0x10
5286 #define _PWM4TMRL5 0x20
5287 #define _PWM4TMRL6 0x40
5288 #define _PWM4TMRL7 0x80
5289
5290 //==============================================================================
5291
5292
5293 //==============================================================================
5294 // PWM4TMRH Bits
5295
5296 extern __at(0x0DCA) __sfr PWM4TMRH;
5297
5298 typedef struct
5299 {
5300 unsigned PWM4TMRH0 : 1;
5301 unsigned PWM4TMRH1 : 1;
5302 unsigned PWM4TMRH2 : 1;
5303 unsigned PWM4TMRH3 : 1;
5304 unsigned PWM4TMRH4 : 1;
5305 unsigned PWM4TMRH5 : 1;
5306 unsigned PWM4TMRH6 : 1;
5307 unsigned PWM4TMRH7 : 1;
5308 } __PWM4TMRHbits_t;
5309
5310 extern __at(0x0DCA) volatile __PWM4TMRHbits_t PWM4TMRHbits;
5311
5312 #define _PWM4TMRH0 0x01
5313 #define _PWM4TMRH1 0x02
5314 #define _PWM4TMRH2 0x04
5315 #define _PWM4TMRH3 0x08
5316 #define _PWM4TMRH4 0x10
5317 #define _PWM4TMRH5 0x20
5318 #define _PWM4TMRH6 0x40
5319 #define _PWM4TMRH7 0x80
5320
5321 //==============================================================================
5322
5323
5324 //==============================================================================
5325 // PWM4CON Bits
5326
5327 extern __at(0x0DCB) __sfr PWM4CON;
5328
5329 typedef union
5330 {
5331 struct
5332 {
5333 unsigned : 1;
5334 unsigned : 1;
5335 unsigned PWM4MODE0 : 1;
5336 unsigned PWM4MODE1 : 1;
5337 unsigned POL : 1;
5338 unsigned OUT : 1;
5339 unsigned OE : 1;
5340 unsigned EN : 1;
5341 };
5342
5343 struct
5344 {
5345 unsigned : 1;
5346 unsigned : 1;
5347 unsigned MODE0 : 1;
5348 unsigned MODE1 : 1;
5349 unsigned PWM4POL : 1;
5350 unsigned PWM4OUT : 1;
5351 unsigned PWM4OE : 1;
5352 unsigned PWM4EN : 1;
5353 };
5354
5355 struct
5356 {
5357 unsigned : 2;
5358 unsigned MODE : 2;
5359 unsigned : 4;
5360 };
5361
5362 struct
5363 {
5364 unsigned : 2;
5365 unsigned PWM4MODE : 2;
5366 unsigned : 4;
5367 };
5368 } __PWM4CONbits_t;
5369
5370 extern __at(0x0DCB) volatile __PWM4CONbits_t PWM4CONbits;
5371
5372 #define _PWM4CON_PWM4MODE0 0x04
5373 #define _PWM4CON_MODE0 0x04
5374 #define _PWM4CON_PWM4MODE1 0x08
5375 #define _PWM4CON_MODE1 0x08
5376 #define _PWM4CON_POL 0x10
5377 #define _PWM4CON_PWM4POL 0x10
5378 #define _PWM4CON_OUT 0x20
5379 #define _PWM4CON_PWM4OUT 0x20
5380 #define _PWM4CON_OE 0x40
5381 #define _PWM4CON_PWM4OE 0x40
5382 #define _PWM4CON_EN 0x80
5383 #define _PWM4CON_PWM4EN 0x80
5384
5385 //==============================================================================
5386
5387
5388 //==============================================================================
5389 // PWM4INTCON Bits
5390
5391 extern __at(0x0DCC) __sfr PWM4INTCON;
5392
5393 typedef union
5394 {
5395 struct
5396 {
5397 unsigned PRIE : 1;
5398 unsigned DCIE : 1;
5399 unsigned PHIE : 1;
5400 unsigned OFIE : 1;
5401 unsigned : 1;
5402 unsigned : 1;
5403 unsigned : 1;
5404 unsigned : 1;
5405 };
5406
5407 struct
5408 {
5409 unsigned PWM4PRIE : 1;
5410 unsigned PWM4DCIE : 1;
5411 unsigned PWM4PHIE : 1;
5412 unsigned PWM4OFIE : 1;
5413 unsigned : 1;
5414 unsigned : 1;
5415 unsigned : 1;
5416 unsigned : 1;
5417 };
5418 } __PWM4INTCONbits_t;
5419
5420 extern __at(0x0DCC) volatile __PWM4INTCONbits_t PWM4INTCONbits;
5421
5422 #define _PWM4INTCON_PRIE 0x01
5423 #define _PWM4INTCON_PWM4PRIE 0x01
5424 #define _PWM4INTCON_DCIE 0x02
5425 #define _PWM4INTCON_PWM4DCIE 0x02
5426 #define _PWM4INTCON_PHIE 0x04
5427 #define _PWM4INTCON_PWM4PHIE 0x04
5428 #define _PWM4INTCON_OFIE 0x08
5429 #define _PWM4INTCON_PWM4OFIE 0x08
5430
5431 //==============================================================================
5432
5433
5434 //==============================================================================
5435 // PWM4INTE Bits
5436
5437 extern __at(0x0DCC) __sfr PWM4INTE;
5438
5439 typedef union
5440 {
5441 struct
5442 {
5443 unsigned PRIE : 1;
5444 unsigned DCIE : 1;
5445 unsigned PHIE : 1;
5446 unsigned OFIE : 1;
5447 unsigned : 1;
5448 unsigned : 1;
5449 unsigned : 1;
5450 unsigned : 1;
5451 };
5452
5453 struct
5454 {
5455 unsigned PWM4PRIE : 1;
5456 unsigned PWM4DCIE : 1;
5457 unsigned PWM4PHIE : 1;
5458 unsigned PWM4OFIE : 1;
5459 unsigned : 1;
5460 unsigned : 1;
5461 unsigned : 1;
5462 unsigned : 1;
5463 };
5464 } __PWM4INTEbits_t;
5465
5466 extern __at(0x0DCC) volatile __PWM4INTEbits_t PWM4INTEbits;
5467
5468 #define _PWM4INTE_PRIE 0x01
5469 #define _PWM4INTE_PWM4PRIE 0x01
5470 #define _PWM4INTE_DCIE 0x02
5471 #define _PWM4INTE_PWM4DCIE 0x02
5472 #define _PWM4INTE_PHIE 0x04
5473 #define _PWM4INTE_PWM4PHIE 0x04
5474 #define _PWM4INTE_OFIE 0x08
5475 #define _PWM4INTE_PWM4OFIE 0x08
5476
5477 //==============================================================================
5478
5479
5480 //==============================================================================
5481 // PWM4INTF Bits
5482
5483 extern __at(0x0DCD) __sfr PWM4INTF;
5484
5485 typedef union
5486 {
5487 struct
5488 {
5489 unsigned PRIF : 1;
5490 unsigned DCIF : 1;
5491 unsigned PHIF : 1;
5492 unsigned OFIF : 1;
5493 unsigned : 1;
5494 unsigned : 1;
5495 unsigned : 1;
5496 unsigned : 1;
5497 };
5498
5499 struct
5500 {
5501 unsigned PWM4PRIF : 1;
5502 unsigned PWM4DCIF : 1;
5503 unsigned PWM4PHIF : 1;
5504 unsigned PWM4OFIF : 1;
5505 unsigned : 1;
5506 unsigned : 1;
5507 unsigned : 1;
5508 unsigned : 1;
5509 };
5510 } __PWM4INTFbits_t;
5511
5512 extern __at(0x0DCD) volatile __PWM4INTFbits_t PWM4INTFbits;
5513
5514 #define _PWM4INTF_PRIF 0x01
5515 #define _PWM4INTF_PWM4PRIF 0x01
5516 #define _PWM4INTF_DCIF 0x02
5517 #define _PWM4INTF_PWM4DCIF 0x02
5518 #define _PWM4INTF_PHIF 0x04
5519 #define _PWM4INTF_PWM4PHIF 0x04
5520 #define _PWM4INTF_OFIF 0x08
5521 #define _PWM4INTF_PWM4OFIF 0x08
5522
5523 //==============================================================================
5524
5525
5526 //==============================================================================
5527 // PWM4INTFLG Bits
5528
5529 extern __at(0x0DCD) __sfr PWM4INTFLG;
5530
5531 typedef union
5532 {
5533 struct
5534 {
5535 unsigned PRIF : 1;
5536 unsigned DCIF : 1;
5537 unsigned PHIF : 1;
5538 unsigned OFIF : 1;
5539 unsigned : 1;
5540 unsigned : 1;
5541 unsigned : 1;
5542 unsigned : 1;
5543 };
5544
5545 struct
5546 {
5547 unsigned PWM4PRIF : 1;
5548 unsigned PWM4DCIF : 1;
5549 unsigned PWM4PHIF : 1;
5550 unsigned PWM4OFIF : 1;
5551 unsigned : 1;
5552 unsigned : 1;
5553 unsigned : 1;
5554 unsigned : 1;
5555 };
5556 } __PWM4INTFLGbits_t;
5557
5558 extern __at(0x0DCD) volatile __PWM4INTFLGbits_t PWM4INTFLGbits;
5559
5560 #define _PWM4INTFLG_PRIF 0x01
5561 #define _PWM4INTFLG_PWM4PRIF 0x01
5562 #define _PWM4INTFLG_DCIF 0x02
5563 #define _PWM4INTFLG_PWM4DCIF 0x02
5564 #define _PWM4INTFLG_PHIF 0x04
5565 #define _PWM4INTFLG_PWM4PHIF 0x04
5566 #define _PWM4INTFLG_OFIF 0x08
5567 #define _PWM4INTFLG_PWM4OFIF 0x08
5568
5569 //==============================================================================
5570
5571
5572 //==============================================================================
5573 // PWM4CLKCON Bits
5574
5575 extern __at(0x0DCE) __sfr PWM4CLKCON;
5576
5577 typedef union
5578 {
5579 struct
5580 {
5581 unsigned PWM4CS0 : 1;
5582 unsigned PWM4CS1 : 1;
5583 unsigned : 1;
5584 unsigned : 1;
5585 unsigned PWM4PS0 : 1;
5586 unsigned PWM4PS1 : 1;
5587 unsigned PWM4PS2 : 1;
5588 unsigned : 1;
5589 };
5590
5591 struct
5592 {
5593 unsigned CS0 : 1;
5594 unsigned CS1 : 1;
5595 unsigned : 1;
5596 unsigned : 1;
5597 unsigned PS0 : 1;
5598 unsigned PS1 : 1;
5599 unsigned PS2 : 1;
5600 unsigned : 1;
5601 };
5602
5603 struct
5604 {
5605 unsigned PWM4CS : 2;
5606 unsigned : 6;
5607 };
5608
5609 struct
5610 {
5611 unsigned CS : 2;
5612 unsigned : 6;
5613 };
5614
5615 struct
5616 {
5617 unsigned : 4;
5618 unsigned PS : 3;
5619 unsigned : 1;
5620 };
5621
5622 struct
5623 {
5624 unsigned : 4;
5625 unsigned PWM4PS : 3;
5626 unsigned : 1;
5627 };
5628 } __PWM4CLKCONbits_t;
5629
5630 extern __at(0x0DCE) volatile __PWM4CLKCONbits_t PWM4CLKCONbits;
5631
5632 #define _PWM4CLKCON_PWM4CS0 0x01
5633 #define _PWM4CLKCON_CS0 0x01
5634 #define _PWM4CLKCON_PWM4CS1 0x02
5635 #define _PWM4CLKCON_CS1 0x02
5636 #define _PWM4CLKCON_PWM4PS0 0x10
5637 #define _PWM4CLKCON_PS0 0x10
5638 #define _PWM4CLKCON_PWM4PS1 0x20
5639 #define _PWM4CLKCON_PS1 0x20
5640 #define _PWM4CLKCON_PWM4PS2 0x40
5641 #define _PWM4CLKCON_PS2 0x40
5642
5643 //==============================================================================
5644
5645
5646 //==============================================================================
5647 // PWM4LDCON Bits
5648
5649 extern __at(0x0DCF) __sfr PWM4LDCON;
5650
5651 typedef union
5652 {
5653 struct
5654 {
5655 unsigned PWM4LDS0 : 1;
5656 unsigned PWM4LDS1 : 1;
5657 unsigned : 1;
5658 unsigned : 1;
5659 unsigned : 1;
5660 unsigned : 1;
5661 unsigned LDT : 1;
5662 unsigned LDA : 1;
5663 };
5664
5665 struct
5666 {
5667 unsigned LDS0 : 1;
5668 unsigned LDS1 : 1;
5669 unsigned : 1;
5670 unsigned : 1;
5671 unsigned : 1;
5672 unsigned : 1;
5673 unsigned PWM4LDM : 1;
5674 unsigned PWM4LD : 1;
5675 };
5676
5677 struct
5678 {
5679 unsigned LDS : 2;
5680 unsigned : 6;
5681 };
5682
5683 struct
5684 {
5685 unsigned PWM4LDS : 2;
5686 unsigned : 6;
5687 };
5688 } __PWM4LDCONbits_t;
5689
5690 extern __at(0x0DCF) volatile __PWM4LDCONbits_t PWM4LDCONbits;
5691
5692 #define _PWM4LDCON_PWM4LDS0 0x01
5693 #define _PWM4LDCON_LDS0 0x01
5694 #define _PWM4LDCON_PWM4LDS1 0x02
5695 #define _PWM4LDCON_LDS1 0x02
5696 #define _PWM4LDCON_LDT 0x40
5697 #define _PWM4LDCON_PWM4LDM 0x40
5698 #define _PWM4LDCON_LDA 0x80
5699 #define _PWM4LDCON_PWM4LD 0x80
5700
5701 //==============================================================================
5702
5703
5704 //==============================================================================
5705 // PWM4OFCON Bits
5706
5707 extern __at(0x0DD0) __sfr PWM4OFCON;
5708
5709 typedef union
5710 {
5711 struct
5712 {
5713 unsigned PWM4OFS0 : 1;
5714 unsigned PWM4OFS1 : 1;
5715 unsigned : 1;
5716 unsigned : 1;
5717 unsigned OFO : 1;
5718 unsigned PWM4OFM0 : 1;
5719 unsigned PWM4OFM1 : 1;
5720 unsigned : 1;
5721 };
5722
5723 struct
5724 {
5725 unsigned OFS0 : 1;
5726 unsigned OFS1 : 1;
5727 unsigned : 1;
5728 unsigned : 1;
5729 unsigned PWM4OFMC : 1;
5730 unsigned OFM0 : 1;
5731 unsigned OFM1 : 1;
5732 unsigned : 1;
5733 };
5734
5735 struct
5736 {
5737 unsigned PWM4OFS : 2;
5738 unsigned : 6;
5739 };
5740
5741 struct
5742 {
5743 unsigned OFS : 2;
5744 unsigned : 6;
5745 };
5746
5747 struct
5748 {
5749 unsigned : 5;
5750 unsigned PWM4OFM : 2;
5751 unsigned : 1;
5752 };
5753
5754 struct
5755 {
5756 unsigned : 5;
5757 unsigned OFM : 2;
5758 unsigned : 1;
5759 };
5760 } __PWM4OFCONbits_t;
5761
5762 extern __at(0x0DD0) volatile __PWM4OFCONbits_t PWM4OFCONbits;
5763
5764 #define _PWM4OFCON_PWM4OFS0 0x01
5765 #define _PWM4OFCON_OFS0 0x01
5766 #define _PWM4OFCON_PWM4OFS1 0x02
5767 #define _PWM4OFCON_OFS1 0x02
5768 #define _PWM4OFCON_OFO 0x10
5769 #define _PWM4OFCON_PWM4OFMC 0x10
5770 #define _PWM4OFCON_PWM4OFM0 0x20
5771 #define _PWM4OFCON_OFM0 0x20
5772 #define _PWM4OFCON_PWM4OFM1 0x40
5773 #define _PWM4OFCON_OFM1 0x40
5774
5775 //==============================================================================
5776
5777
5778 //==============================================================================
5779 // PPSLOCK Bits
5780
5781 extern __at(0x0E0F) __sfr PPSLOCK;
5782
5783 typedef struct
5784 {
5785 unsigned PPSLOCKED : 1;
5786 unsigned : 1;
5787 unsigned : 1;
5788 unsigned : 1;
5789 unsigned : 1;
5790 unsigned : 1;
5791 unsigned : 1;
5792 unsigned : 1;
5793 } __PPSLOCKbits_t;
5794
5795 extern __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits;
5796
5797 #define _PPSLOCKED 0x01
5798
5799 //==============================================================================
5800
5801
5802 //==============================================================================
5803 // INTPPS Bits
5804
5805 extern __at(0x0E10) __sfr INTPPS;
5806
5807 typedef union
5808 {
5809 struct
5810 {
5811 unsigned INTPPS0 : 1;
5812 unsigned INTPPS1 : 1;
5813 unsigned INTPPS2 : 1;
5814 unsigned INTPPS3 : 1;
5815 unsigned INTPPS4 : 1;
5816 unsigned : 1;
5817 unsigned : 1;
5818 unsigned : 1;
5819 };
5820
5821 struct
5822 {
5823 unsigned INTPPS : 5;
5824 unsigned : 3;
5825 };
5826 } __INTPPSbits_t;
5827
5828 extern __at(0x0E10) volatile __INTPPSbits_t INTPPSbits;
5829
5830 #define _INTPPS0 0x01
5831 #define _INTPPS1 0x02
5832 #define _INTPPS2 0x04
5833 #define _INTPPS3 0x08
5834 #define _INTPPS4 0x10
5835
5836 //==============================================================================
5837
5838
5839 //==============================================================================
5840 // T0CKIPPS Bits
5841
5842 extern __at(0x0E11) __sfr T0CKIPPS;
5843
5844 typedef union
5845 {
5846 struct
5847 {
5848 unsigned T0CKIPPS0 : 1;
5849 unsigned T0CKIPPS1 : 1;
5850 unsigned T0CKIPPS2 : 1;
5851 unsigned T0CKIPPS3 : 1;
5852 unsigned T0CKIPPS4 : 1;
5853 unsigned : 1;
5854 unsigned : 1;
5855 unsigned : 1;
5856 };
5857
5858 struct
5859 {
5860 unsigned T0CKIPPS : 5;
5861 unsigned : 3;
5862 };
5863 } __T0CKIPPSbits_t;
5864
5865 extern __at(0x0E11) volatile __T0CKIPPSbits_t T0CKIPPSbits;
5866
5867 #define _T0CKIPPS0 0x01
5868 #define _T0CKIPPS1 0x02
5869 #define _T0CKIPPS2 0x04
5870 #define _T0CKIPPS3 0x08
5871 #define _T0CKIPPS4 0x10
5872
5873 //==============================================================================
5874
5875
5876 //==============================================================================
5877 // T1CKIPPS Bits
5878
5879 extern __at(0x0E12) __sfr T1CKIPPS;
5880
5881 typedef union
5882 {
5883 struct
5884 {
5885 unsigned T1CKIPPS0 : 1;
5886 unsigned T1CKIPPS1 : 1;
5887 unsigned T1CKIPPS2 : 1;
5888 unsigned T1CKIPPS3 : 1;
5889 unsigned T1CKIPPS4 : 1;
5890 unsigned : 1;
5891 unsigned : 1;
5892 unsigned : 1;
5893 };
5894
5895 struct
5896 {
5897 unsigned T1CKIPPS : 5;
5898 unsigned : 3;
5899 };
5900 } __T1CKIPPSbits_t;
5901
5902 extern __at(0x0E12) volatile __T1CKIPPSbits_t T1CKIPPSbits;
5903
5904 #define _T1CKIPPS0 0x01
5905 #define _T1CKIPPS1 0x02
5906 #define _T1CKIPPS2 0x04
5907 #define _T1CKIPPS3 0x08
5908 #define _T1CKIPPS4 0x10
5909
5910 //==============================================================================
5911
5912
5913 //==============================================================================
5914 // T1GPPS Bits
5915
5916 extern __at(0x0E13) __sfr T1GPPS;
5917
5918 typedef union
5919 {
5920 struct
5921 {
5922 unsigned T1GPPS0 : 1;
5923 unsigned T1GPPS1 : 1;
5924 unsigned T1GPPS2 : 1;
5925 unsigned T1GPPS3 : 1;
5926 unsigned T1GPPS4 : 1;
5927 unsigned : 1;
5928 unsigned : 1;
5929 unsigned : 1;
5930 };
5931
5932 struct
5933 {
5934 unsigned T1GPPS : 5;
5935 unsigned : 3;
5936 };
5937 } __T1GPPSbits_t;
5938
5939 extern __at(0x0E13) volatile __T1GPPSbits_t T1GPPSbits;
5940
5941 #define _T1GPPS0 0x01
5942 #define _T1GPPS1 0x02
5943 #define _T1GPPS2 0x04
5944 #define _T1GPPS3 0x08
5945 #define _T1GPPS4 0x10
5946
5947 //==============================================================================
5948
5949
5950 //==============================================================================
5951 // CWG1INPPS Bits
5952
5953 extern __at(0x0E14) __sfr CWG1INPPS;
5954
5955 typedef union
5956 {
5957 struct
5958 {
5959 unsigned CWG1INPPS0 : 1;
5960 unsigned CWG1INPPS1 : 1;
5961 unsigned CWG1INPPS2 : 1;
5962 unsigned CWG1INPPS3 : 1;
5963 unsigned CWG1INPPS4 : 1;
5964 unsigned : 1;
5965 unsigned : 1;
5966 unsigned : 1;
5967 };
5968
5969 struct
5970 {
5971 unsigned CWG1INPPS : 5;
5972 unsigned : 3;
5973 };
5974 } __CWG1INPPSbits_t;
5975
5976 extern __at(0x0E14) volatile __CWG1INPPSbits_t CWG1INPPSbits;
5977
5978 #define _CWG1INPPS0 0x01
5979 #define _CWG1INPPS1 0x02
5980 #define _CWG1INPPS2 0x04
5981 #define _CWG1INPPS3 0x08
5982 #define _CWG1INPPS4 0x10
5983
5984 //==============================================================================
5985
5986
5987 //==============================================================================
5988 // RXPPS Bits
5989
5990 extern __at(0x0E15) __sfr RXPPS;
5991
5992 typedef union
5993 {
5994 struct
5995 {
5996 unsigned RXPPS0 : 1;
5997 unsigned RXPPS1 : 1;
5998 unsigned RXPPS2 : 1;
5999 unsigned RXPPS3 : 1;
6000 unsigned RXPPS4 : 1;
6001 unsigned : 1;
6002 unsigned : 1;
6003 unsigned : 1;
6004 };
6005
6006 struct
6007 {
6008 unsigned RXPPS : 5;
6009 unsigned : 3;
6010 };
6011 } __RXPPSbits_t;
6012
6013 extern __at(0x0E15) volatile __RXPPSbits_t RXPPSbits;
6014
6015 #define _RXPPS0 0x01
6016 #define _RXPPS1 0x02
6017 #define _RXPPS2 0x04
6018 #define _RXPPS3 0x08
6019 #define _RXPPS4 0x10
6020
6021 //==============================================================================
6022
6023
6024 //==============================================================================
6025 // CKPPS Bits
6026
6027 extern __at(0x0E16) __sfr CKPPS;
6028
6029 typedef union
6030 {
6031 struct
6032 {
6033 unsigned CKPPS0 : 1;
6034 unsigned CKPPS1 : 1;
6035 unsigned CKPPS2 : 1;
6036 unsigned CKPPS3 : 1;
6037 unsigned CKPPS4 : 1;
6038 unsigned : 1;
6039 unsigned : 1;
6040 unsigned : 1;
6041 };
6042
6043 struct
6044 {
6045 unsigned CKPPS : 5;
6046 unsigned : 3;
6047 };
6048 } __CKPPSbits_t;
6049
6050 extern __at(0x0E16) volatile __CKPPSbits_t CKPPSbits;
6051
6052 #define _CKPPS0 0x01
6053 #define _CKPPS1 0x02
6054 #define _CKPPS2 0x04
6055 #define _CKPPS3 0x08
6056 #define _CKPPS4 0x10
6057
6058 //==============================================================================
6059
6060
6061 //==============================================================================
6062 // ADCACTPPS Bits
6063
6064 extern __at(0x0E17) __sfr ADCACTPPS;
6065
6066 typedef union
6067 {
6068 struct
6069 {
6070 unsigned ADCACTPPS0 : 1;
6071 unsigned ADCACTPPS1 : 1;
6072 unsigned ADCACTPPS2 : 1;
6073 unsigned ADCACTPPS3 : 1;
6074 unsigned ADCACTPPS4 : 1;
6075 unsigned : 1;
6076 unsigned : 1;
6077 unsigned : 1;
6078 };
6079
6080 struct
6081 {
6082 unsigned ADCACTPPS : 5;
6083 unsigned : 3;
6084 };
6085 } __ADCACTPPSbits_t;
6086
6087 extern __at(0x0E17) volatile __ADCACTPPSbits_t ADCACTPPSbits;
6088
6089 #define _ADCACTPPS0 0x01
6090 #define _ADCACTPPS1 0x02
6091 #define _ADCACTPPS2 0x04
6092 #define _ADCACTPPS3 0x08
6093 #define _ADCACTPPS4 0x10
6094
6095 //==============================================================================
6096
6097
6098 //==============================================================================
6099 // RA0PPS Bits
6100
6101 extern __at(0x0E90) __sfr RA0PPS;
6102
6103 typedef union
6104 {
6105 struct
6106 {
6107 unsigned RA0PPS0 : 1;
6108 unsigned RA0PPS1 : 1;
6109 unsigned RA0PPS2 : 1;
6110 unsigned RA0PPS3 : 1;
6111 unsigned : 1;
6112 unsigned : 1;
6113 unsigned : 1;
6114 unsigned : 1;
6115 };
6116
6117 struct
6118 {
6119 unsigned RA0PPS : 4;
6120 unsigned : 4;
6121 };
6122 } __RA0PPSbits_t;
6123
6124 extern __at(0x0E90) volatile __RA0PPSbits_t RA0PPSbits;
6125
6126 #define _RA0PPS0 0x01
6127 #define _RA0PPS1 0x02
6128 #define _RA0PPS2 0x04
6129 #define _RA0PPS3 0x08
6130
6131 //==============================================================================
6132
6133
6134 //==============================================================================
6135 // RA1PPS Bits
6136
6137 extern __at(0x0E91) __sfr RA1PPS;
6138
6139 typedef union
6140 {
6141 struct
6142 {
6143 unsigned RA1PPS0 : 1;
6144 unsigned RA1PPS1 : 1;
6145 unsigned RA1PPS2 : 1;
6146 unsigned RA1PPS3 : 1;
6147 unsigned : 1;
6148 unsigned : 1;
6149 unsigned : 1;
6150 unsigned : 1;
6151 };
6152
6153 struct
6154 {
6155 unsigned RA1PPS : 4;
6156 unsigned : 4;
6157 };
6158 } __RA1PPSbits_t;
6159
6160 extern __at(0x0E91) volatile __RA1PPSbits_t RA1PPSbits;
6161
6162 #define _RA1PPS0 0x01
6163 #define _RA1PPS1 0x02
6164 #define _RA1PPS2 0x04
6165 #define _RA1PPS3 0x08
6166
6167 //==============================================================================
6168
6169
6170 //==============================================================================
6171 // RA2PPS Bits
6172
6173 extern __at(0x0E92) __sfr RA2PPS;
6174
6175 typedef union
6176 {
6177 struct
6178 {
6179 unsigned RA2PPS0 : 1;
6180 unsigned RA2PPS1 : 1;
6181 unsigned RA2PPS2 : 1;
6182 unsigned RA2PPS3 : 1;
6183 unsigned : 1;
6184 unsigned : 1;
6185 unsigned : 1;
6186 unsigned : 1;
6187 };
6188
6189 struct
6190 {
6191 unsigned RA2PPS : 4;
6192 unsigned : 4;
6193 };
6194 } __RA2PPSbits_t;
6195
6196 extern __at(0x0E92) volatile __RA2PPSbits_t RA2PPSbits;
6197
6198 #define _RA2PPS0 0x01
6199 #define _RA2PPS1 0x02
6200 #define _RA2PPS2 0x04
6201 #define _RA2PPS3 0x08
6202
6203 //==============================================================================
6204
6205
6206 //==============================================================================
6207 // RA4PPS Bits
6208
6209 extern __at(0x0E94) __sfr RA4PPS;
6210
6211 typedef union
6212 {
6213 struct
6214 {
6215 unsigned RA4PPS0 : 1;
6216 unsigned RA4PPS1 : 1;
6217 unsigned RA4PPS2 : 1;
6218 unsigned RA4PPS3 : 1;
6219 unsigned : 1;
6220 unsigned : 1;
6221 unsigned : 1;
6222 unsigned : 1;
6223 };
6224
6225 struct
6226 {
6227 unsigned RA4PPS : 4;
6228 unsigned : 4;
6229 };
6230 } __RA4PPSbits_t;
6231
6232 extern __at(0x0E94) volatile __RA4PPSbits_t RA4PPSbits;
6233
6234 #define _RA4PPS0 0x01
6235 #define _RA4PPS1 0x02
6236 #define _RA4PPS2 0x04
6237 #define _RA4PPS3 0x08
6238
6239 //==============================================================================
6240
6241
6242 //==============================================================================
6243 // RA5PPS Bits
6244
6245 extern __at(0x0E95) __sfr RA5PPS;
6246
6247 typedef union
6248 {
6249 struct
6250 {
6251 unsigned RA5PPS0 : 1;
6252 unsigned RA5PPS1 : 1;
6253 unsigned RA5PPS2 : 1;
6254 unsigned RA5PPS3 : 1;
6255 unsigned : 1;
6256 unsigned : 1;
6257 unsigned : 1;
6258 unsigned : 1;
6259 };
6260
6261 struct
6262 {
6263 unsigned RA5PPS : 4;
6264 unsigned : 4;
6265 };
6266 } __RA5PPSbits_t;
6267
6268 extern __at(0x0E95) volatile __RA5PPSbits_t RA5PPSbits;
6269
6270 #define _RA5PPS0 0x01
6271 #define _RA5PPS1 0x02
6272 #define _RA5PPS2 0x04
6273 #define _RA5PPS3 0x08
6274
6275 //==============================================================================
6276
6277
6278 //==============================================================================
6279 // RC0PPS Bits
6280
6281 extern __at(0x0EA0) __sfr RC0PPS;
6282
6283 typedef union
6284 {
6285 struct
6286 {
6287 unsigned RC0PPS0 : 1;
6288 unsigned RC0PPS1 : 1;
6289 unsigned RC0PPS2 : 1;
6290 unsigned RC0PPS3 : 1;
6291 unsigned : 1;
6292 unsigned : 1;
6293 unsigned : 1;
6294 unsigned : 1;
6295 };
6296
6297 struct
6298 {
6299 unsigned RC0PPS : 4;
6300 unsigned : 4;
6301 };
6302 } __RC0PPSbits_t;
6303
6304 extern __at(0x0EA0) volatile __RC0PPSbits_t RC0PPSbits;
6305
6306 #define _RC0PPS0 0x01
6307 #define _RC0PPS1 0x02
6308 #define _RC0PPS2 0x04
6309 #define _RC0PPS3 0x08
6310
6311 //==============================================================================
6312
6313
6314 //==============================================================================
6315 // RC1PPS Bits
6316
6317 extern __at(0x0EA1) __sfr RC1PPS;
6318
6319 typedef union
6320 {
6321 struct
6322 {
6323 unsigned RC1PPS0 : 1;
6324 unsigned RC1PPS1 : 1;
6325 unsigned RC1PPS2 : 1;
6326 unsigned RC1PPS3 : 1;
6327 unsigned : 1;
6328 unsigned : 1;
6329 unsigned : 1;
6330 unsigned : 1;
6331 };
6332
6333 struct
6334 {
6335 unsigned RC1PPS : 4;
6336 unsigned : 4;
6337 };
6338 } __RC1PPSbits_t;
6339
6340 extern __at(0x0EA1) volatile __RC1PPSbits_t RC1PPSbits;
6341
6342 #define _RC1PPS0 0x01
6343 #define _RC1PPS1 0x02
6344 #define _RC1PPS2 0x04
6345 #define _RC1PPS3 0x08
6346
6347 //==============================================================================
6348
6349
6350 //==============================================================================
6351 // RC2PPS Bits
6352
6353 extern __at(0x0EA2) __sfr RC2PPS;
6354
6355 typedef union
6356 {
6357 struct
6358 {
6359 unsigned RC1PPS0 : 1;
6360 unsigned RC1PPS1 : 1;
6361 unsigned RC1PPS2 : 1;
6362 unsigned RC1PPS3 : 1;
6363 unsigned : 1;
6364 unsigned : 1;
6365 unsigned : 1;
6366 unsigned : 1;
6367 };
6368
6369 struct
6370 {
6371 unsigned RC1PPS : 4;
6372 unsigned : 4;
6373 };
6374 } __RC2PPSbits_t;
6375
6376 extern __at(0x0EA2) volatile __RC2PPSbits_t RC2PPSbits;
6377
6378 #define _RC2PPS_RC1PPS0 0x01
6379 #define _RC2PPS_RC1PPS1 0x02
6380 #define _RC2PPS_RC1PPS2 0x04
6381 #define _RC2PPS_RC1PPS3 0x08
6382
6383 //==============================================================================
6384
6385
6386 //==============================================================================
6387 // RC3PPS Bits
6388
6389 extern __at(0x0EA3) __sfr RC3PPS;
6390
6391 typedef union
6392 {
6393 struct
6394 {
6395 unsigned RC3PPS0 : 1;
6396 unsigned RC3PPS1 : 1;
6397 unsigned RC3PPS2 : 1;
6398 unsigned RC3PPS3 : 1;
6399 unsigned : 1;
6400 unsigned : 1;
6401 unsigned : 1;
6402 unsigned : 1;
6403 };
6404
6405 struct
6406 {
6407 unsigned RC3PPS : 4;
6408 unsigned : 4;
6409 };
6410 } __RC3PPSbits_t;
6411
6412 extern __at(0x0EA3) volatile __RC3PPSbits_t RC3PPSbits;
6413
6414 #define _RC3PPS0 0x01
6415 #define _RC3PPS1 0x02
6416 #define _RC3PPS2 0x04
6417 #define _RC3PPS3 0x08
6418
6419 //==============================================================================
6420
6421
6422 //==============================================================================
6423 // RC4PPS Bits
6424
6425 extern __at(0x0EA4) __sfr RC4PPS;
6426
6427 typedef union
6428 {
6429 struct
6430 {
6431 unsigned RC4PPS0 : 1;
6432 unsigned RC4PPS1 : 1;
6433 unsigned RC4PPS2 : 1;
6434 unsigned RC4PPS3 : 1;
6435 unsigned : 1;
6436 unsigned : 1;
6437 unsigned : 1;
6438 unsigned : 1;
6439 };
6440
6441 struct
6442 {
6443 unsigned RC4PPS : 4;
6444 unsigned : 4;
6445 };
6446 } __RC4PPSbits_t;
6447
6448 extern __at(0x0EA4) volatile __RC4PPSbits_t RC4PPSbits;
6449
6450 #define _RC4PPS0 0x01
6451 #define _RC4PPS1 0x02
6452 #define _RC4PPS2 0x04
6453 #define _RC4PPS3 0x08
6454
6455 //==============================================================================
6456
6457
6458 //==============================================================================
6459 // RC5PPS Bits
6460
6461 extern __at(0x0EA5) __sfr RC5PPS;
6462
6463 typedef union
6464 {
6465 struct
6466 {
6467 unsigned RC5PPS0 : 1;
6468 unsigned RC5PPS1 : 1;
6469 unsigned RC5PPS2 : 1;
6470 unsigned RC5PPS3 : 1;
6471 unsigned : 1;
6472 unsigned : 1;
6473 unsigned : 1;
6474 unsigned : 1;
6475 };
6476
6477 struct
6478 {
6479 unsigned RC5PPS : 4;
6480 unsigned : 4;
6481 };
6482 } __RC5PPSbits_t;
6483
6484 extern __at(0x0EA5) volatile __RC5PPSbits_t RC5PPSbits;
6485
6486 #define _RC5PPS0 0x01
6487 #define _RC5PPS1 0x02
6488 #define _RC5PPS2 0x04
6489 #define _RC5PPS3 0x08
6490
6491 //==============================================================================
6492
6493
6494 //==============================================================================
6495 // STATUS_SHAD Bits
6496
6497 extern __at(0x0FE4) __sfr STATUS_SHAD;
6498
6499 typedef struct
6500 {
6501 unsigned C_SHAD : 1;
6502 unsigned DC_SHAD : 1;
6503 unsigned Z_SHAD : 1;
6504 unsigned : 1;
6505 unsigned : 1;
6506 unsigned : 1;
6507 unsigned : 1;
6508 unsigned : 1;
6509 } __STATUS_SHADbits_t;
6510
6511 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
6512
6513 #define _C_SHAD 0x01
6514 #define _DC_SHAD 0x02
6515 #define _Z_SHAD 0x04
6516
6517 //==============================================================================
6518
6519 extern __at(0x0FE5) __sfr WREG_SHAD;
6520 extern __at(0x0FE6) __sfr BSR_SHAD;
6521 extern __at(0x0FE7) __sfr PCLATH_SHAD;
6522 extern __at(0x0FE8) __sfr FSR0L_SHAD;
6523 extern __at(0x0FE8) __sfr FSR0_SHAD;
6524 extern __at(0x0FE9) __sfr FSR0H_SHAD;
6525 extern __at(0x0FEA) __sfr FSR1L_SHAD;
6526 extern __at(0x0FEA) __sfr FSR1_SHAD;
6527 extern __at(0x0FEB) __sfr FSR1H_SHAD;
6528 extern __at(0x0FED) __sfr STKPTR;
6529 extern __at(0x0FEE) __sfr TOS;
6530 extern __at(0x0FEE) __sfr TOSL;
6531 extern __at(0x0FEF) __sfr TOSH;
6532
6533 //==============================================================================
6534 //
6535 // Configuration Bits
6536 //
6537 //==============================================================================
6538
6539 #define _CONFIG1 0x8007
6540 #define _CONFIG2 0x8008
6541
6542 //----------------------------- CONFIG1 Options -------------------------------
6543
6544 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator; I/O function on CLKIN pin.
6545 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin.
6546 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin.
6547 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin.
6548 #define _WDTE_OFF 0x3FE7 // WDT disabled.
6549 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
6550 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
6551 #define _WDTE_ON 0x3FFF // WDT enabled.
6552 #define _PWRTE_ON 0x3FDF // PWRT enabled.
6553 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
6554 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
6555 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
6556 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
6557 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
6558 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
6559 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
6560 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
6561 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
6562 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
6563 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
6564
6565 //----------------------------- CONFIG2 Options -------------------------------
6566
6567 #define _WRT_ALL 0x3FFC // 000h to FFFh write protected, no addresses may be modified by EECON control.
6568 #define _WRT_HALF 0x3FFD // 000h to 7FFh write protected, 800h to FFFh may be modified by EECON control.
6569 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to FFFh may be modified by EECON control.
6570 #define _WRT_OFF 0x3FFF // Write protection off.
6571 #define _PPS1WAY_OFF 0x3FFB // PPSLOCKED Bit Can Be Cleared & Set Repeatedly.
6572 #define _PPS1WAY_ON 0x3FFF // PPSLOCKED Bit Can Be Cleared & Set Once.
6573 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled.
6574 #define _PLLEN_ON 0x3FFF // 4x PLL enabled.
6575 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
6576 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
6577 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
6578 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
6579 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
6580 #define _LPBOREN_ON 0x37FF // LPBOR is enabled.
6581 #define _LPBOREN_OFF 0x3FFF // LPBOR is disabled.
6582 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
6583 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
6584 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
6585 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
6586
6587 //==============================================================================
6588
6589 #define _DEVID1 0x8006
6590
6591 #define _IDLOC0 0x8000
6592 #define _IDLOC1 0x8001
6593 #define _IDLOC2 0x8002
6594 #define _IDLOC3 0x8003
6595
6596 //==============================================================================
6597
6598 #ifndef NO_BIT_DEFINES
6599
6600 #define ADCACTPPS0 ADCACTPPSbits.ADCACTPPS0 // bit 0
6601 #define ADCACTPPS1 ADCACTPPSbits.ADCACTPPS1 // bit 1
6602 #define ADCACTPPS2 ADCACTPPSbits.ADCACTPPS2 // bit 2
6603 #define ADCACTPPS3 ADCACTPPSbits.ADCACTPPS3 // bit 3
6604 #define ADCACTPPS4 ADCACTPPSbits.ADCACTPPS4 // bit 4
6605
6606 #define ADON ADCON0bits.ADON // bit 0
6607 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
6608 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
6609 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
6610 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
6611 #define CHS0 ADCON0bits.CHS0 // bit 2
6612 #define CHS1 ADCON0bits.CHS1 // bit 3
6613 #define CHS2 ADCON0bits.CHS2 // bit 4
6614 #define CHS3 ADCON0bits.CHS3 // bit 5
6615 #define CHS4 ADCON0bits.CHS4 // bit 6
6616
6617 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
6618 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
6619 #define ADCS0 ADCON1bits.ADCS0 // bit 4
6620 #define ADCS1 ADCON1bits.ADCS1 // bit 5
6621 #define ADCS2 ADCON1bits.ADCS2 // bit 6
6622 #define ADFM ADCON1bits.ADFM // bit 7
6623
6624 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
6625 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
6626 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
6627 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
6628
6629 #define ANSA0 ANSELAbits.ANSA0 // bit 0
6630 #define ANSA1 ANSELAbits.ANSA1 // bit 1
6631 #define ANSA2 ANSELAbits.ANSA2 // bit 2
6632 #define ANSA4 ANSELAbits.ANSA4 // bit 4
6633
6634 #define ANSC0 ANSELCbits.ANSC0 // bit 0
6635 #define ANSC1 ANSELCbits.ANSC1 // bit 1
6636 #define ANSC2 ANSELCbits.ANSC2 // bit 2
6637 #define ANSC3 ANSELCbits.ANSC3 // bit 3
6638
6639 #define ABDEN BAUDCONbits.ABDEN // bit 0
6640 #define WUE BAUDCONbits.WUE // bit 1
6641 #define BRG16 BAUDCONbits.BRG16 // bit 3
6642 #define SCKP BAUDCONbits.SCKP // bit 4
6643 #define RCIDL BAUDCONbits.RCIDL // bit 6
6644 #define ABDOVF BAUDCONbits.ABDOVF // bit 7
6645
6646 #define BORRDY BORCONbits.BORRDY // bit 0
6647 #define BORFS BORCONbits.BORFS // bit 6
6648 #define SBOREN BORCONbits.SBOREN // bit 7
6649
6650 #define BSR0 BSRbits.BSR0 // bit 0
6651 #define BSR1 BSRbits.BSR1 // bit 1
6652 #define BSR2 BSRbits.BSR2 // bit 2
6653 #define BSR3 BSRbits.BSR3 // bit 3
6654 #define BSR4 BSRbits.BSR4 // bit 4
6655
6656 #define CKPPS0 CKPPSbits.CKPPS0 // bit 0
6657 #define CKPPS1 CKPPSbits.CKPPS1 // bit 1
6658 #define CKPPS2 CKPPSbits.CKPPS2 // bit 2
6659 #define CKPPS3 CKPPSbits.CKPPS3 // bit 3
6660 #define CKPPS4 CKPPSbits.CKPPS4 // bit 4
6661
6662 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
6663 #define C1HYS CM1CON0bits.C1HYS // bit 1
6664 #define C1SP CM1CON0bits.C1SP // bit 2
6665 #define C1POL CM1CON0bits.C1POL // bit 4
6666 #define C1OE CM1CON0bits.C1OE // bit 5
6667 #define C1OUT CM1CON0bits.C1OUT // bit 6
6668 #define C1ON CM1CON0bits.C1ON // bit 7
6669
6670 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
6671 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
6672 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
6673 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
6674 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
6675 #define C1INTN CM1CON1bits.C1INTN // bit 6
6676 #define C1INTP CM1CON1bits.C1INTP // bit 7
6677
6678 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
6679 #define C2HYS CM2CON0bits.C2HYS // bit 1
6680 #define C2SP CM2CON0bits.C2SP // bit 2
6681 #define C2POL CM2CON0bits.C2POL // bit 4
6682 #define C2OE CM2CON0bits.C2OE // bit 5
6683 #define C2OUT CM2CON0bits.C2OUT // bit 6
6684 #define C2ON CM2CON0bits.C2ON // bit 7
6685
6686 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
6687 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
6688 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
6689 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4
6690 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5
6691 #define C2INTN CM2CON1bits.C2INTN // bit 6
6692 #define C2INTP CM2CON1bits.C2INTP // bit 7
6693
6694 #define MC1OUT CMOUTbits.MC1OUT // bit 0
6695 #define MC2OUT CMOUTbits.MC2OUT // bit 1
6696
6697 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
6698 #define G1POLA CWG1CON0bits.G1POLA // bit 3
6699 #define G1POLB CWG1CON0bits.G1POLB // bit 4
6700 #define G1OEA CWG1CON0bits.G1OEA // bit 5
6701 #define G1OEB CWG1CON0bits.G1OEB // bit 6
6702 #define G1EN CWG1CON0bits.G1EN // bit 7
6703
6704 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
6705 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
6706 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
6707 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
6708 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
6709 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
6710 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
6711
6712 #define G1ASDSPPS CWG1CON2bits.G1ASDSPPS // bit 1
6713 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
6714 #define G1ASDSC2 CWG1CON2bits.G1ASDSC2 // bit 3
6715 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
6716 #define G1ASE CWG1CON2bits.G1ASE // bit 7
6717
6718 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
6719 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
6720 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
6721 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
6722 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
6723 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
6724
6725 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
6726 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
6727 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
6728 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
6729 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
6730 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
6731
6732 #define CWG1INPPS0 CWG1INPPSbits.CWG1INPPS0 // bit 0
6733 #define CWG1INPPS1 CWG1INPPSbits.CWG1INPPS1 // bit 1
6734 #define CWG1INPPS2 CWG1INPPSbits.CWG1INPPS2 // bit 2
6735 #define CWG1INPPS3 CWG1INPPSbits.CWG1INPPS3 // bit 3
6736 #define CWG1INPPS4 CWG1INPPSbits.CWG1INPPS4 // bit 4
6737
6738 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2
6739 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3
6740 #define DACOE DACCON0bits.DACOE // bit 5
6741 #define DACLPS DACCON0bits.DACLPS // bit 6
6742 #define DACEN DACCON0bits.DACEN // bit 7
6743
6744 #define DACR0 DACCON1bits.DACR0 // bit 0
6745 #define DACR1 DACCON1bits.DACR1 // bit 1
6746 #define DACR2 DACCON1bits.DACR2 // bit 2
6747 #define DACR3 DACCON1bits.DACR3 // bit 3
6748 #define DACR4 DACCON1bits.DACR4 // bit 4
6749
6750 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
6751 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
6752 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
6753 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
6754 #define TSRNG FVRCONbits.TSRNG // bit 4
6755 #define TSEN FVRCONbits.TSEN // bit 5
6756 #define FVRRDY FVRCONbits.FVRRDY // bit 6
6757 #define FVREN FVRCONbits.FVREN // bit 7
6758
6759 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
6760 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
6761 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
6762 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
6763 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
6764 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
6765
6766 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0
6767 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1
6768 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2
6769 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3
6770 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4
6771 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5
6772
6773 #define IOCIF INTCONbits.IOCIF // bit 0
6774 #define INTF INTCONbits.INTF // bit 1
6775 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
6776 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
6777 #define IOCIE INTCONbits.IOCIE // bit 3
6778 #define INTE INTCONbits.INTE // bit 4
6779 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
6780 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
6781 #define PEIE INTCONbits.PEIE // bit 6
6782 #define GIE INTCONbits.GIE // bit 7
6783
6784 #define INTPPS0 INTPPSbits.INTPPS0 // bit 0
6785 #define INTPPS1 INTPPSbits.INTPPS1 // bit 1
6786 #define INTPPS2 INTPPSbits.INTPPS2 // bit 2
6787 #define INTPPS3 INTPPSbits.INTPPS3 // bit 3
6788 #define INTPPS4 INTPPSbits.INTPPS4 // bit 4
6789
6790 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
6791 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
6792 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
6793 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
6794 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
6795 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
6796
6797 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
6798 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
6799 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
6800 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
6801 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
6802 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
6803
6804 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
6805 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
6806 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
6807 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
6808 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
6809 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
6810
6811 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
6812 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
6813 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
6814 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
6815 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
6816 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
6817
6818 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
6819 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
6820 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
6821 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
6822 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
6823 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
6824
6825 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
6826 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
6827 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
6828 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
6829 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
6830 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
6831
6832 #define LATA0 LATAbits.LATA0 // bit 0
6833 #define LATA1 LATAbits.LATA1 // bit 1
6834 #define LATA2 LATAbits.LATA2 // bit 2
6835 #define LATA4 LATAbits.LATA4 // bit 4
6836 #define LATA5 LATAbits.LATA5 // bit 5
6837
6838 #define LATC0 LATCbits.LATC0 // bit 0
6839 #define LATC1 LATCbits.LATC1 // bit 1
6840 #define LATC2 LATCbits.LATC2 // bit 2
6841 #define LATC3 LATCbits.LATC3 // bit 3
6842 #define LATC4 LATCbits.LATC4 // bit 4
6843 #define LATC5 LATCbits.LATC5 // bit 5
6844
6845 #define ODA0 ODCONAbits.ODA0 // bit 0
6846 #define ODA1 ODCONAbits.ODA1 // bit 1
6847 #define ODA2 ODCONAbits.ODA2 // bit 2
6848 #define ODA4 ODCONAbits.ODA4 // bit 4
6849 #define ODA5 ODCONAbits.ODA5 // bit 5
6850
6851 #define ODC0 ODCONCbits.ODC0 // bit 0
6852 #define ODC1 ODCONCbits.ODC1 // bit 1
6853 #define ODC2 ODCONCbits.ODC2 // bit 2
6854 #define ODC3 ODCONCbits.ODC3 // bit 3
6855 #define ODC4 ODCONCbits.ODC4 // bit 4
6856 #define ODC5 ODCONCbits.ODC5 // bit 5
6857
6858 #define PS0 OPTION_REGbits.PS0 // bit 0
6859 #define PS1 OPTION_REGbits.PS1 // bit 1
6860 #define PS2 OPTION_REGbits.PS2 // bit 2
6861 #define PSA OPTION_REGbits.PSA // bit 3
6862 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
6863 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
6864 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
6865 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
6866 #define INTEDG OPTION_REGbits.INTEDG // bit 6
6867 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
6868
6869 #define SCS0 OSCCONbits.SCS0 // bit 0
6870 #define SCS1 OSCCONbits.SCS1 // bit 1
6871 #define IRCF0 OSCCONbits.IRCF0 // bit 3
6872 #define IRCF1 OSCCONbits.IRCF1 // bit 4
6873 #define IRCF2 OSCCONbits.IRCF2 // bit 5
6874 #define IRCF3 OSCCONbits.IRCF3 // bit 6
6875 #define SPLLEN OSCCONbits.SPLLEN // bit 7
6876
6877 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
6878 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
6879 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
6880 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
6881 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
6882 #define OSTS OSCSTATbits.OSTS // bit 5
6883 #define PLLR OSCSTATbits.PLLR // bit 6
6884
6885 #define TUN0 OSCTUNEbits.TUN0 // bit 0
6886 #define TUN1 OSCTUNEbits.TUN1 // bit 1
6887 #define TUN2 OSCTUNEbits.TUN2 // bit 2
6888 #define TUN3 OSCTUNEbits.TUN3 // bit 3
6889 #define TUN4 OSCTUNEbits.TUN4 // bit 4
6890 #define TUN5 OSCTUNEbits.TUN5 // bit 5
6891
6892 #define NOT_BOR PCONbits.NOT_BOR // bit 0
6893 #define NOT_POR PCONbits.NOT_POR // bit 1
6894 #define NOT_RI PCONbits.NOT_RI // bit 2
6895 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
6896 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
6897 #define STKUNF PCONbits.STKUNF // bit 6
6898 #define STKOVF PCONbits.STKOVF // bit 7
6899
6900 #define TMR1IE PIE1bits.TMR1IE // bit 0
6901 #define TMR2IE PIE1bits.TMR2IE // bit 1
6902 #define TXIE PIE1bits.TXIE // bit 4
6903 #define RCIE PIE1bits.RCIE // bit 5
6904 #define ADIE PIE1bits.ADIE // bit 6
6905 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
6906
6907 #define C1IE PIE2bits.C1IE // bit 5
6908 #define C2IE PIE2bits.C2IE // bit 6
6909
6910 #define PWM1IE PIE3bits.PWM1IE // bit 4
6911 #define PWM2IE PIE3bits.PWM2IE // bit 5
6912 #define PWM3IE PIE3bits.PWM3IE // bit 6
6913 #define PWM4IE PIE3bits.PWM4IE // bit 7
6914
6915 #define TMR1IF PIR1bits.TMR1IF // bit 0
6916 #define TMR2IF PIR1bits.TMR2IF // bit 1
6917 #define TXIF PIR1bits.TXIF // bit 4
6918 #define RCIF PIR1bits.RCIF // bit 5
6919 #define ADIF PIR1bits.ADIF // bit 6
6920 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
6921
6922 #define C1IF PIR2bits.C1IF // bit 5
6923 #define C2IF PIR2bits.C2IF // bit 6
6924
6925 #define PWM1IF PIR3bits.PWM1IF // bit 4
6926 #define PWM2IF PIR3bits.PWM2IF // bit 5
6927 #define PWM3IF PIR3bits.PWM3IF // bit 6
6928 #define PWM4IF PIR3bits.PWM4IF // bit 7
6929
6930 #define RD PMCON1bits.RD // bit 0
6931 #define WR PMCON1bits.WR // bit 1
6932 #define WREN PMCON1bits.WREN // bit 2
6933 #define WRERR PMCON1bits.WRERR // bit 3
6934 #define FREE PMCON1bits.FREE // bit 4
6935 #define LWLO PMCON1bits.LWLO // bit 5
6936 #define CFGS PMCON1bits.CFGS // bit 6
6937
6938 #define RA0 PORTAbits.RA0 // bit 0
6939 #define RA1 PORTAbits.RA1 // bit 1
6940 #define RA2 PORTAbits.RA2 // bit 2
6941 #define RA3 PORTAbits.RA3 // bit 3
6942 #define RA4 PORTAbits.RA4 // bit 4
6943 #define RA5 PORTAbits.RA5 // bit 5
6944
6945 #define RC0 PORTCbits.RC0 // bit 0
6946 #define RC1 PORTCbits.RC1 // bit 1
6947 #define RC2 PORTCbits.RC2 // bit 2
6948 #define RC3 PORTCbits.RC3 // bit 3
6949 #define RC4 PORTCbits.RC4 // bit 4
6950 #define RC5 PORTCbits.RC5 // bit 5
6951
6952 #define PPSLOCKED PPSLOCKbits.PPSLOCKED // bit 0
6953
6954 #define PWM1MODE0 PWM1CONbits.PWM1MODE0 // bit 2, shadows bit in PWM1CONbits
6955 #define MODE0 PWM1CONbits.MODE0 // bit 2, shadows bit in PWM1CONbits
6956 #define PWM1MODE1 PWM1CONbits.PWM1MODE1 // bit 3, shadows bit in PWM1CONbits
6957 #define MODE1 PWM1CONbits.MODE1 // bit 3, shadows bit in PWM1CONbits
6958 #define POL PWM1CONbits.POL // bit 4, shadows bit in PWM1CONbits
6959 #define PWM1POL PWM1CONbits.PWM1POL // bit 4, shadows bit in PWM1CONbits
6960 #define OUT PWM1CONbits.OUT // bit 5, shadows bit in PWM1CONbits
6961 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5, shadows bit in PWM1CONbits
6962 #define OE PWM1CONbits.OE // bit 6, shadows bit in PWM1CONbits
6963 #define PWM1OE PWM1CONbits.PWM1OE // bit 6, shadows bit in PWM1CONbits
6964 #define EN PWM1CONbits.EN // bit 7, shadows bit in PWM1CONbits
6965 #define PWM1EN PWM1CONbits.PWM1EN // bit 7, shadows bit in PWM1CONbits
6966
6967 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
6968 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
6969 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
6970 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
6971 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
6972 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
6973 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
6974 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
6975
6976 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 0
6977 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 1
6978 #define PWM1DCL2 PWM1DCLbits.PWM1DCL2 // bit 2
6979 #define PWM1DCL3 PWM1DCLbits.PWM1DCL3 // bit 3
6980 #define PWM1DCL4 PWM1DCLbits.PWM1DCL4 // bit 4
6981 #define PWM1DCL5 PWM1DCLbits.PWM1DCL5 // bit 5
6982 #define PWM1DCL6 PWM1DCLbits.PWM1DCL6 // bit 6
6983 #define PWM1DCL7 PWM1DCLbits.PWM1DCL7 // bit 7
6984
6985 #define PRIE PWM1INTCONbits.PRIE // bit 0, shadows bit in PWM1INTCONbits
6986 #define PWM1PRIE PWM1INTCONbits.PWM1PRIE // bit 0, shadows bit in PWM1INTCONbits
6987 #define DCIE PWM1INTCONbits.DCIE // bit 1, shadows bit in PWM1INTCONbits
6988 #define PWM1DCIE PWM1INTCONbits.PWM1DCIE // bit 1, shadows bit in PWM1INTCONbits
6989 #define PHIE PWM1INTCONbits.PHIE // bit 2, shadows bit in PWM1INTCONbits
6990 #define PWM1PHIE PWM1INTCONbits.PWM1PHIE // bit 2, shadows bit in PWM1INTCONbits
6991 #define OFIE PWM1INTCONbits.OFIE // bit 3, shadows bit in PWM1INTCONbits
6992 #define PWM1OFIE PWM1INTCONbits.PWM1OFIE // bit 3, shadows bit in PWM1INTCONbits
6993
6994 #define PRIF PWM1INTFbits.PRIF // bit 0, shadows bit in PWM1INTFbits
6995 #define PWM1PRIF PWM1INTFbits.PWM1PRIF // bit 0, shadows bit in PWM1INTFbits
6996 #define DCIF PWM1INTFbits.DCIF // bit 1, shadows bit in PWM1INTFbits
6997 #define PWM1DCIF PWM1INTFbits.PWM1DCIF // bit 1, shadows bit in PWM1INTFbits
6998 #define PHIF PWM1INTFbits.PHIF // bit 2, shadows bit in PWM1INTFbits
6999 #define PWM1PHIF PWM1INTFbits.PWM1PHIF // bit 2, shadows bit in PWM1INTFbits
7000 #define OFIF PWM1INTFbits.OFIF // bit 3, shadows bit in PWM1INTFbits
7001 #define PWM1OFIF PWM1INTFbits.PWM1OFIF // bit 3, shadows bit in PWM1INTFbits
7002
7003 #define PWM1LDS0 PWM1LDCONbits.PWM1LDS0 // bit 0, shadows bit in PWM1LDCONbits
7004 #define LDS0 PWM1LDCONbits.LDS0 // bit 0, shadows bit in PWM1LDCONbits
7005 #define PWM1LDS1 PWM1LDCONbits.PWM1LDS1 // bit 1, shadows bit in PWM1LDCONbits
7006 #define LDS1 PWM1LDCONbits.LDS1 // bit 1, shadows bit in PWM1LDCONbits
7007 #define LDT PWM1LDCONbits.LDT // bit 6, shadows bit in PWM1LDCONbits
7008 #define PWM1LDM PWM1LDCONbits.PWM1LDM // bit 6, shadows bit in PWM1LDCONbits
7009 #define LDA PWM1LDCONbits.LDA // bit 7, shadows bit in PWM1LDCONbits
7010 #define PWM1LD PWM1LDCONbits.PWM1LD // bit 7, shadows bit in PWM1LDCONbits
7011
7012 #define PWM1OFS0 PWM1OFCONbits.PWM1OFS0 // bit 0, shadows bit in PWM1OFCONbits
7013 #define OFS0 PWM1OFCONbits.OFS0 // bit 0, shadows bit in PWM1OFCONbits
7014 #define PWM1OFS1 PWM1OFCONbits.PWM1OFS1 // bit 1, shadows bit in PWM1OFCONbits
7015 #define OFS1 PWM1OFCONbits.OFS1 // bit 1, shadows bit in PWM1OFCONbits
7016 #define OFO PWM1OFCONbits.OFO // bit 4, shadows bit in PWM1OFCONbits
7017 #define PWM1OFMC PWM1OFCONbits.PWM1OFMC // bit 4, shadows bit in PWM1OFCONbits
7018 #define PWM1OFM0 PWM1OFCONbits.PWM1OFM0 // bit 5, shadows bit in PWM1OFCONbits
7019 #define OFM0 PWM1OFCONbits.OFM0 // bit 5, shadows bit in PWM1OFCONbits
7020 #define PWM1OFM1 PWM1OFCONbits.PWM1OFM1 // bit 6, shadows bit in PWM1OFCONbits
7021 #define OFM1 PWM1OFCONbits.OFM1 // bit 6, shadows bit in PWM1OFCONbits
7022
7023 #define PWM1OFH0 PWM1OFHbits.PWM1OFH0 // bit 0
7024 #define PWM1OFH1 PWM1OFHbits.PWM1OFH1 // bit 1
7025 #define PWM1OFH2 PWM1OFHbits.PWM1OFH2 // bit 2
7026 #define PWM1OFH3 PWM1OFHbits.PWM1OFH3 // bit 3
7027 #define PWM1OFH4 PWM1OFHbits.PWM1OFH4 // bit 4
7028 #define PWM1OFH5 PWM1OFHbits.PWM1OFH5 // bit 5
7029 #define PWM1OFH6 PWM1OFHbits.PWM1OFH6 // bit 6
7030 #define PWM1OFH7 PWM1OFHbits.PWM1OFH7 // bit 7
7031
7032 #define PWM1OFL0 PWM1OFLbits.PWM1OFL0 // bit 0
7033 #define PWM1OFL1 PWM1OFLbits.PWM1OFL1 // bit 1
7034 #define PWM1OFL2 PWM1OFLbits.PWM1OFL2 // bit 2
7035 #define PWM1OFL3 PWM1OFLbits.PWM1OFL3 // bit 3
7036 #define PWM1OFL4 PWM1OFLbits.PWM1OFL4 // bit 4
7037 #define PWM1OFL5 PWM1OFLbits.PWM1OFL5 // bit 5
7038 #define PWM1OFL6 PWM1OFLbits.PWM1OFL6 // bit 6
7039 #define PWM1OFL7 PWM1OFLbits.PWM1OFL7 // bit 7
7040
7041 #define PWM1PHH0 PWM1PHHbits.PWM1PHH0 // bit 0
7042 #define PWM1PHH1 PWM1PHHbits.PWM1PHH1 // bit 1
7043 #define PWM1PHH2 PWM1PHHbits.PWM1PHH2 // bit 2
7044 #define PWM1PHH3 PWM1PHHbits.PWM1PHH3 // bit 3
7045 #define PWM1PHH4 PWM1PHHbits.PWM1PHH4 // bit 4
7046 #define PWM1PHH5 PWM1PHHbits.PWM1PHH5 // bit 5
7047 #define PWM1PHH6 PWM1PHHbits.PWM1PHH6 // bit 6
7048 #define PWM1PHH7 PWM1PHHbits.PWM1PHH7 // bit 7
7049
7050 #define PWM1PHL0 PWM1PHLbits.PWM1PHL0 // bit 0
7051 #define PWM1PHL1 PWM1PHLbits.PWM1PHL1 // bit 1
7052 #define PWM1PHL2 PWM1PHLbits.PWM1PHL2 // bit 2
7053 #define PWM1PHL3 PWM1PHLbits.PWM1PHL3 // bit 3
7054 #define PWM1PHL4 PWM1PHLbits.PWM1PHL4 // bit 4
7055 #define PWM1PHL5 PWM1PHLbits.PWM1PHL5 // bit 5
7056 #define PWM1PHL6 PWM1PHLbits.PWM1PHL6 // bit 6
7057 #define PWM1PHL7 PWM1PHLbits.PWM1PHL7 // bit 7
7058
7059 #define PWM1PRH0 PWM1PRHbits.PWM1PRH0 // bit 0
7060 #define PWM1PRH1 PWM1PRHbits.PWM1PRH1 // bit 1
7061 #define PWM1PRH2 PWM1PRHbits.PWM1PRH2 // bit 2
7062 #define PWM1PRH3 PWM1PRHbits.PWM1PRH3 // bit 3
7063 #define PWM1PRH4 PWM1PRHbits.PWM1PRH4 // bit 4
7064 #define PWM1PRH5 PWM1PRHbits.PWM1PRH5 // bit 5
7065 #define PWM1PRH6 PWM1PRHbits.PWM1PRH6 // bit 6
7066 #define PWM1PRH7 PWM1PRHbits.PWM1PRH7 // bit 7
7067
7068 #define PWM1PRL0 PWM1PRLbits.PWM1PRL0 // bit 0
7069 #define PWM1PRL1 PWM1PRLbits.PWM1PRL1 // bit 1
7070 #define PWM1PRL2 PWM1PRLbits.PWM1PRL2 // bit 2
7071 #define PWM1PRL3 PWM1PRLbits.PWM1PRL3 // bit 3
7072 #define PWM1PRL4 PWM1PRLbits.PWM1PRL4 // bit 4
7073 #define PWM1PRL5 PWM1PRLbits.PWM1PRL5 // bit 5
7074 #define PWM1PRL6 PWM1PRLbits.PWM1PRL6 // bit 6
7075 #define PWM1PRL7 PWM1PRLbits.PWM1PRL7 // bit 7
7076
7077 #define PWM1TMRH0 PWM1TMRHbits.PWM1TMRH0 // bit 0
7078 #define PWM1TMRH1 PWM1TMRHbits.PWM1TMRH1 // bit 1
7079 #define PWM1TMRH2 PWM1TMRHbits.PWM1TMRH2 // bit 2
7080 #define PWM1TMRH3 PWM1TMRHbits.PWM1TMRH3 // bit 3
7081 #define PWM1TMRH4 PWM1TMRHbits.PWM1TMRH4 // bit 4
7082 #define PWM1TMRH5 PWM1TMRHbits.PWM1TMRH5 // bit 5
7083 #define PWM1TMRH6 PWM1TMRHbits.PWM1TMRH6 // bit 6
7084 #define PWM1TMRH7 PWM1TMRHbits.PWM1TMRH7 // bit 7
7085
7086 #define PWM1TMRL0 PWM1TMRLbits.PWM1TMRL0 // bit 0
7087 #define PWM1TMRL1 PWM1TMRLbits.PWM1TMRL1 // bit 1
7088 #define PWM1TMRL2 PWM1TMRLbits.PWM1TMRL2 // bit 2
7089 #define PWM1TMRL3 PWM1TMRLbits.PWM1TMRL3 // bit 3
7090 #define PWM1TMRL4 PWM1TMRLbits.PWM1TMRL4 // bit 4
7091 #define PWM1TMRL5 PWM1TMRLbits.PWM1TMRL5 // bit 5
7092 #define PWM1TMRL6 PWM1TMRLbits.PWM1TMRL6 // bit 6
7093 #define PWM1TMRL7 PWM1TMRLbits.PWM1TMRL7 // bit 7
7094
7095 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
7096 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
7097 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
7098 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
7099 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
7100 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
7101 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
7102 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
7103
7104 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 0
7105 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 1
7106 #define PWM2DCL2 PWM2DCLbits.PWM2DCL2 // bit 2
7107 #define PWM2DCL3 PWM2DCLbits.PWM2DCL3 // bit 3
7108 #define PWM2DCL4 PWM2DCLbits.PWM2DCL4 // bit 4
7109 #define PWM2DCL5 PWM2DCLbits.PWM2DCL5 // bit 5
7110 #define PWM2DCL6 PWM2DCLbits.PWM2DCL6 // bit 6
7111 #define PWM2DCL7 PWM2DCLbits.PWM2DCL7 // bit 7
7112
7113 #define PWM2OFH0 PWM2OFHbits.PWM2OFH0 // bit 0
7114 #define PWM2OFH1 PWM2OFHbits.PWM2OFH1 // bit 1
7115 #define PWM2OFH2 PWM2OFHbits.PWM2OFH2 // bit 2
7116 #define PWM2OFH3 PWM2OFHbits.PWM2OFH3 // bit 3
7117 #define PWM2OFH4 PWM2OFHbits.PWM2OFH4 // bit 4
7118 #define PWM2OFH5 PWM2OFHbits.PWM2OFH5 // bit 5
7119 #define PWM2OFH6 PWM2OFHbits.PWM2OFH6 // bit 6
7120 #define PWM2OFH7 PWM2OFHbits.PWM2OFH7 // bit 7
7121
7122 #define PWM2OFL0 PWM2OFLbits.PWM2OFL0 // bit 0
7123 #define PWM2OFL1 PWM2OFLbits.PWM2OFL1 // bit 1
7124 #define PWM2OFL2 PWM2OFLbits.PWM2OFL2 // bit 2
7125 #define PWM2OFL3 PWM2OFLbits.PWM2OFL3 // bit 3
7126 #define PWM2OFL4 PWM2OFLbits.PWM2OFL4 // bit 4
7127 #define PWM2OFL5 PWM2OFLbits.PWM2OFL5 // bit 5
7128 #define PWM2OFL6 PWM2OFLbits.PWM2OFL6 // bit 6
7129 #define PWM2OFL7 PWM2OFLbits.PWM2OFL7 // bit 7
7130
7131 #define PWM2PHH0 PWM2PHHbits.PWM2PHH0 // bit 0
7132 #define PWM2PHH1 PWM2PHHbits.PWM2PHH1 // bit 1
7133 #define PWM2PHH2 PWM2PHHbits.PWM2PHH2 // bit 2
7134 #define PWM2PHH3 PWM2PHHbits.PWM2PHH3 // bit 3
7135 #define PWM2PHH4 PWM2PHHbits.PWM2PHH4 // bit 4
7136 #define PWM2PHH5 PWM2PHHbits.PWM2PHH5 // bit 5
7137 #define PWM2PHH6 PWM2PHHbits.PWM2PHH6 // bit 6
7138 #define PWM2PHH7 PWM2PHHbits.PWM2PHH7 // bit 7
7139
7140 #define PWM2PHL0 PWM2PHLbits.PWM2PHL0 // bit 0
7141 #define PWM2PHL1 PWM2PHLbits.PWM2PHL1 // bit 1
7142 #define PWM2PHL2 PWM2PHLbits.PWM2PHL2 // bit 2
7143 #define PWM2PHL3 PWM2PHLbits.PWM2PHL3 // bit 3
7144 #define PWM2PHL4 PWM2PHLbits.PWM2PHL4 // bit 4
7145 #define PWM2PHL5 PWM2PHLbits.PWM2PHL5 // bit 5
7146 #define PWM2PHL6 PWM2PHLbits.PWM2PHL6 // bit 6
7147 #define PWM2PHL7 PWM2PHLbits.PWM2PHL7 // bit 7
7148
7149 #define PWM2PRH0 PWM2PRHbits.PWM2PRH0 // bit 0
7150 #define PWM2PRH1 PWM2PRHbits.PWM2PRH1 // bit 1
7151 #define PWM2PRH2 PWM2PRHbits.PWM2PRH2 // bit 2
7152 #define PWM2PRH3 PWM2PRHbits.PWM2PRH3 // bit 3
7153 #define PWM2PRH4 PWM2PRHbits.PWM2PRH4 // bit 4
7154 #define PWM2PRH5 PWM2PRHbits.PWM2PRH5 // bit 5
7155 #define PWM2PRH6 PWM2PRHbits.PWM2PRH6 // bit 6
7156 #define PWM2PRH7 PWM2PRHbits.PWM2PRH7 // bit 7
7157
7158 #define PWM2PRL0 PWM2PRLbits.PWM2PRL0 // bit 0
7159 #define PWM2PRL1 PWM2PRLbits.PWM2PRL1 // bit 1
7160 #define PWM2PRL2 PWM2PRLbits.PWM2PRL2 // bit 2
7161 #define PWM2PRL3 PWM2PRLbits.PWM2PRL3 // bit 3
7162 #define PWM2PRL4 PWM2PRLbits.PWM2PRL4 // bit 4
7163 #define PWM2PRL5 PWM2PRLbits.PWM2PRL5 // bit 5
7164 #define PWM2PRL6 PWM2PRLbits.PWM2PRL6 // bit 6
7165 #define PWM2PRL7 PWM2PRLbits.PWM2PRL7 // bit 7
7166
7167 #define PWM2TMRH0 PWM2TMRHbits.PWM2TMRH0 // bit 0
7168 #define PWM2TMRH1 PWM2TMRHbits.PWM2TMRH1 // bit 1
7169 #define PWM2TMRH2 PWM2TMRHbits.PWM2TMRH2 // bit 2
7170 #define PWM2TMRH3 PWM2TMRHbits.PWM2TMRH3 // bit 3
7171 #define PWM2TMRH4 PWM2TMRHbits.PWM2TMRH4 // bit 4
7172 #define PWM2TMRH5 PWM2TMRHbits.PWM2TMRH5 // bit 5
7173 #define PWM2TMRH6 PWM2TMRHbits.PWM2TMRH6 // bit 6
7174 #define PWM2TMRH7 PWM2TMRHbits.PWM2TMRH7 // bit 7
7175
7176 #define PWM2TMRL0 PWM2TMRLbits.PWM2TMRL0 // bit 0
7177 #define PWM2TMRL1 PWM2TMRLbits.PWM2TMRL1 // bit 1
7178 #define PWM2TMRL2 PWM2TMRLbits.PWM2TMRL2 // bit 2
7179 #define PWM2TMRL3 PWM2TMRLbits.PWM2TMRL3 // bit 3
7180 #define PWM2TMRL4 PWM2TMRLbits.PWM2TMRL4 // bit 4
7181 #define PWM2TMRL5 PWM2TMRLbits.PWM2TMRL5 // bit 5
7182 #define PWM2TMRL6 PWM2TMRLbits.PWM2TMRL6 // bit 6
7183 #define PWM2TMRL7 PWM2TMRLbits.PWM2TMRL7 // bit 7
7184
7185 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
7186 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
7187 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
7188 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
7189 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
7190 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
7191 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
7192 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
7193
7194 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 0
7195 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 1
7196 #define PWM3DCL2 PWM3DCLbits.PWM3DCL2 // bit 2
7197 #define PWM3DCL3 PWM3DCLbits.PWM3DCL3 // bit 3
7198 #define PWM3DCL4 PWM3DCLbits.PWM3DCL4 // bit 4
7199 #define PWM3DCL5 PWM3DCLbits.PWM3DCL5 // bit 5
7200 #define PWM3DCL6 PWM3DCLbits.PWM3DCL6 // bit 6
7201 #define PWM3DCL7 PWM3DCLbits.PWM3DCL7 // bit 7
7202
7203 #define PWM3OFH0 PWM3OFHbits.PWM3OFH0 // bit 0
7204 #define PWM3OFH1 PWM3OFHbits.PWM3OFH1 // bit 1
7205 #define PWM3OFH2 PWM3OFHbits.PWM3OFH2 // bit 2
7206 #define PWM3OFH3 PWM3OFHbits.PWM3OFH3 // bit 3
7207 #define PWM3OFH4 PWM3OFHbits.PWM3OFH4 // bit 4
7208 #define PWM3OFH5 PWM3OFHbits.PWM3OFH5 // bit 5
7209 #define PWM3OFH6 PWM3OFHbits.PWM3OFH6 // bit 6
7210 #define PWM3OFH7 PWM3OFHbits.PWM3OFH7 // bit 7
7211
7212 #define PWM3OFL0 PWM3OFLbits.PWM3OFL0 // bit 0
7213 #define PWM3OFL1 PWM3OFLbits.PWM3OFL1 // bit 1
7214 #define PWM3OFL2 PWM3OFLbits.PWM3OFL2 // bit 2
7215 #define PWM3OFL3 PWM3OFLbits.PWM3OFL3 // bit 3
7216 #define PWM3OFL4 PWM3OFLbits.PWM3OFL4 // bit 4
7217 #define PWM3OFL5 PWM3OFLbits.PWM3OFL5 // bit 5
7218 #define PWM3OFL6 PWM3OFLbits.PWM3OFL6 // bit 6
7219 #define PWM3OFL7 PWM3OFLbits.PWM3OFL7 // bit 7
7220
7221 #define PWM3PHH0 PWM3PHHbits.PWM3PHH0 // bit 0
7222 #define PWM3PHH1 PWM3PHHbits.PWM3PHH1 // bit 1
7223 #define PWM3PHH2 PWM3PHHbits.PWM3PHH2 // bit 2
7224 #define PWM3PHH3 PWM3PHHbits.PWM3PHH3 // bit 3
7225 #define PWM3PHH4 PWM3PHHbits.PWM3PHH4 // bit 4
7226 #define PWM3PHH5 PWM3PHHbits.PWM3PHH5 // bit 5
7227 #define PWM3PHH6 PWM3PHHbits.PWM3PHH6 // bit 6
7228 #define PWM3PHH7 PWM3PHHbits.PWM3PHH7 // bit 7
7229
7230 #define PWM3PHL0 PWM3PHLbits.PWM3PHL0 // bit 0
7231 #define PWM3PHL1 PWM3PHLbits.PWM3PHL1 // bit 1
7232 #define PWM3PHL2 PWM3PHLbits.PWM3PHL2 // bit 2
7233 #define PWM3PHL3 PWM3PHLbits.PWM3PHL3 // bit 3
7234 #define PWM3PHL4 PWM3PHLbits.PWM3PHL4 // bit 4
7235 #define PWM3PHL5 PWM3PHLbits.PWM3PHL5 // bit 5
7236 #define PWM3PHL6 PWM3PHLbits.PWM3PHL6 // bit 6
7237 #define PWM3PHL7 PWM3PHLbits.PWM3PHL7 // bit 7
7238
7239 #define PWM3PRH0 PWM3PRHbits.PWM3PRH0 // bit 0
7240 #define PWM3PRH1 PWM3PRHbits.PWM3PRH1 // bit 1
7241 #define PWM3PRH2 PWM3PRHbits.PWM3PRH2 // bit 2
7242 #define PWM3PRH3 PWM3PRHbits.PWM3PRH3 // bit 3
7243 #define PWM3PRH4 PWM3PRHbits.PWM3PRH4 // bit 4
7244 #define PWM3PRH5 PWM3PRHbits.PWM3PRH5 // bit 5
7245 #define PWM3PRH6 PWM3PRHbits.PWM3PRH6 // bit 6
7246 #define PWM3PRH7 PWM3PRHbits.PWM3PRH7 // bit 7
7247
7248 #define PWM3PRL0 PWM3PRLbits.PWM3PRL0 // bit 0
7249 #define PWM3PRL1 PWM3PRLbits.PWM3PRL1 // bit 1
7250 #define PWM3PRL2 PWM3PRLbits.PWM3PRL2 // bit 2
7251 #define PWM3PRL3 PWM3PRLbits.PWM3PRL3 // bit 3
7252 #define PWM3PRL4 PWM3PRLbits.PWM3PRL4 // bit 4
7253 #define PWM3PRL5 PWM3PRLbits.PWM3PRL5 // bit 5
7254 #define PWM3PRL6 PWM3PRLbits.PWM3PRL6 // bit 6
7255 #define PWM3PRL7 PWM3PRLbits.PWM3PRL7 // bit 7
7256
7257 #define PWM3TMRH0 PWM3TMRHbits.PWM3TMRH0 // bit 0
7258 #define PWM3TMRH1 PWM3TMRHbits.PWM3TMRH1 // bit 1
7259 #define PWM3TMRH2 PWM3TMRHbits.PWM3TMRH2 // bit 2
7260 #define PWM3TMRH3 PWM3TMRHbits.PWM3TMRH3 // bit 3
7261 #define PWM3TMRH4 PWM3TMRHbits.PWM3TMRH4 // bit 4
7262 #define PWM3TMRH5 PWM3TMRHbits.PWM3TMRH5 // bit 5
7263 #define PWM3TMRH6 PWM3TMRHbits.PWM3TMRH6 // bit 6
7264 #define PWM3TMRH7 PWM3TMRHbits.PWM3TMRH7 // bit 7
7265
7266 #define PWM3TMRL0 PWM3TMRLbits.PWM3TMRL0 // bit 0
7267 #define PWM3TMRL1 PWM3TMRLbits.PWM3TMRL1 // bit 1
7268 #define PWM3TMRL2 PWM3TMRLbits.PWM3TMRL2 // bit 2
7269 #define PWM3TMRL3 PWM3TMRLbits.PWM3TMRL3 // bit 3
7270 #define PWM3TMRL4 PWM3TMRLbits.PWM3TMRL4 // bit 4
7271 #define PWM3TMRL5 PWM3TMRLbits.PWM3TMRL5 // bit 5
7272 #define PWM3TMRL6 PWM3TMRLbits.PWM3TMRL6 // bit 6
7273 #define PWM3TMRL7 PWM3TMRLbits.PWM3TMRL7 // bit 7
7274
7275 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
7276 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
7277 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
7278 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
7279 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
7280 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
7281 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
7282 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
7283
7284 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 0
7285 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 1
7286 #define PWM4DCL2 PWM4DCLbits.PWM4DCL2 // bit 2
7287 #define PWM4DCL3 PWM4DCLbits.PWM4DCL3 // bit 3
7288 #define PWM4DCL4 PWM4DCLbits.PWM4DCL4 // bit 4
7289 #define PWM4DCL5 PWM4DCLbits.PWM4DCL5 // bit 5
7290 #define PWM4DCL6 PWM4DCLbits.PWM4DCL6 // bit 6
7291 #define PWM4DCL7 PWM4DCLbits.PWM4DCL7 // bit 7
7292
7293 #define PWM4OFH0 PWM4OFHbits.PWM4OFH0 // bit 0
7294 #define PWM4OFH1 PWM4OFHbits.PWM4OFH1 // bit 1
7295 #define PWM4OFH2 PWM4OFHbits.PWM4OFH2 // bit 2
7296 #define PWM4OFH3 PWM4OFHbits.PWM4OFH3 // bit 3
7297 #define PWM4OFH4 PWM4OFHbits.PWM4OFH4 // bit 4
7298 #define PWM4OFH5 PWM4OFHbits.PWM4OFH5 // bit 5
7299 #define PWM4OFH6 PWM4OFHbits.PWM4OFH6 // bit 6
7300 #define PWM4OFH7 PWM4OFHbits.PWM4OFH7 // bit 7
7301
7302 #define PWM4OFL0 PWM4OFLbits.PWM4OFL0 // bit 0
7303 #define PWM4OFL1 PWM4OFLbits.PWM4OFL1 // bit 1
7304 #define PWM4OFL2 PWM4OFLbits.PWM4OFL2 // bit 2
7305 #define PWM4OFL3 PWM4OFLbits.PWM4OFL3 // bit 3
7306 #define PWM4OFL4 PWM4OFLbits.PWM4OFL4 // bit 4
7307 #define PWM4OFL5 PWM4OFLbits.PWM4OFL5 // bit 5
7308 #define PWM4OFL6 PWM4OFLbits.PWM4OFL6 // bit 6
7309 #define PWM4OFL7 PWM4OFLbits.PWM4OFL7 // bit 7
7310
7311 #define PWM4PHH0 PWM4PHHbits.PWM4PHH0 // bit 0
7312 #define PWM4PHH1 PWM4PHHbits.PWM4PHH1 // bit 1
7313 #define PWM4PHH2 PWM4PHHbits.PWM4PHH2 // bit 2
7314 #define PWM4PHH3 PWM4PHHbits.PWM4PHH3 // bit 3
7315 #define PWM4PHH4 PWM4PHHbits.PWM4PHH4 // bit 4
7316 #define PWM4PHH5 PWM4PHHbits.PWM4PHH5 // bit 5
7317 #define PWM4PHH6 PWM4PHHbits.PWM4PHH6 // bit 6
7318 #define PWM4PHH7 PWM4PHHbits.PWM4PHH7 // bit 7
7319
7320 #define PWM4PHL0 PWM4PHLbits.PWM4PHL0 // bit 0
7321 #define PWM4PHL1 PWM4PHLbits.PWM4PHL1 // bit 1
7322 #define PWM4PHL2 PWM4PHLbits.PWM4PHL2 // bit 2
7323 #define PWM4PHL3 PWM4PHLbits.PWM4PHL3 // bit 3
7324 #define PWM4PHL4 PWM4PHLbits.PWM4PHL4 // bit 4
7325 #define PWM4PHL5 PWM4PHLbits.PWM4PHL5 // bit 5
7326 #define PWM4PHL6 PWM4PHLbits.PWM4PHL6 // bit 6
7327 #define PWM4PHL7 PWM4PHLbits.PWM4PHL7 // bit 7
7328
7329 #define PWM4PRH0 PWM4PRHbits.PWM4PRH0 // bit 0
7330 #define PWM4PRH1 PWM4PRHbits.PWM4PRH1 // bit 1
7331 #define PWM4PRH2 PWM4PRHbits.PWM4PRH2 // bit 2
7332 #define PWM4PRH3 PWM4PRHbits.PWM4PRH3 // bit 3
7333 #define PWM4PRH4 PWM4PRHbits.PWM4PRH4 // bit 4
7334 #define PWM4PRH5 PWM4PRHbits.PWM4PRH5 // bit 5
7335 #define PWM4PRH6 PWM4PRHbits.PWM4PRH6 // bit 6
7336 #define PWM4PRH7 PWM4PRHbits.PWM4PRH7 // bit 7
7337
7338 #define PWM4PRL0 PWM4PRLbits.PWM4PRL0 // bit 0
7339 #define PWM4PRL1 PWM4PRLbits.PWM4PRL1 // bit 1
7340 #define PWM4PRL2 PWM4PRLbits.PWM4PRL2 // bit 2
7341 #define PWM4PRL3 PWM4PRLbits.PWM4PRL3 // bit 3
7342 #define PWM4PRL4 PWM4PRLbits.PWM4PRL4 // bit 4
7343 #define PWM4PRL5 PWM4PRLbits.PWM4PRL5 // bit 5
7344 #define PWM4PRL6 PWM4PRLbits.PWM4PRL6 // bit 6
7345 #define PWM4PRL7 PWM4PRLbits.PWM4PRL7 // bit 7
7346
7347 #define PWM4TMRH0 PWM4TMRHbits.PWM4TMRH0 // bit 0
7348 #define PWM4TMRH1 PWM4TMRHbits.PWM4TMRH1 // bit 1
7349 #define PWM4TMRH2 PWM4TMRHbits.PWM4TMRH2 // bit 2
7350 #define PWM4TMRH3 PWM4TMRHbits.PWM4TMRH3 // bit 3
7351 #define PWM4TMRH4 PWM4TMRHbits.PWM4TMRH4 // bit 4
7352 #define PWM4TMRH5 PWM4TMRHbits.PWM4TMRH5 // bit 5
7353 #define PWM4TMRH6 PWM4TMRHbits.PWM4TMRH6 // bit 6
7354 #define PWM4TMRH7 PWM4TMRHbits.PWM4TMRH7 // bit 7
7355
7356 #define PWM4TMRL0 PWM4TMRLbits.PWM4TMRL0 // bit 0
7357 #define PWM4TMRL1 PWM4TMRLbits.PWM4TMRL1 // bit 1
7358 #define PWM4TMRL2 PWM4TMRLbits.PWM4TMRL2 // bit 2
7359 #define PWM4TMRL3 PWM4TMRLbits.PWM4TMRL3 // bit 3
7360 #define PWM4TMRL4 PWM4TMRLbits.PWM4TMRL4 // bit 4
7361 #define PWM4TMRL5 PWM4TMRLbits.PWM4TMRL5 // bit 5
7362 #define PWM4TMRL6 PWM4TMRLbits.PWM4TMRL6 // bit 6
7363 #define PWM4TMRL7 PWM4TMRLbits.PWM4TMRL7 // bit 7
7364
7365 #define PWM1EN_A PWMENbits.PWM1EN_A // bit 0, shadows bit in PWMENbits
7366 #define MPWM1EN PWMENbits.MPWM1EN // bit 0, shadows bit in PWMENbits
7367 #define PWM2EN_A PWMENbits.PWM2EN_A // bit 1, shadows bit in PWMENbits
7368 #define MPWM2EN PWMENbits.MPWM2EN // bit 1, shadows bit in PWMENbits
7369 #define PWM3EN_A PWMENbits.PWM3EN_A // bit 2, shadows bit in PWMENbits
7370 #define MPWM3EN PWMENbits.MPWM3EN // bit 2, shadows bit in PWMENbits
7371 #define PWM4EN_A PWMENbits.PWM4EN_A // bit 3
7372
7373 #define PWM1LDA_A PWMLDbits.PWM1LDA_A // bit 0, shadows bit in PWMLDbits
7374 #define MPWM1LD PWMLDbits.MPWM1LD // bit 0, shadows bit in PWMLDbits
7375 #define PWM2LDA_A PWMLDbits.PWM2LDA_A // bit 1, shadows bit in PWMLDbits
7376 #define MPWM2LD PWMLDbits.MPWM2LD // bit 1, shadows bit in PWMLDbits
7377 #define PWM3LDA_A PWMLDbits.PWM3LDA_A // bit 2, shadows bit in PWMLDbits
7378 #define MPWM3LD PWMLDbits.MPWM3LD // bit 2, shadows bit in PWMLDbits
7379 #define PWM4LDA_A PWMLDbits.PWM4LDA_A // bit 3
7380
7381 #define PWM1OUT_A PWMOUTbits.PWM1OUT_A // bit 0, shadows bit in PWMOUTbits
7382 #define MPWM1OUT PWMOUTbits.MPWM1OUT // bit 0, shadows bit in PWMOUTbits
7383 #define PWM2OUT_A PWMOUTbits.PWM2OUT_A // bit 1, shadows bit in PWMOUTbits
7384 #define MPWM2OUT PWMOUTbits.MPWM2OUT // bit 1, shadows bit in PWMOUTbits
7385 #define PWM3OUT_A PWMOUTbits.PWM3OUT_A // bit 2, shadows bit in PWMOUTbits
7386 #define MPWM3OUT PWMOUTbits.MPWM3OUT // bit 2, shadows bit in PWMOUTbits
7387 #define PWM4OUT_A PWMOUTbits.PWM4OUT_A // bit 3
7388
7389 #define RA0PPS0 RA0PPSbits.RA0PPS0 // bit 0
7390 #define RA0PPS1 RA0PPSbits.RA0PPS1 // bit 1
7391 #define RA0PPS2 RA0PPSbits.RA0PPS2 // bit 2
7392 #define RA0PPS3 RA0PPSbits.RA0PPS3 // bit 3
7393
7394 #define RA1PPS0 RA1PPSbits.RA1PPS0 // bit 0
7395 #define RA1PPS1 RA1PPSbits.RA1PPS1 // bit 1
7396 #define RA1PPS2 RA1PPSbits.RA1PPS2 // bit 2
7397 #define RA1PPS3 RA1PPSbits.RA1PPS3 // bit 3
7398
7399 #define RA2PPS0 RA2PPSbits.RA2PPS0 // bit 0
7400 #define RA2PPS1 RA2PPSbits.RA2PPS1 // bit 1
7401 #define RA2PPS2 RA2PPSbits.RA2PPS2 // bit 2
7402 #define RA2PPS3 RA2PPSbits.RA2PPS3 // bit 3
7403
7404 #define RA4PPS0 RA4PPSbits.RA4PPS0 // bit 0
7405 #define RA4PPS1 RA4PPSbits.RA4PPS1 // bit 1
7406 #define RA4PPS2 RA4PPSbits.RA4PPS2 // bit 2
7407 #define RA4PPS3 RA4PPSbits.RA4PPS3 // bit 3
7408
7409 #define RA5PPS0 RA5PPSbits.RA5PPS0 // bit 0
7410 #define RA5PPS1 RA5PPSbits.RA5PPS1 // bit 1
7411 #define RA5PPS2 RA5PPSbits.RA5PPS2 // bit 2
7412 #define RA5PPS3 RA5PPSbits.RA5PPS3 // bit 3
7413
7414 #define RC0PPS0 RC0PPSbits.RC0PPS0 // bit 0
7415 #define RC0PPS1 RC0PPSbits.RC0PPS1 // bit 1
7416 #define RC0PPS2 RC0PPSbits.RC0PPS2 // bit 2
7417 #define RC0PPS3 RC0PPSbits.RC0PPS3 // bit 3
7418
7419 #define RC1PPS0 RC1PPSbits.RC1PPS0 // bit 0
7420 #define RC1PPS1 RC1PPSbits.RC1PPS1 // bit 1
7421 #define RC1PPS2 RC1PPSbits.RC1PPS2 // bit 2
7422 #define RC1PPS3 RC1PPSbits.RC1PPS3 // bit 3
7423
7424 #define RC3PPS0 RC3PPSbits.RC3PPS0 // bit 0
7425 #define RC3PPS1 RC3PPSbits.RC3PPS1 // bit 1
7426 #define RC3PPS2 RC3PPSbits.RC3PPS2 // bit 2
7427 #define RC3PPS3 RC3PPSbits.RC3PPS3 // bit 3
7428
7429 #define RC4PPS0 RC4PPSbits.RC4PPS0 // bit 0
7430 #define RC4PPS1 RC4PPSbits.RC4PPS1 // bit 1
7431 #define RC4PPS2 RC4PPSbits.RC4PPS2 // bit 2
7432 #define RC4PPS3 RC4PPSbits.RC4PPS3 // bit 3
7433
7434 #define RC5PPS0 RC5PPSbits.RC5PPS0 // bit 0
7435 #define RC5PPS1 RC5PPSbits.RC5PPS1 // bit 1
7436 #define RC5PPS2 RC5PPSbits.RC5PPS2 // bit 2
7437 #define RC5PPS3 RC5PPSbits.RC5PPS3 // bit 3
7438
7439 #define RX9D RCSTAbits.RX9D // bit 0
7440 #define OERR RCSTAbits.OERR // bit 1
7441 #define FERR RCSTAbits.FERR // bit 2
7442 #define ADDEN RCSTAbits.ADDEN // bit 3
7443 #define CREN RCSTAbits.CREN // bit 4
7444 #define SREN RCSTAbits.SREN // bit 5
7445 #define RX9 RCSTAbits.RX9 // bit 6
7446 #define SPEN RCSTAbits.SPEN // bit 7
7447
7448 #define RXPPS0 RXPPSbits.RXPPS0 // bit 0
7449 #define RXPPS1 RXPPSbits.RXPPS1 // bit 1
7450 #define RXPPS2 RXPPSbits.RXPPS2 // bit 2
7451 #define RXPPS3 RXPPSbits.RXPPS3 // bit 3
7452 #define RXPPS4 RXPPSbits.RXPPS4 // bit 4
7453
7454 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
7455 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
7456 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
7457 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
7458 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
7459
7460 #define SLRC0 SLRCONCbits.SLRC0 // bit 0
7461 #define SLRC1 SLRCONCbits.SLRC1 // bit 1
7462 #define SLRC2 SLRCONCbits.SLRC2 // bit 2
7463 #define SLRC3 SLRCONCbits.SLRC3 // bit 3
7464 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
7465 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
7466
7467 #define C STATUSbits.C // bit 0
7468 #define DC STATUSbits.DC // bit 1
7469 #define Z STATUSbits.Z // bit 2
7470 #define NOT_PD STATUSbits.NOT_PD // bit 3
7471 #define NOT_TO STATUSbits.NOT_TO // bit 4
7472
7473 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
7474 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
7475 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
7476
7477 #define T0CKIPPS0 T0CKIPPSbits.T0CKIPPS0 // bit 0
7478 #define T0CKIPPS1 T0CKIPPSbits.T0CKIPPS1 // bit 1
7479 #define T0CKIPPS2 T0CKIPPSbits.T0CKIPPS2 // bit 2
7480 #define T0CKIPPS3 T0CKIPPSbits.T0CKIPPS3 // bit 3
7481 #define T0CKIPPS4 T0CKIPPSbits.T0CKIPPS4 // bit 4
7482
7483 #define T1CKIPPS0 T1CKIPPSbits.T1CKIPPS0 // bit 0
7484 #define T1CKIPPS1 T1CKIPPSbits.T1CKIPPS1 // bit 1
7485 #define T1CKIPPS2 T1CKIPPSbits.T1CKIPPS2 // bit 2
7486 #define T1CKIPPS3 T1CKIPPSbits.T1CKIPPS3 // bit 3
7487 #define T1CKIPPS4 T1CKIPPSbits.T1CKIPPS4 // bit 4
7488
7489 #define TMR1ON T1CONbits.TMR1ON // bit 0
7490 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
7491 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
7492 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
7493 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
7494 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
7495 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
7496
7497 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
7498 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
7499 #define T1GVAL T1GCONbits.T1GVAL // bit 2
7500 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
7501 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits
7502 #define T1GSPM T1GCONbits.T1GSPM // bit 4
7503 #define T1GTM T1GCONbits.T1GTM // bit 5
7504 #define T1GPOL T1GCONbits.T1GPOL // bit 6
7505 #define TMR1GE T1GCONbits.TMR1GE // bit 7
7506
7507 #define T1GPPS0 T1GPPSbits.T1GPPS0 // bit 0
7508 #define T1GPPS1 T1GPPSbits.T1GPPS1 // bit 1
7509 #define T1GPPS2 T1GPPSbits.T1GPPS2 // bit 2
7510 #define T1GPPS3 T1GPPSbits.T1GPPS3 // bit 3
7511 #define T1GPPS4 T1GPPSbits.T1GPPS4 // bit 4
7512
7513 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
7514 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
7515 #define TMR2ON T2CONbits.TMR2ON // bit 2
7516 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
7517 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
7518 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
7519 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
7520
7521 #define TRISA0 TRISAbits.TRISA0 // bit 0
7522 #define TRISA1 TRISAbits.TRISA1 // bit 1
7523 #define TRISA2 TRISAbits.TRISA2 // bit 2
7524 #define TRISA3 TRISAbits.TRISA3 // bit 3
7525 #define TRISA4 TRISAbits.TRISA4 // bit 4
7526 #define TRISA5 TRISAbits.TRISA5 // bit 5
7527
7528 #define TRISC0 TRISCbits.TRISC0 // bit 0
7529 #define TRISC1 TRISCbits.TRISC1 // bit 1
7530 #define TRISC2 TRISCbits.TRISC2 // bit 2
7531 #define TRISC3 TRISCbits.TRISC3 // bit 3
7532 #define TRISC4 TRISCbits.TRISC4 // bit 4
7533 #define TRISC5 TRISCbits.TRISC5 // bit 5
7534
7535 #define TX9D TXSTAbits.TX9D // bit 0
7536 #define TRMT TXSTAbits.TRMT // bit 1
7537 #define BRGH TXSTAbits.BRGH // bit 2
7538 #define SENDB TXSTAbits.SENDB // bit 3
7539 #define SYNC TXSTAbits.SYNC // bit 4
7540 #define TXEN TXSTAbits.TXEN // bit 5
7541 #define TX9 TXSTAbits.TX9 // bit 6
7542 #define CSRC TXSTAbits.CSRC // bit 7
7543
7544 #define Reserved VREGCONbits.Reserved // bit 0
7545 #define VREGPM VREGCONbits.VREGPM // bit 1
7546
7547 #define SWDTEN WDTCONbits.SWDTEN // bit 0
7548 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
7549 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
7550 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
7551 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
7552 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
7553
7554 #define WPUA0 WPUAbits.WPUA0 // bit 0
7555 #define WPUA1 WPUAbits.WPUA1 // bit 1
7556 #define WPUA2 WPUAbits.WPUA2 // bit 2
7557 #define WPUA3 WPUAbits.WPUA3 // bit 3
7558 #define WPUA4 WPUAbits.WPUA4 // bit 4
7559 #define WPUA5 WPUAbits.WPUA5 // bit 5
7560
7561 #define WPUC0 WPUCbits.WPUC0 // bit 0
7562 #define WPUC1 WPUCbits.WPUC1 // bit 1
7563 #define WPUC2 WPUCbits.WPUC2 // bit 2
7564 #define WPUC3 WPUCbits.WPUC3 // bit 3
7565 #define WPUC4 WPUCbits.WPUC4 // bit 4
7566 #define WPUC5 WPUCbits.WPUC5 // bit 5
7567
7568 #endif // #ifndef NO_BIT_DEFINES
7569
7570 #endif // #ifndef __PIC16F1575_H__
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