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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16f676.h
blob26346dd83b1bf44c857c3cad8fd6b8bfe7a7e39a
1 /*
2 * This declarations of the PIC16F676 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:57 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16F676_H__
26 #define __PIC16F676_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTC_ADDR 0x0007
43 #define PCLATH_ADDR 0x000A
44 #define INTCON_ADDR 0x000B
45 #define PIR1_ADDR 0x000C
46 #define TMR1_ADDR 0x000E
47 #define TMR1L_ADDR 0x000E
48 #define TMR1H_ADDR 0x000F
49 #define T1CON_ADDR 0x0010
50 #define CMCON_ADDR 0x0019
51 #define ADRESH_ADDR 0x001E
52 #define ADCON0_ADDR 0x001F
53 #define OPTION_REG_ADDR 0x0081
54 #define TRISA_ADDR 0x0085
55 #define TRISC_ADDR 0x0087
56 #define PIE1_ADDR 0x008C
57 #define PCON_ADDR 0x008E
58 #define OSCCAL_ADDR 0x0090
59 #define ANSEL_ADDR 0x0091
60 #define WPU_ADDR 0x0095
61 #define WPUA_ADDR 0x0095
62 #define IOC_ADDR 0x0096
63 #define IOCA_ADDR 0x0096
64 #define VRCON_ADDR 0x0099
65 #define EEDAT_ADDR 0x009A
66 #define EEDATA_ADDR 0x009A
67 #define EEADR_ADDR 0x009B
68 #define EECON1_ADDR 0x009C
69 #define EECON2_ADDR 0x009D
70 #define ADRESL_ADDR 0x009E
71 #define ADCON1_ADDR 0x009F
72
73 #endif // #ifndef NO_ADDR_DEFINES
74
75 //==============================================================================
76 //
77 // Register Definitions
78 //
79 //==============================================================================
80
81 extern __at(0x0000) __sfr INDF;
82 extern __at(0x0001) __sfr TMR0;
83 extern __at(0x0002) __sfr PCL;
84
85 //==============================================================================
86 // STATUS Bits
87
88 extern __at(0x0003) __sfr STATUS;
89
90 typedef union
91 {
92 struct
93 {
94 unsigned C : 1;
95 unsigned DC : 1;
96 unsigned Z : 1;
97 unsigned NOT_PD : 1;
98 unsigned NOT_TO : 1;
99 unsigned RP0 : 1;
100 unsigned RP1 : 1;
101 unsigned IRP : 1;
102 };
103
104 struct
105 {
106 unsigned : 5;
107 unsigned RP : 2;
108 unsigned : 1;
109 };
110 } __STATUSbits_t;
111
112 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
113
114 #define _C 0x01
115 #define _DC 0x02
116 #define _Z 0x04
117 #define _NOT_PD 0x08
118 #define _NOT_TO 0x10
119 #define _RP0 0x20
120 #define _RP1 0x40
121 #define _IRP 0x80
122
123 //==============================================================================
124
125 extern __at(0x0004) __sfr FSR;
126
127 //==============================================================================
128 // PORTA Bits
129
130 extern __at(0x0005) __sfr PORTA;
131
132 typedef union
133 {
134 struct
135 {
136 unsigned RA0 : 1;
137 unsigned RA1 : 1;
138 unsigned RA2 : 1;
139 unsigned RA3 : 1;
140 unsigned RA4 : 1;
141 unsigned RA5 : 1;
142 unsigned : 1;
143 unsigned : 1;
144 };
145
146 struct
147 {
148 unsigned RA : 6;
149 unsigned : 2;
150 };
151 } __PORTAbits_t;
152
153 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
154
155 #define _RA0 0x01
156 #define _RA1 0x02
157 #define _RA2 0x04
158 #define _RA3 0x08
159 #define _RA4 0x10
160 #define _RA5 0x20
161
162 //==============================================================================
163
164
165 //==============================================================================
166 // PORTC Bits
167
168 extern __at(0x0007) __sfr PORTC;
169
170 typedef union
171 {
172 struct
173 {
174 unsigned RC0 : 1;
175 unsigned RC1 : 1;
176 unsigned RC2 : 1;
177 unsigned RC3 : 1;
178 unsigned RC4 : 1;
179 unsigned RC5 : 1;
180 unsigned : 1;
181 unsigned : 1;
182 };
183
184 struct
185 {
186 unsigned RC : 6;
187 unsigned : 2;
188 };
189 } __PORTCbits_t;
190
191 extern __at(0x0007) volatile __PORTCbits_t PORTCbits;
192
193 #define _RC0 0x01
194 #define _RC1 0x02
195 #define _RC2 0x04
196 #define _RC3 0x08
197 #define _RC4 0x10
198 #define _RC5 0x20
199
200 //==============================================================================
201
202 extern __at(0x000A) __sfr PCLATH;
203
204 //==============================================================================
205 // INTCON Bits
206
207 extern __at(0x000B) __sfr INTCON;
208
209 typedef union
210 {
211 struct
212 {
213 unsigned RAIF : 1;
214 unsigned INTF : 1;
215 unsigned T0IF : 1;
216 unsigned RAIE : 1;
217 unsigned INTE : 1;
218 unsigned T0IE : 1;
219 unsigned PEIE : 1;
220 unsigned GIE : 1;
221 };
222
223 struct
224 {
225 unsigned : 1;
226 unsigned : 1;
227 unsigned TMR0IF : 1;
228 unsigned : 1;
229 unsigned : 1;
230 unsigned TMR0IE : 1;
231 unsigned : 1;
232 unsigned : 1;
233 };
234 } __INTCONbits_t;
235
236 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
237
238 #define _RAIF 0x01
239 #define _INTF 0x02
240 #define _T0IF 0x04
241 #define _TMR0IF 0x04
242 #define _RAIE 0x08
243 #define _INTE 0x10
244 #define _T0IE 0x20
245 #define _TMR0IE 0x20
246 #define _PEIE 0x40
247 #define _GIE 0x80
248
249 //==============================================================================
250
251
252 //==============================================================================
253 // PIR1 Bits
254
255 extern __at(0x000C) __sfr PIR1;
256
257 typedef union
258 {
259 struct
260 {
261 unsigned TMR1IF : 1;
262 unsigned : 1;
263 unsigned : 1;
264 unsigned CMIF : 1;
265 unsigned : 1;
266 unsigned : 1;
267 unsigned ADIF : 1;
268 unsigned EEIF : 1;
269 };
270
271 struct
272 {
273 unsigned T1IF : 1;
274 unsigned : 1;
275 unsigned : 1;
276 unsigned : 1;
277 unsigned : 1;
278 unsigned : 1;
279 unsigned : 1;
280 unsigned : 1;
281 };
282 } __PIR1bits_t;
283
284 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
285
286 #define _TMR1IF 0x01
287 #define _T1IF 0x01
288 #define _CMIF 0x08
289 #define _ADIF 0x40
290 #define _EEIF 0x80
291
292 //==============================================================================
293
294 extern __at(0x000E) __sfr TMR1;
295 extern __at(0x000E) __sfr TMR1L;
296 extern __at(0x000F) __sfr TMR1H;
297
298 //==============================================================================
299 // T1CON Bits
300
301 extern __at(0x0010) __sfr T1CON;
302
303 typedef union
304 {
305 struct
306 {
307 unsigned TMR1ON : 1;
308 unsigned TMR1CS : 1;
309 unsigned NOT_T1SYNC : 1;
310 unsigned T1OSCEN : 1;
311 unsigned T1CKPS0 : 1;
312 unsigned T1CKPS1 : 1;
313 unsigned TMR1GE : 1;
314 unsigned : 1;
315 };
316
317 struct
318 {
319 unsigned : 4;
320 unsigned T1CKPS : 2;
321 unsigned : 2;
322 };
323 } __T1CONbits_t;
324
325 extern __at(0x0010) volatile __T1CONbits_t T1CONbits;
326
327 #define _TMR1ON 0x01
328 #define _TMR1CS 0x02
329 #define _NOT_T1SYNC 0x04
330 #define _T1OSCEN 0x08
331 #define _T1CKPS0 0x10
332 #define _T1CKPS1 0x20
333 #define _TMR1GE 0x40
334
335 //==============================================================================
336
337
338 //==============================================================================
339 // CMCON Bits
340
341 extern __at(0x0019) __sfr CMCON;
342
343 typedef union
344 {
345 struct
346 {
347 unsigned CM0 : 1;
348 unsigned CM1 : 1;
349 unsigned CM2 : 1;
350 unsigned CIS : 1;
351 unsigned CINV : 1;
352 unsigned : 1;
353 unsigned COUT : 1;
354 unsigned : 1;
355 };
356
357 struct
358 {
359 unsigned CM : 3;
360 unsigned : 5;
361 };
362 } __CMCONbits_t;
363
364 extern __at(0x0019) volatile __CMCONbits_t CMCONbits;
365
366 #define _CM0 0x01
367 #define _CM1 0x02
368 #define _CM2 0x04
369 #define _CIS 0x08
370 #define _CINV 0x10
371 #define _COUT 0x40
372
373 //==============================================================================
374
375 extern __at(0x001E) __sfr ADRESH;
376
377 //==============================================================================
378 // ADCON0 Bits
379
380 extern __at(0x001F) __sfr ADCON0;
381
382 typedef union
383 {
384 struct
385 {
386 unsigned ADON : 1;
387 unsigned GO_NOT_DONE : 1;
388 unsigned CHS0 : 1;
389 unsigned CHS1 : 1;
390 unsigned CHS2 : 1;
391 unsigned : 1;
392 unsigned VCFG : 1;
393 unsigned ADFM : 1;
394 };
395
396 struct
397 {
398 unsigned : 1;
399 unsigned GO : 1;
400 unsigned : 1;
401 unsigned : 1;
402 unsigned : 1;
403 unsigned : 1;
404 unsigned : 1;
405 unsigned : 1;
406 };
407
408 struct
409 {
410 unsigned : 1;
411 unsigned NOT_DONE : 1;
412 unsigned : 1;
413 unsigned : 1;
414 unsigned : 1;
415 unsigned : 1;
416 unsigned : 1;
417 unsigned : 1;
418 };
419
420 struct
421 {
422 unsigned : 1;
423 unsigned GO_DONE : 1;
424 unsigned : 1;
425 unsigned : 1;
426 unsigned : 1;
427 unsigned : 1;
428 unsigned : 1;
429 unsigned : 1;
430 };
431
432 struct
433 {
434 unsigned : 2;
435 unsigned CHS : 3;
436 unsigned : 3;
437 };
438 } __ADCON0bits_t;
439
440 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits;
441
442 #define _ADON 0x01
443 #define _GO_NOT_DONE 0x02
444 #define _GO 0x02
445 #define _NOT_DONE 0x02
446 #define _GO_DONE 0x02
447 #define _CHS0 0x04
448 #define _CHS1 0x08
449 #define _CHS2 0x10
450 #define _VCFG 0x40
451 #define _ADFM 0x80
452
453 //==============================================================================
454
455
456 //==============================================================================
457 // OPTION_REG Bits
458
459 extern __at(0x0081) __sfr OPTION_REG;
460
461 typedef union
462 {
463 struct
464 {
465 unsigned PS0 : 1;
466 unsigned PS1 : 1;
467 unsigned PS2 : 1;
468 unsigned PSA : 1;
469 unsigned T0SE : 1;
470 unsigned T0CS : 1;
471 unsigned INTEDG : 1;
472 unsigned NOT_RAPU : 1;
473 };
474
475 struct
476 {
477 unsigned : 1;
478 unsigned : 1;
479 unsigned : 1;
480 unsigned : 1;
481 unsigned : 1;
482 unsigned : 1;
483 unsigned : 1;
484 unsigned NOT_GPPU : 1;
485 };
486
487 struct
488 {
489 unsigned PS : 3;
490 unsigned : 5;
491 };
492 } __OPTION_REGbits_t;
493
494 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
495
496 #define _PS0 0x01
497 #define _PS1 0x02
498 #define _PS2 0x04
499 #define _PSA 0x08
500 #define _T0SE 0x10
501 #define _T0CS 0x20
502 #define _INTEDG 0x40
503 #define _NOT_RAPU 0x80
504 #define _NOT_GPPU 0x80
505
506 //==============================================================================
507
508
509 //==============================================================================
510 // TRISA Bits
511
512 extern __at(0x0085) __sfr TRISA;
513
514 typedef union
515 {
516 struct
517 {
518 unsigned TRISA0 : 1;
519 unsigned TRISA1 : 1;
520 unsigned TRISA2 : 1;
521 unsigned TRISA3 : 1;
522 unsigned TRISA4 : 1;
523 unsigned TRISA5 : 1;
524 unsigned : 1;
525 unsigned : 1;
526 };
527
528 struct
529 {
530 unsigned TRISA : 6;
531 unsigned : 2;
532 };
533 } __TRISAbits_t;
534
535 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
536
537 #define _TRISA0 0x01
538 #define _TRISA1 0x02
539 #define _TRISA2 0x04
540 #define _TRISA3 0x08
541 #define _TRISA4 0x10
542 #define _TRISA5 0x20
543
544 //==============================================================================
545
546
547 //==============================================================================
548 // TRISC Bits
549
550 extern __at(0x0087) __sfr TRISC;
551
552 typedef union
553 {
554 struct
555 {
556 unsigned TRISC0 : 1;
557 unsigned TRISC1 : 1;
558 unsigned TRISC2 : 1;
559 unsigned TRISC3 : 1;
560 unsigned TRISC4 : 1;
561 unsigned TRISC5 : 1;
562 unsigned : 1;
563 unsigned : 1;
564 };
565
566 struct
567 {
568 unsigned TRISC : 6;
569 unsigned : 2;
570 };
571 } __TRISCbits_t;
572
573 extern __at(0x0087) volatile __TRISCbits_t TRISCbits;
574
575 #define _TRISC0 0x01
576 #define _TRISC1 0x02
577 #define _TRISC2 0x04
578 #define _TRISC3 0x08
579 #define _TRISC4 0x10
580 #define _TRISC5 0x20
581
582 //==============================================================================
583
584
585 //==============================================================================
586 // PIE1 Bits
587
588 extern __at(0x008C) __sfr PIE1;
589
590 typedef union
591 {
592 struct
593 {
594 unsigned TMR1IE : 1;
595 unsigned : 1;
596 unsigned : 1;
597 unsigned CMIE : 1;
598 unsigned : 1;
599 unsigned : 1;
600 unsigned ADIE : 1;
601 unsigned EEIE : 1;
602 };
603
604 struct
605 {
606 unsigned T1IE : 1;
607 unsigned : 1;
608 unsigned : 1;
609 unsigned : 1;
610 unsigned : 1;
611 unsigned : 1;
612 unsigned : 1;
613 unsigned : 1;
614 };
615 } __PIE1bits_t;
616
617 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
618
619 #define _TMR1IE 0x01
620 #define _T1IE 0x01
621 #define _CMIE 0x08
622 #define _ADIE 0x40
623 #define _EEIE 0x80
624
625 //==============================================================================
626
627
628 //==============================================================================
629 // PCON Bits
630
631 extern __at(0x008E) __sfr PCON;
632
633 typedef union
634 {
635 struct
636 {
637 unsigned NOT_BOR : 1;
638 unsigned NOT_POR : 1;
639 unsigned : 1;
640 unsigned : 1;
641 unsigned : 1;
642 unsigned : 1;
643 unsigned : 1;
644 unsigned : 1;
645 };
646
647 struct
648 {
649 unsigned NOT_BOD : 1;
650 unsigned : 1;
651 unsigned : 1;
652 unsigned : 1;
653 unsigned : 1;
654 unsigned : 1;
655 unsigned : 1;
656 unsigned : 1;
657 };
658 } __PCONbits_t;
659
660 extern __at(0x008E) volatile __PCONbits_t PCONbits;
661
662 #define _NOT_BOR 0x01
663 #define _NOT_BOD 0x01
664 #define _NOT_POR 0x02
665
666 //==============================================================================
667
668
669 //==============================================================================
670 // OSCCAL Bits
671
672 extern __at(0x0090) __sfr OSCCAL;
673
674 typedef union
675 {
676 struct
677 {
678 unsigned : 1;
679 unsigned : 1;
680 unsigned CAL0 : 1;
681 unsigned CAL1 : 1;
682 unsigned CAL2 : 1;
683 unsigned CAL3 : 1;
684 unsigned CAL4 : 1;
685 unsigned CAL5 : 1;
686 };
687
688 struct
689 {
690 unsigned : 2;
691 unsigned CAL : 6;
692 };
693 } __OSCCALbits_t;
694
695 extern __at(0x0090) volatile __OSCCALbits_t OSCCALbits;
696
697 #define _CAL0 0x04
698 #define _CAL1 0x08
699 #define _CAL2 0x10
700 #define _CAL3 0x20
701 #define _CAL4 0x40
702 #define _CAL5 0x80
703
704 //==============================================================================
705
706
707 //==============================================================================
708 // ANSEL Bits
709
710 extern __at(0x0091) __sfr ANSEL;
711
712 typedef struct
713 {
714 unsigned ANS0 : 1;
715 unsigned ANS1 : 1;
716 unsigned ANS2 : 1;
717 unsigned ANS3 : 1;
718 unsigned ANS4 : 1;
719 unsigned ANS5 : 1;
720 unsigned ANS6 : 1;
721 unsigned ANS7 : 1;
722 } __ANSELbits_t;
723
724 extern __at(0x0091) volatile __ANSELbits_t ANSELbits;
725
726 #define _ANS0 0x01
727 #define _ANS1 0x02
728 #define _ANS2 0x04
729 #define _ANS3 0x08
730 #define _ANS4 0x10
731 #define _ANS5 0x20
732 #define _ANS6 0x40
733 #define _ANS7 0x80
734
735 //==============================================================================
736
737
738 //==============================================================================
739 // WPU Bits
740
741 extern __at(0x0095) __sfr WPU;
742
743 typedef struct
744 {
745 unsigned WPUA0 : 1;
746 unsigned WPUA1 : 1;
747 unsigned WPUA2 : 1;
748 unsigned : 1;
749 unsigned WPUA4 : 1;
750 unsigned WPUA5 : 1;
751 unsigned : 1;
752 unsigned : 1;
753 } __WPUbits_t;
754
755 extern __at(0x0095) volatile __WPUbits_t WPUbits;
756
757 #define _WPUA0 0x01
758 #define _WPUA1 0x02
759 #define _WPUA2 0x04
760 #define _WPUA4 0x10
761 #define _WPUA5 0x20
762
763 //==============================================================================
764
765
766 //==============================================================================
767 // WPUA Bits
768
769 extern __at(0x0095) __sfr WPUA;
770
771 typedef struct
772 {
773 unsigned WPUA0 : 1;
774 unsigned WPUA1 : 1;
775 unsigned WPUA2 : 1;
776 unsigned : 1;
777 unsigned WPUA4 : 1;
778 unsigned WPUA5 : 1;
779 unsigned : 1;
780 unsigned : 1;
781 } __WPUAbits_t;
782
783 extern __at(0x0095) volatile __WPUAbits_t WPUAbits;
784
785 #define _WPUA_WPUA0 0x01
786 #define _WPUA_WPUA1 0x02
787 #define _WPUA_WPUA2 0x04
788 #define _WPUA_WPUA4 0x10
789 #define _WPUA_WPUA5 0x20
790
791 //==============================================================================
792
793
794 //==============================================================================
795 // IOC Bits
796
797 extern __at(0x0096) __sfr IOC;
798
799 typedef union
800 {
801 struct
802 {
803 unsigned IOCA0 : 1;
804 unsigned IOCA1 : 1;
805 unsigned IOCA2 : 1;
806 unsigned IOCA3 : 1;
807 unsigned IOCA4 : 1;
808 unsigned IOCA5 : 1;
809 unsigned : 1;
810 unsigned : 1;
811 };
812
813 struct
814 {
815 unsigned IOCA : 6;
816 unsigned : 2;
817 };
818 } __IOCbits_t;
819
820 extern __at(0x0096) volatile __IOCbits_t IOCbits;
821
822 #define _IOCA0 0x01
823 #define _IOCA1 0x02
824 #define _IOCA2 0x04
825 #define _IOCA3 0x08
826 #define _IOCA4 0x10
827 #define _IOCA5 0x20
828
829 //==============================================================================
830
831
832 //==============================================================================
833 // IOCA Bits
834
835 extern __at(0x0096) __sfr IOCA;
836
837 typedef union
838 {
839 struct
840 {
841 unsigned IOCA0 : 1;
842 unsigned IOCA1 : 1;
843 unsigned IOCA2 : 1;
844 unsigned IOCA3 : 1;
845 unsigned IOCA4 : 1;
846 unsigned IOCA5 : 1;
847 unsigned : 1;
848 unsigned : 1;
849 };
850
851 struct
852 {
853 unsigned IOCA : 6;
854 unsigned : 2;
855 };
856 } __IOCAbits_t;
857
858 extern __at(0x0096) volatile __IOCAbits_t IOCAbits;
859
860 #define _IOCA_IOCA0 0x01
861 #define _IOCA_IOCA1 0x02
862 #define _IOCA_IOCA2 0x04
863 #define _IOCA_IOCA3 0x08
864 #define _IOCA_IOCA4 0x10
865 #define _IOCA_IOCA5 0x20
866
867 //==============================================================================
868
869
870 //==============================================================================
871 // VRCON Bits
872
873 extern __at(0x0099) __sfr VRCON;
874
875 typedef union
876 {
877 struct
878 {
879 unsigned VR0 : 1;
880 unsigned VR1 : 1;
881 unsigned VR2 : 1;
882 unsigned VR3 : 1;
883 unsigned : 1;
884 unsigned VRR : 1;
885 unsigned : 1;
886 unsigned VREN : 1;
887 };
888
889 struct
890 {
891 unsigned VR : 4;
892 unsigned : 4;
893 };
894 } __VRCONbits_t;
895
896 extern __at(0x0099) volatile __VRCONbits_t VRCONbits;
897
898 #define _VR0 0x01
899 #define _VR1 0x02
900 #define _VR2 0x04
901 #define _VR3 0x08
902 #define _VRR 0x20
903 #define _VREN 0x80
904
905 //==============================================================================
906
907 extern __at(0x009A) __sfr EEDAT;
908 extern __at(0x009A) __sfr EEDATA;
909 extern __at(0x009B) __sfr EEADR;
910
911 //==============================================================================
912 // EECON1 Bits
913
914 extern __at(0x009C) __sfr EECON1;
915
916 typedef struct
917 {
918 unsigned RD : 1;
919 unsigned WR : 1;
920 unsigned WREN : 1;
921 unsigned WRERR : 1;
922 unsigned : 1;
923 unsigned : 1;
924 unsigned : 1;
925 unsigned : 1;
926 } __EECON1bits_t;
927
928 extern __at(0x009C) volatile __EECON1bits_t EECON1bits;
929
930 #define _RD 0x01
931 #define _WR 0x02
932 #define _WREN 0x04
933 #define _WRERR 0x08
934
935 //==============================================================================
936
937 extern __at(0x009D) __sfr EECON2;
938 extern __at(0x009E) __sfr ADRESL;
939
940 //==============================================================================
941 // ADCON1 Bits
942
943 extern __at(0x009F) __sfr ADCON1;
944
945 typedef union
946 {
947 struct
948 {
949 unsigned : 1;
950 unsigned : 1;
951 unsigned : 1;
952 unsigned : 1;
953 unsigned ADCS0 : 1;
954 unsigned ADCS1 : 1;
955 unsigned ADCS2 : 1;
956 unsigned : 1;
957 };
958
959 struct
960 {
961 unsigned : 4;
962 unsigned ADCS : 3;
963 unsigned : 1;
964 };
965 } __ADCON1bits_t;
966
967 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits;
968
969 #define _ADCS0 0x10
970 #define _ADCS1 0x20
971 #define _ADCS2 0x40
972
973 //==============================================================================
974
975
976 //==============================================================================
977 //
978 // Configuration Bits
979 //
980 //==============================================================================
981
982 #define _CONFIG 0x2007
983
984 //----------------------------- CONFIG Options -------------------------------
985
986 #define _FOSC_LP 0x3FF8 // LP oscillator: Low power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
987 #define _LP_OSC 0x3FF8 // LP oscillator: Low power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
988 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
989 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
990 #define _FOSC_HS 0x3FFA // HS oscillator: High speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
991 #define _HS_OSC 0x3FFA // HS oscillator: High speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
992 #define _FOSC_EC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
993 #define _EC_OSC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
994 #define _FOSC_INTRCIO 0x3FFC // INTOSC oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
995 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSC oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
996 #define _FOSC_INTRCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
997 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
998 #define _FOSC_EXTRCIO 0x3FFE // RC oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
999 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // RC oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1000 #define _FOSC_EXTRCCLK 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1001 #define _EXTRC_OSC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1002 #define _WDTE_OFF 0x3FF7 // WDT disabled.
1003 #define _WDT_OFF 0x3FF7 // WDT disabled.
1004 #define _WDTE_ON 0x3FFF // WDT enabled.
1005 #define _WDT_ON 0x3FFF // WDT enabled.
1006 #define _PWRTE_ON 0x3FEF // PWRT enabled.
1007 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1008 #define _MCLRE_OFF 0x3FDF // RA3/MCLR pin function is digital I/O, MCLR internally tied to VDD.
1009 #define _MCLRE_ON 0x3FFF // RA3/MCLR pin function is MCLR.
1010 #define _BOREN_OFF 0x3FBF // BOD disabled.
1011 #define _BODEN_OFF 0x3FBF // BOD disabled.
1012 #define _BOREN_ON 0x3FFF // BOD enabled.
1013 #define _BODEN 0x3FFF // BOD enabled.
1014 #define _CP_ON 0x3F7F // Program Memory code protection is enabled.
1015 #define _CP 0x3F7F // Program Memory code protection is enabled.
1016 #define _CP_OFF 0x3FFF // Program Memory code protection is disabled.
1017 #define _CPD_ON 0x3EFF // Data memory code protection is enabled.
1018 #define _CPD 0x3EFF // Data memory code protection is enabled.
1019 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
1020
1021 //==============================================================================
1022
1023 #define _DEVID1 0x2006
1024
1025 #define _IDLOC0 0x2000
1026 #define _IDLOC1 0x2001
1027 #define _IDLOC2 0x2002
1028 #define _IDLOC3 0x2003
1029
1030 //==============================================================================
1031
1032 #ifndef NO_BIT_DEFINES
1033
1034 #define ADON ADCON0bits.ADON // bit 0
1035 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
1036 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
1037 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
1038 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
1039 #define CHS0 ADCON0bits.CHS0 // bit 2
1040 #define CHS1 ADCON0bits.CHS1 // bit 3
1041 #define CHS2 ADCON0bits.CHS2 // bit 4
1042 #define VCFG ADCON0bits.VCFG // bit 6
1043 #define ADFM ADCON0bits.ADFM // bit 7
1044
1045 #define ADCS0 ADCON1bits.ADCS0 // bit 4
1046 #define ADCS1 ADCON1bits.ADCS1 // bit 5
1047 #define ADCS2 ADCON1bits.ADCS2 // bit 6
1048
1049 #define ANS0 ANSELbits.ANS0 // bit 0
1050 #define ANS1 ANSELbits.ANS1 // bit 1
1051 #define ANS2 ANSELbits.ANS2 // bit 2
1052 #define ANS3 ANSELbits.ANS3 // bit 3
1053 #define ANS4 ANSELbits.ANS4 // bit 4
1054 #define ANS5 ANSELbits.ANS5 // bit 5
1055 #define ANS6 ANSELbits.ANS6 // bit 6
1056 #define ANS7 ANSELbits.ANS7 // bit 7
1057
1058 #define CM0 CMCONbits.CM0 // bit 0
1059 #define CM1 CMCONbits.CM1 // bit 1
1060 #define CM2 CMCONbits.CM2 // bit 2
1061 #define CIS CMCONbits.CIS // bit 3
1062 #define CINV CMCONbits.CINV // bit 4
1063 #define COUT CMCONbits.COUT // bit 6
1064
1065 #define RD EECON1bits.RD // bit 0
1066 #define WR EECON1bits.WR // bit 1
1067 #define WREN EECON1bits.WREN // bit 2
1068 #define WRERR EECON1bits.WRERR // bit 3
1069
1070 #define RAIF INTCONbits.RAIF // bit 0
1071 #define INTF INTCONbits.INTF // bit 1
1072 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
1073 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
1074 #define RAIE INTCONbits.RAIE // bit 3
1075 #define INTE INTCONbits.INTE // bit 4
1076 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
1077 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
1078 #define PEIE INTCONbits.PEIE // bit 6
1079 #define GIE INTCONbits.GIE // bit 7
1080
1081 #define IOCA0 IOCbits.IOCA0 // bit 0
1082 #define IOCA1 IOCbits.IOCA1 // bit 1
1083 #define IOCA2 IOCbits.IOCA2 // bit 2
1084 #define IOCA3 IOCbits.IOCA3 // bit 3
1085 #define IOCA4 IOCbits.IOCA4 // bit 4
1086 #define IOCA5 IOCbits.IOCA5 // bit 5
1087
1088 #define PS0 OPTION_REGbits.PS0 // bit 0
1089 #define PS1 OPTION_REGbits.PS1 // bit 1
1090 #define PS2 OPTION_REGbits.PS2 // bit 2
1091 #define PSA OPTION_REGbits.PSA // bit 3
1092 #define T0SE OPTION_REGbits.T0SE // bit 4
1093 #define T0CS OPTION_REGbits.T0CS // bit 5
1094 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1095 #define NOT_RAPU OPTION_REGbits.NOT_RAPU // bit 7, shadows bit in OPTION_REGbits
1096 #define NOT_GPPU OPTION_REGbits.NOT_GPPU // bit 7, shadows bit in OPTION_REGbits
1097
1098 #define CAL0 OSCCALbits.CAL0 // bit 2
1099 #define CAL1 OSCCALbits.CAL1 // bit 3
1100 #define CAL2 OSCCALbits.CAL2 // bit 4
1101 #define CAL3 OSCCALbits.CAL3 // bit 5
1102 #define CAL4 OSCCALbits.CAL4 // bit 6
1103 #define CAL5 OSCCALbits.CAL5 // bit 7
1104
1105 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1106 #define NOT_BOD PCONbits.NOT_BOD // bit 0, shadows bit in PCONbits
1107 #define NOT_POR PCONbits.NOT_POR // bit 1
1108
1109 #define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits
1110 #define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits
1111 #define CMIE PIE1bits.CMIE // bit 3
1112 #define ADIE PIE1bits.ADIE // bit 6
1113 #define EEIE PIE1bits.EEIE // bit 7
1114
1115 #define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits
1116 #define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits
1117 #define CMIF PIR1bits.CMIF // bit 3
1118 #define ADIF PIR1bits.ADIF // bit 6
1119 #define EEIF PIR1bits.EEIF // bit 7
1120
1121 #define RA0 PORTAbits.RA0 // bit 0
1122 #define RA1 PORTAbits.RA1 // bit 1
1123 #define RA2 PORTAbits.RA2 // bit 2
1124 #define RA3 PORTAbits.RA3 // bit 3
1125 #define RA4 PORTAbits.RA4 // bit 4
1126 #define RA5 PORTAbits.RA5 // bit 5
1127
1128 #define RC0 PORTCbits.RC0 // bit 0
1129 #define RC1 PORTCbits.RC1 // bit 1
1130 #define RC2 PORTCbits.RC2 // bit 2
1131 #define RC3 PORTCbits.RC3 // bit 3
1132 #define RC4 PORTCbits.RC4 // bit 4
1133 #define RC5 PORTCbits.RC5 // bit 5
1134
1135 #define C STATUSbits.C // bit 0
1136 #define DC STATUSbits.DC // bit 1
1137 #define Z STATUSbits.Z // bit 2
1138 #define NOT_PD STATUSbits.NOT_PD // bit 3
1139 #define NOT_TO STATUSbits.NOT_TO // bit 4
1140 #define RP0 STATUSbits.RP0 // bit 5
1141 #define RP1 STATUSbits.RP1 // bit 6
1142 #define IRP STATUSbits.IRP // bit 7
1143
1144 #define TMR1ON T1CONbits.TMR1ON // bit 0
1145 #define TMR1CS T1CONbits.TMR1CS // bit 1
1146 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
1147 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1148 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1149 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1150 #define TMR1GE T1CONbits.TMR1GE // bit 6
1151
1152 #define TRISA0 TRISAbits.TRISA0 // bit 0
1153 #define TRISA1 TRISAbits.TRISA1 // bit 1
1154 #define TRISA2 TRISAbits.TRISA2 // bit 2
1155 #define TRISA3 TRISAbits.TRISA3 // bit 3
1156 #define TRISA4 TRISAbits.TRISA4 // bit 4
1157 #define TRISA5 TRISAbits.TRISA5 // bit 5
1158
1159 #define TRISC0 TRISCbits.TRISC0 // bit 0
1160 #define TRISC1 TRISCbits.TRISC1 // bit 1
1161 #define TRISC2 TRISCbits.TRISC2 // bit 2
1162 #define TRISC3 TRISCbits.TRISC3 // bit 3
1163 #define TRISC4 TRISCbits.TRISC4 // bit 4
1164 #define TRISC5 TRISCbits.TRISC5 // bit 5
1165
1166 #define VR0 VRCONbits.VR0 // bit 0
1167 #define VR1 VRCONbits.VR1 // bit 1
1168 #define VR2 VRCONbits.VR2 // bit 2
1169 #define VR3 VRCONbits.VR3 // bit 3
1170 #define VRR VRCONbits.VRR // bit 5
1171 #define VREN VRCONbits.VREN // bit 7
1172
1173 #define WPUA0 WPUbits.WPUA0 // bit 0
1174 #define WPUA1 WPUbits.WPUA1 // bit 1
1175 #define WPUA2 WPUbits.WPUA2 // bit 2
1176 #define WPUA4 WPUbits.WPUA4 // bit 4
1177 #define WPUA5 WPUbits.WPUA5 // bit 5
1178
1179 #endif // #ifndef NO_BIT_DEFINES
1180
1181 #endif // #ifndef __PIC16F676_H__
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