2 * This declarations of the PIC16F677 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:57 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16F677_H__
26 #define __PIC16F677_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PCLATH_ADDR 0x000A
45 #define INTCON_ADDR 0x000B
46 #define PIR1_ADDR 0x000C
47 #define PIR2_ADDR 0x000D
48 #define TMR1_ADDR 0x000E
49 #define TMR1L_ADDR 0x000E
50 #define TMR1H_ADDR 0x000F
51 #define T1CON_ADDR 0x0010
52 #define SSPBUF_ADDR 0x0013
53 #define SSPCON_ADDR 0x0014
54 #define ADRESH_ADDR 0x001E
55 #define ADCON0_ADDR 0x001F
56 #define OPTION_REG_ADDR 0x0081
57 #define TRISA_ADDR 0x0085
58 #define TRISB_ADDR 0x0086
59 #define TRISC_ADDR 0x0087
60 #define PIE1_ADDR 0x008C
61 #define PIE2_ADDR 0x008D
62 #define PCON_ADDR 0x008E
63 #define OSCCON_ADDR 0x008F
64 #define OSCTUNE_ADDR 0x0090
65 #define MSK_ADDR 0x0093
66 #define SSPADD_ADDR 0x0093
67 #define SSPMSK_ADDR 0x0093
68 #define SSPSTAT_ADDR 0x0094
69 #define WPU_ADDR 0x0095
70 #define WPUA_ADDR 0x0095
71 #define IOC_ADDR 0x0096
72 #define IOCA_ADDR 0x0096
73 #define WDTCON_ADDR 0x0097
74 #define ADRESL_ADDR 0x009E
75 #define ADCON1_ADDR 0x009F
76 #define EEDAT_ADDR 0x010C
77 #define EEDATA_ADDR 0x010C
78 #define EEADR_ADDR 0x010D
79 #define WPUB_ADDR 0x0115
80 #define IOCB_ADDR 0x0116
81 #define VRCON_ADDR 0x0118
82 #define CM1CON0_ADDR 0x0119
83 #define CM2CON0_ADDR 0x011A
84 #define CM2CON1_ADDR 0x011B
85 #define ANSEL_ADDR 0x011E
86 #define ANSELH_ADDR 0x011F
87 #define EECON1_ADDR 0x018C
88 #define EECON2_ADDR 0x018D
89 #define SRCON_ADDR 0x019E
91 #endif // #ifndef NO_ADDR_DEFINES
93 //==============================================================================
95 // Register Definitions
97 //==============================================================================
99 extern __at(0x0000) __sfr INDF
;
100 extern __at(0x0001) __sfr TMR0
;
101 extern __at(0x0002) __sfr PCL
;
103 //==============================================================================
106 extern __at(0x0003) __sfr STATUS
;
130 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
141 //==============================================================================
143 extern __at(0x0004) __sfr FSR
;
145 //==============================================================================
148 extern __at(0x0005) __sfr PORTA
;
171 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
180 //==============================================================================
183 //==============================================================================
186 extern __at(0x0006) __sfr PORTB
;
200 extern __at(0x0006) volatile __PORTBbits_t PORTBbits
;
207 //==============================================================================
210 //==============================================================================
213 extern __at(0x0007) __sfr PORTC
;
227 extern __at(0x0007) volatile __PORTCbits_t PORTCbits
;
238 //==============================================================================
240 extern __at(0x000A) __sfr PCLATH
;
242 //==============================================================================
245 extern __at(0x000B) __sfr INTCON
;
259 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
270 //==============================================================================
273 //==============================================================================
276 extern __at(0x000C) __sfr PIR1
;
305 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
312 //==============================================================================
315 //==============================================================================
318 extern __at(0x000D) __sfr PIR2
;
332 extern __at(0x000D) volatile __PIR2bits_t PIR2bits
;
339 //==============================================================================
341 extern __at(0x000E) __sfr TMR1
;
342 extern __at(0x000E) __sfr TMR1L
;
343 extern __at(0x000F) __sfr TMR1H
;
345 //==============================================================================
348 extern __at(0x0010) __sfr T1CON
;
356 unsigned NOT_T1SYNC
: 1;
357 unsigned T1OSCEN
: 1;
358 unsigned T1CKPS0
: 1;
359 unsigned T1CKPS1
: 1;
372 extern __at(0x0010) volatile __T1CONbits_t T1CONbits
;
376 #define _NOT_T1SYNC 0x04
377 #define _T1OSCEN 0x08
378 #define _T1CKPS0 0x10
379 #define _T1CKPS1 0x20
383 //==============================================================================
385 extern __at(0x0013) __sfr SSPBUF
;
387 //==============================================================================
390 extern __at(0x0014) __sfr SSPCON
;
413 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits
;
424 //==============================================================================
426 extern __at(0x001E) __sfr ADRESH
;
428 //==============================================================================
431 extern __at(0x001F) __sfr ADCON0
;
438 unsigned GO_NOT_DONE
: 1;
462 unsigned NOT_DONE
: 1;
474 unsigned GO_DONE
: 1;
491 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
494 #define _GO_NOT_DONE 0x02
496 #define _NOT_DONE 0x02
497 #define _GO_DONE 0x02
505 //==============================================================================
508 //==============================================================================
511 extern __at(0x0081) __sfr OPTION_REG
;
524 unsigned NOT_RABPU
: 1;
532 } __OPTION_REGbits_t
;
534 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
543 #define _NOT_RABPU 0x80
545 //==============================================================================
548 //==============================================================================
551 extern __at(0x0085) __sfr TRISA
;
574 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
583 //==============================================================================
586 //==============================================================================
589 extern __at(0x0086) __sfr TRISB
;
603 extern __at(0x0086) volatile __TRISBbits_t TRISBbits
;
610 //==============================================================================
613 //==============================================================================
616 extern __at(0x0087) __sfr TRISC
;
630 extern __at(0x0087) volatile __TRISCbits_t TRISCbits
;
641 //==============================================================================
644 //==============================================================================
647 extern __at(0x008C) __sfr PIE1
;
676 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
683 //==============================================================================
686 //==============================================================================
689 extern __at(0x008D) __sfr PIE2
;
703 extern __at(0x008D) volatile __PIE2bits_t PIE2bits
;
710 //==============================================================================
713 //==============================================================================
716 extern __at(0x008E) __sfr PCON
;
722 unsigned NOT_BOR
: 1;
723 unsigned NOT_POR
: 1;
745 extern __at(0x008E) volatile __PCONbits_t PCONbits
;
747 #define _NOT_BOR 0x01
749 #define _NOT_POR 0x02
754 //==============================================================================
757 //==============================================================================
760 extern __at(0x008F) __sfr OSCCON
;
784 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits
;
794 //==============================================================================
797 //==============================================================================
800 extern __at(0x0090) __sfr OSCTUNE
;
823 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits
;
831 //==============================================================================
834 //==============================================================================
837 extern __at(0x0093) __sfr MSK
;
851 extern __at(0x0093) volatile __MSKbits_t MSKbits
;
862 //==============================================================================
864 extern __at(0x0093) __sfr SSPADD
;
866 //==============================================================================
869 extern __at(0x0093) __sfr SSPMSK
;
883 extern __at(0x0093) volatile __SSPMSKbits_t SSPMSKbits
;
885 #define _SSPMSK_MSK0 0x01
886 #define _SSPMSK_MSK1 0x02
887 #define _SSPMSK_MSK2 0x04
888 #define _SSPMSK_MSK3 0x08
889 #define _SSPMSK_MSK4 0x10
890 #define _SSPMSK_MSK5 0x20
891 #define _SSPMSK_MSK6 0x40
892 #define _SSPMSK_MSK7 0x80
894 //==============================================================================
897 //==============================================================================
900 extern __at(0x0094) __sfr SSPSTAT
;
908 unsigned R_NOT_W
: 1;
911 unsigned D_NOT_A
: 1;
921 unsigned I2C_START
: 1;
922 unsigned I2C_STOP
: 1;
932 unsigned I2C_READ
: 1;
935 unsigned I2C_DATA
: 1;
956 unsigned NOT_WRITE
: 1;
959 unsigned NOT_ADDRESS
: 1;
980 unsigned READ_WRITE
: 1;
983 unsigned DATA_ADDRESS
: 1;
989 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits
;
993 #define _R_NOT_W 0x04
995 #define _I2C_READ 0x04
997 #define _NOT_WRITE 0x04
999 #define _READ_WRITE 0x04
1001 #define _I2C_START 0x08
1003 #define _I2C_STOP 0x10
1004 #define _D_NOT_A 0x20
1006 #define _I2C_DATA 0x20
1008 #define _NOT_ADDRESS 0x20
1010 #define _DATA_ADDRESS 0x20
1014 //==============================================================================
1017 //==============================================================================
1020 extern __at(0x0095) __sfr WPU
;
1049 extern __at(0x0095) volatile __WPUbits_t WPUbits
;
1062 //==============================================================================
1065 //==============================================================================
1068 extern __at(0x0095) __sfr WPUA
;
1097 extern __at(0x0095) volatile __WPUAbits_t WPUAbits
;
1099 #define _WPUA_WPUA0 0x01
1100 #define _WPUA_WPU0 0x01
1101 #define _WPUA_WPUA1 0x02
1102 #define _WPUA_WPU1 0x02
1103 #define _WPUA_WPUA2 0x04
1104 #define _WPUA_WPU2 0x04
1105 #define _WPUA_WPUA4 0x10
1106 #define _WPUA_WPU4 0x10
1107 #define _WPUA_WPUA5 0x20
1108 #define _WPUA_WPU5 0x20
1110 //==============================================================================
1113 //==============================================================================
1116 extern __at(0x0096) __sfr IOC
;
1157 extern __at(0x0096) volatile __IOCbits_t IOCbits
;
1172 //==============================================================================
1175 //==============================================================================
1178 extern __at(0x0096) __sfr IOCA
;
1219 extern __at(0x0096) volatile __IOCAbits_t IOCAbits
;
1221 #define _IOCA_IOCA0 0x01
1222 #define _IOCA_IOC0 0x01
1223 #define _IOCA_IOCA1 0x02
1224 #define _IOCA_IOC1 0x02
1225 #define _IOCA_IOCA2 0x04
1226 #define _IOCA_IOC2 0x04
1227 #define _IOCA_IOCA3 0x08
1228 #define _IOCA_IOC3 0x08
1229 #define _IOCA_IOCA4 0x10
1230 #define _IOCA_IOC4 0x10
1231 #define _IOCA_IOCA5 0x20
1232 #define _IOCA_IOC5 0x20
1234 //==============================================================================
1237 //==============================================================================
1240 extern __at(0x0097) __sfr WDTCON
;
1246 unsigned SWDTEN
: 1;
1247 unsigned WDTPS0
: 1;
1248 unsigned WDTPS1
: 1;
1249 unsigned WDTPS2
: 1;
1250 unsigned WDTPS3
: 1;
1264 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits
;
1266 #define _SWDTEN 0x01
1267 #define _WDTPS0 0x02
1268 #define _WDTPS1 0x04
1269 #define _WDTPS2 0x08
1270 #define _WDTPS3 0x10
1272 //==============================================================================
1274 extern __at(0x009E) __sfr ADRESL
;
1276 //==============================================================================
1279 extern __at(0x009F) __sfr ADCON1
;
1303 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits
;
1309 //==============================================================================
1311 extern __at(0x010C) __sfr EEDAT
;
1312 extern __at(0x010C) __sfr EEDATA
;
1313 extern __at(0x010D) __sfr EEADR
;
1315 //==============================================================================
1318 extern __at(0x0115) __sfr WPUB
;
1332 extern __at(0x0115) volatile __WPUBbits_t WPUBbits
;
1339 //==============================================================================
1342 //==============================================================================
1345 extern __at(0x0116) __sfr IOCB
;
1359 extern __at(0x0116) volatile __IOCBbits_t IOCBbits
;
1366 //==============================================================================
1369 //==============================================================================
1372 extern __at(0x0118) __sfr VRCON
;
1384 unsigned C2VREN
: 1;
1385 unsigned C1VREN
: 1;
1395 extern __at(0x0118) volatile __VRCONbits_t VRCONbits
;
1403 #define _C2VREN 0x40
1404 #define _C1VREN 0x80
1406 //==============================================================================
1409 //==============================================================================
1412 extern __at(0x0119) __sfr CM1CON0
;
1435 extern __at(0x0119) volatile __CM1CON0bits_t CM1CON0bits
;
1445 //==============================================================================
1448 //==============================================================================
1451 extern __at(0x011A) __sfr CM2CON0
;
1474 extern __at(0x011A) volatile __CM2CON0bits_t CM2CON0bits
;
1484 //==============================================================================
1487 //==============================================================================
1490 extern __at(0x011B) __sfr CM2CON1
;
1494 unsigned C2SYNC
: 1;
1500 unsigned MC2OUT
: 1;
1501 unsigned MC1OUT
: 1;
1504 extern __at(0x011B) volatile __CM2CON1bits_t CM2CON1bits
;
1506 #define _C2SYNC 0x01
1508 #define _MC2OUT 0x40
1509 #define _MC1OUT 0x80
1511 //==============================================================================
1514 //==============================================================================
1517 extern __at(0x011E) __sfr ANSEL
;
1531 extern __at(0x011E) volatile __ANSELbits_t ANSELbits
;
1542 //==============================================================================
1545 //==============================================================================
1548 extern __at(0x011F) __sfr ANSELH
;
1562 extern __at(0x011F) volatile __ANSELHbits_t ANSELHbits
;
1569 //==============================================================================
1572 //==============================================================================
1575 extern __at(0x018C) __sfr EECON1
;
1589 extern __at(0x018C) volatile __EECON1bits_t EECON1bits
;
1596 //==============================================================================
1598 extern __at(0x018D) __sfr EECON2
;
1600 //==============================================================================
1603 extern __at(0x019E) __sfr SRCON
;
1626 extern __at(0x019E) volatile __SRCONbits_t SRCONbits
;
1635 //==============================================================================
1638 //==============================================================================
1640 // Configuration Bits
1642 //==============================================================================
1644 #define _CONFIG 0x2007
1646 //----------------------------- CONFIG Options -------------------------------
1648 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1649 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1650 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1651 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1652 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1653 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1654 #define _FOSC_EC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1655 #define _EC_OSC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1656 #define _FOSC_INTRCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1657 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1658 #define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1659 #define _FOSC_INTRCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1660 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1661 #define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1662 #define _FOSC_EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1663 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1664 #define _EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1665 #define _FOSC_EXTRCCLK 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1666 #define _EXTRC_OSC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1667 #define _EXTRC 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1668 #define _WDTE_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
1669 #define _WDT_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
1670 #define _WDTE_ON 0x3FFF // WDT enabled.
1671 #define _WDT_ON 0x3FFF // WDT enabled.
1672 #define _PWRTE_ON 0x3FEF // PWRT enabled.
1673 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1674 #define _MCLRE_OFF 0x3FDF // MCLR pin function is digital input, MCLR internally tied to VDD.
1675 #define _MCLRE_ON 0x3FFF // MCLR pin function is MCLR.
1676 #define _CP_ON 0x3FBF // Program memory code protection is enabled.
1677 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
1678 #define _CPD_ON 0x3F7F // Data memory code protection is enabled.
1679 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
1680 #define _BOREN_OFF 0x3CFF // BOR disabled.
1681 #define _BOD_OFF 0x3CFF // BOR disabled.
1682 #define _BOR_OFF 0x3CFF // BOR disabled.
1683 #define _BOREN_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1684 #define _BOD_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1685 #define _BOR_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1686 #define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1687 #define _BOD_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1688 #define _BOR_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1689 #define _BOREN_ON 0x3FFF // BOR enabled.
1690 #define _BOD_ON 0x3FFF // BOR enabled.
1691 #define _BOR_ON 0x3FFF // BOR enabled.
1692 #define _IESO_OFF 0x3BFF // Internal External Switchover mode is disabled.
1693 #define _IESO_ON 0x3FFF // Internal External Switchover mode is enabled.
1694 #define _FCMEN_OFF 0x37FF // Fail-Safe Clock Monitor is disabled.
1695 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
1697 //==============================================================================
1699 #define _DEVID1 0x2006
1701 #define _IDLOC0 0x2000
1702 #define _IDLOC1 0x2001
1703 #define _IDLOC2 0x2002
1704 #define _IDLOC3 0x2003
1706 //==============================================================================
1708 #ifndef NO_BIT_DEFINES
1710 #define ADON ADCON0bits.ADON // bit 0
1711 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
1712 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
1713 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
1714 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
1715 #define CHS0 ADCON0bits.CHS0 // bit 2
1716 #define CHS1 ADCON0bits.CHS1 // bit 3
1717 #define CHS2 ADCON0bits.CHS2 // bit 4
1718 #define CHS3 ADCON0bits.CHS3 // bit 5
1719 #define VCFG ADCON0bits.VCFG // bit 6
1720 #define ADFM ADCON0bits.ADFM // bit 7
1722 #define ADCS0 ADCON1bits.ADCS0 // bit 4
1723 #define ADCS1 ADCON1bits.ADCS1 // bit 5
1724 #define ADCS2 ADCON1bits.ADCS2 // bit 6
1726 #define ANS0 ANSELbits.ANS0 // bit 0
1727 #define ANS1 ANSELbits.ANS1 // bit 1
1728 #define ANS2 ANSELbits.ANS2 // bit 2
1729 #define ANS3 ANSELbits.ANS3 // bit 3
1730 #define ANS4 ANSELbits.ANS4 // bit 4
1731 #define ANS5 ANSELbits.ANS5 // bit 5
1732 #define ANS6 ANSELbits.ANS6 // bit 6
1733 #define ANS7 ANSELbits.ANS7 // bit 7
1735 #define ANS8 ANSELHbits.ANS8 // bit 0
1736 #define ANS9 ANSELHbits.ANS9 // bit 1
1737 #define ANS10 ANSELHbits.ANS10 // bit 2
1738 #define ANS11 ANSELHbits.ANS11 // bit 3
1740 #define C1CH0 CM1CON0bits.C1CH0 // bit 0
1741 #define C1CH1 CM1CON0bits.C1CH1 // bit 1
1742 #define C1R CM1CON0bits.C1R // bit 2
1743 #define C1POL CM1CON0bits.C1POL // bit 4
1744 #define C1OE CM1CON0bits.C1OE // bit 5
1745 #define C1OUT CM1CON0bits.C1OUT // bit 6
1746 #define C1ON CM1CON0bits.C1ON // bit 7
1748 #define C2CH0 CM2CON0bits.C2CH0 // bit 0
1749 #define C2CH1 CM2CON0bits.C2CH1 // bit 1
1750 #define C2R CM2CON0bits.C2R // bit 2
1751 #define C2POL CM2CON0bits.C2POL // bit 4
1752 #define C2OE CM2CON0bits.C2OE // bit 5
1753 #define C2OUT CM2CON0bits.C2OUT // bit 6
1754 #define C2ON CM2CON0bits.C2ON // bit 7
1756 #define C2SYNC CM2CON1bits.C2SYNC // bit 0
1757 #define T1GSS CM2CON1bits.T1GSS // bit 1
1758 #define MC2OUT CM2CON1bits.MC2OUT // bit 6
1759 #define MC1OUT CM2CON1bits.MC1OUT // bit 7
1761 #define RD EECON1bits.RD // bit 0
1762 #define WR EECON1bits.WR // bit 1
1763 #define WREN EECON1bits.WREN // bit 2
1764 #define WRERR EECON1bits.WRERR // bit 3
1766 #define RABIF INTCONbits.RABIF // bit 0
1767 #define INTF INTCONbits.INTF // bit 1
1768 #define T0IF INTCONbits.T0IF // bit 2
1769 #define RABIE INTCONbits.RABIE // bit 3
1770 #define INTE INTCONbits.INTE // bit 4
1771 #define T0IE INTCONbits.T0IE // bit 5
1772 #define PEIE INTCONbits.PEIE // bit 6
1773 #define GIE INTCONbits.GIE // bit 7
1775 #define IOCA0 IOCbits.IOCA0 // bit 0, shadows bit in IOCbits
1776 #define IOC0 IOCbits.IOC0 // bit 0, shadows bit in IOCbits
1777 #define IOCA1 IOCbits.IOCA1 // bit 1, shadows bit in IOCbits
1778 #define IOC1 IOCbits.IOC1 // bit 1, shadows bit in IOCbits
1779 #define IOCA2 IOCbits.IOCA2 // bit 2, shadows bit in IOCbits
1780 #define IOC2 IOCbits.IOC2 // bit 2, shadows bit in IOCbits
1781 #define IOCA3 IOCbits.IOCA3 // bit 3, shadows bit in IOCbits
1782 #define IOC3 IOCbits.IOC3 // bit 3, shadows bit in IOCbits
1783 #define IOCA4 IOCbits.IOCA4 // bit 4, shadows bit in IOCbits
1784 #define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits
1785 #define IOCA5 IOCbits.IOCA5 // bit 5, shadows bit in IOCbits
1786 #define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits
1788 #define IOCB4 IOCBbits.IOCB4 // bit 4
1789 #define IOCB5 IOCBbits.IOCB5 // bit 5
1790 #define IOCB6 IOCBbits.IOCB6 // bit 6
1791 #define IOCB7 IOCBbits.IOCB7 // bit 7
1793 #define MSK0 MSKbits.MSK0 // bit 0
1794 #define MSK1 MSKbits.MSK1 // bit 1
1795 #define MSK2 MSKbits.MSK2 // bit 2
1796 #define MSK3 MSKbits.MSK3 // bit 3
1797 #define MSK4 MSKbits.MSK4 // bit 4
1798 #define MSK5 MSKbits.MSK5 // bit 5
1799 #define MSK6 MSKbits.MSK6 // bit 6
1800 #define MSK7 MSKbits.MSK7 // bit 7
1802 #define PS0 OPTION_REGbits.PS0 // bit 0
1803 #define PS1 OPTION_REGbits.PS1 // bit 1
1804 #define PS2 OPTION_REGbits.PS2 // bit 2
1805 #define PSA OPTION_REGbits.PSA // bit 3
1806 #define T0SE OPTION_REGbits.T0SE // bit 4
1807 #define T0CS OPTION_REGbits.T0CS // bit 5
1808 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1809 #define NOT_RABPU OPTION_REGbits.NOT_RABPU // bit 7
1811 #define SCS OSCCONbits.SCS // bit 0
1812 #define LTS OSCCONbits.LTS // bit 1
1813 #define HTS OSCCONbits.HTS // bit 2
1814 #define OSTS OSCCONbits.OSTS // bit 3
1815 #define IRCF0 OSCCONbits.IRCF0 // bit 4
1816 #define IRCF1 OSCCONbits.IRCF1 // bit 5
1817 #define IRCF2 OSCCONbits.IRCF2 // bit 6
1819 #define TUN0 OSCTUNEbits.TUN0 // bit 0
1820 #define TUN1 OSCTUNEbits.TUN1 // bit 1
1821 #define TUN2 OSCTUNEbits.TUN2 // bit 2
1822 #define TUN3 OSCTUNEbits.TUN3 // bit 3
1823 #define TUN4 OSCTUNEbits.TUN4 // bit 4
1825 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1826 #define BOR PCONbits.BOR // bit 0, shadows bit in PCONbits
1827 #define NOT_POR PCONbits.NOT_POR // bit 1, shadows bit in PCONbits
1828 #define POR PCONbits.POR // bit 1, shadows bit in PCONbits
1829 #define SBOREN PCONbits.SBOREN // bit 4
1830 #define ULPWUE PCONbits.ULPWUE // bit 5
1832 #define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits
1833 #define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits
1834 #define SSPIE PIE1bits.SSPIE // bit 3
1835 #define ADIE PIE1bits.ADIE // bit 6
1837 #define EEIE PIE2bits.EEIE // bit 4
1838 #define C1IE PIE2bits.C1IE // bit 5
1839 #define C2IE PIE2bits.C2IE // bit 6
1840 #define OSFIE PIE2bits.OSFIE // bit 7
1842 #define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits
1843 #define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits
1844 #define SSPIF PIR1bits.SSPIF // bit 3
1845 #define ADIF PIR1bits.ADIF // bit 6
1847 #define EEIF PIR2bits.EEIF // bit 4
1848 #define C1IF PIR2bits.C1IF // bit 5
1849 #define C2IF PIR2bits.C2IF // bit 6
1850 #define OSFIF PIR2bits.OSFIF // bit 7
1852 #define RA0 PORTAbits.RA0 // bit 0
1853 #define RA1 PORTAbits.RA1 // bit 1
1854 #define RA2 PORTAbits.RA2 // bit 2
1855 #define RA3 PORTAbits.RA3 // bit 3
1856 #define RA4 PORTAbits.RA4 // bit 4
1857 #define RA5 PORTAbits.RA5 // bit 5
1859 #define RB4 PORTBbits.RB4 // bit 4
1860 #define RB5 PORTBbits.RB5 // bit 5
1861 #define RB6 PORTBbits.RB6 // bit 6
1862 #define RB7 PORTBbits.RB7 // bit 7
1864 #define RC0 PORTCbits.RC0 // bit 0
1865 #define RC1 PORTCbits.RC1 // bit 1
1866 #define RC2 PORTCbits.RC2 // bit 2
1867 #define RC3 PORTCbits.RC3 // bit 3
1868 #define RC4 PORTCbits.RC4 // bit 4
1869 #define RC5 PORTCbits.RC5 // bit 5
1870 #define RC6 PORTCbits.RC6 // bit 6
1871 #define RC7 PORTCbits.RC7 // bit 7
1873 #define PULSR SRCONbits.PULSR // bit 2
1874 #define PULSS SRCONbits.PULSS // bit 3
1875 #define C2REN SRCONbits.C2REN // bit 4
1876 #define C1SEN SRCONbits.C1SEN // bit 5
1877 #define SR0 SRCONbits.SR0 // bit 6
1878 #define SR1 SRCONbits.SR1 // bit 7
1880 #define SSPM0 SSPCONbits.SSPM0 // bit 0
1881 #define SSPM1 SSPCONbits.SSPM1 // bit 1
1882 #define SSPM2 SSPCONbits.SSPM2 // bit 2
1883 #define SSPM3 SSPCONbits.SSPM3 // bit 3
1884 #define CKP SSPCONbits.CKP // bit 4
1885 #define SSPEN SSPCONbits.SSPEN // bit 5
1886 #define SSPOV SSPCONbits.SSPOV // bit 6
1887 #define WCOL SSPCONbits.WCOL // bit 7
1889 #define BF SSPSTATbits.BF // bit 0
1890 #define UA SSPSTATbits.UA // bit 1
1891 #define R_NOT_W SSPSTATbits.R_NOT_W // bit 2, shadows bit in SSPSTATbits
1892 #define R SSPSTATbits.R // bit 2, shadows bit in SSPSTATbits
1893 #define I2C_READ SSPSTATbits.I2C_READ // bit 2, shadows bit in SSPSTATbits
1894 #define NOT_W SSPSTATbits.NOT_W // bit 2, shadows bit in SSPSTATbits
1895 #define NOT_WRITE SSPSTATbits.NOT_WRITE // bit 2, shadows bit in SSPSTATbits
1896 #define R_W SSPSTATbits.R_W // bit 2, shadows bit in SSPSTATbits
1897 #define READ_WRITE SSPSTATbits.READ_WRITE // bit 2, shadows bit in SSPSTATbits
1898 #define S SSPSTATbits.S // bit 3, shadows bit in SSPSTATbits
1899 #define I2C_START SSPSTATbits.I2C_START // bit 3, shadows bit in SSPSTATbits
1900 #define P SSPSTATbits.P // bit 4, shadows bit in SSPSTATbits
1901 #define I2C_STOP SSPSTATbits.I2C_STOP // bit 4, shadows bit in SSPSTATbits
1902 #define D_NOT_A SSPSTATbits.D_NOT_A // bit 5, shadows bit in SSPSTATbits
1903 #define D SSPSTATbits.D // bit 5, shadows bit in SSPSTATbits
1904 #define I2C_DATA SSPSTATbits.I2C_DATA // bit 5, shadows bit in SSPSTATbits
1905 #define NOT_A SSPSTATbits.NOT_A // bit 5, shadows bit in SSPSTATbits
1906 #define NOT_ADDRESS SSPSTATbits.NOT_ADDRESS // bit 5, shadows bit in SSPSTATbits
1907 #define D_A SSPSTATbits.D_A // bit 5, shadows bit in SSPSTATbits
1908 #define DATA_ADDRESS SSPSTATbits.DATA_ADDRESS // bit 5, shadows bit in SSPSTATbits
1909 #define CKE SSPSTATbits.CKE // bit 6
1910 #define SMP SSPSTATbits.SMP // bit 7
1912 #define C STATUSbits.C // bit 0
1913 #define DC STATUSbits.DC // bit 1
1914 #define Z STATUSbits.Z // bit 2
1915 #define NOT_PD STATUSbits.NOT_PD // bit 3
1916 #define NOT_TO STATUSbits.NOT_TO // bit 4
1917 #define RP0 STATUSbits.RP0 // bit 5
1918 #define RP1 STATUSbits.RP1 // bit 6
1919 #define IRP STATUSbits.IRP // bit 7
1921 #define TMR1ON T1CONbits.TMR1ON // bit 0
1922 #define TMR1CS T1CONbits.TMR1CS // bit 1
1923 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
1924 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1925 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1926 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1927 #define TMR1GE T1CONbits.TMR1GE // bit 6
1928 #define T1GINV T1CONbits.T1GINV // bit 7
1930 #define TRISA0 TRISAbits.TRISA0 // bit 0
1931 #define TRISA1 TRISAbits.TRISA1 // bit 1
1932 #define TRISA2 TRISAbits.TRISA2 // bit 2
1933 #define TRISA3 TRISAbits.TRISA3 // bit 3
1934 #define TRISA4 TRISAbits.TRISA4 // bit 4
1935 #define TRISA5 TRISAbits.TRISA5 // bit 5
1937 #define TRISB4 TRISBbits.TRISB4 // bit 4
1938 #define TRISB5 TRISBbits.TRISB5 // bit 5
1939 #define TRISB6 TRISBbits.TRISB6 // bit 6
1940 #define TRISB7 TRISBbits.TRISB7 // bit 7
1942 #define TRISC0 TRISCbits.TRISC0 // bit 0
1943 #define TRISC1 TRISCbits.TRISC1 // bit 1
1944 #define TRISC2 TRISCbits.TRISC2 // bit 2
1945 #define TRISC3 TRISCbits.TRISC3 // bit 3
1946 #define TRISC4 TRISCbits.TRISC4 // bit 4
1947 #define TRISC5 TRISCbits.TRISC5 // bit 5
1948 #define TRISC6 TRISCbits.TRISC6 // bit 6
1949 #define TRISC7 TRISCbits.TRISC7 // bit 7
1951 #define VR0 VRCONbits.VR0 // bit 0
1952 #define VR1 VRCONbits.VR1 // bit 1
1953 #define VR2 VRCONbits.VR2 // bit 2
1954 #define VR3 VRCONbits.VR3 // bit 3
1955 #define VP6EN VRCONbits.VP6EN // bit 4
1956 #define VRR VRCONbits.VRR // bit 5
1957 #define C2VREN VRCONbits.C2VREN // bit 6
1958 #define C1VREN VRCONbits.C1VREN // bit 7
1960 #define SWDTEN WDTCONbits.SWDTEN // bit 0
1961 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
1962 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
1963 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
1964 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
1966 #define WPUA0 WPUbits.WPUA0 // bit 0, shadows bit in WPUbits
1967 #define WPU0 WPUbits.WPU0 // bit 0, shadows bit in WPUbits
1968 #define WPUA1 WPUbits.WPUA1 // bit 1, shadows bit in WPUbits
1969 #define WPU1 WPUbits.WPU1 // bit 1, shadows bit in WPUbits
1970 #define WPUA2 WPUbits.WPUA2 // bit 2, shadows bit in WPUbits
1971 #define WPU2 WPUbits.WPU2 // bit 2, shadows bit in WPUbits
1972 #define WPUA4 WPUbits.WPUA4 // bit 4, shadows bit in WPUbits
1973 #define WPU4 WPUbits.WPU4 // bit 4, shadows bit in WPUbits
1974 #define WPUA5 WPUbits.WPUA5 // bit 5, shadows bit in WPUbits
1975 #define WPU5 WPUbits.WPU5 // bit 5, shadows bit in WPUbits
1977 #define WPUB4 WPUBbits.WPUB4 // bit 4
1978 #define WPUB5 WPUBbits.WPUB5 // bit 5
1979 #define WPUB6 WPUBbits.WPUB6 // bit 6
1980 #define WPUB7 WPUBbits.WPUB7 // bit 7
1982 #endif // #ifndef NO_BIT_DEFINES
1984 #endif // #ifndef __PIC16F677_H__