2 * This declarations of the PIC16F685 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:57 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16F685_H__
26 #define __PIC16F685_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PCLATH_ADDR 0x000A
45 #define INTCON_ADDR 0x000B
46 #define PIR1_ADDR 0x000C
47 #define PIR2_ADDR 0x000D
48 #define TMR1_ADDR 0x000E
49 #define TMR1L_ADDR 0x000E
50 #define TMR1H_ADDR 0x000F
51 #define T1CON_ADDR 0x0010
52 #define TMR2_ADDR 0x0011
53 #define T2CON_ADDR 0x0012
54 #define CCPR1_ADDR 0x0015
55 #define CCPR1L_ADDR 0x0015
56 #define CCPR1H_ADDR 0x0016
57 #define CCP1CON_ADDR 0x0017
58 #define PWM1CON_ADDR 0x001C
59 #define ECCPAS_ADDR 0x001D
60 #define ADRESH_ADDR 0x001E
61 #define ADCON0_ADDR 0x001F
62 #define OPTION_REG_ADDR 0x0081
63 #define TRISA_ADDR 0x0085
64 #define TRISB_ADDR 0x0086
65 #define TRISC_ADDR 0x0087
66 #define PIE1_ADDR 0x008C
67 #define PIE2_ADDR 0x008D
68 #define PCON_ADDR 0x008E
69 #define OSCCON_ADDR 0x008F
70 #define OSCTUNE_ADDR 0x0090
71 #define PR2_ADDR 0x0092
72 #define WPU_ADDR 0x0095
73 #define WPUA_ADDR 0x0095
74 #define IOC_ADDR 0x0096
75 #define IOCA_ADDR 0x0096
76 #define WDTCON_ADDR 0x0097
77 #define ADRESL_ADDR 0x009E
78 #define ADCON1_ADDR 0x009F
79 #define EEDAT_ADDR 0x010C
80 #define EEDATA_ADDR 0x010C
81 #define EEADR_ADDR 0x010D
82 #define EEDATH_ADDR 0x010E
83 #define EEADRH_ADDR 0x010F
84 #define WPUB_ADDR 0x0115
85 #define IOCB_ADDR 0x0116
86 #define VRCON_ADDR 0x0118
87 #define CM1CON0_ADDR 0x0119
88 #define CM2CON0_ADDR 0x011A
89 #define CM2CON1_ADDR 0x011B
90 #define ANSEL_ADDR 0x011E
91 #define ANSELH_ADDR 0x011F
92 #define EECON1_ADDR 0x018C
93 #define EECON2_ADDR 0x018D
94 #define PSTRCON_ADDR 0x019D
95 #define SRCON_ADDR 0x019E
97 #endif // #ifndef NO_ADDR_DEFINES
99 //==============================================================================
101 // Register Definitions
103 //==============================================================================
105 extern __at(0x0000) __sfr INDF
;
106 extern __at(0x0001) __sfr TMR0
;
107 extern __at(0x0002) __sfr PCL
;
109 //==============================================================================
112 extern __at(0x0003) __sfr STATUS
;
136 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
147 //==============================================================================
149 extern __at(0x0004) __sfr FSR
;
151 //==============================================================================
154 extern __at(0x0005) __sfr PORTA
;
177 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
186 //==============================================================================
189 //==============================================================================
192 extern __at(0x0006) __sfr PORTB
;
206 extern __at(0x0006) volatile __PORTBbits_t PORTBbits
;
213 //==============================================================================
216 //==============================================================================
219 extern __at(0x0007) __sfr PORTC
;
233 extern __at(0x0007) volatile __PORTCbits_t PORTCbits
;
244 //==============================================================================
246 extern __at(0x000A) __sfr PCLATH
;
248 //==============================================================================
251 extern __at(0x000B) __sfr INTCON
;
265 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
276 //==============================================================================
279 //==============================================================================
282 extern __at(0x000C) __sfr PIR1
;
311 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
320 //==============================================================================
323 //==============================================================================
326 extern __at(0x000D) __sfr PIR2
;
340 extern __at(0x000D) volatile __PIR2bits_t PIR2bits
;
347 //==============================================================================
349 extern __at(0x000E) __sfr TMR1
;
350 extern __at(0x000E) __sfr TMR1L
;
351 extern __at(0x000F) __sfr TMR1H
;
353 //==============================================================================
356 extern __at(0x0010) __sfr T1CON
;
364 unsigned NOT_T1SYNC
: 1;
365 unsigned T1OSCEN
: 1;
366 unsigned T1CKPS0
: 1;
367 unsigned T1CKPS1
: 1;
380 extern __at(0x0010) volatile __T1CONbits_t T1CONbits
;
384 #define _NOT_T1SYNC 0x04
385 #define _T1OSCEN 0x08
386 #define _T1CKPS0 0x10
387 #define _T1CKPS1 0x20
391 //==============================================================================
393 extern __at(0x0011) __sfr TMR2
;
395 //==============================================================================
398 extern __at(0x0012) __sfr T2CON
;
404 unsigned T2CKPS0
: 1;
405 unsigned T2CKPS1
: 1;
407 unsigned TOUTPS0
: 1;
408 unsigned TOUTPS1
: 1;
409 unsigned TOUTPS2
: 1;
410 unsigned TOUTPS3
: 1;
428 extern __at(0x0012) volatile __T2CONbits_t T2CONbits
;
430 #define _T2CKPS0 0x01
431 #define _T2CKPS1 0x02
433 #define _TOUTPS0 0x08
434 #define _TOUTPS1 0x10
435 #define _TOUTPS2 0x20
436 #define _TOUTPS3 0x40
438 //==============================================================================
440 extern __at(0x0015) __sfr CCPR1
;
441 extern __at(0x0015) __sfr CCPR1L
;
442 extern __at(0x0016) __sfr CCPR1H
;
444 //==============================================================================
447 extern __at(0x0017) __sfr CCP1CON
;
483 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits
;
494 //==============================================================================
497 //==============================================================================
500 extern __at(0x001C) __sfr PWM1CON
;
523 extern __at(0x001C) volatile __PWM1CONbits_t PWM1CONbits
;
534 //==============================================================================
537 //==============================================================================
540 extern __at(0x001D) __sfr ECCPAS
;
550 unsigned ECCPAS0
: 1;
551 unsigned ECCPAS1
: 1;
552 unsigned ECCPAS2
: 1;
553 unsigned ECCPASE
: 1;
577 extern __at(0x001D) volatile __ECCPASbits_t ECCPASbits
;
583 #define _ECCPAS0 0x10
584 #define _ECCPAS1 0x20
585 #define _ECCPAS2 0x40
586 #define _ECCPASE 0x80
588 //==============================================================================
590 extern __at(0x001E) __sfr ADRESH
;
592 //==============================================================================
595 extern __at(0x001F) __sfr ADCON0
;
602 unsigned GO_NOT_DONE
: 1;
626 unsigned NOT_DONE
: 1;
638 unsigned GO_DONE
: 1;
655 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
658 #define _GO_NOT_DONE 0x02
660 #define _NOT_DONE 0x02
661 #define _GO_DONE 0x02
669 //==============================================================================
672 //==============================================================================
675 extern __at(0x0081) __sfr OPTION_REG
;
688 unsigned NOT_RABPU
: 1;
696 } __OPTION_REGbits_t
;
698 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
707 #define _NOT_RABPU 0x80
709 //==============================================================================
712 //==============================================================================
715 extern __at(0x0085) __sfr TRISA
;
738 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
747 //==============================================================================
750 //==============================================================================
753 extern __at(0x0086) __sfr TRISB
;
767 extern __at(0x0086) volatile __TRISBbits_t TRISBbits
;
774 //==============================================================================
777 //==============================================================================
780 extern __at(0x0087) __sfr TRISC
;
794 extern __at(0x0087) volatile __TRISCbits_t TRISCbits
;
805 //==============================================================================
808 //==============================================================================
811 extern __at(0x008C) __sfr PIE1
;
840 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
849 //==============================================================================
852 //==============================================================================
855 extern __at(0x008D) __sfr PIE2
;
869 extern __at(0x008D) volatile __PIE2bits_t PIE2bits
;
876 //==============================================================================
879 //==============================================================================
882 extern __at(0x008E) __sfr PCON
;
888 unsigned NOT_BOR
: 1;
889 unsigned NOT_POR
: 1;
900 unsigned NOT_BOD
: 1;
911 extern __at(0x008E) volatile __PCONbits_t PCONbits
;
913 #define _NOT_BOR 0x01
914 #define _NOT_BOD 0x01
915 #define _NOT_POR 0x02
919 //==============================================================================
922 //==============================================================================
925 extern __at(0x008F) __sfr OSCCON
;
949 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits
;
959 //==============================================================================
962 //==============================================================================
965 extern __at(0x0090) __sfr OSCTUNE
;
988 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits
;
996 //==============================================================================
998 extern __at(0x0092) __sfr PR2
;
1000 //==============================================================================
1003 extern __at(0x0095) __sfr WPU
;
1032 extern __at(0x0095) volatile __WPUbits_t WPUbits
;
1045 //==============================================================================
1048 //==============================================================================
1051 extern __at(0x0095) __sfr WPUA
;
1080 extern __at(0x0095) volatile __WPUAbits_t WPUAbits
;
1082 #define _WPUA_WPUA0 0x01
1083 #define _WPUA_WPU0 0x01
1084 #define _WPUA_WPUA1 0x02
1085 #define _WPUA_WPU1 0x02
1086 #define _WPUA_WPUA2 0x04
1087 #define _WPUA_WPU2 0x04
1088 #define _WPUA_WPUA4 0x10
1089 #define _WPUA_WPU4 0x10
1090 #define _WPUA_WPUA5 0x20
1091 #define _WPUA_WPU5 0x20
1093 //==============================================================================
1096 //==============================================================================
1099 extern __at(0x0096) __sfr IOC
;
1140 extern __at(0x0096) volatile __IOCbits_t IOCbits
;
1155 //==============================================================================
1158 //==============================================================================
1161 extern __at(0x0096) __sfr IOCA
;
1202 extern __at(0x0096) volatile __IOCAbits_t IOCAbits
;
1204 #define _IOCA_IOCA0 0x01
1205 #define _IOCA_IOC0 0x01
1206 #define _IOCA_IOCA1 0x02
1207 #define _IOCA_IOC1 0x02
1208 #define _IOCA_IOCA2 0x04
1209 #define _IOCA_IOC2 0x04
1210 #define _IOCA_IOCA3 0x08
1211 #define _IOCA_IOC3 0x08
1212 #define _IOCA_IOCA4 0x10
1213 #define _IOCA_IOC4 0x10
1214 #define _IOCA_IOCA5 0x20
1215 #define _IOCA_IOC5 0x20
1217 //==============================================================================
1220 //==============================================================================
1223 extern __at(0x0097) __sfr WDTCON
;
1229 unsigned SWDTEN
: 1;
1230 unsigned WDTPS0
: 1;
1231 unsigned WDTPS1
: 1;
1232 unsigned WDTPS2
: 1;
1233 unsigned WDTPS3
: 1;
1247 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits
;
1249 #define _SWDTEN 0x01
1250 #define _WDTPS0 0x02
1251 #define _WDTPS1 0x04
1252 #define _WDTPS2 0x08
1253 #define _WDTPS3 0x10
1255 //==============================================================================
1257 extern __at(0x009E) __sfr ADRESL
;
1259 //==============================================================================
1262 extern __at(0x009F) __sfr ADCON1
;
1286 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits
;
1292 //==============================================================================
1294 extern __at(0x010C) __sfr EEDAT
;
1295 extern __at(0x010C) __sfr EEDATA
;
1296 extern __at(0x010D) __sfr EEADR
;
1297 extern __at(0x010E) __sfr EEDATH
;
1298 extern __at(0x010F) __sfr EEADRH
;
1300 //==============================================================================
1303 extern __at(0x0115) __sfr WPUB
;
1317 extern __at(0x0115) volatile __WPUBbits_t WPUBbits
;
1324 //==============================================================================
1327 //==============================================================================
1330 extern __at(0x0116) __sfr IOCB
;
1344 extern __at(0x0116) volatile __IOCBbits_t IOCBbits
;
1351 //==============================================================================
1354 //==============================================================================
1357 extern __at(0x0118) __sfr VRCON
;
1369 unsigned C2VREN
: 1;
1370 unsigned C1VREN
: 1;
1380 extern __at(0x0118) volatile __VRCONbits_t VRCONbits
;
1388 #define _C2VREN 0x40
1389 #define _C1VREN 0x80
1391 //==============================================================================
1394 //==============================================================================
1397 extern __at(0x0119) __sfr CM1CON0
;
1420 extern __at(0x0119) volatile __CM1CON0bits_t CM1CON0bits
;
1430 //==============================================================================
1433 //==============================================================================
1436 extern __at(0x011A) __sfr CM2CON0
;
1459 extern __at(0x011A) volatile __CM2CON0bits_t CM2CON0bits
;
1469 //==============================================================================
1472 //==============================================================================
1475 extern __at(0x011B) __sfr CM2CON1
;
1479 unsigned C2SYNC
: 1;
1485 unsigned MC2OUT
: 1;
1486 unsigned MC1OUT
: 1;
1489 extern __at(0x011B) volatile __CM2CON1bits_t CM2CON1bits
;
1491 #define _C2SYNC 0x01
1493 #define _MC2OUT 0x40
1494 #define _MC1OUT 0x80
1496 //==============================================================================
1499 //==============================================================================
1502 extern __at(0x011E) __sfr ANSEL
;
1516 extern __at(0x011E) volatile __ANSELbits_t ANSELbits
;
1527 //==============================================================================
1530 //==============================================================================
1533 extern __at(0x011F) __sfr ANSELH
;
1547 extern __at(0x011F) volatile __ANSELHbits_t ANSELHbits
;
1554 //==============================================================================
1557 //==============================================================================
1560 extern __at(0x018C) __sfr EECON1
;
1574 extern __at(0x018C) volatile __EECON1bits_t EECON1bits
;
1582 //==============================================================================
1584 extern __at(0x018D) __sfr EECON2
;
1586 //==============================================================================
1589 extern __at(0x019D) __sfr PSTRCON
;
1597 unsigned STRSYNC
: 1;
1603 extern __at(0x019D) volatile __PSTRCONbits_t PSTRCONbits
;
1609 #define _STRSYNC 0x10
1611 //==============================================================================
1614 //==============================================================================
1617 extern __at(0x019E) __sfr SRCON
;
1640 extern __at(0x019E) volatile __SRCONbits_t SRCONbits
;
1649 //==============================================================================
1652 //==============================================================================
1654 // Configuration Bits
1656 //==============================================================================
1658 #define _CONFIG 0x2007
1660 //----------------------------- CONFIG Options -------------------------------
1662 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1663 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1664 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1665 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1666 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1667 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1668 #define _FOSC_EC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1669 #define _EC_OSC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1670 #define _FOSC_INTRCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1671 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1672 #define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1673 #define _FOSC_INTRCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1674 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1675 #define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1676 #define _FOSC_EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1677 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1678 #define _EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1679 #define _FOSC_EXTRCCLK 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1680 #define _EXTRC_OSC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1681 #define _EXTRC 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1682 #define _WDTE_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
1683 #define _WDT_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
1684 #define _WDTE_ON 0x3FFF // WDT enabled.
1685 #define _WDT_ON 0x3FFF // WDT enabled.
1686 #define _PWRTE_ON 0x3FEF // PWRT enabled.
1687 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1688 #define _MCLRE_OFF 0x3FDF // MCLR pin function is digital input, MCLR internally tied to VDD.
1689 #define _MCLRE_ON 0x3FFF // MCLR pin function is MCLR.
1690 #define _CP_ON 0x3FBF // Program memory code protection is enabled.
1691 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
1692 #define _CPD_ON 0x3F7F // Data memory code protection is enabled.
1693 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
1694 #define _BOREN_OFF 0x3CFF // BOR disabled.
1695 #define _BOD_OFF 0x3CFF // BOR disabled.
1696 #define _BOR_OFF 0x3CFF // BOR disabled.
1697 #define _BOREN_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1698 #define _BOD_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1699 #define _BOR_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1700 #define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1701 #define _BOD_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1702 #define _BOR_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1703 #define _BOREN_ON 0x3FFF // BOR enabled.
1704 #define _BOD_ON 0x3FFF // BOR enabled.
1705 #define _BOR_ON 0x3FFF // BOR enabled.
1706 #define _IESO_OFF 0x3BFF // Internal External Switchover mode is disabled.
1707 #define _IESO_ON 0x3FFF // Internal External Switchover mode is enabled.
1708 #define _FCMEN_OFF 0x37FF // Fail-Safe Clock Monitor is disabled.
1709 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
1711 //==============================================================================
1713 #define _DEVID1 0x2006
1715 #define _IDLOC0 0x2000
1716 #define _IDLOC1 0x2001
1717 #define _IDLOC2 0x2002
1718 #define _IDLOC3 0x2003
1720 //==============================================================================
1722 #ifndef NO_BIT_DEFINES
1724 #define ADON ADCON0bits.ADON // bit 0
1725 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
1726 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
1727 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
1728 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
1729 #define CHS0 ADCON0bits.CHS0 // bit 2
1730 #define CHS1 ADCON0bits.CHS1 // bit 3
1731 #define CHS2 ADCON0bits.CHS2 // bit 4
1732 #define CHS3 ADCON0bits.CHS3 // bit 5
1733 #define VCFG ADCON0bits.VCFG // bit 6
1734 #define ADFM ADCON0bits.ADFM // bit 7
1736 #define ADCS0 ADCON1bits.ADCS0 // bit 4
1737 #define ADCS1 ADCON1bits.ADCS1 // bit 5
1738 #define ADCS2 ADCON1bits.ADCS2 // bit 6
1740 #define ANS0 ANSELbits.ANS0 // bit 0
1741 #define ANS1 ANSELbits.ANS1 // bit 1
1742 #define ANS2 ANSELbits.ANS2 // bit 2
1743 #define ANS3 ANSELbits.ANS3 // bit 3
1744 #define ANS4 ANSELbits.ANS4 // bit 4
1745 #define ANS5 ANSELbits.ANS5 // bit 5
1746 #define ANS6 ANSELbits.ANS6 // bit 6
1747 #define ANS7 ANSELbits.ANS7 // bit 7
1749 #define ANS8 ANSELHbits.ANS8 // bit 0
1750 #define ANS9 ANSELHbits.ANS9 // bit 1
1751 #define ANS10 ANSELHbits.ANS10 // bit 2
1752 #define ANS11 ANSELHbits.ANS11 // bit 3
1754 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1755 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1756 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1757 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1758 #define DC1B0 CCP1CONbits.DC1B0 // bit 4
1759 #define DC1B1 CCP1CONbits.DC1B1 // bit 5
1760 #define P1M0 CCP1CONbits.P1M0 // bit 6
1761 #define P1M1 CCP1CONbits.P1M1 // bit 7
1763 #define C1CH0 CM1CON0bits.C1CH0 // bit 0
1764 #define C1CH1 CM1CON0bits.C1CH1 // bit 1
1765 #define C1R CM1CON0bits.C1R // bit 2
1766 #define C1POL CM1CON0bits.C1POL // bit 4
1767 #define C1OE CM1CON0bits.C1OE // bit 5
1768 #define C1OUT CM1CON0bits.C1OUT // bit 6
1769 #define C1ON CM1CON0bits.C1ON // bit 7
1771 #define C2CH0 CM2CON0bits.C2CH0 // bit 0
1772 #define C2CH1 CM2CON0bits.C2CH1 // bit 1
1773 #define C2R CM2CON0bits.C2R // bit 2
1774 #define C2POL CM2CON0bits.C2POL // bit 4
1775 #define C2OE CM2CON0bits.C2OE // bit 5
1776 #define C2OUT CM2CON0bits.C2OUT // bit 6
1777 #define C2ON CM2CON0bits.C2ON // bit 7
1779 #define C2SYNC CM2CON1bits.C2SYNC // bit 0
1780 #define T1GSS CM2CON1bits.T1GSS // bit 1
1781 #define MC2OUT CM2CON1bits.MC2OUT // bit 6
1782 #define MC1OUT CM2CON1bits.MC1OUT // bit 7
1784 #define PSSBD0 ECCPASbits.PSSBD0 // bit 0
1785 #define PSSBD1 ECCPASbits.PSSBD1 // bit 1
1786 #define PSSAC0 ECCPASbits.PSSAC0 // bit 2
1787 #define PSSAC1 ECCPASbits.PSSAC1 // bit 3
1788 #define ECCPAS0 ECCPASbits.ECCPAS0 // bit 4
1789 #define ECCPAS1 ECCPASbits.ECCPAS1 // bit 5
1790 #define ECCPAS2 ECCPASbits.ECCPAS2 // bit 6
1791 #define ECCPASE ECCPASbits.ECCPASE // bit 7
1793 #define RD EECON1bits.RD // bit 0
1794 #define WR EECON1bits.WR // bit 1
1795 #define WREN EECON1bits.WREN // bit 2
1796 #define WRERR EECON1bits.WRERR // bit 3
1797 #define EEPGD EECON1bits.EEPGD // bit 7
1799 #define RABIF INTCONbits.RABIF // bit 0
1800 #define INTF INTCONbits.INTF // bit 1
1801 #define T0IF INTCONbits.T0IF // bit 2
1802 #define RABIE INTCONbits.RABIE // bit 3
1803 #define INTE INTCONbits.INTE // bit 4
1804 #define T0IE INTCONbits.T0IE // bit 5
1805 #define PEIE INTCONbits.PEIE // bit 6
1806 #define GIE INTCONbits.GIE // bit 7
1808 #define IOCA0 IOCbits.IOCA0 // bit 0, shadows bit in IOCbits
1809 #define IOC0 IOCbits.IOC0 // bit 0, shadows bit in IOCbits
1810 #define IOCA1 IOCbits.IOCA1 // bit 1, shadows bit in IOCbits
1811 #define IOC1 IOCbits.IOC1 // bit 1, shadows bit in IOCbits
1812 #define IOCA2 IOCbits.IOCA2 // bit 2, shadows bit in IOCbits
1813 #define IOC2 IOCbits.IOC2 // bit 2, shadows bit in IOCbits
1814 #define IOCA3 IOCbits.IOCA3 // bit 3, shadows bit in IOCbits
1815 #define IOC3 IOCbits.IOC3 // bit 3, shadows bit in IOCbits
1816 #define IOCA4 IOCbits.IOCA4 // bit 4, shadows bit in IOCbits
1817 #define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits
1818 #define IOCA5 IOCbits.IOCA5 // bit 5, shadows bit in IOCbits
1819 #define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits
1821 #define IOCB4 IOCBbits.IOCB4 // bit 4
1822 #define IOCB5 IOCBbits.IOCB5 // bit 5
1823 #define IOCB6 IOCBbits.IOCB6 // bit 6
1824 #define IOCB7 IOCBbits.IOCB7 // bit 7
1826 #define PS0 OPTION_REGbits.PS0 // bit 0
1827 #define PS1 OPTION_REGbits.PS1 // bit 1
1828 #define PS2 OPTION_REGbits.PS2 // bit 2
1829 #define PSA OPTION_REGbits.PSA // bit 3
1830 #define T0SE OPTION_REGbits.T0SE // bit 4
1831 #define T0CS OPTION_REGbits.T0CS // bit 5
1832 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1833 #define NOT_RABPU OPTION_REGbits.NOT_RABPU // bit 7
1835 #define SCS OSCCONbits.SCS // bit 0
1836 #define LTS OSCCONbits.LTS // bit 1
1837 #define HTS OSCCONbits.HTS // bit 2
1838 #define OSTS OSCCONbits.OSTS // bit 3
1839 #define IRCF0 OSCCONbits.IRCF0 // bit 4
1840 #define IRCF1 OSCCONbits.IRCF1 // bit 5
1841 #define IRCF2 OSCCONbits.IRCF2 // bit 6
1843 #define TUN0 OSCTUNEbits.TUN0 // bit 0
1844 #define TUN1 OSCTUNEbits.TUN1 // bit 1
1845 #define TUN2 OSCTUNEbits.TUN2 // bit 2
1846 #define TUN3 OSCTUNEbits.TUN3 // bit 3
1847 #define TUN4 OSCTUNEbits.TUN4 // bit 4
1849 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1850 #define NOT_BOD PCONbits.NOT_BOD // bit 0, shadows bit in PCONbits
1851 #define NOT_POR PCONbits.NOT_POR // bit 1
1852 #define SBOREN PCONbits.SBOREN // bit 4
1853 #define ULPWUE PCONbits.ULPWUE // bit 5
1855 #define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits
1856 #define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits
1857 #define TMR2IE PIE1bits.TMR2IE // bit 1, shadows bit in PIE1bits
1858 #define T2IE PIE1bits.T2IE // bit 1, shadows bit in PIE1bits
1859 #define CCP1IE PIE1bits.CCP1IE // bit 2
1860 #define ADIE PIE1bits.ADIE // bit 6
1862 #define EEIE PIE2bits.EEIE // bit 4
1863 #define C1IE PIE2bits.C1IE // bit 5
1864 #define C2IE PIE2bits.C2IE // bit 6
1865 #define OSFIE PIE2bits.OSFIE // bit 7
1867 #define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits
1868 #define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits
1869 #define TMR2IF PIR1bits.TMR2IF // bit 1, shadows bit in PIR1bits
1870 #define T2IF PIR1bits.T2IF // bit 1, shadows bit in PIR1bits
1871 #define CCP1IF PIR1bits.CCP1IF // bit 2
1872 #define ADIF PIR1bits.ADIF // bit 6
1874 #define EEIF PIR2bits.EEIF // bit 4
1875 #define C1IF PIR2bits.C1IF // bit 5
1876 #define C2IF PIR2bits.C2IF // bit 6
1877 #define OSFIF PIR2bits.OSFIF // bit 7
1879 #define RA0 PORTAbits.RA0 // bit 0
1880 #define RA1 PORTAbits.RA1 // bit 1
1881 #define RA2 PORTAbits.RA2 // bit 2
1882 #define RA3 PORTAbits.RA3 // bit 3
1883 #define RA4 PORTAbits.RA4 // bit 4
1884 #define RA5 PORTAbits.RA5 // bit 5
1886 #define RB4 PORTBbits.RB4 // bit 4
1887 #define RB5 PORTBbits.RB5 // bit 5
1888 #define RB6 PORTBbits.RB6 // bit 6
1889 #define RB7 PORTBbits.RB7 // bit 7
1891 #define RC0 PORTCbits.RC0 // bit 0
1892 #define RC1 PORTCbits.RC1 // bit 1
1893 #define RC2 PORTCbits.RC2 // bit 2
1894 #define RC3 PORTCbits.RC3 // bit 3
1895 #define RC4 PORTCbits.RC4 // bit 4
1896 #define RC5 PORTCbits.RC5 // bit 5
1897 #define RC6 PORTCbits.RC6 // bit 6
1898 #define RC7 PORTCbits.RC7 // bit 7
1900 #define STRA PSTRCONbits.STRA // bit 0
1901 #define STRB PSTRCONbits.STRB // bit 1
1902 #define STRC PSTRCONbits.STRC // bit 2
1903 #define STRD PSTRCONbits.STRD // bit 3
1904 #define STRSYNC PSTRCONbits.STRSYNC // bit 4
1906 #define PDC0 PWM1CONbits.PDC0 // bit 0
1907 #define PDC1 PWM1CONbits.PDC1 // bit 1
1908 #define PDC2 PWM1CONbits.PDC2 // bit 2
1909 #define PDC3 PWM1CONbits.PDC3 // bit 3
1910 #define PDC4 PWM1CONbits.PDC4 // bit 4
1911 #define PDC5 PWM1CONbits.PDC5 // bit 5
1912 #define PDC6 PWM1CONbits.PDC6 // bit 6
1913 #define PRSEN PWM1CONbits.PRSEN // bit 7
1915 #define PULSR SRCONbits.PULSR // bit 2
1916 #define PULSS SRCONbits.PULSS // bit 3
1917 #define C2REN SRCONbits.C2REN // bit 4
1918 #define C1SEN SRCONbits.C1SEN // bit 5
1919 #define SR0 SRCONbits.SR0 // bit 6
1920 #define SR1 SRCONbits.SR1 // bit 7
1922 #define C STATUSbits.C // bit 0
1923 #define DC STATUSbits.DC // bit 1
1924 #define Z STATUSbits.Z // bit 2
1925 #define NOT_PD STATUSbits.NOT_PD // bit 3
1926 #define NOT_TO STATUSbits.NOT_TO // bit 4
1927 #define RP0 STATUSbits.RP0 // bit 5
1928 #define RP1 STATUSbits.RP1 // bit 6
1929 #define IRP STATUSbits.IRP // bit 7
1931 #define TMR1ON T1CONbits.TMR1ON // bit 0
1932 #define TMR1CS T1CONbits.TMR1CS // bit 1
1933 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
1934 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1935 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1936 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1937 #define TMR1GE T1CONbits.TMR1GE // bit 6
1938 #define T1GINV T1CONbits.T1GINV // bit 7
1940 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1941 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1942 #define TMR2ON T2CONbits.TMR2ON // bit 2
1943 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1944 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1945 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1946 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1948 #define TRISA0 TRISAbits.TRISA0 // bit 0
1949 #define TRISA1 TRISAbits.TRISA1 // bit 1
1950 #define TRISA2 TRISAbits.TRISA2 // bit 2
1951 #define TRISA3 TRISAbits.TRISA3 // bit 3
1952 #define TRISA4 TRISAbits.TRISA4 // bit 4
1953 #define TRISA5 TRISAbits.TRISA5 // bit 5
1955 #define TRISB4 TRISBbits.TRISB4 // bit 4
1956 #define TRISB5 TRISBbits.TRISB5 // bit 5
1957 #define TRISB6 TRISBbits.TRISB6 // bit 6
1958 #define TRISB7 TRISBbits.TRISB7 // bit 7
1960 #define TRISC0 TRISCbits.TRISC0 // bit 0
1961 #define TRISC1 TRISCbits.TRISC1 // bit 1
1962 #define TRISC2 TRISCbits.TRISC2 // bit 2
1963 #define TRISC3 TRISCbits.TRISC3 // bit 3
1964 #define TRISC4 TRISCbits.TRISC4 // bit 4
1965 #define TRISC5 TRISCbits.TRISC5 // bit 5
1966 #define TRISC6 TRISCbits.TRISC6 // bit 6
1967 #define TRISC7 TRISCbits.TRISC7 // bit 7
1969 #define VR0 VRCONbits.VR0 // bit 0
1970 #define VR1 VRCONbits.VR1 // bit 1
1971 #define VR2 VRCONbits.VR2 // bit 2
1972 #define VR3 VRCONbits.VR3 // bit 3
1973 #define VP6EN VRCONbits.VP6EN // bit 4
1974 #define VRR VRCONbits.VRR // bit 5
1975 #define C2VREN VRCONbits.C2VREN // bit 6
1976 #define C1VREN VRCONbits.C1VREN // bit 7
1978 #define SWDTEN WDTCONbits.SWDTEN // bit 0
1979 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
1980 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
1981 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
1982 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
1984 #define WPUA0 WPUbits.WPUA0 // bit 0, shadows bit in WPUbits
1985 #define WPU0 WPUbits.WPU0 // bit 0, shadows bit in WPUbits
1986 #define WPUA1 WPUbits.WPUA1 // bit 1, shadows bit in WPUbits
1987 #define WPU1 WPUbits.WPU1 // bit 1, shadows bit in WPUbits
1988 #define WPUA2 WPUbits.WPUA2 // bit 2, shadows bit in WPUbits
1989 #define WPU2 WPUbits.WPU2 // bit 2, shadows bit in WPUbits
1990 #define WPUA4 WPUbits.WPUA4 // bit 4, shadows bit in WPUbits
1991 #define WPU4 WPUbits.WPU4 // bit 4, shadows bit in WPUbits
1992 #define WPUA5 WPUbits.WPUA5 // bit 5, shadows bit in WPUbits
1993 #define WPU5 WPUbits.WPU5 // bit 5, shadows bit in WPUbits
1995 #define WPUB4 WPUBbits.WPUB4 // bit 4
1996 #define WPUB5 WPUBbits.WPUB5 // bit 5
1997 #define WPUB6 WPUBbits.WPUB6 // bit 6
1998 #define WPUB7 WPUBbits.WPUB7 // bit 7
2000 #endif // #ifndef NO_BIT_DEFINES
2002 #endif // #ifndef __PIC16F685_H__