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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16f785.h
blobaadd4c1fc2ef307ebe3ec90118f76ad41eec3df6
1 /*
2 * This declarations of the PIC16F785 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:59 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16F785_H__
26 #define __PIC16F785_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PCLATH_ADDR 0x000A
45 #define INTCON_ADDR 0x000B
46 #define PIR1_ADDR 0x000C
47 #define TMR1_ADDR 0x000E
48 #define TMR1L_ADDR 0x000E
49 #define TMR1H_ADDR 0x000F
50 #define T1CON_ADDR 0x0010
51 #define TMR2_ADDR 0x0011
52 #define T2CON_ADDR 0x0012
53 #define CCPR_ADDR 0x0013
54 #define CCPR1L_ADDR 0x0013
55 #define CCPR1H_ADDR 0x0014
56 #define CCP1CON_ADDR 0x0015
57 #define WDTCON_ADDR 0x0018
58 #define ADRESH_ADDR 0x001E
59 #define ADCON0_ADDR 0x001F
60 #define OPTION_REG_ADDR 0x0081
61 #define TRISA_ADDR 0x0085
62 #define TRISB_ADDR 0x0086
63 #define TRISC_ADDR 0x0087
64 #define PIE1_ADDR 0x008C
65 #define PCON_ADDR 0x008E
66 #define OSCCON_ADDR 0x008F
67 #define OSCTUNE_ADDR 0x0090
68 #define ANSEL_ADDR 0x0091
69 #define ANSEL0_ADDR 0x0091
70 #define PR2_ADDR 0x0092
71 #define ANSEL1_ADDR 0x0093
72 #define WPU_ADDR 0x0095
73 #define WPUA_ADDR 0x0095
74 #define IOC_ADDR 0x0096
75 #define IOCA_ADDR 0x0096
76 #define REFCON_ADDR 0x0098
77 #define VRCON_ADDR 0x0099
78 #define EEDAT_ADDR 0x009A
79 #define EEDATA_ADDR 0x009A
80 #define EEADR_ADDR 0x009B
81 #define EECON1_ADDR 0x009C
82 #define EECON2_ADDR 0x009D
83 #define ADRESL_ADDR 0x009E
84 #define ADCON1_ADDR 0x009F
85 #define PWMCON1_ADDR 0x0110
86 #define PWMCON0_ADDR 0x0111
87 #define PWMCLK_ADDR 0x0112
88 #define PWMPH1_ADDR 0x0113
89 #define PWMPH2_ADDR 0x0114
90 #define CM1CON0_ADDR 0x0119
91 #define CM2CON0_ADDR 0x011A
92 #define CM2CON1_ADDR 0x011B
93 #define OPA1CON_ADDR 0x011C
94 #define OPA2CON_ADDR 0x011D
95
96 #endif // #ifndef NO_ADDR_DEFINES
97
98 //==============================================================================
99 //
100 // Register Definitions
101 //
102 //==============================================================================
103
104 extern __at(0x0000) __sfr INDF;
105 extern __at(0x0001) __sfr TMR0;
106 extern __at(0x0002) __sfr PCL;
107
108 //==============================================================================
109 // STATUS Bits
110
111 extern __at(0x0003) __sfr STATUS;
112
113 typedef union
114 {
115 struct
116 {
117 unsigned C : 1;
118 unsigned DC : 1;
119 unsigned Z : 1;
120 unsigned NOT_PD : 1;
121 unsigned NOT_TO : 1;
122 unsigned RP0 : 1;
123 unsigned RP1 : 1;
124 unsigned IRP : 1;
125 };
126
127 struct
128 {
129 unsigned : 5;
130 unsigned RP : 2;
131 unsigned : 1;
132 };
133 } __STATUSbits_t;
134
135 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
136
137 #define _C 0x01
138 #define _DC 0x02
139 #define _Z 0x04
140 #define _NOT_PD 0x08
141 #define _NOT_TO 0x10
142 #define _RP0 0x20
143 #define _RP1 0x40
144 #define _IRP 0x80
145
146 //==============================================================================
147
148 extern __at(0x0004) __sfr FSR;
149
150 //==============================================================================
151 // PORTA Bits
152
153 extern __at(0x0005) __sfr PORTA;
154
155 typedef union
156 {
157 struct
158 {
159 unsigned RA0 : 1;
160 unsigned RA1 : 1;
161 unsigned RA2 : 1;
162 unsigned RA3 : 1;
163 unsigned RA4 : 1;
164 unsigned RA5 : 1;
165 unsigned : 1;
166 unsigned : 1;
167 };
168
169 struct
170 {
171 unsigned RA : 6;
172 unsigned : 2;
173 };
174 } __PORTAbits_t;
175
176 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
177
178 #define _RA0 0x01
179 #define _RA1 0x02
180 #define _RA2 0x04
181 #define _RA3 0x08
182 #define _RA4 0x10
183 #define _RA5 0x20
184
185 //==============================================================================
186
187
188 //==============================================================================
189 // PORTB Bits
190
191 extern __at(0x0006) __sfr PORTB;
192
193 typedef struct
194 {
195 unsigned : 1;
196 unsigned : 1;
197 unsigned : 1;
198 unsigned : 1;
199 unsigned RB4 : 1;
200 unsigned RB5 : 1;
201 unsigned RB6 : 1;
202 unsigned RB7 : 1;
203 } __PORTBbits_t;
204
205 extern __at(0x0006) volatile __PORTBbits_t PORTBbits;
206
207 #define _RB4 0x10
208 #define _RB5 0x20
209 #define _RB6 0x40
210 #define _RB7 0x80
211
212 //==============================================================================
213
214
215 //==============================================================================
216 // PORTC Bits
217
218 extern __at(0x0007) __sfr PORTC;
219
220 typedef struct
221 {
222 unsigned RC0 : 1;
223 unsigned RC1 : 1;
224 unsigned RC2 : 1;
225 unsigned RC3 : 1;
226 unsigned RC4 : 1;
227 unsigned RC5 : 1;
228 unsigned RC6 : 1;
229 unsigned RC7 : 1;
230 } __PORTCbits_t;
231
232 extern __at(0x0007) volatile __PORTCbits_t PORTCbits;
233
234 #define _RC0 0x01
235 #define _RC1 0x02
236 #define _RC2 0x04
237 #define _RC3 0x08
238 #define _RC4 0x10
239 #define _RC5 0x20
240 #define _RC6 0x40
241 #define _RC7 0x80
242
243 //==============================================================================
244
245 extern __at(0x000A) __sfr PCLATH;
246
247 //==============================================================================
248 // INTCON Bits
249
250 extern __at(0x000B) __sfr INTCON;
251
252 typedef union
253 {
254 struct
255 {
256 unsigned RAIF : 1;
257 unsigned INTF : 1;
258 unsigned T0IF : 1;
259 unsigned RAIE : 1;
260 unsigned INTE : 1;
261 unsigned T0IE : 1;
262 unsigned PEIE : 1;
263 unsigned GIE : 1;
264 };
265
266 struct
267 {
268 unsigned : 1;
269 unsigned : 1;
270 unsigned TMR0IF : 1;
271 unsigned : 1;
272 unsigned : 1;
273 unsigned TMR0IE : 1;
274 unsigned : 1;
275 unsigned : 1;
276 };
277 } __INTCONbits_t;
278
279 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
280
281 #define _RAIF 0x01
282 #define _INTF 0x02
283 #define _T0IF 0x04
284 #define _TMR0IF 0x04
285 #define _RAIE 0x08
286 #define _INTE 0x10
287 #define _T0IE 0x20
288 #define _TMR0IE 0x20
289 #define _PEIE 0x40
290 #define _GIE 0x80
291
292 //==============================================================================
293
294
295 //==============================================================================
296 // PIR1 Bits
297
298 extern __at(0x000C) __sfr PIR1;
299
300 typedef union
301 {
302 struct
303 {
304 unsigned TMR1IF : 1;
305 unsigned TMR2IF : 1;
306 unsigned OSFIF : 1;
307 unsigned C1IF : 1;
308 unsigned C2IF : 1;
309 unsigned CCP1IF : 1;
310 unsigned ADIF : 1;
311 unsigned EEIF : 1;
312 };
313
314 struct
315 {
316 unsigned T1IF : 1;
317 unsigned T2IF : 1;
318 unsigned : 1;
319 unsigned : 1;
320 unsigned : 1;
321 unsigned : 1;
322 unsigned : 1;
323 unsigned : 1;
324 };
325 } __PIR1bits_t;
326
327 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
328
329 #define _TMR1IF 0x01
330 #define _T1IF 0x01
331 #define _TMR2IF 0x02
332 #define _T2IF 0x02
333 #define _OSFIF 0x04
334 #define _C1IF 0x08
335 #define _C2IF 0x10
336 #define _CCP1IF 0x20
337 #define _ADIF 0x40
338 #define _EEIF 0x80
339
340 //==============================================================================
341
342 extern __at(0x000E) __sfr TMR1;
343 extern __at(0x000E) __sfr TMR1L;
344 extern __at(0x000F) __sfr TMR1H;
345
346 //==============================================================================
347 // T1CON Bits
348
349 extern __at(0x0010) __sfr T1CON;
350
351 typedef union
352 {
353 struct
354 {
355 unsigned TMR1ON : 1;
356 unsigned TMR1CS : 1;
357 unsigned NOT_T1SYNC : 1;
358 unsigned T1OSCEN : 1;
359 unsigned T1CKPS0 : 1;
360 unsigned T1CKPS1 : 1;
361 unsigned TMR1GE : 1;
362 unsigned T1GINV : 1;
363 };
364
365 struct
366 {
367 unsigned : 1;
368 unsigned : 1;
369 unsigned : 1;
370 unsigned : 1;
371 unsigned : 1;
372 unsigned : 1;
373 unsigned T1GE : 1;
374 unsigned : 1;
375 };
376
377 struct
378 {
379 unsigned : 4;
380 unsigned T1CKPS : 2;
381 unsigned : 2;
382 };
383 } __T1CONbits_t;
384
385 extern __at(0x0010) volatile __T1CONbits_t T1CONbits;
386
387 #define _TMR1ON 0x01
388 #define _TMR1CS 0x02
389 #define _NOT_T1SYNC 0x04
390 #define _T1OSCEN 0x08
391 #define _T1CKPS0 0x10
392 #define _T1CKPS1 0x20
393 #define _TMR1GE 0x40
394 #define _T1GE 0x40
395 #define _T1GINV 0x80
396
397 //==============================================================================
398
399 extern __at(0x0011) __sfr TMR2;
400
401 //==============================================================================
402 // T2CON Bits
403
404 extern __at(0x0012) __sfr T2CON;
405
406 typedef union
407 {
408 struct
409 {
410 unsigned T2CKPS0 : 1;
411 unsigned T2CKPS1 : 1;
412 unsigned TMR2ON : 1;
413 unsigned TOUTPS0 : 1;
414 unsigned TOUTPS1 : 1;
415 unsigned TOUTPS2 : 1;
416 unsigned TOUTPS3 : 1;
417 unsigned : 1;
418 };
419
420 struct
421 {
422 unsigned T2CKPS : 2;
423 unsigned : 6;
424 };
425
426 struct
427 {
428 unsigned : 3;
429 unsigned TOUTPS : 4;
430 unsigned : 1;
431 };
432 } __T2CONbits_t;
433
434 extern __at(0x0012) volatile __T2CONbits_t T2CONbits;
435
436 #define _T2CKPS0 0x01
437 #define _T2CKPS1 0x02
438 #define _TMR2ON 0x04
439 #define _TOUTPS0 0x08
440 #define _TOUTPS1 0x10
441 #define _TOUTPS2 0x20
442 #define _TOUTPS3 0x40
443
444 //==============================================================================
445
446 extern __at(0x0013) __sfr CCPR;
447 extern __at(0x0013) __sfr CCPR1L;
448 extern __at(0x0014) __sfr CCPR1H;
449
450 //==============================================================================
451 // CCP1CON Bits
452
453 extern __at(0x0015) __sfr CCP1CON;
454
455 typedef union
456 {
457 struct
458 {
459 unsigned CCP1M0 : 1;
460 unsigned CCP1M1 : 1;
461 unsigned CCP1M2 : 1;
462 unsigned CCP1M3 : 1;
463 unsigned DC1B0 : 1;
464 unsigned DC1B1 : 1;
465 unsigned : 1;
466 unsigned : 1;
467 };
468
469 struct
470 {
471 unsigned CCP1M : 4;
472 unsigned : 4;
473 };
474
475 struct
476 {
477 unsigned : 4;
478 unsigned DC1B : 2;
479 unsigned : 2;
480 };
481 } __CCP1CONbits_t;
482
483 extern __at(0x0015) volatile __CCP1CONbits_t CCP1CONbits;
484
485 #define _CCP1M0 0x01
486 #define _CCP1M1 0x02
487 #define _CCP1M2 0x04
488 #define _CCP1M3 0x08
489 #define _DC1B0 0x10
490 #define _DC1B1 0x20
491
492 //==============================================================================
493
494
495 //==============================================================================
496 // WDTCON Bits
497
498 extern __at(0x0018) __sfr WDTCON;
499
500 typedef union
501 {
502 struct
503 {
504 unsigned SWDTEN : 1;
505 unsigned WDTPS0 : 1;
506 unsigned WDTPS1 : 1;
507 unsigned WDTPS2 : 1;
508 unsigned WDTPS3 : 1;
509 unsigned : 1;
510 unsigned : 1;
511 unsigned : 1;
512 };
513
514 struct
515 {
516 unsigned : 1;
517 unsigned WDTPS : 4;
518 unsigned : 3;
519 };
520 } __WDTCONbits_t;
521
522 extern __at(0x0018) volatile __WDTCONbits_t WDTCONbits;
523
524 #define _SWDTEN 0x01
525 #define _WDTPS0 0x02
526 #define _WDTPS1 0x04
527 #define _WDTPS2 0x08
528 #define _WDTPS3 0x10
529
530 //==============================================================================
531
532 extern __at(0x001E) __sfr ADRESH;
533
534 //==============================================================================
535 // ADCON0 Bits
536
537 extern __at(0x001F) __sfr ADCON0;
538
539 typedef union
540 {
541 struct
542 {
543 unsigned ADON : 1;
544 unsigned GO_NOT_DONE : 1;
545 unsigned CHS0 : 1;
546 unsigned CHS1 : 1;
547 unsigned CHS2 : 1;
548 unsigned CHS3 : 1;
549 unsigned VCFG : 1;
550 unsigned ADFM : 1;
551 };
552
553 struct
554 {
555 unsigned : 1;
556 unsigned GO : 1;
557 unsigned : 1;
558 unsigned : 1;
559 unsigned : 1;
560 unsigned : 1;
561 unsigned : 1;
562 unsigned : 1;
563 };
564
565 struct
566 {
567 unsigned : 1;
568 unsigned NOT_DONE : 1;
569 unsigned : 1;
570 unsigned : 1;
571 unsigned : 1;
572 unsigned : 1;
573 unsigned : 1;
574 unsigned : 1;
575 };
576
577 struct
578 {
579 unsigned : 1;
580 unsigned GO_DONE : 1;
581 unsigned : 1;
582 unsigned : 1;
583 unsigned : 1;
584 unsigned : 1;
585 unsigned : 1;
586 unsigned : 1;
587 };
588
589 struct
590 {
591 unsigned : 2;
592 unsigned CHS : 4;
593 unsigned : 2;
594 };
595 } __ADCON0bits_t;
596
597 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits;
598
599 #define _ADON 0x01
600 #define _GO_NOT_DONE 0x02
601 #define _GO 0x02
602 #define _NOT_DONE 0x02
603 #define _GO_DONE 0x02
604 #define _CHS0 0x04
605 #define _CHS1 0x08
606 #define _CHS2 0x10
607 #define _CHS3 0x20
608 #define _VCFG 0x40
609 #define _ADFM 0x80
610
611 //==============================================================================
612
613
614 //==============================================================================
615 // OPTION_REG Bits
616
617 extern __at(0x0081) __sfr OPTION_REG;
618
619 typedef union
620 {
621 struct
622 {
623 unsigned PS0 : 1;
624 unsigned PS1 : 1;
625 unsigned PS2 : 1;
626 unsigned PSA : 1;
627 unsigned T0SE : 1;
628 unsigned T0CS : 1;
629 unsigned INTEDG : 1;
630 unsigned NOT_RAPU : 1;
631 };
632
633 struct
634 {
635 unsigned PS : 3;
636 unsigned : 5;
637 };
638 } __OPTION_REGbits_t;
639
640 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
641
642 #define _PS0 0x01
643 #define _PS1 0x02
644 #define _PS2 0x04
645 #define _PSA 0x08
646 #define _T0SE 0x10
647 #define _T0CS 0x20
648 #define _INTEDG 0x40
649 #define _NOT_RAPU 0x80
650
651 //==============================================================================
652
653
654 //==============================================================================
655 // TRISA Bits
656
657 extern __at(0x0085) __sfr TRISA;
658
659 typedef union
660 {
661 struct
662 {
663 unsigned TRISA0 : 1;
664 unsigned TRISA1 : 1;
665 unsigned TRISA2 : 1;
666 unsigned TRISA3 : 1;
667 unsigned TRISA4 : 1;
668 unsigned TRISA5 : 1;
669 unsigned : 1;
670 unsigned : 1;
671 };
672
673 struct
674 {
675 unsigned TRISA : 6;
676 unsigned : 2;
677 };
678 } __TRISAbits_t;
679
680 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
681
682 #define _TRISA0 0x01
683 #define _TRISA1 0x02
684 #define _TRISA2 0x04
685 #define _TRISA3 0x08
686 #define _TRISA4 0x10
687 #define _TRISA5 0x20
688
689 //==============================================================================
690
691
692 //==============================================================================
693 // TRISB Bits
694
695 extern __at(0x0086) __sfr TRISB;
696
697 typedef struct
698 {
699 unsigned : 1;
700 unsigned : 1;
701 unsigned : 1;
702 unsigned : 1;
703 unsigned TRISB4 : 1;
704 unsigned TRISB5 : 1;
705 unsigned TRISB6 : 1;
706 unsigned TRISB7 : 1;
707 } __TRISBbits_t;
708
709 extern __at(0x0086) volatile __TRISBbits_t TRISBbits;
710
711 #define _TRISB4 0x10
712 #define _TRISB5 0x20
713 #define _TRISB6 0x40
714 #define _TRISB7 0x80
715
716 //==============================================================================
717
718
719 //==============================================================================
720 // TRISC Bits
721
722 extern __at(0x0087) __sfr TRISC;
723
724 typedef struct
725 {
726 unsigned TRISC0 : 1;
727 unsigned TRISC1 : 1;
728 unsigned TRISC2 : 1;
729 unsigned TRISC3 : 1;
730 unsigned TRISC4 : 1;
731 unsigned TRISC5 : 1;
732 unsigned TRISC6 : 1;
733 unsigned TRISC7 : 1;
734 } __TRISCbits_t;
735
736 extern __at(0x0087) volatile __TRISCbits_t TRISCbits;
737
738 #define _TRISC0 0x01
739 #define _TRISC1 0x02
740 #define _TRISC2 0x04
741 #define _TRISC3 0x08
742 #define _TRISC4 0x10
743 #define _TRISC5 0x20
744 #define _TRISC6 0x40
745 #define _TRISC7 0x80
746
747 //==============================================================================
748
749
750 //==============================================================================
751 // PIE1 Bits
752
753 extern __at(0x008C) __sfr PIE1;
754
755 typedef union
756 {
757 struct
758 {
759 unsigned TMR1IE : 1;
760 unsigned TMR2IE : 1;
761 unsigned OSFIE : 1;
762 unsigned C1IE : 1;
763 unsigned C2IE : 1;
764 unsigned CCP1IE : 1;
765 unsigned ADIE : 1;
766 unsigned EEIE : 1;
767 };
768
769 struct
770 {
771 unsigned T1IE : 1;
772 unsigned T2IE : 1;
773 unsigned : 1;
774 unsigned : 1;
775 unsigned : 1;
776 unsigned : 1;
777 unsigned : 1;
778 unsigned : 1;
779 };
780 } __PIE1bits_t;
781
782 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
783
784 #define _TMR1IE 0x01
785 #define _T1IE 0x01
786 #define _TMR2IE 0x02
787 #define _T2IE 0x02
788 #define _OSFIE 0x04
789 #define _C1IE 0x08
790 #define _C2IE 0x10
791 #define _CCP1IE 0x20
792 #define _ADIE 0x40
793 #define _EEIE 0x80
794
795 //==============================================================================
796
797
798 //==============================================================================
799 // PCON Bits
800
801 extern __at(0x008E) __sfr PCON;
802
803 typedef union
804 {
805 struct
806 {
807 unsigned NOT_BOR : 1;
808 unsigned NOT_POR : 1;
809 unsigned : 1;
810 unsigned : 1;
811 unsigned SBOREN : 1;
812 unsigned : 1;
813 unsigned : 1;
814 unsigned : 1;
815 };
816
817 struct
818 {
819 unsigned NOT_BOD : 1;
820 unsigned : 1;
821 unsigned : 1;
822 unsigned : 1;
823 unsigned SBODEN : 1;
824 unsigned : 1;
825 unsigned : 1;
826 unsigned : 1;
827 };
828 } __PCONbits_t;
829
830 extern __at(0x008E) volatile __PCONbits_t PCONbits;
831
832 #define _NOT_BOR 0x01
833 #define _NOT_BOD 0x01
834 #define _NOT_POR 0x02
835 #define _SBOREN 0x10
836 #define _SBODEN 0x10
837
838 //==============================================================================
839
840
841 //==============================================================================
842 // OSCCON Bits
843
844 extern __at(0x008F) __sfr OSCCON;
845
846 typedef union
847 {
848 struct
849 {
850 unsigned SCS : 1;
851 unsigned LTS : 1;
852 unsigned HTS : 1;
853 unsigned OSTS : 1;
854 unsigned IRCF0 : 1;
855 unsigned IRCF1 : 1;
856 unsigned IRCF2 : 1;
857 unsigned : 1;
858 };
859
860 struct
861 {
862 unsigned : 4;
863 unsigned IRCF : 3;
864 unsigned : 1;
865 };
866 } __OSCCONbits_t;
867
868 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits;
869
870 #define _SCS 0x01
871 #define _LTS 0x02
872 #define _HTS 0x04
873 #define _OSTS 0x08
874 #define _IRCF0 0x10
875 #define _IRCF1 0x20
876 #define _IRCF2 0x40
877
878 //==============================================================================
879
880
881 //==============================================================================
882 // OSCTUNE Bits
883
884 extern __at(0x0090) __sfr OSCTUNE;
885
886 typedef union
887 {
888 struct
889 {
890 unsigned TUN0 : 1;
891 unsigned TUN1 : 1;
892 unsigned TUN2 : 1;
893 unsigned TUN3 : 1;
894 unsigned TUN4 : 1;
895 unsigned : 1;
896 unsigned : 1;
897 unsigned : 1;
898 };
899
900 struct
901 {
902 unsigned TUN : 5;
903 unsigned : 3;
904 };
905 } __OSCTUNEbits_t;
906
907 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits;
908
909 #define _TUN0 0x01
910 #define _TUN1 0x02
911 #define _TUN2 0x04
912 #define _TUN3 0x08
913 #define _TUN4 0x10
914
915 //==============================================================================
916
917
918 //==============================================================================
919 // ANSEL Bits
920
921 extern __at(0x0091) __sfr ANSEL;
922
923 typedef struct
924 {
925 unsigned ANS0 : 1;
926 unsigned ANS1 : 1;
927 unsigned ANS2 : 1;
928 unsigned ANS3 : 1;
929 unsigned ANS4 : 1;
930 unsigned ANS5 : 1;
931 unsigned ANS6 : 1;
932 unsigned ANS7 : 1;
933 } __ANSELbits_t;
934
935 extern __at(0x0091) volatile __ANSELbits_t ANSELbits;
936
937 #define _ANS0 0x01
938 #define _ANS1 0x02
939 #define _ANS2 0x04
940 #define _ANS3 0x08
941 #define _ANS4 0x10
942 #define _ANS5 0x20
943 #define _ANS6 0x40
944 #define _ANS7 0x80
945
946 //==============================================================================
947
948
949 //==============================================================================
950 // ANSEL0 Bits
951
952 extern __at(0x0091) __sfr ANSEL0;
953
954 typedef struct
955 {
956 unsigned ANS0 : 1;
957 unsigned ANS1 : 1;
958 unsigned ANS2 : 1;
959 unsigned ANS3 : 1;
960 unsigned ANS4 : 1;
961 unsigned ANS5 : 1;
962 unsigned ANS6 : 1;
963 unsigned ANS7 : 1;
964 } __ANSEL0bits_t;
965
966 extern __at(0x0091) volatile __ANSEL0bits_t ANSEL0bits;
967
968 #define _ANSEL0_ANS0 0x01
969 #define _ANSEL0_ANS1 0x02
970 #define _ANSEL0_ANS2 0x04
971 #define _ANSEL0_ANS3 0x08
972 #define _ANSEL0_ANS4 0x10
973 #define _ANSEL0_ANS5 0x20
974 #define _ANSEL0_ANS6 0x40
975 #define _ANSEL0_ANS7 0x80
976
977 //==============================================================================
978
979 extern __at(0x0092) __sfr PR2;
980
981 //==============================================================================
982 // ANSEL1 Bits
983
984 extern __at(0x0093) __sfr ANSEL1;
985
986 typedef struct
987 {
988 unsigned ANS8 : 1;
989 unsigned ANS9 : 1;
990 unsigned ANS10 : 1;
991 unsigned ANS11 : 1;
992 unsigned : 1;
993 unsigned : 1;
994 unsigned : 1;
995 unsigned : 1;
996 } __ANSEL1bits_t;
997
998 extern __at(0x0093) volatile __ANSEL1bits_t ANSEL1bits;
999
1000 #define _ANS8 0x01
1001 #define _ANS9 0x02
1002 #define _ANS10 0x04
1003 #define _ANS11 0x08
1004
1005 //==============================================================================
1006
1007
1008 //==============================================================================
1009 // WPU Bits
1010
1011 extern __at(0x0095) __sfr WPU;
1012
1013 typedef union
1014 {
1015 struct
1016 {
1017 unsigned WPUA0 : 1;
1018 unsigned WPUA1 : 1;
1019 unsigned WPUA2 : 1;
1020 unsigned WPUA3 : 1;
1021 unsigned WPUA4 : 1;
1022 unsigned WPUA5 : 1;
1023 unsigned : 1;
1024 unsigned : 1;
1025 };
1026
1027 struct
1028 {
1029 unsigned WPU0 : 1;
1030 unsigned WPU1 : 1;
1031 unsigned WPU2 : 1;
1032 unsigned WPU3 : 1;
1033 unsigned WPU4 : 1;
1034 unsigned WPU5 : 1;
1035 unsigned : 1;
1036 unsigned : 1;
1037 };
1038
1039 struct
1040 {
1041 unsigned WPU : 6;
1042 unsigned : 2;
1043 };
1044
1045 struct
1046 {
1047 unsigned WPUA : 6;
1048 unsigned : 2;
1049 };
1050 } __WPUbits_t;
1051
1052 extern __at(0x0095) volatile __WPUbits_t WPUbits;
1053
1054 #define _WPUA0 0x01
1055 #define _WPU0 0x01
1056 #define _WPUA1 0x02
1057 #define _WPU1 0x02
1058 #define _WPUA2 0x04
1059 #define _WPU2 0x04
1060 #define _WPUA3 0x08
1061 #define _WPU3 0x08
1062 #define _WPUA4 0x10
1063 #define _WPU4 0x10
1064 #define _WPUA5 0x20
1065 #define _WPU5 0x20
1066
1067 //==============================================================================
1068
1069
1070 //==============================================================================
1071 // WPUA Bits
1072
1073 extern __at(0x0095) __sfr WPUA;
1074
1075 typedef union
1076 {
1077 struct
1078 {
1079 unsigned WPUA0 : 1;
1080 unsigned WPUA1 : 1;
1081 unsigned WPUA2 : 1;
1082 unsigned WPUA3 : 1;
1083 unsigned WPUA4 : 1;
1084 unsigned WPUA5 : 1;
1085 unsigned : 1;
1086 unsigned : 1;
1087 };
1088
1089 struct
1090 {
1091 unsigned WPU0 : 1;
1092 unsigned WPU1 : 1;
1093 unsigned WPU2 : 1;
1094 unsigned WPU3 : 1;
1095 unsigned WPU4 : 1;
1096 unsigned WPU5 : 1;
1097 unsigned : 1;
1098 unsigned : 1;
1099 };
1100
1101 struct
1102 {
1103 unsigned WPUA : 6;
1104 unsigned : 2;
1105 };
1106
1107 struct
1108 {
1109 unsigned WPU : 6;
1110 unsigned : 2;
1111 };
1112 } __WPUAbits_t;
1113
1114 extern __at(0x0095) volatile __WPUAbits_t WPUAbits;
1115
1116 #define _WPUA_WPUA0 0x01
1117 #define _WPUA_WPU0 0x01
1118 #define _WPUA_WPUA1 0x02
1119 #define _WPUA_WPU1 0x02
1120 #define _WPUA_WPUA2 0x04
1121 #define _WPUA_WPU2 0x04
1122 #define _WPUA_WPUA3 0x08
1123 #define _WPUA_WPU3 0x08
1124 #define _WPUA_WPUA4 0x10
1125 #define _WPUA_WPU4 0x10
1126 #define _WPUA_WPUA5 0x20
1127 #define _WPUA_WPU5 0x20
1128
1129 //==============================================================================
1130
1131
1132 //==============================================================================
1133 // IOC Bits
1134
1135 extern __at(0x0096) __sfr IOC;
1136
1137 typedef union
1138 {
1139 struct
1140 {
1141 unsigned IOCA0 : 1;
1142 unsigned IOCA1 : 1;
1143 unsigned IOCA2 : 1;
1144 unsigned IOCA3 : 1;
1145 unsigned IOCA4 : 1;
1146 unsigned IOCA5 : 1;
1147 unsigned : 1;
1148 unsigned : 1;
1149 };
1150
1151 struct
1152 {
1153 unsigned IOC0 : 1;
1154 unsigned IOC1 : 1;
1155 unsigned IOC2 : 1;
1156 unsigned IOC3 : 1;
1157 unsigned IOC4 : 1;
1158 unsigned IOC5 : 1;
1159 unsigned : 1;
1160 unsigned : 1;
1161 };
1162
1163 struct
1164 {
1165 unsigned IOC : 6;
1166 unsigned : 2;
1167 };
1168
1169 struct
1170 {
1171 unsigned IOCA : 6;
1172 unsigned : 2;
1173 };
1174 } __IOCbits_t;
1175
1176 extern __at(0x0096) volatile __IOCbits_t IOCbits;
1177
1178 #define _IOCA0 0x01
1179 #define _IOC0 0x01
1180 #define _IOCA1 0x02
1181 #define _IOC1 0x02
1182 #define _IOCA2 0x04
1183 #define _IOC2 0x04
1184 #define _IOCA3 0x08
1185 #define _IOC3 0x08
1186 #define _IOCA4 0x10
1187 #define _IOC4 0x10
1188 #define _IOCA5 0x20
1189 #define _IOC5 0x20
1190
1191 //==============================================================================
1192
1193
1194 //==============================================================================
1195 // IOCA Bits
1196
1197 extern __at(0x0096) __sfr IOCA;
1198
1199 typedef union
1200 {
1201 struct
1202 {
1203 unsigned IOCA0 : 1;
1204 unsigned IOCA1 : 1;
1205 unsigned IOCA2 : 1;
1206 unsigned IOCA3 : 1;
1207 unsigned IOCA4 : 1;
1208 unsigned IOCA5 : 1;
1209 unsigned : 1;
1210 unsigned : 1;
1211 };
1212
1213 struct
1214 {
1215 unsigned IOC0 : 1;
1216 unsigned IOC1 : 1;
1217 unsigned IOC2 : 1;
1218 unsigned IOC3 : 1;
1219 unsigned IOC4 : 1;
1220 unsigned IOC5 : 1;
1221 unsigned : 1;
1222 unsigned : 1;
1223 };
1224
1225 struct
1226 {
1227 unsigned IOCA : 6;
1228 unsigned : 2;
1229 };
1230
1231 struct
1232 {
1233 unsigned IOC : 6;
1234 unsigned : 2;
1235 };
1236 } __IOCAbits_t;
1237
1238 extern __at(0x0096) volatile __IOCAbits_t IOCAbits;
1239
1240 #define _IOCA_IOCA0 0x01
1241 #define _IOCA_IOC0 0x01
1242 #define _IOCA_IOCA1 0x02
1243 #define _IOCA_IOC1 0x02
1244 #define _IOCA_IOCA2 0x04
1245 #define _IOCA_IOC2 0x04
1246 #define _IOCA_IOCA3 0x08
1247 #define _IOCA_IOC3 0x08
1248 #define _IOCA_IOCA4 0x10
1249 #define _IOCA_IOC4 0x10
1250 #define _IOCA_IOCA5 0x20
1251 #define _IOCA_IOC5 0x20
1252
1253 //==============================================================================
1254
1255
1256 //==============================================================================
1257 // REFCON Bits
1258
1259 extern __at(0x0098) __sfr REFCON;
1260
1261 typedef struct
1262 {
1263 unsigned : 1;
1264 unsigned CVROE : 1;
1265 unsigned VROE : 1;
1266 unsigned VREN : 1;
1267 unsigned VRBB : 1;
1268 unsigned BGST : 1;
1269 unsigned : 1;
1270 unsigned : 1;
1271 } __REFCONbits_t;
1272
1273 extern __at(0x0098) volatile __REFCONbits_t REFCONbits;
1274
1275 #define _CVROE 0x02
1276 #define _VROE 0x04
1277 #define _VREN 0x08
1278 #define _VRBB 0x10
1279 #define _BGST 0x20
1280
1281 //==============================================================================
1282
1283
1284 //==============================================================================
1285 // VRCON Bits
1286
1287 extern __at(0x0099) __sfr VRCON;
1288
1289 typedef union
1290 {
1291 struct
1292 {
1293 unsigned VR0 : 1;
1294 unsigned VR1 : 1;
1295 unsigned VR2 : 1;
1296 unsigned VR3 : 1;
1297 unsigned : 1;
1298 unsigned VRR : 1;
1299 unsigned C2VREN : 1;
1300 unsigned C1VREN : 1;
1301 };
1302
1303 struct
1304 {
1305 unsigned VR : 4;
1306 unsigned : 4;
1307 };
1308 } __VRCONbits_t;
1309
1310 extern __at(0x0099) volatile __VRCONbits_t VRCONbits;
1311
1312 #define _VR0 0x01
1313 #define _VR1 0x02
1314 #define _VR2 0x04
1315 #define _VR3 0x08
1316 #define _VRR 0x20
1317 #define _C2VREN 0x40
1318 #define _C1VREN 0x80
1319
1320 //==============================================================================
1321
1322 extern __at(0x009A) __sfr EEDAT;
1323 extern __at(0x009A) __sfr EEDATA;
1324 extern __at(0x009B) __sfr EEADR;
1325
1326 //==============================================================================
1327 // EECON1 Bits
1328
1329 extern __at(0x009C) __sfr EECON1;
1330
1331 typedef struct
1332 {
1333 unsigned RD : 1;
1334 unsigned WR : 1;
1335 unsigned WREN : 1;
1336 unsigned WRERR : 1;
1337 unsigned : 1;
1338 unsigned : 1;
1339 unsigned : 1;
1340 unsigned : 1;
1341 } __EECON1bits_t;
1342
1343 extern __at(0x009C) volatile __EECON1bits_t EECON1bits;
1344
1345 #define _RD 0x01
1346 #define _WR 0x02
1347 #define _WREN 0x04
1348 #define _WRERR 0x08
1349
1350 //==============================================================================
1351
1352 extern __at(0x009D) __sfr EECON2;
1353 extern __at(0x009E) __sfr ADRESL;
1354
1355 //==============================================================================
1356 // ADCON1 Bits
1357
1358 extern __at(0x009F) __sfr ADCON1;
1359
1360 typedef union
1361 {
1362 struct
1363 {
1364 unsigned : 1;
1365 unsigned : 1;
1366 unsigned : 1;
1367 unsigned : 1;
1368 unsigned ADCS0 : 1;
1369 unsigned ADCS1 : 1;
1370 unsigned ADCS2 : 1;
1371 unsigned : 1;
1372 };
1373
1374 struct
1375 {
1376 unsigned : 4;
1377 unsigned ADCS : 3;
1378 unsigned : 1;
1379 };
1380 } __ADCON1bits_t;
1381
1382 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits;
1383
1384 #define _ADCS0 0x10
1385 #define _ADCS1 0x20
1386 #define _ADCS2 0x40
1387
1388 //==============================================================================
1389
1390
1391 //==============================================================================
1392 // PWMCON1 Bits
1393
1394 extern __at(0x0110) __sfr PWMCON1;
1395
1396 typedef union
1397 {
1398 struct
1399 {
1400 unsigned CMDLY0 : 1;
1401 unsigned CMDLY1 : 1;
1402 unsigned CMDLY2 : 1;
1403 unsigned CMDLY3 : 1;
1404 unsigned CMDLY4 : 1;
1405 unsigned COMOD0 : 1;
1406 unsigned COMOD1 : 1;
1407 unsigned OVRLP : 1;
1408 };
1409
1410 struct
1411 {
1412 unsigned CMDLY : 5;
1413 unsigned : 3;
1414 };
1415
1416 struct
1417 {
1418 unsigned : 5;
1419 unsigned COMOD : 2;
1420 unsigned : 1;
1421 };
1422 } __PWMCON1bits_t;
1423
1424 extern __at(0x0110) volatile __PWMCON1bits_t PWMCON1bits;
1425
1426 #define _CMDLY0 0x01
1427 #define _CMDLY1 0x02
1428 #define _CMDLY2 0x04
1429 #define _CMDLY3 0x08
1430 #define _CMDLY4 0x10
1431 #define _COMOD0 0x20
1432 #define _COMOD1 0x40
1433 #define _OVRLP 0x80
1434
1435 //==============================================================================
1436
1437
1438 //==============================================================================
1439 // PWMCON0 Bits
1440
1441 extern __at(0x0111) __sfr PWMCON0;
1442
1443 typedef union
1444 {
1445 struct
1446 {
1447 unsigned PH1EN : 1;
1448 unsigned PH2EN : 1;
1449 unsigned SYNC0 : 1;
1450 unsigned SYNC1 : 1;
1451 unsigned BLANK1 : 1;
1452 unsigned BLANK2 : 1;
1453 unsigned PASEN : 1;
1454 unsigned PRSEN : 1;
1455 };
1456
1457 struct
1458 {
1459 unsigned : 2;
1460 unsigned SYNC : 2;
1461 unsigned : 4;
1462 };
1463 } __PWMCON0bits_t;
1464
1465 extern __at(0x0111) volatile __PWMCON0bits_t PWMCON0bits;
1466
1467 #define _PH1EN 0x01
1468 #define _PH2EN 0x02
1469 #define _SYNC0 0x04
1470 #define _SYNC1 0x08
1471 #define _BLANK1 0x10
1472 #define _BLANK2 0x20
1473 #define _PASEN 0x40
1474 #define _PRSEN 0x80
1475
1476 //==============================================================================
1477
1478
1479 //==============================================================================
1480 // PWMCLK Bits
1481
1482 extern __at(0x0112) __sfr PWMCLK;
1483
1484 typedef union
1485 {
1486 struct
1487 {
1488 unsigned PER0 : 1;
1489 unsigned PER1 : 1;
1490 unsigned PER2 : 1;
1491 unsigned PER3 : 1;
1492 unsigned PER4 : 1;
1493 unsigned PWMP0 : 1;
1494 unsigned PWMP1 : 1;
1495 unsigned PWMASE : 1;
1496 };
1497
1498 struct
1499 {
1500 unsigned PER : 5;
1501 unsigned : 3;
1502 };
1503
1504 struct
1505 {
1506 unsigned : 5;
1507 unsigned PWMP : 2;
1508 unsigned : 1;
1509 };
1510 } __PWMCLKbits_t;
1511
1512 extern __at(0x0112) volatile __PWMCLKbits_t PWMCLKbits;
1513
1514 #define _PER0 0x01
1515 #define _PER1 0x02
1516 #define _PER2 0x04
1517 #define _PER3 0x08
1518 #define _PER4 0x10
1519 #define _PWMP0 0x20
1520 #define _PWMP1 0x40
1521 #define _PWMASE 0x80
1522
1523 //==============================================================================
1524
1525
1526 //==============================================================================
1527 // PWMPH1 Bits
1528
1529 extern __at(0x0113) __sfr PWMPH1;
1530
1531 typedef union
1532 {
1533 struct
1534 {
1535 unsigned PH0 : 1;
1536 unsigned PH1 : 1;
1537 unsigned PH2 : 1;
1538 unsigned PH3 : 1;
1539 unsigned PH4 : 1;
1540 unsigned C1EN : 1;
1541 unsigned C2EN : 1;
1542 unsigned POL : 1;
1543 };
1544
1545 struct
1546 {
1547 unsigned PH : 5;
1548 unsigned : 3;
1549 };
1550 } __PWMPH1bits_t;
1551
1552 extern __at(0x0113) volatile __PWMPH1bits_t PWMPH1bits;
1553
1554 #define _PH0 0x01
1555 #define _PH1 0x02
1556 #define _PH2 0x04
1557 #define _PH3 0x08
1558 #define _PH4 0x10
1559 #define _C1EN 0x20
1560 #define _C2EN 0x40
1561 #define _POL 0x80
1562
1563 //==============================================================================
1564
1565
1566 //==============================================================================
1567 // PWMPH2 Bits
1568
1569 extern __at(0x0114) __sfr PWMPH2;
1570
1571 typedef union
1572 {
1573 struct
1574 {
1575 unsigned PH0 : 1;
1576 unsigned PH1 : 1;
1577 unsigned PH2 : 1;
1578 unsigned PH3 : 1;
1579 unsigned PH4 : 1;
1580 unsigned C1EN : 1;
1581 unsigned C2EN : 1;
1582 unsigned POL : 1;
1583 };
1584
1585 struct
1586 {
1587 unsigned PH : 5;
1588 unsigned : 3;
1589 };
1590 } __PWMPH2bits_t;
1591
1592 extern __at(0x0114) volatile __PWMPH2bits_t PWMPH2bits;
1593
1594 #define _PWMPH2_PH0 0x01
1595 #define _PWMPH2_PH1 0x02
1596 #define _PWMPH2_PH2 0x04
1597 #define _PWMPH2_PH3 0x08
1598 #define _PWMPH2_PH4 0x10
1599 #define _PWMPH2_C1EN 0x20
1600 #define _PWMPH2_C2EN 0x40
1601 #define _PWMPH2_POL 0x80
1602
1603 //==============================================================================
1604
1605
1606 //==============================================================================
1607 // CM1CON0 Bits
1608
1609 extern __at(0x0119) __sfr CM1CON0;
1610
1611 typedef union
1612 {
1613 struct
1614 {
1615 unsigned C1CH0 : 1;
1616 unsigned C1CH1 : 1;
1617 unsigned C1R : 1;
1618 unsigned C1SP : 1;
1619 unsigned C1POL : 1;
1620 unsigned C1OE : 1;
1621 unsigned C1OUT : 1;
1622 unsigned C1ON : 1;
1623 };
1624
1625 struct
1626 {
1627 unsigned C1CH : 2;
1628 unsigned : 6;
1629 };
1630 } __CM1CON0bits_t;
1631
1632 extern __at(0x0119) volatile __CM1CON0bits_t CM1CON0bits;
1633
1634 #define _C1CH0 0x01
1635 #define _C1CH1 0x02
1636 #define _C1R 0x04
1637 #define _C1SP 0x08
1638 #define _C1POL 0x10
1639 #define _C1OE 0x20
1640 #define _C1OUT 0x40
1641 #define _C1ON 0x80
1642
1643 //==============================================================================
1644
1645
1646 //==============================================================================
1647 // CM2CON0 Bits
1648
1649 extern __at(0x011A) __sfr CM2CON0;
1650
1651 typedef union
1652 {
1653 struct
1654 {
1655 unsigned C2CH0 : 1;
1656 unsigned C2CH1 : 1;
1657 unsigned C2R : 1;
1658 unsigned C2SP : 1;
1659 unsigned C2POL : 1;
1660 unsigned C2OE : 1;
1661 unsigned C2OUT : 1;
1662 unsigned C2ON : 1;
1663 };
1664
1665 struct
1666 {
1667 unsigned C2CH : 2;
1668 unsigned : 6;
1669 };
1670 } __CM2CON0bits_t;
1671
1672 extern __at(0x011A) volatile __CM2CON0bits_t CM2CON0bits;
1673
1674 #define _C2CH0 0x01
1675 #define _C2CH1 0x02
1676 #define _C2R 0x04
1677 #define _C2SP 0x08
1678 #define _C2POL 0x10
1679 #define _C2OE 0x20
1680 #define _C2OUT 0x40
1681 #define _C2ON 0x80
1682
1683 //==============================================================================
1684
1685
1686 //==============================================================================
1687 // CM2CON1 Bits
1688
1689 extern __at(0x011B) __sfr CM2CON1;
1690
1691 typedef struct
1692 {
1693 unsigned C2SYNC : 1;
1694 unsigned T1GSS : 1;
1695 unsigned : 1;
1696 unsigned : 1;
1697 unsigned : 1;
1698 unsigned : 1;
1699 unsigned MC2OUT : 1;
1700 unsigned MC1OUT : 1;
1701 } __CM2CON1bits_t;
1702
1703 extern __at(0x011B) volatile __CM2CON1bits_t CM2CON1bits;
1704
1705 #define _C2SYNC 0x01
1706 #define _T1GSS 0x02
1707 #define _MC2OUT 0x40
1708 #define _MC1OUT 0x80
1709
1710 //==============================================================================
1711
1712
1713 //==============================================================================
1714 // OPA1CON Bits
1715
1716 extern __at(0x011C) __sfr OPA1CON;
1717
1718 typedef struct
1719 {
1720 unsigned : 1;
1721 unsigned : 1;
1722 unsigned : 1;
1723 unsigned : 1;
1724 unsigned : 1;
1725 unsigned : 1;
1726 unsigned : 1;
1727 unsigned OPAON : 1;
1728 } __OPA1CONbits_t;
1729
1730 extern __at(0x011C) volatile __OPA1CONbits_t OPA1CONbits;
1731
1732 #define _OPAON 0x80
1733
1734 //==============================================================================
1735
1736
1737 //==============================================================================
1738 // OPA2CON Bits
1739
1740 extern __at(0x011D) __sfr OPA2CON;
1741
1742 typedef struct
1743 {
1744 unsigned : 1;
1745 unsigned : 1;
1746 unsigned : 1;
1747 unsigned : 1;
1748 unsigned : 1;
1749 unsigned : 1;
1750 unsigned : 1;
1751 unsigned OPAON : 1;
1752 } __OPA2CONbits_t;
1753
1754 extern __at(0x011D) volatile __OPA2CONbits_t OPA2CONbits;
1755
1756 #define _OPA2CON_OPAON 0x80
1757
1758 //==============================================================================
1759
1760
1761 //==============================================================================
1762 //
1763 // Configuration Bits
1764 //
1765 //==============================================================================
1766
1767 #define _CONFIG 0x2007
1768
1769 //----------------------------- CONFIG Options -------------------------------
1770
1771 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1772 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1773 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT.
1774 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT.
1775 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1776 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1777 #define _FOSC_EC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1778 #define _EC_OSC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1779 #define _FOSC_INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1780 #define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1781 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1782 #define _FOSC_INTOSCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1783 #define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1784 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1785 #define _FOSC_EXTRCIO 0x3FFE // EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin.
1786 #define _EXTRCIO 0x3FFE // EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin.
1787 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin.
1788 #define _FOSC_EXTRCCLK 0x3FFF // EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin.
1789 #define _EXTRC 0x3FFF // EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin.
1790 #define _EXTRC_OSC_CLKOUT 0x3FFF // EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin.
1791 #define _WDTE_OFF 0x3FF7 // WDT disabled.
1792 #define _WDT_OFF 0x3FF7 // WDT disabled.
1793 #define _WDTE_ON 0x3FFF // WDT enabled.
1794 #define _WDT_ON 0x3FFF // WDT enabled.
1795 #define _PWRTE_ON 0x3FEF // PWRT enabled.
1796 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1797 #define _MCLRE_OFF 0x3FDF // MCLR pin function is digital input, MCLR internally tied to VDD.
1798 #define _MCLRE_ON 0x3FFF // MCLR pin function is MCLR.
1799 #define _CP_ON 0x3FBF // Program memory code protection is enabled.
1800 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
1801 #define _CPD_ON 0x3F7F // Data memory code protection is enabled.
1802 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
1803 #define _BOREN_OFF 0x3CFF // BOR disabled.
1804 #define _BOD_OFF 0x3CFF // BOR disabled.
1805 #define _BOR_OFF 0x3CFF // BOR disabled.
1806 #define _BOREN_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1807 #define _BOR_SBOREN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1808 #define _BOD_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1809 #define _BOR_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1810 #define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1811 #define _BOD_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1812 #define _BOR_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1813 #define _BOREN_ON 0x3FFF // BOR enabled.
1814 #define _BOD_ON 0x3FFF // BOR enabled.
1815 #define _BOR_ON 0x3FFF // BOR enabled.
1816 #define _IESO_OFF 0x3BFF // Internal External Switchover mode is disabled.
1817 #define _IESO_ON 0x3FFF // Internal External Switchover mode is enabled.
1818 #define _FCMEN_OFF 0x37FF // Fail-Safe Clock Monitor is disabled.
1819 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
1820
1821 //==============================================================================
1822
1823 #define _DEVID1 0x2006
1824
1825 #define _IDLOC0 0x2000
1826 #define _IDLOC1 0x2001
1827 #define _IDLOC2 0x2002
1828 #define _IDLOC3 0x2003
1829
1830 //==============================================================================
1831
1832 #ifndef NO_BIT_DEFINES
1833
1834 #define ADON ADCON0bits.ADON // bit 0
1835 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
1836 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
1837 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
1838 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
1839 #define CHS0 ADCON0bits.CHS0 // bit 2
1840 #define CHS1 ADCON0bits.CHS1 // bit 3
1841 #define CHS2 ADCON0bits.CHS2 // bit 4
1842 #define CHS3 ADCON0bits.CHS3 // bit 5
1843 #define VCFG ADCON0bits.VCFG // bit 6
1844 #define ADFM ADCON0bits.ADFM // bit 7
1845
1846 #define ADCS0 ADCON1bits.ADCS0 // bit 4
1847 #define ADCS1 ADCON1bits.ADCS1 // bit 5
1848 #define ADCS2 ADCON1bits.ADCS2 // bit 6
1849
1850 #define ANS0 ANSELbits.ANS0 // bit 0
1851 #define ANS1 ANSELbits.ANS1 // bit 1
1852 #define ANS2 ANSELbits.ANS2 // bit 2
1853 #define ANS3 ANSELbits.ANS3 // bit 3
1854 #define ANS4 ANSELbits.ANS4 // bit 4
1855 #define ANS5 ANSELbits.ANS5 // bit 5
1856 #define ANS6 ANSELbits.ANS6 // bit 6
1857 #define ANS7 ANSELbits.ANS7 // bit 7
1858
1859 #define ANS8 ANSEL1bits.ANS8 // bit 0
1860 #define ANS9 ANSEL1bits.ANS9 // bit 1
1861 #define ANS10 ANSEL1bits.ANS10 // bit 2
1862 #define ANS11 ANSEL1bits.ANS11 // bit 3
1863
1864 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1865 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1866 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1867 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1868 #define DC1B0 CCP1CONbits.DC1B0 // bit 4
1869 #define DC1B1 CCP1CONbits.DC1B1 // bit 5
1870
1871 #define C1CH0 CM1CON0bits.C1CH0 // bit 0
1872 #define C1CH1 CM1CON0bits.C1CH1 // bit 1
1873 #define C1R CM1CON0bits.C1R // bit 2
1874 #define C1SP CM1CON0bits.C1SP // bit 3
1875 #define C1POL CM1CON0bits.C1POL // bit 4
1876 #define C1OE CM1CON0bits.C1OE // bit 5
1877 #define C1OUT CM1CON0bits.C1OUT // bit 6
1878 #define C1ON CM1CON0bits.C1ON // bit 7
1879
1880 #define C2CH0 CM2CON0bits.C2CH0 // bit 0
1881 #define C2CH1 CM2CON0bits.C2CH1 // bit 1
1882 #define C2R CM2CON0bits.C2R // bit 2
1883 #define C2SP CM2CON0bits.C2SP // bit 3
1884 #define C2POL CM2CON0bits.C2POL // bit 4
1885 #define C2OE CM2CON0bits.C2OE // bit 5
1886 #define C2OUT CM2CON0bits.C2OUT // bit 6
1887 #define C2ON CM2CON0bits.C2ON // bit 7
1888
1889 #define C2SYNC CM2CON1bits.C2SYNC // bit 0
1890 #define T1GSS CM2CON1bits.T1GSS // bit 1
1891 #define MC2OUT CM2CON1bits.MC2OUT // bit 6
1892 #define MC1OUT CM2CON1bits.MC1OUT // bit 7
1893
1894 #define RD EECON1bits.RD // bit 0
1895 #define WR EECON1bits.WR // bit 1
1896 #define WREN EECON1bits.WREN // bit 2
1897 #define WRERR EECON1bits.WRERR // bit 3
1898
1899 #define RAIF INTCONbits.RAIF // bit 0
1900 #define INTF INTCONbits.INTF // bit 1
1901 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
1902 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
1903 #define RAIE INTCONbits.RAIE // bit 3
1904 #define INTE INTCONbits.INTE // bit 4
1905 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
1906 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
1907 #define PEIE INTCONbits.PEIE // bit 6
1908 #define GIE INTCONbits.GIE // bit 7
1909
1910 #define IOCA0 IOCbits.IOCA0 // bit 0, shadows bit in IOCbits
1911 #define IOC0 IOCbits.IOC0 // bit 0, shadows bit in IOCbits
1912 #define IOCA1 IOCbits.IOCA1 // bit 1, shadows bit in IOCbits
1913 #define IOC1 IOCbits.IOC1 // bit 1, shadows bit in IOCbits
1914 #define IOCA2 IOCbits.IOCA2 // bit 2, shadows bit in IOCbits
1915 #define IOC2 IOCbits.IOC2 // bit 2, shadows bit in IOCbits
1916 #define IOCA3 IOCbits.IOCA3 // bit 3, shadows bit in IOCbits
1917 #define IOC3 IOCbits.IOC3 // bit 3, shadows bit in IOCbits
1918 #define IOCA4 IOCbits.IOCA4 // bit 4, shadows bit in IOCbits
1919 #define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits
1920 #define IOCA5 IOCbits.IOCA5 // bit 5, shadows bit in IOCbits
1921 #define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits
1922
1923 #define OPAON OPA1CONbits.OPAON // bit 7
1924
1925 #define PS0 OPTION_REGbits.PS0 // bit 0
1926 #define PS1 OPTION_REGbits.PS1 // bit 1
1927 #define PS2 OPTION_REGbits.PS2 // bit 2
1928 #define PSA OPTION_REGbits.PSA // bit 3
1929 #define T0SE OPTION_REGbits.T0SE // bit 4
1930 #define T0CS OPTION_REGbits.T0CS // bit 5
1931 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1932 #define NOT_RAPU OPTION_REGbits.NOT_RAPU // bit 7
1933
1934 #define SCS OSCCONbits.SCS // bit 0
1935 #define LTS OSCCONbits.LTS // bit 1
1936 #define HTS OSCCONbits.HTS // bit 2
1937 #define OSTS OSCCONbits.OSTS // bit 3
1938 #define IRCF0 OSCCONbits.IRCF0 // bit 4
1939 #define IRCF1 OSCCONbits.IRCF1 // bit 5
1940 #define IRCF2 OSCCONbits.IRCF2 // bit 6
1941
1942 #define TUN0 OSCTUNEbits.TUN0 // bit 0
1943 #define TUN1 OSCTUNEbits.TUN1 // bit 1
1944 #define TUN2 OSCTUNEbits.TUN2 // bit 2
1945 #define TUN3 OSCTUNEbits.TUN3 // bit 3
1946 #define TUN4 OSCTUNEbits.TUN4 // bit 4
1947
1948 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1949 #define NOT_BOD PCONbits.NOT_BOD // bit 0, shadows bit in PCONbits
1950 #define NOT_POR PCONbits.NOT_POR // bit 1
1951 #define SBOREN PCONbits.SBOREN // bit 4, shadows bit in PCONbits
1952 #define SBODEN PCONbits.SBODEN // bit 4, shadows bit in PCONbits
1953
1954 #define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits
1955 #define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits
1956 #define TMR2IE PIE1bits.TMR2IE // bit 1, shadows bit in PIE1bits
1957 #define T2IE PIE1bits.T2IE // bit 1, shadows bit in PIE1bits
1958 #define OSFIE PIE1bits.OSFIE // bit 2
1959 #define C1IE PIE1bits.C1IE // bit 3
1960 #define C2IE PIE1bits.C2IE // bit 4
1961 #define CCP1IE PIE1bits.CCP1IE // bit 5
1962 #define ADIE PIE1bits.ADIE // bit 6
1963 #define EEIE PIE1bits.EEIE // bit 7
1964
1965 #define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits
1966 #define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits
1967 #define TMR2IF PIR1bits.TMR2IF // bit 1, shadows bit in PIR1bits
1968 #define T2IF PIR1bits.T2IF // bit 1, shadows bit in PIR1bits
1969 #define OSFIF PIR1bits.OSFIF // bit 2
1970 #define C1IF PIR1bits.C1IF // bit 3
1971 #define C2IF PIR1bits.C2IF // bit 4
1972 #define CCP1IF PIR1bits.CCP1IF // bit 5
1973 #define ADIF PIR1bits.ADIF // bit 6
1974 #define EEIF PIR1bits.EEIF // bit 7
1975
1976 #define RA0 PORTAbits.RA0 // bit 0
1977 #define RA1 PORTAbits.RA1 // bit 1
1978 #define RA2 PORTAbits.RA2 // bit 2
1979 #define RA3 PORTAbits.RA3 // bit 3
1980 #define RA4 PORTAbits.RA4 // bit 4
1981 #define RA5 PORTAbits.RA5 // bit 5
1982
1983 #define RB4 PORTBbits.RB4 // bit 4
1984 #define RB5 PORTBbits.RB5 // bit 5
1985 #define RB6 PORTBbits.RB6 // bit 6
1986 #define RB7 PORTBbits.RB7 // bit 7
1987
1988 #define RC0 PORTCbits.RC0 // bit 0
1989 #define RC1 PORTCbits.RC1 // bit 1
1990 #define RC2 PORTCbits.RC2 // bit 2
1991 #define RC3 PORTCbits.RC3 // bit 3
1992 #define RC4 PORTCbits.RC4 // bit 4
1993 #define RC5 PORTCbits.RC5 // bit 5
1994 #define RC6 PORTCbits.RC6 // bit 6
1995 #define RC7 PORTCbits.RC7 // bit 7
1996
1997 #define PER0 PWMCLKbits.PER0 // bit 0
1998 #define PER1 PWMCLKbits.PER1 // bit 1
1999 #define PER2 PWMCLKbits.PER2 // bit 2
2000 #define PER3 PWMCLKbits.PER3 // bit 3
2001 #define PER4 PWMCLKbits.PER4 // bit 4
2002 #define PWMP0 PWMCLKbits.PWMP0 // bit 5
2003 #define PWMP1 PWMCLKbits.PWMP1 // bit 6
2004 #define PWMASE PWMCLKbits.PWMASE // bit 7
2005
2006 #define PH1EN PWMCON0bits.PH1EN // bit 0
2007 #define PH2EN PWMCON0bits.PH2EN // bit 1
2008 #define SYNC0 PWMCON0bits.SYNC0 // bit 2
2009 #define SYNC1 PWMCON0bits.SYNC1 // bit 3
2010 #define BLANK1 PWMCON0bits.BLANK1 // bit 4
2011 #define BLANK2 PWMCON0bits.BLANK2 // bit 5
2012 #define PASEN PWMCON0bits.PASEN // bit 6
2013 #define PRSEN PWMCON0bits.PRSEN // bit 7
2014
2015 #define CMDLY0 PWMCON1bits.CMDLY0 // bit 0
2016 #define CMDLY1 PWMCON1bits.CMDLY1 // bit 1
2017 #define CMDLY2 PWMCON1bits.CMDLY2 // bit 2
2018 #define CMDLY3 PWMCON1bits.CMDLY3 // bit 3
2019 #define CMDLY4 PWMCON1bits.CMDLY4 // bit 4
2020 #define COMOD0 PWMCON1bits.COMOD0 // bit 5
2021 #define COMOD1 PWMCON1bits.COMOD1 // bit 6
2022 #define OVRLP PWMCON1bits.OVRLP // bit 7
2023
2024 #define PH0 PWMPH1bits.PH0 // bit 0
2025 #define PH1 PWMPH1bits.PH1 // bit 1
2026 #define PH2 PWMPH1bits.PH2 // bit 2
2027 #define PH3 PWMPH1bits.PH3 // bit 3
2028 #define PH4 PWMPH1bits.PH4 // bit 4
2029 #define C1EN PWMPH1bits.C1EN // bit 5
2030 #define C2EN PWMPH1bits.C2EN // bit 6
2031 #define POL PWMPH1bits.POL // bit 7
2032
2033 #define CVROE REFCONbits.CVROE // bit 1
2034 #define VROE REFCONbits.VROE // bit 2
2035 #define VREN REFCONbits.VREN // bit 3
2036 #define VRBB REFCONbits.VRBB // bit 4
2037 #define BGST REFCONbits.BGST // bit 5
2038
2039 #define C STATUSbits.C // bit 0
2040 #define DC STATUSbits.DC // bit 1
2041 #define Z STATUSbits.Z // bit 2
2042 #define NOT_PD STATUSbits.NOT_PD // bit 3
2043 #define NOT_TO STATUSbits.NOT_TO // bit 4
2044 #define RP0 STATUSbits.RP0 // bit 5
2045 #define RP1 STATUSbits.RP1 // bit 6
2046 #define IRP STATUSbits.IRP // bit 7
2047
2048 #define TMR1ON T1CONbits.TMR1ON // bit 0
2049 #define TMR1CS T1CONbits.TMR1CS // bit 1
2050 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
2051 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
2052 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
2053 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
2054 #define TMR1GE T1CONbits.TMR1GE // bit 6, shadows bit in T1CONbits
2055 #define T1GE T1CONbits.T1GE // bit 6, shadows bit in T1CONbits
2056 #define T1GINV T1CONbits.T1GINV // bit 7
2057
2058 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
2059 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
2060 #define TMR2ON T2CONbits.TMR2ON // bit 2
2061 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
2062 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
2063 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
2064 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
2065
2066 #define TRISA0 TRISAbits.TRISA0 // bit 0
2067 #define TRISA1 TRISAbits.TRISA1 // bit 1
2068 #define TRISA2 TRISAbits.TRISA2 // bit 2
2069 #define TRISA3 TRISAbits.TRISA3 // bit 3
2070 #define TRISA4 TRISAbits.TRISA4 // bit 4
2071 #define TRISA5 TRISAbits.TRISA5 // bit 5
2072
2073 #define TRISB4 TRISBbits.TRISB4 // bit 4
2074 #define TRISB5 TRISBbits.TRISB5 // bit 5
2075 #define TRISB6 TRISBbits.TRISB6 // bit 6
2076 #define TRISB7 TRISBbits.TRISB7 // bit 7
2077
2078 #define TRISC0 TRISCbits.TRISC0 // bit 0
2079 #define TRISC1 TRISCbits.TRISC1 // bit 1
2080 #define TRISC2 TRISCbits.TRISC2 // bit 2
2081 #define TRISC3 TRISCbits.TRISC3 // bit 3
2082 #define TRISC4 TRISCbits.TRISC4 // bit 4
2083 #define TRISC5 TRISCbits.TRISC5 // bit 5
2084 #define TRISC6 TRISCbits.TRISC6 // bit 6
2085 #define TRISC7 TRISCbits.TRISC7 // bit 7
2086
2087 #define VR0 VRCONbits.VR0 // bit 0
2088 #define VR1 VRCONbits.VR1 // bit 1
2089 #define VR2 VRCONbits.VR2 // bit 2
2090 #define VR3 VRCONbits.VR3 // bit 3
2091 #define VRR VRCONbits.VRR // bit 5
2092 #define C2VREN VRCONbits.C2VREN // bit 6
2093 #define C1VREN VRCONbits.C1VREN // bit 7
2094
2095 #define SWDTEN WDTCONbits.SWDTEN // bit 0
2096 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
2097 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
2098 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
2099 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
2100
2101 #define WPUA0 WPUbits.WPUA0 // bit 0, shadows bit in WPUbits
2102 #define WPU0 WPUbits.WPU0 // bit 0, shadows bit in WPUbits
2103 #define WPUA1 WPUbits.WPUA1 // bit 1, shadows bit in WPUbits
2104 #define WPU1 WPUbits.WPU1 // bit 1, shadows bit in WPUbits
2105 #define WPUA2 WPUbits.WPUA2 // bit 2, shadows bit in WPUbits
2106 #define WPU2 WPUbits.WPU2 // bit 2, shadows bit in WPUbits
2107 #define WPUA3 WPUbits.WPUA3 // bit 3, shadows bit in WPUbits
2108 #define WPU3 WPUbits.WPU3 // bit 3, shadows bit in WPUbits
2109 #define WPUA4 WPUbits.WPUA4 // bit 4, shadows bit in WPUbits
2110 #define WPU4 WPUbits.WPU4 // bit 4, shadows bit in WPUbits
2111 #define WPUA5 WPUbits.WPUA5 // bit 5, shadows bit in WPUbits
2112 #define WPU5 WPUbits.WPU5 // bit 5, shadows bit in WPUbits
2113
2114 #endif // #ifndef NO_BIT_DEFINES
2115
2116 #endif // #ifndef __PIC16F785_H__
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