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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16f87.h
blob8f66c02be86cc5c5fc0fcca4ba89cb3aa494ac0c
1 /*
2 * This declarations of the PIC16F87 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:55 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16F87_H__
26 #define __PIC16F87_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PCLATH_ADDR 0x000A
44 #define INTCON_ADDR 0x000B
45 #define PIR1_ADDR 0x000C
46 #define PIR2_ADDR 0x000D
47 #define TMR1_ADDR 0x000E
48 #define TMR1L_ADDR 0x000E
49 #define TMR1H_ADDR 0x000F
50 #define T1CON_ADDR 0x0010
51 #define TMR2_ADDR 0x0011
52 #define T2CON_ADDR 0x0012
53 #define SSPBUF_ADDR 0x0013
54 #define SSPCON_ADDR 0x0014
55 #define CCPR1_ADDR 0x0015
56 #define CCPR1L_ADDR 0x0015
57 #define CCPR1H_ADDR 0x0016
58 #define CCP1CON_ADDR 0x0017
59 #define RCSTA_ADDR 0x0018
60 #define TXREG_ADDR 0x0019
61 #define RCREG_ADDR 0x001A
62 #define OPTION_REG_ADDR 0x0081
63 #define TRISA_ADDR 0x0085
64 #define TRISB_ADDR 0x0086
65 #define PIE1_ADDR 0x008C
66 #define PIE2_ADDR 0x008D
67 #define PCON_ADDR 0x008E
68 #define OSCCON_ADDR 0x008F
69 #define OSCTUNE_ADDR 0x0090
70 #define PR2_ADDR 0x0092
71 #define SSPADD_ADDR 0x0093
72 #define SSPSTAT_ADDR 0x0094
73 #define TXSTA_ADDR 0x0098
74 #define SPBRG_ADDR 0x0099
75 #define CMCON_ADDR 0x009C
76 #define CVRCON_ADDR 0x009D
77 #define WDTCON_ADDR 0x0105
78 #define EEDATA_ADDR 0x010C
79 #define EEADR_ADDR 0x010D
80 #define EEDATH_ADDR 0x010E
81 #define EEADRH_ADDR 0x010F
82 #define EECON1_ADDR 0x018C
83 #define EECON2_ADDR 0x018D
84
85 #endif // #ifndef NO_ADDR_DEFINES
86
87 //==============================================================================
88 //
89 // Register Definitions
90 //
91 //==============================================================================
92
93 extern __at(0x0000) __sfr INDF;
94 extern __at(0x0001) __sfr TMR0;
95 extern __at(0x0002) __sfr PCL;
96
97 //==============================================================================
98 // STATUS Bits
99
100 extern __at(0x0003) __sfr STATUS;
101
102 typedef union
103 {
104 struct
105 {
106 unsigned C : 1;
107 unsigned DC : 1;
108 unsigned Z : 1;
109 unsigned NOT_PD : 1;
110 unsigned NOT_TO : 1;
111 unsigned RP0 : 1;
112 unsigned RP1 : 1;
113 unsigned IRP : 1;
114 };
115
116 struct
117 {
118 unsigned : 5;
119 unsigned RP : 2;
120 unsigned : 1;
121 };
122 } __STATUSbits_t;
123
124 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
125
126 #define _C 0x01
127 #define _DC 0x02
128 #define _Z 0x04
129 #define _NOT_PD 0x08
130 #define _NOT_TO 0x10
131 #define _RP0 0x20
132 #define _RP1 0x40
133 #define _IRP 0x80
134
135 //==============================================================================
136
137 extern __at(0x0004) __sfr FSR;
138
139 //==============================================================================
140 // PORTA Bits
141
142 extern __at(0x0005) __sfr PORTA;
143
144 typedef struct
145 {
146 unsigned RA0 : 1;
147 unsigned RA1 : 1;
148 unsigned RA2 : 1;
149 unsigned RA3 : 1;
150 unsigned RA4 : 1;
151 unsigned RA5 : 1;
152 unsigned RA6 : 1;
153 unsigned RA7 : 1;
154 } __PORTAbits_t;
155
156 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
157
158 #define _RA0 0x01
159 #define _RA1 0x02
160 #define _RA2 0x04
161 #define _RA3 0x08
162 #define _RA4 0x10
163 #define _RA5 0x20
164 #define _RA6 0x40
165 #define _RA7 0x80
166
167 //==============================================================================
168
169
170 //==============================================================================
171 // PORTB Bits
172
173 extern __at(0x0006) __sfr PORTB;
174
175 typedef struct
176 {
177 unsigned RB0 : 1;
178 unsigned RB1 : 1;
179 unsigned RB2 : 1;
180 unsigned RB3 : 1;
181 unsigned RB4 : 1;
182 unsigned RB5 : 1;
183 unsigned RB6 : 1;
184 unsigned RB7 : 1;
185 } __PORTBbits_t;
186
187 extern __at(0x0006) volatile __PORTBbits_t PORTBbits;
188
189 #define _RB0 0x01
190 #define _RB1 0x02
191 #define _RB2 0x04
192 #define _RB3 0x08
193 #define _RB4 0x10
194 #define _RB5 0x20
195 #define _RB6 0x40
196 #define _RB7 0x80
197
198 //==============================================================================
199
200 extern __at(0x000A) __sfr PCLATH;
201
202 //==============================================================================
203 // INTCON Bits
204
205 extern __at(0x000B) __sfr INTCON;
206
207 typedef union
208 {
209 struct
210 {
211 unsigned RBIF : 1;
212 unsigned INT0IF : 1;
213 unsigned TMR0IF : 1;
214 unsigned RBIE : 1;
215 unsigned INT0IE : 1;
216 unsigned TMR0IE : 1;
217 unsigned PEIE : 1;
218 unsigned GIE : 1;
219 };
220
221 struct
222 {
223 unsigned : 1;
224 unsigned INTF : 1;
225 unsigned : 1;
226 unsigned : 1;
227 unsigned INTE : 1;
228 unsigned : 1;
229 unsigned : 1;
230 unsigned : 1;
231 };
232 } __INTCONbits_t;
233
234 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
235
236 #define _RBIF 0x01
237 #define _INT0IF 0x02
238 #define _INTF 0x02
239 #define _TMR0IF 0x04
240 #define _RBIE 0x08
241 #define _INT0IE 0x10
242 #define _INTE 0x10
243 #define _TMR0IE 0x20
244 #define _PEIE 0x40
245 #define _GIE 0x80
246
247 //==============================================================================
248
249
250 //==============================================================================
251 // PIR1 Bits
252
253 extern __at(0x000C) __sfr PIR1;
254
255 typedef struct
256 {
257 unsigned TMR1IF : 1;
258 unsigned TMR2IF : 1;
259 unsigned CCP1IF : 1;
260 unsigned SSPIF : 1;
261 unsigned TXIF : 1;
262 unsigned RCIF : 1;
263 unsigned : 1;
264 unsigned : 1;
265 } __PIR1bits_t;
266
267 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
268
269 #define _TMR1IF 0x01
270 #define _TMR2IF 0x02
271 #define _CCP1IF 0x04
272 #define _SSPIF 0x08
273 #define _TXIF 0x10
274 #define _RCIF 0x20
275
276 //==============================================================================
277
278
279 //==============================================================================
280 // PIR2 Bits
281
282 extern __at(0x000D) __sfr PIR2;
283
284 typedef struct
285 {
286 unsigned : 1;
287 unsigned : 1;
288 unsigned : 1;
289 unsigned : 1;
290 unsigned EEIF : 1;
291 unsigned : 1;
292 unsigned CMIF : 1;
293 unsigned OSFIF : 1;
294 } __PIR2bits_t;
295
296 extern __at(0x000D) volatile __PIR2bits_t PIR2bits;
297
298 #define _EEIF 0x10
299 #define _CMIF 0x40
300 #define _OSFIF 0x80
301
302 //==============================================================================
303
304 extern __at(0x000E) __sfr TMR1;
305 extern __at(0x000E) __sfr TMR1L;
306 extern __at(0x000F) __sfr TMR1H;
307
308 //==============================================================================
309 // T1CON Bits
310
311 extern __at(0x0010) __sfr T1CON;
312
313 typedef union
314 {
315 struct
316 {
317 unsigned TMR1ON : 1;
318 unsigned TMR1CS : 1;
319 unsigned NOT_T1SYNC : 1;
320 unsigned T1OSCEN : 1;
321 unsigned T1CKPS0 : 1;
322 unsigned T1CKPS1 : 1;
323 unsigned T1RUN : 1;
324 unsigned : 1;
325 };
326
327 struct
328 {
329 unsigned : 1;
330 unsigned : 1;
331 unsigned T1INSYNC : 1;
332 unsigned : 1;
333 unsigned : 1;
334 unsigned : 1;
335 unsigned : 1;
336 unsigned : 1;
337 };
338
339 struct
340 {
341 unsigned : 4;
342 unsigned T1CKPS : 2;
343 unsigned : 2;
344 };
345 } __T1CONbits_t;
346
347 extern __at(0x0010) volatile __T1CONbits_t T1CONbits;
348
349 #define _TMR1ON 0x01
350 #define _TMR1CS 0x02
351 #define _NOT_T1SYNC 0x04
352 #define _T1INSYNC 0x04
353 #define _T1OSCEN 0x08
354 #define _T1CKPS0 0x10
355 #define _T1CKPS1 0x20
356 #define _T1RUN 0x40
357
358 //==============================================================================
359
360 extern __at(0x0011) __sfr TMR2;
361
362 //==============================================================================
363 // T2CON Bits
364
365 extern __at(0x0012) __sfr T2CON;
366
367 typedef union
368 {
369 struct
370 {
371 unsigned T2CKPS0 : 1;
372 unsigned T2CKPS1 : 1;
373 unsigned TMR2ON : 1;
374 unsigned TOUTPS0 : 1;
375 unsigned TOUTPS1 : 1;
376 unsigned TOUTPS2 : 1;
377 unsigned TOUTPS3 : 1;
378 unsigned : 1;
379 };
380
381 struct
382 {
383 unsigned T2CKPS : 2;
384 unsigned : 6;
385 };
386
387 struct
388 {
389 unsigned : 3;
390 unsigned TOUTPS : 4;
391 unsigned : 1;
392 };
393 } __T2CONbits_t;
394
395 extern __at(0x0012) volatile __T2CONbits_t T2CONbits;
396
397 #define _T2CKPS0 0x01
398 #define _T2CKPS1 0x02
399 #define _TMR2ON 0x04
400 #define _TOUTPS0 0x08
401 #define _TOUTPS1 0x10
402 #define _TOUTPS2 0x20
403 #define _TOUTPS3 0x40
404
405 //==============================================================================
406
407 extern __at(0x0013) __sfr SSPBUF;
408
409 //==============================================================================
410 // SSPCON Bits
411
412 extern __at(0x0014) __sfr SSPCON;
413
414 typedef union
415 {
416 struct
417 {
418 unsigned SSPM0 : 1;
419 unsigned SSPM1 : 1;
420 unsigned SSPM2 : 1;
421 unsigned SSPM3 : 1;
422 unsigned CKP : 1;
423 unsigned SSPEN : 1;
424 unsigned SSPOV : 1;
425 unsigned WCOL : 1;
426 };
427
428 struct
429 {
430 unsigned SSPM : 4;
431 unsigned : 4;
432 };
433 } __SSPCONbits_t;
434
435 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits;
436
437 #define _SSPM0 0x01
438 #define _SSPM1 0x02
439 #define _SSPM2 0x04
440 #define _SSPM3 0x08
441 #define _CKP 0x10
442 #define _SSPEN 0x20
443 #define _SSPOV 0x40
444 #define _WCOL 0x80
445
446 //==============================================================================
447
448 extern __at(0x0015) __sfr CCPR1;
449 extern __at(0x0015) __sfr CCPR1L;
450 extern __at(0x0016) __sfr CCPR1H;
451
452 //==============================================================================
453 // CCP1CON Bits
454
455 extern __at(0x0017) __sfr CCP1CON;
456
457 typedef union
458 {
459 struct
460 {
461 unsigned CCP1M0 : 1;
462 unsigned CCP1M1 : 1;
463 unsigned CCP1M2 : 1;
464 unsigned CCP1M3 : 1;
465 unsigned CCP1Y : 1;
466 unsigned CCP1X : 1;
467 unsigned : 1;
468 unsigned : 1;
469 };
470
471 struct
472 {
473 unsigned CCP1M : 4;
474 unsigned : 4;
475 };
476 } __CCP1CONbits_t;
477
478 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits;
479
480 #define _CCP1M0 0x01
481 #define _CCP1M1 0x02
482 #define _CCP1M2 0x04
483 #define _CCP1M3 0x08
484 #define _CCP1Y 0x10
485 #define _CCP1X 0x20
486
487 //==============================================================================
488
489
490 //==============================================================================
491 // RCSTA Bits
492
493 extern __at(0x0018) __sfr RCSTA;
494
495 typedef union
496 {
497 struct
498 {
499 unsigned RX9D : 1;
500 unsigned OERR : 1;
501 unsigned FERR : 1;
502 unsigned ADDEN : 1;
503 unsigned CREN : 1;
504 unsigned SREN : 1;
505 unsigned RX9 : 1;
506 unsigned SPEN : 1;
507 };
508
509 struct
510 {
511 unsigned RCD8 : 1;
512 unsigned : 1;
513 unsigned : 1;
514 unsigned : 1;
515 unsigned : 1;
516 unsigned : 1;
517 unsigned RC9 : 1;
518 unsigned : 1;
519 };
520
521 struct
522 {
523 unsigned : 1;
524 unsigned : 1;
525 unsigned : 1;
526 unsigned : 1;
527 unsigned : 1;
528 unsigned : 1;
529 unsigned NOT_RC8 : 1;
530 unsigned : 1;
531 };
532
533 struct
534 {
535 unsigned : 1;
536 unsigned : 1;
537 unsigned : 1;
538 unsigned : 1;
539 unsigned : 1;
540 unsigned : 1;
541 unsigned RC8_9 : 1;
542 unsigned : 1;
543 };
544 } __RCSTAbits_t;
545
546 extern __at(0x0018) volatile __RCSTAbits_t RCSTAbits;
547
548 #define _RX9D 0x01
549 #define _RCD8 0x01
550 #define _OERR 0x02
551 #define _FERR 0x04
552 #define _ADDEN 0x08
553 #define _CREN 0x10
554 #define _SREN 0x20
555 #define _RX9 0x40
556 #define _RC9 0x40
557 #define _NOT_RC8 0x40
558 #define _RC8_9 0x40
559 #define _SPEN 0x80
560
561 //==============================================================================
562
563 extern __at(0x0019) __sfr TXREG;
564 extern __at(0x001A) __sfr RCREG;
565
566 //==============================================================================
567 // OPTION_REG Bits
568
569 extern __at(0x0081) __sfr OPTION_REG;
570
571 typedef union
572 {
573 struct
574 {
575 unsigned PS0 : 1;
576 unsigned PS1 : 1;
577 unsigned PS2 : 1;
578 unsigned PSA : 1;
579 unsigned T0SE : 1;
580 unsigned T0CS : 1;
581 unsigned INTEDG : 1;
582 unsigned NOT_RBPU : 1;
583 };
584
585 struct
586 {
587 unsigned PS : 3;
588 unsigned : 5;
589 };
590 } __OPTION_REGbits_t;
591
592 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
593
594 #define _PS0 0x01
595 #define _PS1 0x02
596 #define _PS2 0x04
597 #define _PSA 0x08
598 #define _T0SE 0x10
599 #define _T0CS 0x20
600 #define _INTEDG 0x40
601 #define _NOT_RBPU 0x80
602
603 //==============================================================================
604
605
606 //==============================================================================
607 // TRISA Bits
608
609 extern __at(0x0085) __sfr TRISA;
610
611 typedef struct
612 {
613 unsigned TRISA0 : 1;
614 unsigned TRISA1 : 1;
615 unsigned TRISA2 : 1;
616 unsigned TRISA3 : 1;
617 unsigned TRISA4 : 1;
618 unsigned TRISA5 : 1;
619 unsigned TRISA6 : 1;
620 unsigned TRISA7 : 1;
621 } __TRISAbits_t;
622
623 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
624
625 #define _TRISA0 0x01
626 #define _TRISA1 0x02
627 #define _TRISA2 0x04
628 #define _TRISA3 0x08
629 #define _TRISA4 0x10
630 #define _TRISA5 0x20
631 #define _TRISA6 0x40
632 #define _TRISA7 0x80
633
634 //==============================================================================
635
636
637 //==============================================================================
638 // TRISB Bits
639
640 extern __at(0x0086) __sfr TRISB;
641
642 typedef struct
643 {
644 unsigned TRISB0 : 1;
645 unsigned TRISB1 : 1;
646 unsigned TRISB2 : 1;
647 unsigned TRISB3 : 1;
648 unsigned TRISB4 : 1;
649 unsigned TRISB5 : 1;
650 unsigned TRISB6 : 1;
651 unsigned TRISB7 : 1;
652 } __TRISBbits_t;
653
654 extern __at(0x0086) volatile __TRISBbits_t TRISBbits;
655
656 #define _TRISB0 0x01
657 #define _TRISB1 0x02
658 #define _TRISB2 0x04
659 #define _TRISB3 0x08
660 #define _TRISB4 0x10
661 #define _TRISB5 0x20
662 #define _TRISB6 0x40
663 #define _TRISB7 0x80
664
665 //==============================================================================
666
667
668 //==============================================================================
669 // PIE1 Bits
670
671 extern __at(0x008C) __sfr PIE1;
672
673 typedef struct
674 {
675 unsigned TMR1IE : 1;
676 unsigned TMR2IE : 1;
677 unsigned CCP1IE : 1;
678 unsigned SSPIE : 1;
679 unsigned TXIE : 1;
680 unsigned RCIE : 1;
681 unsigned : 1;
682 unsigned : 1;
683 } __PIE1bits_t;
684
685 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
686
687 #define _TMR1IE 0x01
688 #define _TMR2IE 0x02
689 #define _CCP1IE 0x04
690 #define _SSPIE 0x08
691 #define _TXIE 0x10
692 #define _RCIE 0x20
693
694 //==============================================================================
695
696
697 //==============================================================================
698 // PIE2 Bits
699
700 extern __at(0x008D) __sfr PIE2;
701
702 typedef struct
703 {
704 unsigned : 1;
705 unsigned : 1;
706 unsigned : 1;
707 unsigned : 1;
708 unsigned EEIE : 1;
709 unsigned : 1;
710 unsigned CMIE : 1;
711 unsigned OSFIE : 1;
712 } __PIE2bits_t;
713
714 extern __at(0x008D) volatile __PIE2bits_t PIE2bits;
715
716 #define _EEIE 0x10
717 #define _CMIE 0x40
718 #define _OSFIE 0x80
719
720 //==============================================================================
721
722
723 //==============================================================================
724 // PCON Bits
725
726 extern __at(0x008E) __sfr PCON;
727
728 typedef union
729 {
730 struct
731 {
732 unsigned NOT_BOR : 1;
733 unsigned NOT_POR : 1;
734 unsigned : 1;
735 unsigned : 1;
736 unsigned : 1;
737 unsigned : 1;
738 unsigned : 1;
739 unsigned : 1;
740 };
741
742 struct
743 {
744 unsigned NOT_BO : 1;
745 unsigned : 1;
746 unsigned : 1;
747 unsigned : 1;
748 unsigned : 1;
749 unsigned : 1;
750 unsigned : 1;
751 unsigned : 1;
752 };
753 } __PCONbits_t;
754
755 extern __at(0x008E) volatile __PCONbits_t PCONbits;
756
757 #define _NOT_BOR 0x01
758 #define _NOT_BO 0x01
759 #define _NOT_POR 0x02
760
761 //==============================================================================
762
763
764 //==============================================================================
765 // OSCCON Bits
766
767 extern __at(0x008F) __sfr OSCCON;
768
769 typedef union
770 {
771 struct
772 {
773 unsigned SCS0 : 1;
774 unsigned SCS1 : 1;
775 unsigned IOFS : 1;
776 unsigned OSTS : 1;
777 unsigned IRCF0 : 1;
778 unsigned IRCF1 : 1;
779 unsigned IRCF2 : 1;
780 unsigned : 1;
781 };
782
783 struct
784 {
785 unsigned SCS : 2;
786 unsigned : 6;
787 };
788
789 struct
790 {
791 unsigned : 4;
792 unsigned IRCF : 3;
793 unsigned : 1;
794 };
795 } __OSCCONbits_t;
796
797 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits;
798
799 #define _SCS0 0x01
800 #define _SCS1 0x02
801 #define _IOFS 0x04
802 #define _OSTS 0x08
803 #define _IRCF0 0x10
804 #define _IRCF1 0x20
805 #define _IRCF2 0x40
806
807 //==============================================================================
808
809
810 //==============================================================================
811 // OSCTUNE Bits
812
813 extern __at(0x0090) __sfr OSCTUNE;
814
815 typedef union
816 {
817 struct
818 {
819 unsigned TUN0 : 1;
820 unsigned TUN1 : 1;
821 unsigned TUN2 : 1;
822 unsigned TUN3 : 1;
823 unsigned TUN4 : 1;
824 unsigned TUN5 : 1;
825 unsigned : 1;
826 unsigned : 1;
827 };
828
829 struct
830 {
831 unsigned TUN : 6;
832 unsigned : 2;
833 };
834 } __OSCTUNEbits_t;
835
836 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits;
837
838 #define _TUN0 0x01
839 #define _TUN1 0x02
840 #define _TUN2 0x04
841 #define _TUN3 0x08
842 #define _TUN4 0x10
843 #define _TUN5 0x20
844
845 //==============================================================================
846
847 extern __at(0x0092) __sfr PR2;
848 extern __at(0x0093) __sfr SSPADD;
849
850 //==============================================================================
851 // SSPSTAT Bits
852
853 extern __at(0x0094) __sfr SSPSTAT;
854
855 typedef union
856 {
857 struct
858 {
859 unsigned BF : 1;
860 unsigned UA : 1;
861 unsigned R_NOT_W : 1;
862 unsigned S : 1;
863 unsigned P : 1;
864 unsigned D_NOT_A : 1;
865 unsigned CKE : 1;
866 unsigned SMP : 1;
867 };
868
869 struct
870 {
871 unsigned : 1;
872 unsigned : 1;
873 unsigned R : 1;
874 unsigned I2C_START : 1;
875 unsigned I2C_STOP : 1;
876 unsigned D : 1;
877 unsigned : 1;
878 unsigned : 1;
879 };
880
881 struct
882 {
883 unsigned : 1;
884 unsigned : 1;
885 unsigned I2C_READ : 1;
886 unsigned : 1;
887 unsigned : 1;
888 unsigned I2C_DATA : 1;
889 unsigned : 1;
890 unsigned : 1;
891 };
892
893 struct
894 {
895 unsigned : 1;
896 unsigned : 1;
897 unsigned NOT_W : 1;
898 unsigned : 1;
899 unsigned : 1;
900 unsigned NOT_A : 1;
901 unsigned : 1;
902 unsigned : 1;
903 };
904
905 struct
906 {
907 unsigned : 1;
908 unsigned : 1;
909 unsigned NOT_WRITE : 1;
910 unsigned : 1;
911 unsigned : 1;
912 unsigned NOT_ADDRESS : 1;
913 unsigned : 1;
914 unsigned : 1;
915 };
916
917 struct
918 {
919 unsigned : 1;
920 unsigned : 1;
921 unsigned R_W : 1;
922 unsigned : 1;
923 unsigned : 1;
924 unsigned D_A : 1;
925 unsigned : 1;
926 unsigned : 1;
927 };
928
929 struct
930 {
931 unsigned : 1;
932 unsigned : 1;
933 unsigned READ_WRITE : 1;
934 unsigned : 1;
935 unsigned : 1;
936 unsigned DATA_ADDRESS : 1;
937 unsigned : 1;
938 unsigned : 1;
939 };
940 } __SSPSTATbits_t;
941
942 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits;
943
944 #define _BF 0x01
945 #define _UA 0x02
946 #define _R_NOT_W 0x04
947 #define _R 0x04
948 #define _I2C_READ 0x04
949 #define _NOT_W 0x04
950 #define _NOT_WRITE 0x04
951 #define _R_W 0x04
952 #define _READ_WRITE 0x04
953 #define _S 0x08
954 #define _I2C_START 0x08
955 #define _P 0x10
956 #define _I2C_STOP 0x10
957 #define _D_NOT_A 0x20
958 #define _D 0x20
959 #define _I2C_DATA 0x20
960 #define _NOT_A 0x20
961 #define _NOT_ADDRESS 0x20
962 #define _D_A 0x20
963 #define _DATA_ADDRESS 0x20
964 #define _CKE 0x40
965 #define _SMP 0x80
966
967 //==============================================================================
968
969
970 //==============================================================================
971 // TXSTA Bits
972
973 extern __at(0x0098) __sfr TXSTA;
974
975 typedef union
976 {
977 struct
978 {
979 unsigned TX9D : 1;
980 unsigned TRMT : 1;
981 unsigned BRGH : 1;
982 unsigned : 1;
983 unsigned SYNC : 1;
984 unsigned TXEN : 1;
985 unsigned TX9 : 1;
986 unsigned CSRC : 1;
987 };
988
989 struct
990 {
991 unsigned TXD8 : 1;
992 unsigned : 1;
993 unsigned : 1;
994 unsigned : 1;
995 unsigned : 1;
996 unsigned : 1;
997 unsigned NOT_TX8 : 1;
998 unsigned : 1;
999 };
1000
1001 struct
1002 {
1003 unsigned : 1;
1004 unsigned : 1;
1005 unsigned : 1;
1006 unsigned : 1;
1007 unsigned : 1;
1008 unsigned : 1;
1009 unsigned TX8_9 : 1;
1010 unsigned : 1;
1011 };
1012 } __TXSTAbits_t;
1013
1014 extern __at(0x0098) volatile __TXSTAbits_t TXSTAbits;
1015
1016 #define _TX9D 0x01
1017 #define _TXD8 0x01
1018 #define _TRMT 0x02
1019 #define _BRGH 0x04
1020 #define _SYNC 0x10
1021 #define _TXEN 0x20
1022 #define _TX9 0x40
1023 #define _NOT_TX8 0x40
1024 #define _TX8_9 0x40
1025 #define _CSRC 0x80
1026
1027 //==============================================================================
1028
1029 extern __at(0x0099) __sfr SPBRG;
1030
1031 //==============================================================================
1032 // CMCON Bits
1033
1034 extern __at(0x009C) __sfr CMCON;
1035
1036 typedef union
1037 {
1038 struct
1039 {
1040 unsigned CM0 : 1;
1041 unsigned CM1 : 1;
1042 unsigned CM2 : 1;
1043 unsigned CIS : 1;
1044 unsigned C1INV : 1;
1045 unsigned C2INV : 1;
1046 unsigned C1OUT : 1;
1047 unsigned C2OUT : 1;
1048 };
1049
1050 struct
1051 {
1052 unsigned CM : 3;
1053 unsigned : 5;
1054 };
1055 } __CMCONbits_t;
1056
1057 extern __at(0x009C) volatile __CMCONbits_t CMCONbits;
1058
1059 #define _CM0 0x01
1060 #define _CM1 0x02
1061 #define _CM2 0x04
1062 #define _CIS 0x08
1063 #define _C1INV 0x10
1064 #define _C2INV 0x20
1065 #define _C1OUT 0x40
1066 #define _C2OUT 0x80
1067
1068 //==============================================================================
1069
1070
1071 //==============================================================================
1072 // CVRCON Bits
1073
1074 extern __at(0x009D) __sfr CVRCON;
1075
1076 typedef union
1077 {
1078 struct
1079 {
1080 unsigned CVR0 : 1;
1081 unsigned CVR1 : 1;
1082 unsigned CVR2 : 1;
1083 unsigned CVR3 : 1;
1084 unsigned : 1;
1085 unsigned CVRR : 1;
1086 unsigned CVROE : 1;
1087 unsigned CVREN : 1;
1088 };
1089
1090 struct
1091 {
1092 unsigned CVR : 4;
1093 unsigned : 4;
1094 };
1095 } __CVRCONbits_t;
1096
1097 extern __at(0x009D) volatile __CVRCONbits_t CVRCONbits;
1098
1099 #define _CVR0 0x01
1100 #define _CVR1 0x02
1101 #define _CVR2 0x04
1102 #define _CVR3 0x08
1103 #define _CVRR 0x20
1104 #define _CVROE 0x40
1105 #define _CVREN 0x80
1106
1107 //==============================================================================
1108
1109
1110 //==============================================================================
1111 // WDTCON Bits
1112
1113 extern __at(0x0105) __sfr WDTCON;
1114
1115 typedef union
1116 {
1117 struct
1118 {
1119 unsigned SWDTEN : 1;
1120 unsigned WDTPS0 : 1;
1121 unsigned WDTPS1 : 1;
1122 unsigned WDTPS2 : 1;
1123 unsigned WDTPS3 : 1;
1124 unsigned : 1;
1125 unsigned : 1;
1126 unsigned : 1;
1127 };
1128
1129 struct
1130 {
1131 unsigned SWDTE : 1;
1132 unsigned : 1;
1133 unsigned : 1;
1134 unsigned : 1;
1135 unsigned : 1;
1136 unsigned : 1;
1137 unsigned : 1;
1138 unsigned : 1;
1139 };
1140
1141 struct
1142 {
1143 unsigned : 1;
1144 unsigned WDTPS : 4;
1145 unsigned : 3;
1146 };
1147 } __WDTCONbits_t;
1148
1149 extern __at(0x0105) volatile __WDTCONbits_t WDTCONbits;
1150
1151 #define _SWDTEN 0x01
1152 #define _SWDTE 0x01
1153 #define _WDTPS0 0x02
1154 #define _WDTPS1 0x04
1155 #define _WDTPS2 0x08
1156 #define _WDTPS3 0x10
1157
1158 //==============================================================================
1159
1160 extern __at(0x010C) __sfr EEDATA;
1161 extern __at(0x010D) __sfr EEADR;
1162 extern __at(0x010E) __sfr EEDATH;
1163 extern __at(0x010F) __sfr EEADRH;
1164
1165 //==============================================================================
1166 // EECON1 Bits
1167
1168 extern __at(0x018C) __sfr EECON1;
1169
1170 typedef struct
1171 {
1172 unsigned RD : 1;
1173 unsigned WR : 1;
1174 unsigned WREN : 1;
1175 unsigned WRERR : 1;
1176 unsigned FREE : 1;
1177 unsigned : 1;
1178 unsigned : 1;
1179 unsigned EEPGD : 1;
1180 } __EECON1bits_t;
1181
1182 extern __at(0x018C) volatile __EECON1bits_t EECON1bits;
1183
1184 #define _RD 0x01
1185 #define _WR 0x02
1186 #define _WREN 0x04
1187 #define _WRERR 0x08
1188 #define _FREE 0x10
1189 #define _EEPGD 0x80
1190
1191 //==============================================================================
1192
1193 extern __at(0x018D) __sfr EECON2;
1194
1195 //==============================================================================
1196 //
1197 // Configuration Bits
1198 //
1199 //==============================================================================
1200
1201 #define _CONFIG1 0x2007
1202 #define _CONFIG2 0x2008
1203
1204 //----------------------------- CONFIG1 Options -------------------------------
1205
1206 #define _FOSC_LP 0x3FEC // LP oscillator.
1207 #define _LP_OSC 0x3FEC // LP oscillator.
1208 #define _FOSC_XT 0x3FED // XT oscillator.
1209 #define _XT_OSC 0x3FED // XT oscillator.
1210 #define _FOSC_HS 0x3FEE // HS oscillator.
1211 #define _HS_OSC 0x3FEE // HS oscillator.
1212 #define _FOSC_EC 0x3FEF // ECIO; port I/O function on RA6/OSC2/CLKO.
1213 #define _EXTCLK 0x3FEF // ECIO; port I/O function on RA6/OSC2/CLKO.
1214 #define _FOSC_INTOSCIO 0x3FFC // INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin.
1215 #define _INTRC_IO 0x3FFC // INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin.
1216 #define _FOSC_INTOSCCLK 0x3FFD // INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin.
1217 #define _INTRC_CLKOUT 0x3FFD // INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin.
1218 #define _FOSC_EXTRCIO 0x3FFE // EXTRC oscillator; port I/O function on RA6/OSC2/CLKO.
1219 #define _EXTRC_IO 0x3FFE // EXTRC oscillator; port I/O function on RA6/OSC2/CLKO.
1220 #define _FOSC_EXTRCCLK 0x3FFF // EXTRC oscillator; CLKO function on RA6/OSC2/CLKO.
1221 #define _EXTRC_CLKOUT 0x3FFF // EXTRC oscillator; CLKO function on RA6/OSC2/CLKO.
1222 #define _WDTE_OFF 0x3FFB // WDT disabled.
1223 #define _WDT_OFF 0x3FFB // WDT disabled.
1224 #define _WDTE_ON 0x3FFF // WDT enabled.
1225 #define _WDT_ON 0x3FFF // WDT enabled.
1226 #define _PWRTE_ON 0x3FF7 // PWRT enabled.
1227 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1228 #define _MCLRE_OFF 0x3FDF // RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD.
1229 #define _MCLR_OFF 0x3FDF // RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD.
1230 #define _MCLRE_ON 0x3FFF // RA5/MCLR/VPP pin function is MCLR.
1231 #define _MCLR_ON 0x3FFF // RA5/MCLR/VPP pin function is MCLR.
1232 #define _BOREN_OFF 0x3FBF // BOR disabled.
1233 #define _BODEN_OFF 0x3FBF // BOR disabled.
1234 #define _BOREN_ON 0x3FFF // BOR enabled.
1235 #define _BODEN_ON 0x3FFF // BOR enabled.
1236 #define _LVP_OFF 0x3F7F // RB3 is digital I/O, HV on MCLR must be used for programming.
1237 #define _LVP_ON 0x3FFF // RB3/PGM pin has PGM function, Low-Voltage Programming enabled.
1238 #define _CPD_ON 0x3EFF // Data EE memory code-protected.
1239 #define _CPD_OFF 0x3FFF // Code protection off.
1240 #define _WRT_ALL 0x39FF // 0000h to 0FFFh write-protected.
1241 #define _WRT_PROTECT_ALL 0x39FF // 0000h to 0FFFh write-protected.
1242 #define _WRT_2048 0x3BFF // 0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control.
1243 #define _WRT_PROTECT_2048 0x3BFF // 0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control.
1244 #define _WRT_256 0x3DFF // 0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control.
1245 #define _WRT_PROTECT_256 0x3DFF // 0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control.
1246 #define _WRT_OFF 0x3FFF // Write protection off.
1247 #define _WRT_PROTECT_OFF 0x3FFF // Write protection off.
1248 #define _DEBUG_ON 0x37FF // In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger.
1249 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins.
1250 #define _CCPMX_RB3 0x2FFF // CCP1 function on RB3.
1251 #define _CCP1_RB3 0x2FFF // CCP1 function on RB3.
1252 #define _CCPMX_RB0 0x3FFF // CCP1 function on RB0.
1253 #define _CCP1_RB0 0x3FFF // CCP1 function on RB0.
1254 #define _CP_ON 0x1FFF // 0000h to 0FFFh code-protected (all protected).
1255 #define _CP_ALL 0x1FFF // 0000h to 0FFFh code-protected (all protected).
1256 #define _CP_OFF 0x3FFF // Code protection off.
1257
1258 //----------------------------- CONFIG2 Options -------------------------------
1259
1260 #define _FCMEN_OFF 0x3FFE // Fail-Safe Clock Monitor disabled.
1261 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor enabled.
1262 #define _IESO_OFF 0x3FFD // Internal External Switchover mode disabled.
1263 #define _IESO_ON 0x3FFF // Internal External Switchover mode enabled.
1264
1265 //==============================================================================
1266
1267 #define _DEVID1 0x2006
1268
1269 #define _IDLOC0 0x2000
1270 #define _IDLOC1 0x2001
1271 #define _IDLOC2 0x2002
1272 #define _IDLOC3 0x2003
1273
1274 //==============================================================================
1275
1276 #ifndef NO_BIT_DEFINES
1277
1278 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1279 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1280 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1281 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1282 #define CCP1Y CCP1CONbits.CCP1Y // bit 4
1283 #define CCP1X CCP1CONbits.CCP1X // bit 5
1284
1285 #define CM0 CMCONbits.CM0 // bit 0
1286 #define CM1 CMCONbits.CM1 // bit 1
1287 #define CM2 CMCONbits.CM2 // bit 2
1288 #define CIS CMCONbits.CIS // bit 3
1289 #define C1INV CMCONbits.C1INV // bit 4
1290 #define C2INV CMCONbits.C2INV // bit 5
1291 #define C1OUT CMCONbits.C1OUT // bit 6
1292 #define C2OUT CMCONbits.C2OUT // bit 7
1293
1294 #define CVR0 CVRCONbits.CVR0 // bit 0
1295 #define CVR1 CVRCONbits.CVR1 // bit 1
1296 #define CVR2 CVRCONbits.CVR2 // bit 2
1297 #define CVR3 CVRCONbits.CVR3 // bit 3
1298 #define CVRR CVRCONbits.CVRR // bit 5
1299 #define CVROE CVRCONbits.CVROE // bit 6
1300 #define CVREN CVRCONbits.CVREN // bit 7
1301
1302 #define RD EECON1bits.RD // bit 0
1303 #define WR EECON1bits.WR // bit 1
1304 #define WREN EECON1bits.WREN // bit 2
1305 #define WRERR EECON1bits.WRERR // bit 3
1306 #define FREE EECON1bits.FREE // bit 4
1307 #define EEPGD EECON1bits.EEPGD // bit 7
1308
1309 #define RBIF INTCONbits.RBIF // bit 0
1310 #define INT0IF INTCONbits.INT0IF // bit 1, shadows bit in INTCONbits
1311 #define INTF INTCONbits.INTF // bit 1, shadows bit in INTCONbits
1312 #define TMR0IF INTCONbits.TMR0IF // bit 2
1313 #define RBIE INTCONbits.RBIE // bit 3
1314 #define INT0IE INTCONbits.INT0IE // bit 4, shadows bit in INTCONbits
1315 #define INTE INTCONbits.INTE // bit 4, shadows bit in INTCONbits
1316 #define TMR0IE INTCONbits.TMR0IE // bit 5
1317 #define PEIE INTCONbits.PEIE // bit 6
1318 #define GIE INTCONbits.GIE // bit 7
1319
1320 #define PS0 OPTION_REGbits.PS0 // bit 0
1321 #define PS1 OPTION_REGbits.PS1 // bit 1
1322 #define PS2 OPTION_REGbits.PS2 // bit 2
1323 #define PSA OPTION_REGbits.PSA // bit 3
1324 #define T0SE OPTION_REGbits.T0SE // bit 4
1325 #define T0CS OPTION_REGbits.T0CS // bit 5
1326 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1327 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
1328
1329 #define SCS0 OSCCONbits.SCS0 // bit 0
1330 #define SCS1 OSCCONbits.SCS1 // bit 1
1331 #define IOFS OSCCONbits.IOFS // bit 2
1332 #define OSTS OSCCONbits.OSTS // bit 3
1333 #define IRCF0 OSCCONbits.IRCF0 // bit 4
1334 #define IRCF1 OSCCONbits.IRCF1 // bit 5
1335 #define IRCF2 OSCCONbits.IRCF2 // bit 6
1336
1337 #define TUN0 OSCTUNEbits.TUN0 // bit 0
1338 #define TUN1 OSCTUNEbits.TUN1 // bit 1
1339 #define TUN2 OSCTUNEbits.TUN2 // bit 2
1340 #define TUN3 OSCTUNEbits.TUN3 // bit 3
1341 #define TUN4 OSCTUNEbits.TUN4 // bit 4
1342 #define TUN5 OSCTUNEbits.TUN5 // bit 5
1343
1344 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1345 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
1346 #define NOT_POR PCONbits.NOT_POR // bit 1
1347
1348 #define TMR1IE PIE1bits.TMR1IE // bit 0
1349 #define TMR2IE PIE1bits.TMR2IE // bit 1
1350 #define CCP1IE PIE1bits.CCP1IE // bit 2
1351 #define SSPIE PIE1bits.SSPIE // bit 3
1352 #define TXIE PIE1bits.TXIE // bit 4
1353 #define RCIE PIE1bits.RCIE // bit 5
1354
1355 #define EEIE PIE2bits.EEIE // bit 4
1356 #define CMIE PIE2bits.CMIE // bit 6
1357 #define OSFIE PIE2bits.OSFIE // bit 7
1358
1359 #define TMR1IF PIR1bits.TMR1IF // bit 0
1360 #define TMR2IF PIR1bits.TMR2IF // bit 1
1361 #define CCP1IF PIR1bits.CCP1IF // bit 2
1362 #define SSPIF PIR1bits.SSPIF // bit 3
1363 #define TXIF PIR1bits.TXIF // bit 4
1364 #define RCIF PIR1bits.RCIF // bit 5
1365
1366 #define EEIF PIR2bits.EEIF // bit 4
1367 #define CMIF PIR2bits.CMIF // bit 6
1368 #define OSFIF PIR2bits.OSFIF // bit 7
1369
1370 #define RA0 PORTAbits.RA0 // bit 0
1371 #define RA1 PORTAbits.RA1 // bit 1
1372 #define RA2 PORTAbits.RA2 // bit 2
1373 #define RA3 PORTAbits.RA3 // bit 3
1374 #define RA4 PORTAbits.RA4 // bit 4
1375 #define RA5 PORTAbits.RA5 // bit 5
1376 #define RA6 PORTAbits.RA6 // bit 6
1377 #define RA7 PORTAbits.RA7 // bit 7
1378
1379 #define RB0 PORTBbits.RB0 // bit 0
1380 #define RB1 PORTBbits.RB1 // bit 1
1381 #define RB2 PORTBbits.RB2 // bit 2
1382 #define RB3 PORTBbits.RB3 // bit 3
1383 #define RB4 PORTBbits.RB4 // bit 4
1384 #define RB5 PORTBbits.RB5 // bit 5
1385 #define RB6 PORTBbits.RB6 // bit 6
1386 #define RB7 PORTBbits.RB7 // bit 7
1387
1388 #define RX9D RCSTAbits.RX9D // bit 0, shadows bit in RCSTAbits
1389 #define RCD8 RCSTAbits.RCD8 // bit 0, shadows bit in RCSTAbits
1390 #define OERR RCSTAbits.OERR // bit 1
1391 #define FERR RCSTAbits.FERR // bit 2
1392 #define ADDEN RCSTAbits.ADDEN // bit 3
1393 #define CREN RCSTAbits.CREN // bit 4
1394 #define SREN RCSTAbits.SREN // bit 5
1395 #define RX9 RCSTAbits.RX9 // bit 6, shadows bit in RCSTAbits
1396 #define RC9 RCSTAbits.RC9 // bit 6, shadows bit in RCSTAbits
1397 #define NOT_RC8 RCSTAbits.NOT_RC8 // bit 6, shadows bit in RCSTAbits
1398 #define RC8_9 RCSTAbits.RC8_9 // bit 6, shadows bit in RCSTAbits
1399 #define SPEN RCSTAbits.SPEN // bit 7
1400
1401 #define SSPM0 SSPCONbits.SSPM0 // bit 0
1402 #define SSPM1 SSPCONbits.SSPM1 // bit 1
1403 #define SSPM2 SSPCONbits.SSPM2 // bit 2
1404 #define SSPM3 SSPCONbits.SSPM3 // bit 3
1405 #define CKP SSPCONbits.CKP // bit 4
1406 #define SSPEN SSPCONbits.SSPEN // bit 5
1407 #define SSPOV SSPCONbits.SSPOV // bit 6
1408 #define WCOL SSPCONbits.WCOL // bit 7
1409
1410 #define BF SSPSTATbits.BF // bit 0
1411 #define UA SSPSTATbits.UA // bit 1
1412 #define R_NOT_W SSPSTATbits.R_NOT_W // bit 2, shadows bit in SSPSTATbits
1413 #define R SSPSTATbits.R // bit 2, shadows bit in SSPSTATbits
1414 #define I2C_READ SSPSTATbits.I2C_READ // bit 2, shadows bit in SSPSTATbits
1415 #define NOT_W SSPSTATbits.NOT_W // bit 2, shadows bit in SSPSTATbits
1416 #define NOT_WRITE SSPSTATbits.NOT_WRITE // bit 2, shadows bit in SSPSTATbits
1417 #define R_W SSPSTATbits.R_W // bit 2, shadows bit in SSPSTATbits
1418 #define READ_WRITE SSPSTATbits.READ_WRITE // bit 2, shadows bit in SSPSTATbits
1419 #define S SSPSTATbits.S // bit 3, shadows bit in SSPSTATbits
1420 #define I2C_START SSPSTATbits.I2C_START // bit 3, shadows bit in SSPSTATbits
1421 #define P SSPSTATbits.P // bit 4, shadows bit in SSPSTATbits
1422 #define I2C_STOP SSPSTATbits.I2C_STOP // bit 4, shadows bit in SSPSTATbits
1423 #define D_NOT_A SSPSTATbits.D_NOT_A // bit 5, shadows bit in SSPSTATbits
1424 #define D SSPSTATbits.D // bit 5, shadows bit in SSPSTATbits
1425 #define I2C_DATA SSPSTATbits.I2C_DATA // bit 5, shadows bit in SSPSTATbits
1426 #define NOT_A SSPSTATbits.NOT_A // bit 5, shadows bit in SSPSTATbits
1427 #define NOT_ADDRESS SSPSTATbits.NOT_ADDRESS // bit 5, shadows bit in SSPSTATbits
1428 #define D_A SSPSTATbits.D_A // bit 5, shadows bit in SSPSTATbits
1429 #define DATA_ADDRESS SSPSTATbits.DATA_ADDRESS // bit 5, shadows bit in SSPSTATbits
1430 #define CKE SSPSTATbits.CKE // bit 6
1431 #define SMP SSPSTATbits.SMP // bit 7
1432
1433 #define C STATUSbits.C // bit 0
1434 #define DC STATUSbits.DC // bit 1
1435 #define Z STATUSbits.Z // bit 2
1436 #define NOT_PD STATUSbits.NOT_PD // bit 3
1437 #define NOT_TO STATUSbits.NOT_TO // bit 4
1438 #define RP0 STATUSbits.RP0 // bit 5
1439 #define RP1 STATUSbits.RP1 // bit 6
1440 #define IRP STATUSbits.IRP // bit 7
1441
1442 #define TMR1ON T1CONbits.TMR1ON // bit 0
1443 #define TMR1CS T1CONbits.TMR1CS // bit 1
1444 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits
1445 #define T1INSYNC T1CONbits.T1INSYNC // bit 2, shadows bit in T1CONbits
1446 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1447 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1448 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1449 #define T1RUN T1CONbits.T1RUN // bit 6
1450
1451 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1452 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1453 #define TMR2ON T2CONbits.TMR2ON // bit 2
1454 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1455 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1456 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1457 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1458
1459 #define TRISA0 TRISAbits.TRISA0 // bit 0
1460 #define TRISA1 TRISAbits.TRISA1 // bit 1
1461 #define TRISA2 TRISAbits.TRISA2 // bit 2
1462 #define TRISA3 TRISAbits.TRISA3 // bit 3
1463 #define TRISA4 TRISAbits.TRISA4 // bit 4
1464 #define TRISA5 TRISAbits.TRISA5 // bit 5
1465 #define TRISA6 TRISAbits.TRISA6 // bit 6
1466 #define TRISA7 TRISAbits.TRISA7 // bit 7
1467
1468 #define TRISB0 TRISBbits.TRISB0 // bit 0
1469 #define TRISB1 TRISBbits.TRISB1 // bit 1
1470 #define TRISB2 TRISBbits.TRISB2 // bit 2
1471 #define TRISB3 TRISBbits.TRISB3 // bit 3
1472 #define TRISB4 TRISBbits.TRISB4 // bit 4
1473 #define TRISB5 TRISBbits.TRISB5 // bit 5
1474 #define TRISB6 TRISBbits.TRISB6 // bit 6
1475 #define TRISB7 TRISBbits.TRISB7 // bit 7
1476
1477 #define TX9D TXSTAbits.TX9D // bit 0, shadows bit in TXSTAbits
1478 #define TXD8 TXSTAbits.TXD8 // bit 0, shadows bit in TXSTAbits
1479 #define TRMT TXSTAbits.TRMT // bit 1
1480 #define BRGH TXSTAbits.BRGH // bit 2
1481 #define SYNC TXSTAbits.SYNC // bit 4
1482 #define TXEN TXSTAbits.TXEN // bit 5
1483 #define TX9 TXSTAbits.TX9 // bit 6, shadows bit in TXSTAbits
1484 #define NOT_TX8 TXSTAbits.NOT_TX8 // bit 6, shadows bit in TXSTAbits
1485 #define TX8_9 TXSTAbits.TX8_9 // bit 6, shadows bit in TXSTAbits
1486 #define CSRC TXSTAbits.CSRC // bit 7
1487
1488 #define SWDTEN WDTCONbits.SWDTEN // bit 0, shadows bit in WDTCONbits
1489 #define SWDTE WDTCONbits.SWDTE // bit 0, shadows bit in WDTCONbits
1490 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
1491 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
1492 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
1493 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
1494
1495 #endif // #ifndef NO_BIT_DEFINES
1496
1497 #endif // #ifndef __PIC16F87_H__
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