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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16f872.h
blob5ff6cc96864c21c01485b8f8aa690a65374721a1
1 /*
2 * This declarations of the PIC16F872 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:59 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16F872_H__
26 #define __PIC16F872_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PCLATH_ADDR 0x000A
45 #define INTCON_ADDR 0x000B
46 #define PIR1_ADDR 0x000C
47 #define PIR2_ADDR 0x000D
48 #define TMR1_ADDR 0x000E
49 #define TMR1L_ADDR 0x000E
50 #define TMR1H_ADDR 0x000F
51 #define T1CON_ADDR 0x0010
52 #define TMR2_ADDR 0x0011
53 #define T2CON_ADDR 0x0012
54 #define SSPBUF_ADDR 0x0013
55 #define SSPCON_ADDR 0x0014
56 #define CCPR1_ADDR 0x0015
57 #define CCPR1L_ADDR 0x0015
58 #define CCPR1H_ADDR 0x0016
59 #define CCP1CON_ADDR 0x0017
60 #define ADRESH_ADDR 0x001E
61 #define ADCON0_ADDR 0x001F
62 #define OPTION_REG_ADDR 0x0081
63 #define TRISA_ADDR 0x0085
64 #define TRISB_ADDR 0x0086
65 #define TRISC_ADDR 0x0087
66 #define PIE1_ADDR 0x008C
67 #define PIE2_ADDR 0x008D
68 #define PCON_ADDR 0x008E
69 #define SSPCON2_ADDR 0x0091
70 #define PR2_ADDR 0x0092
71 #define SSPADD_ADDR 0x0093
72 #define SSPSTAT_ADDR 0x0094
73 #define ADRESL_ADDR 0x009E
74 #define ADCON1_ADDR 0x009F
75 #define EEDATA_ADDR 0x010C
76 #define EEADR_ADDR 0x010D
77 #define EEDATH_ADDR 0x010E
78 #define EEADRH_ADDR 0x010F
79 #define EECON1_ADDR 0x018C
80 #define EECON2_ADDR 0x018D
81
82 #endif // #ifndef NO_ADDR_DEFINES
83
84 //==============================================================================
85 //
86 // Register Definitions
87 //
88 //==============================================================================
89
90 extern __at(0x0000) __sfr INDF;
91 extern __at(0x0001) __sfr TMR0;
92 extern __at(0x0002) __sfr PCL;
93
94 //==============================================================================
95 // STATUS Bits
96
97 extern __at(0x0003) __sfr STATUS;
98
99 typedef union
100 {
101 struct
102 {
103 unsigned C : 1;
104 unsigned DC : 1;
105 unsigned Z : 1;
106 unsigned NOT_PD : 1;
107 unsigned NOT_TO : 1;
108 unsigned RP0 : 1;
109 unsigned RP1 : 1;
110 unsigned IRP : 1;
111 };
112
113 struct
114 {
115 unsigned : 5;
116 unsigned RP : 2;
117 unsigned : 1;
118 };
119 } __STATUSbits_t;
120
121 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
122
123 #define _C 0x01
124 #define _DC 0x02
125 #define _Z 0x04
126 #define _NOT_PD 0x08
127 #define _NOT_TO 0x10
128 #define _RP0 0x20
129 #define _RP1 0x40
130 #define _IRP 0x80
131
132 //==============================================================================
133
134 extern __at(0x0004) __sfr FSR;
135
136 //==============================================================================
137 // PORTA Bits
138
139 extern __at(0x0005) __sfr PORTA;
140
141 typedef union
142 {
143 struct
144 {
145 unsigned RA0 : 1;
146 unsigned RA1 : 1;
147 unsigned RA2 : 1;
148 unsigned RA3 : 1;
149 unsigned RA4 : 1;
150 unsigned RA5 : 1;
151 unsigned : 1;
152 unsigned : 1;
153 };
154
155 struct
156 {
157 unsigned RA : 6;
158 unsigned : 2;
159 };
160 } __PORTAbits_t;
161
162 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
163
164 #define _RA0 0x01
165 #define _RA1 0x02
166 #define _RA2 0x04
167 #define _RA3 0x08
168 #define _RA4 0x10
169 #define _RA5 0x20
170
171 //==============================================================================
172
173
174 //==============================================================================
175 // PORTB Bits
176
177 extern __at(0x0006) __sfr PORTB;
178
179 typedef struct
180 {
181 unsigned RB0 : 1;
182 unsigned RB1 : 1;
183 unsigned RB2 : 1;
184 unsigned RB3 : 1;
185 unsigned RB4 : 1;
186 unsigned RB5 : 1;
187 unsigned RB6 : 1;
188 unsigned RB7 : 1;
189 } __PORTBbits_t;
190
191 extern __at(0x0006) volatile __PORTBbits_t PORTBbits;
192
193 #define _RB0 0x01
194 #define _RB1 0x02
195 #define _RB2 0x04
196 #define _RB3 0x08
197 #define _RB4 0x10
198 #define _RB5 0x20
199 #define _RB6 0x40
200 #define _RB7 0x80
201
202 //==============================================================================
203
204
205 //==============================================================================
206 // PORTC Bits
207
208 extern __at(0x0007) __sfr PORTC;
209
210 typedef struct
211 {
212 unsigned RC0 : 1;
213 unsigned RC1 : 1;
214 unsigned RC2 : 1;
215 unsigned RC3 : 1;
216 unsigned RC4 : 1;
217 unsigned RC5 : 1;
218 unsigned RC6 : 1;
219 unsigned RC7 : 1;
220 } __PORTCbits_t;
221
222 extern __at(0x0007) volatile __PORTCbits_t PORTCbits;
223
224 #define _RC0 0x01
225 #define _RC1 0x02
226 #define _RC2 0x04
227 #define _RC3 0x08
228 #define _RC4 0x10
229 #define _RC5 0x20
230 #define _RC6 0x40
231 #define _RC7 0x80
232
233 //==============================================================================
234
235 extern __at(0x000A) __sfr PCLATH;
236
237 //==============================================================================
238 // INTCON Bits
239
240 extern __at(0x000B) __sfr INTCON;
241
242 typedef union
243 {
244 struct
245 {
246 unsigned RBIF : 1;
247 unsigned INTF : 1;
248 unsigned TMR0IF : 1;
249 unsigned RBIE : 1;
250 unsigned INTE : 1;
251 unsigned TMR0IE : 1;
252 unsigned PEIE : 1;
253 unsigned GIE : 1;
254 };
255
256 struct
257 {
258 unsigned : 1;
259 unsigned : 1;
260 unsigned T0IF : 1;
261 unsigned : 1;
262 unsigned : 1;
263 unsigned T0IE : 1;
264 unsigned : 1;
265 unsigned : 1;
266 };
267 } __INTCONbits_t;
268
269 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
270
271 #define _RBIF 0x01
272 #define _INTF 0x02
273 #define _TMR0IF 0x04
274 #define _T0IF 0x04
275 #define _RBIE 0x08
276 #define _INTE 0x10
277 #define _TMR0IE 0x20
278 #define _T0IE 0x20
279 #define _PEIE 0x40
280 #define _GIE 0x80
281
282 //==============================================================================
283
284
285 //==============================================================================
286 // PIR1 Bits
287
288 extern __at(0x000C) __sfr PIR1;
289
290 typedef struct
291 {
292 unsigned TMR1IF : 1;
293 unsigned TMR2IF : 1;
294 unsigned CCP1IF : 1;
295 unsigned SSPIF : 1;
296 unsigned : 1;
297 unsigned : 1;
298 unsigned ADIF : 1;
299 unsigned : 1;
300 } __PIR1bits_t;
301
302 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
303
304 #define _TMR1IF 0x01
305 #define _TMR2IF 0x02
306 #define _CCP1IF 0x04
307 #define _SSPIF 0x08
308 #define _ADIF 0x40
309
310 //==============================================================================
311
312
313 //==============================================================================
314 // PIR2 Bits
315
316 extern __at(0x000D) __sfr PIR2;
317
318 typedef struct
319 {
320 unsigned : 1;
321 unsigned : 1;
322 unsigned : 1;
323 unsigned BCLIF : 1;
324 unsigned EEIF : 1;
325 unsigned : 1;
326 unsigned : 1;
327 unsigned : 1;
328 } __PIR2bits_t;
329
330 extern __at(0x000D) volatile __PIR2bits_t PIR2bits;
331
332 #define _BCLIF 0x08
333 #define _EEIF 0x10
334
335 //==============================================================================
336
337 extern __at(0x000E) __sfr TMR1;
338 extern __at(0x000E) __sfr TMR1L;
339 extern __at(0x000F) __sfr TMR1H;
340
341 //==============================================================================
342 // T1CON Bits
343
344 extern __at(0x0010) __sfr T1CON;
345
346 typedef union
347 {
348 struct
349 {
350 unsigned TMR1ON : 1;
351 unsigned TMR1CS : 1;
352 unsigned NOT_T1SYNC : 1;
353 unsigned T1OSCEN : 1;
354 unsigned T1CKPS0 : 1;
355 unsigned T1CKPS1 : 1;
356 unsigned : 1;
357 unsigned : 1;
358 };
359
360 struct
361 {
362 unsigned : 1;
363 unsigned : 1;
364 unsigned T1INSYNC : 1;
365 unsigned : 1;
366 unsigned : 1;
367 unsigned : 1;
368 unsigned : 1;
369 unsigned : 1;
370 };
371
372 struct
373 {
374 unsigned : 1;
375 unsigned : 1;
376 unsigned T1SYNC : 1;
377 unsigned : 1;
378 unsigned : 1;
379 unsigned : 1;
380 unsigned : 1;
381 unsigned : 1;
382 };
383
384 struct
385 {
386 unsigned : 4;
387 unsigned T1CKPS : 2;
388 unsigned : 2;
389 };
390 } __T1CONbits_t;
391
392 extern __at(0x0010) volatile __T1CONbits_t T1CONbits;
393
394 #define _TMR1ON 0x01
395 #define _TMR1CS 0x02
396 #define _NOT_T1SYNC 0x04
397 #define _T1INSYNC 0x04
398 #define _T1SYNC 0x04
399 #define _T1OSCEN 0x08
400 #define _T1CKPS0 0x10
401 #define _T1CKPS1 0x20
402
403 //==============================================================================
404
405 extern __at(0x0011) __sfr TMR2;
406
407 //==============================================================================
408 // T2CON Bits
409
410 extern __at(0x0012) __sfr T2CON;
411
412 typedef union
413 {
414 struct
415 {
416 unsigned T2CKPS0 : 1;
417 unsigned T2CKPS1 : 1;
418 unsigned TMR2ON : 1;
419 unsigned TOUTPS0 : 1;
420 unsigned TOUTPS1 : 1;
421 unsigned TOUTPS2 : 1;
422 unsigned TOUTPS3 : 1;
423 unsigned : 1;
424 };
425
426 struct
427 {
428 unsigned T2CKPS : 2;
429 unsigned : 6;
430 };
431
432 struct
433 {
434 unsigned : 3;
435 unsigned TOUTPS : 4;
436 unsigned : 1;
437 };
438 } __T2CONbits_t;
439
440 extern __at(0x0012) volatile __T2CONbits_t T2CONbits;
441
442 #define _T2CKPS0 0x01
443 #define _T2CKPS1 0x02
444 #define _TMR2ON 0x04
445 #define _TOUTPS0 0x08
446 #define _TOUTPS1 0x10
447 #define _TOUTPS2 0x20
448 #define _TOUTPS3 0x40
449
450 //==============================================================================
451
452 extern __at(0x0013) __sfr SSPBUF;
453
454 //==============================================================================
455 // SSPCON Bits
456
457 extern __at(0x0014) __sfr SSPCON;
458
459 typedef union
460 {
461 struct
462 {
463 unsigned SSPM0 : 1;
464 unsigned SSPM1 : 1;
465 unsigned SSPM2 : 1;
466 unsigned SSPM3 : 1;
467 unsigned CKP : 1;
468 unsigned SSPEN : 1;
469 unsigned SSPOV : 1;
470 unsigned WCOL : 1;
471 };
472
473 struct
474 {
475 unsigned SSPM : 4;
476 unsigned : 4;
477 };
478 } __SSPCONbits_t;
479
480 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits;
481
482 #define _SSPM0 0x01
483 #define _SSPM1 0x02
484 #define _SSPM2 0x04
485 #define _SSPM3 0x08
486 #define _CKP 0x10
487 #define _SSPEN 0x20
488 #define _SSPOV 0x40
489 #define _WCOL 0x80
490
491 //==============================================================================
492
493 extern __at(0x0015) __sfr CCPR1;
494 extern __at(0x0015) __sfr CCPR1L;
495 extern __at(0x0016) __sfr CCPR1H;
496
497 //==============================================================================
498 // CCP1CON Bits
499
500 extern __at(0x0017) __sfr CCP1CON;
501
502 typedef union
503 {
504 struct
505 {
506 unsigned CCP1M0 : 1;
507 unsigned CCP1M1 : 1;
508 unsigned CCP1M2 : 1;
509 unsigned CCP1M3 : 1;
510 unsigned CCP1Y : 1;
511 unsigned CCP1X : 1;
512 unsigned : 1;
513 unsigned : 1;
514 };
515
516 struct
517 {
518 unsigned CCP1M : 4;
519 unsigned : 4;
520 };
521 } __CCP1CONbits_t;
522
523 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits;
524
525 #define _CCP1M0 0x01
526 #define _CCP1M1 0x02
527 #define _CCP1M2 0x04
528 #define _CCP1M3 0x08
529 #define _CCP1Y 0x10
530 #define _CCP1X 0x20
531
532 //==============================================================================
533
534 extern __at(0x001E) __sfr ADRESH;
535
536 //==============================================================================
537 // ADCON0 Bits
538
539 extern __at(0x001F) __sfr ADCON0;
540
541 typedef union
542 {
543 struct
544 {
545 unsigned ADON : 1;
546 unsigned : 1;
547 unsigned GO_NOT_DONE : 1;
548 unsigned CHS0 : 1;
549 unsigned CHS1 : 1;
550 unsigned CHS2 : 1;
551 unsigned ADCS0 : 1;
552 unsigned ADCS1 : 1;
553 };
554
555 struct
556 {
557 unsigned : 1;
558 unsigned : 1;
559 unsigned GO : 1;
560 unsigned : 1;
561 unsigned : 1;
562 unsigned : 1;
563 unsigned : 1;
564 unsigned : 1;
565 };
566
567 struct
568 {
569 unsigned : 1;
570 unsigned : 1;
571 unsigned NOT_DONE : 1;
572 unsigned : 1;
573 unsigned : 1;
574 unsigned : 1;
575 unsigned : 1;
576 unsigned : 1;
577 };
578
579 struct
580 {
581 unsigned : 1;
582 unsigned : 1;
583 unsigned GO_DONE : 1;
584 unsigned : 1;
585 unsigned : 1;
586 unsigned : 1;
587 unsigned : 1;
588 unsigned : 1;
589 };
590
591 struct
592 {
593 unsigned : 3;
594 unsigned CHS : 3;
595 unsigned : 2;
596 };
597
598 struct
599 {
600 unsigned : 6;
601 unsigned ADCS : 2;
602 };
603 } __ADCON0bits_t;
604
605 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits;
606
607 #define _ADON 0x01
608 #define _GO_NOT_DONE 0x04
609 #define _GO 0x04
610 #define _NOT_DONE 0x04
611 #define _GO_DONE 0x04
612 #define _CHS0 0x08
613 #define _CHS1 0x10
614 #define _CHS2 0x20
615 #define _ADCS0 0x40
616 #define _ADCS1 0x80
617
618 //==============================================================================
619
620
621 //==============================================================================
622 // OPTION_REG Bits
623
624 extern __at(0x0081) __sfr OPTION_REG;
625
626 typedef union
627 {
628 struct
629 {
630 unsigned PS0 : 1;
631 unsigned PS1 : 1;
632 unsigned PS2 : 1;
633 unsigned PSA : 1;
634 unsigned T0SE : 1;
635 unsigned T0CS : 1;
636 unsigned INTEDG : 1;
637 unsigned NOT_RBPU : 1;
638 };
639
640 struct
641 {
642 unsigned PS : 3;
643 unsigned : 5;
644 };
645 } __OPTION_REGbits_t;
646
647 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
648
649 #define _PS0 0x01
650 #define _PS1 0x02
651 #define _PS2 0x04
652 #define _PSA 0x08
653 #define _T0SE 0x10
654 #define _T0CS 0x20
655 #define _INTEDG 0x40
656 #define _NOT_RBPU 0x80
657
658 //==============================================================================
659
660
661 //==============================================================================
662 // TRISA Bits
663
664 extern __at(0x0085) __sfr TRISA;
665
666 typedef union
667 {
668 struct
669 {
670 unsigned TRISA0 : 1;
671 unsigned TRISA1 : 1;
672 unsigned TRISA2 : 1;
673 unsigned TRISA3 : 1;
674 unsigned TRISA4 : 1;
675 unsigned TRISA5 : 1;
676 unsigned : 1;
677 unsigned : 1;
678 };
679
680 struct
681 {
682 unsigned TRISA : 6;
683 unsigned : 2;
684 };
685 } __TRISAbits_t;
686
687 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
688
689 #define _TRISA0 0x01
690 #define _TRISA1 0x02
691 #define _TRISA2 0x04
692 #define _TRISA3 0x08
693 #define _TRISA4 0x10
694 #define _TRISA5 0x20
695
696 //==============================================================================
697
698
699 //==============================================================================
700 // TRISB Bits
701
702 extern __at(0x0086) __sfr TRISB;
703
704 typedef struct
705 {
706 unsigned TRISB0 : 1;
707 unsigned TRISB1 : 1;
708 unsigned TRISB2 : 1;
709 unsigned TRISB3 : 1;
710 unsigned TRISB4 : 1;
711 unsigned TRISB5 : 1;
712 unsigned TRISB6 : 1;
713 unsigned TRISB7 : 1;
714 } __TRISBbits_t;
715
716 extern __at(0x0086) volatile __TRISBbits_t TRISBbits;
717
718 #define _TRISB0 0x01
719 #define _TRISB1 0x02
720 #define _TRISB2 0x04
721 #define _TRISB3 0x08
722 #define _TRISB4 0x10
723 #define _TRISB5 0x20
724 #define _TRISB6 0x40
725 #define _TRISB7 0x80
726
727 //==============================================================================
728
729
730 //==============================================================================
731 // TRISC Bits
732
733 extern __at(0x0087) __sfr TRISC;
734
735 typedef struct
736 {
737 unsigned TRISC0 : 1;
738 unsigned TRISC1 : 1;
739 unsigned TRISC2 : 1;
740 unsigned TRISC3 : 1;
741 unsigned TRISC4 : 1;
742 unsigned TRISC5 : 1;
743 unsigned TRISC6 : 1;
744 unsigned TRISC7 : 1;
745 } __TRISCbits_t;
746
747 extern __at(0x0087) volatile __TRISCbits_t TRISCbits;
748
749 #define _TRISC0 0x01
750 #define _TRISC1 0x02
751 #define _TRISC2 0x04
752 #define _TRISC3 0x08
753 #define _TRISC4 0x10
754 #define _TRISC5 0x20
755 #define _TRISC6 0x40
756 #define _TRISC7 0x80
757
758 //==============================================================================
759
760
761 //==============================================================================
762 // PIE1 Bits
763
764 extern __at(0x008C) __sfr PIE1;
765
766 typedef struct
767 {
768 unsigned TMR1IE : 1;
769 unsigned TMR2IE : 1;
770 unsigned CCP1IE : 1;
771 unsigned SSPIE : 1;
772 unsigned : 1;
773 unsigned : 1;
774 unsigned ADIE : 1;
775 unsigned : 1;
776 } __PIE1bits_t;
777
778 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
779
780 #define _TMR1IE 0x01
781 #define _TMR2IE 0x02
782 #define _CCP1IE 0x04
783 #define _SSPIE 0x08
784 #define _ADIE 0x40
785
786 //==============================================================================
787
788
789 //==============================================================================
790 // PIE2 Bits
791
792 extern __at(0x008D) __sfr PIE2;
793
794 typedef struct
795 {
796 unsigned : 1;
797 unsigned : 1;
798 unsigned : 1;
799 unsigned BCLIE : 1;
800 unsigned EEIE : 1;
801 unsigned : 1;
802 unsigned : 1;
803 unsigned : 1;
804 } __PIE2bits_t;
805
806 extern __at(0x008D) volatile __PIE2bits_t PIE2bits;
807
808 #define _BCLIE 0x08
809 #define _EEIE 0x10
810
811 //==============================================================================
812
813
814 //==============================================================================
815 // PCON Bits
816
817 extern __at(0x008E) __sfr PCON;
818
819 typedef union
820 {
821 struct
822 {
823 unsigned NOT_BOR : 1;
824 unsigned NOT_POR : 1;
825 unsigned : 1;
826 unsigned : 1;
827 unsigned : 1;
828 unsigned : 1;
829 unsigned : 1;
830 unsigned : 1;
831 };
832
833 struct
834 {
835 unsigned NOT_BO : 1;
836 unsigned : 1;
837 unsigned : 1;
838 unsigned : 1;
839 unsigned : 1;
840 unsigned : 1;
841 unsigned : 1;
842 unsigned : 1;
843 };
844 } __PCONbits_t;
845
846 extern __at(0x008E) volatile __PCONbits_t PCONbits;
847
848 #define _NOT_BOR 0x01
849 #define _NOT_BO 0x01
850 #define _NOT_POR 0x02
851
852 //==============================================================================
853
854
855 //==============================================================================
856 // SSPCON2 Bits
857
858 extern __at(0x0091) __sfr SSPCON2;
859
860 typedef struct
861 {
862 unsigned SEN : 1;
863 unsigned RSEN : 1;
864 unsigned PEN : 1;
865 unsigned RCEN : 1;
866 unsigned ACKEN : 1;
867 unsigned ACKDT : 1;
868 unsigned ACKSTAT : 1;
869 unsigned GCEN : 1;
870 } __SSPCON2bits_t;
871
872 extern __at(0x0091) volatile __SSPCON2bits_t SSPCON2bits;
873
874 #define _SEN 0x01
875 #define _RSEN 0x02
876 #define _PEN 0x04
877 #define _RCEN 0x08
878 #define _ACKEN 0x10
879 #define _ACKDT 0x20
880 #define _ACKSTAT 0x40
881 #define _GCEN 0x80
882
883 //==============================================================================
884
885 extern __at(0x0092) __sfr PR2;
886 extern __at(0x0093) __sfr SSPADD;
887
888 //==============================================================================
889 // SSPSTAT Bits
890
891 extern __at(0x0094) __sfr SSPSTAT;
892
893 typedef union
894 {
895 struct
896 {
897 unsigned BF : 1;
898 unsigned UA : 1;
899 unsigned R_NOT_W : 1;
900 unsigned S : 1;
901 unsigned P : 1;
902 unsigned D_NOT_A : 1;
903 unsigned CKE : 1;
904 unsigned SMP : 1;
905 };
906
907 struct
908 {
909 unsigned : 1;
910 unsigned : 1;
911 unsigned R : 1;
912 unsigned I2C_START : 1;
913 unsigned I2C_STOP : 1;
914 unsigned D : 1;
915 unsigned : 1;
916 unsigned : 1;
917 };
918
919 struct
920 {
921 unsigned : 1;
922 unsigned : 1;
923 unsigned I2C_READ : 1;
924 unsigned : 1;
925 unsigned : 1;
926 unsigned I2C_DATA : 1;
927 unsigned : 1;
928 unsigned : 1;
929 };
930
931 struct
932 {
933 unsigned : 1;
934 unsigned : 1;
935 unsigned NOT_W : 1;
936 unsigned : 1;
937 unsigned : 1;
938 unsigned NOT_A : 1;
939 unsigned : 1;
940 unsigned : 1;
941 };
942
943 struct
944 {
945 unsigned : 1;
946 unsigned : 1;
947 unsigned NOT_WRITE : 1;
948 unsigned : 1;
949 unsigned : 1;
950 unsigned NOT_ADDRESS : 1;
951 unsigned : 1;
952 unsigned : 1;
953 };
954
955 struct
956 {
957 unsigned : 1;
958 unsigned : 1;
959 unsigned R_W : 1;
960 unsigned : 1;
961 unsigned : 1;
962 unsigned D_A : 1;
963 unsigned : 1;
964 unsigned : 1;
965 };
966
967 struct
968 {
969 unsigned : 1;
970 unsigned : 1;
971 unsigned READ_WRITE : 1;
972 unsigned : 1;
973 unsigned : 1;
974 unsigned DATA_ADDRESS : 1;
975 unsigned : 1;
976 unsigned : 1;
977 };
978 } __SSPSTATbits_t;
979
980 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits;
981
982 #define _BF 0x01
983 #define _UA 0x02
984 #define _R_NOT_W 0x04
985 #define _R 0x04
986 #define _I2C_READ 0x04
987 #define _NOT_W 0x04
988 #define _NOT_WRITE 0x04
989 #define _R_W 0x04
990 #define _READ_WRITE 0x04
991 #define _S 0x08
992 #define _I2C_START 0x08
993 #define _P 0x10
994 #define _I2C_STOP 0x10
995 #define _D_NOT_A 0x20
996 #define _D 0x20
997 #define _I2C_DATA 0x20
998 #define _NOT_A 0x20
999 #define _NOT_ADDRESS 0x20
1000 #define _D_A 0x20
1001 #define _DATA_ADDRESS 0x20
1002 #define _CKE 0x40
1003 #define _SMP 0x80
1004
1005 //==============================================================================
1006
1007 extern __at(0x009E) __sfr ADRESL;
1008
1009 //==============================================================================
1010 // ADCON1 Bits
1011
1012 extern __at(0x009F) __sfr ADCON1;
1013
1014 typedef union
1015 {
1016 struct
1017 {
1018 unsigned PCFG0 : 1;
1019 unsigned PCFG1 : 1;
1020 unsigned PCFG2 : 1;
1021 unsigned PCFG3 : 1;
1022 unsigned : 1;
1023 unsigned : 1;
1024 unsigned : 1;
1025 unsigned ADFM : 1;
1026 };
1027
1028 struct
1029 {
1030 unsigned PCFG : 4;
1031 unsigned : 4;
1032 };
1033 } __ADCON1bits_t;
1034
1035 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits;
1036
1037 #define _PCFG0 0x01
1038 #define _PCFG1 0x02
1039 #define _PCFG2 0x04
1040 #define _PCFG3 0x08
1041 #define _ADFM 0x80
1042
1043 //==============================================================================
1044
1045 extern __at(0x010C) __sfr EEDATA;
1046 extern __at(0x010D) __sfr EEADR;
1047 extern __at(0x010E) __sfr EEDATH;
1048 extern __at(0x010F) __sfr EEADRH;
1049
1050 //==============================================================================
1051 // EECON1 Bits
1052
1053 extern __at(0x018C) __sfr EECON1;
1054
1055 typedef struct
1056 {
1057 unsigned RD : 1;
1058 unsigned WR : 1;
1059 unsigned WREN : 1;
1060 unsigned WRERR : 1;
1061 unsigned : 1;
1062 unsigned : 1;
1063 unsigned : 1;
1064 unsigned EEPGD : 1;
1065 } __EECON1bits_t;
1066
1067 extern __at(0x018C) volatile __EECON1bits_t EECON1bits;
1068
1069 #define _RD 0x01
1070 #define _WR 0x02
1071 #define _WREN 0x04
1072 #define _WRERR 0x08
1073 #define _EEPGD 0x80
1074
1075 //==============================================================================
1076
1077 extern __at(0x018D) __sfr EECON2;
1078
1079 //==============================================================================
1080 //
1081 // Configuration Bits
1082 //
1083 //==============================================================================
1084
1085 #define _CONFIG 0x2007
1086
1087 //----------------------------- CONFIG Options -------------------------------
1088
1089 #define _FOSC_LP 0x3FFC // LP oscillator.
1090 #define _LP_OSC 0x3FFC // LP oscillator.
1091 #define _FOSC_XT 0x3FFD // XT oscillator.
1092 #define _XT_OSC 0x3FFD // XT oscillator.
1093 #define _FOSC_HS 0x3FFE // HS oscillator.
1094 #define _HS_OSC 0x3FFE // HS oscillator.
1095 #define _FOSC_EXTRC 0x3FFF // RC oscillator.
1096 #define _RC_OSC 0x3FFF // RC oscillator.
1097 #define _WDTE_OFF 0x3FFB // WDT disabled.
1098 #define _WDT_OFF 0x3FFB // WDT disabled.
1099 #define _WDTE_ON 0x3FFF // WDT enabled.
1100 #define _WDT_ON 0x3FFF // WDT enabled.
1101 #define _PWRTE_ON 0x3FF7 // PWRT enabled.
1102 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1103 #define _CP_ON 0x0FCF // All memory code protected.
1104 #define _CP_ALL 0x0FCF // All memory code protected.
1105 #define _CP_OFF 0x3FFF // Code protection off.
1106 #define _BOREN_OFF 0x3FBF // BOR disabled.
1107 #define _BODEN_OFF 0x3FBF // BOR disabled.
1108 #define _BOREN_ON 0x3FFF // BOR enabled.
1109 #define _BODEN_ON 0x3FFF // BOR enabled.
1110 #define _LVP_OFF 0x3F7F // RB3 is digital I/O, HV on MCLR must be used for programming.
1111 #define _LVP_ON 0x3FFF // RB3/PGM pin has PGM function; low-voltage programming enabled.
1112 #define _CPD_ON 0x3EFF // Data EEPROM memory code-protected.
1113 #define _CPD_OFF 0x3FFF // Code Protection off.
1114 #define _WRT_OFF 0x3DFF // Unprotected program memory may not be written to by EECON control.
1115 #define _WRT_ENABLE_OFF 0x3DFF // Unprotected program memory may not be written to by EECON control.
1116 #define _WRT_ALL 0x3FFF // Unprotected program memory may be written to by EECON control.
1117 #define _WRT_ENABLE_ON 0x3FFF // Unprotected program memory may be written to by EECON control.
1118 #define _DEBUG_ON 0x37FF // In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger.
1119 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins.
1120
1121 //==============================================================================
1122
1123 #define _DEVID1 0x2006
1124
1125 #define _IDLOC0 0x2000
1126 #define _IDLOC1 0x2001
1127 #define _IDLOC2 0x2002
1128 #define _IDLOC3 0x2003
1129
1130 //==============================================================================
1131
1132 #ifndef NO_BIT_DEFINES
1133
1134 #define ADON ADCON0bits.ADON // bit 0
1135 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 2, shadows bit in ADCON0bits
1136 #define GO ADCON0bits.GO // bit 2, shadows bit in ADCON0bits
1137 #define NOT_DONE ADCON0bits.NOT_DONE // bit 2, shadows bit in ADCON0bits
1138 #define GO_DONE ADCON0bits.GO_DONE // bit 2, shadows bit in ADCON0bits
1139 #define CHS0 ADCON0bits.CHS0 // bit 3
1140 #define CHS1 ADCON0bits.CHS1 // bit 4
1141 #define CHS2 ADCON0bits.CHS2 // bit 5
1142 #define ADCS0 ADCON0bits.ADCS0 // bit 6
1143 #define ADCS1 ADCON0bits.ADCS1 // bit 7
1144
1145 #define PCFG0 ADCON1bits.PCFG0 // bit 0
1146 #define PCFG1 ADCON1bits.PCFG1 // bit 1
1147 #define PCFG2 ADCON1bits.PCFG2 // bit 2
1148 #define PCFG3 ADCON1bits.PCFG3 // bit 3
1149 #define ADFM ADCON1bits.ADFM // bit 7
1150
1151 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1152 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1153 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1154 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1155 #define CCP1Y CCP1CONbits.CCP1Y // bit 4
1156 #define CCP1X CCP1CONbits.CCP1X // bit 5
1157
1158 #define RD EECON1bits.RD // bit 0
1159 #define WR EECON1bits.WR // bit 1
1160 #define WREN EECON1bits.WREN // bit 2
1161 #define WRERR EECON1bits.WRERR // bit 3
1162 #define EEPGD EECON1bits.EEPGD // bit 7
1163
1164 #define RBIF INTCONbits.RBIF // bit 0
1165 #define INTF INTCONbits.INTF // bit 1
1166 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
1167 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
1168 #define RBIE INTCONbits.RBIE // bit 3
1169 #define INTE INTCONbits.INTE // bit 4
1170 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
1171 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
1172 #define PEIE INTCONbits.PEIE // bit 6
1173 #define GIE INTCONbits.GIE // bit 7
1174
1175 #define PS0 OPTION_REGbits.PS0 // bit 0
1176 #define PS1 OPTION_REGbits.PS1 // bit 1
1177 #define PS2 OPTION_REGbits.PS2 // bit 2
1178 #define PSA OPTION_REGbits.PSA // bit 3
1179 #define T0SE OPTION_REGbits.T0SE // bit 4
1180 #define T0CS OPTION_REGbits.T0CS // bit 5
1181 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1182 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
1183
1184 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1185 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
1186 #define NOT_POR PCONbits.NOT_POR // bit 1
1187
1188 #define TMR1IE PIE1bits.TMR1IE // bit 0
1189 #define TMR2IE PIE1bits.TMR2IE // bit 1
1190 #define CCP1IE PIE1bits.CCP1IE // bit 2
1191 #define SSPIE PIE1bits.SSPIE // bit 3
1192 #define ADIE PIE1bits.ADIE // bit 6
1193
1194 #define BCLIE PIE2bits.BCLIE // bit 3
1195 #define EEIE PIE2bits.EEIE // bit 4
1196
1197 #define TMR1IF PIR1bits.TMR1IF // bit 0
1198 #define TMR2IF PIR1bits.TMR2IF // bit 1
1199 #define CCP1IF PIR1bits.CCP1IF // bit 2
1200 #define SSPIF PIR1bits.SSPIF // bit 3
1201 #define ADIF PIR1bits.ADIF // bit 6
1202
1203 #define BCLIF PIR2bits.BCLIF // bit 3
1204 #define EEIF PIR2bits.EEIF // bit 4
1205
1206 #define RA0 PORTAbits.RA0 // bit 0
1207 #define RA1 PORTAbits.RA1 // bit 1
1208 #define RA2 PORTAbits.RA2 // bit 2
1209 #define RA3 PORTAbits.RA3 // bit 3
1210 #define RA4 PORTAbits.RA4 // bit 4
1211 #define RA5 PORTAbits.RA5 // bit 5
1212
1213 #define RB0 PORTBbits.RB0 // bit 0
1214 #define RB1 PORTBbits.RB1 // bit 1
1215 #define RB2 PORTBbits.RB2 // bit 2
1216 #define RB3 PORTBbits.RB3 // bit 3
1217 #define RB4 PORTBbits.RB4 // bit 4
1218 #define RB5 PORTBbits.RB5 // bit 5
1219 #define RB6 PORTBbits.RB6 // bit 6
1220 #define RB7 PORTBbits.RB7 // bit 7
1221
1222 #define RC0 PORTCbits.RC0 // bit 0
1223 #define RC1 PORTCbits.RC1 // bit 1
1224 #define RC2 PORTCbits.RC2 // bit 2
1225 #define RC3 PORTCbits.RC3 // bit 3
1226 #define RC4 PORTCbits.RC4 // bit 4
1227 #define RC5 PORTCbits.RC5 // bit 5
1228 #define RC6 PORTCbits.RC6 // bit 6
1229 #define RC7 PORTCbits.RC7 // bit 7
1230
1231 #define SSPM0 SSPCONbits.SSPM0 // bit 0
1232 #define SSPM1 SSPCONbits.SSPM1 // bit 1
1233 #define SSPM2 SSPCONbits.SSPM2 // bit 2
1234 #define SSPM3 SSPCONbits.SSPM3 // bit 3
1235 #define CKP SSPCONbits.CKP // bit 4
1236 #define SSPEN SSPCONbits.SSPEN // bit 5
1237 #define SSPOV SSPCONbits.SSPOV // bit 6
1238 #define WCOL SSPCONbits.WCOL // bit 7
1239
1240 #define SEN SSPCON2bits.SEN // bit 0
1241 #define RSEN SSPCON2bits.RSEN // bit 1
1242 #define PEN SSPCON2bits.PEN // bit 2
1243 #define RCEN SSPCON2bits.RCEN // bit 3
1244 #define ACKEN SSPCON2bits.ACKEN // bit 4
1245 #define ACKDT SSPCON2bits.ACKDT // bit 5
1246 #define ACKSTAT SSPCON2bits.ACKSTAT // bit 6
1247 #define GCEN SSPCON2bits.GCEN // bit 7
1248
1249 #define BF SSPSTATbits.BF // bit 0
1250 #define UA SSPSTATbits.UA // bit 1
1251 #define R_NOT_W SSPSTATbits.R_NOT_W // bit 2, shadows bit in SSPSTATbits
1252 #define R SSPSTATbits.R // bit 2, shadows bit in SSPSTATbits
1253 #define I2C_READ SSPSTATbits.I2C_READ // bit 2, shadows bit in SSPSTATbits
1254 #define NOT_W SSPSTATbits.NOT_W // bit 2, shadows bit in SSPSTATbits
1255 #define NOT_WRITE SSPSTATbits.NOT_WRITE // bit 2, shadows bit in SSPSTATbits
1256 #define R_W SSPSTATbits.R_W // bit 2, shadows bit in SSPSTATbits
1257 #define READ_WRITE SSPSTATbits.READ_WRITE // bit 2, shadows bit in SSPSTATbits
1258 #define S SSPSTATbits.S // bit 3, shadows bit in SSPSTATbits
1259 #define I2C_START SSPSTATbits.I2C_START // bit 3, shadows bit in SSPSTATbits
1260 #define P SSPSTATbits.P // bit 4, shadows bit in SSPSTATbits
1261 #define I2C_STOP SSPSTATbits.I2C_STOP // bit 4, shadows bit in SSPSTATbits
1262 #define D_NOT_A SSPSTATbits.D_NOT_A // bit 5, shadows bit in SSPSTATbits
1263 #define D SSPSTATbits.D // bit 5, shadows bit in SSPSTATbits
1264 #define I2C_DATA SSPSTATbits.I2C_DATA // bit 5, shadows bit in SSPSTATbits
1265 #define NOT_A SSPSTATbits.NOT_A // bit 5, shadows bit in SSPSTATbits
1266 #define NOT_ADDRESS SSPSTATbits.NOT_ADDRESS // bit 5, shadows bit in SSPSTATbits
1267 #define D_A SSPSTATbits.D_A // bit 5, shadows bit in SSPSTATbits
1268 #define DATA_ADDRESS SSPSTATbits.DATA_ADDRESS // bit 5, shadows bit in SSPSTATbits
1269 #define CKE SSPSTATbits.CKE // bit 6
1270 #define SMP SSPSTATbits.SMP // bit 7
1271
1272 #define C STATUSbits.C // bit 0
1273 #define DC STATUSbits.DC // bit 1
1274 #define Z STATUSbits.Z // bit 2
1275 #define NOT_PD STATUSbits.NOT_PD // bit 3
1276 #define NOT_TO STATUSbits.NOT_TO // bit 4
1277 #define RP0 STATUSbits.RP0 // bit 5
1278 #define RP1 STATUSbits.RP1 // bit 6
1279 #define IRP STATUSbits.IRP // bit 7
1280
1281 #define TMR1ON T1CONbits.TMR1ON // bit 0
1282 #define TMR1CS T1CONbits.TMR1CS // bit 1
1283 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits
1284 #define T1INSYNC T1CONbits.T1INSYNC // bit 2, shadows bit in T1CONbits
1285 #define T1SYNC T1CONbits.T1SYNC // bit 2, shadows bit in T1CONbits
1286 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1287 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1288 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1289
1290 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1291 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1292 #define TMR2ON T2CONbits.TMR2ON // bit 2
1293 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1294 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1295 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1296 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1297
1298 #define TRISA0 TRISAbits.TRISA0 // bit 0
1299 #define TRISA1 TRISAbits.TRISA1 // bit 1
1300 #define TRISA2 TRISAbits.TRISA2 // bit 2
1301 #define TRISA3 TRISAbits.TRISA3 // bit 3
1302 #define TRISA4 TRISAbits.TRISA4 // bit 4
1303 #define TRISA5 TRISAbits.TRISA5 // bit 5
1304
1305 #define TRISB0 TRISBbits.TRISB0 // bit 0
1306 #define TRISB1 TRISBbits.TRISB1 // bit 1
1307 #define TRISB2 TRISBbits.TRISB2 // bit 2
1308 #define TRISB3 TRISBbits.TRISB3 // bit 3
1309 #define TRISB4 TRISBbits.TRISB4 // bit 4
1310 #define TRISB5 TRISBbits.TRISB5 // bit 5
1311 #define TRISB6 TRISBbits.TRISB6 // bit 6
1312 #define TRISB7 TRISBbits.TRISB7 // bit 7
1313
1314 #define TRISC0 TRISCbits.TRISC0 // bit 0
1315 #define TRISC1 TRISCbits.TRISC1 // bit 1
1316 #define TRISC2 TRISCbits.TRISC2 // bit 2
1317 #define TRISC3 TRISCbits.TRISC3 // bit 3
1318 #define TRISC4 TRISCbits.TRISC4 // bit 4
1319 #define TRISC5 TRISCbits.TRISC5 // bit 5
1320 #define TRISC6 TRISCbits.TRISC6 // bit 6
1321 #define TRISC7 TRISCbits.TRISC7 // bit 7
1322
1323 #endif // #ifndef NO_BIT_DEFINES
1324
1325 #endif // #ifndef __PIC16F872_H__
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