2 * This declarations of the PIC16F886 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:01 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16F886_H__
26 #define __PIC16F886_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PORTE_ADDR 0x0009
45 #define PCLATH_ADDR 0x000A
46 #define INTCON_ADDR 0x000B
47 #define PIR1_ADDR 0x000C
48 #define PIR2_ADDR 0x000D
49 #define TMR1_ADDR 0x000E
50 #define TMR1L_ADDR 0x000E
51 #define TMR1H_ADDR 0x000F
52 #define T1CON_ADDR 0x0010
53 #define TMR2_ADDR 0x0011
54 #define T2CON_ADDR 0x0012
55 #define SSPBUF_ADDR 0x0013
56 #define SSPCON_ADDR 0x0014
57 #define CCPR1_ADDR 0x0015
58 #define CCPR1L_ADDR 0x0015
59 #define CCPR1H_ADDR 0x0016
60 #define CCP1CON_ADDR 0x0017
61 #define RCSTA_ADDR 0x0018
62 #define TXREG_ADDR 0x0019
63 #define RCREG_ADDR 0x001A
64 #define CCPR2_ADDR 0x001B
65 #define CCPR2L_ADDR 0x001B
66 #define CCPR2H_ADDR 0x001C
67 #define CCP2CON_ADDR 0x001D
68 #define ADRESH_ADDR 0x001E
69 #define ADCON0_ADDR 0x001F
70 #define OPTION_REG_ADDR 0x0081
71 #define TRISA_ADDR 0x0085
72 #define TRISB_ADDR 0x0086
73 #define TRISC_ADDR 0x0087
74 #define TRISE_ADDR 0x0089
75 #define PIE1_ADDR 0x008C
76 #define PIE2_ADDR 0x008D
77 #define PCON_ADDR 0x008E
78 #define OSCCON_ADDR 0x008F
79 #define OSCTUNE_ADDR 0x0090
80 #define SSPCON2_ADDR 0x0091
81 #define PR2_ADDR 0x0092
82 #define MSK_ADDR 0x0093
83 #define SSPADD_ADDR 0x0093
84 #define SSPMSK_ADDR 0x0093
85 #define SSPSTAT_ADDR 0x0094
86 #define WPUB_ADDR 0x0095
87 #define IOCB_ADDR 0x0096
88 #define VRCON_ADDR 0x0097
89 #define TXSTA_ADDR 0x0098
90 #define SPBRG_ADDR 0x0099
91 #define SPBRGH_ADDR 0x009A
92 #define PWM1CON_ADDR 0x009B
93 #define ECCPAS_ADDR 0x009C
94 #define PSTRCON_ADDR 0x009D
95 #define ADRESL_ADDR 0x009E
96 #define ADCON1_ADDR 0x009F
97 #define WDTCON_ADDR 0x0105
98 #define CM1CON0_ADDR 0x0107
99 #define CM2CON0_ADDR 0x0108
100 #define CM2CON1_ADDR 0x0109
101 #define EEDAT_ADDR 0x010C
102 #define EEDATA_ADDR 0x010C
103 #define EEADR_ADDR 0x010D
104 #define EEDATH_ADDR 0x010E
105 #define EEADRH_ADDR 0x010F
106 #define SRCON_ADDR 0x0185
107 #define BAUDCTL_ADDR 0x0187
108 #define ANSEL_ADDR 0x0188
109 #define ANSELH_ADDR 0x0189
110 #define EECON1_ADDR 0x018C
111 #define EECON2_ADDR 0x018D
113 #endif // #ifndef NO_ADDR_DEFINES
115 //==============================================================================
117 // Register Definitions
119 //==============================================================================
121 extern __at(0x0000) __sfr INDF
;
122 extern __at(0x0001) __sfr TMR0
;
123 extern __at(0x0002) __sfr PCL
;
125 //==============================================================================
128 extern __at(0x0003) __sfr STATUS
;
152 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
163 //==============================================================================
165 extern __at(0x0004) __sfr FSR
;
167 //==============================================================================
170 extern __at(0x0005) __sfr PORTA
;
184 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
195 //==============================================================================
198 //==============================================================================
201 extern __at(0x0006) __sfr PORTB
;
215 extern __at(0x0006) volatile __PORTBbits_t PORTBbits
;
226 //==============================================================================
229 //==============================================================================
232 extern __at(0x0007) __sfr PORTC
;
246 extern __at(0x0007) volatile __PORTCbits_t PORTCbits
;
257 //==============================================================================
260 //==============================================================================
263 extern __at(0x0009) __sfr PORTE
;
277 extern __at(0x0009) volatile __PORTEbits_t PORTEbits
;
281 //==============================================================================
283 extern __at(0x000A) __sfr PCLATH
;
285 //==============================================================================
288 extern __at(0x000B) __sfr INTCON
;
317 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
330 //==============================================================================
333 //==============================================================================
336 extern __at(0x000C) __sfr PIR1
;
350 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
360 //==============================================================================
363 //==============================================================================
366 extern __at(0x000D) __sfr PIR2
;
372 unsigned ULPWUIF
: 1;
380 extern __at(0x000D) volatile __PIR2bits_t PIR2bits
;
383 #define _ULPWUIF 0x04
390 //==============================================================================
392 extern __at(0x000E) __sfr TMR1
;
393 extern __at(0x000E) __sfr TMR1L
;
394 extern __at(0x000F) __sfr TMR1H
;
396 //==============================================================================
399 extern __at(0x0010) __sfr T1CON
;
407 unsigned NOT_T1SYNC
: 1;
408 unsigned T1OSCEN
: 1;
409 unsigned T1CKPS0
: 1;
410 unsigned T1CKPS1
: 1;
419 unsigned T1INSYNC
: 1;
447 extern __at(0x0010) volatile __T1CONbits_t T1CONbits
;
451 #define _NOT_T1SYNC 0x04
452 #define _T1INSYNC 0x04
454 #define _T1OSCEN 0x08
455 #define _T1CKPS0 0x10
456 #define _T1CKPS1 0x20
461 //==============================================================================
463 extern __at(0x0011) __sfr TMR2
;
465 //==============================================================================
468 extern __at(0x0012) __sfr T2CON
;
474 unsigned T2CKPS0
: 1;
475 unsigned T2CKPS1
: 1;
477 unsigned TOUTPS0
: 1;
478 unsigned TOUTPS1
: 1;
479 unsigned TOUTPS2
: 1;
480 unsigned TOUTPS3
: 1;
498 extern __at(0x0012) volatile __T2CONbits_t T2CONbits
;
500 #define _T2CKPS0 0x01
501 #define _T2CKPS1 0x02
503 #define _TOUTPS0 0x08
504 #define _TOUTPS1 0x10
505 #define _TOUTPS2 0x20
506 #define _TOUTPS3 0x40
508 //==============================================================================
510 extern __at(0x0013) __sfr SSPBUF
;
512 //==============================================================================
515 extern __at(0x0014) __sfr SSPCON
;
538 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits
;
549 //==============================================================================
551 extern __at(0x0015) __sfr CCPR1
;
552 extern __at(0x0015) __sfr CCPR1L
;
553 extern __at(0x0016) __sfr CCPR1H
;
555 //==============================================================================
558 extern __at(0x0017) __sfr CCP1CON
;
606 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits
;
619 //==============================================================================
622 //==============================================================================
625 extern __at(0x0018) __sfr RCSTA
;
661 unsigned NOT_RC8
: 1;
678 extern __at(0x0018) volatile __RCSTAbits_t RCSTAbits
;
689 #define _NOT_RC8 0x40
693 //==============================================================================
695 extern __at(0x0019) __sfr TXREG
;
696 extern __at(0x001A) __sfr RCREG
;
697 extern __at(0x001B) __sfr CCPR2
;
698 extern __at(0x001B) __sfr CCPR2L
;
699 extern __at(0x001C) __sfr CCPR2H
;
701 //==============================================================================
704 extern __at(0x001D) __sfr CCP2CON
;
746 extern __at(0x001D) volatile __CCP2CONbits_t CCP2CONbits
;
757 //==============================================================================
759 extern __at(0x001E) __sfr ADRESH
;
761 //==============================================================================
764 extern __at(0x001F) __sfr ADCON0
;
771 unsigned GO_NOT_DONE
: 1;
795 unsigned NOT_DONE
: 1;
807 unsigned GO_DONE
: 1;
830 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
833 #define _GO_NOT_DONE 0x02
835 #define _NOT_DONE 0x02
836 #define _GO_DONE 0x02
844 //==============================================================================
847 //==============================================================================
850 extern __at(0x0081) __sfr OPTION_REG
;
863 unsigned NOT_RBPU
: 1;
871 } __OPTION_REGbits_t
;
873 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
882 #define _NOT_RBPU 0x80
884 //==============================================================================
887 //==============================================================================
890 extern __at(0x0085) __sfr TRISA
;
904 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
915 //==============================================================================
918 //==============================================================================
921 extern __at(0x0086) __sfr TRISB
;
935 extern __at(0x0086) volatile __TRISBbits_t TRISBbits
;
946 //==============================================================================
949 //==============================================================================
952 extern __at(0x0087) __sfr TRISC
;
966 extern __at(0x0087) volatile __TRISCbits_t TRISCbits
;
977 //==============================================================================
980 //==============================================================================
983 extern __at(0x0089) __sfr TRISE
;
997 extern __at(0x0089) volatile __TRISEbits_t TRISEbits
;
1001 //==============================================================================
1004 //==============================================================================
1007 extern __at(0x008C) __sfr PIE1
;
1011 unsigned TMR1IE
: 1;
1012 unsigned TMR2IE
: 1;
1013 unsigned CCP1IE
: 1;
1021 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
1023 #define _TMR1IE 0x01
1024 #define _TMR2IE 0x02
1025 #define _CCP1IE 0x04
1031 //==============================================================================
1034 //==============================================================================
1037 extern __at(0x008D) __sfr PIE2
;
1041 unsigned CCP2IE
: 1;
1043 unsigned ULPWUIE
: 1;
1051 extern __at(0x008D) volatile __PIE2bits_t PIE2bits
;
1053 #define _CCP2IE 0x01
1054 #define _ULPWUIE 0x04
1061 //==============================================================================
1064 //==============================================================================
1067 extern __at(0x008E) __sfr PCON
;
1073 unsigned NOT_BOR
: 1;
1074 unsigned NOT_POR
: 1;
1077 unsigned SBOREN
: 1;
1078 unsigned ULPWUE
: 1;
1085 unsigned NOT_BO
: 1;
1096 extern __at(0x008E) volatile __PCONbits_t PCONbits
;
1098 #define _NOT_BOR 0x01
1099 #define _NOT_BO 0x01
1100 #define _NOT_POR 0x02
1101 #define _SBOREN 0x10
1102 #define _ULPWUE 0x20
1104 //==============================================================================
1107 //==============================================================================
1110 extern __at(0x008F) __sfr OSCCON
;
1134 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits
;
1144 //==============================================================================
1147 //==============================================================================
1150 extern __at(0x0090) __sfr OSCTUNE
;
1173 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits
;
1181 //==============================================================================
1184 //==============================================================================
1187 extern __at(0x0091) __sfr SSPCON2
;
1197 unsigned ACKSTAT
: 1;
1201 extern __at(0x0091) volatile __SSPCON2bits_t SSPCON2bits
;
1209 #define _ACKSTAT 0x40
1212 //==============================================================================
1214 extern __at(0x0092) __sfr PR2
;
1216 //==============================================================================
1219 extern __at(0x0093) __sfr MSK
;
1233 extern __at(0x0093) volatile __MSKbits_t MSKbits
;
1244 //==============================================================================
1246 extern __at(0x0093) __sfr SSPADD
;
1248 //==============================================================================
1251 extern __at(0x0093) __sfr SSPMSK
;
1265 extern __at(0x0093) volatile __SSPMSKbits_t SSPMSKbits
;
1267 #define _SSPMSK_MSK0 0x01
1268 #define _SSPMSK_MSK1 0x02
1269 #define _SSPMSK_MSK2 0x04
1270 #define _SSPMSK_MSK3 0x08
1271 #define _SSPMSK_MSK4 0x10
1272 #define _SSPMSK_MSK5 0x20
1273 #define _SSPMSK_MSK6 0x40
1274 #define _SSPMSK_MSK7 0x80
1276 //==============================================================================
1279 //==============================================================================
1282 extern __at(0x0094) __sfr SSPSTAT
;
1290 unsigned R_NOT_W
: 1;
1293 unsigned D_NOT_A
: 1;
1303 unsigned I2C_START
: 1;
1304 unsigned I2C_STOP
: 1;
1314 unsigned I2C_READ
: 1;
1317 unsigned I2C_DATA
: 1;
1338 unsigned NOT_WRITE
: 1;
1341 unsigned NOT_ADDRESS
: 1;
1362 unsigned READ_WRITE
: 1;
1365 unsigned DATA_ADDRESS
: 1;
1371 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits
;
1375 #define _R_NOT_W 0x04
1377 #define _I2C_READ 0x04
1379 #define _NOT_WRITE 0x04
1381 #define _READ_WRITE 0x04
1383 #define _I2C_START 0x08
1385 #define _I2C_STOP 0x10
1386 #define _D_NOT_A 0x20
1388 #define _I2C_DATA 0x20
1390 #define _NOT_ADDRESS 0x20
1392 #define _DATA_ADDRESS 0x20
1396 //==============================================================================
1399 //==============================================================================
1402 extern __at(0x0095) __sfr WPUB
;
1416 extern __at(0x0095) volatile __WPUBbits_t WPUBbits
;
1427 //==============================================================================
1430 //==============================================================================
1433 extern __at(0x0096) __sfr IOCB
;
1447 extern __at(0x0096) volatile __IOCBbits_t IOCBbits
;
1458 //==============================================================================
1461 //==============================================================================
1464 extern __at(0x0097) __sfr VRCON
;
1487 extern __at(0x0097) volatile __VRCONbits_t VRCONbits
;
1498 //==============================================================================
1501 //==============================================================================
1504 extern __at(0x0098) __sfr TXSTA
;
1528 unsigned NOT_TX8
: 1;
1545 extern __at(0x0098) volatile __TXSTAbits_t TXSTAbits
;
1555 #define _NOT_TX8 0x40
1559 //==============================================================================
1562 //==============================================================================
1565 extern __at(0x0099) __sfr SPBRG
;
1579 extern __at(0x0099) volatile __SPBRGbits_t SPBRGbits
;
1590 //==============================================================================
1593 //==============================================================================
1596 extern __at(0x009A) __sfr SPBRGH
;
1610 extern __at(0x009A) volatile __SPBRGHbits_t SPBRGHbits
;
1621 //==============================================================================
1624 //==============================================================================
1627 extern __at(0x009B) __sfr PWM1CON
;
1650 extern __at(0x009B) volatile __PWM1CONbits_t PWM1CONbits
;
1661 //==============================================================================
1664 //==============================================================================
1667 extern __at(0x009C) __sfr ECCPAS
;
1673 unsigned PSSBD0
: 1;
1674 unsigned PSSBD1
: 1;
1675 unsigned PSSAC0
: 1;
1676 unsigned PSSAC1
: 1;
1677 unsigned ECCPAS0
: 1;
1678 unsigned ECCPAS1
: 1;
1679 unsigned ECCPAS2
: 1;
1680 unsigned ECCPASE
: 1;
1699 unsigned ECCPAS
: 3;
1704 extern __at(0x009C) volatile __ECCPASbits_t ECCPASbits
;
1706 #define _PSSBD0 0x01
1707 #define _PSSBD1 0x02
1708 #define _PSSAC0 0x04
1709 #define _PSSAC1 0x08
1710 #define _ECCPAS0 0x10
1711 #define _ECCPAS1 0x20
1712 #define _ECCPAS2 0x40
1713 #define _ECCPASE 0x80
1715 //==============================================================================
1718 //==============================================================================
1721 extern __at(0x009D) __sfr PSTRCON
;
1729 unsigned STRSYNC
: 1;
1735 extern __at(0x009D) volatile __PSTRCONbits_t PSTRCONbits
;
1741 #define _STRSYNC 0x10
1743 //==============================================================================
1745 extern __at(0x009E) __sfr ADRESL
;
1747 //==============================================================================
1750 extern __at(0x009F) __sfr ADCON1
;
1774 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits
;
1780 //==============================================================================
1783 //==============================================================================
1786 extern __at(0x0105) __sfr WDTCON
;
1792 unsigned SWDTEN
: 1;
1793 unsigned WDTPS0
: 1;
1794 unsigned WDTPS1
: 1;
1795 unsigned WDTPS2
: 1;
1796 unsigned WDTPS3
: 1;
1810 extern __at(0x0105) volatile __WDTCONbits_t WDTCONbits
;
1812 #define _SWDTEN 0x01
1813 #define _WDTPS0 0x02
1814 #define _WDTPS1 0x04
1815 #define _WDTPS2 0x08
1816 #define _WDTPS3 0x10
1818 //==============================================================================
1821 //==============================================================================
1824 extern __at(0x0107) __sfr CM1CON0
;
1847 extern __at(0x0107) volatile __CM1CON0bits_t CM1CON0bits
;
1857 //==============================================================================
1860 //==============================================================================
1863 extern __at(0x0108) __sfr CM2CON0
;
1886 extern __at(0x0108) volatile __CM2CON0bits_t CM2CON0bits
;
1896 //==============================================================================
1899 //==============================================================================
1902 extern __at(0x0109) __sfr CM2CON1
;
1906 unsigned C2SYNC
: 1;
1910 unsigned C2RSEL
: 1;
1911 unsigned C1RSEL
: 1;
1912 unsigned MC2OUT
: 1;
1913 unsigned MC1OUT
: 1;
1916 extern __at(0x0109) volatile __CM2CON1bits_t CM2CON1bits
;
1918 #define _C2SYNC 0x01
1920 #define _C2RSEL 0x10
1921 #define _C1RSEL 0x20
1922 #define _MC2OUT 0x40
1923 #define _MC1OUT 0x80
1925 //==============================================================================
1927 extern __at(0x010C) __sfr EEDAT
;
1928 extern __at(0x010C) __sfr EEDATA
;
1929 extern __at(0x010D) __sfr EEADR
;
1930 extern __at(0x010E) __sfr EEDATH
;
1931 extern __at(0x010F) __sfr EEADRH
;
1933 //==============================================================================
1936 extern __at(0x0185) __sfr SRCON
;
1959 extern __at(0x0185) volatile __SRCONbits_t SRCONbits
;
1969 //==============================================================================
1972 //==============================================================================
1975 extern __at(0x0187) __sfr BAUDCTL
;
1977 #define BAUDCON BAUDCTL
1988 unsigned ABDOVF
: 1;
1991 extern __at(0x0187) volatile __BAUDCTLbits_t BAUDCTLbits
;
1993 #define BAUDCONbits BAUDCTLbits
2000 #define _ABDOVF 0x80
2002 //==============================================================================
2005 //==============================================================================
2008 extern __at(0x0188) __sfr ANSEL
;
2031 extern __at(0x0188) volatile __ANSELbits_t ANSELbits
;
2039 //==============================================================================
2042 //==============================================================================
2045 extern __at(0x0189) __sfr ANSELH
;
2059 extern __at(0x0189) volatile __ANSELHbits_t ANSELHbits
;
2068 //==============================================================================
2071 //==============================================================================
2074 extern __at(0x018C) __sfr EECON1
;
2088 extern __at(0x018C) volatile __EECON1bits_t EECON1bits
;
2096 //==============================================================================
2098 extern __at(0x018D) __sfr EECON2
;
2100 //==============================================================================
2102 // Configuration Bits
2104 //==============================================================================
2106 #define _CONFIG1 0x2007
2107 #define _CONFIG2 0x2008
2109 //----------------------------- CONFIG1 Options -------------------------------
2111 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
2112 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
2113 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
2114 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
2115 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
2116 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
2117 #define _FOSC_EC 0x3FFB // EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN.
2118 #define _EC_OSC 0x3FFB // EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN.
2119 #define _FOSC_INTRC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.
2120 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.
2121 #define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.
2122 #define _FOSC_INTRC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.
2123 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.
2124 #define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.
2125 #define _FOSC_EXTRC_NOCLKOUT 0x3FFE // RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN.
2126 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN.
2127 #define _EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN.
2128 #define _FOSC_EXTRC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN.
2129 #define _EXTRC_OSC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN.
2130 #define _EXTRC 0x3FFF // RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN.
2131 #define _WDTE_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
2132 #define _WDT_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
2133 #define _WDTE_ON 0x3FFF // WDT enabled.
2134 #define _WDT_ON 0x3FFF // WDT enabled.
2135 #define _PWRTE_ON 0x3FEF // PWRT enabled.
2136 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
2137 #define _MCLRE_OFF 0x3FDF // RE3/MCLR pin function is digital input, MCLR internally tied to VDD.
2138 #define _MCLRE_ON 0x3FFF // RE3/MCLR pin function is MCLR.
2139 #define _CP_ON 0x3FBF // Program memory code protection is enabled.
2140 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
2141 #define _CPD_ON 0x3F7F // Data memory code protection is enabled.
2142 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
2143 #define _BOREN_OFF 0x3CFF // BOR disabled.
2144 #define _BOR_OFF 0x3CFF // BOR disabled.
2145 #define _BOREN_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
2146 #define _BOR_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
2147 #define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
2148 #define _BOR_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
2149 #define _BOREN_ON 0x3FFF // BOR enabled.
2150 #define _BOR_ON 0x3FFF // BOR enabled.
2151 #define _IESO_OFF 0x3BFF // Internal/External Switchover mode is disabled.
2152 #define _IESO_ON 0x3FFF // Internal/External Switchover mode is enabled.
2153 #define _FCMEN_OFF 0x37FF // Fail-Safe Clock Monitor is disabled.
2154 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
2155 #define _LVP_OFF 0x2FFF // RB3 pin has digital I/O, HV on MCLR must be used for programming.
2156 #define _LVP_ON 0x3FFF // RB3/PGM pin has PGM function, low voltage programming enabled.
2157 #define _DEBUG_ON 0x1FFF // In_Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger.
2158 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins.
2160 //----------------------------- CONFIG2 Options -------------------------------
2162 #define _BOR4V_BOR21V 0x3EFF // Brown-out Reset set to 2.1V.
2163 #define _BOR21V 0x3EFF // Brown-out Reset set to 2.1V.
2164 #define _BOR4V_BOR40V 0x3FFF // Brown-out Reset set to 4.0V.
2165 #define _BOR40V 0x3FFF // Brown-out Reset set to 4.0V.
2166 #define _WRT_HALF 0x39FF // 0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
2167 #define _WRT_1FOURTH 0x3BFF // 0000h to 07FFh write protected, 0800h to 1FFFh may be modified by EECON control.
2168 #define _WRT_256 0x3DFF // 0000h to 00FFh write protected, 0100h to 1FFFh may be modified by EECON control.
2169 #define _WRT_OFF 0x3FFF // Write protection off.
2171 //==============================================================================
2173 #define _DEVID1 0x2006
2175 #define _IDLOC0 0x2000
2176 #define _IDLOC1 0x2001
2177 #define _IDLOC2 0x2002
2178 #define _IDLOC3 0x2003
2180 //==============================================================================
2182 #ifndef NO_BIT_DEFINES
2184 #define ADON ADCON0bits.ADON // bit 0
2185 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
2186 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
2187 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
2188 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
2189 #define CHS0 ADCON0bits.CHS0 // bit 2
2190 #define CHS1 ADCON0bits.CHS1 // bit 3
2191 #define CHS2 ADCON0bits.CHS2 // bit 4
2192 #define CHS3 ADCON0bits.CHS3 // bit 5
2193 #define ADCS0 ADCON0bits.ADCS0 // bit 6
2194 #define ADCS1 ADCON0bits.ADCS1 // bit 7
2196 #define VCFG0 ADCON1bits.VCFG0 // bit 4
2197 #define VCFG1 ADCON1bits.VCFG1 // bit 5
2198 #define ADFM ADCON1bits.ADFM // bit 7
2200 #define ANS0 ANSELbits.ANS0 // bit 0
2201 #define ANS1 ANSELbits.ANS1 // bit 1
2202 #define ANS2 ANSELbits.ANS2 // bit 2
2203 #define ANS3 ANSELbits.ANS3 // bit 3
2204 #define ANS4 ANSELbits.ANS4 // bit 4
2206 #define ANS8 ANSELHbits.ANS8 // bit 0
2207 #define ANS9 ANSELHbits.ANS9 // bit 1
2208 #define ANS10 ANSELHbits.ANS10 // bit 2
2209 #define ANS11 ANSELHbits.ANS11 // bit 3
2210 #define ANS12 ANSELHbits.ANS12 // bit 4
2211 #define ANS13 ANSELHbits.ANS13 // bit 5
2213 #define ABDEN BAUDCTLbits.ABDEN // bit 0
2214 #define WUE BAUDCTLbits.WUE // bit 1
2215 #define BRG16 BAUDCTLbits.BRG16 // bit 3
2216 #define SCKP BAUDCTLbits.SCKP // bit 4
2217 #define RCIDL BAUDCTLbits.RCIDL // bit 6
2218 #define ABDOVF BAUDCTLbits.ABDOVF // bit 7
2220 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
2221 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
2222 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
2223 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
2224 #define DC1B0 CCP1CONbits.DC1B0 // bit 4, shadows bit in CCP1CONbits
2225 #define CCP1Y CCP1CONbits.CCP1Y // bit 4, shadows bit in CCP1CONbits
2226 #define DC1B1 CCP1CONbits.DC1B1 // bit 5, shadows bit in CCP1CONbits
2227 #define CCP1X CCP1CONbits.CCP1X // bit 5, shadows bit in CCP1CONbits
2228 #define P1M0 CCP1CONbits.P1M0 // bit 6
2229 #define P1M1 CCP1CONbits.P1M1 // bit 7
2231 #define CCP2M0 CCP2CONbits.CCP2M0 // bit 0
2232 #define CCP2M1 CCP2CONbits.CCP2M1 // bit 1
2233 #define CCP2M2 CCP2CONbits.CCP2M2 // bit 2
2234 #define CCP2M3 CCP2CONbits.CCP2M3 // bit 3
2235 #define DC2B0 CCP2CONbits.DC2B0 // bit 4, shadows bit in CCP2CONbits
2236 #define CCP2Y CCP2CONbits.CCP2Y // bit 4, shadows bit in CCP2CONbits
2237 #define DC2B1 CCP2CONbits.DC2B1 // bit 5, shadows bit in CCP2CONbits
2238 #define CCP2X CCP2CONbits.CCP2X // bit 5, shadows bit in CCP2CONbits
2240 #define C1CH0 CM1CON0bits.C1CH0 // bit 0
2241 #define C1CH1 CM1CON0bits.C1CH1 // bit 1
2242 #define C1R CM1CON0bits.C1R // bit 2
2243 #define C1POL CM1CON0bits.C1POL // bit 4
2244 #define C1OE CM1CON0bits.C1OE // bit 5
2245 #define C1OUT CM1CON0bits.C1OUT // bit 6
2246 #define C1ON CM1CON0bits.C1ON // bit 7
2248 #define C2CH0 CM2CON0bits.C2CH0 // bit 0
2249 #define C2CH1 CM2CON0bits.C2CH1 // bit 1
2250 #define C2R CM2CON0bits.C2R // bit 2
2251 #define C2POL CM2CON0bits.C2POL // bit 4
2252 #define C2OE CM2CON0bits.C2OE // bit 5
2253 #define C2OUT CM2CON0bits.C2OUT // bit 6
2254 #define C2ON CM2CON0bits.C2ON // bit 7
2256 #define C2SYNC CM2CON1bits.C2SYNC // bit 0
2257 #define T1GSS CM2CON1bits.T1GSS // bit 1
2258 #define C2RSEL CM2CON1bits.C2RSEL // bit 4
2259 #define C1RSEL CM2CON1bits.C1RSEL // bit 5
2260 #define MC2OUT CM2CON1bits.MC2OUT // bit 6
2261 #define MC1OUT CM2CON1bits.MC1OUT // bit 7
2263 #define PSSBD0 ECCPASbits.PSSBD0 // bit 0
2264 #define PSSBD1 ECCPASbits.PSSBD1 // bit 1
2265 #define PSSAC0 ECCPASbits.PSSAC0 // bit 2
2266 #define PSSAC1 ECCPASbits.PSSAC1 // bit 3
2267 #define ECCPAS0 ECCPASbits.ECCPAS0 // bit 4
2268 #define ECCPAS1 ECCPASbits.ECCPAS1 // bit 5
2269 #define ECCPAS2 ECCPASbits.ECCPAS2 // bit 6
2270 #define ECCPASE ECCPASbits.ECCPASE // bit 7
2272 #define RD EECON1bits.RD // bit 0
2273 #define WR EECON1bits.WR // bit 1
2274 #define WREN EECON1bits.WREN // bit 2
2275 #define WRERR EECON1bits.WRERR // bit 3
2276 #define EEPGD EECON1bits.EEPGD // bit 7
2278 #define RBIF INTCONbits.RBIF // bit 0
2279 #define INTF INTCONbits.INTF // bit 1
2280 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
2281 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
2282 #define RBIE INTCONbits.RBIE // bit 3
2283 #define INTE INTCONbits.INTE // bit 4
2284 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
2285 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
2286 #define PEIE INTCONbits.PEIE // bit 6
2287 #define GIE INTCONbits.GIE // bit 7
2289 #define IOCB0 IOCBbits.IOCB0 // bit 0
2290 #define IOCB1 IOCBbits.IOCB1 // bit 1
2291 #define IOCB2 IOCBbits.IOCB2 // bit 2
2292 #define IOCB3 IOCBbits.IOCB3 // bit 3
2293 #define IOCB4 IOCBbits.IOCB4 // bit 4
2294 #define IOCB5 IOCBbits.IOCB5 // bit 5
2295 #define IOCB6 IOCBbits.IOCB6 // bit 6
2296 #define IOCB7 IOCBbits.IOCB7 // bit 7
2298 #define MSK0 MSKbits.MSK0 // bit 0
2299 #define MSK1 MSKbits.MSK1 // bit 1
2300 #define MSK2 MSKbits.MSK2 // bit 2
2301 #define MSK3 MSKbits.MSK3 // bit 3
2302 #define MSK4 MSKbits.MSK4 // bit 4
2303 #define MSK5 MSKbits.MSK5 // bit 5
2304 #define MSK6 MSKbits.MSK6 // bit 6
2305 #define MSK7 MSKbits.MSK7 // bit 7
2307 #define PS0 OPTION_REGbits.PS0 // bit 0
2308 #define PS1 OPTION_REGbits.PS1 // bit 1
2309 #define PS2 OPTION_REGbits.PS2 // bit 2
2310 #define PSA OPTION_REGbits.PSA // bit 3
2311 #define T0SE OPTION_REGbits.T0SE // bit 4
2312 #define T0CS OPTION_REGbits.T0CS // bit 5
2313 #define INTEDG OPTION_REGbits.INTEDG // bit 6
2314 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
2316 #define SCS OSCCONbits.SCS // bit 0
2317 #define LTS OSCCONbits.LTS // bit 1
2318 #define HTS OSCCONbits.HTS // bit 2
2319 #define OSTS OSCCONbits.OSTS // bit 3
2320 #define IRCF0 OSCCONbits.IRCF0 // bit 4
2321 #define IRCF1 OSCCONbits.IRCF1 // bit 5
2322 #define IRCF2 OSCCONbits.IRCF2 // bit 6
2324 #define TUN0 OSCTUNEbits.TUN0 // bit 0
2325 #define TUN1 OSCTUNEbits.TUN1 // bit 1
2326 #define TUN2 OSCTUNEbits.TUN2 // bit 2
2327 #define TUN3 OSCTUNEbits.TUN3 // bit 3
2328 #define TUN4 OSCTUNEbits.TUN4 // bit 4
2330 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
2331 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
2332 #define NOT_POR PCONbits.NOT_POR // bit 1
2333 #define SBOREN PCONbits.SBOREN // bit 4
2334 #define ULPWUE PCONbits.ULPWUE // bit 5
2336 #define TMR1IE PIE1bits.TMR1IE // bit 0
2337 #define TMR2IE PIE1bits.TMR2IE // bit 1
2338 #define CCP1IE PIE1bits.CCP1IE // bit 2
2339 #define SSPIE PIE1bits.SSPIE // bit 3
2340 #define TXIE PIE1bits.TXIE // bit 4
2341 #define RCIE PIE1bits.RCIE // bit 5
2342 #define ADIE PIE1bits.ADIE // bit 6
2344 #define CCP2IE PIE2bits.CCP2IE // bit 0
2345 #define ULPWUIE PIE2bits.ULPWUIE // bit 2
2346 #define BCLIE PIE2bits.BCLIE // bit 3
2347 #define EEIE PIE2bits.EEIE // bit 4
2348 #define C1IE PIE2bits.C1IE // bit 5
2349 #define C2IE PIE2bits.C2IE // bit 6
2350 #define OSFIE PIE2bits.OSFIE // bit 7
2352 #define TMR1IF PIR1bits.TMR1IF // bit 0
2353 #define TMR2IF PIR1bits.TMR2IF // bit 1
2354 #define CCP1IF PIR1bits.CCP1IF // bit 2
2355 #define SSPIF PIR1bits.SSPIF // bit 3
2356 #define TXIF PIR1bits.TXIF // bit 4
2357 #define RCIF PIR1bits.RCIF // bit 5
2358 #define ADIF PIR1bits.ADIF // bit 6
2360 #define CCP2IF PIR2bits.CCP2IF // bit 0
2361 #define ULPWUIF PIR2bits.ULPWUIF // bit 2
2362 #define BCLIF PIR2bits.BCLIF // bit 3
2363 #define EEIF PIR2bits.EEIF // bit 4
2364 #define C1IF PIR2bits.C1IF // bit 5
2365 #define C2IF PIR2bits.C2IF // bit 6
2366 #define OSFIF PIR2bits.OSFIF // bit 7
2368 #define RA0 PORTAbits.RA0 // bit 0
2369 #define RA1 PORTAbits.RA1 // bit 1
2370 #define RA2 PORTAbits.RA2 // bit 2
2371 #define RA3 PORTAbits.RA3 // bit 3
2372 #define RA4 PORTAbits.RA4 // bit 4
2373 #define RA5 PORTAbits.RA5 // bit 5
2374 #define RA6 PORTAbits.RA6 // bit 6
2375 #define RA7 PORTAbits.RA7 // bit 7
2377 #define RB0 PORTBbits.RB0 // bit 0
2378 #define RB1 PORTBbits.RB1 // bit 1
2379 #define RB2 PORTBbits.RB2 // bit 2
2380 #define RB3 PORTBbits.RB3 // bit 3
2381 #define RB4 PORTBbits.RB4 // bit 4
2382 #define RB5 PORTBbits.RB5 // bit 5
2383 #define RB6 PORTBbits.RB6 // bit 6
2384 #define RB7 PORTBbits.RB7 // bit 7
2386 #define RC0 PORTCbits.RC0 // bit 0
2387 #define RC1 PORTCbits.RC1 // bit 1
2388 #define RC2 PORTCbits.RC2 // bit 2
2389 #define RC3 PORTCbits.RC3 // bit 3
2390 #define RC4 PORTCbits.RC4 // bit 4
2391 #define RC5 PORTCbits.RC5 // bit 5
2392 #define RC6 PORTCbits.RC6 // bit 6
2393 #define RC7 PORTCbits.RC7 // bit 7
2395 #define RE3 PORTEbits.RE3 // bit 3
2397 #define STRA PSTRCONbits.STRA // bit 0
2398 #define STRB PSTRCONbits.STRB // bit 1
2399 #define STRC PSTRCONbits.STRC // bit 2
2400 #define STRD PSTRCONbits.STRD // bit 3
2401 #define STRSYNC PSTRCONbits.STRSYNC // bit 4
2403 #define PDC0 PWM1CONbits.PDC0 // bit 0
2404 #define PDC1 PWM1CONbits.PDC1 // bit 1
2405 #define PDC2 PWM1CONbits.PDC2 // bit 2
2406 #define PDC3 PWM1CONbits.PDC3 // bit 3
2407 #define PDC4 PWM1CONbits.PDC4 // bit 4
2408 #define PDC5 PWM1CONbits.PDC5 // bit 5
2409 #define PDC6 PWM1CONbits.PDC6 // bit 6
2410 #define PRSEN PWM1CONbits.PRSEN // bit 7
2412 #define RX9D RCSTAbits.RX9D // bit 0, shadows bit in RCSTAbits
2413 #define RCD8 RCSTAbits.RCD8 // bit 0, shadows bit in RCSTAbits
2414 #define OERR RCSTAbits.OERR // bit 1
2415 #define FERR RCSTAbits.FERR // bit 2
2416 #define ADDEN RCSTAbits.ADDEN // bit 3
2417 #define CREN RCSTAbits.CREN // bit 4
2418 #define SREN RCSTAbits.SREN // bit 5
2419 #define RX9 RCSTAbits.RX9 // bit 6, shadows bit in RCSTAbits
2420 #define RC9 RCSTAbits.RC9 // bit 6, shadows bit in RCSTAbits
2421 #define NOT_RC8 RCSTAbits.NOT_RC8 // bit 6, shadows bit in RCSTAbits
2422 #define RC8_9 RCSTAbits.RC8_9 // bit 6, shadows bit in RCSTAbits
2423 #define SPEN RCSTAbits.SPEN // bit 7
2425 #define BRG0 SPBRGbits.BRG0 // bit 0
2426 #define BRG1 SPBRGbits.BRG1 // bit 1
2427 #define BRG2 SPBRGbits.BRG2 // bit 2
2428 #define BRG3 SPBRGbits.BRG3 // bit 3
2429 #define BRG4 SPBRGbits.BRG4 // bit 4
2430 #define BRG5 SPBRGbits.BRG5 // bit 5
2431 #define BRG6 SPBRGbits.BRG6 // bit 6
2432 #define BRG7 SPBRGbits.BRG7 // bit 7
2434 #define BRG8 SPBRGHbits.BRG8 // bit 0
2435 #define BRG9 SPBRGHbits.BRG9 // bit 1
2436 #define BRG10 SPBRGHbits.BRG10 // bit 2
2437 #define BRG11 SPBRGHbits.BRG11 // bit 3
2438 #define BRG12 SPBRGHbits.BRG12 // bit 4
2439 #define BRG13 SPBRGHbits.BRG13 // bit 5
2440 #define BRG14 SPBRGHbits.BRG14 // bit 6
2441 #define BRG15 SPBRGHbits.BRG15 // bit 7
2443 #define FVREN SRCONbits.FVREN // bit 0
2444 #define PULSR SRCONbits.PULSR // bit 2
2445 #define PULSS SRCONbits.PULSS // bit 3
2446 #define C2REN SRCONbits.C2REN // bit 4
2447 #define C1SEN SRCONbits.C1SEN // bit 5
2448 #define SR0 SRCONbits.SR0 // bit 6
2449 #define SR1 SRCONbits.SR1 // bit 7
2451 #define SSPM0 SSPCONbits.SSPM0 // bit 0
2452 #define SSPM1 SSPCONbits.SSPM1 // bit 1
2453 #define SSPM2 SSPCONbits.SSPM2 // bit 2
2454 #define SSPM3 SSPCONbits.SSPM3 // bit 3
2455 #define CKP SSPCONbits.CKP // bit 4
2456 #define SSPEN SSPCONbits.SSPEN // bit 5
2457 #define SSPOV SSPCONbits.SSPOV // bit 6
2458 #define WCOL SSPCONbits.WCOL // bit 7
2460 #define SEN SSPCON2bits.SEN // bit 0
2461 #define RSEN SSPCON2bits.RSEN // bit 1
2462 #define PEN SSPCON2bits.PEN // bit 2
2463 #define RCEN SSPCON2bits.RCEN // bit 3
2464 #define ACKEN SSPCON2bits.ACKEN // bit 4
2465 #define ACKDT SSPCON2bits.ACKDT // bit 5
2466 #define ACKSTAT SSPCON2bits.ACKSTAT // bit 6
2467 #define GCEN SSPCON2bits.GCEN // bit 7
2469 #define BF SSPSTATbits.BF // bit 0
2470 #define UA SSPSTATbits.UA // bit 1
2471 #define R_NOT_W SSPSTATbits.R_NOT_W // bit 2, shadows bit in SSPSTATbits
2472 #define R SSPSTATbits.R // bit 2, shadows bit in SSPSTATbits
2473 #define I2C_READ SSPSTATbits.I2C_READ // bit 2, shadows bit in SSPSTATbits
2474 #define NOT_W SSPSTATbits.NOT_W // bit 2, shadows bit in SSPSTATbits
2475 #define NOT_WRITE SSPSTATbits.NOT_WRITE // bit 2, shadows bit in SSPSTATbits
2476 #define R_W SSPSTATbits.R_W // bit 2, shadows bit in SSPSTATbits
2477 #define READ_WRITE SSPSTATbits.READ_WRITE // bit 2, shadows bit in SSPSTATbits
2478 #define S SSPSTATbits.S // bit 3, shadows bit in SSPSTATbits
2479 #define I2C_START SSPSTATbits.I2C_START // bit 3, shadows bit in SSPSTATbits
2480 #define P SSPSTATbits.P // bit 4, shadows bit in SSPSTATbits
2481 #define I2C_STOP SSPSTATbits.I2C_STOP // bit 4, shadows bit in SSPSTATbits
2482 #define D_NOT_A SSPSTATbits.D_NOT_A // bit 5, shadows bit in SSPSTATbits
2483 #define D SSPSTATbits.D // bit 5, shadows bit in SSPSTATbits
2484 #define I2C_DATA SSPSTATbits.I2C_DATA // bit 5, shadows bit in SSPSTATbits
2485 #define NOT_A SSPSTATbits.NOT_A // bit 5, shadows bit in SSPSTATbits
2486 #define NOT_ADDRESS SSPSTATbits.NOT_ADDRESS // bit 5, shadows bit in SSPSTATbits
2487 #define D_A SSPSTATbits.D_A // bit 5, shadows bit in SSPSTATbits
2488 #define DATA_ADDRESS SSPSTATbits.DATA_ADDRESS // bit 5, shadows bit in SSPSTATbits
2489 #define CKE SSPSTATbits.CKE // bit 6
2490 #define SMP SSPSTATbits.SMP // bit 7
2492 #define C STATUSbits.C // bit 0
2493 #define DC STATUSbits.DC // bit 1
2494 #define Z STATUSbits.Z // bit 2
2495 #define NOT_PD STATUSbits.NOT_PD // bit 3
2496 #define NOT_TO STATUSbits.NOT_TO // bit 4
2497 #define RP0 STATUSbits.RP0 // bit 5
2498 #define RP1 STATUSbits.RP1 // bit 6
2499 #define IRP STATUSbits.IRP // bit 7
2501 #define TMR1ON T1CONbits.TMR1ON // bit 0
2502 #define TMR1CS T1CONbits.TMR1CS // bit 1
2503 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits
2504 #define T1INSYNC T1CONbits.T1INSYNC // bit 2, shadows bit in T1CONbits
2505 #define T1SYNC T1CONbits.T1SYNC // bit 2, shadows bit in T1CONbits
2506 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
2507 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
2508 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
2509 #define TMR1GE T1CONbits.TMR1GE // bit 6
2510 #define T1GINV T1CONbits.T1GINV // bit 7, shadows bit in T1CONbits
2511 #define T1GIV T1CONbits.T1GIV // bit 7, shadows bit in T1CONbits
2513 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
2514 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
2515 #define TMR2ON T2CONbits.TMR2ON // bit 2
2516 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
2517 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
2518 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
2519 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
2521 #define TRISA0 TRISAbits.TRISA0 // bit 0
2522 #define TRISA1 TRISAbits.TRISA1 // bit 1
2523 #define TRISA2 TRISAbits.TRISA2 // bit 2
2524 #define TRISA3 TRISAbits.TRISA3 // bit 3
2525 #define TRISA4 TRISAbits.TRISA4 // bit 4
2526 #define TRISA5 TRISAbits.TRISA5 // bit 5
2527 #define TRISA6 TRISAbits.TRISA6 // bit 6
2528 #define TRISA7 TRISAbits.TRISA7 // bit 7
2530 #define TRISB0 TRISBbits.TRISB0 // bit 0
2531 #define TRISB1 TRISBbits.TRISB1 // bit 1
2532 #define TRISB2 TRISBbits.TRISB2 // bit 2
2533 #define TRISB3 TRISBbits.TRISB3 // bit 3
2534 #define TRISB4 TRISBbits.TRISB4 // bit 4
2535 #define TRISB5 TRISBbits.TRISB5 // bit 5
2536 #define TRISB6 TRISBbits.TRISB6 // bit 6
2537 #define TRISB7 TRISBbits.TRISB7 // bit 7
2539 #define TRISC0 TRISCbits.TRISC0 // bit 0
2540 #define TRISC1 TRISCbits.TRISC1 // bit 1
2541 #define TRISC2 TRISCbits.TRISC2 // bit 2
2542 #define TRISC3 TRISCbits.TRISC3 // bit 3
2543 #define TRISC4 TRISCbits.TRISC4 // bit 4
2544 #define TRISC5 TRISCbits.TRISC5 // bit 5
2545 #define TRISC6 TRISCbits.TRISC6 // bit 6
2546 #define TRISC7 TRISCbits.TRISC7 // bit 7
2548 #define TRISE3 TRISEbits.TRISE3 // bit 3
2550 #define TX9D TXSTAbits.TX9D // bit 0, shadows bit in TXSTAbits
2551 #define TXD8 TXSTAbits.TXD8 // bit 0, shadows bit in TXSTAbits
2552 #define TRMT TXSTAbits.TRMT // bit 1
2553 #define BRGH TXSTAbits.BRGH // bit 2
2554 #define SENDB TXSTAbits.SENDB // bit 3
2555 #define SYNC TXSTAbits.SYNC // bit 4
2556 #define TXEN TXSTAbits.TXEN // bit 5
2557 #define TX9 TXSTAbits.TX9 // bit 6, shadows bit in TXSTAbits
2558 #define NOT_TX8 TXSTAbits.NOT_TX8 // bit 6, shadows bit in TXSTAbits
2559 #define TX8_9 TXSTAbits.TX8_9 // bit 6, shadows bit in TXSTAbits
2560 #define CSRC TXSTAbits.CSRC // bit 7
2562 #define VR0 VRCONbits.VR0 // bit 0
2563 #define VR1 VRCONbits.VR1 // bit 1
2564 #define VR2 VRCONbits.VR2 // bit 2
2565 #define VR3 VRCONbits.VR3 // bit 3
2566 #define VRSS VRCONbits.VRSS // bit 4
2567 #define VRR VRCONbits.VRR // bit 5
2568 #define VROE VRCONbits.VROE // bit 6
2569 #define VREN VRCONbits.VREN // bit 7
2571 #define SWDTEN WDTCONbits.SWDTEN // bit 0
2572 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
2573 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
2574 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
2575 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
2577 #define WPUB0 WPUBbits.WPUB0 // bit 0
2578 #define WPUB1 WPUBbits.WPUB1 // bit 1
2579 #define WPUB2 WPUBbits.WPUB2 // bit 2
2580 #define WPUB3 WPUBbits.WPUB3 // bit 3
2581 #define WPUB4 WPUBbits.WPUB4 // bit 4
2582 #define WPUB5 WPUBbits.WPUB5 // bit 5
2583 #define WPUB6 WPUBbits.WPUB6 // bit 6
2584 #define WPUB7 WPUBbits.WPUB7 // bit 7
2586 #endif // #ifndef NO_BIT_DEFINES
2588 #endif // #ifndef __PIC16F886_H__