2 * This declarations of the PIC16F917 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:01 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16F917_H__
26 #define __PIC16F917_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PORTD_ADDR 0x0008
45 #define PORTE_ADDR 0x0009
46 #define PCLATH_ADDR 0x000A
47 #define INTCON_ADDR 0x000B
48 #define PIR1_ADDR 0x000C
49 #define PIR2_ADDR 0x000D
50 #define TMR1_ADDR 0x000E
51 #define TMR1L_ADDR 0x000E
52 #define TMR1H_ADDR 0x000F
53 #define T1CON_ADDR 0x0010
54 #define TMR2_ADDR 0x0011
55 #define T2CON_ADDR 0x0012
56 #define SSPBUF_ADDR 0x0013
57 #define SSPCON_ADDR 0x0014
58 #define CCPR1_ADDR 0x0015
59 #define CCPR1L_ADDR 0x0015
60 #define CCPR1H_ADDR 0x0016
61 #define CCP1CON_ADDR 0x0017
62 #define RCSTA_ADDR 0x0018
63 #define TXREG_ADDR 0x0019
64 #define RCREG_ADDR 0x001A
65 #define CCPR2_ADDR 0x001B
66 #define CCPR2L_ADDR 0x001B
67 #define CCPR2H_ADDR 0x001C
68 #define CCP2CON_ADDR 0x001D
69 #define ADRESH_ADDR 0x001E
70 #define ADCON0_ADDR 0x001F
71 #define OPTION_REG_ADDR 0x0081
72 #define TRISA_ADDR 0x0085
73 #define TRISB_ADDR 0x0086
74 #define TRISC_ADDR 0x0087
75 #define TRISD_ADDR 0x0088
76 #define TRISE_ADDR 0x0089
77 #define PIE1_ADDR 0x008C
78 #define PIE2_ADDR 0x008D
79 #define PCON_ADDR 0x008E
80 #define OSCCON_ADDR 0x008F
81 #define OSCTUNE_ADDR 0x0090
82 #define ANSEL_ADDR 0x0091
83 #define PR2_ADDR 0x0092
84 #define SSPADD_ADDR 0x0093
85 #define SSPSTAT_ADDR 0x0094
86 #define WPU_ADDR 0x0095
87 #define WPUB_ADDR 0x0095
88 #define IOC_ADDR 0x0096
89 #define IOCB_ADDR 0x0096
90 #define CMCON1_ADDR 0x0097
91 #define TXSTA_ADDR 0x0098
92 #define SPBRG_ADDR 0x0099
93 #define CMCON0_ADDR 0x009C
94 #define VRCON_ADDR 0x009D
95 #define ADRESL_ADDR 0x009E
96 #define ADCON1_ADDR 0x009F
97 #define WDTCON_ADDR 0x0105
98 #define LCDCON_ADDR 0x0107
99 #define LCDPS_ADDR 0x0108
100 #define LVDCON_ADDR 0x0109
101 #define EEDATA_ADDR 0x010C
102 #define EEDATL_ADDR 0x010C
103 #define EEADR_ADDR 0x010D
104 #define EEADRL_ADDR 0x010D
105 #define EEDATH_ADDR 0x010E
106 #define EEADRH_ADDR 0x010F
107 #define LCDDATA0_ADDR 0x0110
108 #define LCDDATA1_ADDR 0x0111
109 #define LCDDATA2_ADDR 0x0112
110 #define LCDDATA3_ADDR 0x0113
111 #define LCDDATA4_ADDR 0x0114
112 #define LCDDATA5_ADDR 0x0115
113 #define LCDDATA6_ADDR 0x0116
114 #define LCDDATA7_ADDR 0x0117
115 #define LCDDATA8_ADDR 0x0118
116 #define LCDDATA9_ADDR 0x0119
117 #define LCDDATA10_ADDR 0x011A
118 #define LCDDATA11_ADDR 0x011B
119 #define LCDSE0_ADDR 0x011C
120 #define LCDSE1_ADDR 0x011D
121 #define LCDSE2_ADDR 0x011E
122 #define EECON1_ADDR 0x018C
123 #define EECON2_ADDR 0x018D
125 #endif // #ifndef NO_ADDR_DEFINES
127 //==============================================================================
129 // Register Definitions
131 //==============================================================================
133 extern __at(0x0000) __sfr INDF
;
134 extern __at(0x0001) __sfr TMR0
;
135 extern __at(0x0002) __sfr PCL
;
137 //==============================================================================
140 extern __at(0x0003) __sfr STATUS
;
164 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
175 //==============================================================================
177 extern __at(0x0004) __sfr FSR
;
179 //==============================================================================
182 extern __at(0x0005) __sfr PORTA
;
196 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
207 //==============================================================================
210 //==============================================================================
213 extern __at(0x0006) __sfr PORTB
;
227 extern __at(0x0006) volatile __PORTBbits_t PORTBbits
;
238 //==============================================================================
241 //==============================================================================
244 extern __at(0x0007) __sfr PORTC
;
258 extern __at(0x0007) volatile __PORTCbits_t PORTCbits
;
269 //==============================================================================
272 //==============================================================================
275 extern __at(0x0008) __sfr PORTD
;
289 extern __at(0x0008) volatile __PORTDbits_t PORTDbits
;
300 //==============================================================================
303 //==============================================================================
306 extern __at(0x0009) __sfr PORTE
;
329 extern __at(0x0009) volatile __PORTEbits_t PORTEbits
;
336 //==============================================================================
338 extern __at(0x000A) __sfr PCLATH
;
340 //==============================================================================
343 extern __at(0x000B) __sfr INTCON
;
372 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
385 //==============================================================================
388 //==============================================================================
391 extern __at(0x000C) __sfr PIR1
;
405 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
416 //==============================================================================
419 //==============================================================================
422 extern __at(0x000D) __sfr PIR2
;
436 extern __at(0x000D) volatile __PIR2bits_t PIR2bits
;
445 //==============================================================================
447 extern __at(0x000E) __sfr TMR1
;
448 extern __at(0x000E) __sfr TMR1L
;
449 extern __at(0x000F) __sfr TMR1H
;
451 //==============================================================================
454 extern __at(0x0010) __sfr T1CON
;
462 unsigned NOT_T1SYNC
: 1;
463 unsigned T1OSCEN
: 1;
464 unsigned T1CKPS0
: 1;
465 unsigned T1CKPS1
: 1;
486 unsigned T1INSYNC
: 1;
502 extern __at(0x0010) volatile __T1CONbits_t T1CONbits
;
506 #define _NOT_T1SYNC 0x04
508 #define _T1INSYNC 0x04
509 #define _T1OSCEN 0x08
510 #define _T1CKPS0 0x10
511 #define _T1CKPS1 0x20
516 //==============================================================================
518 extern __at(0x0011) __sfr TMR2
;
520 //==============================================================================
523 extern __at(0x0012) __sfr T2CON
;
529 unsigned T2CKPS0
: 1;
530 unsigned T2CKPS1
: 1;
532 unsigned TOUTPS0
: 1;
533 unsigned TOUTPS1
: 1;
534 unsigned TOUTPS2
: 1;
535 unsigned TOUTPS3
: 1;
553 extern __at(0x0012) volatile __T2CONbits_t T2CONbits
;
555 #define _T2CKPS0 0x01
556 #define _T2CKPS1 0x02
558 #define _TOUTPS0 0x08
559 #define _TOUTPS1 0x10
560 #define _TOUTPS2 0x20
561 #define _TOUTPS3 0x40
563 //==============================================================================
565 extern __at(0x0013) __sfr SSPBUF
;
567 //==============================================================================
570 extern __at(0x0014) __sfr SSPCON
;
593 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits
;
604 //==============================================================================
606 extern __at(0x0015) __sfr CCPR1
;
607 extern __at(0x0015) __sfr CCPR1L
;
608 extern __at(0x0016) __sfr CCPR1H
;
610 //==============================================================================
613 extern __at(0x0017) __sfr CCP1CON
;
636 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits
;
645 //==============================================================================
648 //==============================================================================
651 extern __at(0x0018) __sfr RCSTA
;
687 unsigned NOT_RC8
: 1;
704 extern __at(0x0018) volatile __RCSTAbits_t RCSTAbits
;
715 #define _NOT_RC8 0x40
719 //==============================================================================
721 extern __at(0x0019) __sfr TXREG
;
722 extern __at(0x001A) __sfr RCREG
;
723 extern __at(0x001B) __sfr CCPR2
;
724 extern __at(0x001B) __sfr CCPR2L
;
725 extern __at(0x001C) __sfr CCPR2H
;
727 //==============================================================================
730 extern __at(0x001D) __sfr CCP2CON
;
753 extern __at(0x001D) volatile __CCP2CONbits_t CCP2CONbits
;
762 //==============================================================================
764 extern __at(0x001E) __sfr ADRESH
;
766 //==============================================================================
769 extern __at(0x001F) __sfr ADCON0
;
776 unsigned GO_NOT_DONE
: 1;
788 unsigned NOT_DONE
: 1;
800 unsigned GO_DONE
: 1;
836 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
839 #define _GO_NOT_DONE 0x02
840 #define _NOT_DONE 0x02
841 #define _GO_DONE 0x02
850 //==============================================================================
853 //==============================================================================
856 extern __at(0x0081) __sfr OPTION_REG
;
869 unsigned NOT_RBPU
: 1;
877 } __OPTION_REGbits_t
;
879 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
888 #define _NOT_RBPU 0x80
890 //==============================================================================
893 //==============================================================================
896 extern __at(0x0085) __sfr TRISA
;
910 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
921 //==============================================================================
924 //==============================================================================
927 extern __at(0x0086) __sfr TRISB
;
941 extern __at(0x0086) volatile __TRISBbits_t TRISBbits
;
952 //==============================================================================
955 //==============================================================================
958 extern __at(0x0087) __sfr TRISC
;
972 extern __at(0x0087) volatile __TRISCbits_t TRISCbits
;
983 //==============================================================================
986 //==============================================================================
989 extern __at(0x0088) __sfr TRISD
;
1000 unsigned TRISD7
: 1;
1003 extern __at(0x0088) volatile __TRISDbits_t TRISDbits
;
1005 #define _TRISD0 0x01
1006 #define _TRISD1 0x02
1007 #define _TRISD2 0x04
1008 #define _TRISD3 0x08
1009 #define _TRISD4 0x10
1010 #define _TRISD5 0x20
1011 #define _TRISD6 0x40
1012 #define _TRISD7 0x80
1014 //==============================================================================
1017 //==============================================================================
1020 extern __at(0x0089) __sfr TRISE
;
1026 unsigned TRISE0
: 1;
1027 unsigned TRISE1
: 1;
1028 unsigned TRISE2
: 1;
1029 unsigned TRISE3
: 1;
1043 extern __at(0x0089) volatile __TRISEbits_t TRISEbits
;
1045 #define _TRISE0 0x01
1046 #define _TRISE1 0x02
1047 #define _TRISE2 0x04
1048 #define _TRISE3 0x08
1050 //==============================================================================
1053 //==============================================================================
1056 extern __at(0x008C) __sfr PIE1
;
1060 unsigned TMR1IE
: 1;
1061 unsigned TMR2IE
: 1;
1062 unsigned CCP1IE
: 1;
1070 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
1072 #define _TMR1IE 0x01
1073 #define _TMR2IE 0x02
1074 #define _CCP1IE 0x04
1081 //==============================================================================
1084 //==============================================================================
1087 extern __at(0x008D) __sfr PIE2
;
1091 unsigned CCP2IE
: 1;
1101 extern __at(0x008D) volatile __PIE2bits_t PIE2bits
;
1103 #define _CCP2IE 0x01
1110 //==============================================================================
1113 //==============================================================================
1116 extern __at(0x008E) __sfr PCON
;
1122 unsigned NOT_BOR
: 1;
1123 unsigned NOT_POR
: 1;
1126 unsigned SBOREN
: 1;
1134 unsigned NOT_BO
: 1;
1145 extern __at(0x008E) volatile __PCONbits_t PCONbits
;
1147 #define _NOT_BOR 0x01
1148 #define _NOT_BO 0x01
1149 #define _NOT_POR 0x02
1150 #define _SBOREN 0x10
1152 //==============================================================================
1155 //==============================================================================
1158 extern __at(0x008F) __sfr OSCCON
;
1182 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits
;
1192 //==============================================================================
1195 //==============================================================================
1198 extern __at(0x0090) __sfr OSCTUNE
;
1221 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits
;
1229 //==============================================================================
1232 //==============================================================================
1235 extern __at(0x0091) __sfr ANSEL
;
1264 extern __at(0x0091) volatile __ANSELbits_t ANSELbits
;
1283 //==============================================================================
1285 extern __at(0x0092) __sfr PR2
;
1286 extern __at(0x0093) __sfr SSPADD
;
1288 //==============================================================================
1291 extern __at(0x0094) __sfr SSPSTAT
;
1299 unsigned R_NOT_W
: 1;
1302 unsigned D_NOT_A
: 1;
1312 unsigned I2C_START
: 1;
1313 unsigned I2C_STOP
: 1;
1323 unsigned I2C_READ
: 1;
1326 unsigned I2C_DATA
: 1;
1347 unsigned NOT_WRITE
: 1;
1350 unsigned NOT_ADDRESS
: 1;
1371 unsigned READ_WRITE
: 1;
1374 unsigned DATA_ADDRESS
: 1;
1380 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits
;
1384 #define _R_NOT_W 0x04
1386 #define _I2C_READ 0x04
1388 #define _NOT_WRITE 0x04
1390 #define _READ_WRITE 0x04
1392 #define _I2C_START 0x08
1394 #define _I2C_STOP 0x10
1395 #define _D_NOT_A 0x20
1397 #define _I2C_DATA 0x20
1399 #define _NOT_ADDRESS 0x20
1401 #define _DATA_ADDRESS 0x20
1405 //==============================================================================
1408 //==============================================================================
1411 extern __at(0x0095) __sfr WPU
;
1440 extern __at(0x0095) volatile __WPUbits_t WPUbits
;
1459 //==============================================================================
1462 //==============================================================================
1465 extern __at(0x0095) __sfr WPUB
;
1494 extern __at(0x0095) volatile __WPUBbits_t WPUBbits
;
1496 #define _WPUB_WPUB0 0x01
1497 #define _WPUB_WPU0 0x01
1498 #define _WPUB_WPUB1 0x02
1499 #define _WPUB_WPU1 0x02
1500 #define _WPUB_WPUB2 0x04
1501 #define _WPUB_WPU2 0x04
1502 #define _WPUB_WPUB3 0x08
1503 #define _WPUB_WPU3 0x08
1504 #define _WPUB_WPUB4 0x10
1505 #define _WPUB_WPU4 0x10
1506 #define _WPUB_WPUB5 0x20
1507 #define _WPUB_WPU5 0x20
1508 #define _WPUB_WPUB6 0x40
1509 #define _WPUB_WPU6 0x40
1510 #define _WPUB_WPUB7 0x80
1511 #define _WPUB_WPU7 0x80
1513 //==============================================================================
1516 //==============================================================================
1519 extern __at(0x0096) __sfr IOC
;
1548 extern __at(0x0096) volatile __IOCbits_t IOCbits
;
1559 //==============================================================================
1562 //==============================================================================
1565 extern __at(0x0096) __sfr IOCB
;
1594 extern __at(0x0096) volatile __IOCBbits_t IOCBbits
;
1596 #define _IOCB_IOCB4 0x10
1597 #define _IOCB_IOC4 0x10
1598 #define _IOCB_IOCB5 0x20
1599 #define _IOCB_IOC5 0x20
1600 #define _IOCB_IOCB6 0x40
1601 #define _IOCB_IOC6 0x40
1602 #define _IOCB_IOCB7 0x80
1603 #define _IOCB_IOC7 0x80
1605 //==============================================================================
1608 //==============================================================================
1611 extern __at(0x0097) __sfr CMCON1
;
1615 unsigned C2SYNC
: 1;
1625 extern __at(0x0097) volatile __CMCON1bits_t CMCON1bits
;
1627 #define _C2SYNC 0x01
1630 //==============================================================================
1633 //==============================================================================
1636 extern __at(0x0098) __sfr TXSTA
;
1660 unsigned NOT_TX8
: 1;
1677 extern __at(0x0098) volatile __TXSTAbits_t TXSTAbits
;
1686 #define _NOT_TX8 0x40
1690 //==============================================================================
1692 extern __at(0x0099) __sfr SPBRG
;
1694 //==============================================================================
1697 extern __at(0x009C) __sfr CMCON0
;
1720 extern __at(0x009C) volatile __CMCON0bits_t CMCON0bits
;
1731 //==============================================================================
1734 //==============================================================================
1737 extern __at(0x009D) __sfr VRCON
;
1760 extern __at(0x009D) volatile __VRCONbits_t VRCONbits
;
1769 //==============================================================================
1771 extern __at(0x009E) __sfr ADRESL
;
1773 //==============================================================================
1776 extern __at(0x009F) __sfr ADCON1
;
1800 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits
;
1806 //==============================================================================
1809 //==============================================================================
1812 extern __at(0x0105) __sfr WDTCON
;
1818 unsigned SWDTEN
: 1;
1819 unsigned WDTPS0
: 1;
1820 unsigned WDTPS1
: 1;
1821 unsigned WDTPS2
: 1;
1822 unsigned WDTPS3
: 1;
1848 extern __at(0x0105) volatile __WDTCONbits_t WDTCONbits
;
1850 #define _SWDTEN 0x01
1852 #define _WDTPS0 0x02
1853 #define _WDTPS1 0x04
1854 #define _WDTPS2 0x08
1855 #define _WDTPS3 0x10
1857 //==============================================================================
1860 //==============================================================================
1863 extern __at(0x0107) __sfr LCDCON
;
1873 unsigned VLCDEN
: 1;
1893 extern __at(0x0107) volatile __LCDCONbits_t LCDCONbits
;
1899 #define _VLCDEN 0x10
1904 //==============================================================================
1907 //==============================================================================
1910 extern __at(0x0108) __sfr LCDPS
;
1922 unsigned BIASMD
: 1;
1933 extern __at(0x0108) volatile __LCDPSbits_t LCDPSbits
;
1941 #define _BIASMD 0x40
1944 //==============================================================================
1947 //==============================================================================
1950 extern __at(0x0109) __sfr LVDCON
;
1973 extern __at(0x0109) volatile __LVDCONbits_t LVDCONbits
;
1981 //==============================================================================
1984 //==============================================================================
1987 extern __at(0x010C) __sfr EEDATA
;
1991 unsigned EEDATL0
: 1;
1992 unsigned EEDATL1
: 1;
1993 unsigned EEDATL2
: 1;
1994 unsigned EEDATL3
: 1;
1995 unsigned EEDATL4
: 1;
1996 unsigned EEDATL5
: 1;
1997 unsigned EEDATL6
: 1;
1998 unsigned EEDATL7
: 1;
2001 extern __at(0x010C) volatile __EEDATAbits_t EEDATAbits
;
2003 #define _EEDATL0 0x01
2004 #define _EEDATL1 0x02
2005 #define _EEDATL2 0x04
2006 #define _EEDATL3 0x08
2007 #define _EEDATL4 0x10
2008 #define _EEDATL5 0x20
2009 #define _EEDATL6 0x40
2010 #define _EEDATL7 0x80
2012 //==============================================================================
2015 //==============================================================================
2018 extern __at(0x010C) __sfr EEDATL
;
2022 unsigned EEDATL0
: 1;
2023 unsigned EEDATL1
: 1;
2024 unsigned EEDATL2
: 1;
2025 unsigned EEDATL3
: 1;
2026 unsigned EEDATL4
: 1;
2027 unsigned EEDATL5
: 1;
2028 unsigned EEDATL6
: 1;
2029 unsigned EEDATL7
: 1;
2032 extern __at(0x010C) volatile __EEDATLbits_t EEDATLbits
;
2034 #define _EEDATL_EEDATL0 0x01
2035 #define _EEDATL_EEDATL1 0x02
2036 #define _EEDATL_EEDATL2 0x04
2037 #define _EEDATL_EEDATL3 0x08
2038 #define _EEDATL_EEDATL4 0x10
2039 #define _EEDATL_EEDATL5 0x20
2040 #define _EEDATL_EEDATL6 0x40
2041 #define _EEDATL_EEDATL7 0x80
2043 //==============================================================================
2046 //==============================================================================
2049 extern __at(0x010D) __sfr EEADR
;
2053 unsigned EEADRL0
: 1;
2054 unsigned EEADRL1
: 1;
2055 unsigned EEADRL2
: 1;
2056 unsigned EEADRL3
: 1;
2057 unsigned EEADRL4
: 1;
2058 unsigned EEADRL5
: 1;
2059 unsigned EEADRL6
: 1;
2060 unsigned EEADRL7
: 1;
2063 extern __at(0x010D) volatile __EEADRbits_t EEADRbits
;
2065 #define _EEADRL0 0x01
2066 #define _EEADRL1 0x02
2067 #define _EEADRL2 0x04
2068 #define _EEADRL3 0x08
2069 #define _EEADRL4 0x10
2070 #define _EEADRL5 0x20
2071 #define _EEADRL6 0x40
2072 #define _EEADRL7 0x80
2074 //==============================================================================
2077 //==============================================================================
2080 extern __at(0x010D) __sfr EEADRL
;
2084 unsigned EEADRL0
: 1;
2085 unsigned EEADRL1
: 1;
2086 unsigned EEADRL2
: 1;
2087 unsigned EEADRL3
: 1;
2088 unsigned EEADRL4
: 1;
2089 unsigned EEADRL5
: 1;
2090 unsigned EEADRL6
: 1;
2091 unsigned EEADRL7
: 1;
2094 extern __at(0x010D) volatile __EEADRLbits_t EEADRLbits
;
2096 #define _EEADRL_EEADRL0 0x01
2097 #define _EEADRL_EEADRL1 0x02
2098 #define _EEADRL_EEADRL2 0x04
2099 #define _EEADRL_EEADRL3 0x08
2100 #define _EEADRL_EEADRL4 0x10
2101 #define _EEADRL_EEADRL5 0x20
2102 #define _EEADRL_EEADRL6 0x40
2103 #define _EEADRL_EEADRL7 0x80
2105 //==============================================================================
2108 //==============================================================================
2111 extern __at(0x010E) __sfr EEDATH
;
2117 unsigned EEDATH0
: 1;
2118 unsigned EEDATH1
: 1;
2119 unsigned EEDATH2
: 1;
2120 unsigned EEDATH3
: 1;
2121 unsigned EEDATH4
: 1;
2122 unsigned EEDATH5
: 1;
2129 unsigned EEDATH
: 6;
2134 extern __at(0x010E) volatile __EEDATHbits_t EEDATHbits
;
2136 #define _EEDATH0 0x01
2137 #define _EEDATH1 0x02
2138 #define _EEDATH2 0x04
2139 #define _EEDATH3 0x08
2140 #define _EEDATH4 0x10
2141 #define _EEDATH5 0x20
2143 //==============================================================================
2146 //==============================================================================
2149 extern __at(0x010F) __sfr EEADRH
;
2155 unsigned EEADRH0
: 1;
2156 unsigned EEADRH1
: 1;
2157 unsigned EEADRH2
: 1;
2158 unsigned EEADRH3
: 1;
2159 unsigned EEADRH4
: 1;
2167 unsigned EEADRH
: 5;
2172 extern __at(0x010F) volatile __EEADRHbits_t EEADRHbits
;
2174 #define _EEADRH0 0x01
2175 #define _EEADRH1 0x02
2176 #define _EEADRH2 0x04
2177 #define _EEADRH3 0x08
2178 #define _EEADRH4 0x10
2180 //==============================================================================
2183 //==============================================================================
2186 extern __at(0x0110) __sfr LCDDATA0
;
2204 unsigned SEG0COM0
: 1;
2205 unsigned SEG1COM0
: 1;
2206 unsigned SEG2COM0
: 1;
2207 unsigned SEG3COM0
: 1;
2208 unsigned SEG4COM0
: 1;
2209 unsigned SEG5COM0
: 1;
2210 unsigned SEG6COM0
: 1;
2211 unsigned SEG7COM0
: 1;
2227 extern __at(0x0110) volatile __LCDDATA0bits_t LCDDATA0bits
;
2230 #define _SEG0COM0 0x01
2233 #define _SEG1COM0 0x02
2236 #define _SEG2COM0 0x04
2239 #define _SEG3COM0 0x08
2242 #define _SEG4COM0 0x10
2245 #define _SEG5COM0 0x20
2248 #define _SEG6COM0 0x40
2251 #define _SEG7COM0 0x80
2254 //==============================================================================
2257 //==============================================================================
2260 extern __at(0x0111) __sfr LCDDATA1
;
2278 unsigned SEG8COM0
: 1;
2279 unsigned SEG9COM0
: 1;
2280 unsigned SEG10COM0
: 1;
2281 unsigned SEG11COM0
: 1;
2282 unsigned SEG12COM0
: 1;
2283 unsigned SEG13COM0
: 1;
2284 unsigned SEG14COM0
: 1;
2285 unsigned SEG15COM0
: 1;
2301 extern __at(0x0111) volatile __LCDDATA1bits_t LCDDATA1bits
;
2304 #define _SEG8COM0 0x01
2307 #define _SEG9COM0 0x02
2310 #define _SEG10COM0 0x04
2313 #define _SEG11COM0 0x08
2316 #define _SEG12COM0 0x10
2319 #define _SEG13COM0 0x20
2322 #define _SEG14COM0 0x40
2325 #define _SEG15COM0 0x80
2328 //==============================================================================
2331 //==============================================================================
2334 extern __at(0x0112) __sfr LCDDATA2
;
2352 unsigned SEG16COM0
: 1;
2353 unsigned SEG17COM0
: 1;
2354 unsigned SEG18COM0
: 1;
2355 unsigned SEG19COM0
: 1;
2356 unsigned SEG20COM0
: 1;
2357 unsigned SEG21COM0
: 1;
2358 unsigned SEG22COM0
: 1;
2359 unsigned SEG23COM0
: 1;
2375 extern __at(0x0112) volatile __LCDDATA2bits_t LCDDATA2bits
;
2378 #define _SEG16COM0 0x01
2381 #define _SEG17COM0 0x02
2384 #define _SEG18COM0 0x04
2387 #define _SEG19COM0 0x08
2390 #define _SEG20COM0 0x10
2393 #define _SEG21COM0 0x20
2396 #define _SEG22COM0 0x40
2399 #define _SEG23COM0 0x80
2402 //==============================================================================
2405 //==============================================================================
2408 extern __at(0x0113) __sfr LCDDATA3
;
2426 unsigned SEG0COM1
: 1;
2427 unsigned SEG1COM1
: 1;
2428 unsigned SEG2COM1
: 1;
2429 unsigned SEG3COM1
: 1;
2430 unsigned SEG4COM1
: 1;
2431 unsigned SEG5COM1
: 1;
2432 unsigned SEG6COM1
: 1;
2433 unsigned SEG7COM1
: 1;
2449 extern __at(0x0113) volatile __LCDDATA3bits_t LCDDATA3bits
;
2451 #define _LCDDATA3_SEG0 0x01
2452 #define _LCDDATA3_SEG0COM1 0x01
2453 #define _LCDDATA3_S0C1 0x01
2454 #define _LCDDATA3_SEG1 0x02
2455 #define _LCDDATA3_SEG1COM1 0x02
2456 #define _LCDDATA3_S1C1 0x02
2457 #define _LCDDATA3_SEG2 0x04
2458 #define _LCDDATA3_SEG2COM1 0x04
2459 #define _LCDDATA3_S2C1 0x04
2460 #define _LCDDATA3_SEG3 0x08
2461 #define _LCDDATA3_SEG3COM1 0x08
2462 #define _LCDDATA3_S3C1 0x08
2463 #define _LCDDATA3_SEG4 0x10
2464 #define _LCDDATA3_SEG4COM1 0x10
2465 #define _LCDDATA3_S4C1 0x10
2466 #define _LCDDATA3_SEG5 0x20
2467 #define _LCDDATA3_SEG5COM1 0x20
2468 #define _LCDDATA3_S5C1 0x20
2469 #define _LCDDATA3_SEG6 0x40
2470 #define _LCDDATA3_SEG6COM1 0x40
2471 #define _LCDDATA3_S6C1 0x40
2472 #define _LCDDATA3_SEG7 0x80
2473 #define _LCDDATA3_SEG7COM1 0x80
2474 #define _LCDDATA3_S7C1 0x80
2476 //==============================================================================
2479 //==============================================================================
2482 extern __at(0x0114) __sfr LCDDATA4
;
2500 unsigned SEG8COM1
: 1;
2501 unsigned SEG9COM1
: 1;
2502 unsigned SEG10COM1
: 1;
2503 unsigned SEG11COM1
: 1;
2504 unsigned SEG12COM1
: 1;
2505 unsigned SEG13COM1
: 1;
2506 unsigned SEG14COM1
: 1;
2507 unsigned SEG15COM1
: 1;
2523 extern __at(0x0114) volatile __LCDDATA4bits_t LCDDATA4bits
;
2525 #define _LCDDATA4_SEG8 0x01
2526 #define _LCDDATA4_SEG8COM1 0x01
2527 #define _LCDDATA4_S8C1 0x01
2528 #define _LCDDATA4_SEG9 0x02
2529 #define _LCDDATA4_SEG9COM1 0x02
2530 #define _LCDDATA4_S9C1 0x02
2531 #define _LCDDATA4_SEG10 0x04
2532 #define _LCDDATA4_SEG10COM1 0x04
2533 #define _LCDDATA4_S10C1 0x04
2534 #define _LCDDATA4_SEG11 0x08
2535 #define _LCDDATA4_SEG11COM1 0x08
2536 #define _LCDDATA4_S11C1 0x08
2537 #define _LCDDATA4_SEG12 0x10
2538 #define _LCDDATA4_SEG12COM1 0x10
2539 #define _LCDDATA4_S12C1 0x10
2540 #define _LCDDATA4_SEG13 0x20
2541 #define _LCDDATA4_SEG13COM1 0x20
2542 #define _LCDDATA4_S13C1 0x20
2543 #define _LCDDATA4_SEG14 0x40
2544 #define _LCDDATA4_SEG14COM1 0x40
2545 #define _LCDDATA4_S14C1 0x40
2546 #define _LCDDATA4_SEG15 0x80
2547 #define _LCDDATA4_SEG15COM1 0x80
2548 #define _LCDDATA4_S15C1 0x80
2550 //==============================================================================
2553 //==============================================================================
2556 extern __at(0x0115) __sfr LCDDATA5
;
2574 unsigned SEG16COM1
: 1;
2575 unsigned SEG17COM1
: 1;
2576 unsigned SEG18COM1
: 1;
2577 unsigned SEG19COM1
: 1;
2578 unsigned SEG20COM1
: 1;
2579 unsigned SEG21COM1
: 1;
2580 unsigned SEG22COM1
: 1;
2581 unsigned SEG23COM1
: 1;
2597 extern __at(0x0115) volatile __LCDDATA5bits_t LCDDATA5bits
;
2599 #define _LCDDATA5_SEG16 0x01
2600 #define _LCDDATA5_SEG16COM1 0x01
2601 #define _LCDDATA5_S16C1 0x01
2602 #define _LCDDATA5_SEG17 0x02
2603 #define _LCDDATA5_SEG17COM1 0x02
2604 #define _LCDDATA5_S17C1 0x02
2605 #define _LCDDATA5_SEG18 0x04
2606 #define _LCDDATA5_SEG18COM1 0x04
2607 #define _LCDDATA5_S18C1 0x04
2608 #define _LCDDATA5_SEG19 0x08
2609 #define _LCDDATA5_SEG19COM1 0x08
2610 #define _LCDDATA5_S19C1 0x08
2611 #define _LCDDATA5_SEG20 0x10
2612 #define _LCDDATA5_SEG20COM1 0x10
2613 #define _LCDDATA5_S20C1 0x10
2614 #define _LCDDATA5_SEG21 0x20
2615 #define _LCDDATA5_SEG21COM1 0x20
2616 #define _LCDDATA5_S21C1 0x20
2617 #define _LCDDATA5_SEG22 0x40
2618 #define _LCDDATA5_SEG22COM1 0x40
2619 #define _LCDDATA5_S22C1 0x40
2620 #define _LCDDATA5_SEG23 0x80
2621 #define _LCDDATA5_SEG23COM1 0x80
2622 #define _LCDDATA5_S23C1 0x80
2624 //==============================================================================
2627 //==============================================================================
2630 extern __at(0x0116) __sfr LCDDATA6
;
2648 unsigned SEG0COM2
: 1;
2649 unsigned SEG1COM2
: 1;
2650 unsigned SEG2COM2
: 1;
2651 unsigned SEG3COM2
: 1;
2652 unsigned SEG4COM2
: 1;
2653 unsigned SEG5COM2
: 1;
2654 unsigned SEG6COM2
: 1;
2655 unsigned SEG7COM2
: 1;
2671 extern __at(0x0116) volatile __LCDDATA6bits_t LCDDATA6bits
;
2673 #define _LCDDATA6_SEG0 0x01
2674 #define _LCDDATA6_SEG0COM2 0x01
2675 #define _LCDDATA6_S0C2 0x01
2676 #define _LCDDATA6_SEG1 0x02
2677 #define _LCDDATA6_SEG1COM2 0x02
2678 #define _LCDDATA6_S1C2 0x02
2679 #define _LCDDATA6_SEG2 0x04
2680 #define _LCDDATA6_SEG2COM2 0x04
2681 #define _LCDDATA6_S2C2 0x04
2682 #define _LCDDATA6_SEG3 0x08
2683 #define _LCDDATA6_SEG3COM2 0x08
2684 #define _LCDDATA6_S3C2 0x08
2685 #define _LCDDATA6_SEG4 0x10
2686 #define _LCDDATA6_SEG4COM2 0x10
2687 #define _LCDDATA6_S4C2 0x10
2688 #define _LCDDATA6_SEG5 0x20
2689 #define _LCDDATA6_SEG5COM2 0x20
2690 #define _LCDDATA6_S5C2 0x20
2691 #define _LCDDATA6_SEG6 0x40
2692 #define _LCDDATA6_SEG6COM2 0x40
2693 #define _LCDDATA6_S6C2 0x40
2694 #define _LCDDATA6_SEG7 0x80
2695 #define _LCDDATA6_SEG7COM2 0x80
2696 #define _LCDDATA6_S7C2 0x80
2698 //==============================================================================
2701 //==============================================================================
2704 extern __at(0x0117) __sfr LCDDATA7
;
2722 unsigned SEG8COM2
: 1;
2723 unsigned SEG9COM2
: 1;
2724 unsigned SEG10COM2
: 1;
2725 unsigned SEG11COM2
: 1;
2726 unsigned SEG12COM2
: 1;
2727 unsigned SEG13COM2
: 1;
2728 unsigned SEG14COM2
: 1;
2729 unsigned SEG15COM2
: 1;
2745 extern __at(0x0117) volatile __LCDDATA7bits_t LCDDATA7bits
;
2747 #define _LCDDATA7_SEG8 0x01
2748 #define _LCDDATA7_SEG8COM2 0x01
2749 #define _LCDDATA7_S8C2 0x01
2750 #define _LCDDATA7_SEG9 0x02
2751 #define _LCDDATA7_SEG9COM2 0x02
2752 #define _LCDDATA7_S9C2 0x02
2753 #define _LCDDATA7_SEG10 0x04
2754 #define _LCDDATA7_SEG10COM2 0x04
2755 #define _LCDDATA7_S10C2 0x04
2756 #define _LCDDATA7_SEG11 0x08
2757 #define _LCDDATA7_SEG11COM2 0x08
2758 #define _LCDDATA7_S11C2 0x08
2759 #define _LCDDATA7_SEG12 0x10
2760 #define _LCDDATA7_SEG12COM2 0x10
2761 #define _LCDDATA7_S12C2 0x10
2762 #define _LCDDATA7_SEG13 0x20
2763 #define _LCDDATA7_SEG13COM2 0x20
2764 #define _LCDDATA7_S13C2 0x20
2765 #define _LCDDATA7_SEG14 0x40
2766 #define _LCDDATA7_SEG14COM2 0x40
2767 #define _LCDDATA7_S14C2 0x40
2768 #define _LCDDATA7_SEG15 0x80
2769 #define _LCDDATA7_SEG15COM2 0x80
2770 #define _LCDDATA7_S15C2 0x80
2772 //==============================================================================
2775 //==============================================================================
2778 extern __at(0x0118) __sfr LCDDATA8
;
2796 unsigned SEG16COM2
: 1;
2797 unsigned SEG17COM2
: 1;
2798 unsigned SEG18COM2
: 1;
2799 unsigned SEG19COM2
: 1;
2800 unsigned SEG20COM2
: 1;
2801 unsigned SEG21COM2
: 1;
2802 unsigned SEG22COM2
: 1;
2803 unsigned SEG23COM2
: 1;
2819 extern __at(0x0118) volatile __LCDDATA8bits_t LCDDATA8bits
;
2821 #define _LCDDATA8_SEG16 0x01
2822 #define _LCDDATA8_SEG16COM2 0x01
2823 #define _LCDDATA8_S16C2 0x01
2824 #define _LCDDATA8_SEG17 0x02
2825 #define _LCDDATA8_SEG17COM2 0x02
2826 #define _LCDDATA8_S17C2 0x02
2827 #define _LCDDATA8_SEG18 0x04
2828 #define _LCDDATA8_SEG18COM2 0x04
2829 #define _LCDDATA8_S18C2 0x04
2830 #define _LCDDATA8_SEG19 0x08
2831 #define _LCDDATA8_SEG19COM2 0x08
2832 #define _LCDDATA8_S19C2 0x08
2833 #define _LCDDATA8_SEG20 0x10
2834 #define _LCDDATA8_SEG20COM2 0x10
2835 #define _LCDDATA8_S20C2 0x10
2836 #define _LCDDATA8_SEG21 0x20
2837 #define _LCDDATA8_SEG21COM2 0x20
2838 #define _LCDDATA8_S21C2 0x20
2839 #define _LCDDATA8_SEG22 0x40
2840 #define _LCDDATA8_SEG22COM2 0x40
2841 #define _LCDDATA8_S22C2 0x40
2842 #define _LCDDATA8_SEG23 0x80
2843 #define _LCDDATA8_SEG23COM2 0x80
2844 #define _LCDDATA8_S23C2 0x80
2846 //==============================================================================
2849 //==============================================================================
2852 extern __at(0x0119) __sfr LCDDATA9
;
2870 unsigned SEG0COM3
: 1;
2871 unsigned SEG1COM3
: 1;
2872 unsigned SEG2COM3
: 1;
2873 unsigned SEG3COM3
: 1;
2874 unsigned SEG4COM3
: 1;
2875 unsigned SEG5COM3
: 1;
2876 unsigned SEG6COM3
: 1;
2877 unsigned SEG7COM3
: 1;
2893 extern __at(0x0119) volatile __LCDDATA9bits_t LCDDATA9bits
;
2895 #define _LCDDATA9_SEG0 0x01
2896 #define _LCDDATA9_SEG0COM3 0x01
2897 #define _LCDDATA9_S0C3 0x01
2898 #define _LCDDATA9_SEG1 0x02
2899 #define _LCDDATA9_SEG1COM3 0x02
2900 #define _LCDDATA9_S1C3 0x02
2901 #define _LCDDATA9_SEG2 0x04
2902 #define _LCDDATA9_SEG2COM3 0x04
2903 #define _LCDDATA9_S2C3 0x04
2904 #define _LCDDATA9_SEG3 0x08
2905 #define _LCDDATA9_SEG3COM3 0x08
2906 #define _LCDDATA9_S3C3 0x08
2907 #define _LCDDATA9_SEG4 0x10
2908 #define _LCDDATA9_SEG4COM3 0x10
2909 #define _LCDDATA9_S4C3 0x10
2910 #define _LCDDATA9_SEG5 0x20
2911 #define _LCDDATA9_SEG5COM3 0x20
2912 #define _LCDDATA9_S5C3 0x20
2913 #define _LCDDATA9_SEG6 0x40
2914 #define _LCDDATA9_SEG6COM3 0x40
2915 #define _LCDDATA9_S6C3 0x40
2916 #define _LCDDATA9_SEG7 0x80
2917 #define _LCDDATA9_SEG7COM3 0x80
2918 #define _LCDDATA9_S7C3 0x80
2920 //==============================================================================
2923 //==============================================================================
2926 extern __at(0x011A) __sfr LCDDATA10
;
2944 unsigned SEG8COM3
: 1;
2945 unsigned SEG9COM3
: 1;
2946 unsigned SEG10COM3
: 1;
2947 unsigned SEG11COM3
: 1;
2948 unsigned SEG12COM3
: 1;
2949 unsigned SEG13COM3
: 1;
2950 unsigned SEG14COM3
: 1;
2951 unsigned SEG15COM3
: 1;
2965 } __LCDDATA10bits_t
;
2967 extern __at(0x011A) volatile __LCDDATA10bits_t LCDDATA10bits
;
2969 #define _LCDDATA10_SEG8 0x01
2970 #define _LCDDATA10_SEG8COM3 0x01
2971 #define _LCDDATA10_S8C3 0x01
2972 #define _LCDDATA10_SEG9 0x02
2973 #define _LCDDATA10_SEG9COM3 0x02
2974 #define _LCDDATA10_S9C3 0x02
2975 #define _LCDDATA10_SEG10 0x04
2976 #define _LCDDATA10_SEG10COM3 0x04
2977 #define _LCDDATA10_S10C3 0x04
2978 #define _LCDDATA10_SEG11 0x08
2979 #define _LCDDATA10_SEG11COM3 0x08
2980 #define _LCDDATA10_S11C3 0x08
2981 #define _LCDDATA10_SEG12 0x10
2982 #define _LCDDATA10_SEG12COM3 0x10
2983 #define _LCDDATA10_S12C3 0x10
2984 #define _LCDDATA10_SEG13 0x20
2985 #define _LCDDATA10_SEG13COM3 0x20
2986 #define _LCDDATA10_S13C3 0x20
2987 #define _LCDDATA10_SEG14 0x40
2988 #define _LCDDATA10_SEG14COM3 0x40
2989 #define _LCDDATA10_S14C3 0x40
2990 #define _LCDDATA10_SEG15 0x80
2991 #define _LCDDATA10_SEG15COM3 0x80
2992 #define _LCDDATA10_S15C3 0x80
2994 //==============================================================================
2997 //==============================================================================
3000 extern __at(0x011B) __sfr LCDDATA11
;
3018 unsigned SEG16COM3
: 1;
3019 unsigned SEG17COM3
: 1;
3020 unsigned SEG18COM3
: 1;
3021 unsigned SEG19COM3
: 1;
3022 unsigned SEG20COM3
: 1;
3023 unsigned SEG21COM3
: 1;
3024 unsigned SEG22COM3
: 1;
3025 unsigned SEG23COM3
: 1;
3039 } __LCDDATA11bits_t
;
3041 extern __at(0x011B) volatile __LCDDATA11bits_t LCDDATA11bits
;
3043 #define _LCDDATA11_SEG16 0x01
3044 #define _LCDDATA11_SEG16COM3 0x01
3045 #define _LCDDATA11_S16C3 0x01
3046 #define _LCDDATA11_SEG17 0x02
3047 #define _LCDDATA11_SEG17COM3 0x02
3048 #define _LCDDATA11_S17C3 0x02
3049 #define _LCDDATA11_SEG18 0x04
3050 #define _LCDDATA11_SEG18COM3 0x04
3051 #define _LCDDATA11_S18C3 0x04
3052 #define _LCDDATA11_SEG19 0x08
3053 #define _LCDDATA11_SEG19COM3 0x08
3054 #define _LCDDATA11_S19C3 0x08
3055 #define _LCDDATA11_SEG20 0x10
3056 #define _LCDDATA11_SEG20COM3 0x10
3057 #define _LCDDATA11_S20C3 0x10
3058 #define _LCDDATA11_SEG21 0x20
3059 #define _LCDDATA11_SEG21COM3 0x20
3060 #define _LCDDATA11_S21C3 0x20
3061 #define _LCDDATA11_SEG22 0x40
3062 #define _LCDDATA11_SEG22COM3 0x40
3063 #define _LCDDATA11_S22C3 0x40
3064 #define _LCDDATA11_SEG23 0x80
3065 #define _LCDDATA11_SEG23COM3 0x80
3066 #define _LCDDATA11_S23C3 0x80
3068 //==============================================================================
3071 //==============================================================================
3074 extern __at(0x011C) __sfr LCDSE0
;
3104 unsigned SEGEN0
: 1;
3105 unsigned SEGEN1
: 1;
3106 unsigned SEGEN2
: 1;
3107 unsigned SEGEN3
: 1;
3108 unsigned SEGEN4
: 1;
3109 unsigned SEGEN5
: 1;
3110 unsigned SEGEN6
: 1;
3111 unsigned SEGEN7
: 1;
3115 extern __at(0x011C) volatile __LCDSE0bits_t LCDSE0bits
;
3117 #define _LCDSE0_SEG0 0x01
3118 #define _LCDSE0_SE0 0x01
3119 #define _LCDSE0_SEGEN0 0x01
3120 #define _LCDSE0_SEG1 0x02
3121 #define _LCDSE0_SE1 0x02
3122 #define _LCDSE0_SEGEN1 0x02
3123 #define _LCDSE0_SEG2 0x04
3124 #define _LCDSE0_SE2 0x04
3125 #define _LCDSE0_SEGEN2 0x04
3126 #define _LCDSE0_SEG3 0x08
3127 #define _LCDSE0_SE3 0x08
3128 #define _LCDSE0_SEGEN3 0x08
3129 #define _LCDSE0_SEG4 0x10
3130 #define _LCDSE0_SE4 0x10
3131 #define _LCDSE0_SEGEN4 0x10
3132 #define _LCDSE0_SEG5 0x20
3133 #define _LCDSE0_SE5 0x20
3134 #define _LCDSE0_SEGEN5 0x20
3135 #define _LCDSE0_SEG6 0x40
3136 #define _LCDSE0_SE6 0x40
3137 #define _LCDSE0_SEGEN6 0x40
3138 #define _LCDSE0_SEG7 0x80
3139 #define _LCDSE0_SE7 0x80
3140 #define _LCDSE0_SEGEN7 0x80
3142 //==============================================================================
3145 //==============================================================================
3148 extern __at(0x011D) __sfr LCDSE1
;
3178 unsigned SEGEN8
: 1;
3179 unsigned SEGEN9
: 1;
3180 unsigned SEGEN10
: 1;
3181 unsigned SEGEN11
: 1;
3182 unsigned SEGEN12
: 1;
3183 unsigned SEGEN13
: 1;
3184 unsigned SEGEN14
: 1;
3185 unsigned SEGEN15
: 1;
3189 extern __at(0x011D) volatile __LCDSE1bits_t LCDSE1bits
;
3191 #define _LCDSE1_SEG8 0x01
3192 #define _LCDSE1_SE8 0x01
3193 #define _LCDSE1_SEGEN8 0x01
3194 #define _LCDSE1_SEG9 0x02
3195 #define _LCDSE1_SE9 0x02
3196 #define _LCDSE1_SEGEN9 0x02
3197 #define _LCDSE1_SEG10 0x04
3198 #define _LCDSE1_SE10 0x04
3199 #define _LCDSE1_SEGEN10 0x04
3200 #define _LCDSE1_SEG11 0x08
3201 #define _LCDSE1_SE11 0x08
3202 #define _LCDSE1_SEGEN11 0x08
3203 #define _LCDSE1_SEG12 0x10
3204 #define _LCDSE1_SE12 0x10
3205 #define _LCDSE1_SEGEN12 0x10
3206 #define _LCDSE1_SEG13 0x20
3207 #define _LCDSE1_SE13 0x20
3208 #define _LCDSE1_SEGEN13 0x20
3209 #define _LCDSE1_SEG14 0x40
3210 #define _LCDSE1_SE14 0x40
3211 #define _LCDSE1_SEGEN14 0x40
3212 #define _LCDSE1_SEG15 0x80
3213 #define _LCDSE1_SE15 0x80
3214 #define _LCDSE1_SEGEN15 0x80
3216 //==============================================================================
3219 //==============================================================================
3222 extern __at(0x011E) __sfr LCDSE2
;
3252 unsigned SEGEN16
: 1;
3253 unsigned SEGEN17
: 1;
3254 unsigned SEGEN18
: 1;
3255 unsigned SEGEN19
: 1;
3256 unsigned SEGEN20
: 1;
3257 unsigned SEGEN21
: 1;
3258 unsigned SEGEN22
: 1;
3259 unsigned SEGEN23
: 1;
3263 extern __at(0x011E) volatile __LCDSE2bits_t LCDSE2bits
;
3265 #define _LCDSE2_SEG16 0x01
3266 #define _LCDSE2_SE16 0x01
3267 #define _LCDSE2_SEGEN16 0x01
3268 #define _LCDSE2_SEG17 0x02
3269 #define _LCDSE2_SE17 0x02
3270 #define _LCDSE2_SEGEN17 0x02
3271 #define _LCDSE2_SEG18 0x04
3272 #define _LCDSE2_SE18 0x04
3273 #define _LCDSE2_SEGEN18 0x04
3274 #define _LCDSE2_SEG19 0x08
3275 #define _LCDSE2_SE19 0x08
3276 #define _LCDSE2_SEGEN19 0x08
3277 #define _LCDSE2_SEG20 0x10
3278 #define _LCDSE2_SE20 0x10
3279 #define _LCDSE2_SEGEN20 0x10
3280 #define _LCDSE2_SEG21 0x20
3281 #define _LCDSE2_SE21 0x20
3282 #define _LCDSE2_SEGEN21 0x20
3283 #define _LCDSE2_SEG22 0x40
3284 #define _LCDSE2_SE22 0x40
3285 #define _LCDSE2_SEGEN22 0x40
3286 #define _LCDSE2_SEG23 0x80
3287 #define _LCDSE2_SE23 0x80
3288 #define _LCDSE2_SEGEN23 0x80
3290 //==============================================================================
3293 //==============================================================================
3296 extern __at(0x018C) __sfr EECON1
;
3325 extern __at(0x018C) volatile __EECON1bits_t EECON1bits
;
3335 //==============================================================================
3337 extern __at(0x018D) __sfr EECON2
;
3339 //==============================================================================
3341 // Configuration Bits
3343 //==============================================================================
3345 #define _CONFIG 0x2007
3347 //----------------------------- CONFIG Options -------------------------------
3349 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI.
3350 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI.
3351 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI.
3352 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI.
3353 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI.
3354 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI.
3355 #define _FOSC_EC 0x3FFB // EC: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, CLKIN on RA7/OSC1/CLKIN/T1OSI.
3356 #define _EC_OSC 0x3FFB // EC: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, CLKIN on RA7/OSC1/CLKIN/T1OSI.
3357 #define _FOSC_INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI.
3358 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI.
3359 #define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI.
3360 #define _FOSC_INTOSCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI.
3361 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI.
3362 #define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI.
3363 #define _FOSC_EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI.
3364 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // RCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI.
3365 #define _EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI.
3366 #define _FOSC_EXTRCCLK 0x3FFF // RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI.
3367 #define _EXTRC_OSC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI.
3368 #define _EXTRC 0x3FFF // RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI.
3369 #define _WDTE_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
3370 #define _WDT_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
3371 #define _WDTE_ON 0x3FFF // WDT enabled.
3372 #define _WDT_ON 0x3FFF // WDT enabled.
3373 #define _PWRTE_ON 0x3FEF // PWRT enabled.
3374 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
3375 #define _MCLRE_OFF 0x3FDF // RE3/MCLR pin function is digital input, MCLR internally tied to VDD.
3376 #define _MCLRE_ON 0x3FFF // RE3/MCLR pin function is MCLR.
3377 #define _CP_ON 0x3FBF // Program memory code protection is enabled.
3378 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
3379 #define _CPD_ON 0x3F7F // Data memory code protection is enabled.
3380 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
3381 #define _BOREN_OFF 0x3CFF // BOR disabled.
3382 #define _BOD_OFF 0x3CFF // BOR disabled.
3383 #define _BOREN_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
3384 #define _BOD_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
3385 #define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
3386 #define _BOD_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
3387 #define _BOREN_ON 0x3FFF // BOR enabled.
3388 #define _BOD_ON 0x3FFF // BOR enabled.
3389 #define _IESO_OFF 0x3BFF // Internal/External Switchover mode is disabled.
3390 #define _IESO_ON 0x3FFF // Internal/External Switchover mode is enabled.
3391 #define _FCMEN_OFF 0x37FF // Fail-Safe Clock Monitor is disabled.
3392 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
3393 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger.
3394 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, RB6/ISCPCLK and RB7/ICSPDAT are general purpose I/O pins.
3396 //==============================================================================
3398 #define _DEVID1 0x2006
3400 #define _IDLOC0 0x2000
3401 #define _IDLOC1 0x2001
3402 #define _IDLOC2 0x2002
3403 #define _IDLOC3 0x2003
3405 //==============================================================================
3407 #ifndef NO_BIT_DEFINES
3409 #define ADON ADCON0bits.ADON // bit 0
3410 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
3411 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
3412 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
3413 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
3414 #define CHS0 ADCON0bits.CHS0 // bit 2
3415 #define CHS1 ADCON0bits.CHS1 // bit 3
3416 #define CHS2 ADCON0bits.CHS2 // bit 4
3417 #define VCFG0 ADCON0bits.VCFG0 // bit 5
3418 #define VCFG1 ADCON0bits.VCFG1 // bit 6
3419 #define ADFM ADCON0bits.ADFM // bit 7
3421 #define ADCS0 ADCON1bits.ADCS0 // bit 4
3422 #define ADCS1 ADCON1bits.ADCS1 // bit 5
3423 #define ADCS2 ADCON1bits.ADCS2 // bit 6
3425 #define ANS0 ANSELbits.ANS0 // bit 0, shadows bit in ANSELbits
3426 #define AN0 ANSELbits.AN0 // bit 0, shadows bit in ANSELbits
3427 #define ANS1 ANSELbits.ANS1 // bit 1, shadows bit in ANSELbits
3428 #define AN1 ANSELbits.AN1 // bit 1, shadows bit in ANSELbits
3429 #define ANS2 ANSELbits.ANS2 // bit 2, shadows bit in ANSELbits
3430 #define AN2 ANSELbits.AN2 // bit 2, shadows bit in ANSELbits
3431 #define ANS3 ANSELbits.ANS3 // bit 3, shadows bit in ANSELbits
3432 #define AN3 ANSELbits.AN3 // bit 3, shadows bit in ANSELbits
3433 #define ANS4 ANSELbits.ANS4 // bit 4, shadows bit in ANSELbits
3434 #define AN4 ANSELbits.AN4 // bit 4, shadows bit in ANSELbits
3435 #define ANS5 ANSELbits.ANS5 // bit 5, shadows bit in ANSELbits
3436 #define AN5 ANSELbits.AN5 // bit 5, shadows bit in ANSELbits
3437 #define ANS6 ANSELbits.ANS6 // bit 6, shadows bit in ANSELbits
3438 #define AN6 ANSELbits.AN6 // bit 6, shadows bit in ANSELbits
3439 #define ANS7 ANSELbits.ANS7 // bit 7, shadows bit in ANSELbits
3440 #define AN7 ANSELbits.AN7 // bit 7, shadows bit in ANSELbits
3442 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
3443 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
3444 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
3445 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
3446 #define CCP1Y CCP1CONbits.CCP1Y // bit 4
3447 #define CCP1X CCP1CONbits.CCP1X // bit 5
3449 #define CCP2M0 CCP2CONbits.CCP2M0 // bit 0
3450 #define CCP2M1 CCP2CONbits.CCP2M1 // bit 1
3451 #define CCP2M2 CCP2CONbits.CCP2M2 // bit 2
3452 #define CCP2M3 CCP2CONbits.CCP2M3 // bit 3
3453 #define CCP2Y CCP2CONbits.CCP2Y // bit 4
3454 #define CCP2X CCP2CONbits.CCP2X // bit 5
3456 #define CM0 CMCON0bits.CM0 // bit 0
3457 #define CM1 CMCON0bits.CM1 // bit 1
3458 #define CM2 CMCON0bits.CM2 // bit 2
3459 #define CIS CMCON0bits.CIS // bit 3
3460 #define C1INV CMCON0bits.C1INV // bit 4
3461 #define C2INV CMCON0bits.C2INV // bit 5
3462 #define C1OUT CMCON0bits.C1OUT // bit 6
3463 #define C2OUT CMCON0bits.C2OUT // bit 7
3465 #define C2SYNC CMCON1bits.C2SYNC // bit 0
3466 #define T1GSS CMCON1bits.T1GSS // bit 1
3468 #define EEADRL0 EEADRbits.EEADRL0 // bit 0
3469 #define EEADRL1 EEADRbits.EEADRL1 // bit 1
3470 #define EEADRL2 EEADRbits.EEADRL2 // bit 2
3471 #define EEADRL3 EEADRbits.EEADRL3 // bit 3
3472 #define EEADRL4 EEADRbits.EEADRL4 // bit 4
3473 #define EEADRL5 EEADRbits.EEADRL5 // bit 5
3474 #define EEADRL6 EEADRbits.EEADRL6 // bit 6
3475 #define EEADRL7 EEADRbits.EEADRL7 // bit 7
3477 #define EEADRH0 EEADRHbits.EEADRH0 // bit 0
3478 #define EEADRH1 EEADRHbits.EEADRH1 // bit 1
3479 #define EEADRH2 EEADRHbits.EEADRH2 // bit 2
3480 #define EEADRH3 EEADRHbits.EEADRH3 // bit 3
3481 #define EEADRH4 EEADRHbits.EEADRH4 // bit 4
3483 #define RD EECON1bits.RD // bit 0, shadows bit in EECON1bits
3484 #define EERD EECON1bits.EERD // bit 0, shadows bit in EECON1bits
3485 #define WR EECON1bits.WR // bit 1, shadows bit in EECON1bits
3486 #define EEWR EECON1bits.EEWR // bit 1, shadows bit in EECON1bits
3487 #define WREN EECON1bits.WREN // bit 2
3488 #define WRERR EECON1bits.WRERR // bit 3
3489 #define EEPGD EECON1bits.EEPGD // bit 7
3491 #define EEDATL0 EEDATAbits.EEDATL0 // bit 0
3492 #define EEDATL1 EEDATAbits.EEDATL1 // bit 1
3493 #define EEDATL2 EEDATAbits.EEDATL2 // bit 2
3494 #define EEDATL3 EEDATAbits.EEDATL3 // bit 3
3495 #define EEDATL4 EEDATAbits.EEDATL4 // bit 4
3496 #define EEDATL5 EEDATAbits.EEDATL5 // bit 5
3497 #define EEDATL6 EEDATAbits.EEDATL6 // bit 6
3498 #define EEDATL7 EEDATAbits.EEDATL7 // bit 7
3500 #define EEDATH0 EEDATHbits.EEDATH0 // bit 0
3501 #define EEDATH1 EEDATHbits.EEDATH1 // bit 1
3502 #define EEDATH2 EEDATHbits.EEDATH2 // bit 2
3503 #define EEDATH3 EEDATHbits.EEDATH3 // bit 3
3504 #define EEDATH4 EEDATHbits.EEDATH4 // bit 4
3505 #define EEDATH5 EEDATHbits.EEDATH5 // bit 5
3507 #define RBIF INTCONbits.RBIF // bit 0
3508 #define INTF INTCONbits.INTF // bit 1
3509 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
3510 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
3511 #define RBIE INTCONbits.RBIE // bit 3
3512 #define INTE INTCONbits.INTE // bit 4
3513 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
3514 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
3515 #define PEIE INTCONbits.PEIE // bit 6
3516 #define GIE INTCONbits.GIE // bit 7
3518 #define IOCB4 IOCbits.IOCB4 // bit 4, shadows bit in IOCbits
3519 #define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits
3520 #define IOCB5 IOCbits.IOCB5 // bit 5, shadows bit in IOCbits
3521 #define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits
3522 #define IOCB6 IOCbits.IOCB6 // bit 6, shadows bit in IOCbits
3523 #define IOC6 IOCbits.IOC6 // bit 6, shadows bit in IOCbits
3524 #define IOCB7 IOCbits.IOCB7 // bit 7, shadows bit in IOCbits
3525 #define IOC7 IOCbits.IOC7 // bit 7, shadows bit in IOCbits
3527 #define LMUX0 LCDCONbits.LMUX0 // bit 0
3528 #define LMUX1 LCDCONbits.LMUX1 // bit 1
3529 #define CS0 LCDCONbits.CS0 // bit 2
3530 #define CS1 LCDCONbits.CS1 // bit 3
3531 #define VLCDEN LCDCONbits.VLCDEN // bit 4
3532 #define WERR LCDCONbits.WERR // bit 5
3533 #define SLPEN LCDCONbits.SLPEN // bit 6
3534 #define LCDEN LCDCONbits.LCDEN // bit 7
3536 #define SEG0 LCDDATA0bits.SEG0 // bit 0, shadows bit in LCDDATA0bits
3537 #define SEG0COM0 LCDDATA0bits.SEG0COM0 // bit 0, shadows bit in LCDDATA0bits
3538 #define S0C0 LCDDATA0bits.S0C0 // bit 0, shadows bit in LCDDATA0bits
3539 #define SEG1 LCDDATA0bits.SEG1 // bit 1, shadows bit in LCDDATA0bits
3540 #define SEG1COM0 LCDDATA0bits.SEG1COM0 // bit 1, shadows bit in LCDDATA0bits
3541 #define S1C0 LCDDATA0bits.S1C0 // bit 1, shadows bit in LCDDATA0bits
3542 #define SEG2 LCDDATA0bits.SEG2 // bit 2, shadows bit in LCDDATA0bits
3543 #define SEG2COM0 LCDDATA0bits.SEG2COM0 // bit 2, shadows bit in LCDDATA0bits
3544 #define S2C0 LCDDATA0bits.S2C0 // bit 2, shadows bit in LCDDATA0bits
3545 #define SEG3 LCDDATA0bits.SEG3 // bit 3, shadows bit in LCDDATA0bits
3546 #define SEG3COM0 LCDDATA0bits.SEG3COM0 // bit 3, shadows bit in LCDDATA0bits
3547 #define S3C0 LCDDATA0bits.S3C0 // bit 3, shadows bit in LCDDATA0bits
3548 #define SEG4 LCDDATA0bits.SEG4 // bit 4, shadows bit in LCDDATA0bits
3549 #define SEG4COM0 LCDDATA0bits.SEG4COM0 // bit 4, shadows bit in LCDDATA0bits
3550 #define S4C0 LCDDATA0bits.S4C0 // bit 4, shadows bit in LCDDATA0bits
3551 #define SEG5 LCDDATA0bits.SEG5 // bit 5, shadows bit in LCDDATA0bits
3552 #define SEG5COM0 LCDDATA0bits.SEG5COM0 // bit 5, shadows bit in LCDDATA0bits
3553 #define S5C0 LCDDATA0bits.S5C0 // bit 5, shadows bit in LCDDATA0bits
3554 #define SEG6 LCDDATA0bits.SEG6 // bit 6, shadows bit in LCDDATA0bits
3555 #define SEG6COM0 LCDDATA0bits.SEG6COM0 // bit 6, shadows bit in LCDDATA0bits
3556 #define S6C0 LCDDATA0bits.S6C0 // bit 6, shadows bit in LCDDATA0bits
3557 #define SEG7 LCDDATA0bits.SEG7 // bit 7, shadows bit in LCDDATA0bits
3558 #define SEG7COM0 LCDDATA0bits.SEG7COM0 // bit 7, shadows bit in LCDDATA0bits
3559 #define S7C0 LCDDATA0bits.S7C0 // bit 7, shadows bit in LCDDATA0bits
3561 #define SEG8 LCDDATA1bits.SEG8 // bit 0, shadows bit in LCDDATA1bits
3562 #define SEG8COM0 LCDDATA1bits.SEG8COM0 // bit 0, shadows bit in LCDDATA1bits
3563 #define S8C0 LCDDATA1bits.S8C0 // bit 0, shadows bit in LCDDATA1bits
3564 #define SEG9 LCDDATA1bits.SEG9 // bit 1, shadows bit in LCDDATA1bits
3565 #define SEG9COM0 LCDDATA1bits.SEG9COM0 // bit 1, shadows bit in LCDDATA1bits
3566 #define S9C0 LCDDATA1bits.S9C0 // bit 1, shadows bit in LCDDATA1bits
3567 #define SEG10 LCDDATA1bits.SEG10 // bit 2, shadows bit in LCDDATA1bits
3568 #define SEG10COM0 LCDDATA1bits.SEG10COM0 // bit 2, shadows bit in LCDDATA1bits
3569 #define S10C0 LCDDATA1bits.S10C0 // bit 2, shadows bit in LCDDATA1bits
3570 #define SEG11 LCDDATA1bits.SEG11 // bit 3, shadows bit in LCDDATA1bits
3571 #define SEG11COM0 LCDDATA1bits.SEG11COM0 // bit 3, shadows bit in LCDDATA1bits
3572 #define S11C0 LCDDATA1bits.S11C0 // bit 3, shadows bit in LCDDATA1bits
3573 #define SEG12 LCDDATA1bits.SEG12 // bit 4, shadows bit in LCDDATA1bits
3574 #define SEG12COM0 LCDDATA1bits.SEG12COM0 // bit 4, shadows bit in LCDDATA1bits
3575 #define S12C0 LCDDATA1bits.S12C0 // bit 4, shadows bit in LCDDATA1bits
3576 #define SEG13 LCDDATA1bits.SEG13 // bit 5, shadows bit in LCDDATA1bits
3577 #define SEG13COM0 LCDDATA1bits.SEG13COM0 // bit 5, shadows bit in LCDDATA1bits
3578 #define S13C0 LCDDATA1bits.S13C0 // bit 5, shadows bit in LCDDATA1bits
3579 #define SEG14 LCDDATA1bits.SEG14 // bit 6, shadows bit in LCDDATA1bits
3580 #define SEG14COM0 LCDDATA1bits.SEG14COM0 // bit 6, shadows bit in LCDDATA1bits
3581 #define S14C0 LCDDATA1bits.S14C0 // bit 6, shadows bit in LCDDATA1bits
3582 #define SEG15 LCDDATA1bits.SEG15 // bit 7, shadows bit in LCDDATA1bits
3583 #define SEG15COM0 LCDDATA1bits.SEG15COM0 // bit 7, shadows bit in LCDDATA1bits
3584 #define S15C0 LCDDATA1bits.S15C0 // bit 7, shadows bit in LCDDATA1bits
3586 #define SEG16 LCDDATA2bits.SEG16 // bit 0, shadows bit in LCDDATA2bits
3587 #define SEG16COM0 LCDDATA2bits.SEG16COM0 // bit 0, shadows bit in LCDDATA2bits
3588 #define S16C0 LCDDATA2bits.S16C0 // bit 0, shadows bit in LCDDATA2bits
3589 #define SEG17 LCDDATA2bits.SEG17 // bit 1, shadows bit in LCDDATA2bits
3590 #define SEG17COM0 LCDDATA2bits.SEG17COM0 // bit 1, shadows bit in LCDDATA2bits
3591 #define S17C0 LCDDATA2bits.S17C0 // bit 1, shadows bit in LCDDATA2bits
3592 #define SEG18 LCDDATA2bits.SEG18 // bit 2, shadows bit in LCDDATA2bits
3593 #define SEG18COM0 LCDDATA2bits.SEG18COM0 // bit 2, shadows bit in LCDDATA2bits
3594 #define S18C0 LCDDATA2bits.S18C0 // bit 2, shadows bit in LCDDATA2bits
3595 #define SEG19 LCDDATA2bits.SEG19 // bit 3, shadows bit in LCDDATA2bits
3596 #define SEG19COM0 LCDDATA2bits.SEG19COM0 // bit 3, shadows bit in LCDDATA2bits
3597 #define S19C0 LCDDATA2bits.S19C0 // bit 3, shadows bit in LCDDATA2bits
3598 #define SEG20 LCDDATA2bits.SEG20 // bit 4, shadows bit in LCDDATA2bits
3599 #define SEG20COM0 LCDDATA2bits.SEG20COM0 // bit 4, shadows bit in LCDDATA2bits
3600 #define S20C0 LCDDATA2bits.S20C0 // bit 4, shadows bit in LCDDATA2bits
3601 #define SEG21 LCDDATA2bits.SEG21 // bit 5, shadows bit in LCDDATA2bits
3602 #define SEG21COM0 LCDDATA2bits.SEG21COM0 // bit 5, shadows bit in LCDDATA2bits
3603 #define S21C0 LCDDATA2bits.S21C0 // bit 5, shadows bit in LCDDATA2bits
3604 #define SEG22 LCDDATA2bits.SEG22 // bit 6, shadows bit in LCDDATA2bits
3605 #define SEG22COM0 LCDDATA2bits.SEG22COM0 // bit 6, shadows bit in LCDDATA2bits
3606 #define S22C0 LCDDATA2bits.S22C0 // bit 6, shadows bit in LCDDATA2bits
3607 #define SEG23 LCDDATA2bits.SEG23 // bit 7, shadows bit in LCDDATA2bits
3608 #define SEG23COM0 LCDDATA2bits.SEG23COM0 // bit 7, shadows bit in LCDDATA2bits
3609 #define S23C0 LCDDATA2bits.S23C0 // bit 7, shadows bit in LCDDATA2bits
3611 #define LP0 LCDPSbits.LP0 // bit 0
3612 #define LP1 LCDPSbits.LP1 // bit 1
3613 #define LP2 LCDPSbits.LP2 // bit 2
3614 #define LP3 LCDPSbits.LP3 // bit 3
3615 #define WA LCDPSbits.WA // bit 4
3616 #define LCDA LCDPSbits.LCDA // bit 5
3617 #define BIASMD LCDPSbits.BIASMD // bit 6
3618 #define WFT LCDPSbits.WFT // bit 7
3620 #define LVDL0 LVDCONbits.LVDL0 // bit 0
3621 #define LVDL1 LVDCONbits.LVDL1 // bit 1
3622 #define LVDL2 LVDCONbits.LVDL2 // bit 2
3623 #define LVDEN LVDCONbits.LVDEN // bit 4
3624 #define IRVST LVDCONbits.IRVST // bit 5
3626 #define PS0 OPTION_REGbits.PS0 // bit 0
3627 #define PS1 OPTION_REGbits.PS1 // bit 1
3628 #define PS2 OPTION_REGbits.PS2 // bit 2
3629 #define PSA OPTION_REGbits.PSA // bit 3
3630 #define T0SE OPTION_REGbits.T0SE // bit 4
3631 #define T0CS OPTION_REGbits.T0CS // bit 5
3632 #define INTEDG OPTION_REGbits.INTEDG // bit 6
3633 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
3635 #define SCS OSCCONbits.SCS // bit 0
3636 #define LTS OSCCONbits.LTS // bit 1
3637 #define HTS OSCCONbits.HTS // bit 2
3638 #define OSTS OSCCONbits.OSTS // bit 3
3639 #define IRCF0 OSCCONbits.IRCF0 // bit 4
3640 #define IRCF1 OSCCONbits.IRCF1 // bit 5
3641 #define IRCF2 OSCCONbits.IRCF2 // bit 6
3643 #define TUN0 OSCTUNEbits.TUN0 // bit 0
3644 #define TUN1 OSCTUNEbits.TUN1 // bit 1
3645 #define TUN2 OSCTUNEbits.TUN2 // bit 2
3646 #define TUN3 OSCTUNEbits.TUN3 // bit 3
3647 #define TUN4 OSCTUNEbits.TUN4 // bit 4
3649 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
3650 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
3651 #define NOT_POR PCONbits.NOT_POR // bit 1
3652 #define SBOREN PCONbits.SBOREN // bit 4
3654 #define TMR1IE PIE1bits.TMR1IE // bit 0
3655 #define TMR2IE PIE1bits.TMR2IE // bit 1
3656 #define CCP1IE PIE1bits.CCP1IE // bit 2
3657 #define SSPIE PIE1bits.SSPIE // bit 3
3658 #define TXIE PIE1bits.TXIE // bit 4
3659 #define RCIE PIE1bits.RCIE // bit 5
3660 #define ADIE PIE1bits.ADIE // bit 6
3661 #define EEIE PIE1bits.EEIE // bit 7
3663 #define CCP2IE PIE2bits.CCP2IE // bit 0
3664 #define LVDIE PIE2bits.LVDIE // bit 2
3665 #define LCDIE PIE2bits.LCDIE // bit 4
3666 #define C1IE PIE2bits.C1IE // bit 5
3667 #define C2IE PIE2bits.C2IE // bit 6
3668 #define OSFIE PIE2bits.OSFIE // bit 7
3670 #define TMR1IF PIR1bits.TMR1IF // bit 0
3671 #define TMR2IF PIR1bits.TMR2IF // bit 1
3672 #define CCP1IF PIR1bits.CCP1IF // bit 2
3673 #define SSPIF PIR1bits.SSPIF // bit 3
3674 #define TXIF PIR1bits.TXIF // bit 4
3675 #define RCIF PIR1bits.RCIF // bit 5
3676 #define ADIF PIR1bits.ADIF // bit 6
3677 #define EEIF PIR1bits.EEIF // bit 7
3679 #define CCP2IF PIR2bits.CCP2IF // bit 0
3680 #define LVDIF PIR2bits.LVDIF // bit 2
3681 #define LCDIF PIR2bits.LCDIF // bit 4
3682 #define C1IF PIR2bits.C1IF // bit 5
3683 #define C2IF PIR2bits.C2IF // bit 6
3684 #define OSFIF PIR2bits.OSFIF // bit 7
3686 #define RA0 PORTAbits.RA0 // bit 0
3687 #define RA1 PORTAbits.RA1 // bit 1
3688 #define RA2 PORTAbits.RA2 // bit 2
3689 #define RA3 PORTAbits.RA3 // bit 3
3690 #define RA4 PORTAbits.RA4 // bit 4
3691 #define RA5 PORTAbits.RA5 // bit 5
3692 #define RA6 PORTAbits.RA6 // bit 6
3693 #define RA7 PORTAbits.RA7 // bit 7
3695 #define RB0 PORTBbits.RB0 // bit 0
3696 #define RB1 PORTBbits.RB1 // bit 1
3697 #define RB2 PORTBbits.RB2 // bit 2
3698 #define RB3 PORTBbits.RB3 // bit 3
3699 #define RB4 PORTBbits.RB4 // bit 4
3700 #define RB5 PORTBbits.RB5 // bit 5
3701 #define RB6 PORTBbits.RB6 // bit 6
3702 #define RB7 PORTBbits.RB7 // bit 7
3704 #define RC0 PORTCbits.RC0 // bit 0
3705 #define RC1 PORTCbits.RC1 // bit 1
3706 #define RC2 PORTCbits.RC2 // bit 2
3707 #define RC3 PORTCbits.RC3 // bit 3
3708 #define RC4 PORTCbits.RC4 // bit 4
3709 #define RC5 PORTCbits.RC5 // bit 5
3710 #define RC6 PORTCbits.RC6 // bit 6
3711 #define RC7 PORTCbits.RC7 // bit 7
3713 #define RD0 PORTDbits.RD0 // bit 0
3714 #define RD1 PORTDbits.RD1 // bit 1
3715 #define RD2 PORTDbits.RD2 // bit 2
3716 #define RD3 PORTDbits.RD3 // bit 3
3717 #define RD4 PORTDbits.RD4 // bit 4
3718 #define RD5 PORTDbits.RD5 // bit 5
3719 #define RD6 PORTDbits.RD6 // bit 6
3720 #define RD7 PORTDbits.RD7 // bit 7
3722 #define RE0 PORTEbits.RE0 // bit 0
3723 #define RE1 PORTEbits.RE1 // bit 1
3724 #define RE2 PORTEbits.RE2 // bit 2
3725 #define RE3 PORTEbits.RE3 // bit 3
3727 #define RX9D RCSTAbits.RX9D // bit 0, shadows bit in RCSTAbits
3728 #define RCD8 RCSTAbits.RCD8 // bit 0, shadows bit in RCSTAbits
3729 #define OERR RCSTAbits.OERR // bit 1
3730 #define FERR RCSTAbits.FERR // bit 2
3731 #define ADDEN RCSTAbits.ADDEN // bit 3
3732 #define CREN RCSTAbits.CREN // bit 4
3733 #define SREN RCSTAbits.SREN // bit 5
3734 #define RX9 RCSTAbits.RX9 // bit 6, shadows bit in RCSTAbits
3735 #define RC9 RCSTAbits.RC9 // bit 6, shadows bit in RCSTAbits
3736 #define NOT_RC8 RCSTAbits.NOT_RC8 // bit 6, shadows bit in RCSTAbits
3737 #define RC8_9 RCSTAbits.RC8_9 // bit 6, shadows bit in RCSTAbits
3738 #define SPEN RCSTAbits.SPEN // bit 7
3740 #define SSPM0 SSPCONbits.SSPM0 // bit 0
3741 #define SSPM1 SSPCONbits.SSPM1 // bit 1
3742 #define SSPM2 SSPCONbits.SSPM2 // bit 2
3743 #define SSPM3 SSPCONbits.SSPM3 // bit 3
3744 #define CKP SSPCONbits.CKP // bit 4
3745 #define SSPEN SSPCONbits.SSPEN // bit 5
3746 #define SSPOV SSPCONbits.SSPOV // bit 6
3747 #define WCOL SSPCONbits.WCOL // bit 7
3749 #define BF SSPSTATbits.BF // bit 0
3750 #define UA SSPSTATbits.UA // bit 1
3751 #define R_NOT_W SSPSTATbits.R_NOT_W // bit 2, shadows bit in SSPSTATbits
3752 #define R SSPSTATbits.R // bit 2, shadows bit in SSPSTATbits
3753 #define I2C_READ SSPSTATbits.I2C_READ // bit 2, shadows bit in SSPSTATbits
3754 #define NOT_W SSPSTATbits.NOT_W // bit 2, shadows bit in SSPSTATbits
3755 #define NOT_WRITE SSPSTATbits.NOT_WRITE // bit 2, shadows bit in SSPSTATbits
3756 #define R_W SSPSTATbits.R_W // bit 2, shadows bit in SSPSTATbits
3757 #define READ_WRITE SSPSTATbits.READ_WRITE // bit 2, shadows bit in SSPSTATbits
3758 #define S SSPSTATbits.S // bit 3, shadows bit in SSPSTATbits
3759 #define I2C_START SSPSTATbits.I2C_START // bit 3, shadows bit in SSPSTATbits
3760 #define P SSPSTATbits.P // bit 4, shadows bit in SSPSTATbits
3761 #define I2C_STOP SSPSTATbits.I2C_STOP // bit 4, shadows bit in SSPSTATbits
3762 #define D_NOT_A SSPSTATbits.D_NOT_A // bit 5, shadows bit in SSPSTATbits
3763 #define D SSPSTATbits.D // bit 5, shadows bit in SSPSTATbits
3764 #define I2C_DATA SSPSTATbits.I2C_DATA // bit 5, shadows bit in SSPSTATbits
3765 #define NOT_A SSPSTATbits.NOT_A // bit 5, shadows bit in SSPSTATbits
3766 #define NOT_ADDRESS SSPSTATbits.NOT_ADDRESS // bit 5, shadows bit in SSPSTATbits
3767 #define D_A SSPSTATbits.D_A // bit 5, shadows bit in SSPSTATbits
3768 #define DATA_ADDRESS SSPSTATbits.DATA_ADDRESS // bit 5, shadows bit in SSPSTATbits
3769 #define CKE SSPSTATbits.CKE // bit 6
3770 #define SMP SSPSTATbits.SMP // bit 7
3772 #define C STATUSbits.C // bit 0
3773 #define DC STATUSbits.DC // bit 1
3774 #define Z STATUSbits.Z // bit 2
3775 #define NOT_PD STATUSbits.NOT_PD // bit 3
3776 #define NOT_TO STATUSbits.NOT_TO // bit 4
3777 #define RP0 STATUSbits.RP0 // bit 5
3778 #define RP1 STATUSbits.RP1 // bit 6
3779 #define IRP STATUSbits.IRP // bit 7
3781 #define TMR1ON T1CONbits.TMR1ON // bit 0
3782 #define TMR1CS T1CONbits.TMR1CS // bit 1
3783 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits
3784 #define T1SYNC T1CONbits.T1SYNC // bit 2, shadows bit in T1CONbits
3785 #define T1INSYNC T1CONbits.T1INSYNC // bit 2, shadows bit in T1CONbits
3786 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
3787 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
3788 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
3789 #define TMR1GE T1CONbits.TMR1GE // bit 6, shadows bit in T1CONbits
3790 #define T1GE T1CONbits.T1GE // bit 6, shadows bit in T1CONbits
3791 #define T1GINV T1CONbits.T1GINV // bit 7
3793 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
3794 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
3795 #define TMR2ON T2CONbits.TMR2ON // bit 2
3796 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
3797 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
3798 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
3799 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
3801 #define TRISA0 TRISAbits.TRISA0 // bit 0
3802 #define TRISA1 TRISAbits.TRISA1 // bit 1
3803 #define TRISA2 TRISAbits.TRISA2 // bit 2
3804 #define TRISA3 TRISAbits.TRISA3 // bit 3
3805 #define TRISA4 TRISAbits.TRISA4 // bit 4
3806 #define TRISA5 TRISAbits.TRISA5 // bit 5
3807 #define TRISA6 TRISAbits.TRISA6 // bit 6
3808 #define TRISA7 TRISAbits.TRISA7 // bit 7
3810 #define TRISB0 TRISBbits.TRISB0 // bit 0
3811 #define TRISB1 TRISBbits.TRISB1 // bit 1
3812 #define TRISB2 TRISBbits.TRISB2 // bit 2
3813 #define TRISB3 TRISBbits.TRISB3 // bit 3
3814 #define TRISB4 TRISBbits.TRISB4 // bit 4
3815 #define TRISB5 TRISBbits.TRISB5 // bit 5
3816 #define TRISB6 TRISBbits.TRISB6 // bit 6
3817 #define TRISB7 TRISBbits.TRISB7 // bit 7
3819 #define TRISC0 TRISCbits.TRISC0 // bit 0
3820 #define TRISC1 TRISCbits.TRISC1 // bit 1
3821 #define TRISC2 TRISCbits.TRISC2 // bit 2
3822 #define TRISC3 TRISCbits.TRISC3 // bit 3
3823 #define TRISC4 TRISCbits.TRISC4 // bit 4
3824 #define TRISC5 TRISCbits.TRISC5 // bit 5
3825 #define TRISC6 TRISCbits.TRISC6 // bit 6
3826 #define TRISC7 TRISCbits.TRISC7 // bit 7
3828 #define TRISD0 TRISDbits.TRISD0 // bit 0
3829 #define TRISD1 TRISDbits.TRISD1 // bit 1
3830 #define TRISD2 TRISDbits.TRISD2 // bit 2
3831 #define TRISD3 TRISDbits.TRISD3 // bit 3
3832 #define TRISD4 TRISDbits.TRISD4 // bit 4
3833 #define TRISD5 TRISDbits.TRISD5 // bit 5
3834 #define TRISD6 TRISDbits.TRISD6 // bit 6
3835 #define TRISD7 TRISDbits.TRISD7 // bit 7
3837 #define TRISE0 TRISEbits.TRISE0 // bit 0
3838 #define TRISE1 TRISEbits.TRISE1 // bit 1
3839 #define TRISE2 TRISEbits.TRISE2 // bit 2
3840 #define TRISE3 TRISEbits.TRISE3 // bit 3
3842 #define TX9D TXSTAbits.TX9D // bit 0, shadows bit in TXSTAbits
3843 #define TXD8 TXSTAbits.TXD8 // bit 0, shadows bit in TXSTAbits
3844 #define TRMT TXSTAbits.TRMT // bit 1
3845 #define BRGH TXSTAbits.BRGH // bit 2
3846 #define SYNC TXSTAbits.SYNC // bit 4
3847 #define TXEN TXSTAbits.TXEN // bit 5
3848 #define TX9 TXSTAbits.TX9 // bit 6, shadows bit in TXSTAbits
3849 #define NOT_TX8 TXSTAbits.NOT_TX8 // bit 6, shadows bit in TXSTAbits
3850 #define TX8_9 TXSTAbits.TX8_9 // bit 6, shadows bit in TXSTAbits
3851 #define CSRC TXSTAbits.CSRC // bit 7
3853 #define VR0 VRCONbits.VR0 // bit 0
3854 #define VR1 VRCONbits.VR1 // bit 1
3855 #define VR2 VRCONbits.VR2 // bit 2
3856 #define VR3 VRCONbits.VR3 // bit 3
3857 #define VRR VRCONbits.VRR // bit 5
3858 #define VREN VRCONbits.VREN // bit 7
3860 #define SWDTEN WDTCONbits.SWDTEN // bit 0, shadows bit in WDTCONbits
3861 #define SWDTE WDTCONbits.SWDTE // bit 0, shadows bit in WDTCONbits
3862 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
3863 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
3864 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
3865 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
3867 #define WPUB0 WPUbits.WPUB0 // bit 0, shadows bit in WPUbits
3868 #define WPU0 WPUbits.WPU0 // bit 0, shadows bit in WPUbits
3869 #define WPUB1 WPUbits.WPUB1 // bit 1, shadows bit in WPUbits
3870 #define WPU1 WPUbits.WPU1 // bit 1, shadows bit in WPUbits
3871 #define WPUB2 WPUbits.WPUB2 // bit 2, shadows bit in WPUbits
3872 #define WPU2 WPUbits.WPU2 // bit 2, shadows bit in WPUbits
3873 #define WPUB3 WPUbits.WPUB3 // bit 3, shadows bit in WPUbits
3874 #define WPU3 WPUbits.WPU3 // bit 3, shadows bit in WPUbits
3875 #define WPUB4 WPUbits.WPUB4 // bit 4, shadows bit in WPUbits
3876 #define WPU4 WPUbits.WPU4 // bit 4, shadows bit in WPUbits
3877 #define WPUB5 WPUbits.WPUB5 // bit 5, shadows bit in WPUbits
3878 #define WPU5 WPUbits.WPU5 // bit 5, shadows bit in WPUbits
3879 #define WPUB6 WPUbits.WPUB6 // bit 6, shadows bit in WPUbits
3880 #define WPU6 WPUbits.WPU6 // bit 6, shadows bit in WPUbits
3881 #define WPUB7 WPUbits.WPUB7 // bit 7, shadows bit in WPUbits
3882 #define WPU7 WPUbits.WPU7 // bit 7, shadows bit in WPUbits
3884 #endif // #ifndef NO_BIT_DEFINES
3886 #endif // #ifndef __PIC16F917_H__