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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16hv616.h
blobeb66e1c070fd1d2ee633855264eaf9e3d9396f7c
1 /*
2 * This declarations of the PIC16HV616 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:56 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16HV616_H__
26 #define __PIC16HV616_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTC_ADDR 0x0007
43 #define PCLATH_ADDR 0x000A
44 #define INTCON_ADDR 0x000B
45 #define PIR1_ADDR 0x000C
46 #define TMR1_ADDR 0x000E
47 #define TMR1L_ADDR 0x000E
48 #define TMR1H_ADDR 0x000F
49 #define T1CON_ADDR 0x0010
50 #define TMR2_ADDR 0x0011
51 #define T2CON_ADDR 0x0012
52 #define CCPR1_ADDR 0x0013
53 #define CCPR1L_ADDR 0x0013
54 #define CCPR1H_ADDR 0x0014
55 #define CCP1CON_ADDR 0x0015
56 #define PWM1CON_ADDR 0x0016
57 #define ECCPAS_ADDR 0x0017
58 #define VRCON_ADDR 0x0019
59 #define CM1CON0_ADDR 0x001A
60 #define CM2CON0_ADDR 0x001B
61 #define CM2CON1_ADDR 0x001C
62 #define ADRESH_ADDR 0x001E
63 #define ADCON0_ADDR 0x001F
64 #define OPTION_REG_ADDR 0x0081
65 #define TRISA_ADDR 0x0085
66 #define TRISC_ADDR 0x0087
67 #define PIE1_ADDR 0x008C
68 #define PCON_ADDR 0x008E
69 #define OSCTUNE_ADDR 0x0090
70 #define ANSEL_ADDR 0x0091
71 #define PR2_ADDR 0x0092
72 #define WPU_ADDR 0x0095
73 #define WPUA_ADDR 0x0095
74 #define IOC_ADDR 0x0096
75 #define IOCA_ADDR 0x0096
76 #define SRCON_ADDR 0x0099
77 #define SRCON0_ADDR 0x0099
78 #define SRCON1_ADDR 0x009A
79 #define ADRESL_ADDR 0x009E
80 #define ADCON1_ADDR 0x009F
81
82 #endif // #ifndef NO_ADDR_DEFINES
83
84 //==============================================================================
85 //
86 // Register Definitions
87 //
88 //==============================================================================
89
90 extern __at(0x0000) __sfr INDF;
91 extern __at(0x0001) __sfr TMR0;
92 extern __at(0x0002) __sfr PCL;
93
94 //==============================================================================
95 // STATUS Bits
96
97 extern __at(0x0003) __sfr STATUS;
98
99 typedef union
100 {
101 struct
102 {
103 unsigned C : 1;
104 unsigned DC : 1;
105 unsigned Z : 1;
106 unsigned NOT_PD : 1;
107 unsigned NOT_TO : 1;
108 unsigned RP0 : 1;
109 unsigned RP1 : 1;
110 unsigned IRP : 1;
111 };
112
113 struct
114 {
115 unsigned : 5;
116 unsigned RP : 2;
117 unsigned : 1;
118 };
119 } __STATUSbits_t;
120
121 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
122
123 #define _C 0x01
124 #define _DC 0x02
125 #define _Z 0x04
126 #define _NOT_PD 0x08
127 #define _NOT_TO 0x10
128 #define _RP0 0x20
129 #define _RP1 0x40
130 #define _IRP 0x80
131
132 //==============================================================================
133
134 extern __at(0x0004) __sfr FSR;
135
136 //==============================================================================
137 // PORTA Bits
138
139 extern __at(0x0005) __sfr PORTA;
140
141 typedef union
142 {
143 struct
144 {
145 unsigned RA0 : 1;
146 unsigned RA1 : 1;
147 unsigned RA2 : 1;
148 unsigned RA3 : 1;
149 unsigned RA4 : 1;
150 unsigned RA5 : 1;
151 unsigned : 1;
152 unsigned : 1;
153 };
154
155 struct
156 {
157 unsigned RA : 6;
158 unsigned : 2;
159 };
160 } __PORTAbits_t;
161
162 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
163
164 #define _RA0 0x01
165 #define _RA1 0x02
166 #define _RA2 0x04
167 #define _RA3 0x08
168 #define _RA4 0x10
169 #define _RA5 0x20
170
171 //==============================================================================
172
173
174 //==============================================================================
175 // PORTC Bits
176
177 extern __at(0x0007) __sfr PORTC;
178
179 typedef union
180 {
181 struct
182 {
183 unsigned RC0 : 1;
184 unsigned RC1 : 1;
185 unsigned RC2 : 1;
186 unsigned RC3 : 1;
187 unsigned RC4 : 1;
188 unsigned RC5 : 1;
189 unsigned : 1;
190 unsigned : 1;
191 };
192
193 struct
194 {
195 unsigned RC : 6;
196 unsigned : 2;
197 };
198 } __PORTCbits_t;
199
200 extern __at(0x0007) volatile __PORTCbits_t PORTCbits;
201
202 #define _RC0 0x01
203 #define _RC1 0x02
204 #define _RC2 0x04
205 #define _RC3 0x08
206 #define _RC4 0x10
207 #define _RC5 0x20
208
209 //==============================================================================
210
211 extern __at(0x000A) __sfr PCLATH;
212
213 //==============================================================================
214 // INTCON Bits
215
216 extern __at(0x000B) __sfr INTCON;
217
218 typedef union
219 {
220 struct
221 {
222 unsigned RAIF : 1;
223 unsigned INTF : 1;
224 unsigned TMR0IF : 1;
225 unsigned RAIE : 1;
226 unsigned INTE : 1;
227 unsigned TMR0IE : 1;
228 unsigned PEIE : 1;
229 unsigned GIE : 1;
230 };
231
232 struct
233 {
234 unsigned : 1;
235 unsigned : 1;
236 unsigned T0IF : 1;
237 unsigned : 1;
238 unsigned : 1;
239 unsigned T0IE : 1;
240 unsigned : 1;
241 unsigned : 1;
242 };
243 } __INTCONbits_t;
244
245 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
246
247 #define _RAIF 0x01
248 #define _INTF 0x02
249 #define _TMR0IF 0x04
250 #define _T0IF 0x04
251 #define _RAIE 0x08
252 #define _INTE 0x10
253 #define _TMR0IE 0x20
254 #define _T0IE 0x20
255 #define _PEIE 0x40
256 #define _GIE 0x80
257
258 //==============================================================================
259
260
261 //==============================================================================
262 // PIR1 Bits
263
264 extern __at(0x000C) __sfr PIR1;
265
266 typedef union
267 {
268 struct
269 {
270 unsigned TMR1IF : 1;
271 unsigned TMR2IF : 1;
272 unsigned : 1;
273 unsigned C1IF : 1;
274 unsigned C2IF : 1;
275 unsigned ECCPIF : 1;
276 unsigned ADIF : 1;
277 unsigned : 1;
278 };
279
280 struct
281 {
282 unsigned T1IF : 1;
283 unsigned T2IF : 1;
284 unsigned : 1;
285 unsigned : 1;
286 unsigned : 1;
287 unsigned CCP1IF : 1;
288 unsigned : 1;
289 unsigned : 1;
290 };
291 } __PIR1bits_t;
292
293 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
294
295 #define _TMR1IF 0x01
296 #define _T1IF 0x01
297 #define _TMR2IF 0x02
298 #define _T2IF 0x02
299 #define _C1IF 0x08
300 #define _C2IF 0x10
301 #define _ECCPIF 0x20
302 #define _CCP1IF 0x20
303 #define _ADIF 0x40
304
305 //==============================================================================
306
307 extern __at(0x000E) __sfr TMR1;
308 extern __at(0x000E) __sfr TMR1L;
309 extern __at(0x000F) __sfr TMR1H;
310
311 //==============================================================================
312 // T1CON Bits
313
314 extern __at(0x0010) __sfr T1CON;
315
316 typedef union
317 {
318 struct
319 {
320 unsigned TMR1ON : 1;
321 unsigned TMR1CS : 1;
322 unsigned NOT_T1SYNC : 1;
323 unsigned T1OSCEN : 1;
324 unsigned T1CKPS0 : 1;
325 unsigned T1CKPS1 : 1;
326 unsigned TMR1GE : 1;
327 unsigned T1GINV : 1;
328 };
329
330 struct
331 {
332 unsigned : 4;
333 unsigned T1CKPS : 2;
334 unsigned : 2;
335 };
336 } __T1CONbits_t;
337
338 extern __at(0x0010) volatile __T1CONbits_t T1CONbits;
339
340 #define _TMR1ON 0x01
341 #define _TMR1CS 0x02
342 #define _NOT_T1SYNC 0x04
343 #define _T1OSCEN 0x08
344 #define _T1CKPS0 0x10
345 #define _T1CKPS1 0x20
346 #define _TMR1GE 0x40
347 #define _T1GINV 0x80
348
349 //==============================================================================
350
351 extern __at(0x0011) __sfr TMR2;
352
353 //==============================================================================
354 // T2CON Bits
355
356 extern __at(0x0012) __sfr T2CON;
357
358 typedef union
359 {
360 struct
361 {
362 unsigned T2CKPS0 : 1;
363 unsigned T2CKPS1 : 1;
364 unsigned TMR2ON : 1;
365 unsigned TOUTPS0 : 1;
366 unsigned TOUTPS1 : 1;
367 unsigned TOUTPS2 : 1;
368 unsigned TOUTPS3 : 1;
369 unsigned : 1;
370 };
371
372 struct
373 {
374 unsigned T2CKPS : 2;
375 unsigned : 6;
376 };
377
378 struct
379 {
380 unsigned : 3;
381 unsigned TOUTPS : 4;
382 unsigned : 1;
383 };
384 } __T2CONbits_t;
385
386 extern __at(0x0012) volatile __T2CONbits_t T2CONbits;
387
388 #define _T2CKPS0 0x01
389 #define _T2CKPS1 0x02
390 #define _TMR2ON 0x04
391 #define _TOUTPS0 0x08
392 #define _TOUTPS1 0x10
393 #define _TOUTPS2 0x20
394 #define _TOUTPS3 0x40
395
396 //==============================================================================
397
398 extern __at(0x0013) __sfr CCPR1;
399 extern __at(0x0013) __sfr CCPR1L;
400 extern __at(0x0014) __sfr CCPR1H;
401
402 //==============================================================================
403 // CCP1CON Bits
404
405 extern __at(0x0015) __sfr CCP1CON;
406
407 typedef union
408 {
409 struct
410 {
411 unsigned CCP1M0 : 1;
412 unsigned CCP1M1 : 1;
413 unsigned CCP1M2 : 1;
414 unsigned CCP1M3 : 1;
415 unsigned DC1B0 : 1;
416 unsigned DC1B1 : 1;
417 unsigned P1M0 : 1;
418 unsigned P1M1 : 1;
419 };
420
421 struct
422 {
423 unsigned CCP1M : 4;
424 unsigned : 4;
425 };
426
427 struct
428 {
429 unsigned : 4;
430 unsigned DC1B : 2;
431 unsigned : 2;
432 };
433
434 struct
435 {
436 unsigned : 6;
437 unsigned P1M : 2;
438 };
439 } __CCP1CONbits_t;
440
441 extern __at(0x0015) volatile __CCP1CONbits_t CCP1CONbits;
442
443 #define _CCP1M0 0x01
444 #define _CCP1M1 0x02
445 #define _CCP1M2 0x04
446 #define _CCP1M3 0x08
447 #define _DC1B0 0x10
448 #define _DC1B1 0x20
449 #define _P1M0 0x40
450 #define _P1M1 0x80
451
452 //==============================================================================
453
454
455 //==============================================================================
456 // PWM1CON Bits
457
458 extern __at(0x0016) __sfr PWM1CON;
459
460 typedef union
461 {
462 struct
463 {
464 unsigned PDC0 : 1;
465 unsigned PDC1 : 1;
466 unsigned PDC2 : 1;
467 unsigned PDC3 : 1;
468 unsigned PDC4 : 1;
469 unsigned PDC5 : 1;
470 unsigned PDC6 : 1;
471 unsigned PRSEN : 1;
472 };
473
474 struct
475 {
476 unsigned PDC : 7;
477 unsigned : 1;
478 };
479 } __PWM1CONbits_t;
480
481 extern __at(0x0016) volatile __PWM1CONbits_t PWM1CONbits;
482
483 #define _PDC0 0x01
484 #define _PDC1 0x02
485 #define _PDC2 0x04
486 #define _PDC3 0x08
487 #define _PDC4 0x10
488 #define _PDC5 0x20
489 #define _PDC6 0x40
490 #define _PRSEN 0x80
491
492 //==============================================================================
493
494
495 //==============================================================================
496 // ECCPAS Bits
497
498 extern __at(0x0017) __sfr ECCPAS;
499
500 typedef union
501 {
502 struct
503 {
504 unsigned PSSBD0 : 1;
505 unsigned PSSBD1 : 1;
506 unsigned PSSAC0 : 1;
507 unsigned PSSAC1 : 1;
508 unsigned ECCPAS0 : 1;
509 unsigned ECCPAS1 : 1;
510 unsigned ECCPAS2 : 1;
511 unsigned ECCPASE : 1;
512 };
513
514 struct
515 {
516 unsigned PSSBD : 2;
517 unsigned : 6;
518 };
519
520 struct
521 {
522 unsigned : 2;
523 unsigned PSSAC : 2;
524 unsigned : 4;
525 };
526
527 struct
528 {
529 unsigned : 4;
530 unsigned ECCPAS : 3;
531 unsigned : 1;
532 };
533 } __ECCPASbits_t;
534
535 extern __at(0x0017) volatile __ECCPASbits_t ECCPASbits;
536
537 #define _PSSBD0 0x01
538 #define _PSSBD1 0x02
539 #define _PSSAC0 0x04
540 #define _PSSAC1 0x08
541 #define _ECCPAS0 0x10
542 #define _ECCPAS1 0x20
543 #define _ECCPAS2 0x40
544 #define _ECCPASE 0x80
545
546 //==============================================================================
547
548
549 //==============================================================================
550 // VRCON Bits
551
552 extern __at(0x0019) __sfr VRCON;
553
554 typedef union
555 {
556 struct
557 {
558 unsigned VR0 : 1;
559 unsigned VR1 : 1;
560 unsigned VR2 : 1;
561 unsigned VR3 : 1;
562 unsigned VP6EN : 1;
563 unsigned VRR : 1;
564 unsigned C2VREN : 1;
565 unsigned C1VREN : 1;
566 };
567
568 struct
569 {
570 unsigned : 1;
571 unsigned : 1;
572 unsigned : 1;
573 unsigned : 1;
574 unsigned FVREN : 1;
575 unsigned : 1;
576 unsigned : 1;
577 unsigned : 1;
578 };
579
580 struct
581 {
582 unsigned VR : 4;
583 unsigned : 4;
584 };
585 } __VRCONbits_t;
586
587 extern __at(0x0019) volatile __VRCONbits_t VRCONbits;
588
589 #define _VR0 0x01
590 #define _VR1 0x02
591 #define _VR2 0x04
592 #define _VR3 0x08
593 #define _VP6EN 0x10
594 #define _FVREN 0x10
595 #define _VRR 0x20
596 #define _C2VREN 0x40
597 #define _C1VREN 0x80
598
599 //==============================================================================
600
601
602 //==============================================================================
603 // CM1CON0 Bits
604
605 extern __at(0x001A) __sfr CM1CON0;
606
607 typedef union
608 {
609 struct
610 {
611 unsigned C1CH0 : 1;
612 unsigned C1CH1 : 1;
613 unsigned C1R : 1;
614 unsigned : 1;
615 unsigned C1POL : 1;
616 unsigned C1OE : 1;
617 unsigned C1OUT : 1;
618 unsigned C1ON : 1;
619 };
620
621 struct
622 {
623 unsigned C1CH : 2;
624 unsigned : 6;
625 };
626 } __CM1CON0bits_t;
627
628 extern __at(0x001A) volatile __CM1CON0bits_t CM1CON0bits;
629
630 #define _C1CH0 0x01
631 #define _C1CH1 0x02
632 #define _C1R 0x04
633 #define _C1POL 0x10
634 #define _C1OE 0x20
635 #define _C1OUT 0x40
636 #define _C1ON 0x80
637
638 //==============================================================================
639
640
641 //==============================================================================
642 // CM2CON0 Bits
643
644 extern __at(0x001B) __sfr CM2CON0;
645
646 typedef union
647 {
648 struct
649 {
650 unsigned C2CH0 : 1;
651 unsigned C2CH1 : 1;
652 unsigned C2R : 1;
653 unsigned : 1;
654 unsigned C2POL : 1;
655 unsigned C2OE : 1;
656 unsigned C2OUT : 1;
657 unsigned C2ON : 1;
658 };
659
660 struct
661 {
662 unsigned C2CH : 2;
663 unsigned : 6;
664 };
665 } __CM2CON0bits_t;
666
667 extern __at(0x001B) volatile __CM2CON0bits_t CM2CON0bits;
668
669 #define _C2CH0 0x01
670 #define _C2CH1 0x02
671 #define _C2R 0x04
672 #define _C2POL 0x10
673 #define _C2OE 0x20
674 #define _C2OUT 0x40
675 #define _C2ON 0x80
676
677 //==============================================================================
678
679
680 //==============================================================================
681 // CM2CON1 Bits
682
683 extern __at(0x001C) __sfr CM2CON1;
684
685 typedef struct
686 {
687 unsigned C2SYNC : 1;
688 unsigned T1GSS : 1;
689 unsigned C2HYS : 1;
690 unsigned C1HYS : 1;
691 unsigned T1ACS : 1;
692 unsigned : 1;
693 unsigned MC2OUT : 1;
694 unsigned MC1OUT : 1;
695 } __CM2CON1bits_t;
696
697 extern __at(0x001C) volatile __CM2CON1bits_t CM2CON1bits;
698
699 #define _C2SYNC 0x01
700 #define _T1GSS 0x02
701 #define _C2HYS 0x04
702 #define _C1HYS 0x08
703 #define _T1ACS 0x10
704 #define _MC2OUT 0x40
705 #define _MC1OUT 0x80
706
707 //==============================================================================
708
709 extern __at(0x001E) __sfr ADRESH;
710
711 //==============================================================================
712 // ADCON0 Bits
713
714 extern __at(0x001F) __sfr ADCON0;
715
716 typedef union
717 {
718 struct
719 {
720 unsigned ADON : 1;
721 unsigned GO_NOT_DONE : 1;
722 unsigned CHS0 : 1;
723 unsigned CHS1 : 1;
724 unsigned CHS2 : 1;
725 unsigned CHS3 : 1;
726 unsigned VCFG : 1;
727 unsigned ADFM : 1;
728 };
729
730 struct
731 {
732 unsigned : 1;
733 unsigned GO : 1;
734 unsigned : 1;
735 unsigned : 1;
736 unsigned : 1;
737 unsigned : 1;
738 unsigned : 1;
739 unsigned : 1;
740 };
741
742 struct
743 {
744 unsigned : 1;
745 unsigned NOT_DONE : 1;
746 unsigned : 1;
747 unsigned : 1;
748 unsigned : 1;
749 unsigned : 1;
750 unsigned : 1;
751 unsigned : 1;
752 };
753
754 struct
755 {
756 unsigned : 1;
757 unsigned GO_DONE : 1;
758 unsigned : 1;
759 unsigned : 1;
760 unsigned : 1;
761 unsigned : 1;
762 unsigned : 1;
763 unsigned : 1;
764 };
765
766 struct
767 {
768 unsigned : 2;
769 unsigned CHS : 4;
770 unsigned : 2;
771 };
772 } __ADCON0bits_t;
773
774 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits;
775
776 #define _ADON 0x01
777 #define _GO_NOT_DONE 0x02
778 #define _GO 0x02
779 #define _NOT_DONE 0x02
780 #define _GO_DONE 0x02
781 #define _CHS0 0x04
782 #define _CHS1 0x08
783 #define _CHS2 0x10
784 #define _CHS3 0x20
785 #define _VCFG 0x40
786 #define _ADFM 0x80
787
788 //==============================================================================
789
790
791 //==============================================================================
792 // OPTION_REG Bits
793
794 extern __at(0x0081) __sfr OPTION_REG;
795
796 typedef union
797 {
798 struct
799 {
800 unsigned PS0 : 1;
801 unsigned PS1 : 1;
802 unsigned PS2 : 1;
803 unsigned PSA : 1;
804 unsigned T0SE : 1;
805 unsigned T0CS : 1;
806 unsigned INTEDG : 1;
807 unsigned NOT_RAPU : 1;
808 };
809
810 struct
811 {
812 unsigned PS : 3;
813 unsigned : 5;
814 };
815 } __OPTION_REGbits_t;
816
817 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
818
819 #define _PS0 0x01
820 #define _PS1 0x02
821 #define _PS2 0x04
822 #define _PSA 0x08
823 #define _T0SE 0x10
824 #define _T0CS 0x20
825 #define _INTEDG 0x40
826 #define _NOT_RAPU 0x80
827
828 //==============================================================================
829
830
831 //==============================================================================
832 // TRISA Bits
833
834 extern __at(0x0085) __sfr TRISA;
835
836 typedef union
837 {
838 struct
839 {
840 unsigned TRISA0 : 1;
841 unsigned TRISA1 : 1;
842 unsigned TRISA2 : 1;
843 unsigned TRISA3 : 1;
844 unsigned TRISA4 : 1;
845 unsigned TRISA5 : 1;
846 unsigned : 1;
847 unsigned : 1;
848 };
849
850 struct
851 {
852 unsigned TRISA : 6;
853 unsigned : 2;
854 };
855 } __TRISAbits_t;
856
857 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
858
859 #define _TRISA0 0x01
860 #define _TRISA1 0x02
861 #define _TRISA2 0x04
862 #define _TRISA3 0x08
863 #define _TRISA4 0x10
864 #define _TRISA5 0x20
865
866 //==============================================================================
867
868
869 //==============================================================================
870 // TRISC Bits
871
872 extern __at(0x0087) __sfr TRISC;
873
874 typedef union
875 {
876 struct
877 {
878 unsigned TRISC0 : 1;
879 unsigned TRISC1 : 1;
880 unsigned TRISC2 : 1;
881 unsigned TRISC3 : 1;
882 unsigned TRISC4 : 1;
883 unsigned TRISC5 : 1;
884 unsigned : 1;
885 unsigned : 1;
886 };
887
888 struct
889 {
890 unsigned TRISC : 6;
891 unsigned : 2;
892 };
893 } __TRISCbits_t;
894
895 extern __at(0x0087) volatile __TRISCbits_t TRISCbits;
896
897 #define _TRISC0 0x01
898 #define _TRISC1 0x02
899 #define _TRISC2 0x04
900 #define _TRISC3 0x08
901 #define _TRISC4 0x10
902 #define _TRISC5 0x20
903
904 //==============================================================================
905
906
907 //==============================================================================
908 // PIE1 Bits
909
910 extern __at(0x008C) __sfr PIE1;
911
912 typedef union
913 {
914 struct
915 {
916 unsigned TMR1IE : 1;
917 unsigned TMR2IE : 1;
918 unsigned : 1;
919 unsigned C1IE : 1;
920 unsigned C2IE : 1;
921 unsigned ECCPIE : 1;
922 unsigned ADIE : 1;
923 unsigned : 1;
924 };
925
926 struct
927 {
928 unsigned T1IE : 1;
929 unsigned T2IE : 1;
930 unsigned : 1;
931 unsigned : 1;
932 unsigned : 1;
933 unsigned CCP1IE : 1;
934 unsigned : 1;
935 unsigned : 1;
936 };
937 } __PIE1bits_t;
938
939 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
940
941 #define _TMR1IE 0x01
942 #define _T1IE 0x01
943 #define _TMR2IE 0x02
944 #define _T2IE 0x02
945 #define _C1IE 0x08
946 #define _C2IE 0x10
947 #define _ECCPIE 0x20
948 #define _CCP1IE 0x20
949 #define _ADIE 0x40
950
951 //==============================================================================
952
953
954 //==============================================================================
955 // PCON Bits
956
957 extern __at(0x008E) __sfr PCON;
958
959 typedef union
960 {
961 struct
962 {
963 unsigned NOT_BOR : 1;
964 unsigned NOT_POR : 1;
965 unsigned : 1;
966 unsigned : 1;
967 unsigned : 1;
968 unsigned : 1;
969 unsigned : 1;
970 unsigned : 1;
971 };
972
973 struct
974 {
975 unsigned NOT_BOD : 1;
976 unsigned : 1;
977 unsigned : 1;
978 unsigned : 1;
979 unsigned : 1;
980 unsigned : 1;
981 unsigned : 1;
982 unsigned : 1;
983 };
984 } __PCONbits_t;
985
986 extern __at(0x008E) volatile __PCONbits_t PCONbits;
987
988 #define _NOT_BOR 0x01
989 #define _NOT_BOD 0x01
990 #define _NOT_POR 0x02
991
992 //==============================================================================
993
994
995 //==============================================================================
996 // OSCTUNE Bits
997
998 extern __at(0x0090) __sfr OSCTUNE;
999
1000 typedef union
1001 {
1002 struct
1003 {
1004 unsigned TUN0 : 1;
1005 unsigned TUN1 : 1;
1006 unsigned TUN2 : 1;
1007 unsigned TUN3 : 1;
1008 unsigned TUN4 : 1;
1009 unsigned : 1;
1010 unsigned : 1;
1011 unsigned : 1;
1012 };
1013
1014 struct
1015 {
1016 unsigned TUN : 5;
1017 unsigned : 3;
1018 };
1019 } __OSCTUNEbits_t;
1020
1021 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits;
1022
1023 #define _TUN0 0x01
1024 #define _TUN1 0x02
1025 #define _TUN2 0x04
1026 #define _TUN3 0x08
1027 #define _TUN4 0x10
1028
1029 //==============================================================================
1030
1031
1032 //==============================================================================
1033 // ANSEL Bits
1034
1035 extern __at(0x0091) __sfr ANSEL;
1036
1037 typedef struct
1038 {
1039 unsigned ANS0 : 1;
1040 unsigned ANS1 : 1;
1041 unsigned ANS2 : 1;
1042 unsigned ANS3 : 1;
1043 unsigned ANS4 : 1;
1044 unsigned ANS5 : 1;
1045 unsigned ANS6 : 1;
1046 unsigned ANS7 : 1;
1047 } __ANSELbits_t;
1048
1049 extern __at(0x0091) volatile __ANSELbits_t ANSELbits;
1050
1051 #define _ANS0 0x01
1052 #define _ANS1 0x02
1053 #define _ANS2 0x04
1054 #define _ANS3 0x08
1055 #define _ANS4 0x10
1056 #define _ANS5 0x20
1057 #define _ANS6 0x40
1058 #define _ANS7 0x80
1059
1060 //==============================================================================
1061
1062 extern __at(0x0092) __sfr PR2;
1063
1064 //==============================================================================
1065 // WPU Bits
1066
1067 extern __at(0x0095) __sfr WPU;
1068
1069 typedef union
1070 {
1071 struct
1072 {
1073 unsigned WPUA0 : 1;
1074 unsigned WPUA1 : 1;
1075 unsigned WPUA2 : 1;
1076 unsigned : 1;
1077 unsigned WPUA4 : 1;
1078 unsigned WPUA5 : 1;
1079 unsigned : 1;
1080 unsigned : 1;
1081 };
1082
1083 struct
1084 {
1085 unsigned WPU0 : 1;
1086 unsigned WPU1 : 1;
1087 unsigned WPU2 : 1;
1088 unsigned : 1;
1089 unsigned WPU4 : 1;
1090 unsigned WPU5 : 1;
1091 unsigned : 1;
1092 unsigned : 1;
1093 };
1094 } __WPUbits_t;
1095
1096 extern __at(0x0095) volatile __WPUbits_t WPUbits;
1097
1098 #define _WPUA0 0x01
1099 #define _WPU0 0x01
1100 #define _WPUA1 0x02
1101 #define _WPU1 0x02
1102 #define _WPUA2 0x04
1103 #define _WPU2 0x04
1104 #define _WPUA4 0x10
1105 #define _WPU4 0x10
1106 #define _WPUA5 0x20
1107 #define _WPU5 0x20
1108
1109 //==============================================================================
1110
1111
1112 //==============================================================================
1113 // WPUA Bits
1114
1115 extern __at(0x0095) __sfr WPUA;
1116
1117 typedef union
1118 {
1119 struct
1120 {
1121 unsigned WPUA0 : 1;
1122 unsigned WPUA1 : 1;
1123 unsigned WPUA2 : 1;
1124 unsigned : 1;
1125 unsigned WPUA4 : 1;
1126 unsigned WPUA5 : 1;
1127 unsigned : 1;
1128 unsigned : 1;
1129 };
1130
1131 struct
1132 {
1133 unsigned WPU0 : 1;
1134 unsigned WPU1 : 1;
1135 unsigned WPU2 : 1;
1136 unsigned : 1;
1137 unsigned WPU4 : 1;
1138 unsigned WPU5 : 1;
1139 unsigned : 1;
1140 unsigned : 1;
1141 };
1142 } __WPUAbits_t;
1143
1144 extern __at(0x0095) volatile __WPUAbits_t WPUAbits;
1145
1146 #define _WPUA_WPUA0 0x01
1147 #define _WPUA_WPU0 0x01
1148 #define _WPUA_WPUA1 0x02
1149 #define _WPUA_WPU1 0x02
1150 #define _WPUA_WPUA2 0x04
1151 #define _WPUA_WPU2 0x04
1152 #define _WPUA_WPUA4 0x10
1153 #define _WPUA_WPU4 0x10
1154 #define _WPUA_WPUA5 0x20
1155 #define _WPUA_WPU5 0x20
1156
1157 //==============================================================================
1158
1159
1160 //==============================================================================
1161 // IOC Bits
1162
1163 extern __at(0x0096) __sfr IOC;
1164
1165 typedef union
1166 {
1167 struct
1168 {
1169 unsigned IOCA0 : 1;
1170 unsigned IOCA1 : 1;
1171 unsigned IOCA2 : 1;
1172 unsigned IOCA3 : 1;
1173 unsigned IOCA4 : 1;
1174 unsigned IOCA5 : 1;
1175 unsigned : 1;
1176 unsigned : 1;
1177 };
1178
1179 struct
1180 {
1181 unsigned IOC0 : 1;
1182 unsigned IOC1 : 1;
1183 unsigned IOC2 : 1;
1184 unsigned IOC3 : 1;
1185 unsigned IOC4 : 1;
1186 unsigned IOC5 : 1;
1187 unsigned : 1;
1188 unsigned : 1;
1189 };
1190
1191 struct
1192 {
1193 unsigned IOC : 6;
1194 unsigned : 2;
1195 };
1196
1197 struct
1198 {
1199 unsigned IOCA : 6;
1200 unsigned : 2;
1201 };
1202 } __IOCbits_t;
1203
1204 extern __at(0x0096) volatile __IOCbits_t IOCbits;
1205
1206 #define _IOCA0 0x01
1207 #define _IOC0 0x01
1208 #define _IOCA1 0x02
1209 #define _IOC1 0x02
1210 #define _IOCA2 0x04
1211 #define _IOC2 0x04
1212 #define _IOCA3 0x08
1213 #define _IOC3 0x08
1214 #define _IOCA4 0x10
1215 #define _IOC4 0x10
1216 #define _IOCA5 0x20
1217 #define _IOC5 0x20
1218
1219 //==============================================================================
1220
1221
1222 //==============================================================================
1223 // IOCA Bits
1224
1225 extern __at(0x0096) __sfr IOCA;
1226
1227 typedef union
1228 {
1229 struct
1230 {
1231 unsigned IOCA0 : 1;
1232 unsigned IOCA1 : 1;
1233 unsigned IOCA2 : 1;
1234 unsigned IOCA3 : 1;
1235 unsigned IOCA4 : 1;
1236 unsigned IOCA5 : 1;
1237 unsigned : 1;
1238 unsigned : 1;
1239 };
1240
1241 struct
1242 {
1243 unsigned IOC0 : 1;
1244 unsigned IOC1 : 1;
1245 unsigned IOC2 : 1;
1246 unsigned IOC3 : 1;
1247 unsigned IOC4 : 1;
1248 unsigned IOC5 : 1;
1249 unsigned : 1;
1250 unsigned : 1;
1251 };
1252
1253 struct
1254 {
1255 unsigned IOC : 6;
1256 unsigned : 2;
1257 };
1258
1259 struct
1260 {
1261 unsigned IOCA : 6;
1262 unsigned : 2;
1263 };
1264 } __IOCAbits_t;
1265
1266 extern __at(0x0096) volatile __IOCAbits_t IOCAbits;
1267
1268 #define _IOCA_IOCA0 0x01
1269 #define _IOCA_IOC0 0x01
1270 #define _IOCA_IOCA1 0x02
1271 #define _IOCA_IOC1 0x02
1272 #define _IOCA_IOCA2 0x04
1273 #define _IOCA_IOC2 0x04
1274 #define _IOCA_IOCA3 0x08
1275 #define _IOCA_IOC3 0x08
1276 #define _IOCA_IOCA4 0x10
1277 #define _IOCA_IOC4 0x10
1278 #define _IOCA_IOCA5 0x20
1279 #define _IOCA_IOC5 0x20
1280
1281 //==============================================================================
1282
1283
1284 //==============================================================================
1285 // SRCON Bits
1286
1287 extern __at(0x0099) __sfr SRCON;
1288
1289 typedef union
1290 {
1291 struct
1292 {
1293 unsigned SRCLKEN : 1;
1294 unsigned : 1;
1295 unsigned PULSR : 1;
1296 unsigned PULSS : 1;
1297 unsigned C2REN : 1;
1298 unsigned C1SEN : 1;
1299 unsigned SR0 : 1;
1300 unsigned SR1 : 1;
1301 };
1302
1303 struct
1304 {
1305 unsigned : 6;
1306 unsigned SR : 2;
1307 };
1308 } __SRCONbits_t;
1309
1310 extern __at(0x0099) volatile __SRCONbits_t SRCONbits;
1311
1312 #define _SRCLKEN 0x01
1313 #define _PULSR 0x04
1314 #define _PULSS 0x08
1315 #define _C2REN 0x10
1316 #define _C1SEN 0x20
1317 #define _SR0 0x40
1318 #define _SR1 0x80
1319
1320 //==============================================================================
1321
1322
1323 //==============================================================================
1324 // SRCON0 Bits
1325
1326 extern __at(0x0099) __sfr SRCON0;
1327
1328 typedef union
1329 {
1330 struct
1331 {
1332 unsigned SRCLKEN : 1;
1333 unsigned : 1;
1334 unsigned PULSR : 1;
1335 unsigned PULSS : 1;
1336 unsigned C2REN : 1;
1337 unsigned C1SEN : 1;
1338 unsigned SR0 : 1;
1339 unsigned SR1 : 1;
1340 };
1341
1342 struct
1343 {
1344 unsigned : 6;
1345 unsigned SR : 2;
1346 };
1347 } __SRCON0bits_t;
1348
1349 extern __at(0x0099) volatile __SRCON0bits_t SRCON0bits;
1350
1351 #define _SRCON0_SRCLKEN 0x01
1352 #define _SRCON0_PULSR 0x04
1353 #define _SRCON0_PULSS 0x08
1354 #define _SRCON0_C2REN 0x10
1355 #define _SRCON0_C1SEN 0x20
1356 #define _SRCON0_SR0 0x40
1357 #define _SRCON0_SR1 0x80
1358
1359 //==============================================================================
1360
1361
1362 //==============================================================================
1363 // SRCON1 Bits
1364
1365 extern __at(0x009A) __sfr SRCON1;
1366
1367 typedef union
1368 {
1369 struct
1370 {
1371 unsigned : 1;
1372 unsigned : 1;
1373 unsigned : 1;
1374 unsigned : 1;
1375 unsigned : 1;
1376 unsigned : 1;
1377 unsigned SRCS0 : 1;
1378 unsigned SRCS1 : 1;
1379 };
1380
1381 struct
1382 {
1383 unsigned : 6;
1384 unsigned SRCS : 2;
1385 };
1386 } __SRCON1bits_t;
1387
1388 extern __at(0x009A) volatile __SRCON1bits_t SRCON1bits;
1389
1390 #define _SRCS0 0x40
1391 #define _SRCS1 0x80
1392
1393 //==============================================================================
1394
1395 extern __at(0x009E) __sfr ADRESL;
1396
1397 //==============================================================================
1398 // ADCON1 Bits
1399
1400 extern __at(0x009F) __sfr ADCON1;
1401
1402 typedef union
1403 {
1404 struct
1405 {
1406 unsigned : 1;
1407 unsigned : 1;
1408 unsigned : 1;
1409 unsigned : 1;
1410 unsigned ADCS0 : 1;
1411 unsigned ADCS1 : 1;
1412 unsigned ADCS2 : 1;
1413 unsigned : 1;
1414 };
1415
1416 struct
1417 {
1418 unsigned : 4;
1419 unsigned ADCS : 3;
1420 unsigned : 1;
1421 };
1422 } __ADCON1bits_t;
1423
1424 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits;
1425
1426 #define _ADCS0 0x10
1427 #define _ADCS1 0x20
1428 #define _ADCS2 0x40
1429
1430 //==============================================================================
1431
1432
1433 //==============================================================================
1434 //
1435 // Configuration Bits
1436 //
1437 //==============================================================================
1438
1439 #define _CONFIG 0x2007
1440
1441 //----------------------------- CONFIG Options -------------------------------
1442
1443 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1444 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1445 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1446 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1447 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1448 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1449 #define _FOSC_EC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1450 #define _EC_OSC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1451 #define _FOSC_INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1452 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1453 #define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1454 #define _FOSC_INTOSCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1455 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1456 #define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1457 #define _FOSC_EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1458 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1459 #define _EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1460 #define _FOSC_EXTRCCLK 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1461 #define _EXTRC_OSC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1462 #define _EXTRC 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1463 #define _WDTE_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
1464 #define _WDT_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
1465 #define _WDTE_ON 0x3FFF // WDT enabled.
1466 #define _WDT_ON 0x3FFF // WDT enabled.
1467 #define _PWRTE_ON 0x3FEF // PWRT enabled.
1468 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1469 #define _MCLRE_OFF 0x3FDF // MCLR pin function is digital input, MCLR internally tied to VDD.
1470 #define _MCLRE_ON 0x3FFF // MCLR pin function is MCLR.
1471 #define _CP_ON 0x3FBF // Program memory code protection is enabled.
1472 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
1473 #define _IOSCFS_4MHZ 0x3F7F // 4 MHz.
1474 #define _IOSCFS4 0x3F7F // 4 MHz.
1475 #define _IOSCFS_8MHZ 0x3FFF // 8 MHz.
1476 #define _IOSCFS8 0x3FFF // 8 MHz.
1477 #define _BOREN_OFF 0x3CFF // BOR Disabled.
1478 #define _BOD_OFF 0x3CFF // BOR Disabled.
1479 #define _BOR_OFF 0x3CFF // BOR Disabled.
1480 #define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1481 #define _BOD_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1482 #define _BOR_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1483 #define _BOREN_ON 0x3FFF // BOR enabled.
1484 #define _BOD_ON 0x3FFF // BOR enabled.
1485 #define _BOR_ON 0x3FFF // BOR enabled.
1486
1487 //==============================================================================
1488
1489 #define _DEVID1 0x2006
1490
1491 #define _IDLOC0 0x2000
1492 #define _IDLOC1 0x2001
1493 #define _IDLOC2 0x2002
1494 #define _IDLOC3 0x2003
1495
1496 //==============================================================================
1497
1498 #ifndef NO_BIT_DEFINES
1499
1500 #define ADON ADCON0bits.ADON // bit 0
1501 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
1502 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
1503 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
1504 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
1505 #define CHS0 ADCON0bits.CHS0 // bit 2
1506 #define CHS1 ADCON0bits.CHS1 // bit 3
1507 #define CHS2 ADCON0bits.CHS2 // bit 4
1508 #define CHS3 ADCON0bits.CHS3 // bit 5
1509 #define VCFG ADCON0bits.VCFG // bit 6
1510 #define ADFM ADCON0bits.ADFM // bit 7
1511
1512 #define ADCS0 ADCON1bits.ADCS0 // bit 4
1513 #define ADCS1 ADCON1bits.ADCS1 // bit 5
1514 #define ADCS2 ADCON1bits.ADCS2 // bit 6
1515
1516 #define ANS0 ANSELbits.ANS0 // bit 0
1517 #define ANS1 ANSELbits.ANS1 // bit 1
1518 #define ANS2 ANSELbits.ANS2 // bit 2
1519 #define ANS3 ANSELbits.ANS3 // bit 3
1520 #define ANS4 ANSELbits.ANS4 // bit 4
1521 #define ANS5 ANSELbits.ANS5 // bit 5
1522 #define ANS6 ANSELbits.ANS6 // bit 6
1523 #define ANS7 ANSELbits.ANS7 // bit 7
1524
1525 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1526 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1527 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1528 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1529 #define DC1B0 CCP1CONbits.DC1B0 // bit 4
1530 #define DC1B1 CCP1CONbits.DC1B1 // bit 5
1531 #define P1M0 CCP1CONbits.P1M0 // bit 6
1532 #define P1M1 CCP1CONbits.P1M1 // bit 7
1533
1534 #define C1CH0 CM1CON0bits.C1CH0 // bit 0
1535 #define C1CH1 CM1CON0bits.C1CH1 // bit 1
1536 #define C1R CM1CON0bits.C1R // bit 2
1537 #define C1POL CM1CON0bits.C1POL // bit 4
1538 #define C1OE CM1CON0bits.C1OE // bit 5
1539 #define C1OUT CM1CON0bits.C1OUT // bit 6
1540 #define C1ON CM1CON0bits.C1ON // bit 7
1541
1542 #define C2CH0 CM2CON0bits.C2CH0 // bit 0
1543 #define C2CH1 CM2CON0bits.C2CH1 // bit 1
1544 #define C2R CM2CON0bits.C2R // bit 2
1545 #define C2POL CM2CON0bits.C2POL // bit 4
1546 #define C2OE CM2CON0bits.C2OE // bit 5
1547 #define C2OUT CM2CON0bits.C2OUT // bit 6
1548 #define C2ON CM2CON0bits.C2ON // bit 7
1549
1550 #define C2SYNC CM2CON1bits.C2SYNC // bit 0
1551 #define T1GSS CM2CON1bits.T1GSS // bit 1
1552 #define C2HYS CM2CON1bits.C2HYS // bit 2
1553 #define C1HYS CM2CON1bits.C1HYS // bit 3
1554 #define T1ACS CM2CON1bits.T1ACS // bit 4
1555 #define MC2OUT CM2CON1bits.MC2OUT // bit 6
1556 #define MC1OUT CM2CON1bits.MC1OUT // bit 7
1557
1558 #define PSSBD0 ECCPASbits.PSSBD0 // bit 0
1559 #define PSSBD1 ECCPASbits.PSSBD1 // bit 1
1560 #define PSSAC0 ECCPASbits.PSSAC0 // bit 2
1561 #define PSSAC1 ECCPASbits.PSSAC1 // bit 3
1562 #define ECCPAS0 ECCPASbits.ECCPAS0 // bit 4
1563 #define ECCPAS1 ECCPASbits.ECCPAS1 // bit 5
1564 #define ECCPAS2 ECCPASbits.ECCPAS2 // bit 6
1565 #define ECCPASE ECCPASbits.ECCPASE // bit 7
1566
1567 #define RAIF INTCONbits.RAIF // bit 0
1568 #define INTF INTCONbits.INTF // bit 1
1569 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
1570 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
1571 #define RAIE INTCONbits.RAIE // bit 3
1572 #define INTE INTCONbits.INTE // bit 4
1573 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
1574 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
1575 #define PEIE INTCONbits.PEIE // bit 6
1576 #define GIE INTCONbits.GIE // bit 7
1577
1578 #define IOCA0 IOCbits.IOCA0 // bit 0, shadows bit in IOCbits
1579 #define IOC0 IOCbits.IOC0 // bit 0, shadows bit in IOCbits
1580 #define IOCA1 IOCbits.IOCA1 // bit 1, shadows bit in IOCbits
1581 #define IOC1 IOCbits.IOC1 // bit 1, shadows bit in IOCbits
1582 #define IOCA2 IOCbits.IOCA2 // bit 2, shadows bit in IOCbits
1583 #define IOC2 IOCbits.IOC2 // bit 2, shadows bit in IOCbits
1584 #define IOCA3 IOCbits.IOCA3 // bit 3, shadows bit in IOCbits
1585 #define IOC3 IOCbits.IOC3 // bit 3, shadows bit in IOCbits
1586 #define IOCA4 IOCbits.IOCA4 // bit 4, shadows bit in IOCbits
1587 #define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits
1588 #define IOCA5 IOCbits.IOCA5 // bit 5, shadows bit in IOCbits
1589 #define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits
1590
1591 #define PS0 OPTION_REGbits.PS0 // bit 0
1592 #define PS1 OPTION_REGbits.PS1 // bit 1
1593 #define PS2 OPTION_REGbits.PS2 // bit 2
1594 #define PSA OPTION_REGbits.PSA // bit 3
1595 #define T0SE OPTION_REGbits.T0SE // bit 4
1596 #define T0CS OPTION_REGbits.T0CS // bit 5
1597 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1598 #define NOT_RAPU OPTION_REGbits.NOT_RAPU // bit 7
1599
1600 #define TUN0 OSCTUNEbits.TUN0 // bit 0
1601 #define TUN1 OSCTUNEbits.TUN1 // bit 1
1602 #define TUN2 OSCTUNEbits.TUN2 // bit 2
1603 #define TUN3 OSCTUNEbits.TUN3 // bit 3
1604 #define TUN4 OSCTUNEbits.TUN4 // bit 4
1605
1606 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1607 #define NOT_BOD PCONbits.NOT_BOD // bit 0, shadows bit in PCONbits
1608 #define NOT_POR PCONbits.NOT_POR // bit 1
1609
1610 #define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits
1611 #define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits
1612 #define TMR2IE PIE1bits.TMR2IE // bit 1, shadows bit in PIE1bits
1613 #define T2IE PIE1bits.T2IE // bit 1, shadows bit in PIE1bits
1614 #define C1IE PIE1bits.C1IE // bit 3
1615 #define C2IE PIE1bits.C2IE // bit 4
1616 #define ECCPIE PIE1bits.ECCPIE // bit 5, shadows bit in PIE1bits
1617 #define CCP1IE PIE1bits.CCP1IE // bit 5, shadows bit in PIE1bits
1618 #define ADIE PIE1bits.ADIE // bit 6
1619
1620 #define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits
1621 #define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits
1622 #define TMR2IF PIR1bits.TMR2IF // bit 1, shadows bit in PIR1bits
1623 #define T2IF PIR1bits.T2IF // bit 1, shadows bit in PIR1bits
1624 #define C1IF PIR1bits.C1IF // bit 3
1625 #define C2IF PIR1bits.C2IF // bit 4
1626 #define ECCPIF PIR1bits.ECCPIF // bit 5, shadows bit in PIR1bits
1627 #define CCP1IF PIR1bits.CCP1IF // bit 5, shadows bit in PIR1bits
1628 #define ADIF PIR1bits.ADIF // bit 6
1629
1630 #define RA0 PORTAbits.RA0 // bit 0
1631 #define RA1 PORTAbits.RA1 // bit 1
1632 #define RA2 PORTAbits.RA2 // bit 2
1633 #define RA3 PORTAbits.RA3 // bit 3
1634 #define RA4 PORTAbits.RA4 // bit 4
1635 #define RA5 PORTAbits.RA5 // bit 5
1636
1637 #define RC0 PORTCbits.RC0 // bit 0
1638 #define RC1 PORTCbits.RC1 // bit 1
1639 #define RC2 PORTCbits.RC2 // bit 2
1640 #define RC3 PORTCbits.RC3 // bit 3
1641 #define RC4 PORTCbits.RC4 // bit 4
1642 #define RC5 PORTCbits.RC5 // bit 5
1643
1644 #define PDC0 PWM1CONbits.PDC0 // bit 0
1645 #define PDC1 PWM1CONbits.PDC1 // bit 1
1646 #define PDC2 PWM1CONbits.PDC2 // bit 2
1647 #define PDC3 PWM1CONbits.PDC3 // bit 3
1648 #define PDC4 PWM1CONbits.PDC4 // bit 4
1649 #define PDC5 PWM1CONbits.PDC5 // bit 5
1650 #define PDC6 PWM1CONbits.PDC6 // bit 6
1651 #define PRSEN PWM1CONbits.PRSEN // bit 7
1652
1653 #define SRCLKEN SRCONbits.SRCLKEN // bit 0
1654 #define PULSR SRCONbits.PULSR // bit 2
1655 #define PULSS SRCONbits.PULSS // bit 3
1656 #define C2REN SRCONbits.C2REN // bit 4
1657 #define C1SEN SRCONbits.C1SEN // bit 5
1658 #define SR0 SRCONbits.SR0 // bit 6
1659 #define SR1 SRCONbits.SR1 // bit 7
1660
1661 #define SRCS0 SRCON1bits.SRCS0 // bit 6
1662 #define SRCS1 SRCON1bits.SRCS1 // bit 7
1663
1664 #define C STATUSbits.C // bit 0
1665 #define DC STATUSbits.DC // bit 1
1666 #define Z STATUSbits.Z // bit 2
1667 #define NOT_PD STATUSbits.NOT_PD // bit 3
1668 #define NOT_TO STATUSbits.NOT_TO // bit 4
1669 #define RP0 STATUSbits.RP0 // bit 5
1670 #define RP1 STATUSbits.RP1 // bit 6
1671 #define IRP STATUSbits.IRP // bit 7
1672
1673 #define TMR1ON T1CONbits.TMR1ON // bit 0
1674 #define TMR1CS T1CONbits.TMR1CS // bit 1
1675 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
1676 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1677 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1678 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1679 #define TMR1GE T1CONbits.TMR1GE // bit 6
1680 #define T1GINV T1CONbits.T1GINV // bit 7
1681
1682 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1683 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1684 #define TMR2ON T2CONbits.TMR2ON // bit 2
1685 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1686 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1687 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1688 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1689
1690 #define TRISA0 TRISAbits.TRISA0 // bit 0
1691 #define TRISA1 TRISAbits.TRISA1 // bit 1
1692 #define TRISA2 TRISAbits.TRISA2 // bit 2
1693 #define TRISA3 TRISAbits.TRISA3 // bit 3
1694 #define TRISA4 TRISAbits.TRISA4 // bit 4
1695 #define TRISA5 TRISAbits.TRISA5 // bit 5
1696
1697 #define TRISC0 TRISCbits.TRISC0 // bit 0
1698 #define TRISC1 TRISCbits.TRISC1 // bit 1
1699 #define TRISC2 TRISCbits.TRISC2 // bit 2
1700 #define TRISC3 TRISCbits.TRISC3 // bit 3
1701 #define TRISC4 TRISCbits.TRISC4 // bit 4
1702 #define TRISC5 TRISCbits.TRISC5 // bit 5
1703
1704 #define VR0 VRCONbits.VR0 // bit 0
1705 #define VR1 VRCONbits.VR1 // bit 1
1706 #define VR2 VRCONbits.VR2 // bit 2
1707 #define VR3 VRCONbits.VR3 // bit 3
1708 #define VP6EN VRCONbits.VP6EN // bit 4, shadows bit in VRCONbits
1709 #define FVREN VRCONbits.FVREN // bit 4, shadows bit in VRCONbits
1710 #define VRR VRCONbits.VRR // bit 5
1711 #define C2VREN VRCONbits.C2VREN // bit 6
1712 #define C1VREN VRCONbits.C1VREN // bit 7
1713
1714 #define WPUA0 WPUbits.WPUA0 // bit 0, shadows bit in WPUbits
1715 #define WPU0 WPUbits.WPU0 // bit 0, shadows bit in WPUbits
1716 #define WPUA1 WPUbits.WPUA1 // bit 1, shadows bit in WPUbits
1717 #define WPU1 WPUbits.WPU1 // bit 1, shadows bit in WPUbits
1718 #define WPUA2 WPUbits.WPUA2 // bit 2, shadows bit in WPUbits
1719 #define WPU2 WPUbits.WPU2 // bit 2, shadows bit in WPUbits
1720 #define WPUA4 WPUbits.WPUA4 // bit 4, shadows bit in WPUbits
1721 #define WPU4 WPUbits.WPU4 // bit 4, shadows bit in WPUbits
1722 #define WPUA5 WPUbits.WPUA5 // bit 5, shadows bit in WPUbits
1723 #define WPU5 WPUbits.WPU5 // bit 5, shadows bit in WPUbits
1724
1725 #endif // #ifndef NO_BIT_DEFINES
1726
1727 #endif // #ifndef __PIC16HV616_H__
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