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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16lf1455.h
blob9eb01d4a7ffe56823558b0f34fa08c51f2cda23f
1 /*
2 * This declarations of the PIC16LF1455 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:04 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16LF1455_H__
26 #define __PIC16LF1455_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTC_ADDR 0x000E
52 #define PIR1_ADDR 0x0011
53 #define PIR2_ADDR 0x0012
54 #define TMR0_ADDR 0x0015
55 #define TMR1_ADDR 0x0016
56 #define TMR1L_ADDR 0x0016
57 #define TMR1H_ADDR 0x0017
58 #define T1CON_ADDR 0x0018
59 #define T1GCON_ADDR 0x0019
60 #define TMR2_ADDR 0x001A
61 #define PR2_ADDR 0x001B
62 #define T2CON_ADDR 0x001C
63 #define TRISA_ADDR 0x008C
64 #define TRISC_ADDR 0x008E
65 #define PIE1_ADDR 0x0091
66 #define PIE2_ADDR 0x0092
67 #define OPTION_REG_ADDR 0x0095
68 #define PCON_ADDR 0x0096
69 #define WDTCON_ADDR 0x0097
70 #define OSCTUNE_ADDR 0x0098
71 #define OSCCON_ADDR 0x0099
72 #define OSCSTAT_ADDR 0x009A
73 #define ADRES_ADDR 0x009B
74 #define ADRESL_ADDR 0x009B
75 #define ADRESH_ADDR 0x009C
76 #define ADCON0_ADDR 0x009D
77 #define ADCON1_ADDR 0x009E
78 #define ADCON2_ADDR 0x009F
79 #define LATA_ADDR 0x010C
80 #define LATC_ADDR 0x010E
81 #define CM1CON0_ADDR 0x0111
82 #define CM1CON1_ADDR 0x0112
83 #define CM2CON0_ADDR 0x0113
84 #define CM2CON1_ADDR 0x0114
85 #define CMOUT_ADDR 0x0115
86 #define BORCON_ADDR 0x0116
87 #define FVRCON_ADDR 0x0117
88 #define DACCON0_ADDR 0x0118
89 #define DACCON1_ADDR 0x0119
90 #define APFCON_ADDR 0x011D
91 #define ANSELA_ADDR 0x018C
92 #define ANSELC_ADDR 0x018E
93 #define PMADR_ADDR 0x0191
94 #define PMADRL_ADDR 0x0191
95 #define PMADRH_ADDR 0x0192
96 #define PMDAT_ADDR 0x0193
97 #define PMDATL_ADDR 0x0193
98 #define PMDATH_ADDR 0x0194
99 #define PMCON1_ADDR 0x0195
100 #define PMCON2_ADDR 0x0196
101 #define RCREG_ADDR 0x0199
102 #define TXREG_ADDR 0x019A
103 #define SPBRG_ADDR 0x019B
104 #define SPBRGL_ADDR 0x019B
105 #define SPBRGH_ADDR 0x019C
106 #define RCSTA_ADDR 0x019D
107 #define TXSTA_ADDR 0x019E
108 #define BAUDCON_ADDR 0x019F
109 #define WPUA_ADDR 0x020C
110 #define SSP1BUF_ADDR 0x0211
111 #define SSPBUF_ADDR 0x0211
112 #define SSP1ADD_ADDR 0x0212
113 #define SSPADD_ADDR 0x0212
114 #define SSP1MSK_ADDR 0x0213
115 #define SSPMSK_ADDR 0x0213
116 #define SSP1STAT_ADDR 0x0214
117 #define SSPSTAT_ADDR 0x0214
118 #define SSP1CON1_ADDR 0x0215
119 #define SSPCON_ADDR 0x0215
120 #define SSPCON1_ADDR 0x0215
121 #define SSP1CON2_ADDR 0x0216
122 #define SSPCON2_ADDR 0x0216
123 #define SSP1CON3_ADDR 0x0217
124 #define SSPCON3_ADDR 0x0217
125 #define IOCAP_ADDR 0x0391
126 #define IOCAN_ADDR 0x0392
127 #define IOCAF_ADDR 0x0393
128 #define CLKRCON_ADDR 0x039A
129 #define ACTCON_ADDR 0x039B
130 #define PWM1DCL_ADDR 0x0611
131 #define PWM1DCH_ADDR 0x0612
132 #define PWM1CON_ADDR 0x0613
133 #define PWM1CON0_ADDR 0x0613
134 #define PWM2DCL_ADDR 0x0614
135 #define PWM2DCH_ADDR 0x0615
136 #define PWM2CON_ADDR 0x0616
137 #define PWM2CON0_ADDR 0x0616
138 #define CWG1DBR_ADDR 0x0691
139 #define CWG1DBF_ADDR 0x0692
140 #define CWG1CON0_ADDR 0x0693
141 #define CWG1CON1_ADDR 0x0694
142 #define CWG1CON2_ADDR 0x0695
143 #define UCON_ADDR 0x0E8E
144 #define USTAT_ADDR 0x0E8F
145 #define UIR_ADDR 0x0E90
146 #define UCFG_ADDR 0x0E91
147 #define UIE_ADDR 0x0E92
148 #define UEIR_ADDR 0x0E93
149 #define UFRM_ADDR 0x0E94
150 #define UFRMH_ADDR 0x0E94
151 #define UFRML_ADDR 0x0E95
152 #define UADDR_ADDR 0x0E96
153 #define UEIE_ADDR 0x0E97
154 #define UEP0_ADDR 0x0E98
155 #define UEP1_ADDR 0x0E99
156 #define UEP2_ADDR 0x0E9A
157 #define UEP3_ADDR 0x0E9B
158 #define UEP4_ADDR 0x0E9C
159 #define UEP5_ADDR 0x0E9D
160 #define UEP6_ADDR 0x0E9E
161 #define UEP7_ADDR 0x0E9F
162 #define STATUS_SHAD_ADDR 0x0FE4
163 #define WREG_SHAD_ADDR 0x0FE5
164 #define BSR_SHAD_ADDR 0x0FE6
165 #define PCLATH_SHAD_ADDR 0x0FE7
166 #define FSR0L_SHAD_ADDR 0x0FE8
167 #define FSR0H_SHAD_ADDR 0x0FE9
168 #define FSR1L_SHAD_ADDR 0x0FEA
169 #define FSR1H_SHAD_ADDR 0x0FEB
170 #define STKPTR_ADDR 0x0FED
171 #define TOSL_ADDR 0x0FEE
172 #define TOSH_ADDR 0x0FEF
173
174 #endif // #ifndef NO_ADDR_DEFINES
175
176 //==============================================================================
177 //
178 // Register Definitions
179 //
180 //==============================================================================
181
182 extern __at(0x0000) __sfr INDF0;
183 extern __at(0x0001) __sfr INDF1;
184 extern __at(0x0002) __sfr PCL;
185
186 //==============================================================================
187 // STATUS Bits
188
189 extern __at(0x0003) __sfr STATUS;
190
191 typedef struct
192 {
193 unsigned C : 1;
194 unsigned DC : 1;
195 unsigned Z : 1;
196 unsigned NOT_PD : 1;
197 unsigned NOT_TO : 1;
198 unsigned : 1;
199 unsigned : 1;
200 unsigned : 1;
201 } __STATUSbits_t;
202
203 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
204
205 #define _C 0x01
206 #define _DC 0x02
207 #define _Z 0x04
208 #define _NOT_PD 0x08
209 #define _NOT_TO 0x10
210
211 //==============================================================================
212
213 extern __at(0x0004) __sfr FSR0;
214 extern __at(0x0004) __sfr FSR0L;
215 extern __at(0x0005) __sfr FSR0H;
216 extern __at(0x0006) __sfr FSR1;
217 extern __at(0x0006) __sfr FSR1L;
218 extern __at(0x0007) __sfr FSR1H;
219
220 //==============================================================================
221 // BSR Bits
222
223 extern __at(0x0008) __sfr BSR;
224
225 typedef union
226 {
227 struct
228 {
229 unsigned BSR0 : 1;
230 unsigned BSR1 : 1;
231 unsigned BSR2 : 1;
232 unsigned BSR3 : 1;
233 unsigned BSR4 : 1;
234 unsigned : 1;
235 unsigned : 1;
236 unsigned : 1;
237 };
238
239 struct
240 {
241 unsigned BSR : 5;
242 unsigned : 3;
243 };
244 } __BSRbits_t;
245
246 extern __at(0x0008) volatile __BSRbits_t BSRbits;
247
248 #define _BSR0 0x01
249 #define _BSR1 0x02
250 #define _BSR2 0x04
251 #define _BSR3 0x08
252 #define _BSR4 0x10
253
254 //==============================================================================
255
256 extern __at(0x0009) __sfr WREG;
257 extern __at(0x000A) __sfr PCLATH;
258
259 //==============================================================================
260 // INTCON Bits
261
262 extern __at(0x000B) __sfr INTCON;
263
264 typedef union
265 {
266 struct
267 {
268 unsigned IOCIF : 1;
269 unsigned INTF : 1;
270 unsigned TMR0IF : 1;
271 unsigned IOCIE : 1;
272 unsigned INTE : 1;
273 unsigned TMR0IE : 1;
274 unsigned PEIE : 1;
275 unsigned GIE : 1;
276 };
277
278 struct
279 {
280 unsigned : 1;
281 unsigned : 1;
282 unsigned T0IF : 1;
283 unsigned : 1;
284 unsigned : 1;
285 unsigned T0IE : 1;
286 unsigned : 1;
287 unsigned : 1;
288 };
289 } __INTCONbits_t;
290
291 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
292
293 #define _IOCIF 0x01
294 #define _INTF 0x02
295 #define _TMR0IF 0x04
296 #define _T0IF 0x04
297 #define _IOCIE 0x08
298 #define _INTE 0x10
299 #define _TMR0IE 0x20
300 #define _T0IE 0x20
301 #define _PEIE 0x40
302 #define _GIE 0x80
303
304 //==============================================================================
305
306
307 //==============================================================================
308 // PORTA Bits
309
310 extern __at(0x000C) __sfr PORTA;
311
312 typedef struct
313 {
314 unsigned RA0 : 1;
315 unsigned RA1 : 1;
316 unsigned : 1;
317 unsigned RA3 : 1;
318 unsigned RA4 : 1;
319 unsigned RA5 : 1;
320 unsigned : 1;
321 unsigned : 1;
322 } __PORTAbits_t;
323
324 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
325
326 #define _RA0 0x01
327 #define _RA1 0x02
328 #define _RA3 0x08
329 #define _RA4 0x10
330 #define _RA5 0x20
331
332 //==============================================================================
333
334
335 //==============================================================================
336 // PORTC Bits
337
338 extern __at(0x000E) __sfr PORTC;
339
340 typedef union
341 {
342 struct
343 {
344 unsigned RC0 : 1;
345 unsigned RC1 : 1;
346 unsigned RC2 : 1;
347 unsigned RC3 : 1;
348 unsigned RC4 : 1;
349 unsigned RC5 : 1;
350 unsigned : 1;
351 unsigned : 1;
352 };
353
354 struct
355 {
356 unsigned RC : 6;
357 unsigned : 2;
358 };
359 } __PORTCbits_t;
360
361 extern __at(0x000E) volatile __PORTCbits_t PORTCbits;
362
363 #define _RC0 0x01
364 #define _RC1 0x02
365 #define _RC2 0x04
366 #define _RC3 0x08
367 #define _RC4 0x10
368 #define _RC5 0x20
369
370 //==============================================================================
371
372
373 //==============================================================================
374 // PIR1 Bits
375
376 extern __at(0x0011) __sfr PIR1;
377
378 typedef struct
379 {
380 unsigned TMR1IF : 1;
381 unsigned TMR2IF : 1;
382 unsigned : 1;
383 unsigned SSP1IF : 1;
384 unsigned TXIF : 1;
385 unsigned RCIF : 1;
386 unsigned ADIF : 1;
387 unsigned TMR1GIF : 1;
388 } __PIR1bits_t;
389
390 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
391
392 #define _TMR1IF 0x01
393 #define _TMR2IF 0x02
394 #define _SSP1IF 0x08
395 #define _TXIF 0x10
396 #define _RCIF 0x20
397 #define _ADIF 0x40
398 #define _TMR1GIF 0x80
399
400 //==============================================================================
401
402
403 //==============================================================================
404 // PIR2 Bits
405
406 extern __at(0x0012) __sfr PIR2;
407
408 typedef struct
409 {
410 unsigned : 1;
411 unsigned ACTIF : 1;
412 unsigned USBIF : 1;
413 unsigned BCL1IF : 1;
414 unsigned : 1;
415 unsigned C1IF : 1;
416 unsigned C2IF : 1;
417 unsigned OSFIF : 1;
418 } __PIR2bits_t;
419
420 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
421
422 #define _ACTIF 0x02
423 #define _USBIF 0x04
424 #define _BCL1IF 0x08
425 #define _C1IF 0x20
426 #define _C2IF 0x40
427 #define _OSFIF 0x80
428
429 //==============================================================================
430
431 extern __at(0x0015) __sfr TMR0;
432 extern __at(0x0016) __sfr TMR1;
433 extern __at(0x0016) __sfr TMR1L;
434 extern __at(0x0017) __sfr TMR1H;
435
436 //==============================================================================
437 // T1CON Bits
438
439 extern __at(0x0018) __sfr T1CON;
440
441 typedef union
442 {
443 struct
444 {
445 unsigned TMR1ON : 1;
446 unsigned : 1;
447 unsigned NOT_T1SYNC : 1;
448 unsigned T1OSCEN : 1;
449 unsigned T1CKPS0 : 1;
450 unsigned T1CKPS1 : 1;
451 unsigned TMR1CS0 : 1;
452 unsigned TMR1CS1 : 1;
453 };
454
455 struct
456 {
457 unsigned : 4;
458 unsigned T1CKPS : 2;
459 unsigned : 2;
460 };
461
462 struct
463 {
464 unsigned : 6;
465 unsigned TMR1CS : 2;
466 };
467 } __T1CONbits_t;
468
469 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
470
471 #define _TMR1ON 0x01
472 #define _NOT_T1SYNC 0x04
473 #define _T1OSCEN 0x08
474 #define _T1CKPS0 0x10
475 #define _T1CKPS1 0x20
476 #define _TMR1CS0 0x40
477 #define _TMR1CS1 0x80
478
479 //==============================================================================
480
481
482 //==============================================================================
483 // T1GCON Bits
484
485 extern __at(0x0019) __sfr T1GCON;
486
487 typedef union
488 {
489 struct
490 {
491 unsigned T1GSS0 : 1;
492 unsigned T1GSS1 : 1;
493 unsigned T1GVAL : 1;
494 unsigned T1GGO_NOT_DONE : 1;
495 unsigned T1GSPM : 1;
496 unsigned T1GTM : 1;
497 unsigned T1GPOL : 1;
498 unsigned TMR1GE : 1;
499 };
500
501 struct
502 {
503 unsigned T1GSS : 2;
504 unsigned : 6;
505 };
506 } __T1GCONbits_t;
507
508 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
509
510 #define _T1GSS0 0x01
511 #define _T1GSS1 0x02
512 #define _T1GVAL 0x04
513 #define _T1GGO_NOT_DONE 0x08
514 #define _T1GSPM 0x10
515 #define _T1GTM 0x20
516 #define _T1GPOL 0x40
517 #define _TMR1GE 0x80
518
519 //==============================================================================
520
521 extern __at(0x001A) __sfr TMR2;
522 extern __at(0x001B) __sfr PR2;
523
524 //==============================================================================
525 // T2CON Bits
526
527 extern __at(0x001C) __sfr T2CON;
528
529 typedef union
530 {
531 struct
532 {
533 unsigned T2CKPS0 : 1;
534 unsigned T2CKPS1 : 1;
535 unsigned TMR2ON : 1;
536 unsigned T2OUTPS0 : 1;
537 unsigned T2OUTPS1 : 1;
538 unsigned T2OUTPS2 : 1;
539 unsigned T2OUTPS3 : 1;
540 unsigned : 1;
541 };
542
543 struct
544 {
545 unsigned T2CKPS : 2;
546 unsigned : 6;
547 };
548
549 struct
550 {
551 unsigned : 3;
552 unsigned T2OUTPS : 4;
553 unsigned : 1;
554 };
555 } __T2CONbits_t;
556
557 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
558
559 #define _T2CKPS0 0x01
560 #define _T2CKPS1 0x02
561 #define _TMR2ON 0x04
562 #define _T2OUTPS0 0x08
563 #define _T2OUTPS1 0x10
564 #define _T2OUTPS2 0x20
565 #define _T2OUTPS3 0x40
566
567 //==============================================================================
568
569
570 //==============================================================================
571 // TRISA Bits
572
573 extern __at(0x008C) __sfr TRISA;
574
575 typedef struct
576 {
577 unsigned : 1;
578 unsigned : 1;
579 unsigned : 1;
580 unsigned : 1;
581 unsigned TRISA4 : 1;
582 unsigned TRISA5 : 1;
583 unsigned : 1;
584 unsigned : 1;
585 } __TRISAbits_t;
586
587 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
588
589 #define _TRISA4 0x10
590 #define _TRISA5 0x20
591
592 //==============================================================================
593
594
595 //==============================================================================
596 // TRISC Bits
597
598 extern __at(0x008E) __sfr TRISC;
599
600 typedef union
601 {
602 struct
603 {
604 unsigned TRISC0 : 1;
605 unsigned TRISC1 : 1;
606 unsigned TRISC2 : 1;
607 unsigned TRISC3 : 1;
608 unsigned TRISC4 : 1;
609 unsigned TRISC5 : 1;
610 unsigned : 1;
611 unsigned : 1;
612 };
613
614 struct
615 {
616 unsigned TRISC : 6;
617 unsigned : 2;
618 };
619 } __TRISCbits_t;
620
621 extern __at(0x008E) volatile __TRISCbits_t TRISCbits;
622
623 #define _TRISC0 0x01
624 #define _TRISC1 0x02
625 #define _TRISC2 0x04
626 #define _TRISC3 0x08
627 #define _TRISC4 0x10
628 #define _TRISC5 0x20
629
630 //==============================================================================
631
632
633 //==============================================================================
634 // PIE1 Bits
635
636 extern __at(0x0091) __sfr PIE1;
637
638 typedef struct
639 {
640 unsigned TMR1IE : 1;
641 unsigned TMR2IE : 1;
642 unsigned : 1;
643 unsigned SSP1IE : 1;
644 unsigned TXIE : 1;
645 unsigned RCIE : 1;
646 unsigned ADIE : 1;
647 unsigned TMR1GIE : 1;
648 } __PIE1bits_t;
649
650 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
651
652 #define _TMR1IE 0x01
653 #define _TMR2IE 0x02
654 #define _SSP1IE 0x08
655 #define _TXIE 0x10
656 #define _RCIE 0x20
657 #define _ADIE 0x40
658 #define _TMR1GIE 0x80
659
660 //==============================================================================
661
662
663 //==============================================================================
664 // PIE2 Bits
665
666 extern __at(0x0092) __sfr PIE2;
667
668 typedef struct
669 {
670 unsigned : 1;
671 unsigned ACTIE : 1;
672 unsigned USBIE : 1;
673 unsigned BCL1IE : 1;
674 unsigned : 1;
675 unsigned C1IE : 1;
676 unsigned C2IE : 1;
677 unsigned OSFIE : 1;
678 } __PIE2bits_t;
679
680 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
681
682 #define _ACTIE 0x02
683 #define _USBIE 0x04
684 #define _BCL1IE 0x08
685 #define _C1IE 0x20
686 #define _C2IE 0x40
687 #define _OSFIE 0x80
688
689 //==============================================================================
690
691
692 //==============================================================================
693 // OPTION_REG Bits
694
695 extern __at(0x0095) __sfr OPTION_REG;
696
697 typedef union
698 {
699 struct
700 {
701 unsigned PS0 : 1;
702 unsigned PS1 : 1;
703 unsigned PS2 : 1;
704 unsigned PSA : 1;
705 unsigned TMR0SE : 1;
706 unsigned TMR0CS : 1;
707 unsigned INTEDG : 1;
708 unsigned NOT_WPUEN : 1;
709 };
710
711 struct
712 {
713 unsigned : 1;
714 unsigned : 1;
715 unsigned : 1;
716 unsigned : 1;
717 unsigned T0SE : 1;
718 unsigned T0CS : 1;
719 unsigned : 1;
720 unsigned : 1;
721 };
722
723 struct
724 {
725 unsigned PS : 3;
726 unsigned : 5;
727 };
728 } __OPTION_REGbits_t;
729
730 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
731
732 #define _PS0 0x01
733 #define _PS1 0x02
734 #define _PS2 0x04
735 #define _PSA 0x08
736 #define _TMR0SE 0x10
737 #define _T0SE 0x10
738 #define _TMR0CS 0x20
739 #define _T0CS 0x20
740 #define _INTEDG 0x40
741 #define _NOT_WPUEN 0x80
742
743 //==============================================================================
744
745
746 //==============================================================================
747 // PCON Bits
748
749 extern __at(0x0096) __sfr PCON;
750
751 typedef struct
752 {
753 unsigned NOT_BOR : 1;
754 unsigned NOT_POR : 1;
755 unsigned NOT_RI : 1;
756 unsigned NOT_RMCLR : 1;
757 unsigned NOT_RWDT : 1;
758 unsigned : 1;
759 unsigned STKUNF : 1;
760 unsigned STKOVF : 1;
761 } __PCONbits_t;
762
763 extern __at(0x0096) volatile __PCONbits_t PCONbits;
764
765 #define _NOT_BOR 0x01
766 #define _NOT_POR 0x02
767 #define _NOT_RI 0x04
768 #define _NOT_RMCLR 0x08
769 #define _NOT_RWDT 0x10
770 #define _STKUNF 0x40
771 #define _STKOVF 0x80
772
773 //==============================================================================
774
775
776 //==============================================================================
777 // WDTCON Bits
778
779 extern __at(0x0097) __sfr WDTCON;
780
781 typedef union
782 {
783 struct
784 {
785 unsigned SWDTEN : 1;
786 unsigned WDTPS0 : 1;
787 unsigned WDTPS1 : 1;
788 unsigned WDTPS2 : 1;
789 unsigned WDTPS3 : 1;
790 unsigned WDTPS4 : 1;
791 unsigned : 1;
792 unsigned : 1;
793 };
794
795 struct
796 {
797 unsigned : 1;
798 unsigned WDTPS : 5;
799 unsigned : 2;
800 };
801 } __WDTCONbits_t;
802
803 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
804
805 #define _SWDTEN 0x01
806 #define _WDTPS0 0x02
807 #define _WDTPS1 0x04
808 #define _WDTPS2 0x08
809 #define _WDTPS3 0x10
810 #define _WDTPS4 0x20
811
812 //==============================================================================
813
814
815 //==============================================================================
816 // OSCTUNE Bits
817
818 extern __at(0x0098) __sfr OSCTUNE;
819
820 typedef union
821 {
822 struct
823 {
824 unsigned TUN0 : 1;
825 unsigned TUN1 : 1;
826 unsigned TUN2 : 1;
827 unsigned TUN3 : 1;
828 unsigned TUN4 : 1;
829 unsigned TUN5 : 1;
830 unsigned TUN6 : 1;
831 unsigned : 1;
832 };
833
834 struct
835 {
836 unsigned TUN : 7;
837 unsigned : 1;
838 };
839 } __OSCTUNEbits_t;
840
841 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
842
843 #define _TUN0 0x01
844 #define _TUN1 0x02
845 #define _TUN2 0x04
846 #define _TUN3 0x08
847 #define _TUN4 0x10
848 #define _TUN5 0x20
849 #define _TUN6 0x40
850
851 //==============================================================================
852
853
854 //==============================================================================
855 // OSCCON Bits
856
857 extern __at(0x0099) __sfr OSCCON;
858
859 typedef union
860 {
861 struct
862 {
863 unsigned SCS0 : 1;
864 unsigned SCS1 : 1;
865 unsigned IRCF0 : 1;
866 unsigned IRCF1 : 1;
867 unsigned IRCF2 : 1;
868 unsigned IRCF3 : 1;
869 unsigned SPLLMULT : 1;
870 unsigned SPLLEN : 1;
871 };
872
873 struct
874 {
875 unsigned SCS : 2;
876 unsigned : 6;
877 };
878
879 struct
880 {
881 unsigned : 2;
882 unsigned IRCF : 4;
883 unsigned : 2;
884 };
885 } __OSCCONbits_t;
886
887 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
888
889 #define _SCS0 0x01
890 #define _SCS1 0x02
891 #define _IRCF0 0x04
892 #define _IRCF1 0x08
893 #define _IRCF2 0x10
894 #define _IRCF3 0x20
895 #define _SPLLMULT 0x40
896 #define _SPLLEN 0x80
897
898 //==============================================================================
899
900
901 //==============================================================================
902 // OSCSTAT Bits
903
904 extern __at(0x009A) __sfr OSCSTAT;
905
906 typedef struct
907 {
908 unsigned HFIOFS : 1;
909 unsigned LFIOFR : 1;
910 unsigned : 1;
911 unsigned : 1;
912 unsigned HFIOFR : 1;
913 unsigned OSTS : 1;
914 unsigned PLLRDY : 1;
915 unsigned SOSCR : 1;
916 } __OSCSTATbits_t;
917
918 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
919
920 #define _HFIOFS 0x01
921 #define _LFIOFR 0x02
922 #define _HFIOFR 0x10
923 #define _OSTS 0x20
924 #define _PLLRDY 0x40
925 #define _SOSCR 0x80
926
927 //==============================================================================
928
929 extern __at(0x009B) __sfr ADRES;
930 extern __at(0x009B) __sfr ADRESL;
931 extern __at(0x009C) __sfr ADRESH;
932
933 //==============================================================================
934 // ADCON0 Bits
935
936 extern __at(0x009D) __sfr ADCON0;
937
938 typedef union
939 {
940 struct
941 {
942 unsigned ADON : 1;
943 unsigned GO_NOT_DONE : 1;
944 unsigned CHS0 : 1;
945 unsigned CHS1 : 1;
946 unsigned CHS2 : 1;
947 unsigned CHS3 : 1;
948 unsigned CHS4 : 1;
949 unsigned : 1;
950 };
951
952 struct
953 {
954 unsigned : 1;
955 unsigned ADGO : 1;
956 unsigned : 1;
957 unsigned : 1;
958 unsigned : 1;
959 unsigned : 1;
960 unsigned : 1;
961 unsigned : 1;
962 };
963
964 struct
965 {
966 unsigned : 1;
967 unsigned GO : 1;
968 unsigned : 1;
969 unsigned : 1;
970 unsigned : 1;
971 unsigned : 1;
972 unsigned : 1;
973 unsigned : 1;
974 };
975
976 struct
977 {
978 unsigned : 2;
979 unsigned CHS : 5;
980 unsigned : 1;
981 };
982 } __ADCON0bits_t;
983
984 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
985
986 #define _ADON 0x01
987 #define _GO_NOT_DONE 0x02
988 #define _ADGO 0x02
989 #define _GO 0x02
990 #define _CHS0 0x04
991 #define _CHS1 0x08
992 #define _CHS2 0x10
993 #define _CHS3 0x20
994 #define _CHS4 0x40
995
996 //==============================================================================
997
998
999 //==============================================================================
1000 // ADCON1 Bits
1001
1002 extern __at(0x009E) __sfr ADCON1;
1003
1004 typedef union
1005 {
1006 struct
1007 {
1008 unsigned ADPREF0 : 1;
1009 unsigned ADPREF1 : 1;
1010 unsigned : 1;
1011 unsigned : 1;
1012 unsigned ADCS0 : 1;
1013 unsigned ADCS1 : 1;
1014 unsigned ADCS2 : 1;
1015 unsigned ADFM : 1;
1016 };
1017
1018 struct
1019 {
1020 unsigned ADPREF : 2;
1021 unsigned : 6;
1022 };
1023
1024 struct
1025 {
1026 unsigned : 4;
1027 unsigned ADCS : 3;
1028 unsigned : 1;
1029 };
1030 } __ADCON1bits_t;
1031
1032 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1033
1034 #define _ADPREF0 0x01
1035 #define _ADPREF1 0x02
1036 #define _ADCS0 0x10
1037 #define _ADCS1 0x20
1038 #define _ADCS2 0x40
1039 #define _ADFM 0x80
1040
1041 //==============================================================================
1042
1043
1044 //==============================================================================
1045 // ADCON2 Bits
1046
1047 extern __at(0x009F) __sfr ADCON2;
1048
1049 typedef union
1050 {
1051 struct
1052 {
1053 unsigned : 1;
1054 unsigned : 1;
1055 unsigned : 1;
1056 unsigned : 1;
1057 unsigned TRIGSEL0 : 1;
1058 unsigned TRIGSEL1 : 1;
1059 unsigned TRIGSEL2 : 1;
1060 unsigned : 1;
1061 };
1062
1063 struct
1064 {
1065 unsigned : 4;
1066 unsigned TRIGSEL : 3;
1067 unsigned : 1;
1068 };
1069 } __ADCON2bits_t;
1070
1071 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1072
1073 #define _TRIGSEL0 0x10
1074 #define _TRIGSEL1 0x20
1075 #define _TRIGSEL2 0x40
1076
1077 //==============================================================================
1078
1079
1080 //==============================================================================
1081 // LATA Bits
1082
1083 extern __at(0x010C) __sfr LATA;
1084
1085 typedef struct
1086 {
1087 unsigned : 1;
1088 unsigned : 1;
1089 unsigned : 1;
1090 unsigned : 1;
1091 unsigned LATA4 : 1;
1092 unsigned LATA5 : 1;
1093 unsigned : 1;
1094 unsigned : 1;
1095 } __LATAbits_t;
1096
1097 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1098
1099 #define _LATA4 0x10
1100 #define _LATA5 0x20
1101
1102 //==============================================================================
1103
1104
1105 //==============================================================================
1106 // LATC Bits
1107
1108 extern __at(0x010E) __sfr LATC;
1109
1110 typedef union
1111 {
1112 struct
1113 {
1114 unsigned LATC0 : 1;
1115 unsigned LATC1 : 1;
1116 unsigned LATC2 : 1;
1117 unsigned LATC3 : 1;
1118 unsigned LATC4 : 1;
1119 unsigned LATC5 : 1;
1120 unsigned : 1;
1121 unsigned : 1;
1122 };
1123
1124 struct
1125 {
1126 unsigned LATC : 6;
1127 unsigned : 2;
1128 };
1129 } __LATCbits_t;
1130
1131 extern __at(0x010E) volatile __LATCbits_t LATCbits;
1132
1133 #define _LATC0 0x01
1134 #define _LATC1 0x02
1135 #define _LATC2 0x04
1136 #define _LATC3 0x08
1137 #define _LATC4 0x10
1138 #define _LATC5 0x20
1139
1140 //==============================================================================
1141
1142
1143 //==============================================================================
1144 // CM1CON0 Bits
1145
1146 extern __at(0x0111) __sfr CM1CON0;
1147
1148 typedef struct
1149 {
1150 unsigned C1SYNC : 1;
1151 unsigned C1HYS : 1;
1152 unsigned C1SP : 1;
1153 unsigned : 1;
1154 unsigned C1POL : 1;
1155 unsigned C1OE : 1;
1156 unsigned C1OUT : 1;
1157 unsigned C1ON : 1;
1158 } __CM1CON0bits_t;
1159
1160 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1161
1162 #define _C1SYNC 0x01
1163 #define _C1HYS 0x02
1164 #define _C1SP 0x04
1165 #define _C1POL 0x10
1166 #define _C1OE 0x20
1167 #define _C1OUT 0x40
1168 #define _C1ON 0x80
1169
1170 //==============================================================================
1171
1172
1173 //==============================================================================
1174 // CM1CON1 Bits
1175
1176 extern __at(0x0112) __sfr CM1CON1;
1177
1178 typedef union
1179 {
1180 struct
1181 {
1182 unsigned C1NCH0 : 1;
1183 unsigned C1NCH1 : 1;
1184 unsigned C1NCH2 : 1;
1185 unsigned : 1;
1186 unsigned C1PCH0 : 1;
1187 unsigned C1PCH1 : 1;
1188 unsigned C1INTN : 1;
1189 unsigned C1INTP : 1;
1190 };
1191
1192 struct
1193 {
1194 unsigned C1NCH : 3;
1195 unsigned : 5;
1196 };
1197
1198 struct
1199 {
1200 unsigned : 4;
1201 unsigned C1PCH : 2;
1202 unsigned : 2;
1203 };
1204 } __CM1CON1bits_t;
1205
1206 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1207
1208 #define _C1NCH0 0x01
1209 #define _C1NCH1 0x02
1210 #define _C1NCH2 0x04
1211 #define _C1PCH0 0x10
1212 #define _C1PCH1 0x20
1213 #define _C1INTN 0x40
1214 #define _C1INTP 0x80
1215
1216 //==============================================================================
1217
1218
1219 //==============================================================================
1220 // CM2CON0 Bits
1221
1222 extern __at(0x0113) __sfr CM2CON0;
1223
1224 typedef struct
1225 {
1226 unsigned C2SYNC : 1;
1227 unsigned C2HYS : 1;
1228 unsigned C2SP : 1;
1229 unsigned : 1;
1230 unsigned C2POL : 1;
1231 unsigned C2OE : 1;
1232 unsigned C2OUT : 1;
1233 unsigned C2ON : 1;
1234 } __CM2CON0bits_t;
1235
1236 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits;
1237
1238 #define _C2SYNC 0x01
1239 #define _C2HYS 0x02
1240 #define _C2SP 0x04
1241 #define _C2POL 0x10
1242 #define _C2OE 0x20
1243 #define _C2OUT 0x40
1244 #define _C2ON 0x80
1245
1246 //==============================================================================
1247
1248
1249 //==============================================================================
1250 // CM2CON1 Bits
1251
1252 extern __at(0x0114) __sfr CM2CON1;
1253
1254 typedef union
1255 {
1256 struct
1257 {
1258 unsigned C2NCH0 : 1;
1259 unsigned C2NCH1 : 1;
1260 unsigned C2NCH2 : 1;
1261 unsigned : 1;
1262 unsigned C2PCH0 : 1;
1263 unsigned C2PCH1 : 1;
1264 unsigned C2INTN : 1;
1265 unsigned C2INTP : 1;
1266 };
1267
1268 struct
1269 {
1270 unsigned C2NCH : 3;
1271 unsigned : 5;
1272 };
1273
1274 struct
1275 {
1276 unsigned : 4;
1277 unsigned C2PCH : 2;
1278 unsigned : 2;
1279 };
1280 } __CM2CON1bits_t;
1281
1282 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits;
1283
1284 #define _C2NCH0 0x01
1285 #define _C2NCH1 0x02
1286 #define _C2NCH2 0x04
1287 #define _C2PCH0 0x10
1288 #define _C2PCH1 0x20
1289 #define _C2INTN 0x40
1290 #define _C2INTP 0x80
1291
1292 //==============================================================================
1293
1294
1295 //==============================================================================
1296 // CMOUT Bits
1297
1298 extern __at(0x0115) __sfr CMOUT;
1299
1300 typedef struct
1301 {
1302 unsigned MC1OUT : 1;
1303 unsigned MC2OUT : 1;
1304 unsigned : 1;
1305 unsigned : 1;
1306 unsigned : 1;
1307 unsigned : 1;
1308 unsigned : 1;
1309 unsigned : 1;
1310 } __CMOUTbits_t;
1311
1312 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1313
1314 #define _MC1OUT 0x01
1315 #define _MC2OUT 0x02
1316
1317 //==============================================================================
1318
1319
1320 //==============================================================================
1321 // BORCON Bits
1322
1323 extern __at(0x0116) __sfr BORCON;
1324
1325 typedef struct
1326 {
1327 unsigned BORRDY : 1;
1328 unsigned : 1;
1329 unsigned : 1;
1330 unsigned : 1;
1331 unsigned : 1;
1332 unsigned : 1;
1333 unsigned BORFS : 1;
1334 unsigned SBOREN : 1;
1335 } __BORCONbits_t;
1336
1337 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1338
1339 #define _BORRDY 0x01
1340 #define _BORFS 0x40
1341 #define _SBOREN 0x80
1342
1343 //==============================================================================
1344
1345
1346 //==============================================================================
1347 // FVRCON Bits
1348
1349 extern __at(0x0117) __sfr FVRCON;
1350
1351 typedef union
1352 {
1353 struct
1354 {
1355 unsigned ADFVR0 : 1;
1356 unsigned ADFVR1 : 1;
1357 unsigned CDAFVR0 : 1;
1358 unsigned CDAFVR1 : 1;
1359 unsigned TSRNG : 1;
1360 unsigned TSEN : 1;
1361 unsigned FVRRDY : 1;
1362 unsigned FVREN : 1;
1363 };
1364
1365 struct
1366 {
1367 unsigned ADFVR : 2;
1368 unsigned : 6;
1369 };
1370
1371 struct
1372 {
1373 unsigned : 2;
1374 unsigned CDAFVR : 2;
1375 unsigned : 4;
1376 };
1377 } __FVRCONbits_t;
1378
1379 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1380
1381 #define _ADFVR0 0x01
1382 #define _ADFVR1 0x02
1383 #define _CDAFVR0 0x04
1384 #define _CDAFVR1 0x08
1385 #define _TSRNG 0x10
1386 #define _TSEN 0x20
1387 #define _FVRRDY 0x40
1388 #define _FVREN 0x80
1389
1390 //==============================================================================
1391
1392
1393 //==============================================================================
1394 // DACCON0 Bits
1395
1396 extern __at(0x0118) __sfr DACCON0;
1397
1398 typedef union
1399 {
1400 struct
1401 {
1402 unsigned : 1;
1403 unsigned : 1;
1404 unsigned D1PSS0 : 1;
1405 unsigned D1PSS1 : 1;
1406 unsigned DACOE2 : 1;
1407 unsigned DACOE1 : 1;
1408 unsigned : 1;
1409 unsigned DACEN : 1;
1410 };
1411
1412 struct
1413 {
1414 unsigned : 2;
1415 unsigned D1PSS : 2;
1416 unsigned : 4;
1417 };
1418 } __DACCON0bits_t;
1419
1420 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1421
1422 #define _D1PSS0 0x04
1423 #define _D1PSS1 0x08
1424 #define _DACOE2 0x10
1425 #define _DACOE1 0x20
1426 #define _DACEN 0x80
1427
1428 //==============================================================================
1429
1430
1431 //==============================================================================
1432 // DACCON1 Bits
1433
1434 extern __at(0x0119) __sfr DACCON1;
1435
1436 typedef union
1437 {
1438 struct
1439 {
1440 unsigned DACR0 : 1;
1441 unsigned DACR1 : 1;
1442 unsigned DACR2 : 1;
1443 unsigned DACR3 : 1;
1444 unsigned DACR4 : 1;
1445 unsigned : 1;
1446 unsigned : 1;
1447 unsigned : 1;
1448 };
1449
1450 struct
1451 {
1452 unsigned DACR : 5;
1453 unsigned : 3;
1454 };
1455 } __DACCON1bits_t;
1456
1457 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1458
1459 #define _DACR0 0x01
1460 #define _DACR1 0x02
1461 #define _DACR2 0x04
1462 #define _DACR3 0x08
1463 #define _DACR4 0x10
1464
1465 //==============================================================================
1466
1467
1468 //==============================================================================
1469 // APFCON Bits
1470
1471 extern __at(0x011D) __sfr APFCON;
1472
1473 typedef struct
1474 {
1475 unsigned : 1;
1476 unsigned : 1;
1477 unsigned P2SEL : 1;
1478 unsigned T1GSEL : 1;
1479 unsigned : 1;
1480 unsigned SSSEL : 1;
1481 unsigned SDOSEL : 1;
1482 unsigned CLKRSEL : 1;
1483 } __APFCONbits_t;
1484
1485 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1486
1487 #define _P2SEL 0x04
1488 #define _T1GSEL 0x08
1489 #define _SSSEL 0x20
1490 #define _SDOSEL 0x40
1491 #define _CLKRSEL 0x80
1492
1493 //==============================================================================
1494
1495
1496 //==============================================================================
1497 // ANSELA Bits
1498
1499 extern __at(0x018C) __sfr ANSELA;
1500
1501 typedef struct
1502 {
1503 unsigned : 1;
1504 unsigned : 1;
1505 unsigned : 1;
1506 unsigned : 1;
1507 unsigned ANSA4 : 1;
1508 unsigned : 1;
1509 unsigned : 1;
1510 unsigned : 1;
1511 } __ANSELAbits_t;
1512
1513 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1514
1515 #define _ANSA4 0x10
1516
1517 //==============================================================================
1518
1519
1520 //==============================================================================
1521 // ANSELC Bits
1522
1523 extern __at(0x018E) __sfr ANSELC;
1524
1525 typedef union
1526 {
1527 struct
1528 {
1529 unsigned ANSC0 : 1;
1530 unsigned ANSC1 : 1;
1531 unsigned ANSC2 : 1;
1532 unsigned ANSC3 : 1;
1533 unsigned : 1;
1534 unsigned : 1;
1535 unsigned : 1;
1536 unsigned : 1;
1537 };
1538
1539 struct
1540 {
1541 unsigned ANSC : 4;
1542 unsigned : 4;
1543 };
1544 } __ANSELCbits_t;
1545
1546 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
1547
1548 #define _ANSC0 0x01
1549 #define _ANSC1 0x02
1550 #define _ANSC2 0x04
1551 #define _ANSC3 0x08
1552
1553 //==============================================================================
1554
1555 extern __at(0x0191) __sfr PMADR;
1556 extern __at(0x0191) __sfr PMADRL;
1557 extern __at(0x0192) __sfr PMADRH;
1558 extern __at(0x0193) __sfr PMDAT;
1559 extern __at(0x0193) __sfr PMDATL;
1560 extern __at(0x0194) __sfr PMDATH;
1561
1562 //==============================================================================
1563 // PMCON1 Bits
1564
1565 extern __at(0x0195) __sfr PMCON1;
1566
1567 typedef struct
1568 {
1569 unsigned RD : 1;
1570 unsigned WR : 1;
1571 unsigned WREN : 1;
1572 unsigned WRERR : 1;
1573 unsigned FREE : 1;
1574 unsigned LWLO : 1;
1575 unsigned CFGS : 1;
1576 unsigned : 1;
1577 } __PMCON1bits_t;
1578
1579 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1580
1581 #define _RD 0x01
1582 #define _WR 0x02
1583 #define _WREN 0x04
1584 #define _WRERR 0x08
1585 #define _FREE 0x10
1586 #define _LWLO 0x20
1587 #define _CFGS 0x40
1588
1589 //==============================================================================
1590
1591 extern __at(0x0196) __sfr PMCON2;
1592 extern __at(0x0199) __sfr RCREG;
1593 extern __at(0x019A) __sfr TXREG;
1594 extern __at(0x019B) __sfr SPBRG;
1595 extern __at(0x019B) __sfr SPBRGL;
1596 extern __at(0x019C) __sfr SPBRGH;
1597
1598 //==============================================================================
1599 // RCSTA Bits
1600
1601 extern __at(0x019D) __sfr RCSTA;
1602
1603 typedef struct
1604 {
1605 unsigned RX9D : 1;
1606 unsigned OERR : 1;
1607 unsigned FERR : 1;
1608 unsigned ADDEN : 1;
1609 unsigned CREN : 1;
1610 unsigned SREN : 1;
1611 unsigned RX9 : 1;
1612 unsigned SPEN : 1;
1613 } __RCSTAbits_t;
1614
1615 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
1616
1617 #define _RX9D 0x01
1618 #define _OERR 0x02
1619 #define _FERR 0x04
1620 #define _ADDEN 0x08
1621 #define _CREN 0x10
1622 #define _SREN 0x20
1623 #define _RX9 0x40
1624 #define _SPEN 0x80
1625
1626 //==============================================================================
1627
1628
1629 //==============================================================================
1630 // TXSTA Bits
1631
1632 extern __at(0x019E) __sfr TXSTA;
1633
1634 typedef struct
1635 {
1636 unsigned TX9D : 1;
1637 unsigned TRMT : 1;
1638 unsigned BRGH : 1;
1639 unsigned SENDB : 1;
1640 unsigned SYNC : 1;
1641 unsigned TXEN : 1;
1642 unsigned TX9 : 1;
1643 unsigned CSRC : 1;
1644 } __TXSTAbits_t;
1645
1646 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
1647
1648 #define _TX9D 0x01
1649 #define _TRMT 0x02
1650 #define _BRGH 0x04
1651 #define _SENDB 0x08
1652 #define _SYNC 0x10
1653 #define _TXEN 0x20
1654 #define _TX9 0x40
1655 #define _CSRC 0x80
1656
1657 //==============================================================================
1658
1659
1660 //==============================================================================
1661 // BAUDCON Bits
1662
1663 extern __at(0x019F) __sfr BAUDCON;
1664
1665 typedef struct
1666 {
1667 unsigned ABDEN : 1;
1668 unsigned WUE : 1;
1669 unsigned : 1;
1670 unsigned BRG16 : 1;
1671 unsigned SCKP : 1;
1672 unsigned : 1;
1673 unsigned RCIDL : 1;
1674 unsigned ABDOVF : 1;
1675 } __BAUDCONbits_t;
1676
1677 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
1678
1679 #define _ABDEN 0x01
1680 #define _WUE 0x02
1681 #define _BRG16 0x08
1682 #define _SCKP 0x10
1683 #define _RCIDL 0x40
1684 #define _ABDOVF 0x80
1685
1686 //==============================================================================
1687
1688
1689 //==============================================================================
1690 // WPUA Bits
1691
1692 extern __at(0x020C) __sfr WPUA;
1693
1694 typedef struct
1695 {
1696 unsigned : 1;
1697 unsigned : 1;
1698 unsigned : 1;
1699 unsigned WPUA3 : 1;
1700 unsigned WPUA4 : 1;
1701 unsigned WPUA5 : 1;
1702 unsigned : 1;
1703 unsigned : 1;
1704 } __WPUAbits_t;
1705
1706 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1707
1708 #define _WPUA3 0x08
1709 #define _WPUA4 0x10
1710 #define _WPUA5 0x20
1711
1712 //==============================================================================
1713
1714 extern __at(0x0211) __sfr SSP1BUF;
1715 extern __at(0x0211) __sfr SSPBUF;
1716 extern __at(0x0212) __sfr SSP1ADD;
1717 extern __at(0x0212) __sfr SSPADD;
1718 extern __at(0x0213) __sfr SSP1MSK;
1719 extern __at(0x0213) __sfr SSPMSK;
1720
1721 //==============================================================================
1722 // SSP1STAT Bits
1723
1724 extern __at(0x0214) __sfr SSP1STAT;
1725
1726 typedef struct
1727 {
1728 unsigned BF : 1;
1729 unsigned UA : 1;
1730 unsigned R_NOT_W : 1;
1731 unsigned S : 1;
1732 unsigned P : 1;
1733 unsigned D_NOT_A : 1;
1734 unsigned CKE : 1;
1735 unsigned SMP : 1;
1736 } __SSP1STATbits_t;
1737
1738 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
1739
1740 #define _BF 0x01
1741 #define _UA 0x02
1742 #define _R_NOT_W 0x04
1743 #define _S 0x08
1744 #define _P 0x10
1745 #define _D_NOT_A 0x20
1746 #define _CKE 0x40
1747 #define _SMP 0x80
1748
1749 //==============================================================================
1750
1751
1752 //==============================================================================
1753 // SSPSTAT Bits
1754
1755 extern __at(0x0214) __sfr SSPSTAT;
1756
1757 typedef struct
1758 {
1759 unsigned BF : 1;
1760 unsigned UA : 1;
1761 unsigned R_NOT_W : 1;
1762 unsigned S : 1;
1763 unsigned P : 1;
1764 unsigned D_NOT_A : 1;
1765 unsigned CKE : 1;
1766 unsigned SMP : 1;
1767 } __SSPSTATbits_t;
1768
1769 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
1770
1771 #define _SSPSTAT_BF 0x01
1772 #define _SSPSTAT_UA 0x02
1773 #define _SSPSTAT_R_NOT_W 0x04
1774 #define _SSPSTAT_S 0x08
1775 #define _SSPSTAT_P 0x10
1776 #define _SSPSTAT_D_NOT_A 0x20
1777 #define _SSPSTAT_CKE 0x40
1778 #define _SSPSTAT_SMP 0x80
1779
1780 //==============================================================================
1781
1782
1783 //==============================================================================
1784 // SSP1CON1 Bits
1785
1786 extern __at(0x0215) __sfr SSP1CON1;
1787
1788 typedef union
1789 {
1790 struct
1791 {
1792 unsigned SSP1M0 : 1;
1793 unsigned SSP1M1 : 1;
1794 unsigned SSP1M2 : 1;
1795 unsigned SSP1M3 : 1;
1796 unsigned CKP : 1;
1797 unsigned SSPEN : 1;
1798 unsigned SSPOV : 1;
1799 unsigned WCOL : 1;
1800 };
1801
1802 struct
1803 {
1804 unsigned : 1;
1805 unsigned : 1;
1806 unsigned : 1;
1807 unsigned : 1;
1808 unsigned : 1;
1809 unsigned SSP1EN : 1;
1810 unsigned SSP1OV : 1;
1811 unsigned : 1;
1812 };
1813
1814 struct
1815 {
1816 unsigned SSP1M : 4;
1817 unsigned : 4;
1818 };
1819 } __SSP1CON1bits_t;
1820
1821 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
1822
1823 #define _SSP1M0 0x01
1824 #define _SSP1M1 0x02
1825 #define _SSP1M2 0x04
1826 #define _SSP1M3 0x08
1827 #define _CKP 0x10
1828 #define _SSPEN 0x20
1829 #define _SSP1EN 0x20
1830 #define _SSPOV 0x40
1831 #define _SSP1OV 0x40
1832 #define _WCOL 0x80
1833
1834 //==============================================================================
1835
1836
1837 //==============================================================================
1838 // SSPCON Bits
1839
1840 extern __at(0x0215) __sfr SSPCON;
1841
1842 typedef union
1843 {
1844 struct
1845 {
1846 unsigned SSP1M0 : 1;
1847 unsigned SSP1M1 : 1;
1848 unsigned SSP1M2 : 1;
1849 unsigned SSP1M3 : 1;
1850 unsigned CKP : 1;
1851 unsigned SSPEN : 1;
1852 unsigned SSPOV : 1;
1853 unsigned WCOL : 1;
1854 };
1855
1856 struct
1857 {
1858 unsigned : 1;
1859 unsigned : 1;
1860 unsigned : 1;
1861 unsigned : 1;
1862 unsigned : 1;
1863 unsigned SSP1EN : 1;
1864 unsigned SSP1OV : 1;
1865 unsigned : 1;
1866 };
1867
1868 struct
1869 {
1870 unsigned SSP1M : 4;
1871 unsigned : 4;
1872 };
1873 } __SSPCONbits_t;
1874
1875 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
1876
1877 #define _SSPCON_SSP1M0 0x01
1878 #define _SSPCON_SSP1M1 0x02
1879 #define _SSPCON_SSP1M2 0x04
1880 #define _SSPCON_SSP1M3 0x08
1881 #define _SSPCON_CKP 0x10
1882 #define _SSPCON_SSPEN 0x20
1883 #define _SSPCON_SSP1EN 0x20
1884 #define _SSPCON_SSPOV 0x40
1885 #define _SSPCON_SSP1OV 0x40
1886 #define _SSPCON_WCOL 0x80
1887
1888 //==============================================================================
1889
1890
1891 //==============================================================================
1892 // SSPCON1 Bits
1893
1894 extern __at(0x0215) __sfr SSPCON1;
1895
1896 typedef union
1897 {
1898 struct
1899 {
1900 unsigned SSP1M0 : 1;
1901 unsigned SSP1M1 : 1;
1902 unsigned SSP1M2 : 1;
1903 unsigned SSP1M3 : 1;
1904 unsigned CKP : 1;
1905 unsigned SSPEN : 1;
1906 unsigned SSPOV : 1;
1907 unsigned WCOL : 1;
1908 };
1909
1910 struct
1911 {
1912 unsigned : 1;
1913 unsigned : 1;
1914 unsigned : 1;
1915 unsigned : 1;
1916 unsigned : 1;
1917 unsigned SSP1EN : 1;
1918 unsigned SSP1OV : 1;
1919 unsigned : 1;
1920 };
1921
1922 struct
1923 {
1924 unsigned SSP1M : 4;
1925 unsigned : 4;
1926 };
1927 } __SSPCON1bits_t;
1928
1929 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
1930
1931 #define _SSPCON1_SSP1M0 0x01
1932 #define _SSPCON1_SSP1M1 0x02
1933 #define _SSPCON1_SSP1M2 0x04
1934 #define _SSPCON1_SSP1M3 0x08
1935 #define _SSPCON1_CKP 0x10
1936 #define _SSPCON1_SSPEN 0x20
1937 #define _SSPCON1_SSP1EN 0x20
1938 #define _SSPCON1_SSPOV 0x40
1939 #define _SSPCON1_SSP1OV 0x40
1940 #define _SSPCON1_WCOL 0x80
1941
1942 //==============================================================================
1943
1944
1945 //==============================================================================
1946 // SSP1CON2 Bits
1947
1948 extern __at(0x0216) __sfr SSP1CON2;
1949
1950 typedef struct
1951 {
1952 unsigned SEN : 1;
1953 unsigned RSEN : 1;
1954 unsigned PEN : 1;
1955 unsigned RCEN : 1;
1956 unsigned ACKEN : 1;
1957 unsigned ACKDT : 1;
1958 unsigned ACKSTAT : 1;
1959 unsigned GCEN : 1;
1960 } __SSP1CON2bits_t;
1961
1962 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
1963
1964 #define _SEN 0x01
1965 #define _RSEN 0x02
1966 #define _PEN 0x04
1967 #define _RCEN 0x08
1968 #define _ACKEN 0x10
1969 #define _ACKDT 0x20
1970 #define _ACKSTAT 0x40
1971 #define _GCEN 0x80
1972
1973 //==============================================================================
1974
1975
1976 //==============================================================================
1977 // SSPCON2 Bits
1978
1979 extern __at(0x0216) __sfr SSPCON2;
1980
1981 typedef struct
1982 {
1983 unsigned SEN : 1;
1984 unsigned RSEN : 1;
1985 unsigned PEN : 1;
1986 unsigned RCEN : 1;
1987 unsigned ACKEN : 1;
1988 unsigned ACKDT : 1;
1989 unsigned ACKSTAT : 1;
1990 unsigned GCEN : 1;
1991 } __SSPCON2bits_t;
1992
1993 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
1994
1995 #define _SSPCON2_SEN 0x01
1996 #define _SSPCON2_RSEN 0x02
1997 #define _SSPCON2_PEN 0x04
1998 #define _SSPCON2_RCEN 0x08
1999 #define _SSPCON2_ACKEN 0x10
2000 #define _SSPCON2_ACKDT 0x20
2001 #define _SSPCON2_ACKSTAT 0x40
2002 #define _SSPCON2_GCEN 0x80
2003
2004 //==============================================================================
2005
2006
2007 //==============================================================================
2008 // SSP1CON3 Bits
2009
2010 extern __at(0x0217) __sfr SSP1CON3;
2011
2012 typedef struct
2013 {
2014 unsigned DHEN : 1;
2015 unsigned AHEN : 1;
2016 unsigned SBCDE : 1;
2017 unsigned SDAHT : 1;
2018 unsigned BOEN : 1;
2019 unsigned SCIE : 1;
2020 unsigned PCIE : 1;
2021 unsigned ACKTIM : 1;
2022 } __SSP1CON3bits_t;
2023
2024 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
2025
2026 #define _DHEN 0x01
2027 #define _AHEN 0x02
2028 #define _SBCDE 0x04
2029 #define _SDAHT 0x08
2030 #define _BOEN 0x10
2031 #define _SCIE 0x20
2032 #define _PCIE 0x40
2033 #define _ACKTIM 0x80
2034
2035 //==============================================================================
2036
2037
2038 //==============================================================================
2039 // SSPCON3 Bits
2040
2041 extern __at(0x0217) __sfr SSPCON3;
2042
2043 typedef struct
2044 {
2045 unsigned DHEN : 1;
2046 unsigned AHEN : 1;
2047 unsigned SBCDE : 1;
2048 unsigned SDAHT : 1;
2049 unsigned BOEN : 1;
2050 unsigned SCIE : 1;
2051 unsigned PCIE : 1;
2052 unsigned ACKTIM : 1;
2053 } __SSPCON3bits_t;
2054
2055 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
2056
2057 #define _SSPCON3_DHEN 0x01
2058 #define _SSPCON3_AHEN 0x02
2059 #define _SSPCON3_SBCDE 0x04
2060 #define _SSPCON3_SDAHT 0x08
2061 #define _SSPCON3_BOEN 0x10
2062 #define _SSPCON3_SCIE 0x20
2063 #define _SSPCON3_PCIE 0x40
2064 #define _SSPCON3_ACKTIM 0x80
2065
2066 //==============================================================================
2067
2068
2069 //==============================================================================
2070 // IOCAP Bits
2071
2072 extern __at(0x0391) __sfr IOCAP;
2073
2074 typedef struct
2075 {
2076 unsigned IOCAP0 : 1;
2077 unsigned IOCAP1 : 1;
2078 unsigned : 1;
2079 unsigned IOCAP3 : 1;
2080 unsigned IOCAP4 : 1;
2081 unsigned IOCAP5 : 1;
2082 unsigned : 1;
2083 unsigned : 1;
2084 } __IOCAPbits_t;
2085
2086 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
2087
2088 #define _IOCAP0 0x01
2089 #define _IOCAP1 0x02
2090 #define _IOCAP3 0x08
2091 #define _IOCAP4 0x10
2092 #define _IOCAP5 0x20
2093
2094 //==============================================================================
2095
2096
2097 //==============================================================================
2098 // IOCAN Bits
2099
2100 extern __at(0x0392) __sfr IOCAN;
2101
2102 typedef struct
2103 {
2104 unsigned IOCAN0 : 1;
2105 unsigned IOCAN1 : 1;
2106 unsigned : 1;
2107 unsigned IOCAN3 : 1;
2108 unsigned IOCAN4 : 1;
2109 unsigned IOCAN5 : 1;
2110 unsigned : 1;
2111 unsigned : 1;
2112 } __IOCANbits_t;
2113
2114 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
2115
2116 #define _IOCAN0 0x01
2117 #define _IOCAN1 0x02
2118 #define _IOCAN3 0x08
2119 #define _IOCAN4 0x10
2120 #define _IOCAN5 0x20
2121
2122 //==============================================================================
2123
2124
2125 //==============================================================================
2126 // IOCAF Bits
2127
2128 extern __at(0x0393) __sfr IOCAF;
2129
2130 typedef struct
2131 {
2132 unsigned IOCAF0 : 1;
2133 unsigned IOCAF1 : 1;
2134 unsigned : 1;
2135 unsigned IOCAF3 : 1;
2136 unsigned IOCAF4 : 1;
2137 unsigned IOCAF5 : 1;
2138 unsigned : 1;
2139 unsigned : 1;
2140 } __IOCAFbits_t;
2141
2142 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
2143
2144 #define _IOCAF0 0x01
2145 #define _IOCAF1 0x02
2146 #define _IOCAF3 0x08
2147 #define _IOCAF4 0x10
2148 #define _IOCAF5 0x20
2149
2150 //==============================================================================
2151
2152
2153 //==============================================================================
2154 // CLKRCON Bits
2155
2156 extern __at(0x039A) __sfr CLKRCON;
2157
2158 typedef union
2159 {
2160 struct
2161 {
2162 unsigned CLKRDIV0 : 1;
2163 unsigned CLKRDIV1 : 1;
2164 unsigned CLKRDIV2 : 1;
2165 unsigned CLKRCD0 : 1;
2166 unsigned CLKRCD1 : 1;
2167 unsigned CLKRSLR : 1;
2168 unsigned CLKROE : 1;
2169 unsigned CLKREN : 1;
2170 };
2171
2172 struct
2173 {
2174 unsigned CLKRDIV : 3;
2175 unsigned : 5;
2176 };
2177
2178 struct
2179 {
2180 unsigned : 3;
2181 unsigned CLKRCD : 2;
2182 unsigned : 3;
2183 };
2184 } __CLKRCONbits_t;
2185
2186 extern __at(0x039A) volatile __CLKRCONbits_t CLKRCONbits;
2187
2188 #define _CLKRDIV0 0x01
2189 #define _CLKRDIV1 0x02
2190 #define _CLKRDIV2 0x04
2191 #define _CLKRCD0 0x08
2192 #define _CLKRCD1 0x10
2193 #define _CLKRSLR 0x20
2194 #define _CLKROE 0x40
2195 #define _CLKREN 0x80
2196
2197 //==============================================================================
2198
2199
2200 //==============================================================================
2201 // ACTCON Bits
2202
2203 extern __at(0x039B) __sfr ACTCON;
2204
2205 typedef struct
2206 {
2207 unsigned : 1;
2208 unsigned ACTORS : 1;
2209 unsigned : 1;
2210 unsigned ACTLOCK : 1;
2211 unsigned ACTSRC : 1;
2212 unsigned : 1;
2213 unsigned ACTUD : 1;
2214 unsigned ACTEN : 1;
2215 } __ACTCONbits_t;
2216
2217 extern __at(0x039B) volatile __ACTCONbits_t ACTCONbits;
2218
2219 #define _ACTORS 0x02
2220 #define _ACTLOCK 0x08
2221 #define _ACTSRC 0x10
2222 #define _ACTUD 0x40
2223 #define _ACTEN 0x80
2224
2225 //==============================================================================
2226
2227
2228 //==============================================================================
2229 // PWM1DCL Bits
2230
2231 extern __at(0x0611) __sfr PWM1DCL;
2232
2233 typedef union
2234 {
2235 struct
2236 {
2237 unsigned : 1;
2238 unsigned : 1;
2239 unsigned : 1;
2240 unsigned : 1;
2241 unsigned : 1;
2242 unsigned : 1;
2243 unsigned PWM1DCL0 : 1;
2244 unsigned PWM1DCL1 : 1;
2245 };
2246
2247 struct
2248 {
2249 unsigned : 6;
2250 unsigned PWM1DCL : 2;
2251 };
2252 } __PWM1DCLbits_t;
2253
2254 extern __at(0x0611) volatile __PWM1DCLbits_t PWM1DCLbits;
2255
2256 #define _PWM1DCL0 0x40
2257 #define _PWM1DCL1 0x80
2258
2259 //==============================================================================
2260
2261
2262 //==============================================================================
2263 // PWM1DCH Bits
2264
2265 extern __at(0x0612) __sfr PWM1DCH;
2266
2267 typedef struct
2268 {
2269 unsigned PWM1DCH0 : 1;
2270 unsigned PWM1DCH1 : 1;
2271 unsigned PWM1DCH2 : 1;
2272 unsigned PWM1DCH3 : 1;
2273 unsigned PWM1DCH4 : 1;
2274 unsigned PWM1DCH5 : 1;
2275 unsigned PWM1DCH6 : 1;
2276 unsigned PWM1DCH7 : 1;
2277 } __PWM1DCHbits_t;
2278
2279 extern __at(0x0612) volatile __PWM1DCHbits_t PWM1DCHbits;
2280
2281 #define _PWM1DCH0 0x01
2282 #define _PWM1DCH1 0x02
2283 #define _PWM1DCH2 0x04
2284 #define _PWM1DCH3 0x08
2285 #define _PWM1DCH4 0x10
2286 #define _PWM1DCH5 0x20
2287 #define _PWM1DCH6 0x40
2288 #define _PWM1DCH7 0x80
2289
2290 //==============================================================================
2291
2292
2293 //==============================================================================
2294 // PWM1CON Bits
2295
2296 extern __at(0x0613) __sfr PWM1CON;
2297
2298 typedef struct
2299 {
2300 unsigned : 1;
2301 unsigned : 1;
2302 unsigned : 1;
2303 unsigned : 1;
2304 unsigned PWM1POL : 1;
2305 unsigned PWM1OUT : 1;
2306 unsigned PWM1OE : 1;
2307 unsigned PWM1EN : 1;
2308 } __PWM1CONbits_t;
2309
2310 extern __at(0x0613) volatile __PWM1CONbits_t PWM1CONbits;
2311
2312 #define _PWM1POL 0x10
2313 #define _PWM1OUT 0x20
2314 #define _PWM1OE 0x40
2315 #define _PWM1EN 0x80
2316
2317 //==============================================================================
2318
2319
2320 //==============================================================================
2321 // PWM1CON0 Bits
2322
2323 extern __at(0x0613) __sfr PWM1CON0;
2324
2325 typedef struct
2326 {
2327 unsigned : 1;
2328 unsigned : 1;
2329 unsigned : 1;
2330 unsigned : 1;
2331 unsigned PWM1POL : 1;
2332 unsigned PWM1OUT : 1;
2333 unsigned PWM1OE : 1;
2334 unsigned PWM1EN : 1;
2335 } __PWM1CON0bits_t;
2336
2337 extern __at(0x0613) volatile __PWM1CON0bits_t PWM1CON0bits;
2338
2339 #define _PWM1CON0_PWM1POL 0x10
2340 #define _PWM1CON0_PWM1OUT 0x20
2341 #define _PWM1CON0_PWM1OE 0x40
2342 #define _PWM1CON0_PWM1EN 0x80
2343
2344 //==============================================================================
2345
2346
2347 //==============================================================================
2348 // PWM2DCL Bits
2349
2350 extern __at(0x0614) __sfr PWM2DCL;
2351
2352 typedef union
2353 {
2354 struct
2355 {
2356 unsigned : 1;
2357 unsigned : 1;
2358 unsigned : 1;
2359 unsigned : 1;
2360 unsigned : 1;
2361 unsigned : 1;
2362 unsigned PWM2DCL0 : 1;
2363 unsigned PWM2DCL1 : 1;
2364 };
2365
2366 struct
2367 {
2368 unsigned : 6;
2369 unsigned PWM2DCL : 2;
2370 };
2371 } __PWM2DCLbits_t;
2372
2373 extern __at(0x0614) volatile __PWM2DCLbits_t PWM2DCLbits;
2374
2375 #define _PWM2DCL0 0x40
2376 #define _PWM2DCL1 0x80
2377
2378 //==============================================================================
2379
2380
2381 //==============================================================================
2382 // PWM2DCH Bits
2383
2384 extern __at(0x0615) __sfr PWM2DCH;
2385
2386 typedef struct
2387 {
2388 unsigned PWM2DCH0 : 1;
2389 unsigned PWM2DCH1 : 1;
2390 unsigned PWM2DCH2 : 1;
2391 unsigned PWM2DCH3 : 1;
2392 unsigned PWM2DCH4 : 1;
2393 unsigned PWM2DCH5 : 1;
2394 unsigned PWM2DCH6 : 1;
2395 unsigned PWM2DCH7 : 1;
2396 } __PWM2DCHbits_t;
2397
2398 extern __at(0x0615) volatile __PWM2DCHbits_t PWM2DCHbits;
2399
2400 #define _PWM2DCH0 0x01
2401 #define _PWM2DCH1 0x02
2402 #define _PWM2DCH2 0x04
2403 #define _PWM2DCH3 0x08
2404 #define _PWM2DCH4 0x10
2405 #define _PWM2DCH5 0x20
2406 #define _PWM2DCH6 0x40
2407 #define _PWM2DCH7 0x80
2408
2409 //==============================================================================
2410
2411
2412 //==============================================================================
2413 // PWM2CON Bits
2414
2415 extern __at(0x0616) __sfr PWM2CON;
2416
2417 typedef struct
2418 {
2419 unsigned : 1;
2420 unsigned : 1;
2421 unsigned : 1;
2422 unsigned : 1;
2423 unsigned PWM2POL : 1;
2424 unsigned PWM2OUT : 1;
2425 unsigned PWM2OE : 1;
2426 unsigned PWM2EN : 1;
2427 } __PWM2CONbits_t;
2428
2429 extern __at(0x0616) volatile __PWM2CONbits_t PWM2CONbits;
2430
2431 #define _PWM2POL 0x10
2432 #define _PWM2OUT 0x20
2433 #define _PWM2OE 0x40
2434 #define _PWM2EN 0x80
2435
2436 //==============================================================================
2437
2438
2439 //==============================================================================
2440 // PWM2CON0 Bits
2441
2442 extern __at(0x0616) __sfr PWM2CON0;
2443
2444 typedef struct
2445 {
2446 unsigned : 1;
2447 unsigned : 1;
2448 unsigned : 1;
2449 unsigned : 1;
2450 unsigned PWM2POL : 1;
2451 unsigned PWM2OUT : 1;
2452 unsigned PWM2OE : 1;
2453 unsigned PWM2EN : 1;
2454 } __PWM2CON0bits_t;
2455
2456 extern __at(0x0616) volatile __PWM2CON0bits_t PWM2CON0bits;
2457
2458 #define _PWM2CON0_PWM2POL 0x10
2459 #define _PWM2CON0_PWM2OUT 0x20
2460 #define _PWM2CON0_PWM2OE 0x40
2461 #define _PWM2CON0_PWM2EN 0x80
2462
2463 //==============================================================================
2464
2465
2466 //==============================================================================
2467 // CWG1DBR Bits
2468
2469 extern __at(0x0691) __sfr CWG1DBR;
2470
2471 typedef union
2472 {
2473 struct
2474 {
2475 unsigned CWG1DBR0 : 1;
2476 unsigned CWG1DBR1 : 1;
2477 unsigned CWG1DBR2 : 1;
2478 unsigned CWG1DBR3 : 1;
2479 unsigned CWG1DBR4 : 1;
2480 unsigned CWG1DBR5 : 1;
2481 unsigned : 1;
2482 unsigned : 1;
2483 };
2484
2485 struct
2486 {
2487 unsigned CWG1DBR : 6;
2488 unsigned : 2;
2489 };
2490 } __CWG1DBRbits_t;
2491
2492 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
2493
2494 #define _CWG1DBR0 0x01
2495 #define _CWG1DBR1 0x02
2496 #define _CWG1DBR2 0x04
2497 #define _CWG1DBR3 0x08
2498 #define _CWG1DBR4 0x10
2499 #define _CWG1DBR5 0x20
2500
2501 //==============================================================================
2502
2503
2504 //==============================================================================
2505 // CWG1DBF Bits
2506
2507 extern __at(0x0692) __sfr CWG1DBF;
2508
2509 typedef union
2510 {
2511 struct
2512 {
2513 unsigned CWG1DBF0 : 1;
2514 unsigned CWG1DBF1 : 1;
2515 unsigned CWG1DBF2 : 1;
2516 unsigned CWG1DBF3 : 1;
2517 unsigned CWG1DBF4 : 1;
2518 unsigned CWG1DBF5 : 1;
2519 unsigned : 1;
2520 unsigned : 1;
2521 };
2522
2523 struct
2524 {
2525 unsigned CWG1DBF : 6;
2526 unsigned : 2;
2527 };
2528 } __CWG1DBFbits_t;
2529
2530 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
2531
2532 #define _CWG1DBF0 0x01
2533 #define _CWG1DBF1 0x02
2534 #define _CWG1DBF2 0x04
2535 #define _CWG1DBF3 0x08
2536 #define _CWG1DBF4 0x10
2537 #define _CWG1DBF5 0x20
2538
2539 //==============================================================================
2540
2541
2542 //==============================================================================
2543 // CWG1CON0 Bits
2544
2545 extern __at(0x0693) __sfr CWG1CON0;
2546
2547 typedef struct
2548 {
2549 unsigned G1CS0 : 1;
2550 unsigned : 1;
2551 unsigned : 1;
2552 unsigned G1POLA : 1;
2553 unsigned G1POLB : 1;
2554 unsigned G1OEA : 1;
2555 unsigned G1OEB : 1;
2556 unsigned G1EN : 1;
2557 } __CWG1CON0bits_t;
2558
2559 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
2560
2561 #define _G1CS0 0x01
2562 #define _G1POLA 0x08
2563 #define _G1POLB 0x10
2564 #define _G1OEA 0x20
2565 #define _G1OEB 0x40
2566 #define _G1EN 0x80
2567
2568 //==============================================================================
2569
2570
2571 //==============================================================================
2572 // CWG1CON1 Bits
2573
2574 extern __at(0x0694) __sfr CWG1CON1;
2575
2576 typedef union
2577 {
2578 struct
2579 {
2580 unsigned G1IS0 : 1;
2581 unsigned G1IS1 : 1;
2582 unsigned : 1;
2583 unsigned : 1;
2584 unsigned G1ASDLA0 : 1;
2585 unsigned G1ASDLA1 : 1;
2586 unsigned G1ASDLB0 : 1;
2587 unsigned G1ASDLB1 : 1;
2588 };
2589
2590 struct
2591 {
2592 unsigned G1IS : 2;
2593 unsigned : 6;
2594 };
2595
2596 struct
2597 {
2598 unsigned : 4;
2599 unsigned G1ASDLA : 2;
2600 unsigned : 2;
2601 };
2602
2603 struct
2604 {
2605 unsigned : 6;
2606 unsigned G1ASDLB : 2;
2607 };
2608 } __CWG1CON1bits_t;
2609
2610 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
2611
2612 #define _G1IS0 0x01
2613 #define _G1IS1 0x02
2614 #define _G1ASDLA0 0x10
2615 #define _G1ASDLA1 0x20
2616 #define _G1ASDLB0 0x40
2617 #define _G1ASDLB1 0x80
2618
2619 //==============================================================================
2620
2621
2622 //==============================================================================
2623 // CWG1CON2 Bits
2624
2625 extern __at(0x0695) __sfr CWG1CON2;
2626
2627 typedef struct
2628 {
2629 unsigned : 1;
2630 unsigned G1ASDSFLT : 1;
2631 unsigned G1ASDSC1 : 1;
2632 unsigned G1ASDSC2 : 1;
2633 unsigned : 1;
2634 unsigned : 1;
2635 unsigned G1ARSEN : 1;
2636 unsigned G1ASE : 1;
2637 } __CWG1CON2bits_t;
2638
2639 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
2640
2641 #define _G1ASDSFLT 0x02
2642 #define _G1ASDSC1 0x04
2643 #define _G1ASDSC2 0x08
2644 #define _G1ARSEN 0x40
2645 #define _G1ASE 0x80
2646
2647 //==============================================================================
2648
2649
2650 //==============================================================================
2651 // UCON Bits
2652
2653 extern __at(0x0E8E) __sfr UCON;
2654
2655 typedef struct
2656 {
2657 unsigned : 1;
2658 unsigned SUSPND : 1;
2659 unsigned RESUME : 1;
2660 unsigned USBEN : 1;
2661 unsigned PKTDIS : 1;
2662 unsigned SE0 : 1;
2663 unsigned PPBRST : 1;
2664 unsigned : 1;
2665 } __UCONbits_t;
2666
2667 extern __at(0x0E8E) volatile __UCONbits_t UCONbits;
2668
2669 #define _SUSPND 0x02
2670 #define _RESUME 0x04
2671 #define _USBEN 0x08
2672 #define _PKTDIS 0x10
2673 #define _SE0 0x20
2674 #define _PPBRST 0x40
2675
2676 //==============================================================================
2677
2678
2679 //==============================================================================
2680 // USTAT Bits
2681
2682 extern __at(0x0E8F) __sfr USTAT;
2683
2684 typedef union
2685 {
2686 struct
2687 {
2688 unsigned : 1;
2689 unsigned PPBI : 1;
2690 unsigned DIR : 1;
2691 unsigned ENDP0 : 1;
2692 unsigned ENDP1 : 1;
2693 unsigned ENDP2 : 1;
2694 unsigned ENDP3 : 1;
2695 unsigned : 1;
2696 };
2697
2698 struct
2699 {
2700 unsigned : 3;
2701 unsigned ENDP : 4;
2702 unsigned : 1;
2703 };
2704 } __USTATbits_t;
2705
2706 extern __at(0x0E8F) volatile __USTATbits_t USTATbits;
2707
2708 #define _PPBI 0x02
2709 #define _DIR 0x04
2710 #define _ENDP0 0x08
2711 #define _ENDP1 0x10
2712 #define _ENDP2 0x20
2713 #define _ENDP3 0x40
2714
2715 //==============================================================================
2716
2717
2718 //==============================================================================
2719 // UIR Bits
2720
2721 extern __at(0x0E90) __sfr UIR;
2722
2723 typedef struct
2724 {
2725 unsigned URSTIF : 1;
2726 unsigned UERRIF : 1;
2727 unsigned ACTVIF : 1;
2728 unsigned TRNIF : 1;
2729 unsigned IDLEIF : 1;
2730 unsigned STALLIF : 1;
2731 unsigned SOFIF : 1;
2732 unsigned : 1;
2733 } __UIRbits_t;
2734
2735 extern __at(0x0E90) volatile __UIRbits_t UIRbits;
2736
2737 #define _URSTIF 0x01
2738 #define _UERRIF 0x02
2739 #define _ACTVIF 0x04
2740 #define _TRNIF 0x08
2741 #define _IDLEIF 0x10
2742 #define _STALLIF 0x20
2743 #define _SOFIF 0x40
2744
2745 //==============================================================================
2746
2747
2748 //==============================================================================
2749 // UCFG Bits
2750
2751 extern __at(0x0E91) __sfr UCFG;
2752
2753 typedef union
2754 {
2755 struct
2756 {
2757 unsigned PPB0 : 1;
2758 unsigned PPB1 : 1;
2759 unsigned FSEN : 1;
2760 unsigned : 1;
2761 unsigned UPUEN : 1;
2762 unsigned : 1;
2763 unsigned : 1;
2764 unsigned UTEYE : 1;
2765 };
2766
2767 struct
2768 {
2769 unsigned PPB : 2;
2770 unsigned : 6;
2771 };
2772 } __UCFGbits_t;
2773
2774 extern __at(0x0E91) volatile __UCFGbits_t UCFGbits;
2775
2776 #define _PPB0 0x01
2777 #define _PPB1 0x02
2778 #define _FSEN 0x04
2779 #define _UPUEN 0x10
2780 #define _UTEYE 0x80
2781
2782 //==============================================================================
2783
2784
2785 //==============================================================================
2786 // UIE Bits
2787
2788 extern __at(0x0E92) __sfr UIE;
2789
2790 typedef struct
2791 {
2792 unsigned URSTIE : 1;
2793 unsigned UERRIE : 1;
2794 unsigned ACTVIE : 1;
2795 unsigned TRNIE : 1;
2796 unsigned IDLEIE : 1;
2797 unsigned STALLIE : 1;
2798 unsigned SOFIE : 1;
2799 unsigned : 1;
2800 } __UIEbits_t;
2801
2802 extern __at(0x0E92) volatile __UIEbits_t UIEbits;
2803
2804 #define _URSTIE 0x01
2805 #define _UERRIE 0x02
2806 #define _ACTVIE 0x04
2807 #define _TRNIE 0x08
2808 #define _IDLEIE 0x10
2809 #define _STALLIE 0x20
2810 #define _SOFIE 0x40
2811
2812 //==============================================================================
2813
2814
2815 //==============================================================================
2816 // UEIR Bits
2817
2818 extern __at(0x0E93) __sfr UEIR;
2819
2820 typedef struct
2821 {
2822 unsigned PIDEF : 1;
2823 unsigned CRC5EF : 1;
2824 unsigned CRC16EF : 1;
2825 unsigned DFN8EF : 1;
2826 unsigned BTOEF : 1;
2827 unsigned : 1;
2828 unsigned : 1;
2829 unsigned BTSEF : 1;
2830 } __UEIRbits_t;
2831
2832 extern __at(0x0E93) volatile __UEIRbits_t UEIRbits;
2833
2834 #define _PIDEF 0x01
2835 #define _CRC5EF 0x02
2836 #define _CRC16EF 0x04
2837 #define _DFN8EF 0x08
2838 #define _BTOEF 0x10
2839 #define _BTSEF 0x80
2840
2841 //==============================================================================
2842
2843 extern __at(0x0E94) __sfr UFRM;
2844
2845 //==============================================================================
2846 // UFRMH Bits
2847
2848 extern __at(0x0E94) __sfr UFRMH;
2849
2850 typedef struct
2851 {
2852 unsigned FRM8 : 1;
2853 unsigned FRM9 : 1;
2854 unsigned FRM10 : 1;
2855 unsigned : 1;
2856 unsigned : 1;
2857 unsigned : 1;
2858 unsigned : 1;
2859 unsigned : 1;
2860 } __UFRMHbits_t;
2861
2862 extern __at(0x0E94) volatile __UFRMHbits_t UFRMHbits;
2863
2864 #define _FRM8 0x01
2865 #define _FRM9 0x02
2866 #define _FRM10 0x04
2867
2868 //==============================================================================
2869
2870
2871 //==============================================================================
2872 // UFRML Bits
2873
2874 extern __at(0x0E95) __sfr UFRML;
2875
2876 typedef struct
2877 {
2878 unsigned FRM0 : 1;
2879 unsigned FRM1 : 1;
2880 unsigned FRM2 : 1;
2881 unsigned FRM3 : 1;
2882 unsigned FRM4 : 1;
2883 unsigned FRM5 : 1;
2884 unsigned FRM6 : 1;
2885 unsigned FRM7 : 1;
2886 } __UFRMLbits_t;
2887
2888 extern __at(0x0E95) volatile __UFRMLbits_t UFRMLbits;
2889
2890 #define _FRM0 0x01
2891 #define _FRM1 0x02
2892 #define _FRM2 0x04
2893 #define _FRM3 0x08
2894 #define _FRM4 0x10
2895 #define _FRM5 0x20
2896 #define _FRM6 0x40
2897 #define _FRM7 0x80
2898
2899 //==============================================================================
2900
2901
2902 //==============================================================================
2903 // UADDR Bits
2904
2905 extern __at(0x0E96) __sfr UADDR;
2906
2907 typedef union
2908 {
2909 struct
2910 {
2911 unsigned ADDR0 : 1;
2912 unsigned ADDR1 : 1;
2913 unsigned ADDR2 : 1;
2914 unsigned ADDR3 : 1;
2915 unsigned ADDR4 : 1;
2916 unsigned ADDR5 : 1;
2917 unsigned ADDR6 : 1;
2918 unsigned : 1;
2919 };
2920
2921 struct
2922 {
2923 unsigned ADDR : 7;
2924 unsigned : 1;
2925 };
2926 } __UADDRbits_t;
2927
2928 extern __at(0x0E96) volatile __UADDRbits_t UADDRbits;
2929
2930 #define _ADDR0 0x01
2931 #define _ADDR1 0x02
2932 #define _ADDR2 0x04
2933 #define _ADDR3 0x08
2934 #define _ADDR4 0x10
2935 #define _ADDR5 0x20
2936 #define _ADDR6 0x40
2937
2938 //==============================================================================
2939
2940
2941 //==============================================================================
2942 // UEIE Bits
2943
2944 extern __at(0x0E97) __sfr UEIE;
2945
2946 typedef struct
2947 {
2948 unsigned PIDEE : 1;
2949 unsigned CRC5EE : 1;
2950 unsigned CRC16EE : 1;
2951 unsigned DFN8EE : 1;
2952 unsigned BTOEE : 1;
2953 unsigned : 1;
2954 unsigned : 1;
2955 unsigned BTSEE : 1;
2956 } __UEIEbits_t;
2957
2958 extern __at(0x0E97) volatile __UEIEbits_t UEIEbits;
2959
2960 #define _PIDEE 0x01
2961 #define _CRC5EE 0x02
2962 #define _CRC16EE 0x04
2963 #define _DFN8EE 0x08
2964 #define _BTOEE 0x10
2965 #define _BTSEE 0x80
2966
2967 //==============================================================================
2968
2969
2970 //==============================================================================
2971 // UEP0 Bits
2972
2973 extern __at(0x0E98) __sfr UEP0;
2974
2975 typedef struct
2976 {
2977 unsigned EPSTALL : 1;
2978 unsigned EPINEN : 1;
2979 unsigned EPOUTEN : 1;
2980 unsigned EPCONDIS : 1;
2981 unsigned EPHSHK : 1;
2982 unsigned : 1;
2983 unsigned : 1;
2984 unsigned : 1;
2985 } __UEP0bits_t;
2986
2987 extern __at(0x0E98) volatile __UEP0bits_t UEP0bits;
2988
2989 #define _EPSTALL 0x01
2990 #define _EPINEN 0x02
2991 #define _EPOUTEN 0x04
2992 #define _EPCONDIS 0x08
2993 #define _EPHSHK 0x10
2994
2995 //==============================================================================
2996
2997
2998 //==============================================================================
2999 // UEP1 Bits
3000
3001 extern __at(0x0E99) __sfr UEP1;
3002
3003 typedef struct
3004 {
3005 unsigned EPSTALL : 1;
3006 unsigned EPINEN : 1;
3007 unsigned EPOUTEN : 1;
3008 unsigned EPCONDIS : 1;
3009 unsigned EPHSHK : 1;
3010 unsigned : 1;
3011 unsigned : 1;
3012 unsigned : 1;
3013 } __UEP1bits_t;
3014
3015 extern __at(0x0E99) volatile __UEP1bits_t UEP1bits;
3016
3017 #define _UEP1_EPSTALL 0x01
3018 #define _UEP1_EPINEN 0x02
3019 #define _UEP1_EPOUTEN 0x04
3020 #define _UEP1_EPCONDIS 0x08
3021 #define _UEP1_EPHSHK 0x10
3022
3023 //==============================================================================
3024
3025
3026 //==============================================================================
3027 // UEP2 Bits
3028
3029 extern __at(0x0E9A) __sfr UEP2;
3030
3031 typedef struct
3032 {
3033 unsigned EPSTALL : 1;
3034 unsigned EPINEN : 1;
3035 unsigned EPOUTEN : 1;
3036 unsigned EPCONDIS : 1;
3037 unsigned EPHSHK : 1;
3038 unsigned : 1;
3039 unsigned : 1;
3040 unsigned : 1;
3041 } __UEP2bits_t;
3042
3043 extern __at(0x0E9A) volatile __UEP2bits_t UEP2bits;
3044
3045 #define _UEP2_EPSTALL 0x01
3046 #define _UEP2_EPINEN 0x02
3047 #define _UEP2_EPOUTEN 0x04
3048 #define _UEP2_EPCONDIS 0x08
3049 #define _UEP2_EPHSHK 0x10
3050
3051 //==============================================================================
3052
3053
3054 //==============================================================================
3055 // UEP3 Bits
3056
3057 extern __at(0x0E9B) __sfr UEP3;
3058
3059 typedef struct
3060 {
3061 unsigned EPSTALL : 1;
3062 unsigned EPINEN : 1;
3063 unsigned EPOUTEN : 1;
3064 unsigned EPCONDIS : 1;
3065 unsigned EPHSHK : 1;
3066 unsigned : 1;
3067 unsigned : 1;
3068 unsigned : 1;
3069 } __UEP3bits_t;
3070
3071 extern __at(0x0E9B) volatile __UEP3bits_t UEP3bits;
3072
3073 #define _UEP3_EPSTALL 0x01
3074 #define _UEP3_EPINEN 0x02
3075 #define _UEP3_EPOUTEN 0x04
3076 #define _UEP3_EPCONDIS 0x08
3077 #define _UEP3_EPHSHK 0x10
3078
3079 //==============================================================================
3080
3081
3082 //==============================================================================
3083 // UEP4 Bits
3084
3085 extern __at(0x0E9C) __sfr UEP4;
3086
3087 typedef struct
3088 {
3089 unsigned EPSTALL : 1;
3090 unsigned EPINEN : 1;
3091 unsigned EPOUTEN : 1;
3092 unsigned EPCONDIS : 1;
3093 unsigned EPHSHK : 1;
3094 unsigned : 1;
3095 unsigned : 1;
3096 unsigned : 1;
3097 } __UEP4bits_t;
3098
3099 extern __at(0x0E9C) volatile __UEP4bits_t UEP4bits;
3100
3101 #define _UEP4_EPSTALL 0x01
3102 #define _UEP4_EPINEN 0x02
3103 #define _UEP4_EPOUTEN 0x04
3104 #define _UEP4_EPCONDIS 0x08
3105 #define _UEP4_EPHSHK 0x10
3106
3107 //==============================================================================
3108
3109
3110 //==============================================================================
3111 // UEP5 Bits
3112
3113 extern __at(0x0E9D) __sfr UEP5;
3114
3115 typedef struct
3116 {
3117 unsigned EPSTALL : 1;
3118 unsigned EPINEN : 1;
3119 unsigned EPOUTEN : 1;
3120 unsigned EPCONDIS : 1;
3121 unsigned EPHSHK : 1;
3122 unsigned : 1;
3123 unsigned : 1;
3124 unsigned : 1;
3125 } __UEP5bits_t;
3126
3127 extern __at(0x0E9D) volatile __UEP5bits_t UEP5bits;
3128
3129 #define _UEP5_EPSTALL 0x01
3130 #define _UEP5_EPINEN 0x02
3131 #define _UEP5_EPOUTEN 0x04
3132 #define _UEP5_EPCONDIS 0x08
3133 #define _UEP5_EPHSHK 0x10
3134
3135 //==============================================================================
3136
3137
3138 //==============================================================================
3139 // UEP6 Bits
3140
3141 extern __at(0x0E9E) __sfr UEP6;
3142
3143 typedef struct
3144 {
3145 unsigned EPSTALL : 1;
3146 unsigned EPINEN : 1;
3147 unsigned EPOUTEN : 1;
3148 unsigned EPCONDIS : 1;
3149 unsigned EPHSHK : 1;
3150 unsigned : 1;
3151 unsigned : 1;
3152 unsigned : 1;
3153 } __UEP6bits_t;
3154
3155 extern __at(0x0E9E) volatile __UEP6bits_t UEP6bits;
3156
3157 #define _UEP6_EPSTALL 0x01
3158 #define _UEP6_EPINEN 0x02
3159 #define _UEP6_EPOUTEN 0x04
3160 #define _UEP6_EPCONDIS 0x08
3161 #define _UEP6_EPHSHK 0x10
3162
3163 //==============================================================================
3164
3165
3166 //==============================================================================
3167 // UEP7 Bits
3168
3169 extern __at(0x0E9F) __sfr UEP7;
3170
3171 typedef struct
3172 {
3173 unsigned EPSTALL : 1;
3174 unsigned EPINEN : 1;
3175 unsigned EPOUTEN : 1;
3176 unsigned EPCONDIS : 1;
3177 unsigned EPHSHK : 1;
3178 unsigned : 1;
3179 unsigned : 1;
3180 unsigned : 1;
3181 } __UEP7bits_t;
3182
3183 extern __at(0x0E9F) volatile __UEP7bits_t UEP7bits;
3184
3185 #define _UEP7_EPSTALL 0x01
3186 #define _UEP7_EPINEN 0x02
3187 #define _UEP7_EPOUTEN 0x04
3188 #define _UEP7_EPCONDIS 0x08
3189 #define _UEP7_EPHSHK 0x10
3190
3191 //==============================================================================
3192
3193
3194 //==============================================================================
3195 // STATUS_SHAD Bits
3196
3197 extern __at(0x0FE4) __sfr STATUS_SHAD;
3198
3199 typedef struct
3200 {
3201 unsigned C : 1;
3202 unsigned DC : 1;
3203 unsigned Z : 1;
3204 unsigned : 1;
3205 unsigned : 1;
3206 unsigned : 1;
3207 unsigned : 1;
3208 unsigned : 1;
3209 } __STATUS_SHADbits_t;
3210
3211 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
3212
3213 #define _STATUS_SHAD_C 0x01
3214 #define _STATUS_SHAD_DC 0x02
3215 #define _STATUS_SHAD_Z 0x04
3216
3217 //==============================================================================
3218
3219 extern __at(0x0FE5) __sfr WREG_SHAD;
3220 extern __at(0x0FE6) __sfr BSR_SHAD;
3221 extern __at(0x0FE7) __sfr PCLATH_SHAD;
3222 extern __at(0x0FE8) __sfr FSR0L_SHAD;
3223 extern __at(0x0FE9) __sfr FSR0H_SHAD;
3224 extern __at(0x0FEA) __sfr FSR1L_SHAD;
3225 extern __at(0x0FEB) __sfr FSR1H_SHAD;
3226 extern __at(0x0FED) __sfr STKPTR;
3227 extern __at(0x0FEE) __sfr TOSL;
3228 extern __at(0x0FEF) __sfr TOSH;
3229
3230 //==============================================================================
3231 //
3232 // Configuration Bits
3233 //
3234 //==============================================================================
3235
3236 #define _CONFIG1 0x8007
3237 #define _CONFIG2 0x8008
3238
3239 //----------------------------- CONFIG1 Options -------------------------------
3240
3241 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
3242 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
3243 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
3244 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
3245 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
3246 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
3247 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
3248 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
3249 #define _WDTE_OFF 0x3FE7 // WDT disabled.
3250 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
3251 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
3252 #define _WDTE_ON 0x3FFF // WDT enabled.
3253 #define _PWRTE_ON 0x3FDF // PWRT enabled.
3254 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
3255 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
3256 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
3257 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
3258 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
3259 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
3260 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
3261 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
3262 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
3263 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
3264 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
3265 #define _IESO_OFF 0x2FFF // Internal/External Switchover Mode is disabled.
3266 #define _IESO_ON 0x3FFF // Internal/External Switchover Mode is enabled.
3267 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
3268 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
3269
3270 //----------------------------- CONFIG2 Options -------------------------------
3271
3272 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by PMCON control.
3273 #define _WRT_HALF 0x3FFD // 000h to 0FFFh write protected, 1000h to 1FFFh may be modified by PMCON control.
3274 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control.
3275 #define _WRT_OFF 0x3FFF // Write protection off.
3276 #define _CPUDIV_NOCLKDIV 0x3FCF // NO CPU system divide.
3277 #define _CPUDIV_CLKDIV2 0x3FDF // CPU system clock divided by 2.
3278 #define _CPUDIV_CLKDIV3 0x3FEF // CPU system clock divided by 3.
3279 #define _CPUDIV_CLKDIV6 0x3FFF // CPU system clock divided by 6.
3280 #define _USBLSCLK_24MHz 0x3FBF // System clock expects 24 MHz, FS/LS USB CLKENs divide-by is set to 4.
3281 #define _USBLSCLK_48MHz 0x3FFF // System clock expects 48 MHz, FS/LS USB CLKENs divide-by is set to 8.
3282 #define _PLLMULT_4x 0x3F7F // 4x Output Frequency Selected.
3283 #define _PLLMULT_3x 0x3FFF // 3x Output Frequency Selected.
3284 #define _PLLEN_DISABLED 0x3EFF // 3x or 4x PLL Disabled.
3285 #define _PLLEN_ENABLED 0x3FFF // 3x or 4x PLL Enabled.
3286 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
3287 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
3288 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
3289 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
3290 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
3291 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
3292 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
3293 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
3294 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
3295 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
3296
3297 //==============================================================================
3298
3299 #define _DEVID1 0x8006
3300
3301 #define _IDLOC0 0x8000
3302 #define _IDLOC1 0x8001
3303 #define _IDLOC2 0x8002
3304 #define _IDLOC3 0x8003
3305
3306 //==============================================================================
3307
3308 #ifndef NO_BIT_DEFINES
3309
3310 #define ACTORS ACTCONbits.ACTORS // bit 1
3311 #define ACTLOCK ACTCONbits.ACTLOCK // bit 3
3312 #define ACTSRC ACTCONbits.ACTSRC // bit 4
3313 #define ACTUD ACTCONbits.ACTUD // bit 6
3314 #define ACTEN ACTCONbits.ACTEN // bit 7
3315
3316 #define ADON ADCON0bits.ADON // bit 0
3317 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
3318 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
3319 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
3320 #define CHS0 ADCON0bits.CHS0 // bit 2
3321 #define CHS1 ADCON0bits.CHS1 // bit 3
3322 #define CHS2 ADCON0bits.CHS2 // bit 4
3323 #define CHS3 ADCON0bits.CHS3 // bit 5
3324 #define CHS4 ADCON0bits.CHS4 // bit 6
3325
3326 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
3327 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
3328 #define ADCS0 ADCON1bits.ADCS0 // bit 4
3329 #define ADCS1 ADCON1bits.ADCS1 // bit 5
3330 #define ADCS2 ADCON1bits.ADCS2 // bit 6
3331 #define ADFM ADCON1bits.ADFM // bit 7
3332
3333 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
3334 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
3335 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
3336
3337 #define ANSA4 ANSELAbits.ANSA4 // bit 4
3338
3339 #define ANSC0 ANSELCbits.ANSC0 // bit 0
3340 #define ANSC1 ANSELCbits.ANSC1 // bit 1
3341 #define ANSC2 ANSELCbits.ANSC2 // bit 2
3342 #define ANSC3 ANSELCbits.ANSC3 // bit 3
3343
3344 #define P2SEL APFCONbits.P2SEL // bit 2
3345 #define T1GSEL APFCONbits.T1GSEL // bit 3
3346 #define SSSEL APFCONbits.SSSEL // bit 5
3347 #define SDOSEL APFCONbits.SDOSEL // bit 6
3348 #define CLKRSEL APFCONbits.CLKRSEL // bit 7
3349
3350 #define ABDEN BAUDCONbits.ABDEN // bit 0
3351 #define WUE BAUDCONbits.WUE // bit 1
3352 #define BRG16 BAUDCONbits.BRG16 // bit 3
3353 #define SCKP BAUDCONbits.SCKP // bit 4
3354 #define RCIDL BAUDCONbits.RCIDL // bit 6
3355 #define ABDOVF BAUDCONbits.ABDOVF // bit 7
3356
3357 #define BORRDY BORCONbits.BORRDY // bit 0
3358 #define BORFS BORCONbits.BORFS // bit 6
3359 #define SBOREN BORCONbits.SBOREN // bit 7
3360
3361 #define BSR0 BSRbits.BSR0 // bit 0
3362 #define BSR1 BSRbits.BSR1 // bit 1
3363 #define BSR2 BSRbits.BSR2 // bit 2
3364 #define BSR3 BSRbits.BSR3 // bit 3
3365 #define BSR4 BSRbits.BSR4 // bit 4
3366
3367 #define CLKRDIV0 CLKRCONbits.CLKRDIV0 // bit 0
3368 #define CLKRDIV1 CLKRCONbits.CLKRDIV1 // bit 1
3369 #define CLKRDIV2 CLKRCONbits.CLKRDIV2 // bit 2
3370 #define CLKRCD0 CLKRCONbits.CLKRCD0 // bit 3
3371 #define CLKRCD1 CLKRCONbits.CLKRCD1 // bit 4
3372 #define CLKRSLR CLKRCONbits.CLKRSLR // bit 5
3373 #define CLKROE CLKRCONbits.CLKROE // bit 6
3374 #define CLKREN CLKRCONbits.CLKREN // bit 7
3375
3376 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
3377 #define C1HYS CM1CON0bits.C1HYS // bit 1
3378 #define C1SP CM1CON0bits.C1SP // bit 2
3379 #define C1POL CM1CON0bits.C1POL // bit 4
3380 #define C1OE CM1CON0bits.C1OE // bit 5
3381 #define C1OUT CM1CON0bits.C1OUT // bit 6
3382 #define C1ON CM1CON0bits.C1ON // bit 7
3383
3384 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
3385 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
3386 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
3387 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
3388 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
3389 #define C1INTN CM1CON1bits.C1INTN // bit 6
3390 #define C1INTP CM1CON1bits.C1INTP // bit 7
3391
3392 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
3393 #define C2HYS CM2CON0bits.C2HYS // bit 1
3394 #define C2SP CM2CON0bits.C2SP // bit 2
3395 #define C2POL CM2CON0bits.C2POL // bit 4
3396 #define C2OE CM2CON0bits.C2OE // bit 5
3397 #define C2OUT CM2CON0bits.C2OUT // bit 6
3398 #define C2ON CM2CON0bits.C2ON // bit 7
3399
3400 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
3401 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
3402 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
3403 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4
3404 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5
3405 #define C2INTN CM2CON1bits.C2INTN // bit 6
3406 #define C2INTP CM2CON1bits.C2INTP // bit 7
3407
3408 #define MC1OUT CMOUTbits.MC1OUT // bit 0
3409 #define MC2OUT CMOUTbits.MC2OUT // bit 1
3410
3411 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
3412 #define G1POLA CWG1CON0bits.G1POLA // bit 3
3413 #define G1POLB CWG1CON0bits.G1POLB // bit 4
3414 #define G1OEA CWG1CON0bits.G1OEA // bit 5
3415 #define G1OEB CWG1CON0bits.G1OEB // bit 6
3416 #define G1EN CWG1CON0bits.G1EN // bit 7
3417
3418 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
3419 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
3420 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
3421 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
3422 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
3423 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
3424
3425 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1
3426 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
3427 #define G1ASDSC2 CWG1CON2bits.G1ASDSC2 // bit 3
3428 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
3429 #define G1ASE CWG1CON2bits.G1ASE // bit 7
3430
3431 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
3432 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
3433 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
3434 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
3435 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
3436 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
3437
3438 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
3439 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
3440 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
3441 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
3442 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
3443 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
3444
3445 #define D1PSS0 DACCON0bits.D1PSS0 // bit 2
3446 #define D1PSS1 DACCON0bits.D1PSS1 // bit 3
3447 #define DACOE2 DACCON0bits.DACOE2 // bit 4
3448 #define DACOE1 DACCON0bits.DACOE1 // bit 5
3449 #define DACEN DACCON0bits.DACEN // bit 7
3450
3451 #define DACR0 DACCON1bits.DACR0 // bit 0
3452 #define DACR1 DACCON1bits.DACR1 // bit 1
3453 #define DACR2 DACCON1bits.DACR2 // bit 2
3454 #define DACR3 DACCON1bits.DACR3 // bit 3
3455 #define DACR4 DACCON1bits.DACR4 // bit 4
3456
3457 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
3458 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
3459 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
3460 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
3461 #define TSRNG FVRCONbits.TSRNG // bit 4
3462 #define TSEN FVRCONbits.TSEN // bit 5
3463 #define FVRRDY FVRCONbits.FVRRDY // bit 6
3464 #define FVREN FVRCONbits.FVREN // bit 7
3465
3466 #define IOCIF INTCONbits.IOCIF // bit 0
3467 #define INTF INTCONbits.INTF // bit 1
3468 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
3469 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
3470 #define IOCIE INTCONbits.IOCIE // bit 3
3471 #define INTE INTCONbits.INTE // bit 4
3472 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
3473 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
3474 #define PEIE INTCONbits.PEIE // bit 6
3475 #define GIE INTCONbits.GIE // bit 7
3476
3477 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
3478 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
3479 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
3480 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
3481 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
3482
3483 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
3484 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
3485 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
3486 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
3487 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
3488
3489 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
3490 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
3491 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
3492 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
3493 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
3494
3495 #define LATA4 LATAbits.LATA4 // bit 4
3496 #define LATA5 LATAbits.LATA5 // bit 5
3497
3498 #define LATC0 LATCbits.LATC0 // bit 0
3499 #define LATC1 LATCbits.LATC1 // bit 1
3500 #define LATC2 LATCbits.LATC2 // bit 2
3501 #define LATC3 LATCbits.LATC3 // bit 3
3502 #define LATC4 LATCbits.LATC4 // bit 4
3503 #define LATC5 LATCbits.LATC5 // bit 5
3504
3505 #define PS0 OPTION_REGbits.PS0 // bit 0
3506 #define PS1 OPTION_REGbits.PS1 // bit 1
3507 #define PS2 OPTION_REGbits.PS2 // bit 2
3508 #define PSA OPTION_REGbits.PSA // bit 3
3509 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
3510 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
3511 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
3512 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
3513 #define INTEDG OPTION_REGbits.INTEDG // bit 6
3514 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
3515
3516 #define SCS0 OSCCONbits.SCS0 // bit 0
3517 #define SCS1 OSCCONbits.SCS1 // bit 1
3518 #define IRCF0 OSCCONbits.IRCF0 // bit 2
3519 #define IRCF1 OSCCONbits.IRCF1 // bit 3
3520 #define IRCF2 OSCCONbits.IRCF2 // bit 4
3521 #define IRCF3 OSCCONbits.IRCF3 // bit 5
3522 #define SPLLMULT OSCCONbits.SPLLMULT // bit 6
3523 #define SPLLEN OSCCONbits.SPLLEN // bit 7
3524
3525 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
3526 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
3527 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
3528 #define OSTS OSCSTATbits.OSTS // bit 5
3529 #define PLLRDY OSCSTATbits.PLLRDY // bit 6
3530 #define SOSCR OSCSTATbits.SOSCR // bit 7
3531
3532 #define TUN0 OSCTUNEbits.TUN0 // bit 0
3533 #define TUN1 OSCTUNEbits.TUN1 // bit 1
3534 #define TUN2 OSCTUNEbits.TUN2 // bit 2
3535 #define TUN3 OSCTUNEbits.TUN3 // bit 3
3536 #define TUN4 OSCTUNEbits.TUN4 // bit 4
3537 #define TUN5 OSCTUNEbits.TUN5 // bit 5
3538 #define TUN6 OSCTUNEbits.TUN6 // bit 6
3539
3540 #define NOT_BOR PCONbits.NOT_BOR // bit 0
3541 #define NOT_POR PCONbits.NOT_POR // bit 1
3542 #define NOT_RI PCONbits.NOT_RI // bit 2
3543 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
3544 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
3545 #define STKUNF PCONbits.STKUNF // bit 6
3546 #define STKOVF PCONbits.STKOVF // bit 7
3547
3548 #define TMR1IE PIE1bits.TMR1IE // bit 0
3549 #define TMR2IE PIE1bits.TMR2IE // bit 1
3550 #define SSP1IE PIE1bits.SSP1IE // bit 3
3551 #define TXIE PIE1bits.TXIE // bit 4
3552 #define RCIE PIE1bits.RCIE // bit 5
3553 #define ADIE PIE1bits.ADIE // bit 6
3554 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
3555
3556 #define ACTIE PIE2bits.ACTIE // bit 1
3557 #define USBIE PIE2bits.USBIE // bit 2
3558 #define BCL1IE PIE2bits.BCL1IE // bit 3
3559 #define C1IE PIE2bits.C1IE // bit 5
3560 #define C2IE PIE2bits.C2IE // bit 6
3561 #define OSFIE PIE2bits.OSFIE // bit 7
3562
3563 #define TMR1IF PIR1bits.TMR1IF // bit 0
3564 #define TMR2IF PIR1bits.TMR2IF // bit 1
3565 #define SSP1IF PIR1bits.SSP1IF // bit 3
3566 #define TXIF PIR1bits.TXIF // bit 4
3567 #define RCIF PIR1bits.RCIF // bit 5
3568 #define ADIF PIR1bits.ADIF // bit 6
3569 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
3570
3571 #define ACTIF PIR2bits.ACTIF // bit 1
3572 #define USBIF PIR2bits.USBIF // bit 2
3573 #define BCL1IF PIR2bits.BCL1IF // bit 3
3574 #define C1IF PIR2bits.C1IF // bit 5
3575 #define C2IF PIR2bits.C2IF // bit 6
3576 #define OSFIF PIR2bits.OSFIF // bit 7
3577
3578 #define RD PMCON1bits.RD // bit 0
3579 #define WR PMCON1bits.WR // bit 1
3580 #define WREN PMCON1bits.WREN // bit 2
3581 #define WRERR PMCON1bits.WRERR // bit 3
3582 #define FREE PMCON1bits.FREE // bit 4
3583 #define LWLO PMCON1bits.LWLO // bit 5
3584 #define CFGS PMCON1bits.CFGS // bit 6
3585
3586 #define RA0 PORTAbits.RA0 // bit 0
3587 #define RA1 PORTAbits.RA1 // bit 1
3588 #define RA3 PORTAbits.RA3 // bit 3
3589 #define RA4 PORTAbits.RA4 // bit 4
3590 #define RA5 PORTAbits.RA5 // bit 5
3591
3592 #define RC0 PORTCbits.RC0 // bit 0
3593 #define RC1 PORTCbits.RC1 // bit 1
3594 #define RC2 PORTCbits.RC2 // bit 2
3595 #define RC3 PORTCbits.RC3 // bit 3
3596 #define RC4 PORTCbits.RC4 // bit 4
3597 #define RC5 PORTCbits.RC5 // bit 5
3598
3599 #define PWM1POL PWM1CONbits.PWM1POL // bit 4
3600 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5
3601 #define PWM1OE PWM1CONbits.PWM1OE // bit 6
3602 #define PWM1EN PWM1CONbits.PWM1EN // bit 7
3603
3604 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
3605 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
3606 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
3607 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
3608 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
3609 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
3610 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
3611 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
3612
3613 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 6
3614 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 7
3615
3616 #define PWM2POL PWM2CONbits.PWM2POL // bit 4
3617 #define PWM2OUT PWM2CONbits.PWM2OUT // bit 5
3618 #define PWM2OE PWM2CONbits.PWM2OE // bit 6
3619 #define PWM2EN PWM2CONbits.PWM2EN // bit 7
3620
3621 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
3622 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
3623 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
3624 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
3625 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
3626 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
3627 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
3628 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
3629
3630 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 6
3631 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 7
3632
3633 #define RX9D RCSTAbits.RX9D // bit 0
3634 #define OERR RCSTAbits.OERR // bit 1
3635 #define FERR RCSTAbits.FERR // bit 2
3636 #define ADDEN RCSTAbits.ADDEN // bit 3
3637 #define CREN RCSTAbits.CREN // bit 4
3638 #define SREN RCSTAbits.SREN // bit 5
3639 #define RX9 RCSTAbits.RX9 // bit 6
3640 #define SPEN RCSTAbits.SPEN // bit 7
3641
3642 #define SSP1M0 SSP1CON1bits.SSP1M0 // bit 0
3643 #define SSP1M1 SSP1CON1bits.SSP1M1 // bit 1
3644 #define SSP1M2 SSP1CON1bits.SSP1M2 // bit 2
3645 #define SSP1M3 SSP1CON1bits.SSP1M3 // bit 3
3646 #define CKP SSP1CON1bits.CKP // bit 4
3647 #define SSPEN SSP1CON1bits.SSPEN // bit 5, shadows bit in SSP1CON1bits
3648 #define SSP1EN SSP1CON1bits.SSP1EN // bit 5, shadows bit in SSP1CON1bits
3649 #define SSPOV SSP1CON1bits.SSPOV // bit 6, shadows bit in SSP1CON1bits
3650 #define SSP1OV SSP1CON1bits.SSP1OV // bit 6, shadows bit in SSP1CON1bits
3651 #define WCOL SSP1CON1bits.WCOL // bit 7
3652
3653 #define SEN SSP1CON2bits.SEN // bit 0
3654 #define RSEN SSP1CON2bits.RSEN // bit 1
3655 #define PEN SSP1CON2bits.PEN // bit 2
3656 #define RCEN SSP1CON2bits.RCEN // bit 3
3657 #define ACKEN SSP1CON2bits.ACKEN // bit 4
3658 #define ACKDT SSP1CON2bits.ACKDT // bit 5
3659 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
3660 #define GCEN SSP1CON2bits.GCEN // bit 7
3661
3662 #define DHEN SSP1CON3bits.DHEN // bit 0
3663 #define AHEN SSP1CON3bits.AHEN // bit 1
3664 #define SBCDE SSP1CON3bits.SBCDE // bit 2
3665 #define SDAHT SSP1CON3bits.SDAHT // bit 3
3666 #define BOEN SSP1CON3bits.BOEN // bit 4
3667 #define SCIE SSP1CON3bits.SCIE // bit 5
3668 #define PCIE SSP1CON3bits.PCIE // bit 6
3669 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
3670
3671 #define BF SSP1STATbits.BF // bit 0
3672 #define UA SSP1STATbits.UA // bit 1
3673 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
3674 #define S SSP1STATbits.S // bit 3
3675 #define P SSP1STATbits.P // bit 4
3676 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
3677 #define CKE SSP1STATbits.CKE // bit 6
3678 #define SMP SSP1STATbits.SMP // bit 7
3679
3680 #define C STATUSbits.C // bit 0
3681 #define DC STATUSbits.DC // bit 1
3682 #define Z STATUSbits.Z // bit 2
3683 #define NOT_PD STATUSbits.NOT_PD // bit 3
3684 #define NOT_TO STATUSbits.NOT_TO // bit 4
3685
3686 #define TMR1ON T1CONbits.TMR1ON // bit 0
3687 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
3688 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
3689 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
3690 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
3691 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
3692 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
3693
3694 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
3695 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
3696 #define T1GVAL T1GCONbits.T1GVAL // bit 2
3697 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
3698 #define T1GSPM T1GCONbits.T1GSPM // bit 4
3699 #define T1GTM T1GCONbits.T1GTM // bit 5
3700 #define T1GPOL T1GCONbits.T1GPOL // bit 6
3701 #define TMR1GE T1GCONbits.TMR1GE // bit 7
3702
3703 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
3704 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
3705 #define TMR2ON T2CONbits.TMR2ON // bit 2
3706 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
3707 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
3708 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
3709 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
3710
3711 #define TRISA4 TRISAbits.TRISA4 // bit 4
3712 #define TRISA5 TRISAbits.TRISA5 // bit 5
3713
3714 #define TRISC0 TRISCbits.TRISC0 // bit 0
3715 #define TRISC1 TRISCbits.TRISC1 // bit 1
3716 #define TRISC2 TRISCbits.TRISC2 // bit 2
3717 #define TRISC3 TRISCbits.TRISC3 // bit 3
3718 #define TRISC4 TRISCbits.TRISC4 // bit 4
3719 #define TRISC5 TRISCbits.TRISC5 // bit 5
3720
3721 #define TX9D TXSTAbits.TX9D // bit 0
3722 #define TRMT TXSTAbits.TRMT // bit 1
3723 #define BRGH TXSTAbits.BRGH // bit 2
3724 #define SENDB TXSTAbits.SENDB // bit 3
3725 #define SYNC TXSTAbits.SYNC // bit 4
3726 #define TXEN TXSTAbits.TXEN // bit 5
3727 #define TX9 TXSTAbits.TX9 // bit 6
3728 #define CSRC TXSTAbits.CSRC // bit 7
3729
3730 #define ADDR0 UADDRbits.ADDR0 // bit 0
3731 #define ADDR1 UADDRbits.ADDR1 // bit 1
3732 #define ADDR2 UADDRbits.ADDR2 // bit 2
3733 #define ADDR3 UADDRbits.ADDR3 // bit 3
3734 #define ADDR4 UADDRbits.ADDR4 // bit 4
3735 #define ADDR5 UADDRbits.ADDR5 // bit 5
3736 #define ADDR6 UADDRbits.ADDR6 // bit 6
3737
3738 #define PPB0 UCFGbits.PPB0 // bit 0
3739 #define PPB1 UCFGbits.PPB1 // bit 1
3740 #define FSEN UCFGbits.FSEN // bit 2
3741 #define UPUEN UCFGbits.UPUEN // bit 4
3742 #define UTEYE UCFGbits.UTEYE // bit 7
3743
3744 #define SUSPND UCONbits.SUSPND // bit 1
3745 #define RESUME UCONbits.RESUME // bit 2
3746 #define USBEN UCONbits.USBEN // bit 3
3747 #define PKTDIS UCONbits.PKTDIS // bit 4
3748 #define SE0 UCONbits.SE0 // bit 5
3749 #define PPBRST UCONbits.PPBRST // bit 6
3750
3751 #define PIDEE UEIEbits.PIDEE // bit 0
3752 #define CRC5EE UEIEbits.CRC5EE // bit 1
3753 #define CRC16EE UEIEbits.CRC16EE // bit 2
3754 #define DFN8EE UEIEbits.DFN8EE // bit 3
3755 #define BTOEE UEIEbits.BTOEE // bit 4
3756 #define BTSEE UEIEbits.BTSEE // bit 7
3757
3758 #define PIDEF UEIRbits.PIDEF // bit 0
3759 #define CRC5EF UEIRbits.CRC5EF // bit 1
3760 #define CRC16EF UEIRbits.CRC16EF // bit 2
3761 #define DFN8EF UEIRbits.DFN8EF // bit 3
3762 #define BTOEF UEIRbits.BTOEF // bit 4
3763 #define BTSEF UEIRbits.BTSEF // bit 7
3764
3765 #define EPSTALL UEP0bits.EPSTALL // bit 0
3766 #define EPINEN UEP0bits.EPINEN // bit 1
3767 #define EPOUTEN UEP0bits.EPOUTEN // bit 2
3768 #define EPCONDIS UEP0bits.EPCONDIS // bit 3
3769 #define EPHSHK UEP0bits.EPHSHK // bit 4
3770
3771 #define FRM8 UFRMHbits.FRM8 // bit 0
3772 #define FRM9 UFRMHbits.FRM9 // bit 1
3773 #define FRM10 UFRMHbits.FRM10 // bit 2
3774
3775 #define FRM0 UFRMLbits.FRM0 // bit 0
3776 #define FRM1 UFRMLbits.FRM1 // bit 1
3777 #define FRM2 UFRMLbits.FRM2 // bit 2
3778 #define FRM3 UFRMLbits.FRM3 // bit 3
3779 #define FRM4 UFRMLbits.FRM4 // bit 4
3780 #define FRM5 UFRMLbits.FRM5 // bit 5
3781 #define FRM6 UFRMLbits.FRM6 // bit 6
3782 #define FRM7 UFRMLbits.FRM7 // bit 7
3783
3784 #define URSTIE UIEbits.URSTIE // bit 0
3785 #define UERRIE UIEbits.UERRIE // bit 1
3786 #define ACTVIE UIEbits.ACTVIE // bit 2
3787 #define TRNIE UIEbits.TRNIE // bit 3
3788 #define IDLEIE UIEbits.IDLEIE // bit 4
3789 #define STALLIE UIEbits.STALLIE // bit 5
3790 #define SOFIE UIEbits.SOFIE // bit 6
3791
3792 #define URSTIF UIRbits.URSTIF // bit 0
3793 #define UERRIF UIRbits.UERRIF // bit 1
3794 #define ACTVIF UIRbits.ACTVIF // bit 2
3795 #define TRNIF UIRbits.TRNIF // bit 3
3796 #define IDLEIF UIRbits.IDLEIF // bit 4
3797 #define STALLIF UIRbits.STALLIF // bit 5
3798 #define SOFIF UIRbits.SOFIF // bit 6
3799
3800 #define PPBI USTATbits.PPBI // bit 1
3801 #define DIR USTATbits.DIR // bit 2
3802 #define ENDP0 USTATbits.ENDP0 // bit 3
3803 #define ENDP1 USTATbits.ENDP1 // bit 4
3804 #define ENDP2 USTATbits.ENDP2 // bit 5
3805 #define ENDP3 USTATbits.ENDP3 // bit 6
3806
3807 #define SWDTEN WDTCONbits.SWDTEN // bit 0
3808 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
3809 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
3810 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
3811 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
3812 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
3813
3814 #define WPUA3 WPUAbits.WPUA3 // bit 3
3815 #define WPUA4 WPUAbits.WPUA4 // bit 4
3816 #define WPUA5 WPUAbits.WPUA5 // bit 5
3817
3818 #endif // #ifndef NO_BIT_DEFINES
3819
3820 #endif // #ifndef __PIC16LF1455_H__
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