2 * This declarations of the PIC16LF1613 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:09 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16LF1613_H__
26 #define __PIC16LF1613_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTC_ADDR 0x000E
52 #define PIR1_ADDR 0x0011
53 #define PIR2_ADDR 0x0012
54 #define PIR3_ADDR 0x0013
55 #define PIR4_ADDR 0x0014
56 #define TMR0_ADDR 0x0015
57 #define TMR1_ADDR 0x0016
58 #define TMR1L_ADDR 0x0016
59 #define TMR1H_ADDR 0x0017
60 #define T1CON_ADDR 0x0018
61 #define T1GCON_ADDR 0x0019
62 #define T2TMR_ADDR 0x001A
63 #define TMR2_ADDR 0x001A
64 #define PR2_ADDR 0x001B
65 #define T2PR_ADDR 0x001B
66 #define T2CON_ADDR 0x001C
67 #define T2HLT_ADDR 0x001D
68 #define T2CLKCON_ADDR 0x001E
69 #define T2RST_ADDR 0x001F
70 #define TRISA_ADDR 0x008C
71 #define TRISC_ADDR 0x008E
72 #define PIE1_ADDR 0x0091
73 #define PIE2_ADDR 0x0092
74 #define PIE3_ADDR 0x0093
75 #define PIE4_ADDR 0x0094
76 #define OPTION_REG_ADDR 0x0095
77 #define PCON_ADDR 0x0096
78 #define OSCTUNE_ADDR 0x0098
79 #define OSCCON_ADDR 0x0099
80 #define OSCSTAT_ADDR 0x009A
81 #define ADRES_ADDR 0x009B
82 #define ADRESL_ADDR 0x009B
83 #define ADRESH_ADDR 0x009C
84 #define ADCON0_ADDR 0x009D
85 #define ADCON1_ADDR 0x009E
86 #define ADCON2_ADDR 0x009F
87 #define LATA_ADDR 0x010C
88 #define LATC_ADDR 0x010E
89 #define CM1CON0_ADDR 0x0111
90 #define CM1CON1_ADDR 0x0112
91 #define CM2CON0_ADDR 0x0113
92 #define CM2CON1_ADDR 0x0114
93 #define CMOUT_ADDR 0x0115
94 #define BORCON_ADDR 0x0116
95 #define FVRCON_ADDR 0x0117
96 #define DAC1CON0_ADDR 0x0118
97 #define DAC1CON1_ADDR 0x0119
98 #define ZCD1CON_ADDR 0x011C
99 #define APFCON_ADDR 0x011D
100 #define ANSELA_ADDR 0x018C
101 #define ANSELC_ADDR 0x018E
102 #define PMADR_ADDR 0x0191
103 #define PMADRL_ADDR 0x0191
104 #define PMADRH_ADDR 0x0192
105 #define PMDAT_ADDR 0x0193
106 #define PMDATL_ADDR 0x0193
107 #define PMDATH_ADDR 0x0194
108 #define PMCON1_ADDR 0x0195
109 #define PMCON2_ADDR 0x0196
110 #define WPUA_ADDR 0x020C
111 #define WPUC_ADDR 0x020E
112 #define ODCONA_ADDR 0x028C
113 #define ODCONC_ADDR 0x028E
114 #define CCPR1_ADDR 0x0291
115 #define CCPR1L_ADDR 0x0291
116 #define CCPR1H_ADDR 0x0292
117 #define CCP1CON_ADDR 0x0293
118 #define CCP1CAP_ADDR 0x0294
119 #define CCPR2_ADDR 0x0298
120 #define CCPR2L_ADDR 0x0298
121 #define CCPR2H_ADDR 0x0299
122 #define CCP2CON_ADDR 0x029A
123 #define CCP2CAP_ADDR 0x029B
124 #define CCPTMRS_ADDR 0x029E
125 #define SLRCONA_ADDR 0x030C
126 #define SLRCONC_ADDR 0x030E
127 #define INLVLA_ADDR 0x038C
128 #define INLVLC_ADDR 0x038E
129 #define IOCAP_ADDR 0x0391
130 #define IOCAN_ADDR 0x0392
131 #define IOCAF_ADDR 0x0393
132 #define IOCCP_ADDR 0x0397
133 #define IOCCN_ADDR 0x0398
134 #define IOCCF_ADDR 0x0399
135 #define T4TMR_ADDR 0x0413
136 #define TMR4_ADDR 0x0413
137 #define PR4_ADDR 0x0414
138 #define T4PR_ADDR 0x0414
139 #define T4CON_ADDR 0x0415
140 #define T4HLT_ADDR 0x0416
141 #define T4CLKCON_ADDR 0x0417
142 #define T4RST_ADDR 0x0418
143 #define T6TMR_ADDR 0x041A
144 #define TMR6_ADDR 0x041A
145 #define PR6_ADDR 0x041B
146 #define T6PR_ADDR 0x041B
147 #define T6CON_ADDR 0x041C
148 #define T6HLT_ADDR 0x041D
149 #define T6CLKCON_ADDR 0x041E
150 #define T6RST_ADDR 0x041F
151 #define CWG1DBR_ADDR 0x0691
152 #define CWG1DBF_ADDR 0x0692
153 #define CWG1AS0_ADDR 0x0693
154 #define CWG1AS1_ADDR 0x0694
155 #define CWG1OCON0_ADDR 0x0695
156 #define CWG1CON0_ADDR 0x0696
157 #define CWG1CON1_ADDR 0x0697
158 #define CWG1OCON1_ADDR 0x0698
159 #define CWG1CLKCON_ADDR 0x0699
160 #define CWG1ISM_ADDR 0x069A
161 #define WDTCON0_ADDR 0x0711
162 #define WDTCON1_ADDR 0x0712
163 #define WDTPSL_ADDR 0x0713
164 #define WDTPSH_ADDR 0x0714
165 #define WDTTMR_ADDR 0x0715
166 #define SCANLADR_ADDR 0x0718
167 #define SCANLADRL_ADDR 0x0718
168 #define SCANLADRH_ADDR 0x0719
169 #define SCANHADR_ADDR 0x071A
170 #define SCANHADRL_ADDR 0x071A
171 #define SCANHADRH_ADDR 0x071B
172 #define SCANCON0_ADDR 0x071C
173 #define SCANTRIG_ADDR 0x071D
174 #define CRCDAT_ADDR 0x0791
175 #define CRCDATL_ADDR 0x0791
176 #define CRCDATH_ADDR 0x0792
177 #define CRCACC_ADDR 0x0793
178 #define CRCACCL_ADDR 0x0793
179 #define CRCACCH_ADDR 0x0794
180 #define CRCSHIFT_ADDR 0x0795
181 #define CRCSHIFTL_ADDR 0x0795
182 #define CRCSHIFTH_ADDR 0x0796
183 #define CRCXOR_ADDR 0x0797
184 #define CRCXORL_ADDR 0x0797
185 #define CRCXORH_ADDR 0x0798
186 #define CRCCON0_ADDR 0x0799
187 #define CRCCON1_ADDR 0x079A
188 #define SMT1TMR_ADDR 0x0D8C
189 #define SMT1TMRL_ADDR 0x0D8C
190 #define SMT1TMRH_ADDR 0x0D8D
191 #define SMT1TMRU_ADDR 0x0D8E
192 #define SMT1CPR_ADDR 0x0D8F
193 #define SMT1CPRL_ADDR 0x0D8F
194 #define SMT1CPRH_ADDR 0x0D90
195 #define SMT1CPRU_ADDR 0x0D91
196 #define SMT1CPW_ADDR 0x0D92
197 #define SMT1CPWL_ADDR 0x0D92
198 #define SMT1CPWH_ADDR 0x0D93
199 #define SMT1CPWU_ADDR 0x0D94
200 #define SMT1PR_ADDR 0x0D95
201 #define SMT1PRL_ADDR 0x0D95
202 #define SMT1PRH_ADDR 0x0D96
203 #define SMT1PRU_ADDR 0x0D97
204 #define SMT1CON0_ADDR 0x0D98
205 #define SMT1CON1_ADDR 0x0D99
206 #define SMT1STAT_ADDR 0x0D9A
207 #define SMT1CLK_ADDR 0x0D9B
208 #define SMT1SIG_ADDR 0x0D9C
209 #define SMT1WIN_ADDR 0x0D9D
210 #define SMT2TMR_ADDR 0x0D9E
211 #define SMT2TMRL_ADDR 0x0D9E
212 #define SMT2TMRH_ADDR 0x0D9F
213 #define SMT2TMRU_ADDR 0x0DA0
214 #define SMT2CPR_ADDR 0x0DA1
215 #define SMT2CPRL_ADDR 0x0DA1
216 #define SMT2CPRH_ADDR 0x0DA2
217 #define SMT2CPRU_ADDR 0x0DA3
218 #define SMT2CPW_ADDR 0x0DA4
219 #define SMT2CPWL_ADDR 0x0DA4
220 #define SMT2CPWH_ADDR 0x0DA5
221 #define SMT2CPWU_ADDR 0x0DA6
222 #define SMT2PR_ADDR 0x0DA7
223 #define SMT2PRL_ADDR 0x0DA7
224 #define SMT2PRH_ADDR 0x0DA8
225 #define SMT2PRU_ADDR 0x0DA9
226 #define SMT2CON0_ADDR 0x0DAA
227 #define SMT2CON1_ADDR 0x0DAB
228 #define SMT2STAT_ADDR 0x0DAC
229 #define SMT2CLK_ADDR 0x0DAD
230 #define SMT2SIG_ADDR 0x0DAE
231 #define SMT2WIN_ADDR 0x0DAF
232 #define STATUS_SHAD_ADDR 0x0FE4
233 #define WREG_SHAD_ADDR 0x0FE5
234 #define BSR_SHAD_ADDR 0x0FE6
235 #define PCLATH_SHAD_ADDR 0x0FE7
236 #define FSR0L_SHAD_ADDR 0x0FE8
237 #define FSR0H_SHAD_ADDR 0x0FE9
238 #define FSR1L_SHAD_ADDR 0x0FEA
239 #define FSR1H_SHAD_ADDR 0x0FEB
240 #define STKPTR_ADDR 0x0FED
241 #define TOSL_ADDR 0x0FEE
242 #define TOSH_ADDR 0x0FEF
244 #endif // #ifndef NO_ADDR_DEFINES
246 //==============================================================================
248 // Register Definitions
250 //==============================================================================
252 extern __at(0x0000) __sfr INDF0
;
253 extern __at(0x0001) __sfr INDF1
;
254 extern __at(0x0002) __sfr PCL
;
256 //==============================================================================
259 extern __at(0x0003) __sfr STATUS
;
273 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
281 //==============================================================================
283 extern __at(0x0004) __sfr FSR0
;
284 extern __at(0x0004) __sfr FSR0L
;
285 extern __at(0x0005) __sfr FSR0H
;
286 extern __at(0x0006) __sfr FSR1
;
287 extern __at(0x0006) __sfr FSR1L
;
288 extern __at(0x0007) __sfr FSR1H
;
290 //==============================================================================
293 extern __at(0x0008) __sfr BSR
;
316 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
324 //==============================================================================
326 extern __at(0x0009) __sfr WREG
;
327 extern __at(0x000A) __sfr PCLATH
;
329 //==============================================================================
332 extern __at(0x000B) __sfr INTCON
;
361 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
374 //==============================================================================
377 //==============================================================================
380 extern __at(0x000C) __sfr PORTA
;
403 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
412 //==============================================================================
415 //==============================================================================
418 extern __at(0x000E) __sfr PORTC
;
441 extern __at(0x000E) volatile __PORTCbits_t PORTCbits
;
450 //==============================================================================
453 //==============================================================================
456 extern __at(0x0011) __sfr PIR1
;
467 unsigned TMR1GIF
: 1;
470 extern __at(0x0011) volatile __PIR1bits_t PIR1bits
;
476 #define _TMR1GIF 0x80
478 //==============================================================================
481 //==============================================================================
484 extern __at(0x0012) __sfr PIR2
;
498 extern __at(0x0012) volatile __PIR2bits_t PIR2bits
;
506 //==============================================================================
509 //==============================================================================
512 extern __at(0x0013) __sfr PIR3
;
526 extern __at(0x0013) volatile __PIR3bits_t PIR3bits
;
531 //==============================================================================
534 //==============================================================================
537 extern __at(0x0014) __sfr PIR4
;
542 unsigned SMT1PRAIF
: 1;
543 unsigned SMT1PWAIF
: 1;
545 unsigned SMT2PRAIF
: 1;
546 unsigned SMT2PWAIF
: 1;
551 extern __at(0x0014) volatile __PIR4bits_t PIR4bits
;
554 #define _SMT1PRAIF 0x02
555 #define _SMT1PWAIF 0x04
557 #define _SMT2PRAIF 0x10
558 #define _SMT2PWAIF 0x20
562 //==============================================================================
564 extern __at(0x0015) __sfr TMR0
;
565 extern __at(0x0016) __sfr TMR1
;
566 extern __at(0x0016) __sfr TMR1L
;
567 extern __at(0x0017) __sfr TMR1H
;
569 //==============================================================================
572 extern __at(0x0018) __sfr T1CON
;
580 unsigned NOT_T1SYNC
: 1;
582 unsigned T1CKPS0
: 1;
583 unsigned T1CKPS1
: 1;
584 unsigned TMR1CS0
: 1;
585 unsigned TMR1CS1
: 1;
602 extern __at(0x0018) volatile __T1CONbits_t T1CONbits
;
605 #define _NOT_T1SYNC 0x04
606 #define _T1CKPS0 0x10
607 #define _T1CKPS1 0x20
608 #define _TMR1CS0 0x40
609 #define _TMR1CS1 0x80
611 //==============================================================================
614 //==============================================================================
617 extern __at(0x0019) __sfr T1GCON
;
626 unsigned T1GGO_NOT_DONE
: 1;
640 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits
;
645 #define _T1GGO_NOT_DONE 0x08
651 //==============================================================================
653 extern __at(0x001A) __sfr T2TMR
;
654 extern __at(0x001A) __sfr TMR2
;
655 extern __at(0x001B) __sfr PR2
;
656 extern __at(0x001B) __sfr T2PR
;
658 //==============================================================================
661 extern __at(0x001C) __sfr T2CON
;
667 unsigned T2OUTPS0
: 1;
668 unsigned T2OUTPS1
: 1;
669 unsigned T2OUTPS2
: 1;
670 unsigned T2OUTPS3
: 1;
671 unsigned T2CKPS0
: 1;
672 unsigned T2CKPS1
: 1;
673 unsigned T2CKPS2
: 1;
709 unsigned T2OUTPS
: 4;
728 extern __at(0x001C) volatile __T2CONbits_t T2CONbits
;
730 #define _T2OUTPS0 0x01
732 #define _T2OUTPS1 0x02
734 #define _T2OUTPS2 0x04
736 #define _T2OUTPS3 0x08
738 #define _T2CKPS0 0x10
740 #define _T2CKPS1 0x20
742 #define _T2CKPS2 0x40
748 //==============================================================================
751 //==============================================================================
754 extern __at(0x001D) __sfr T2HLT
;
772 unsigned T2MODE0
: 1;
773 unsigned T2MODE1
: 1;
774 unsigned T2MODE2
: 1;
775 unsigned T2MODE3
: 1;
777 unsigned T2CKSYNC
: 1;
778 unsigned T2CKPOL
: 1;
779 unsigned T2PSYNC
: 1;
795 extern __at(0x001D) volatile __T2HLTbits_t T2HLTbits
;
797 #define _T2HLT_MODE0 0x01
798 #define _T2HLT_T2MODE0 0x01
799 #define _T2HLT_MODE1 0x02
800 #define _T2HLT_T2MODE1 0x02
801 #define _T2HLT_MODE2 0x04
802 #define _T2HLT_T2MODE2 0x04
803 #define _T2HLT_MODE3 0x08
804 #define _T2HLT_T2MODE3 0x08
805 #define _T2HLT_CKSYNC 0x20
806 #define _T2HLT_T2CKSYNC 0x20
807 #define _T2HLT_CKPOL 0x40
808 #define _T2HLT_T2CKPOL 0x40
809 #define _T2HLT_PSYNC 0x80
810 #define _T2HLT_T2PSYNC 0x80
812 //==============================================================================
815 //==============================================================================
818 extern __at(0x001E) __sfr T2CLKCON
;
841 extern __at(0x001E) volatile __T2CLKCONbits_t T2CLKCONbits
;
847 //==============================================================================
850 //==============================================================================
853 extern __at(0x001F) __sfr T2RST
;
871 unsigned T2RSEL0
: 1;
872 unsigned T2RSEL1
: 1;
873 unsigned T2RSEL2
: 1;
874 unsigned T2RSEL3
: 1;
894 extern __at(0x001F) volatile __T2RSTbits_t T2RSTbits
;
897 #define _T2RSEL0 0x01
899 #define _T2RSEL1 0x02
901 #define _T2RSEL2 0x04
903 #define _T2RSEL3 0x08
905 //==============================================================================
908 //==============================================================================
911 extern __at(0x008C) __sfr TRISA
;
934 extern __at(0x008C) volatile __TRISAbits_t TRISAbits
;
943 //==============================================================================
946 //==============================================================================
949 extern __at(0x008E) __sfr TRISC
;
972 extern __at(0x008E) volatile __TRISCbits_t TRISCbits
;
981 //==============================================================================
984 //==============================================================================
987 extern __at(0x0091) __sfr PIE1
;
998 unsigned TMR1GIE
: 1;
1001 extern __at(0x0091) volatile __PIE1bits_t PIE1bits
;
1003 #define _TMR1IE 0x01
1004 #define _TMR2IE 0x02
1005 #define _CCP1IE 0x04
1007 #define _TMR1GIE 0x80
1009 //==============================================================================
1012 //==============================================================================
1015 extern __at(0x0092) __sfr PIE2
;
1019 unsigned CCP2IE
: 1;
1020 unsigned TMR4IE
: 1;
1021 unsigned TMR6IE
: 1;
1029 extern __at(0x0092) volatile __PIE2bits_t PIE2bits
;
1031 #define _CCP2IE 0x01
1032 #define _TMR4IE 0x02
1033 #define _TMR6IE 0x04
1037 //==============================================================================
1040 //==============================================================================
1043 extern __at(0x0093) __sfr PIE3
;
1057 extern __at(0x0093) volatile __PIE3bits_t PIE3bits
;
1062 //==============================================================================
1065 //==============================================================================
1068 extern __at(0x0094) __sfr PIE4
;
1072 unsigned SMT1IE
: 1;
1073 unsigned SMT1PRAIE
: 1;
1074 unsigned SMT1PWAIE
: 1;
1075 unsigned SMT2IE
: 1;
1076 unsigned SMT2PRAIE
: 1;
1077 unsigned SMT2PWAIE
: 1;
1079 unsigned SCANIE
: 1;
1082 extern __at(0x0094) volatile __PIE4bits_t PIE4bits
;
1084 #define _SMT1IE 0x01
1085 #define _SMT1PRAIE 0x02
1086 #define _SMT1PWAIE 0x04
1087 #define _SMT2IE 0x08
1088 #define _SMT2PRAIE 0x10
1089 #define _SMT2PWAIE 0x20
1091 #define _SCANIE 0x80
1093 //==============================================================================
1096 //==============================================================================
1099 extern __at(0x0095) __sfr OPTION_REG
;
1109 unsigned TMR0SE
: 1;
1110 unsigned TMR0CS
: 1;
1111 unsigned INTEDG
: 1;
1112 unsigned NOT_WPUEN
: 1;
1132 } __OPTION_REGbits_t
;
1134 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits
;
1140 #define _TMR0SE 0x10
1142 #define _TMR0CS 0x20
1144 #define _INTEDG 0x40
1145 #define _NOT_WPUEN 0x80
1147 //==============================================================================
1150 //==============================================================================
1153 extern __at(0x0096) __sfr PCON
;
1157 unsigned NOT_BOR
: 1;
1158 unsigned NOT_POR
: 1;
1159 unsigned NOT_RI
: 1;
1160 unsigned NOT_RMCLR
: 1;
1161 unsigned NOT_RWDT
: 1;
1162 unsigned NOT_WDTWV
: 1;
1163 unsigned STKUNF
: 1;
1164 unsigned STKOVF
: 1;
1167 extern __at(0x0096) volatile __PCONbits_t PCONbits
;
1169 #define _NOT_BOR 0x01
1170 #define _NOT_POR 0x02
1171 #define _NOT_RI 0x04
1172 #define _NOT_RMCLR 0x08
1173 #define _NOT_RWDT 0x10
1174 #define _NOT_WDTWV 0x20
1175 #define _STKUNF 0x40
1176 #define _STKOVF 0x80
1178 //==============================================================================
1181 //==============================================================================
1184 extern __at(0x0098) __sfr OSCTUNE
;
1207 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits
;
1216 //==============================================================================
1219 //==============================================================================
1222 extern __at(0x0099) __sfr OSCCON
;
1235 unsigned SPLLEN
: 1;
1252 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits
;
1260 #define _SPLLEN 0x80
1262 //==============================================================================
1265 //==============================================================================
1268 extern __at(0x009A) __sfr OSCSTAT
;
1272 unsigned HFIOFS
: 1;
1273 unsigned LFIOFR
: 1;
1274 unsigned MFIOFR
: 1;
1275 unsigned HFIOFL
: 1;
1276 unsigned HFIOFR
: 1;
1282 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits
;
1284 #define _HFIOFS 0x01
1285 #define _LFIOFR 0x02
1286 #define _MFIOFR 0x04
1287 #define _HFIOFL 0x08
1288 #define _HFIOFR 0x10
1291 //==============================================================================
1293 extern __at(0x009B) __sfr ADRES
;
1294 extern __at(0x009B) __sfr ADRESL
;
1295 extern __at(0x009C) __sfr ADRESH
;
1297 //==============================================================================
1300 extern __at(0x009D) __sfr ADCON0
;
1307 unsigned GO_NOT_DONE
: 1;
1348 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits
;
1351 #define _GO_NOT_DONE 0x02
1360 //==============================================================================
1363 //==============================================================================
1366 extern __at(0x009E) __sfr ADCON1
;
1372 unsigned ADPREF0
: 1;
1373 unsigned ADPREF1
: 1;
1384 unsigned ADPREF
: 2;
1396 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits
;
1398 #define _ADPREF0 0x01
1399 #define _ADPREF1 0x02
1405 //==============================================================================
1408 //==============================================================================
1411 extern __at(0x009F) __sfr ADCON2
;
1421 unsigned TRIGSEL0
: 1;
1422 unsigned TRIGSEL1
: 1;
1423 unsigned TRIGSEL2
: 1;
1424 unsigned TRIGSEL3
: 1;
1430 unsigned TRIGSEL
: 4;
1434 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits
;
1436 #define _TRIGSEL0 0x10
1437 #define _TRIGSEL1 0x20
1438 #define _TRIGSEL2 0x40
1439 #define _TRIGSEL3 0x80
1441 //==============================================================================
1444 //==============================================================================
1447 extern __at(0x010C) __sfr LATA
;
1470 extern __at(0x010C) volatile __LATAbits_t LATAbits
;
1479 //==============================================================================
1482 //==============================================================================
1485 extern __at(0x010E) __sfr LATC
;
1508 extern __at(0x010E) volatile __LATCbits_t LATCbits
;
1517 //==============================================================================
1520 //==============================================================================
1523 extern __at(0x0111) __sfr CM1CON0
;
1527 unsigned C1SYNC
: 1;
1537 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits
;
1539 #define _C1SYNC 0x01
1547 //==============================================================================
1550 //==============================================================================
1553 extern __at(0x0112) __sfr CM1CON1
;
1559 unsigned C1NCH0
: 1;
1560 unsigned C1NCH1
: 1;
1561 unsigned C1NCH2
: 1;
1563 unsigned C1PCH0
: 1;
1564 unsigned C1PCH1
: 1;
1565 unsigned C1INTN
: 1;
1566 unsigned C1INTP
: 1;
1583 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits
;
1585 #define _C1NCH0 0x01
1586 #define _C1NCH1 0x02
1587 #define _C1NCH2 0x04
1588 #define _C1PCH0 0x10
1589 #define _C1PCH1 0x20
1590 #define _C1INTN 0x40
1591 #define _C1INTP 0x80
1593 //==============================================================================
1596 //==============================================================================
1599 extern __at(0x0113) __sfr CM2CON0
;
1603 unsigned C2SYNC
: 1;
1613 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits
;
1615 #define _C2SYNC 0x01
1623 //==============================================================================
1626 //==============================================================================
1629 extern __at(0x0114) __sfr CM2CON1
;
1635 unsigned C2NCH0
: 1;
1636 unsigned C2NCH1
: 1;
1637 unsigned C2NCH2
: 1;
1639 unsigned C2PCH0
: 1;
1640 unsigned C2PCH1
: 1;
1641 unsigned C2INTN
: 1;
1642 unsigned C2INTP
: 1;
1659 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits
;
1661 #define _C2NCH0 0x01
1662 #define _C2NCH1 0x02
1663 #define _C2NCH2 0x04
1664 #define _C2PCH0 0x10
1665 #define _C2PCH1 0x20
1666 #define _C2INTN 0x40
1667 #define _C2INTP 0x80
1669 //==============================================================================
1672 //==============================================================================
1675 extern __at(0x0115) __sfr CMOUT
;
1679 unsigned MC1OUT
: 1;
1680 unsigned MC2OUT
: 1;
1689 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits
;
1691 #define _MC1OUT 0x01
1692 #define _MC2OUT 0x02
1694 //==============================================================================
1697 //==============================================================================
1700 extern __at(0x0116) __sfr BORCON
;
1704 unsigned BORRDY
: 1;
1711 unsigned SBOREN
: 1;
1714 extern __at(0x0116) volatile __BORCONbits_t BORCONbits
;
1716 #define _BORRDY 0x01
1718 #define _SBOREN 0x80
1720 //==============================================================================
1723 //==============================================================================
1726 extern __at(0x0117) __sfr FVRCON
;
1732 unsigned ADFVR0
: 1;
1733 unsigned ADFVR1
: 1;
1734 unsigned CDAFVR0
: 1;
1735 unsigned CDAFVR1
: 1;
1738 unsigned FVRRDY
: 1;
1751 unsigned CDAFVR
: 2;
1756 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits
;
1758 #define _ADFVR0 0x01
1759 #define _ADFVR1 0x02
1760 #define _CDAFVR0 0x04
1761 #define _CDAFVR1 0x08
1764 #define _FVRRDY 0x40
1767 //==============================================================================
1770 //==============================================================================
1773 extern __at(0x0118) __sfr DAC1CON0
;
1781 unsigned D1PSS0
: 1;
1782 unsigned D1PSS1
: 1;
1784 unsigned DAC1OE
: 1;
1786 unsigned DAC1EN
: 1;
1797 extern __at(0x0118) volatile __DAC1CON0bits_t DAC1CON0bits
;
1799 #define _D1PSS0 0x04
1800 #define _D1PSS1 0x08
1801 #define _DAC1OE 0x20
1802 #define _DAC1EN 0x80
1804 //==============================================================================
1807 //==============================================================================
1810 extern __at(0x0119) __sfr DAC1CON1
;
1814 unsigned DAC1R0
: 1;
1815 unsigned DAC1R1
: 1;
1816 unsigned DAC1R2
: 1;
1817 unsigned DAC1R3
: 1;
1818 unsigned DAC1R4
: 1;
1819 unsigned DAC1R5
: 1;
1820 unsigned DAC1R6
: 1;
1821 unsigned DAC1R7
: 1;
1824 extern __at(0x0119) volatile __DAC1CON1bits_t DAC1CON1bits
;
1826 #define _DAC1R0 0x01
1827 #define _DAC1R1 0x02
1828 #define _DAC1R2 0x04
1829 #define _DAC1R3 0x08
1830 #define _DAC1R4 0x10
1831 #define _DAC1R5 0x20
1832 #define _DAC1R6 0x40
1833 #define _DAC1R7 0x80
1835 //==============================================================================
1838 //==============================================================================
1841 extern __at(0x011C) __sfr ZCD1CON
;
1845 unsigned ZCD1INTN
: 1;
1846 unsigned ZCD1INTP
: 1;
1849 unsigned ZCD1POL
: 1;
1850 unsigned ZCD1OUT
: 1;
1851 unsigned ZCD1OE
: 1;
1852 unsigned ZCD1EN
: 1;
1855 extern __at(0x011C) volatile __ZCD1CONbits_t ZCD1CONbits
;
1857 #define _ZCD1INTN 0x01
1858 #define _ZCD1INTP 0x02
1859 #define _ZCD1POL 0x10
1860 #define _ZCD1OUT 0x20
1861 #define _ZCD1OE 0x40
1862 #define _ZCD1EN 0x80
1864 //==============================================================================
1867 //==============================================================================
1870 extern __at(0x011D) __sfr APFCON
;
1875 unsigned CCP2SEL
: 1;
1877 unsigned T1GSEL
: 1;
1884 extern __at(0x011D) volatile __APFCONbits_t APFCONbits
;
1886 #define _CCP2SEL 0x02
1887 #define _T1GSEL 0x08
1889 //==============================================================================
1892 //==============================================================================
1895 extern __at(0x018C) __sfr ANSELA
;
1909 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits
;
1916 //==============================================================================
1919 //==============================================================================
1922 extern __at(0x018E) __sfr ANSELC
;
1945 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits
;
1952 //==============================================================================
1954 extern __at(0x0191) __sfr PMADR
;
1955 extern __at(0x0191) __sfr PMADRL
;
1956 extern __at(0x0192) __sfr PMADRH
;
1957 extern __at(0x0193) __sfr PMDAT
;
1958 extern __at(0x0193) __sfr PMDATL
;
1959 extern __at(0x0194) __sfr PMDATH
;
1961 //==============================================================================
1964 extern __at(0x0195) __sfr PMCON1
;
1978 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits
;
1988 //==============================================================================
1990 extern __at(0x0196) __sfr PMCON2
;
1992 //==============================================================================
1995 extern __at(0x020C) __sfr WPUA
;
2018 extern __at(0x020C) volatile __WPUAbits_t WPUAbits
;
2027 //==============================================================================
2030 //==============================================================================
2033 extern __at(0x020E) __sfr WPUC
;
2056 extern __at(0x020E) volatile __WPUCbits_t WPUCbits
;
2065 //==============================================================================
2068 //==============================================================================
2071 extern __at(0x028C) __sfr ODCONA
;
2085 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits
;
2093 //==============================================================================
2096 //==============================================================================
2099 extern __at(0x028E) __sfr ODCONC
;
2122 extern __at(0x028E) volatile __ODCONCbits_t ODCONCbits
;
2131 //==============================================================================
2133 extern __at(0x0291) __sfr CCPR1
;
2134 extern __at(0x0291) __sfr CCPR1L
;
2135 extern __at(0x0292) __sfr CCPR1H
;
2137 //==============================================================================
2140 extern __at(0x0293) __sfr CCP1CON
;
2158 unsigned CCP1MODE0
: 1;
2159 unsigned CCP1MODE1
: 1;
2160 unsigned CCP1MODE2
: 1;
2161 unsigned CCP1MODE3
: 1;
2162 unsigned CCP1FMT
: 1;
2163 unsigned CCP1OUT
: 1;
2164 unsigned CCP1OE
: 1;
2165 unsigned CCP1EN
: 1;
2176 unsigned CCP1MODE
: 4;
2181 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits
;
2184 #define _CCP1MODE0 0x01
2186 #define _CCP1MODE1 0x02
2188 #define _CCP1MODE2 0x04
2190 #define _CCP1MODE3 0x08
2192 #define _CCP1FMT 0x10
2194 #define _CCP1OUT 0x20
2196 #define _CCP1OE 0x40
2198 #define _CCP1EN 0x80
2200 //==============================================================================
2203 //==============================================================================
2206 extern __at(0x0294) __sfr CCP1CAP
;
2224 unsigned CCP1CTS0
: 1;
2225 unsigned CCP1CTS1
: 1;
2242 unsigned CCP1CTS
: 2;
2247 extern __at(0x0294) volatile __CCP1CAPbits_t CCP1CAPbits
;
2250 #define _CCP1CTS0 0x01
2252 #define _CCP1CTS1 0x02
2254 //==============================================================================
2256 extern __at(0x0298) __sfr CCPR2
;
2257 extern __at(0x0298) __sfr CCPR2L
;
2258 extern __at(0x0299) __sfr CCPR2H
;
2260 //==============================================================================
2263 extern __at(0x029A) __sfr CCP2CON
;
2281 unsigned CCP2MODE0
: 1;
2282 unsigned CCP2MODE1
: 1;
2283 unsigned CCP2MODE2
: 1;
2284 unsigned CCP2MODE3
: 1;
2285 unsigned CCP2FMT
: 1;
2286 unsigned CCP2OUT
: 1;
2287 unsigned CCP2OE
: 1;
2288 unsigned CCP2EN
: 1;
2299 unsigned CCP2MODE
: 4;
2304 extern __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits
;
2306 #define _CCP2CON_MODE0 0x01
2307 #define _CCP2CON_CCP2MODE0 0x01
2308 #define _CCP2CON_MODE1 0x02
2309 #define _CCP2CON_CCP2MODE1 0x02
2310 #define _CCP2CON_MODE2 0x04
2311 #define _CCP2CON_CCP2MODE2 0x04
2312 #define _CCP2CON_MODE3 0x08
2313 #define _CCP2CON_CCP2MODE3 0x08
2314 #define _CCP2CON_FMT 0x10
2315 #define _CCP2CON_CCP2FMT 0x10
2316 #define _CCP2CON_OUT 0x20
2317 #define _CCP2CON_CCP2OUT 0x20
2318 #define _CCP2CON_OE 0x40
2319 #define _CCP2CON_CCP2OE 0x40
2320 #define _CCP2CON_EN 0x80
2321 #define _CCP2CON_CCP2EN 0x80
2323 //==============================================================================
2326 //==============================================================================
2329 extern __at(0x029B) __sfr CCP2CAP
;
2347 unsigned CCP2CTS0
: 1;
2348 unsigned CCP2CTS1
: 1;
2365 unsigned CCP2CTS
: 2;
2370 extern __at(0x029B) volatile __CCP2CAPbits_t CCP2CAPbits
;
2372 #define _CCP2CAP_CTS0 0x01
2373 #define _CCP2CAP_CCP2CTS0 0x01
2374 #define _CCP2CAP_CTS1 0x02
2375 #define _CCP2CAP_CCP2CTS1 0x02
2377 //==============================================================================
2380 //==============================================================================
2383 extern __at(0x029E) __sfr CCPTMRS
;
2389 unsigned CCP1TSEL0
: 1;
2390 unsigned CCP1TSEL1
: 1;
2391 unsigned CCP2TSEL0
: 1;
2392 unsigned CCP2TSEL1
: 1;
2401 unsigned CCP1TSEL
: 2;
2408 unsigned CCP2TSEL
: 2;
2413 extern __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits
;
2415 #define _CCP1TSEL0 0x01
2416 #define _CCP1TSEL1 0x02
2417 #define _CCP2TSEL0 0x04
2418 #define _CCP2TSEL1 0x08
2420 //==============================================================================
2423 //==============================================================================
2426 extern __at(0x030C) __sfr SLRCONA
;
2440 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits
;
2448 //==============================================================================
2451 //==============================================================================
2454 extern __at(0x030E) __sfr SLRCONC
;
2477 extern __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits
;
2486 //==============================================================================
2489 //==============================================================================
2492 extern __at(0x038C) __sfr INLVLA
;
2498 unsigned INLVLA0
: 1;
2499 unsigned INLVLA1
: 1;
2500 unsigned INLVLA2
: 1;
2501 unsigned INLVLA3
: 1;
2502 unsigned INLVLA4
: 1;
2503 unsigned INLVLA5
: 1;
2510 unsigned INLVLA
: 6;
2515 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits
;
2517 #define _INLVLA0 0x01
2518 #define _INLVLA1 0x02
2519 #define _INLVLA2 0x04
2520 #define _INLVLA3 0x08
2521 #define _INLVLA4 0x10
2522 #define _INLVLA5 0x20
2524 //==============================================================================
2527 //==============================================================================
2530 extern __at(0x038E) __sfr INLVLC
;
2536 unsigned INLVLC0
: 1;
2537 unsigned INLVLC1
: 1;
2538 unsigned INLVLC2
: 1;
2539 unsigned INLVLC3
: 1;
2540 unsigned INLVLC4
: 1;
2541 unsigned INLVLC5
: 1;
2548 unsigned INLVLC
: 6;
2553 extern __at(0x038E) volatile __INLVLCbits_t INLVLCbits
;
2555 #define _INLVLC0 0x01
2556 #define _INLVLC1 0x02
2557 #define _INLVLC2 0x04
2558 #define _INLVLC3 0x08
2559 #define _INLVLC4 0x10
2560 #define _INLVLC5 0x20
2562 //==============================================================================
2565 //==============================================================================
2568 extern __at(0x0391) __sfr IOCAP
;
2574 unsigned IOCAP0
: 1;
2575 unsigned IOCAP1
: 1;
2576 unsigned IOCAP2
: 1;
2577 unsigned IOCAP3
: 1;
2578 unsigned IOCAP4
: 1;
2579 unsigned IOCAP5
: 1;
2591 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits
;
2593 #define _IOCAP0 0x01
2594 #define _IOCAP1 0x02
2595 #define _IOCAP2 0x04
2596 #define _IOCAP3 0x08
2597 #define _IOCAP4 0x10
2598 #define _IOCAP5 0x20
2600 //==============================================================================
2603 //==============================================================================
2606 extern __at(0x0392) __sfr IOCAN
;
2612 unsigned IOCAN0
: 1;
2613 unsigned IOCAN1
: 1;
2614 unsigned IOCAN2
: 1;
2615 unsigned IOCAN3
: 1;
2616 unsigned IOCAN4
: 1;
2617 unsigned IOCAN5
: 1;
2629 extern __at(0x0392) volatile __IOCANbits_t IOCANbits
;
2631 #define _IOCAN0 0x01
2632 #define _IOCAN1 0x02
2633 #define _IOCAN2 0x04
2634 #define _IOCAN3 0x08
2635 #define _IOCAN4 0x10
2636 #define _IOCAN5 0x20
2638 //==============================================================================
2641 //==============================================================================
2644 extern __at(0x0393) __sfr IOCAF
;
2650 unsigned IOCAF0
: 1;
2651 unsigned IOCAF1
: 1;
2652 unsigned IOCAF2
: 1;
2653 unsigned IOCAF3
: 1;
2654 unsigned IOCAF4
: 1;
2655 unsigned IOCAF5
: 1;
2667 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits
;
2669 #define _IOCAF0 0x01
2670 #define _IOCAF1 0x02
2671 #define _IOCAF2 0x04
2672 #define _IOCAF3 0x08
2673 #define _IOCAF4 0x10
2674 #define _IOCAF5 0x20
2676 //==============================================================================
2679 //==============================================================================
2682 extern __at(0x0397) __sfr IOCCP
;
2688 unsigned IOCCP0
: 1;
2689 unsigned IOCCP1
: 1;
2690 unsigned IOCCP2
: 1;
2691 unsigned IOCCP3
: 1;
2692 unsigned IOCCP4
: 1;
2693 unsigned IOCCP5
: 1;
2705 extern __at(0x0397) volatile __IOCCPbits_t IOCCPbits
;
2707 #define _IOCCP0 0x01
2708 #define _IOCCP1 0x02
2709 #define _IOCCP2 0x04
2710 #define _IOCCP3 0x08
2711 #define _IOCCP4 0x10
2712 #define _IOCCP5 0x20
2714 //==============================================================================
2717 //==============================================================================
2720 extern __at(0x0398) __sfr IOCCN
;
2726 unsigned IOCCN0
: 1;
2727 unsigned IOCCN1
: 1;
2728 unsigned IOCCN2
: 1;
2729 unsigned IOCCN3
: 1;
2730 unsigned IOCCN4
: 1;
2731 unsigned IOCCN5
: 1;
2743 extern __at(0x0398) volatile __IOCCNbits_t IOCCNbits
;
2745 #define _IOCCN0 0x01
2746 #define _IOCCN1 0x02
2747 #define _IOCCN2 0x04
2748 #define _IOCCN3 0x08
2749 #define _IOCCN4 0x10
2750 #define _IOCCN5 0x20
2752 //==============================================================================
2755 //==============================================================================
2758 extern __at(0x0399) __sfr IOCCF
;
2764 unsigned IOCCF0
: 1;
2765 unsigned IOCCF1
: 1;
2766 unsigned IOCCF2
: 1;
2767 unsigned IOCCF3
: 1;
2768 unsigned IOCCF4
: 1;
2769 unsigned IOCCF5
: 1;
2781 extern __at(0x0399) volatile __IOCCFbits_t IOCCFbits
;
2783 #define _IOCCF0 0x01
2784 #define _IOCCF1 0x02
2785 #define _IOCCF2 0x04
2786 #define _IOCCF3 0x08
2787 #define _IOCCF4 0x10
2788 #define _IOCCF5 0x20
2790 //==============================================================================
2792 extern __at(0x0413) __sfr T4TMR
;
2793 extern __at(0x0413) __sfr TMR4
;
2794 extern __at(0x0414) __sfr PR4
;
2795 extern __at(0x0414) __sfr T4PR
;
2797 //==============================================================================
2800 extern __at(0x0415) __sfr T4CON
;
2806 unsigned T4OUTPS0
: 1;
2807 unsigned T4OUTPS1
: 1;
2808 unsigned T4OUTPS2
: 1;
2809 unsigned T4OUTPS3
: 1;
2810 unsigned T4CKPS0
: 1;
2811 unsigned T4CKPS1
: 1;
2812 unsigned T4CKPS2
: 1;
2818 unsigned OUTPS0
: 1;
2819 unsigned OUTPS1
: 1;
2820 unsigned OUTPS2
: 1;
2821 unsigned OUTPS3
: 1;
2837 unsigned TMR4ON
: 1;
2842 unsigned T4OUTPS
: 4;
2862 unsigned T4CKPS
: 3;
2867 extern __at(0x0415) volatile __T4CONbits_t T4CONbits
;
2869 #define _T4CON_T4OUTPS0 0x01
2870 #define _T4CON_OUTPS0 0x01
2871 #define _T4CON_T4OUTPS1 0x02
2872 #define _T4CON_OUTPS1 0x02
2873 #define _T4CON_T4OUTPS2 0x04
2874 #define _T4CON_OUTPS2 0x04
2875 #define _T4CON_T4OUTPS3 0x08
2876 #define _T4CON_OUTPS3 0x08
2877 #define _T4CON_T4CKPS0 0x10
2878 #define _T4CON_CKPS0 0x10
2879 #define _T4CON_T4CKPS1 0x20
2880 #define _T4CON_CKPS1 0x20
2881 #define _T4CON_T4CKPS2 0x40
2882 #define _T4CON_CKPS2 0x40
2883 #define _T4CON_ON 0x80
2884 #define _T4CON_T4ON 0x80
2885 #define _T4CON_TMR4ON 0x80
2887 //==============================================================================
2890 //==============================================================================
2893 extern __at(0x0416) __sfr T4HLT
;
2904 unsigned CKSYNC
: 1;
2911 unsigned T4MODE0
: 1;
2912 unsigned T4MODE1
: 1;
2913 unsigned T4MODE2
: 1;
2914 unsigned T4MODE3
: 1;
2916 unsigned T4CKSYNC
: 1;
2917 unsigned T4CKPOL
: 1;
2918 unsigned T4PSYNC
: 1;
2929 unsigned T4MODE
: 4;
2934 extern __at(0x0416) volatile __T4HLTbits_t T4HLTbits
;
2936 #define _T4HLT_MODE0 0x01
2937 #define _T4HLT_T4MODE0 0x01
2938 #define _T4HLT_MODE1 0x02
2939 #define _T4HLT_T4MODE1 0x02
2940 #define _T4HLT_MODE2 0x04
2941 #define _T4HLT_T4MODE2 0x04
2942 #define _T4HLT_MODE3 0x08
2943 #define _T4HLT_T4MODE3 0x08
2944 #define _T4HLT_CKSYNC 0x20
2945 #define _T4HLT_T4CKSYNC 0x20
2946 #define _T4HLT_CKPOL 0x40
2947 #define _T4HLT_T4CKPOL 0x40
2948 #define _T4HLT_PSYNC 0x80
2949 #define _T4HLT_T4PSYNC 0x80
2951 //==============================================================================
2954 //==============================================================================
2957 extern __at(0x0417) __sfr T4CLKCON
;
2980 extern __at(0x0417) volatile __T4CLKCONbits_t T4CLKCONbits
;
2986 //==============================================================================
2989 //==============================================================================
2992 extern __at(0x0418) __sfr T4RST
;
3010 unsigned T4RSEL0
: 1;
3011 unsigned T4RSEL1
: 1;
3012 unsigned T4RSEL2
: 1;
3013 unsigned T4RSEL3
: 1;
3022 unsigned T4RSEL
: 4;
3033 extern __at(0x0418) volatile __T4RSTbits_t T4RSTbits
;
3035 #define _T4RST_RSEL0 0x01
3036 #define _T4RST_T4RSEL0 0x01
3037 #define _T4RST_RSEL1 0x02
3038 #define _T4RST_T4RSEL1 0x02
3039 #define _T4RST_RSEL2 0x04
3040 #define _T4RST_T4RSEL2 0x04
3041 #define _T4RST_RSEL3 0x08
3042 #define _T4RST_T4RSEL3 0x08
3044 //==============================================================================
3046 extern __at(0x041A) __sfr T6TMR
;
3047 extern __at(0x041A) __sfr TMR6
;
3048 extern __at(0x041B) __sfr PR6
;
3049 extern __at(0x041B) __sfr T6PR
;
3051 //==============================================================================
3054 extern __at(0x041C) __sfr T6CON
;
3060 unsigned T6OUTPS0
: 1;
3061 unsigned T6OUTPS1
: 1;
3062 unsigned T6OUTPS2
: 1;
3063 unsigned T6OUTPS3
: 1;
3064 unsigned T6CKPS0
: 1;
3065 unsigned T6CKPS1
: 1;
3066 unsigned T6CKPS2
: 1;
3072 unsigned OUTPS0
: 1;
3073 unsigned OUTPS1
: 1;
3074 unsigned OUTPS2
: 1;
3075 unsigned OUTPS3
: 1;
3091 unsigned TMR6ON
: 1;
3102 unsigned T6OUTPS
: 4;
3109 unsigned T6CKPS
: 3;
3121 extern __at(0x041C) volatile __T6CONbits_t T6CONbits
;
3123 #define _T6CON_T6OUTPS0 0x01
3124 #define _T6CON_OUTPS0 0x01
3125 #define _T6CON_T6OUTPS1 0x02
3126 #define _T6CON_OUTPS1 0x02
3127 #define _T6CON_T6OUTPS2 0x04
3128 #define _T6CON_OUTPS2 0x04
3129 #define _T6CON_T6OUTPS3 0x08
3130 #define _T6CON_OUTPS3 0x08
3131 #define _T6CON_T6CKPS0 0x10
3132 #define _T6CON_CKPS0 0x10
3133 #define _T6CON_T6CKPS1 0x20
3134 #define _T6CON_CKPS1 0x20
3135 #define _T6CON_T6CKPS2 0x40
3136 #define _T6CON_CKPS2 0x40
3137 #define _T6CON_ON 0x80
3138 #define _T6CON_T6ON 0x80
3139 #define _T6CON_TMR6ON 0x80
3141 //==============================================================================
3144 //==============================================================================
3147 extern __at(0x041D) __sfr T6HLT
;
3158 unsigned CKSYNC
: 1;
3165 unsigned T6MODE0
: 1;
3166 unsigned T6MODE1
: 1;
3167 unsigned T6MODE2
: 1;
3168 unsigned T6MODE3
: 1;
3170 unsigned T6CKSYNC
: 1;
3171 unsigned T6CKPOL
: 1;
3172 unsigned T6PSYNC
: 1;
3183 unsigned T6MODE
: 4;
3188 extern __at(0x041D) volatile __T6HLTbits_t T6HLTbits
;
3190 #define _T6HLT_MODE0 0x01
3191 #define _T6HLT_T6MODE0 0x01
3192 #define _T6HLT_MODE1 0x02
3193 #define _T6HLT_T6MODE1 0x02
3194 #define _T6HLT_MODE2 0x04
3195 #define _T6HLT_T6MODE2 0x04
3196 #define _T6HLT_MODE3 0x08
3197 #define _T6HLT_T6MODE3 0x08
3198 #define _T6HLT_CKSYNC 0x20
3199 #define _T6HLT_T6CKSYNC 0x20
3200 #define _T6HLT_CKPOL 0x40
3201 #define _T6HLT_T6CKPOL 0x40
3202 #define _T6HLT_PSYNC 0x80
3203 #define _T6HLT_T6PSYNC 0x80
3205 //==============================================================================
3208 //==============================================================================
3211 extern __at(0x041E) __sfr T6CLKCON
;
3234 extern __at(0x041E) volatile __T6CLKCONbits_t T6CLKCONbits
;
3240 //==============================================================================
3243 //==============================================================================
3246 extern __at(0x041F) __sfr T6RST
;
3264 unsigned T6RSEL0
: 1;
3265 unsigned T6RSEL1
: 1;
3266 unsigned T6RSEL2
: 1;
3267 unsigned T6RSEL3
: 1;
3282 unsigned T6RSEL
: 4;
3287 extern __at(0x041F) volatile __T6RSTbits_t T6RSTbits
;
3289 #define _T6RST_RSEL0 0x01
3290 #define _T6RST_T6RSEL0 0x01
3291 #define _T6RST_RSEL1 0x02
3292 #define _T6RST_T6RSEL1 0x02
3293 #define _T6RST_RSEL2 0x04
3294 #define _T6RST_T6RSEL2 0x04
3295 #define _T6RST_RSEL3 0x08
3296 #define _T6RST_T6RSEL3 0x08
3298 //==============================================================================
3301 //==============================================================================
3304 extern __at(0x0691) __sfr CWG1DBR
;
3322 unsigned CWG1DBR0
: 1;
3323 unsigned CWG1DBR1
: 1;
3324 unsigned CWG1DBR2
: 1;
3325 unsigned CWG1DBR3
: 1;
3326 unsigned CWG1DBR4
: 1;
3327 unsigned CWG1DBR5
: 1;
3340 unsigned CWG1DBR
: 6;
3345 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits
;
3348 #define _CWG1DBR0 0x01
3350 #define _CWG1DBR1 0x02
3352 #define _CWG1DBR2 0x04
3354 #define _CWG1DBR3 0x08
3356 #define _CWG1DBR4 0x10
3358 #define _CWG1DBR5 0x20
3360 //==============================================================================
3363 //==============================================================================
3366 extern __at(0x0692) __sfr CWG1DBF
;
3384 unsigned CWG1DBF0
: 1;
3385 unsigned CWG1DBF1
: 1;
3386 unsigned CWG1DBF2
: 1;
3387 unsigned CWG1DBF3
: 1;
3388 unsigned CWG1DBF4
: 1;
3389 unsigned CWG1DBF5
: 1;
3402 unsigned CWG1DBF
: 6;
3407 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits
;
3410 #define _CWG1DBF0 0x01
3412 #define _CWG1DBF1 0x02
3414 #define _CWG1DBF2 0x04
3416 #define _CWG1DBF3 0x08
3418 #define _CWG1DBF4 0x10
3420 #define _CWG1DBF5 0x20
3422 //==============================================================================
3425 //==============================================================================
3428 extern __at(0x0693) __sfr CWG1AS0
;
3441 unsigned SHUTDOWN
: 1;
3448 unsigned CWG1LSAC0
: 1;
3449 unsigned CWG1LSAC1
: 1;
3450 unsigned CWG1LSBD0
: 1;
3451 unsigned CWG1LSBD1
: 1;
3452 unsigned CWG1REN
: 1;
3453 unsigned CWG1SHUTDOWN
: 1;
3459 unsigned CWG1LSAC
: 2;
3480 unsigned CWG1LSBD
: 2;
3485 extern __at(0x0693) volatile __CWG1AS0bits_t CWG1AS0bits
;
3488 #define _CWG1LSAC0 0x04
3490 #define _CWG1LSAC1 0x08
3492 #define _CWG1LSBD0 0x10
3494 #define _CWG1LSBD1 0x20
3496 #define _CWG1REN 0x40
3497 #define _SHUTDOWN 0x80
3498 #define _CWG1SHUTDOWN 0x80
3500 //==============================================================================
3503 //==============================================================================
3506 extern __at(0x0694) __sfr CWG1AS1
;
3516 unsigned TMR2AS
: 1;
3517 unsigned TMR4AS
: 1;
3518 unsigned TMR6AS
: 1;
3524 unsigned CWG1INAS
: 1;
3525 unsigned CWG1C1AS
: 1;
3526 unsigned CWG1C2AS
: 1;
3528 unsigned CWG1TMR2AS
: 1;
3529 unsigned CWG1TMR4AS
: 1;
3530 unsigned CWG1TMR6AS
: 1;
3535 extern __at(0x0694) volatile __CWG1AS1bits_t CWG1AS1bits
;
3538 #define _CWG1INAS 0x01
3540 #define _CWG1C1AS 0x02
3542 #define _CWG1C2AS 0x04
3543 #define _TMR2AS 0x10
3544 #define _CWG1TMR2AS 0x10
3545 #define _TMR4AS 0x20
3546 #define _CWG1TMR4AS 0x20
3547 #define _TMR6AS 0x40
3548 #define _CWG1TMR6AS 0x40
3550 //==============================================================================
3553 //==============================================================================
3556 extern __at(0x0695) __sfr CWG1OCON0
;
3574 unsigned CWG1STRA
: 1;
3575 unsigned CWG1STRB
: 1;
3576 unsigned CWG1STRC
: 1;
3577 unsigned CWG1STRD
: 1;
3578 unsigned CWG1OVRA
: 1;
3579 unsigned CWG1OVRB
: 1;
3580 unsigned CWG1OVRC
: 1;
3581 unsigned CWG1OVRD
: 1;
3583 } __CWG1OCON0bits_t
;
3585 extern __at(0x0695) volatile __CWG1OCON0bits_t CWG1OCON0bits
;
3588 #define _CWG1STRA 0x01
3590 #define _CWG1STRB 0x02
3592 #define _CWG1STRC 0x04
3594 #define _CWG1STRD 0x08
3596 #define _CWG1OVRA 0x10
3598 #define _CWG1OVRB 0x20
3600 #define _CWG1OVRC 0x40
3602 #define _CWG1OVRD 0x80
3604 //==============================================================================
3607 //==============================================================================
3610 extern __at(0x0696) __sfr CWG1CON0
;
3628 unsigned CWG1MODE0
: 1;
3629 unsigned CWG1MODE1
: 1;
3630 unsigned CWG1MODE2
: 1;
3634 unsigned CWG1LD
: 1;
3647 unsigned CWG1EN
: 1;
3658 unsigned CWG1MODE
: 3;
3663 extern __at(0x0696) volatile __CWG1CON0bits_t CWG1CON0bits
;
3665 #define _CWG1CON0_MODE0 0x01
3666 #define _CWG1CON0_CWG1MODE0 0x01
3667 #define _CWG1CON0_MODE1 0x02
3668 #define _CWG1CON0_CWG1MODE1 0x02
3669 #define _CWG1CON0_MODE2 0x04
3670 #define _CWG1CON0_CWG1MODE2 0x04
3671 #define _CWG1CON0_LD 0x40
3672 #define _CWG1CON0_CWG1LD 0x40
3673 #define _CWG1CON0_EN 0x80
3674 #define _CWG1CON0_G1EN 0x80
3675 #define _CWG1CON0_CWG1EN 0x80
3677 //==============================================================================
3680 //==============================================================================
3683 extern __at(0x0697) __sfr CWG1CON1
;
3701 unsigned CWG1POLA
: 1;
3702 unsigned CWG1POLB
: 1;
3703 unsigned CWG1POLC
: 1;
3704 unsigned CWG1POLD
: 1;
3706 unsigned CWG1IN
: 1;
3712 extern __at(0x0697) volatile __CWG1CON1bits_t CWG1CON1bits
;
3715 #define _CWG1POLA 0x01
3717 #define _CWG1POLB 0x02
3719 #define _CWG1POLC 0x04
3721 #define _CWG1POLD 0x08
3723 #define _CWG1IN 0x20
3725 //==============================================================================
3728 //==============================================================================
3731 extern __at(0x0698) __sfr CWG1OCON1
;
3749 unsigned CWG1OEA
: 1;
3750 unsigned CWG1OEB
: 1;
3751 unsigned CWG1OEC
: 1;
3752 unsigned CWG1OED
: 1;
3758 } __CWG1OCON1bits_t
;
3760 extern __at(0x0698) volatile __CWG1OCON1bits_t CWG1OCON1bits
;
3763 #define _CWG1OEA 0x01
3765 #define _CWG1OEB 0x02
3767 #define _CWG1OEC 0x04
3769 #define _CWG1OED 0x08
3771 //==============================================================================
3774 //==============================================================================
3777 extern __at(0x0699) __sfr CWG1CLKCON
;
3795 unsigned CWG1CS
: 1;
3804 } __CWG1CLKCONbits_t
;
3806 extern __at(0x0699) volatile __CWG1CLKCONbits_t CWG1CLKCONbits
;
3809 #define _CWG1CS 0x01
3811 //==============================================================================
3814 //==============================================================================
3817 extern __at(0x069A) __sfr CWG1ISM
;
3835 unsigned CWG1IS0
: 1;
3836 unsigned CWG1IS1
: 1;
3837 unsigned CWG1IS2
: 1;
3847 unsigned CWG1IS
: 3;
3858 extern __at(0x069A) volatile __CWG1ISMbits_t CWG1ISMbits
;
3861 #define _CWG1IS0 0x01
3863 #define _CWG1IS1 0x02
3865 #define _CWG1IS2 0x04
3867 //==============================================================================
3870 //==============================================================================
3873 extern __at(0x0711) __sfr WDTCON0
;
3880 unsigned WDTPS0
: 1;
3881 unsigned WDTPS1
: 1;
3882 unsigned WDTPS2
: 1;
3883 unsigned WDTPS3
: 1;
3884 unsigned WDTPS4
: 1;
3891 unsigned SWDTEN
: 1;
3903 unsigned WDTSEN
: 1;
3921 extern __at(0x0711) volatile __WDTCON0bits_t WDTCON0bits
;
3924 #define _SWDTEN 0x01
3925 #define _WDTSEN 0x01
3926 #define _WDTPS0 0x02
3927 #define _WDTPS1 0x04
3928 #define _WDTPS2 0x08
3929 #define _WDTPS3 0x10
3930 #define _WDTPS4 0x20
3932 //==============================================================================
3935 //==============================================================================
3938 extern __at(0x0712) __sfr WDTCON1
;
3944 unsigned WINDOW0
: 1;
3945 unsigned WINDOW1
: 1;
3946 unsigned WINDOW2
: 1;
3948 unsigned WDTCS0
: 1;
3949 unsigned WDTCS1
: 1;
3950 unsigned WDTCS2
: 1;
3956 unsigned WDTWINDOW0
: 1;
3957 unsigned WDTWINDOW1
: 1;
3958 unsigned WDTWINDOW2
: 1;
3968 unsigned WDTWINDOW
: 3;
3974 unsigned WINDOW
: 3;
3986 extern __at(0x0712) volatile __WDTCON1bits_t WDTCON1bits
;
3988 #define _WINDOW0 0x01
3989 #define _WDTWINDOW0 0x01
3990 #define _WINDOW1 0x02
3991 #define _WDTWINDOW1 0x02
3992 #define _WINDOW2 0x04
3993 #define _WDTWINDOW2 0x04
3994 #define _WDTCS0 0x10
3995 #define _WDTCS1 0x20
3996 #define _WDTCS2 0x40
3998 //==============================================================================
4001 //==============================================================================
4004 extern __at(0x0713) __sfr WDTPSL
;
4010 unsigned PSCNT0
: 1;
4011 unsigned PSCNT1
: 1;
4012 unsigned PSCNT2
: 1;
4013 unsigned PSCNT3
: 1;
4014 unsigned PSCNT4
: 1;
4015 unsigned PSCNT5
: 1;
4016 unsigned PSCNT6
: 1;
4017 unsigned PSCNT7
: 1;
4022 unsigned WDTPSCNT0
: 1;
4023 unsigned WDTPSCNT1
: 1;
4024 unsigned WDTPSCNT2
: 1;
4025 unsigned WDTPSCNT3
: 1;
4026 unsigned WDTPSCNT4
: 1;
4027 unsigned WDTPSCNT5
: 1;
4028 unsigned WDTPSCNT6
: 1;
4029 unsigned WDTPSCNT7
: 1;
4033 extern __at(0x0713) volatile __WDTPSLbits_t WDTPSLbits
;
4035 #define _PSCNT0 0x01
4036 #define _WDTPSCNT0 0x01
4037 #define _PSCNT1 0x02
4038 #define _WDTPSCNT1 0x02
4039 #define _PSCNT2 0x04
4040 #define _WDTPSCNT2 0x04
4041 #define _PSCNT3 0x08
4042 #define _WDTPSCNT3 0x08
4043 #define _PSCNT4 0x10
4044 #define _WDTPSCNT4 0x10
4045 #define _PSCNT5 0x20
4046 #define _WDTPSCNT5 0x20
4047 #define _PSCNT6 0x40
4048 #define _WDTPSCNT6 0x40
4049 #define _PSCNT7 0x80
4050 #define _WDTPSCNT7 0x80
4052 //==============================================================================
4055 //==============================================================================
4058 extern __at(0x0714) __sfr WDTPSH
;
4064 unsigned PSCNT8
: 1;
4065 unsigned PSCNT9
: 1;
4066 unsigned PSCNT10
: 1;
4067 unsigned PSCNT11
: 1;
4068 unsigned PSCNT12
: 1;
4069 unsigned PSCNT13
: 1;
4070 unsigned PSCNT14
: 1;
4071 unsigned PSCNT15
: 1;
4076 unsigned WDTPSCNT8
: 1;
4077 unsigned WDTPSCNT9
: 1;
4078 unsigned WDTPSCNT10
: 1;
4079 unsigned WDTPSCNT11
: 1;
4080 unsigned WDTPSCNT12
: 1;
4081 unsigned WDTPSCNT13
: 1;
4082 unsigned WDTPSCNT14
: 1;
4083 unsigned WDTPSCNT15
: 1;
4087 extern __at(0x0714) volatile __WDTPSHbits_t WDTPSHbits
;
4089 #define _PSCNT8 0x01
4090 #define _WDTPSCNT8 0x01
4091 #define _PSCNT9 0x02
4092 #define _WDTPSCNT9 0x02
4093 #define _PSCNT10 0x04
4094 #define _WDTPSCNT10 0x04
4095 #define _PSCNT11 0x08
4096 #define _WDTPSCNT11 0x08
4097 #define _PSCNT12 0x10
4098 #define _WDTPSCNT12 0x10
4099 #define _PSCNT13 0x20
4100 #define _WDTPSCNT13 0x20
4101 #define _PSCNT14 0x40
4102 #define _WDTPSCNT14 0x40
4103 #define _PSCNT15 0x80
4104 #define _WDTPSCNT15 0x80
4106 //==============================================================================
4109 //==============================================================================
4112 extern __at(0x0715) __sfr WDTTMR
;
4118 unsigned PSCNT16
: 1;
4119 unsigned PSCNT17
: 1;
4121 unsigned WDTTMR0
: 1;
4122 unsigned WDTTMR1
: 1;
4123 unsigned WDTTMR2
: 1;
4124 unsigned WDTTMR3
: 1;
4125 unsigned WDTTMR4
: 1;
4130 unsigned WDTPSCNT16
: 1;
4131 unsigned WDTPSCNT17
: 1;
4132 unsigned WDTSTATE
: 1;
4143 unsigned WDTTMR
: 5;
4147 extern __at(0x0715) volatile __WDTTMRbits_t WDTTMRbits
;
4149 #define _PSCNT16 0x01
4150 #define _WDTPSCNT16 0x01
4151 #define _PSCNT17 0x02
4152 #define _WDTPSCNT17 0x02
4154 #define _WDTSTATE 0x04
4155 #define _WDTTMR0 0x08
4156 #define _WDTTMR1 0x10
4157 #define _WDTTMR2 0x20
4158 #define _WDTTMR3 0x40
4159 #define _WDTTMR4 0x80
4161 //==============================================================================
4163 extern __at(0x0718) __sfr SCANLADR
;
4165 //==============================================================================
4168 extern __at(0x0718) __sfr SCANLADRL
;
4186 unsigned SCANLADR0
: 1;
4187 unsigned SCANLADR1
: 1;
4188 unsigned SCANLADR2
: 1;
4189 unsigned SCANLADR3
: 1;
4190 unsigned SCANLADR4
: 1;
4191 unsigned SCANLADR5
: 1;
4192 unsigned SCANLADR6
: 1;
4193 unsigned SCANLADR7
: 1;
4201 } __SCANLADRLbits_t
;
4203 extern __at(0x0718) volatile __SCANLADRLbits_t SCANLADRLbits
;
4206 #define _SCANLADR0 0x01
4208 #define _SCANLADR1 0x02
4210 #define _SCANLADR2 0x04
4212 #define _SCANLADR3 0x08
4214 #define _SCANLADR4 0x10
4216 #define _SCANLADR5 0x20
4218 #define _SCANLADR6 0x40
4220 #define _SCANLADR7 0x80
4222 //==============================================================================
4225 //==============================================================================
4228 extern __at(0x0719) __sfr SCANLADRH
;
4236 unsigned LADR10
: 1;
4237 unsigned LADR11
: 1;
4238 unsigned LADR12
: 1;
4239 unsigned LADR13
: 1;
4240 unsigned LADR14
: 1;
4241 unsigned LADR15
: 1;
4246 unsigned SCANLADR8
: 1;
4247 unsigned SCANLADR9
: 1;
4248 unsigned SCANLADR10
: 1;
4249 unsigned SCANLADR11
: 1;
4250 unsigned SCANLADR12
: 1;
4251 unsigned SCANLADR13
: 1;
4252 unsigned SCANLADR14
: 1;
4253 unsigned SCANLADR15
: 1;
4255 } __SCANLADRHbits_t
;
4257 extern __at(0x0719) volatile __SCANLADRHbits_t SCANLADRHbits
;
4260 #define _SCANLADR8 0x01
4262 #define _SCANLADR9 0x02
4263 #define _LADR10 0x04
4264 #define _SCANLADR10 0x04
4265 #define _LADR11 0x08
4266 #define _SCANLADR11 0x08
4267 #define _LADR12 0x10
4268 #define _SCANLADR12 0x10
4269 #define _LADR13 0x20
4270 #define _SCANLADR13 0x20
4271 #define _LADR14 0x40
4272 #define _SCANLADR14 0x40
4273 #define _LADR15 0x80
4274 #define _SCANLADR15 0x80
4276 //==============================================================================
4278 extern __at(0x071A) __sfr SCANHADR
;
4280 //==============================================================================
4283 extern __at(0x071A) __sfr SCANHADRL
;
4301 unsigned SCANHADR0
: 1;
4302 unsigned SCANHADR1
: 1;
4303 unsigned SCANHADR2
: 1;
4304 unsigned SCANHADR3
: 1;
4305 unsigned SCANHADR4
: 1;
4306 unsigned SCANHADR5
: 1;
4307 unsigned SCANHADR6
: 1;
4308 unsigned SCANHADR7
: 1;
4310 } __SCANHADRLbits_t
;
4312 extern __at(0x071A) volatile __SCANHADRLbits_t SCANHADRLbits
;
4315 #define _SCANHADR0 0x01
4317 #define _SCANHADR1 0x02
4319 #define _SCANHADR2 0x04
4321 #define _SCANHADR3 0x08
4323 #define _SCANHADR4 0x10
4325 #define _SCANHADR5 0x20
4327 #define _SCANHADR6 0x40
4329 #define _SCANHADR7 0x80
4331 //==============================================================================
4334 //==============================================================================
4337 extern __at(0x071B) __sfr SCANHADRH
;
4345 unsigned HADR10
: 1;
4346 unsigned HADR11
: 1;
4347 unsigned HADR12
: 1;
4348 unsigned HADR13
: 1;
4349 unsigned HADR14
: 1;
4350 unsigned HADR15
: 1;
4355 unsigned SCANHADR8
: 1;
4356 unsigned SCANHADR9
: 1;
4357 unsigned SCANHADR10
: 1;
4358 unsigned SCANHADR11
: 1;
4359 unsigned SCANHADR12
: 1;
4360 unsigned SCANHADR13
: 1;
4361 unsigned SCANHADR14
: 1;
4362 unsigned SCANHADR15
: 1;
4364 } __SCANHADRHbits_t
;
4366 extern __at(0x071B) volatile __SCANHADRHbits_t SCANHADRHbits
;
4369 #define _SCANHADR8 0x01
4371 #define _SCANHADR9 0x02
4372 #define _HADR10 0x04
4373 #define _SCANHADR10 0x04
4374 #define _HADR11 0x08
4375 #define _SCANHADR11 0x08
4376 #define _HADR12 0x10
4377 #define _SCANHADR12 0x10
4378 #define _HADR13 0x20
4379 #define _SCANHADR13 0x20
4380 #define _HADR14 0x40
4381 #define _SCANHADR14 0x40
4382 #define _HADR15 0x80
4383 #define _SCANHADR15 0x80
4385 //==============================================================================
4388 //==============================================================================
4391 extern __at(0x071C) __sfr SCANCON0
;
4401 unsigned INVALID
: 1;
4403 unsigned SCANGO
: 1;
4409 unsigned SCANMODE0
: 1;
4410 unsigned SCANMODE1
: 1;
4412 unsigned SCANINTM
: 1;
4413 unsigned SCANINVALID
: 1;
4414 unsigned SCANBUSY
: 1;
4416 unsigned SCANEN
: 1;
4421 unsigned SCANMODE
: 2;
4432 extern __at(0x071C) volatile __SCANCON0bits_t SCANCON0bits
;
4434 #define _SCANCON0_MODE0 0x01
4435 #define _SCANCON0_SCANMODE0 0x01
4436 #define _SCANCON0_MODE1 0x02
4437 #define _SCANCON0_SCANMODE1 0x02
4438 #define _SCANCON0_INTM 0x08
4439 #define _SCANCON0_SCANINTM 0x08
4440 #define _SCANCON0_INVALID 0x10
4441 #define _SCANCON0_SCANINVALID 0x10
4442 #define _SCANCON0_BUSY 0x20
4443 #define _SCANCON0_SCANBUSY 0x20
4444 #define _SCANCON0_SCANGO 0x40
4445 #define _SCANCON0_EN 0x80
4446 #define _SCANCON0_SCANEN 0x80
4448 //==============================================================================
4451 //==============================================================================
4454 extern __at(0x071D) __sfr SCANTRIG
;
4472 unsigned SCANTSEL0
: 1;
4473 unsigned SCANTSEL1
: 1;
4490 unsigned SCANTSEL
: 2;
4495 extern __at(0x071D) volatile __SCANTRIGbits_t SCANTRIGbits
;
4498 #define _SCANTSEL0 0x01
4500 #define _SCANTSEL1 0x02
4502 //==============================================================================
4504 extern __at(0x0791) __sfr CRCDAT
;
4506 //==============================================================================
4509 extern __at(0x0791) __sfr CRCDATL
;
4527 unsigned CRCDAT0
: 1;
4528 unsigned CRCDAT1
: 1;
4529 unsigned CRCDAT2
: 1;
4530 unsigned CRCDAT3
: 1;
4531 unsigned CRCDAT4
: 1;
4532 unsigned CRCDAT5
: 1;
4533 unsigned CRCDAT6
: 1;
4534 unsigned CRDCDAT7
: 1;
4539 unsigned CRCDAT
: 7;
4544 extern __at(0x0791) volatile __CRCDATLbits_t CRCDATLbits
;
4547 #define _CRCDAT0 0x01
4549 #define _CRCDAT1 0x02
4551 #define _CRCDAT2 0x04
4553 #define _CRCDAT3 0x08
4555 #define _CRCDAT4 0x10
4557 #define _CRCDAT5 0x20
4559 #define _CRCDAT6 0x40
4561 #define _CRDCDAT7 0x80
4563 //==============================================================================
4566 //==============================================================================
4569 extern __at(0x0792) __sfr CRCDATH
;
4587 unsigned CRCDAT8
: 1;
4588 unsigned CRCDAT9
: 1;
4589 unsigned CRCDAT10
: 1;
4590 unsigned CRCDAT11
: 1;
4591 unsigned CRCDAT12
: 1;
4592 unsigned CRCDAT13
: 1;
4593 unsigned CRCDAT14
: 1;
4594 unsigned CRCDAT15
: 1;
4598 extern __at(0x0792) volatile __CRCDATHbits_t CRCDATHbits
;
4601 #define _CRCDAT8 0x01
4603 #define _CRCDAT9 0x02
4605 #define _CRCDAT10 0x04
4607 #define _CRCDAT11 0x08
4609 #define _CRCDAT12 0x10
4611 #define _CRCDAT13 0x20
4613 #define _CRCDAT14 0x40
4615 #define _CRCDAT15 0x80
4617 //==============================================================================
4619 extern __at(0x0793) __sfr CRCACC
;
4621 //==============================================================================
4624 extern __at(0x0793) __sfr CRCACCL
;
4642 unsigned CRCACC0
: 1;
4643 unsigned CRCACC1
: 1;
4644 unsigned CRCACC2
: 1;
4645 unsigned CRCACC3
: 1;
4646 unsigned CRCACC4
: 1;
4647 unsigned CRCACC5
: 1;
4648 unsigned CRCACC6
: 1;
4649 unsigned CRCACC7
: 1;
4653 extern __at(0x0793) volatile __CRCACCLbits_t CRCACCLbits
;
4656 #define _CRCACC0 0x01
4658 #define _CRCACC1 0x02
4660 #define _CRCACC2 0x04
4662 #define _CRCACC3 0x08
4664 #define _CRCACC4 0x10
4666 #define _CRCACC5 0x20
4668 #define _CRCACC6 0x40
4670 #define _CRCACC7 0x80
4672 //==============================================================================
4675 //==============================================================================
4678 extern __at(0x0794) __sfr CRCACCH
;
4696 unsigned CRCACC8
: 1;
4697 unsigned CRCACC9
: 1;
4698 unsigned CRCACC10
: 1;
4699 unsigned CRCACC11
: 1;
4700 unsigned CRCACC12
: 1;
4701 unsigned CRCACC13
: 1;
4702 unsigned CRCACC14
: 1;
4703 unsigned CRCACC15
: 1;
4707 extern __at(0x0794) volatile __CRCACCHbits_t CRCACCHbits
;
4710 #define _CRCACC8 0x01
4712 #define _CRCACC9 0x02
4714 #define _CRCACC10 0x04
4716 #define _CRCACC11 0x08
4718 #define _CRCACC12 0x10
4720 #define _CRCACC13 0x20
4722 #define _CRCACC14 0x40
4724 #define _CRCACC15 0x80
4726 //==============================================================================
4728 extern __at(0x0795) __sfr CRCSHIFT
;
4730 //==============================================================================
4733 extern __at(0x0795) __sfr CRCSHIFTL
;
4739 unsigned SHIFT0
: 1;
4740 unsigned SHIFT1
: 1;
4741 unsigned SHIFT2
: 1;
4742 unsigned SHIFT3
: 1;
4743 unsigned SHIFT4
: 1;
4744 unsigned SHIFT5
: 1;
4745 unsigned SHIFT6
: 1;
4746 unsigned SHIFT7
: 1;
4751 unsigned CRCSHIFT0
: 1;
4752 unsigned CRCSHIFT1
: 1;
4753 unsigned CRCSHIFT2
: 1;
4754 unsigned CRCSHIFT3
: 1;
4755 unsigned CRCSHIFT4
: 1;
4756 unsigned CRCSHIFT5
: 1;
4757 unsigned CRCSHIFT6
: 1;
4758 unsigned CRCSHIFT7
: 1;
4760 } __CRCSHIFTLbits_t
;
4762 extern __at(0x0795) volatile __CRCSHIFTLbits_t CRCSHIFTLbits
;
4764 #define _SHIFT0 0x01
4765 #define _CRCSHIFT0 0x01
4766 #define _SHIFT1 0x02
4767 #define _CRCSHIFT1 0x02
4768 #define _SHIFT2 0x04
4769 #define _CRCSHIFT2 0x04
4770 #define _SHIFT3 0x08
4771 #define _CRCSHIFT3 0x08
4772 #define _SHIFT4 0x10
4773 #define _CRCSHIFT4 0x10
4774 #define _SHIFT5 0x20
4775 #define _CRCSHIFT5 0x20
4776 #define _SHIFT6 0x40
4777 #define _CRCSHIFT6 0x40
4778 #define _SHIFT7 0x80
4779 #define _CRCSHIFT7 0x80
4781 //==============================================================================
4784 //==============================================================================
4787 extern __at(0x0796) __sfr CRCSHIFTH
;
4793 unsigned SHIFT8
: 1;
4794 unsigned SHIFT9
: 1;
4795 unsigned SHIFT10
: 1;
4796 unsigned SHIFT11
: 1;
4797 unsigned SHIFT12
: 1;
4798 unsigned SHIFT13
: 1;
4799 unsigned SHIFT14
: 1;
4800 unsigned SHIFT15
: 1;
4805 unsigned CRCSHIFT8
: 1;
4806 unsigned CRCSHIFT9
: 1;
4807 unsigned CRCSHIFT10
: 1;
4808 unsigned CRCSHIFT11
: 1;
4809 unsigned CRCSHIFT12
: 1;
4810 unsigned CRCSHIFT13
: 1;
4811 unsigned CRCSHIFT14
: 1;
4812 unsigned CRCSHIFT15
: 1;
4814 } __CRCSHIFTHbits_t
;
4816 extern __at(0x0796) volatile __CRCSHIFTHbits_t CRCSHIFTHbits
;
4818 #define _SHIFT8 0x01
4819 #define _CRCSHIFT8 0x01
4820 #define _SHIFT9 0x02
4821 #define _CRCSHIFT9 0x02
4822 #define _SHIFT10 0x04
4823 #define _CRCSHIFT10 0x04
4824 #define _SHIFT11 0x08
4825 #define _CRCSHIFT11 0x08
4826 #define _SHIFT12 0x10
4827 #define _CRCSHIFT12 0x10
4828 #define _SHIFT13 0x20
4829 #define _CRCSHIFT13 0x20
4830 #define _SHIFT14 0x40
4831 #define _CRCSHIFT14 0x40
4832 #define _SHIFT15 0x80
4833 #define _CRCSHIFT15 0x80
4835 //==============================================================================
4837 extern __at(0x0797) __sfr CRCXOR
;
4839 //==============================================================================
4842 extern __at(0x0797) __sfr CRCXORL
;
4861 unsigned CRCXOR1
: 1;
4862 unsigned CRCXOR2
: 1;
4863 unsigned CRCXOR3
: 1;
4864 unsigned CRCXOR4
: 1;
4865 unsigned CRCXOR5
: 1;
4866 unsigned CRCXOR6
: 1;
4867 unsigned CRCXOR7
: 1;
4871 extern __at(0x0797) volatile __CRCXORLbits_t CRCXORLbits
;
4874 #define _CRCXOR1 0x02
4876 #define _CRCXOR2 0x04
4878 #define _CRCXOR3 0x08
4880 #define _CRCXOR4 0x10
4882 #define _CRCXOR5 0x20
4884 #define _CRCXOR6 0x40
4886 #define _CRCXOR7 0x80
4888 //==============================================================================
4891 //==============================================================================
4894 extern __at(0x0798) __sfr CRCXORH
;
4912 unsigned CRCXOR8
: 1;
4913 unsigned CRCXOR9
: 1;
4914 unsigned CRCXOR10
: 1;
4915 unsigned CRCXOR11
: 1;
4916 unsigned CRCXOR12
: 1;
4917 unsigned CRCXOR13
: 1;
4918 unsigned CRCXOR14
: 1;
4919 unsigned CRCXOR15
: 1;
4923 extern __at(0x0798) volatile __CRCXORHbits_t CRCXORHbits
;
4926 #define _CRCXOR8 0x01
4928 #define _CRCXOR9 0x02
4930 #define _CRCXOR10 0x04
4932 #define _CRCXOR11 0x08
4934 #define _CRCXOR12 0x10
4936 #define _CRCXOR13 0x20
4938 #define _CRCXOR14 0x40
4940 #define _CRCXOR15 0x80
4942 //==============================================================================
4945 //==============================================================================
4948 extern __at(0x0799) __sfr CRCCON0
;
4955 unsigned SHIFTM
: 1;
4966 unsigned CRCFULL
: 1;
4967 unsigned CRCSHIFTM
: 1;
4970 unsigned CRCACCM
: 1;
4971 unsigned CRCBUSY
: 1;
4977 extern __at(0x0799) volatile __CRCCON0bits_t CRCCON0bits
;
4979 #define _CRCCON0_FULL 0x01
4980 #define _CRCCON0_CRCFULL 0x01
4981 #define _CRCCON0_SHIFTM 0x02
4982 #define _CRCCON0_CRCSHIFTM 0x02
4983 #define _CRCCON0_ACCM 0x10
4984 #define _CRCCON0_CRCACCM 0x10
4985 #define _CRCCON0_BUSY 0x20
4986 #define _CRCCON0_CRCBUSY 0x20
4987 #define _CRCCON0_CRCGO 0x40
4988 #define _CRCCON0_EN 0x80
4989 #define _CRCCON0_CRCEN 0x80
4991 //==============================================================================
4994 //==============================================================================
4997 extern __at(0x079A) __sfr CRCCON1
;
5015 unsigned CRCPLEN0
: 1;
5016 unsigned CRCPLEN1
: 1;
5017 unsigned CRCPLEN2
: 1;
5018 unsigned CRCPLEN3
: 1;
5019 unsigned CRCDLEN0
: 1;
5020 unsigned CRCDLEN1
: 1;
5021 unsigned CRCDLEN2
: 1;
5022 unsigned CRCDLEN3
: 1;
5027 unsigned CRCPLEN
: 4;
5046 unsigned CRCDLEN
: 4;
5050 extern __at(0x079A) volatile __CRCCON1bits_t CRCCON1bits
;
5053 #define _CRCPLEN0 0x01
5055 #define _CRCPLEN1 0x02
5057 #define _CRCPLEN2 0x04
5059 #define _CRCPLEN3 0x08
5061 #define _CRCDLEN0 0x10
5063 #define _CRCDLEN1 0x20
5065 #define _CRCDLEN2 0x40
5067 #define _CRCDLEN3 0x80
5069 //==============================================================================
5071 extern __at(0x0D8C) __sfr SMT1TMR
;
5073 //==============================================================================
5076 extern __at(0x0D8C) __sfr SMT1TMRL
;
5080 unsigned SMT1TMR0
: 1;
5081 unsigned SMT1TMR1
: 1;
5082 unsigned SMT1TMR2
: 1;
5083 unsigned SMT1TMR3
: 1;
5084 unsigned SMT1TMR4
: 1;
5085 unsigned SMT1TMR5
: 1;
5086 unsigned SMT1TMR6
: 1;
5087 unsigned SMT1TMR7
: 1;
5090 extern __at(0x0D8C) volatile __SMT1TMRLbits_t SMT1TMRLbits
;
5092 #define _SMT1TMR0 0x01
5093 #define _SMT1TMR1 0x02
5094 #define _SMT1TMR2 0x04
5095 #define _SMT1TMR3 0x08
5096 #define _SMT1TMR4 0x10
5097 #define _SMT1TMR5 0x20
5098 #define _SMT1TMR6 0x40
5099 #define _SMT1TMR7 0x80
5101 //==============================================================================
5104 //==============================================================================
5107 extern __at(0x0D8D) __sfr SMT1TMRH
;
5111 unsigned SMT1TMR8
: 1;
5112 unsigned SMT1TMR9
: 1;
5113 unsigned SMT1TMR10
: 1;
5114 unsigned SMT1TMR11
: 1;
5115 unsigned SMT1TMR12
: 1;
5116 unsigned SMT1TMR13
: 1;
5117 unsigned SMT1TMR14
: 1;
5118 unsigned SMT1TMR15
: 1;
5121 extern __at(0x0D8D) volatile __SMT1TMRHbits_t SMT1TMRHbits
;
5123 #define _SMT1TMR8 0x01
5124 #define _SMT1TMR9 0x02
5125 #define _SMT1TMR10 0x04
5126 #define _SMT1TMR11 0x08
5127 #define _SMT1TMR12 0x10
5128 #define _SMT1TMR13 0x20
5129 #define _SMT1TMR14 0x40
5130 #define _SMT1TMR15 0x80
5132 //==============================================================================
5135 //==============================================================================
5138 extern __at(0x0D8E) __sfr SMT1TMRU
;
5142 unsigned SMT1TMR16
: 1;
5143 unsigned SMT1TMR17
: 1;
5144 unsigned SMT1TMR18
: 1;
5145 unsigned SMT1TMR19
: 1;
5146 unsigned SMT1TMR20
: 1;
5147 unsigned SMT1TMR21
: 1;
5148 unsigned SMT1TMR22
: 1;
5149 unsigned SMT1TMR23
: 1;
5152 extern __at(0x0D8E) volatile __SMT1TMRUbits_t SMT1TMRUbits
;
5154 #define _SMT1TMR16 0x01
5155 #define _SMT1TMR17 0x02
5156 #define _SMT1TMR18 0x04
5157 #define _SMT1TMR19 0x08
5158 #define _SMT1TMR20 0x10
5159 #define _SMT1TMR21 0x20
5160 #define _SMT1TMR22 0x40
5161 #define _SMT1TMR23 0x80
5163 //==============================================================================
5165 extern __at(0x0D8F) __sfr SMT1CPR
;
5167 //==============================================================================
5170 extern __at(0x0D8F) __sfr SMT1CPRL
;
5174 unsigned SMT1CPR0
: 1;
5175 unsigned SMT1CPR1
: 1;
5176 unsigned SMT1CPR2
: 1;
5177 unsigned SMT1CPR3
: 1;
5178 unsigned SMT1CPR4
: 1;
5179 unsigned SMT1CPR5
: 1;
5180 unsigned SMT1CPR6
: 1;
5181 unsigned SMT1CPR7
: 1;
5184 extern __at(0x0D8F) volatile __SMT1CPRLbits_t SMT1CPRLbits
;
5186 #define _SMT1CPR0 0x01
5187 #define _SMT1CPR1 0x02
5188 #define _SMT1CPR2 0x04
5189 #define _SMT1CPR3 0x08
5190 #define _SMT1CPR4 0x10
5191 #define _SMT1CPR5 0x20
5192 #define _SMT1CPR6 0x40
5193 #define _SMT1CPR7 0x80
5195 //==============================================================================
5198 //==============================================================================
5201 extern __at(0x0D90) __sfr SMT1CPRH
;
5205 unsigned SMT1CPR8
: 1;
5206 unsigned SMT1CPR9
: 1;
5207 unsigned SMT1CPR10
: 1;
5208 unsigned SMT1CPR11
: 1;
5209 unsigned SMT1CPR12
: 1;
5210 unsigned SMT1CPR13
: 1;
5211 unsigned SMT1CPR14
: 1;
5212 unsigned SMT1CPR15
: 1;
5215 extern __at(0x0D90) volatile __SMT1CPRHbits_t SMT1CPRHbits
;
5217 #define _SMT1CPR8 0x01
5218 #define _SMT1CPR9 0x02
5219 #define _SMT1CPR10 0x04
5220 #define _SMT1CPR11 0x08
5221 #define _SMT1CPR12 0x10
5222 #define _SMT1CPR13 0x20
5223 #define _SMT1CPR14 0x40
5224 #define _SMT1CPR15 0x80
5226 //==============================================================================
5229 //==============================================================================
5232 extern __at(0x0D91) __sfr SMT1CPRU
;
5236 unsigned SMT1CPR16
: 1;
5237 unsigned SMT1CPR17
: 1;
5238 unsigned SMT1CPR18
: 1;
5239 unsigned SMT1CPR19
: 1;
5240 unsigned SMT1CPR20
: 1;
5241 unsigned SMT1CPR21
: 1;
5242 unsigned SMT1CPR22
: 1;
5243 unsigned SMT1CPR23
: 1;
5246 extern __at(0x0D91) volatile __SMT1CPRUbits_t SMT1CPRUbits
;
5248 #define _SMT1CPR16 0x01
5249 #define _SMT1CPR17 0x02
5250 #define _SMT1CPR18 0x04
5251 #define _SMT1CPR19 0x08
5252 #define _SMT1CPR20 0x10
5253 #define _SMT1CPR21 0x20
5254 #define _SMT1CPR22 0x40
5255 #define _SMT1CPR23 0x80
5257 //==============================================================================
5259 extern __at(0x0D92) __sfr SMT1CPW
;
5261 //==============================================================================
5264 extern __at(0x0D92) __sfr SMT1CPWL
;
5268 unsigned SMT1CPW0
: 1;
5269 unsigned SMT1CPW1
: 1;
5270 unsigned SMT1CPW2
: 1;
5271 unsigned SMT1CPW3
: 1;
5272 unsigned SMT1CPW4
: 1;
5273 unsigned SMT1CPW5
: 1;
5274 unsigned SMT1CPW6
: 1;
5275 unsigned SMT1CPW7
: 1;
5278 extern __at(0x0D92) volatile __SMT1CPWLbits_t SMT1CPWLbits
;
5280 #define _SMT1CPW0 0x01
5281 #define _SMT1CPW1 0x02
5282 #define _SMT1CPW2 0x04
5283 #define _SMT1CPW3 0x08
5284 #define _SMT1CPW4 0x10
5285 #define _SMT1CPW5 0x20
5286 #define _SMT1CPW6 0x40
5287 #define _SMT1CPW7 0x80
5289 //==============================================================================
5292 //==============================================================================
5295 extern __at(0x0D93) __sfr SMT1CPWH
;
5299 unsigned SMT1CPW8
: 1;
5300 unsigned SMT1CPW9
: 1;
5301 unsigned SMT1CPW10
: 1;
5302 unsigned SMT1CPW11
: 1;
5303 unsigned SMT1CPW12
: 1;
5304 unsigned SMT1CPW13
: 1;
5305 unsigned SMT1CPW14
: 1;
5306 unsigned SMT1CPW15
: 1;
5309 extern __at(0x0D93) volatile __SMT1CPWHbits_t SMT1CPWHbits
;
5311 #define _SMT1CPW8 0x01
5312 #define _SMT1CPW9 0x02
5313 #define _SMT1CPW10 0x04
5314 #define _SMT1CPW11 0x08
5315 #define _SMT1CPW12 0x10
5316 #define _SMT1CPW13 0x20
5317 #define _SMT1CPW14 0x40
5318 #define _SMT1CPW15 0x80
5320 //==============================================================================
5323 //==============================================================================
5326 extern __at(0x0D94) __sfr SMT1CPWU
;
5330 unsigned SMT1CPW16
: 1;
5331 unsigned SMT1CPW17
: 1;
5332 unsigned SMT1CPW18
: 1;
5333 unsigned SMT1CPW19
: 1;
5334 unsigned SMT1CPW20
: 1;
5335 unsigned SMT1CPW21
: 1;
5336 unsigned SMT1CPW22
: 1;
5337 unsigned SMT1CPW23
: 1;
5340 extern __at(0x0D94) volatile __SMT1CPWUbits_t SMT1CPWUbits
;
5342 #define _SMT1CPW16 0x01
5343 #define _SMT1CPW17 0x02
5344 #define _SMT1CPW18 0x04
5345 #define _SMT1CPW19 0x08
5346 #define _SMT1CPW20 0x10
5347 #define _SMT1CPW21 0x20
5348 #define _SMT1CPW22 0x40
5349 #define _SMT1CPW23 0x80
5351 //==============================================================================
5353 extern __at(0x0D95) __sfr SMT1PR
;
5355 //==============================================================================
5358 extern __at(0x0D95) __sfr SMT1PRL
;
5362 unsigned SMT1PR0
: 1;
5363 unsigned SMT1PR1
: 1;
5364 unsigned SMT1PR2
: 1;
5365 unsigned SMT1PR3
: 1;
5366 unsigned SMT1PR4
: 1;
5367 unsigned SMT1PR5
: 1;
5368 unsigned SMT1PR6
: 1;
5369 unsigned SMT1PR7
: 1;
5372 extern __at(0x0D95) volatile __SMT1PRLbits_t SMT1PRLbits
;
5374 #define _SMT1PR0 0x01
5375 #define _SMT1PR1 0x02
5376 #define _SMT1PR2 0x04
5377 #define _SMT1PR3 0x08
5378 #define _SMT1PR4 0x10
5379 #define _SMT1PR5 0x20
5380 #define _SMT1PR6 0x40
5381 #define _SMT1PR7 0x80
5383 //==============================================================================
5386 //==============================================================================
5389 extern __at(0x0D96) __sfr SMT1PRH
;
5393 unsigned SMT1PR8
: 1;
5394 unsigned SMT1PR9
: 1;
5395 unsigned SMT1PR10
: 1;
5396 unsigned SMT1PR11
: 1;
5397 unsigned SMT1PR12
: 1;
5398 unsigned SMT1PR13
: 1;
5399 unsigned SMT1PR14
: 1;
5400 unsigned SMT1PR15
: 1;
5403 extern __at(0x0D96) volatile __SMT1PRHbits_t SMT1PRHbits
;
5405 #define _SMT1PR8 0x01
5406 #define _SMT1PR9 0x02
5407 #define _SMT1PR10 0x04
5408 #define _SMT1PR11 0x08
5409 #define _SMT1PR12 0x10
5410 #define _SMT1PR13 0x20
5411 #define _SMT1PR14 0x40
5412 #define _SMT1PR15 0x80
5414 //==============================================================================
5417 //==============================================================================
5420 extern __at(0x0D97) __sfr SMT1PRU
;
5424 unsigned SMT1PR16
: 1;
5425 unsigned SMT1PR17
: 1;
5426 unsigned SMT1PR18
: 1;
5427 unsigned SMT1PR19
: 1;
5428 unsigned SMT1PR20
: 1;
5429 unsigned SMT1PR21
: 1;
5430 unsigned SMT1PR22
: 1;
5431 unsigned SMT1PR23
: 1;
5434 extern __at(0x0D97) volatile __SMT1PRUbits_t SMT1PRUbits
;
5436 #define _SMT1PR16 0x01
5437 #define _SMT1PR17 0x02
5438 #define _SMT1PR18 0x04
5439 #define _SMT1PR19 0x08
5440 #define _SMT1PR20 0x10
5441 #define _SMT1PR21 0x20
5442 #define _SMT1PR22 0x40
5443 #define _SMT1PR23 0x80
5445 //==============================================================================
5448 //==============================================================================
5451 extern __at(0x0D98) __sfr SMT1CON0
;
5457 unsigned SMT1PS0
: 1;
5458 unsigned SMT1PS1
: 1;
5469 unsigned SMT1PS
: 2;
5474 extern __at(0x0D98) volatile __SMT1CON0bits_t SMT1CON0bits
;
5476 #define _SMT1CON0_SMT1PS0 0x01
5477 #define _SMT1CON0_SMT1PS1 0x02
5478 #define _SMT1CON0_CPOL 0x04
5479 #define _SMT1CON0_SPOL 0x08
5480 #define _SMT1CON0_WPOL 0x10
5481 #define _SMT1CON0_STP 0x20
5482 #define _SMT1CON0_EN 0x80
5484 //==============================================================================
5487 //==============================================================================
5490 extern __at(0x0D99) __sfr SMT1CON1
;
5502 unsigned REPEAT
: 1;
5503 unsigned SMT1GO
: 1;
5508 unsigned SMT1MODE0
: 1;
5509 unsigned SMT1MODE1
: 1;
5510 unsigned SMT1MODE2
: 1;
5511 unsigned SMT1MODE3
: 1;
5514 unsigned SMT1REPEAT
: 1;
5526 unsigned SMT1MODE
: 4;
5531 extern __at(0x0D99) volatile __SMT1CON1bits_t SMT1CON1bits
;
5533 #define _SMT1CON1_MODE0 0x01
5534 #define _SMT1CON1_SMT1MODE0 0x01
5535 #define _SMT1CON1_MODE1 0x02
5536 #define _SMT1CON1_SMT1MODE1 0x02
5537 #define _SMT1CON1_MODE2 0x04
5538 #define _SMT1CON1_SMT1MODE2 0x04
5539 #define _SMT1CON1_MODE3 0x08
5540 #define _SMT1CON1_SMT1MODE3 0x08
5541 #define _SMT1CON1_REPEAT 0x40
5542 #define _SMT1CON1_SMT1REPEAT 0x40
5543 #define _SMT1CON1_SMT1GO 0x80
5545 //==============================================================================
5548 //==============================================================================
5551 extern __at(0x0D9A) __sfr SMT1STAT
;
5569 unsigned SMT1AS
: 1;
5570 unsigned SMT1WS
: 1;
5571 unsigned SMT1TS
: 1;
5574 unsigned SMT1RESET
: 1;
5575 unsigned SMT1CPWUP
: 1;
5576 unsigned SMT1CPRUP
: 1;
5580 extern __at(0x0D9A) volatile __SMT1STATbits_t SMT1STATbits
;
5583 #define _SMT1AS 0x01
5585 #define _SMT1WS 0x02
5587 #define _SMT1TS 0x04
5589 #define _SMT1RESET 0x20
5591 #define _SMT1CPWUP 0x40
5593 #define _SMT1CPRUP 0x80
5595 //==============================================================================
5598 //==============================================================================
5601 extern __at(0x0D9B) __sfr SMT1CLK
;
5619 unsigned SMT1CSEL0
: 1;
5620 unsigned SMT1CSEL1
: 1;
5621 unsigned SMT1CSEL2
: 1;
5631 unsigned SMT1CSEL
: 3;
5642 extern __at(0x0D9B) volatile __SMT1CLKbits_t SMT1CLKbits
;
5645 #define _SMT1CSEL0 0x01
5647 #define _SMT1CSEL1 0x02
5649 #define _SMT1CSEL2 0x04
5651 //==============================================================================
5654 //==============================================================================
5657 extern __at(0x0D9C) __sfr SMT1SIG
;
5675 unsigned SMT1SSEL0
: 1;
5676 unsigned SMT1SSEL1
: 1;
5677 unsigned SMT1SSEL2
: 1;
5693 unsigned SMT1SSEL
: 3;
5698 extern __at(0x0D9C) volatile __SMT1SIGbits_t SMT1SIGbits
;
5701 #define _SMT1SSEL0 0x01
5703 #define _SMT1SSEL1 0x02
5705 #define _SMT1SSEL2 0x04
5707 //==============================================================================
5710 //==============================================================================
5713 extern __at(0x0D9D) __sfr SMT1WIN
;
5731 unsigned SMT1WSEL0
: 1;
5732 unsigned SMT1WSEL1
: 1;
5733 unsigned SMT1WSEL2
: 1;
5734 unsigned SMT1WSEL3
: 1;
5749 unsigned SMT1WSEL
: 4;
5754 extern __at(0x0D9D) volatile __SMT1WINbits_t SMT1WINbits
;
5757 #define _SMT1WSEL0 0x01
5759 #define _SMT1WSEL1 0x02
5761 #define _SMT1WSEL2 0x04
5763 #define _SMT1WSEL3 0x08
5765 //==============================================================================
5767 extern __at(0x0D9E) __sfr SMT2TMR
;
5769 //==============================================================================
5772 extern __at(0x0D9E) __sfr SMT2TMRL
;
5776 unsigned SMT2TMR0
: 1;
5777 unsigned SMT2TMR1
: 1;
5778 unsigned SMT2TMR2
: 1;
5779 unsigned SMT2TMR3
: 1;
5780 unsigned SMT2TMR4
: 1;
5781 unsigned SMT2TMR5
: 1;
5782 unsigned SMT2TMR6
: 1;
5783 unsigned SMT2TMR7
: 1;
5786 extern __at(0x0D9E) volatile __SMT2TMRLbits_t SMT2TMRLbits
;
5788 #define _SMT2TMR0 0x01
5789 #define _SMT2TMR1 0x02
5790 #define _SMT2TMR2 0x04
5791 #define _SMT2TMR3 0x08
5792 #define _SMT2TMR4 0x10
5793 #define _SMT2TMR5 0x20
5794 #define _SMT2TMR6 0x40
5795 #define _SMT2TMR7 0x80
5797 //==============================================================================
5800 //==============================================================================
5803 extern __at(0x0D9F) __sfr SMT2TMRH
;
5807 unsigned SMT2TMR8
: 1;
5808 unsigned SMT2TMR9
: 1;
5809 unsigned SMT2TMR10
: 1;
5810 unsigned SMT2TMR11
: 1;
5811 unsigned SMT2TMR12
: 1;
5812 unsigned SMT2TMR13
: 1;
5813 unsigned SMT2TMR14
: 1;
5814 unsigned SMT2TMR15
: 1;
5817 extern __at(0x0D9F) volatile __SMT2TMRHbits_t SMT2TMRHbits
;
5819 #define _SMT2TMR8 0x01
5820 #define _SMT2TMR9 0x02
5821 #define _SMT2TMR10 0x04
5822 #define _SMT2TMR11 0x08
5823 #define _SMT2TMR12 0x10
5824 #define _SMT2TMR13 0x20
5825 #define _SMT2TMR14 0x40
5826 #define _SMT2TMR15 0x80
5828 //==============================================================================
5831 //==============================================================================
5834 extern __at(0x0DA0) __sfr SMT2TMRU
;
5838 unsigned SMT2TMR16
: 1;
5839 unsigned SMT2TMR17
: 1;
5840 unsigned SMT2TMR18
: 1;
5841 unsigned SMT2TMR19
: 1;
5842 unsigned SMT2TMR20
: 1;
5843 unsigned SMT2TMR21
: 1;
5844 unsigned SMT2TMR22
: 1;
5845 unsigned SMT2TMR23
: 1;
5848 extern __at(0x0DA0) volatile __SMT2TMRUbits_t SMT2TMRUbits
;
5850 #define _SMT2TMR16 0x01
5851 #define _SMT2TMR17 0x02
5852 #define _SMT2TMR18 0x04
5853 #define _SMT2TMR19 0x08
5854 #define _SMT2TMR20 0x10
5855 #define _SMT2TMR21 0x20
5856 #define _SMT2TMR22 0x40
5857 #define _SMT2TMR23 0x80
5859 //==============================================================================
5861 extern __at(0x0DA1) __sfr SMT2CPR
;
5863 //==============================================================================
5866 extern __at(0x0DA1) __sfr SMT2CPRL
;
5870 unsigned SMT2CPR0
: 1;
5871 unsigned SMT2CPR1
: 1;
5872 unsigned SMT2CPR2
: 1;
5873 unsigned SMT2CPR3
: 1;
5874 unsigned SMT2CPR4
: 1;
5875 unsigned SMT2CPR5
: 1;
5876 unsigned SMT2CPR6
: 1;
5877 unsigned SMT2CPR7
: 1;
5880 extern __at(0x0DA1) volatile __SMT2CPRLbits_t SMT2CPRLbits
;
5882 #define _SMT2CPR0 0x01
5883 #define _SMT2CPR1 0x02
5884 #define _SMT2CPR2 0x04
5885 #define _SMT2CPR3 0x08
5886 #define _SMT2CPR4 0x10
5887 #define _SMT2CPR5 0x20
5888 #define _SMT2CPR6 0x40
5889 #define _SMT2CPR7 0x80
5891 //==============================================================================
5894 //==============================================================================
5897 extern __at(0x0DA2) __sfr SMT2CPRH
;
5901 unsigned SMT2CPR8
: 1;
5902 unsigned SMT2CPR9
: 1;
5903 unsigned SMT2CPR10
: 1;
5904 unsigned SMT2CPR11
: 1;
5905 unsigned SMT2CPR12
: 1;
5906 unsigned SMT2CPR13
: 1;
5907 unsigned SMT2CPR14
: 1;
5908 unsigned SMT2CPR15
: 1;
5911 extern __at(0x0DA2) volatile __SMT2CPRHbits_t SMT2CPRHbits
;
5913 #define _SMT2CPR8 0x01
5914 #define _SMT2CPR9 0x02
5915 #define _SMT2CPR10 0x04
5916 #define _SMT2CPR11 0x08
5917 #define _SMT2CPR12 0x10
5918 #define _SMT2CPR13 0x20
5919 #define _SMT2CPR14 0x40
5920 #define _SMT2CPR15 0x80
5922 //==============================================================================
5925 //==============================================================================
5928 extern __at(0x0DA3) __sfr SMT2CPRU
;
5932 unsigned SMT2CPR16
: 1;
5933 unsigned SMT2CPR17
: 1;
5934 unsigned SMT2CPR18
: 1;
5935 unsigned SMT2CPR19
: 1;
5936 unsigned SMT2CPR20
: 1;
5937 unsigned SMT2CPR21
: 1;
5938 unsigned SMT2CPR22
: 1;
5939 unsigned SMT2CPR23
: 1;
5942 extern __at(0x0DA3) volatile __SMT2CPRUbits_t SMT2CPRUbits
;
5944 #define _SMT2CPR16 0x01
5945 #define _SMT2CPR17 0x02
5946 #define _SMT2CPR18 0x04
5947 #define _SMT2CPR19 0x08
5948 #define _SMT2CPR20 0x10
5949 #define _SMT2CPR21 0x20
5950 #define _SMT2CPR22 0x40
5951 #define _SMT2CPR23 0x80
5953 //==============================================================================
5955 extern __at(0x0DA4) __sfr SMT2CPW
;
5957 //==============================================================================
5960 extern __at(0x0DA4) __sfr SMT2CPWL
;
5964 unsigned SMT2CPW0
: 1;
5965 unsigned SMT2CPW1
: 1;
5966 unsigned SMT2CPW2
: 1;
5967 unsigned SMT2CPW3
: 1;
5968 unsigned SMT2CPW4
: 1;
5969 unsigned SMT2CPW5
: 1;
5970 unsigned SMT2CPW6
: 1;
5971 unsigned SMT2CPW7
: 1;
5974 extern __at(0x0DA4) volatile __SMT2CPWLbits_t SMT2CPWLbits
;
5976 #define _SMT2CPW0 0x01
5977 #define _SMT2CPW1 0x02
5978 #define _SMT2CPW2 0x04
5979 #define _SMT2CPW3 0x08
5980 #define _SMT2CPW4 0x10
5981 #define _SMT2CPW5 0x20
5982 #define _SMT2CPW6 0x40
5983 #define _SMT2CPW7 0x80
5985 //==============================================================================
5988 //==============================================================================
5991 extern __at(0x0DA5) __sfr SMT2CPWH
;
5995 unsigned SMT2CPW8
: 1;
5996 unsigned SMT2CPW9
: 1;
5997 unsigned SMT2CPW10
: 1;
5998 unsigned SMT2CPW11
: 1;
5999 unsigned SMT2CPW12
: 1;
6000 unsigned SMT2CPW13
: 1;
6001 unsigned SMT2CPW14
: 1;
6002 unsigned SMT2CPW15
: 1;
6005 extern __at(0x0DA5) volatile __SMT2CPWHbits_t SMT2CPWHbits
;
6007 #define _SMT2CPW8 0x01
6008 #define _SMT2CPW9 0x02
6009 #define _SMT2CPW10 0x04
6010 #define _SMT2CPW11 0x08
6011 #define _SMT2CPW12 0x10
6012 #define _SMT2CPW13 0x20
6013 #define _SMT2CPW14 0x40
6014 #define _SMT2CPW15 0x80
6016 //==============================================================================
6019 //==============================================================================
6022 extern __at(0x0DA6) __sfr SMT2CPWU
;
6026 unsigned SMT2CPW16
: 1;
6027 unsigned SMT2CPW17
: 1;
6028 unsigned SMT2CPW18
: 1;
6029 unsigned SMT2CPW19
: 1;
6030 unsigned SMT2CPW20
: 1;
6031 unsigned SMT2CPW21
: 1;
6032 unsigned SMT2CPW22
: 1;
6033 unsigned SMT2CPW23
: 1;
6036 extern __at(0x0DA6) volatile __SMT2CPWUbits_t SMT2CPWUbits
;
6038 #define _SMT2CPW16 0x01
6039 #define _SMT2CPW17 0x02
6040 #define _SMT2CPW18 0x04
6041 #define _SMT2CPW19 0x08
6042 #define _SMT2CPW20 0x10
6043 #define _SMT2CPW21 0x20
6044 #define _SMT2CPW22 0x40
6045 #define _SMT2CPW23 0x80
6047 //==============================================================================
6049 extern __at(0x0DA7) __sfr SMT2PR
;
6051 //==============================================================================
6054 extern __at(0x0DA7) __sfr SMT2PRL
;
6058 unsigned SMT2PR0
: 1;
6059 unsigned SMT2PR1
: 1;
6060 unsigned SMT2PR2
: 1;
6061 unsigned SMT2PR3
: 1;
6062 unsigned SMT2PR4
: 1;
6063 unsigned SMT2PR5
: 1;
6064 unsigned SMT2PR6
: 1;
6065 unsigned SMT2PR7
: 1;
6068 extern __at(0x0DA7) volatile __SMT2PRLbits_t SMT2PRLbits
;
6070 #define _SMT2PR0 0x01
6071 #define _SMT2PR1 0x02
6072 #define _SMT2PR2 0x04
6073 #define _SMT2PR3 0x08
6074 #define _SMT2PR4 0x10
6075 #define _SMT2PR5 0x20
6076 #define _SMT2PR6 0x40
6077 #define _SMT2PR7 0x80
6079 //==============================================================================
6082 //==============================================================================
6085 extern __at(0x0DA8) __sfr SMT2PRH
;
6089 unsigned SMT2PR8
: 1;
6090 unsigned SMT2PR9
: 1;
6091 unsigned SMT2PR10
: 1;
6092 unsigned SMT2PR11
: 1;
6093 unsigned SMT2PR12
: 1;
6094 unsigned SMT2PR13
: 1;
6095 unsigned SMT2PR14
: 1;
6096 unsigned SMT2PR15
: 1;
6099 extern __at(0x0DA8) volatile __SMT2PRHbits_t SMT2PRHbits
;
6101 #define _SMT2PR8 0x01
6102 #define _SMT2PR9 0x02
6103 #define _SMT2PR10 0x04
6104 #define _SMT2PR11 0x08
6105 #define _SMT2PR12 0x10
6106 #define _SMT2PR13 0x20
6107 #define _SMT2PR14 0x40
6108 #define _SMT2PR15 0x80
6110 //==============================================================================
6113 //==============================================================================
6116 extern __at(0x0DA9) __sfr SMT2PRU
;
6120 unsigned SMT2PR16
: 1;
6121 unsigned SMT2PR17
: 1;
6122 unsigned SMT2PR18
: 1;
6123 unsigned SMT2PR19
: 1;
6124 unsigned SMT2PR20
: 1;
6125 unsigned SMT2PR21
: 1;
6126 unsigned SMT2PR22
: 1;
6127 unsigned SMT2PR23
: 1;
6130 extern __at(0x0DA9) volatile __SMT2PRUbits_t SMT2PRUbits
;
6132 #define _SMT2PR16 0x01
6133 #define _SMT2PR17 0x02
6134 #define _SMT2PR18 0x04
6135 #define _SMT2PR19 0x08
6136 #define _SMT2PR20 0x10
6137 #define _SMT2PR21 0x20
6138 #define _SMT2PR22 0x40
6139 #define _SMT2PR23 0x80
6141 //==============================================================================
6144 //==============================================================================
6147 extern __at(0x0DAA) __sfr SMT2CON0
;
6153 unsigned SMT2PS0
: 1;
6154 unsigned SMT2PS1
: 1;
6165 unsigned SMT2PS
: 2;
6170 extern __at(0x0DAA) volatile __SMT2CON0bits_t SMT2CON0bits
;
6172 #define _SMT2CON0_SMT2PS0 0x01
6173 #define _SMT2CON0_SMT2PS1 0x02
6174 #define _SMT2CON0_CPOL 0x04
6175 #define _SMT2CON0_SPOL 0x08
6176 #define _SMT2CON0_WPOL 0x10
6177 #define _SMT2CON0_STP 0x20
6178 #define _SMT2CON0_EN 0x80
6180 //==============================================================================
6183 //==============================================================================
6186 extern __at(0x0DAB) __sfr SMT2CON1
;
6198 unsigned REPEAT
: 1;
6199 unsigned SMT2GO
: 1;
6204 unsigned SMT2MODE0
: 1;
6205 unsigned SMT2MODE1
: 1;
6206 unsigned SMT2MODE2
: 1;
6207 unsigned SMT2MODE3
: 1;
6210 unsigned SMT2REPEAT
: 1;
6216 unsigned SMT2MODE
: 4;
6227 extern __at(0x0DAB) volatile __SMT2CON1bits_t SMT2CON1bits
;
6229 #define _SMT2CON1_MODE0 0x01
6230 #define _SMT2CON1_SMT2MODE0 0x01
6231 #define _SMT2CON1_MODE1 0x02
6232 #define _SMT2CON1_SMT2MODE1 0x02
6233 #define _SMT2CON1_MODE2 0x04
6234 #define _SMT2CON1_SMT2MODE2 0x04
6235 #define _SMT2CON1_MODE3 0x08
6236 #define _SMT2CON1_SMT2MODE3 0x08
6237 #define _SMT2CON1_REPEAT 0x40
6238 #define _SMT2CON1_SMT2REPEAT 0x40
6239 #define _SMT2CON1_SMT2GO 0x80
6241 //==============================================================================
6244 //==============================================================================
6247 extern __at(0x0DAC) __sfr SMT2STAT
;
6265 unsigned SMT2AS
: 1;
6266 unsigned SMT2WS
: 1;
6267 unsigned SMT2TS
: 1;
6270 unsigned SMT2RESET
: 1;
6271 unsigned SMT2CPWUP
: 1;
6272 unsigned SMT2CPRUP
: 1;
6276 extern __at(0x0DAC) volatile __SMT2STATbits_t SMT2STATbits
;
6278 #define _SMT2STAT_AS 0x01
6279 #define _SMT2STAT_SMT2AS 0x01
6280 #define _SMT2STAT_WS 0x02
6281 #define _SMT2STAT_SMT2WS 0x02
6282 #define _SMT2STAT_TS 0x04
6283 #define _SMT2STAT_SMT2TS 0x04
6284 #define _SMT2STAT_RST 0x20
6285 #define _SMT2STAT_SMT2RESET 0x20
6286 #define _SMT2STAT_CPWUP 0x40
6287 #define _SMT2STAT_SMT2CPWUP 0x40
6288 #define _SMT2STAT_CPRUP 0x80
6289 #define _SMT2STAT_SMT2CPRUP 0x80
6291 //==============================================================================
6294 //==============================================================================
6297 extern __at(0x0DAD) __sfr SMT2CLK
;
6315 unsigned SMT2CSEL0
: 1;
6316 unsigned SMT2CSEL1
: 1;
6317 unsigned SMT2CSEL2
: 1;
6333 unsigned SMT2CSEL
: 3;
6338 extern __at(0x0DAD) volatile __SMT2CLKbits_t SMT2CLKbits
;
6340 #define _SMT2CLK_CSEL0 0x01
6341 #define _SMT2CLK_SMT2CSEL0 0x01
6342 #define _SMT2CLK_CSEL1 0x02
6343 #define _SMT2CLK_SMT2CSEL1 0x02
6344 #define _SMT2CLK_CSEL2 0x04
6345 #define _SMT2CLK_SMT2CSEL2 0x04
6347 //==============================================================================
6350 //==============================================================================
6353 extern __at(0x0DAE) __sfr SMT2SIG
;
6371 unsigned SMT2SSEL0
: 1;
6372 unsigned SMT2SSEL1
: 1;
6373 unsigned SMT2SSEL2
: 1;
6383 unsigned SMT2SSEL
: 3;
6394 extern __at(0x0DAE) volatile __SMT2SIGbits_t SMT2SIGbits
;
6396 #define _SMT2SIG_SSEL0 0x01
6397 #define _SMT2SIG_SMT2SSEL0 0x01
6398 #define _SMT2SIG_SSEL1 0x02
6399 #define _SMT2SIG_SMT2SSEL1 0x02
6400 #define _SMT2SIG_SSEL2 0x04
6401 #define _SMT2SIG_SMT2SSEL2 0x04
6403 //==============================================================================
6406 //==============================================================================
6409 extern __at(0x0DAF) __sfr SMT2WIN
;
6427 unsigned SMT2WSEL0
: 1;
6428 unsigned SMT2WSEL1
: 1;
6429 unsigned SMT2WSEL2
: 1;
6430 unsigned SMT2WSEL3
: 1;
6445 unsigned SMT2WSEL
: 4;
6450 extern __at(0x0DAF) volatile __SMT2WINbits_t SMT2WINbits
;
6452 #define _SMT2WIN_WSEL0 0x01
6453 #define _SMT2WIN_SMT2WSEL0 0x01
6454 #define _SMT2WIN_WSEL1 0x02
6455 #define _SMT2WIN_SMT2WSEL1 0x02
6456 #define _SMT2WIN_WSEL2 0x04
6457 #define _SMT2WIN_SMT2WSEL2 0x04
6458 #define _SMT2WIN_WSEL3 0x08
6459 #define _SMT2WIN_SMT2WSEL3 0x08
6461 //==============================================================================
6464 //==============================================================================
6467 extern __at(0x0FE4) __sfr STATUS_SHAD
;
6471 unsigned C_SHAD
: 1;
6472 unsigned DC_SHAD
: 1;
6473 unsigned Z_SHAD
: 1;
6479 } __STATUS_SHADbits_t
;
6481 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
6483 #define _C_SHAD 0x01
6484 #define _DC_SHAD 0x02
6485 #define _Z_SHAD 0x04
6487 //==============================================================================
6489 extern __at(0x0FE5) __sfr WREG_SHAD
;
6490 extern __at(0x0FE6) __sfr BSR_SHAD
;
6491 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
6492 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
6493 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
6494 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
6495 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
6496 extern __at(0x0FED) __sfr STKPTR
;
6497 extern __at(0x0FEE) __sfr TOSL
;
6498 extern __at(0x0FEF) __sfr TOSH
;
6500 //==============================================================================
6502 // Configuration Bits
6504 //==============================================================================
6506 #define _CONFIG1 0x8007
6507 #define _CONFIG2 0x8008
6508 #define _CONFIG3 0x8009
6510 //----------------------------- CONFIG1 Options -------------------------------
6512 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
6513 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
6514 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
6515 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
6516 #define _PWRTE_ON 0x3FDF // PWRT enabled.
6517 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
6518 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
6519 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
6520 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
6521 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
6522 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
6523 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
6524 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
6525 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
6526 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
6527 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
6529 //----------------------------- CONFIG2 Options -------------------------------
6531 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control.
6532 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
6533 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control.
6534 #define _WRT_OFF 0x3FFF // Write protection off.
6535 #define _ZCD_ON 0x3F7F // ZCD always enabled.
6536 #define _ZCD_OFF 0x3FFF // ZCD disable. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON.
6537 #define _PLLEN_OFF 0x3EFF // 4x PLL is enabled when software sets the SPLLEN bit.
6538 #define _PLLEN_ON 0x3FFF // 4x PLL is always enabled.
6539 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
6540 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
6541 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
6542 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
6543 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
6544 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
6545 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
6546 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
6547 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
6548 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
6550 //----------------------------- CONFIG3 Options -------------------------------
6552 #define _WDTCPS_WDTCPS0 0x3FE0 // 1:32 (1 ms period).
6553 #define _WDTCPS_WDTCPS1 0x3FE1 // 1:64 (2 ms period).
6554 #define _WDTCPS_WDTCPS2 0x3FE2 // 1:128 (4 ms period).
6555 #define _WDTCPS_WDTCPS3 0x3FE3 // 1:256 (8 ms period).
6556 #define _WDTCPS_WDTCPS4 0x3FE4 // 1:512 (16 ms period).
6557 #define _WDTCPS_WDTCPS5 0x3FE5 // 1:1024 (32 ms period).
6558 #define _WDTCPS_WDTCPS6 0x3FE6 // 1:2048 (64 ms period).
6559 #define _WDTCPS_WDTCPS7 0x3FE7 // 1:4096 (128 ms period).
6560 #define _WDTCPS_WDTCPS8 0x3FE8 // 1:8192 (256 ms period).
6561 #define _WDTCPS_WDTCPS9 0x3FE9 // 1:16384 (512 ms period).
6562 #define _WDTCPS_WDTCPSA 0x3FEA // 1:32768 (1 s period).
6563 #define _WDTCPS_WDTCPSB 0x3FEB // 1:65536 (2 s period).
6564 #define _WDTCPS_WDTCPSC 0x3FEC // 1:131072 (4 s period).
6565 #define _WDTCPS_WDTCPSD 0x3FED // 1:262144 (8 s period).
6566 #define _WDTCPS_WDTCPSE 0x3FEE // 1:524299 (16 s period).
6567 #define _WDTCPS_WDTCPSF 0x3FEF // 1:1048576 (32 s period).
6568 #define _WDTCPS_WDTCPS10 0x3FF0 // 1:2097152 (64 s period).
6569 #define _WDTCPS_WDTCPS11 0x3FF1 // 1:4194304 (128 s period).
6570 #define _WDTCPS_WDTCPS12 0x3FF2 // 1:8388608 (256 s period).
6571 #define _WDTCPS_WDTCPS1F 0x3FFF // Software Control (WDTPS).
6572 #define _WDTE_OFF 0x3F9F // WDT disabled.
6573 #define _WDTE_SWDTEN 0x3FBF // WDT controlled by the SWDTEN bit in the WDTCON register.
6574 #define _WDTE_NSLEEP 0x3FDF // WDT enabled while running and disabled in Sleep.
6575 #define _WDTE_ON 0x3FFF // WDT enabled.
6576 #define _WDTCWS_WDTCWS125 0x38FF // 12.5 percent window open time.
6577 #define _WDTCWS_WDTCWS25 0x39FF // 25 percent window open time.
6578 #define _WDTCWS_WDTCWS375 0x3AFF // 37.5 percent window open time.
6579 #define _WDTCWS_WDTCWS50 0x3BFF // 50 percent window open time.
6580 #define _WDTCWS_WDTCWS625 0x3CFF // 62.5 percent window open time.
6581 #define _WDTCWS_WDTCWS75 0x3DFF // 75 percent window open time.
6582 #define _WDTCWS_WDTCWS100 0x3EFF // 100 percent window open time (Legacy WDT).
6583 #define _WDTCWS_WDTCWSSW 0x3FFF // Software WDT window size control (WDTWS bits).
6584 #define _WDTCCS_LFINTOSC 0x07FF // 31.0 kHz LFINTOSC.
6585 #define _WDTCCS_MFINTOSC 0x0FFF // 31.25 kHz HFINTOSC (MFINTOSC).
6586 #define _WDTCCS_SWC 0x3FFF // Software control, controlled by WDTCS bits.
6588 //==============================================================================
6590 #define _DEVID1 0x8006
6592 #define _IDLOC0 0x8000
6593 #define _IDLOC1 0x8001
6594 #define _IDLOC2 0x8002
6595 #define _IDLOC3 0x8003
6597 //==============================================================================
6599 #ifndef NO_BIT_DEFINES
6601 #define ADON ADCON0bits.ADON // bit 0
6602 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
6603 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
6604 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
6605 #define CHS0 ADCON0bits.CHS0 // bit 2
6606 #define CHS1 ADCON0bits.CHS1 // bit 3
6607 #define CHS2 ADCON0bits.CHS2 // bit 4
6608 #define CHS3 ADCON0bits.CHS3 // bit 5
6609 #define CHS4 ADCON0bits.CHS4 // bit 6
6611 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
6612 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
6613 #define ADCS0 ADCON1bits.ADCS0 // bit 4
6614 #define ADCS1 ADCON1bits.ADCS1 // bit 5
6615 #define ADCS2 ADCON1bits.ADCS2 // bit 6
6616 #define ADFM ADCON1bits.ADFM // bit 7
6618 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
6619 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
6620 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
6621 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
6623 #define ANSA0 ANSELAbits.ANSA0 // bit 0
6624 #define ANSA1 ANSELAbits.ANSA1 // bit 1
6625 #define ANSA2 ANSELAbits.ANSA2 // bit 2
6626 #define ANSA4 ANSELAbits.ANSA4 // bit 4
6628 #define ANSC0 ANSELCbits.ANSC0 // bit 0
6629 #define ANSC1 ANSELCbits.ANSC1 // bit 1
6630 #define ANSC2 ANSELCbits.ANSC2 // bit 2
6631 #define ANSC3 ANSELCbits.ANSC3 // bit 3
6633 #define CCP2SEL APFCONbits.CCP2SEL // bit 1
6634 #define T1GSEL APFCONbits.T1GSEL // bit 3
6636 #define BORRDY BORCONbits.BORRDY // bit 0
6637 #define BORFS BORCONbits.BORFS // bit 6
6638 #define SBOREN BORCONbits.SBOREN // bit 7
6640 #define BSR0 BSRbits.BSR0 // bit 0
6641 #define BSR1 BSRbits.BSR1 // bit 1
6642 #define BSR2 BSRbits.BSR2 // bit 2
6643 #define BSR3 BSRbits.BSR3 // bit 3
6644 #define BSR4 BSRbits.BSR4 // bit 4
6646 #define CTS0 CCP1CAPbits.CTS0 // bit 0, shadows bit in CCP1CAPbits
6647 #define CCP1CTS0 CCP1CAPbits.CCP1CTS0 // bit 0, shadows bit in CCP1CAPbits
6648 #define CTS1 CCP1CAPbits.CTS1 // bit 1, shadows bit in CCP1CAPbits
6649 #define CCP1CTS1 CCP1CAPbits.CCP1CTS1 // bit 1, shadows bit in CCP1CAPbits
6651 #define MODE0 CCP1CONbits.MODE0 // bit 0, shadows bit in CCP1CONbits
6652 #define CCP1MODE0 CCP1CONbits.CCP1MODE0 // bit 0, shadows bit in CCP1CONbits
6653 #define MODE1 CCP1CONbits.MODE1 // bit 1, shadows bit in CCP1CONbits
6654 #define CCP1MODE1 CCP1CONbits.CCP1MODE1 // bit 1, shadows bit in CCP1CONbits
6655 #define MODE2 CCP1CONbits.MODE2 // bit 2, shadows bit in CCP1CONbits
6656 #define CCP1MODE2 CCP1CONbits.CCP1MODE2 // bit 2, shadows bit in CCP1CONbits
6657 #define MODE3 CCP1CONbits.MODE3 // bit 3, shadows bit in CCP1CONbits
6658 #define CCP1MODE3 CCP1CONbits.CCP1MODE3 // bit 3, shadows bit in CCP1CONbits
6659 #define FMT CCP1CONbits.FMT // bit 4, shadows bit in CCP1CONbits
6660 #define CCP1FMT CCP1CONbits.CCP1FMT // bit 4, shadows bit in CCP1CONbits
6661 #define OUT CCP1CONbits.OUT // bit 5, shadows bit in CCP1CONbits
6662 #define CCP1OUT CCP1CONbits.CCP1OUT // bit 5, shadows bit in CCP1CONbits
6663 #define OE CCP1CONbits.OE // bit 6, shadows bit in CCP1CONbits
6664 #define CCP1OE CCP1CONbits.CCP1OE // bit 6, shadows bit in CCP1CONbits
6665 #define EN CCP1CONbits.EN // bit 7, shadows bit in CCP1CONbits
6666 #define CCP1EN CCP1CONbits.CCP1EN // bit 7, shadows bit in CCP1CONbits
6668 #define CCP1TSEL0 CCPTMRSbits.CCP1TSEL0 // bit 0
6669 #define CCP1TSEL1 CCPTMRSbits.CCP1TSEL1 // bit 1
6670 #define CCP2TSEL0 CCPTMRSbits.CCP2TSEL0 // bit 2
6671 #define CCP2TSEL1 CCPTMRSbits.CCP2TSEL1 // bit 3
6673 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
6674 #define C1HYS CM1CON0bits.C1HYS // bit 1
6675 #define C1SP CM1CON0bits.C1SP // bit 2
6676 #define C1POL CM1CON0bits.C1POL // bit 4
6677 #define C1OE CM1CON0bits.C1OE // bit 5
6678 #define C1OUT CM1CON0bits.C1OUT // bit 6
6679 #define C1ON CM1CON0bits.C1ON // bit 7
6681 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
6682 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
6683 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
6684 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
6685 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
6686 #define C1INTN CM1CON1bits.C1INTN // bit 6
6687 #define C1INTP CM1CON1bits.C1INTP // bit 7
6689 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
6690 #define C2HYS CM2CON0bits.C2HYS // bit 1
6691 #define C2SP CM2CON0bits.C2SP // bit 2
6692 #define C2POL CM2CON0bits.C2POL // bit 4
6693 #define C2OE CM2CON0bits.C2OE // bit 5
6694 #define C2OUT CM2CON0bits.C2OUT // bit 6
6695 #define C2ON CM2CON0bits.C2ON // bit 7
6697 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
6698 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
6699 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
6700 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4
6701 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5
6702 #define C2INTN CM2CON1bits.C2INTN // bit 6
6703 #define C2INTP CM2CON1bits.C2INTP // bit 7
6705 #define MC1OUT CMOUTbits.MC1OUT // bit 0
6706 #define MC2OUT CMOUTbits.MC2OUT // bit 1
6708 #define ACC8 CRCACCHbits.ACC8 // bit 0, shadows bit in CRCACCHbits
6709 #define CRCACC8 CRCACCHbits.CRCACC8 // bit 0, shadows bit in CRCACCHbits
6710 #define ACC9 CRCACCHbits.ACC9 // bit 1, shadows bit in CRCACCHbits
6711 #define CRCACC9 CRCACCHbits.CRCACC9 // bit 1, shadows bit in CRCACCHbits
6712 #define ACC10 CRCACCHbits.ACC10 // bit 2, shadows bit in CRCACCHbits
6713 #define CRCACC10 CRCACCHbits.CRCACC10 // bit 2, shadows bit in CRCACCHbits
6714 #define ACC11 CRCACCHbits.ACC11 // bit 3, shadows bit in CRCACCHbits
6715 #define CRCACC11 CRCACCHbits.CRCACC11 // bit 3, shadows bit in CRCACCHbits
6716 #define ACC12 CRCACCHbits.ACC12 // bit 4, shadows bit in CRCACCHbits
6717 #define CRCACC12 CRCACCHbits.CRCACC12 // bit 4, shadows bit in CRCACCHbits
6718 #define ACC13 CRCACCHbits.ACC13 // bit 5, shadows bit in CRCACCHbits
6719 #define CRCACC13 CRCACCHbits.CRCACC13 // bit 5, shadows bit in CRCACCHbits
6720 #define ACC14 CRCACCHbits.ACC14 // bit 6, shadows bit in CRCACCHbits
6721 #define CRCACC14 CRCACCHbits.CRCACC14 // bit 6, shadows bit in CRCACCHbits
6722 #define ACC15 CRCACCHbits.ACC15 // bit 7, shadows bit in CRCACCHbits
6723 #define CRCACC15 CRCACCHbits.CRCACC15 // bit 7, shadows bit in CRCACCHbits
6725 #define ACC0 CRCACCLbits.ACC0 // bit 0, shadows bit in CRCACCLbits
6726 #define CRCACC0 CRCACCLbits.CRCACC0 // bit 0, shadows bit in CRCACCLbits
6727 #define ACC1 CRCACCLbits.ACC1 // bit 1, shadows bit in CRCACCLbits
6728 #define CRCACC1 CRCACCLbits.CRCACC1 // bit 1, shadows bit in CRCACCLbits
6729 #define ACC2 CRCACCLbits.ACC2 // bit 2, shadows bit in CRCACCLbits
6730 #define CRCACC2 CRCACCLbits.CRCACC2 // bit 2, shadows bit in CRCACCLbits
6731 #define ACC3 CRCACCLbits.ACC3 // bit 3, shadows bit in CRCACCLbits
6732 #define CRCACC3 CRCACCLbits.CRCACC3 // bit 3, shadows bit in CRCACCLbits
6733 #define ACC4 CRCACCLbits.ACC4 // bit 4, shadows bit in CRCACCLbits
6734 #define CRCACC4 CRCACCLbits.CRCACC4 // bit 4, shadows bit in CRCACCLbits
6735 #define ACC5 CRCACCLbits.ACC5 // bit 5, shadows bit in CRCACCLbits
6736 #define CRCACC5 CRCACCLbits.CRCACC5 // bit 5, shadows bit in CRCACCLbits
6737 #define ACC6 CRCACCLbits.ACC6 // bit 6, shadows bit in CRCACCLbits
6738 #define CRCACC6 CRCACCLbits.CRCACC6 // bit 6, shadows bit in CRCACCLbits
6739 #define ACC7 CRCACCLbits.ACC7 // bit 7, shadows bit in CRCACCLbits
6740 #define CRCACC7 CRCACCLbits.CRCACC7 // bit 7, shadows bit in CRCACCLbits
6742 #define PLEN0 CRCCON1bits.PLEN0 // bit 0, shadows bit in CRCCON1bits
6743 #define CRCPLEN0 CRCCON1bits.CRCPLEN0 // bit 0, shadows bit in CRCCON1bits
6744 #define PLEN1 CRCCON1bits.PLEN1 // bit 1, shadows bit in CRCCON1bits
6745 #define CRCPLEN1 CRCCON1bits.CRCPLEN1 // bit 1, shadows bit in CRCCON1bits
6746 #define PLEN2 CRCCON1bits.PLEN2 // bit 2, shadows bit in CRCCON1bits
6747 #define CRCPLEN2 CRCCON1bits.CRCPLEN2 // bit 2, shadows bit in CRCCON1bits
6748 #define PLEN3 CRCCON1bits.PLEN3 // bit 3, shadows bit in CRCCON1bits
6749 #define CRCPLEN3 CRCCON1bits.CRCPLEN3 // bit 3, shadows bit in CRCCON1bits
6750 #define DLEN0 CRCCON1bits.DLEN0 // bit 4, shadows bit in CRCCON1bits
6751 #define CRCDLEN0 CRCCON1bits.CRCDLEN0 // bit 4, shadows bit in CRCCON1bits
6752 #define DLEN1 CRCCON1bits.DLEN1 // bit 5, shadows bit in CRCCON1bits
6753 #define CRCDLEN1 CRCCON1bits.CRCDLEN1 // bit 5, shadows bit in CRCCON1bits
6754 #define DLEN2 CRCCON1bits.DLEN2 // bit 6, shadows bit in CRCCON1bits
6755 #define CRCDLEN2 CRCCON1bits.CRCDLEN2 // bit 6, shadows bit in CRCCON1bits
6756 #define DLEN3 CRCCON1bits.DLEN3 // bit 7, shadows bit in CRCCON1bits
6757 #define CRCDLEN3 CRCCON1bits.CRCDLEN3 // bit 7, shadows bit in CRCCON1bits
6759 #define DAT8 CRCDATHbits.DAT8 // bit 0, shadows bit in CRCDATHbits
6760 #define CRCDAT8 CRCDATHbits.CRCDAT8 // bit 0, shadows bit in CRCDATHbits
6761 #define DAT9 CRCDATHbits.DAT9 // bit 1, shadows bit in CRCDATHbits
6762 #define CRCDAT9 CRCDATHbits.CRCDAT9 // bit 1, shadows bit in CRCDATHbits
6763 #define DAT10 CRCDATHbits.DAT10 // bit 2, shadows bit in CRCDATHbits
6764 #define CRCDAT10 CRCDATHbits.CRCDAT10 // bit 2, shadows bit in CRCDATHbits
6765 #define DAT11 CRCDATHbits.DAT11 // bit 3, shadows bit in CRCDATHbits
6766 #define CRCDAT11 CRCDATHbits.CRCDAT11 // bit 3, shadows bit in CRCDATHbits
6767 #define DAT12 CRCDATHbits.DAT12 // bit 4, shadows bit in CRCDATHbits
6768 #define CRCDAT12 CRCDATHbits.CRCDAT12 // bit 4, shadows bit in CRCDATHbits
6769 #define DAT13 CRCDATHbits.DAT13 // bit 5, shadows bit in CRCDATHbits
6770 #define CRCDAT13 CRCDATHbits.CRCDAT13 // bit 5, shadows bit in CRCDATHbits
6771 #define DAT14 CRCDATHbits.DAT14 // bit 6, shadows bit in CRCDATHbits
6772 #define CRCDAT14 CRCDATHbits.CRCDAT14 // bit 6, shadows bit in CRCDATHbits
6773 #define DAT15 CRCDATHbits.DAT15 // bit 7, shadows bit in CRCDATHbits
6774 #define CRCDAT15 CRCDATHbits.CRCDAT15 // bit 7, shadows bit in CRCDATHbits
6776 #define DAT0 CRCDATLbits.DAT0 // bit 0, shadows bit in CRCDATLbits
6777 #define CRCDAT0 CRCDATLbits.CRCDAT0 // bit 0, shadows bit in CRCDATLbits
6778 #define DAT1 CRCDATLbits.DAT1 // bit 1, shadows bit in CRCDATLbits
6779 #define CRCDAT1 CRCDATLbits.CRCDAT1 // bit 1, shadows bit in CRCDATLbits
6780 #define DAT2 CRCDATLbits.DAT2 // bit 2, shadows bit in CRCDATLbits
6781 #define CRCDAT2 CRCDATLbits.CRCDAT2 // bit 2, shadows bit in CRCDATLbits
6782 #define DAT3 CRCDATLbits.DAT3 // bit 3, shadows bit in CRCDATLbits
6783 #define CRCDAT3 CRCDATLbits.CRCDAT3 // bit 3, shadows bit in CRCDATLbits
6784 #define DAT4 CRCDATLbits.DAT4 // bit 4, shadows bit in CRCDATLbits
6785 #define CRCDAT4 CRCDATLbits.CRCDAT4 // bit 4, shadows bit in CRCDATLbits
6786 #define DAT5 CRCDATLbits.DAT5 // bit 5, shadows bit in CRCDATLbits
6787 #define CRCDAT5 CRCDATLbits.CRCDAT5 // bit 5, shadows bit in CRCDATLbits
6788 #define DAT6 CRCDATLbits.DAT6 // bit 6, shadows bit in CRCDATLbits
6789 #define CRCDAT6 CRCDATLbits.CRCDAT6 // bit 6, shadows bit in CRCDATLbits
6790 #define DAT7 CRCDATLbits.DAT7 // bit 7, shadows bit in CRCDATLbits
6791 #define CRDCDAT7 CRCDATLbits.CRDCDAT7 // bit 7, shadows bit in CRCDATLbits
6793 #define SHIFT8 CRCSHIFTHbits.SHIFT8 // bit 0, shadows bit in CRCSHIFTHbits
6794 #define CRCSHIFT8 CRCSHIFTHbits.CRCSHIFT8 // bit 0, shadows bit in CRCSHIFTHbits
6795 #define SHIFT9 CRCSHIFTHbits.SHIFT9 // bit 1, shadows bit in CRCSHIFTHbits
6796 #define CRCSHIFT9 CRCSHIFTHbits.CRCSHIFT9 // bit 1, shadows bit in CRCSHIFTHbits
6797 #define SHIFT10 CRCSHIFTHbits.SHIFT10 // bit 2, shadows bit in CRCSHIFTHbits
6798 #define CRCSHIFT10 CRCSHIFTHbits.CRCSHIFT10 // bit 2, shadows bit in CRCSHIFTHbits
6799 #define SHIFT11 CRCSHIFTHbits.SHIFT11 // bit 3, shadows bit in CRCSHIFTHbits
6800 #define CRCSHIFT11 CRCSHIFTHbits.CRCSHIFT11 // bit 3, shadows bit in CRCSHIFTHbits
6801 #define SHIFT12 CRCSHIFTHbits.SHIFT12 // bit 4, shadows bit in CRCSHIFTHbits
6802 #define CRCSHIFT12 CRCSHIFTHbits.CRCSHIFT12 // bit 4, shadows bit in CRCSHIFTHbits
6803 #define SHIFT13 CRCSHIFTHbits.SHIFT13 // bit 5, shadows bit in CRCSHIFTHbits
6804 #define CRCSHIFT13 CRCSHIFTHbits.CRCSHIFT13 // bit 5, shadows bit in CRCSHIFTHbits
6805 #define SHIFT14 CRCSHIFTHbits.SHIFT14 // bit 6, shadows bit in CRCSHIFTHbits
6806 #define CRCSHIFT14 CRCSHIFTHbits.CRCSHIFT14 // bit 6, shadows bit in CRCSHIFTHbits
6807 #define SHIFT15 CRCSHIFTHbits.SHIFT15 // bit 7, shadows bit in CRCSHIFTHbits
6808 #define CRCSHIFT15 CRCSHIFTHbits.CRCSHIFT15 // bit 7, shadows bit in CRCSHIFTHbits
6810 #define SHIFT0 CRCSHIFTLbits.SHIFT0 // bit 0, shadows bit in CRCSHIFTLbits
6811 #define CRCSHIFT0 CRCSHIFTLbits.CRCSHIFT0 // bit 0, shadows bit in CRCSHIFTLbits
6812 #define SHIFT1 CRCSHIFTLbits.SHIFT1 // bit 1, shadows bit in CRCSHIFTLbits
6813 #define CRCSHIFT1 CRCSHIFTLbits.CRCSHIFT1 // bit 1, shadows bit in CRCSHIFTLbits
6814 #define SHIFT2 CRCSHIFTLbits.SHIFT2 // bit 2, shadows bit in CRCSHIFTLbits
6815 #define CRCSHIFT2 CRCSHIFTLbits.CRCSHIFT2 // bit 2, shadows bit in CRCSHIFTLbits
6816 #define SHIFT3 CRCSHIFTLbits.SHIFT3 // bit 3, shadows bit in CRCSHIFTLbits
6817 #define CRCSHIFT3 CRCSHIFTLbits.CRCSHIFT3 // bit 3, shadows bit in CRCSHIFTLbits
6818 #define SHIFT4 CRCSHIFTLbits.SHIFT4 // bit 4, shadows bit in CRCSHIFTLbits
6819 #define CRCSHIFT4 CRCSHIFTLbits.CRCSHIFT4 // bit 4, shadows bit in CRCSHIFTLbits
6820 #define SHIFT5 CRCSHIFTLbits.SHIFT5 // bit 5, shadows bit in CRCSHIFTLbits
6821 #define CRCSHIFT5 CRCSHIFTLbits.CRCSHIFT5 // bit 5, shadows bit in CRCSHIFTLbits
6822 #define SHIFT6 CRCSHIFTLbits.SHIFT6 // bit 6, shadows bit in CRCSHIFTLbits
6823 #define CRCSHIFT6 CRCSHIFTLbits.CRCSHIFT6 // bit 6, shadows bit in CRCSHIFTLbits
6824 #define SHIFT7 CRCSHIFTLbits.SHIFT7 // bit 7, shadows bit in CRCSHIFTLbits
6825 #define CRCSHIFT7 CRCSHIFTLbits.CRCSHIFT7 // bit 7, shadows bit in CRCSHIFTLbits
6827 #define XOR8 CRCXORHbits.XOR8 // bit 0, shadows bit in CRCXORHbits
6828 #define CRCXOR8 CRCXORHbits.CRCXOR8 // bit 0, shadows bit in CRCXORHbits
6829 #define XOR9 CRCXORHbits.XOR9 // bit 1, shadows bit in CRCXORHbits
6830 #define CRCXOR9 CRCXORHbits.CRCXOR9 // bit 1, shadows bit in CRCXORHbits
6831 #define XOR10 CRCXORHbits.XOR10 // bit 2, shadows bit in CRCXORHbits
6832 #define CRCXOR10 CRCXORHbits.CRCXOR10 // bit 2, shadows bit in CRCXORHbits
6833 #define XOR11 CRCXORHbits.XOR11 // bit 3, shadows bit in CRCXORHbits
6834 #define CRCXOR11 CRCXORHbits.CRCXOR11 // bit 3, shadows bit in CRCXORHbits
6835 #define XOR12 CRCXORHbits.XOR12 // bit 4, shadows bit in CRCXORHbits
6836 #define CRCXOR12 CRCXORHbits.CRCXOR12 // bit 4, shadows bit in CRCXORHbits
6837 #define XOR13 CRCXORHbits.XOR13 // bit 5, shadows bit in CRCXORHbits
6838 #define CRCXOR13 CRCXORHbits.CRCXOR13 // bit 5, shadows bit in CRCXORHbits
6839 #define XOR14 CRCXORHbits.XOR14 // bit 6, shadows bit in CRCXORHbits
6840 #define CRCXOR14 CRCXORHbits.CRCXOR14 // bit 6, shadows bit in CRCXORHbits
6841 #define XOR15 CRCXORHbits.XOR15 // bit 7, shadows bit in CRCXORHbits
6842 #define CRCXOR15 CRCXORHbits.CRCXOR15 // bit 7, shadows bit in CRCXORHbits
6844 #define XOR1 CRCXORLbits.XOR1 // bit 1, shadows bit in CRCXORLbits
6845 #define CRCXOR1 CRCXORLbits.CRCXOR1 // bit 1, shadows bit in CRCXORLbits
6846 #define XOR2 CRCXORLbits.XOR2 // bit 2, shadows bit in CRCXORLbits
6847 #define CRCXOR2 CRCXORLbits.CRCXOR2 // bit 2, shadows bit in CRCXORLbits
6848 #define XOR3 CRCXORLbits.XOR3 // bit 3, shadows bit in CRCXORLbits
6849 #define CRCXOR3 CRCXORLbits.CRCXOR3 // bit 3, shadows bit in CRCXORLbits
6850 #define XOR4 CRCXORLbits.XOR4 // bit 4, shadows bit in CRCXORLbits
6851 #define CRCXOR4 CRCXORLbits.CRCXOR4 // bit 4, shadows bit in CRCXORLbits
6852 #define XOR5 CRCXORLbits.XOR5 // bit 5, shadows bit in CRCXORLbits
6853 #define CRCXOR5 CRCXORLbits.CRCXOR5 // bit 5, shadows bit in CRCXORLbits
6854 #define XOR6 CRCXORLbits.XOR6 // bit 6, shadows bit in CRCXORLbits
6855 #define CRCXOR6 CRCXORLbits.CRCXOR6 // bit 6, shadows bit in CRCXORLbits
6856 #define XOR7 CRCXORLbits.XOR7 // bit 7, shadows bit in CRCXORLbits
6857 #define CRCXOR7 CRCXORLbits.CRCXOR7 // bit 7, shadows bit in CRCXORLbits
6859 #define LSAC0 CWG1AS0bits.LSAC0 // bit 2, shadows bit in CWG1AS0bits
6860 #define CWG1LSAC0 CWG1AS0bits.CWG1LSAC0 // bit 2, shadows bit in CWG1AS0bits
6861 #define LSAC1 CWG1AS0bits.LSAC1 // bit 3, shadows bit in CWG1AS0bits
6862 #define CWG1LSAC1 CWG1AS0bits.CWG1LSAC1 // bit 3, shadows bit in CWG1AS0bits
6863 #define LSBD0 CWG1AS0bits.LSBD0 // bit 4, shadows bit in CWG1AS0bits
6864 #define CWG1LSBD0 CWG1AS0bits.CWG1LSBD0 // bit 4, shadows bit in CWG1AS0bits
6865 #define LSBD1 CWG1AS0bits.LSBD1 // bit 5, shadows bit in CWG1AS0bits
6866 #define CWG1LSBD1 CWG1AS0bits.CWG1LSBD1 // bit 5, shadows bit in CWG1AS0bits
6867 #define REN CWG1AS0bits.REN // bit 6, shadows bit in CWG1AS0bits
6868 #define CWG1REN CWG1AS0bits.CWG1REN // bit 6, shadows bit in CWG1AS0bits
6869 #define SHUTDOWN CWG1AS0bits.SHUTDOWN // bit 7, shadows bit in CWG1AS0bits
6870 #define CWG1SHUTDOWN CWG1AS0bits.CWG1SHUTDOWN // bit 7, shadows bit in CWG1AS0bits
6872 #define INAS CWG1AS1bits.INAS // bit 0, shadows bit in CWG1AS1bits
6873 #define CWG1INAS CWG1AS1bits.CWG1INAS // bit 0, shadows bit in CWG1AS1bits
6874 #define C1AS CWG1AS1bits.C1AS // bit 1, shadows bit in CWG1AS1bits
6875 #define CWG1C1AS CWG1AS1bits.CWG1C1AS // bit 1, shadows bit in CWG1AS1bits
6876 #define C2AS CWG1AS1bits.C2AS // bit 2, shadows bit in CWG1AS1bits
6877 #define CWG1C2AS CWG1AS1bits.CWG1C2AS // bit 2, shadows bit in CWG1AS1bits
6878 #define TMR2AS CWG1AS1bits.TMR2AS // bit 4, shadows bit in CWG1AS1bits
6879 #define CWG1TMR2AS CWG1AS1bits.CWG1TMR2AS // bit 4, shadows bit in CWG1AS1bits
6880 #define TMR4AS CWG1AS1bits.TMR4AS // bit 5, shadows bit in CWG1AS1bits
6881 #define CWG1TMR4AS CWG1AS1bits.CWG1TMR4AS // bit 5, shadows bit in CWG1AS1bits
6882 #define TMR6AS CWG1AS1bits.TMR6AS // bit 6, shadows bit in CWG1AS1bits
6883 #define CWG1TMR6AS CWG1AS1bits.CWG1TMR6AS // bit 6, shadows bit in CWG1AS1bits
6885 #define CS CWG1CLKCONbits.CS // bit 0, shadows bit in CWG1CLKCONbits
6886 #define CWG1CS CWG1CLKCONbits.CWG1CS // bit 0, shadows bit in CWG1CLKCONbits
6888 #define POLA CWG1CON1bits.POLA // bit 0, shadows bit in CWG1CON1bits
6889 #define CWG1POLA CWG1CON1bits.CWG1POLA // bit 0, shadows bit in CWG1CON1bits
6890 #define POLB CWG1CON1bits.POLB // bit 1, shadows bit in CWG1CON1bits
6891 #define CWG1POLB CWG1CON1bits.CWG1POLB // bit 1, shadows bit in CWG1CON1bits
6892 #define POLC CWG1CON1bits.POLC // bit 2, shadows bit in CWG1CON1bits
6893 #define CWG1POLC CWG1CON1bits.CWG1POLC // bit 2, shadows bit in CWG1CON1bits
6894 #define POLD CWG1CON1bits.POLD // bit 3, shadows bit in CWG1CON1bits
6895 #define CWG1POLD CWG1CON1bits.CWG1POLD // bit 3, shadows bit in CWG1CON1bits
6896 #define IN CWG1CON1bits.IN // bit 5, shadows bit in CWG1CON1bits
6897 #define CWG1IN CWG1CON1bits.CWG1IN // bit 5, shadows bit in CWG1CON1bits
6899 #define DBF0 CWG1DBFbits.DBF0 // bit 0, shadows bit in CWG1DBFbits
6900 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0, shadows bit in CWG1DBFbits
6901 #define DBF1 CWG1DBFbits.DBF1 // bit 1, shadows bit in CWG1DBFbits
6902 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1, shadows bit in CWG1DBFbits
6903 #define DBF2 CWG1DBFbits.DBF2 // bit 2, shadows bit in CWG1DBFbits
6904 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2, shadows bit in CWG1DBFbits
6905 #define DBF3 CWG1DBFbits.DBF3 // bit 3, shadows bit in CWG1DBFbits
6906 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3, shadows bit in CWG1DBFbits
6907 #define DBF4 CWG1DBFbits.DBF4 // bit 4, shadows bit in CWG1DBFbits
6908 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4, shadows bit in CWG1DBFbits
6909 #define DBF5 CWG1DBFbits.DBF5 // bit 5, shadows bit in CWG1DBFbits
6910 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5, shadows bit in CWG1DBFbits
6912 #define DBR0 CWG1DBRbits.DBR0 // bit 0, shadows bit in CWG1DBRbits
6913 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0, shadows bit in CWG1DBRbits
6914 #define DBR1 CWG1DBRbits.DBR1 // bit 1, shadows bit in CWG1DBRbits
6915 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1, shadows bit in CWG1DBRbits
6916 #define DBR2 CWG1DBRbits.DBR2 // bit 2, shadows bit in CWG1DBRbits
6917 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2, shadows bit in CWG1DBRbits
6918 #define DBR3 CWG1DBRbits.DBR3 // bit 3, shadows bit in CWG1DBRbits
6919 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3, shadows bit in CWG1DBRbits
6920 #define DBR4 CWG1DBRbits.DBR4 // bit 4, shadows bit in CWG1DBRbits
6921 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4, shadows bit in CWG1DBRbits
6922 #define DBR5 CWG1DBRbits.DBR5 // bit 5, shadows bit in CWG1DBRbits
6923 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5, shadows bit in CWG1DBRbits
6925 #define IS0 CWG1ISMbits.IS0 // bit 0, shadows bit in CWG1ISMbits
6926 #define CWG1IS0 CWG1ISMbits.CWG1IS0 // bit 0, shadows bit in CWG1ISMbits
6927 #define IS1 CWG1ISMbits.IS1 // bit 1, shadows bit in CWG1ISMbits
6928 #define CWG1IS1 CWG1ISMbits.CWG1IS1 // bit 1, shadows bit in CWG1ISMbits
6929 #define IS2 CWG1ISMbits.IS2 // bit 2, shadows bit in CWG1ISMbits
6930 #define CWG1IS2 CWG1ISMbits.CWG1IS2 // bit 2, shadows bit in CWG1ISMbits
6932 #define STRA CWG1OCON0bits.STRA // bit 0, shadows bit in CWG1OCON0bits
6933 #define CWG1STRA CWG1OCON0bits.CWG1STRA // bit 0, shadows bit in CWG1OCON0bits
6934 #define STRB CWG1OCON0bits.STRB // bit 1, shadows bit in CWG1OCON0bits
6935 #define CWG1STRB CWG1OCON0bits.CWG1STRB // bit 1, shadows bit in CWG1OCON0bits
6936 #define STRC CWG1OCON0bits.STRC // bit 2, shadows bit in CWG1OCON0bits
6937 #define CWG1STRC CWG1OCON0bits.CWG1STRC // bit 2, shadows bit in CWG1OCON0bits
6938 #define STRD CWG1OCON0bits.STRD // bit 3, shadows bit in CWG1OCON0bits
6939 #define CWG1STRD CWG1OCON0bits.CWG1STRD // bit 3, shadows bit in CWG1OCON0bits
6940 #define OVRA CWG1OCON0bits.OVRA // bit 4, shadows bit in CWG1OCON0bits
6941 #define CWG1OVRA CWG1OCON0bits.CWG1OVRA // bit 4, shadows bit in CWG1OCON0bits
6942 #define OVRB CWG1OCON0bits.OVRB // bit 5, shadows bit in CWG1OCON0bits
6943 #define CWG1OVRB CWG1OCON0bits.CWG1OVRB // bit 5, shadows bit in CWG1OCON0bits
6944 #define OVRC CWG1OCON0bits.OVRC // bit 6, shadows bit in CWG1OCON0bits
6945 #define CWG1OVRC CWG1OCON0bits.CWG1OVRC // bit 6, shadows bit in CWG1OCON0bits
6946 #define OVRD CWG1OCON0bits.OVRD // bit 7, shadows bit in CWG1OCON0bits
6947 #define CWG1OVRD CWG1OCON0bits.CWG1OVRD // bit 7, shadows bit in CWG1OCON0bits
6949 #define OEA CWG1OCON1bits.OEA // bit 0, shadows bit in CWG1OCON1bits
6950 #define CWG1OEA CWG1OCON1bits.CWG1OEA // bit 0, shadows bit in CWG1OCON1bits
6951 #define OEB CWG1OCON1bits.OEB // bit 1, shadows bit in CWG1OCON1bits
6952 #define CWG1OEB CWG1OCON1bits.CWG1OEB // bit 1, shadows bit in CWG1OCON1bits
6953 #define OEC CWG1OCON1bits.OEC // bit 2, shadows bit in CWG1OCON1bits
6954 #define CWG1OEC CWG1OCON1bits.CWG1OEC // bit 2, shadows bit in CWG1OCON1bits
6955 #define OED CWG1OCON1bits.OED // bit 3, shadows bit in CWG1OCON1bits
6956 #define CWG1OED CWG1OCON1bits.CWG1OED // bit 3, shadows bit in CWG1OCON1bits
6958 #define D1PSS0 DAC1CON0bits.D1PSS0 // bit 2
6959 #define D1PSS1 DAC1CON0bits.D1PSS1 // bit 3
6960 #define DAC1OE DAC1CON0bits.DAC1OE // bit 5
6961 #define DAC1EN DAC1CON0bits.DAC1EN // bit 7
6963 #define DAC1R0 DAC1CON1bits.DAC1R0 // bit 0
6964 #define DAC1R1 DAC1CON1bits.DAC1R1 // bit 1
6965 #define DAC1R2 DAC1CON1bits.DAC1R2 // bit 2
6966 #define DAC1R3 DAC1CON1bits.DAC1R3 // bit 3
6967 #define DAC1R4 DAC1CON1bits.DAC1R4 // bit 4
6968 #define DAC1R5 DAC1CON1bits.DAC1R5 // bit 5
6969 #define DAC1R6 DAC1CON1bits.DAC1R6 // bit 6
6970 #define DAC1R7 DAC1CON1bits.DAC1R7 // bit 7
6972 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
6973 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
6974 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
6975 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
6976 #define TSRNG FVRCONbits.TSRNG // bit 4
6977 #define TSEN FVRCONbits.TSEN // bit 5
6978 #define FVRRDY FVRCONbits.FVRRDY // bit 6
6979 #define FVREN FVRCONbits.FVREN // bit 7
6981 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
6982 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
6983 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
6984 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
6985 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
6986 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
6988 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0
6989 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1
6990 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2
6991 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3
6992 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4
6993 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5
6995 #define IOCIF INTCONbits.IOCIF // bit 0
6996 #define INTF INTCONbits.INTF // bit 1
6997 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
6998 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
6999 #define IOCIE INTCONbits.IOCIE // bit 3
7000 #define INTE INTCONbits.INTE // bit 4
7001 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
7002 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
7003 #define PEIE INTCONbits.PEIE // bit 6
7004 #define GIE INTCONbits.GIE // bit 7
7006 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
7007 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
7008 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
7009 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
7010 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
7011 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
7013 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
7014 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
7015 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
7016 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
7017 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
7018 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
7020 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
7021 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
7022 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
7023 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
7024 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
7025 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
7027 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
7028 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
7029 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
7030 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
7031 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
7032 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
7034 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
7035 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
7036 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
7037 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
7038 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
7039 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
7041 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
7042 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
7043 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
7044 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
7045 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
7046 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
7048 #define LATA0 LATAbits.LATA0 // bit 0
7049 #define LATA1 LATAbits.LATA1 // bit 1
7050 #define LATA2 LATAbits.LATA2 // bit 2
7051 #define LATA3 LATAbits.LATA3 // bit 3
7052 #define LATA4 LATAbits.LATA4 // bit 4
7053 #define LATA5 LATAbits.LATA5 // bit 5
7055 #define LATC0 LATCbits.LATC0 // bit 0
7056 #define LATC1 LATCbits.LATC1 // bit 1
7057 #define LATC2 LATCbits.LATC2 // bit 2
7058 #define LATC3 LATCbits.LATC3 // bit 3
7059 #define LATC4 LATCbits.LATC4 // bit 4
7060 #define LATC5 LATCbits.LATC5 // bit 5
7062 #define ODA0 ODCONAbits.ODA0 // bit 0
7063 #define ODA1 ODCONAbits.ODA1 // bit 1
7064 #define ODA2 ODCONAbits.ODA2 // bit 2
7065 #define ODA4 ODCONAbits.ODA4 // bit 4
7066 #define ODA5 ODCONAbits.ODA5 // bit 5
7068 #define ODC0 ODCONCbits.ODC0 // bit 0
7069 #define ODC1 ODCONCbits.ODC1 // bit 1
7070 #define ODC2 ODCONCbits.ODC2 // bit 2
7071 #define ODC3 ODCONCbits.ODC3 // bit 3
7072 #define ODC4 ODCONCbits.ODC4 // bit 4
7073 #define ODC5 ODCONCbits.ODC5 // bit 5
7075 #define PS0 OPTION_REGbits.PS0 // bit 0
7076 #define PS1 OPTION_REGbits.PS1 // bit 1
7077 #define PS2 OPTION_REGbits.PS2 // bit 2
7078 #define PSA OPTION_REGbits.PSA // bit 3
7079 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
7080 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
7081 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
7082 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
7083 #define INTEDG OPTION_REGbits.INTEDG // bit 6
7084 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
7086 #define SCS0 OSCCONbits.SCS0 // bit 0
7087 #define SCS1 OSCCONbits.SCS1 // bit 1
7088 #define IRCF0 OSCCONbits.IRCF0 // bit 3
7089 #define IRCF1 OSCCONbits.IRCF1 // bit 4
7090 #define IRCF2 OSCCONbits.IRCF2 // bit 5
7091 #define IRCF3 OSCCONbits.IRCF3 // bit 6
7092 #define SPLLEN OSCCONbits.SPLLEN // bit 7
7094 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
7095 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
7096 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
7097 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
7098 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
7099 #define PLLR OSCSTATbits.PLLR // bit 6
7101 #define TUN0 OSCTUNEbits.TUN0 // bit 0
7102 #define TUN1 OSCTUNEbits.TUN1 // bit 1
7103 #define TUN2 OSCTUNEbits.TUN2 // bit 2
7104 #define TUN3 OSCTUNEbits.TUN3 // bit 3
7105 #define TUN4 OSCTUNEbits.TUN4 // bit 4
7106 #define TUN5 OSCTUNEbits.TUN5 // bit 5
7108 #define NOT_BOR PCONbits.NOT_BOR // bit 0
7109 #define NOT_POR PCONbits.NOT_POR // bit 1
7110 #define NOT_RI PCONbits.NOT_RI // bit 2
7111 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
7112 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
7113 #define NOT_WDTWV PCONbits.NOT_WDTWV // bit 5
7114 #define STKUNF PCONbits.STKUNF // bit 6
7115 #define STKOVF PCONbits.STKOVF // bit 7
7117 #define TMR1IE PIE1bits.TMR1IE // bit 0
7118 #define TMR2IE PIE1bits.TMR2IE // bit 1
7119 #define CCP1IE PIE1bits.CCP1IE // bit 2
7120 #define ADIE PIE1bits.ADIE // bit 6
7121 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
7123 #define CCP2IE PIE2bits.CCP2IE // bit 0
7124 #define TMR4IE PIE2bits.TMR4IE // bit 1
7125 #define TMR6IE PIE2bits.TMR6IE // bit 2
7126 #define C1IE PIE2bits.C1IE // bit 5
7127 #define C2IE PIE2bits.C2IE // bit 6
7129 #define ZCDIE PIE3bits.ZCDIE // bit 4
7130 #define CWGIE PIE3bits.CWGIE // bit 5
7132 #define SMT1IE PIE4bits.SMT1IE // bit 0
7133 #define SMT1PRAIE PIE4bits.SMT1PRAIE // bit 1
7134 #define SMT1PWAIE PIE4bits.SMT1PWAIE // bit 2
7135 #define SMT2IE PIE4bits.SMT2IE // bit 3
7136 #define SMT2PRAIE PIE4bits.SMT2PRAIE // bit 4
7137 #define SMT2PWAIE PIE4bits.SMT2PWAIE // bit 5
7138 #define CRCIE PIE4bits.CRCIE // bit 6
7139 #define SCANIE PIE4bits.SCANIE // bit 7
7141 #define TMR1IF PIR1bits.TMR1IF // bit 0
7142 #define TMR2IF PIR1bits.TMR2IF // bit 1
7143 #define CCP1IF PIR1bits.CCP1IF // bit 2
7144 #define ADIF PIR1bits.ADIF // bit 6
7145 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
7147 #define CCP2IF PIR2bits.CCP2IF // bit 0
7148 #define TMR4IF PIR2bits.TMR4IF // bit 1
7149 #define TMR6IF PIR2bits.TMR6IF // bit 2
7150 #define C1IF PIR2bits.C1IF // bit 5
7151 #define C2IF PIR2bits.C2IF // bit 6
7153 #define ZCDIF PIR3bits.ZCDIF // bit 4
7154 #define CWGIF PIR3bits.CWGIF // bit 5
7156 #define SMT1IF PIR4bits.SMT1IF // bit 0
7157 #define SMT1PRAIF PIR4bits.SMT1PRAIF // bit 1
7158 #define SMT1PWAIF PIR4bits.SMT1PWAIF // bit 2
7159 #define SMT2IF PIR4bits.SMT2IF // bit 3
7160 #define SMT2PRAIF PIR4bits.SMT2PRAIF // bit 4
7161 #define SMT2PWAIF PIR4bits.SMT2PWAIF // bit 5
7162 #define CRCIF PIR4bits.CRCIF // bit 6
7163 #define SCANIF PIR4bits.SCANIF // bit 7
7165 #define RD PMCON1bits.RD // bit 0
7166 #define WR PMCON1bits.WR // bit 1
7167 #define WREN PMCON1bits.WREN // bit 2
7168 #define WRERR PMCON1bits.WRERR // bit 3
7169 #define FREE PMCON1bits.FREE // bit 4
7170 #define LWLO PMCON1bits.LWLO // bit 5
7171 #define CFGS PMCON1bits.CFGS // bit 6
7173 #define RA0 PORTAbits.RA0 // bit 0
7174 #define RA1 PORTAbits.RA1 // bit 1
7175 #define RA2 PORTAbits.RA2 // bit 2
7176 #define RA3 PORTAbits.RA3 // bit 3
7177 #define RA4 PORTAbits.RA4 // bit 4
7178 #define RA5 PORTAbits.RA5 // bit 5
7180 #define RC0 PORTCbits.RC0 // bit 0
7181 #define RC1 PORTCbits.RC1 // bit 1
7182 #define RC2 PORTCbits.RC2 // bit 2
7183 #define RC3 PORTCbits.RC3 // bit 3
7184 #define RC4 PORTCbits.RC4 // bit 4
7185 #define RC5 PORTCbits.RC5 // bit 5
7187 #define HADR8 SCANHADRHbits.HADR8 // bit 0, shadows bit in SCANHADRHbits
7188 #define SCANHADR8 SCANHADRHbits.SCANHADR8 // bit 0, shadows bit in SCANHADRHbits
7189 #define HADR9 SCANHADRHbits.HADR9 // bit 1, shadows bit in SCANHADRHbits
7190 #define SCANHADR9 SCANHADRHbits.SCANHADR9 // bit 1, shadows bit in SCANHADRHbits
7191 #define HADR10 SCANHADRHbits.HADR10 // bit 2, shadows bit in SCANHADRHbits
7192 #define SCANHADR10 SCANHADRHbits.SCANHADR10 // bit 2, shadows bit in SCANHADRHbits
7193 #define HADR11 SCANHADRHbits.HADR11 // bit 3, shadows bit in SCANHADRHbits
7194 #define SCANHADR11 SCANHADRHbits.SCANHADR11 // bit 3, shadows bit in SCANHADRHbits
7195 #define HADR12 SCANHADRHbits.HADR12 // bit 4, shadows bit in SCANHADRHbits
7196 #define SCANHADR12 SCANHADRHbits.SCANHADR12 // bit 4, shadows bit in SCANHADRHbits
7197 #define HADR13 SCANHADRHbits.HADR13 // bit 5, shadows bit in SCANHADRHbits
7198 #define SCANHADR13 SCANHADRHbits.SCANHADR13 // bit 5, shadows bit in SCANHADRHbits
7199 #define HADR14 SCANHADRHbits.HADR14 // bit 6, shadows bit in SCANHADRHbits
7200 #define SCANHADR14 SCANHADRHbits.SCANHADR14 // bit 6, shadows bit in SCANHADRHbits
7201 #define HADR15 SCANHADRHbits.HADR15 // bit 7, shadows bit in SCANHADRHbits
7202 #define SCANHADR15 SCANHADRHbits.SCANHADR15 // bit 7, shadows bit in SCANHADRHbits
7204 #define HADR0 SCANHADRLbits.HADR0 // bit 0, shadows bit in SCANHADRLbits
7205 #define SCANHADR0 SCANHADRLbits.SCANHADR0 // bit 0, shadows bit in SCANHADRLbits
7206 #define HADR1 SCANHADRLbits.HADR1 // bit 1, shadows bit in SCANHADRLbits
7207 #define SCANHADR1 SCANHADRLbits.SCANHADR1 // bit 1, shadows bit in SCANHADRLbits
7208 #define HARD2 SCANHADRLbits.HARD2 // bit 2, shadows bit in SCANHADRLbits
7209 #define SCANHADR2 SCANHADRLbits.SCANHADR2 // bit 2, shadows bit in SCANHADRLbits
7210 #define HADR3 SCANHADRLbits.HADR3 // bit 3, shadows bit in SCANHADRLbits
7211 #define SCANHADR3 SCANHADRLbits.SCANHADR3 // bit 3, shadows bit in SCANHADRLbits
7212 #define HADR4 SCANHADRLbits.HADR4 // bit 4, shadows bit in SCANHADRLbits
7213 #define SCANHADR4 SCANHADRLbits.SCANHADR4 // bit 4, shadows bit in SCANHADRLbits
7214 #define HADR5 SCANHADRLbits.HADR5 // bit 5, shadows bit in SCANHADRLbits
7215 #define SCANHADR5 SCANHADRLbits.SCANHADR5 // bit 5, shadows bit in SCANHADRLbits
7216 #define HADR6 SCANHADRLbits.HADR6 // bit 6, shadows bit in SCANHADRLbits
7217 #define SCANHADR6 SCANHADRLbits.SCANHADR6 // bit 6, shadows bit in SCANHADRLbits
7218 #define HADR7 SCANHADRLbits.HADR7 // bit 7, shadows bit in SCANHADRLbits
7219 #define SCANHADR7 SCANHADRLbits.SCANHADR7 // bit 7, shadows bit in SCANHADRLbits
7221 #define LADR8 SCANLADRHbits.LADR8 // bit 0, shadows bit in SCANLADRHbits
7222 #define SCANLADR8 SCANLADRHbits.SCANLADR8 // bit 0, shadows bit in SCANLADRHbits
7223 #define LADR9 SCANLADRHbits.LADR9 // bit 1, shadows bit in SCANLADRHbits
7224 #define SCANLADR9 SCANLADRHbits.SCANLADR9 // bit 1, shadows bit in SCANLADRHbits
7225 #define LADR10 SCANLADRHbits.LADR10 // bit 2, shadows bit in SCANLADRHbits
7226 #define SCANLADR10 SCANLADRHbits.SCANLADR10 // bit 2, shadows bit in SCANLADRHbits
7227 #define LADR11 SCANLADRHbits.LADR11 // bit 3, shadows bit in SCANLADRHbits
7228 #define SCANLADR11 SCANLADRHbits.SCANLADR11 // bit 3, shadows bit in SCANLADRHbits
7229 #define LADR12 SCANLADRHbits.LADR12 // bit 4, shadows bit in SCANLADRHbits
7230 #define SCANLADR12 SCANLADRHbits.SCANLADR12 // bit 4, shadows bit in SCANLADRHbits
7231 #define LADR13 SCANLADRHbits.LADR13 // bit 5, shadows bit in SCANLADRHbits
7232 #define SCANLADR13 SCANLADRHbits.SCANLADR13 // bit 5, shadows bit in SCANLADRHbits
7233 #define LADR14 SCANLADRHbits.LADR14 // bit 6, shadows bit in SCANLADRHbits
7234 #define SCANLADR14 SCANLADRHbits.SCANLADR14 // bit 6, shadows bit in SCANLADRHbits
7235 #define LADR15 SCANLADRHbits.LADR15 // bit 7, shadows bit in SCANLADRHbits
7236 #define SCANLADR15 SCANLADRHbits.SCANLADR15 // bit 7, shadows bit in SCANLADRHbits
7238 #define LDAR0 SCANLADRLbits.LDAR0 // bit 0, shadows bit in SCANLADRLbits
7239 #define SCANLADR0 SCANLADRLbits.SCANLADR0 // bit 0, shadows bit in SCANLADRLbits
7240 #define LDAR1 SCANLADRLbits.LDAR1 // bit 1, shadows bit in SCANLADRLbits
7241 #define SCANLADR1 SCANLADRLbits.SCANLADR1 // bit 1, shadows bit in SCANLADRLbits
7242 #define LADR2 SCANLADRLbits.LADR2 // bit 2, shadows bit in SCANLADRLbits
7243 #define SCANLADR2 SCANLADRLbits.SCANLADR2 // bit 2, shadows bit in SCANLADRLbits
7244 #define LADR3 SCANLADRLbits.LADR3 // bit 3, shadows bit in SCANLADRLbits
7245 #define SCANLADR3 SCANLADRLbits.SCANLADR3 // bit 3, shadows bit in SCANLADRLbits
7246 #define LADR4 SCANLADRLbits.LADR4 // bit 4, shadows bit in SCANLADRLbits
7247 #define SCANLADR4 SCANLADRLbits.SCANLADR4 // bit 4, shadows bit in SCANLADRLbits
7248 #define LADR5 SCANLADRLbits.LADR5 // bit 5, shadows bit in SCANLADRLbits
7249 #define SCANLADR5 SCANLADRLbits.SCANLADR5 // bit 5, shadows bit in SCANLADRLbits
7250 #define LADR6 SCANLADRLbits.LADR6 // bit 6, shadows bit in SCANLADRLbits
7251 #define SCANLADR6 SCANLADRLbits.SCANLADR6 // bit 6, shadows bit in SCANLADRLbits
7252 #define LADR7 SCANLADRLbits.LADR7 // bit 7, shadows bit in SCANLADRLbits
7253 #define SCANLADR7 SCANLADRLbits.SCANLADR7 // bit 7, shadows bit in SCANLADRLbits
7255 #define TSEL0 SCANTRIGbits.TSEL0 // bit 0, shadows bit in SCANTRIGbits
7256 #define SCANTSEL0 SCANTRIGbits.SCANTSEL0 // bit 0, shadows bit in SCANTRIGbits
7257 #define TSEL1 SCANTRIGbits.TSEL1 // bit 1, shadows bit in SCANTRIGbits
7258 #define SCANTSEL1 SCANTRIGbits.SCANTSEL1 // bit 1, shadows bit in SCANTRIGbits
7260 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
7261 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
7262 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
7263 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
7264 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
7266 #define SLRC0 SLRCONCbits.SLRC0 // bit 0
7267 #define SLRC1 SLRCONCbits.SLRC1 // bit 1
7268 #define SLRC2 SLRCONCbits.SLRC2 // bit 2
7269 #define SLRC3 SLRCONCbits.SLRC3 // bit 3
7270 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
7271 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
7273 #define CSEL0 SMT1CLKbits.CSEL0 // bit 0, shadows bit in SMT1CLKbits
7274 #define SMT1CSEL0 SMT1CLKbits.SMT1CSEL0 // bit 0, shadows bit in SMT1CLKbits
7275 #define CSEL1 SMT1CLKbits.CSEL1 // bit 1, shadows bit in SMT1CLKbits
7276 #define SMT1CSEL1 SMT1CLKbits.SMT1CSEL1 // bit 1, shadows bit in SMT1CLKbits
7277 #define CSEL2 SMT1CLKbits.CSEL2 // bit 2, shadows bit in SMT1CLKbits
7278 #define SMT1CSEL2 SMT1CLKbits.SMT1CSEL2 // bit 2, shadows bit in SMT1CLKbits
7280 #define SMT1CPR8 SMT1CPRHbits.SMT1CPR8 // bit 0
7281 #define SMT1CPR9 SMT1CPRHbits.SMT1CPR9 // bit 1
7282 #define SMT1CPR10 SMT1CPRHbits.SMT1CPR10 // bit 2
7283 #define SMT1CPR11 SMT1CPRHbits.SMT1CPR11 // bit 3
7284 #define SMT1CPR12 SMT1CPRHbits.SMT1CPR12 // bit 4
7285 #define SMT1CPR13 SMT1CPRHbits.SMT1CPR13 // bit 5
7286 #define SMT1CPR14 SMT1CPRHbits.SMT1CPR14 // bit 6
7287 #define SMT1CPR15 SMT1CPRHbits.SMT1CPR15 // bit 7
7289 #define SMT1CPR0 SMT1CPRLbits.SMT1CPR0 // bit 0
7290 #define SMT1CPR1 SMT1CPRLbits.SMT1CPR1 // bit 1
7291 #define SMT1CPR2 SMT1CPRLbits.SMT1CPR2 // bit 2
7292 #define SMT1CPR3 SMT1CPRLbits.SMT1CPR3 // bit 3
7293 #define SMT1CPR4 SMT1CPRLbits.SMT1CPR4 // bit 4
7294 #define SMT1CPR5 SMT1CPRLbits.SMT1CPR5 // bit 5
7295 #define SMT1CPR6 SMT1CPRLbits.SMT1CPR6 // bit 6
7296 #define SMT1CPR7 SMT1CPRLbits.SMT1CPR7 // bit 7
7298 #define SMT1CPR16 SMT1CPRUbits.SMT1CPR16 // bit 0
7299 #define SMT1CPR17 SMT1CPRUbits.SMT1CPR17 // bit 1
7300 #define SMT1CPR18 SMT1CPRUbits.SMT1CPR18 // bit 2
7301 #define SMT1CPR19 SMT1CPRUbits.SMT1CPR19 // bit 3
7302 #define SMT1CPR20 SMT1CPRUbits.SMT1CPR20 // bit 4
7303 #define SMT1CPR21 SMT1CPRUbits.SMT1CPR21 // bit 5
7304 #define SMT1CPR22 SMT1CPRUbits.SMT1CPR22 // bit 6
7305 #define SMT1CPR23 SMT1CPRUbits.SMT1CPR23 // bit 7
7307 #define SMT1CPW8 SMT1CPWHbits.SMT1CPW8 // bit 0
7308 #define SMT1CPW9 SMT1CPWHbits.SMT1CPW9 // bit 1
7309 #define SMT1CPW10 SMT1CPWHbits.SMT1CPW10 // bit 2
7310 #define SMT1CPW11 SMT1CPWHbits.SMT1CPW11 // bit 3
7311 #define SMT1CPW12 SMT1CPWHbits.SMT1CPW12 // bit 4
7312 #define SMT1CPW13 SMT1CPWHbits.SMT1CPW13 // bit 5
7313 #define SMT1CPW14 SMT1CPWHbits.SMT1CPW14 // bit 6
7314 #define SMT1CPW15 SMT1CPWHbits.SMT1CPW15 // bit 7
7316 #define SMT1CPW0 SMT1CPWLbits.SMT1CPW0 // bit 0
7317 #define SMT1CPW1 SMT1CPWLbits.SMT1CPW1 // bit 1
7318 #define SMT1CPW2 SMT1CPWLbits.SMT1CPW2 // bit 2
7319 #define SMT1CPW3 SMT1CPWLbits.SMT1CPW3 // bit 3
7320 #define SMT1CPW4 SMT1CPWLbits.SMT1CPW4 // bit 4
7321 #define SMT1CPW5 SMT1CPWLbits.SMT1CPW5 // bit 5
7322 #define SMT1CPW6 SMT1CPWLbits.SMT1CPW6 // bit 6
7323 #define SMT1CPW7 SMT1CPWLbits.SMT1CPW7 // bit 7
7325 #define SMT1CPW16 SMT1CPWUbits.SMT1CPW16 // bit 0
7326 #define SMT1CPW17 SMT1CPWUbits.SMT1CPW17 // bit 1
7327 #define SMT1CPW18 SMT1CPWUbits.SMT1CPW18 // bit 2
7328 #define SMT1CPW19 SMT1CPWUbits.SMT1CPW19 // bit 3
7329 #define SMT1CPW20 SMT1CPWUbits.SMT1CPW20 // bit 4
7330 #define SMT1CPW21 SMT1CPWUbits.SMT1CPW21 // bit 5
7331 #define SMT1CPW22 SMT1CPWUbits.SMT1CPW22 // bit 6
7332 #define SMT1CPW23 SMT1CPWUbits.SMT1CPW23 // bit 7
7334 #define SMT1PR8 SMT1PRHbits.SMT1PR8 // bit 0
7335 #define SMT1PR9 SMT1PRHbits.SMT1PR9 // bit 1
7336 #define SMT1PR10 SMT1PRHbits.SMT1PR10 // bit 2
7337 #define SMT1PR11 SMT1PRHbits.SMT1PR11 // bit 3
7338 #define SMT1PR12 SMT1PRHbits.SMT1PR12 // bit 4
7339 #define SMT1PR13 SMT1PRHbits.SMT1PR13 // bit 5
7340 #define SMT1PR14 SMT1PRHbits.SMT1PR14 // bit 6
7341 #define SMT1PR15 SMT1PRHbits.SMT1PR15 // bit 7
7343 #define SMT1PR0 SMT1PRLbits.SMT1PR0 // bit 0
7344 #define SMT1PR1 SMT1PRLbits.SMT1PR1 // bit 1
7345 #define SMT1PR2 SMT1PRLbits.SMT1PR2 // bit 2
7346 #define SMT1PR3 SMT1PRLbits.SMT1PR3 // bit 3
7347 #define SMT1PR4 SMT1PRLbits.SMT1PR4 // bit 4
7348 #define SMT1PR5 SMT1PRLbits.SMT1PR5 // bit 5
7349 #define SMT1PR6 SMT1PRLbits.SMT1PR6 // bit 6
7350 #define SMT1PR7 SMT1PRLbits.SMT1PR7 // bit 7
7352 #define SMT1PR16 SMT1PRUbits.SMT1PR16 // bit 0
7353 #define SMT1PR17 SMT1PRUbits.SMT1PR17 // bit 1
7354 #define SMT1PR18 SMT1PRUbits.SMT1PR18 // bit 2
7355 #define SMT1PR19 SMT1PRUbits.SMT1PR19 // bit 3
7356 #define SMT1PR20 SMT1PRUbits.SMT1PR20 // bit 4
7357 #define SMT1PR21 SMT1PRUbits.SMT1PR21 // bit 5
7358 #define SMT1PR22 SMT1PRUbits.SMT1PR22 // bit 6
7359 #define SMT1PR23 SMT1PRUbits.SMT1PR23 // bit 7
7361 #define SSEL0 SMT1SIGbits.SSEL0 // bit 0, shadows bit in SMT1SIGbits
7362 #define SMT1SSEL0 SMT1SIGbits.SMT1SSEL0 // bit 0, shadows bit in SMT1SIGbits
7363 #define SSEL1 SMT1SIGbits.SSEL1 // bit 1, shadows bit in SMT1SIGbits
7364 #define SMT1SSEL1 SMT1SIGbits.SMT1SSEL1 // bit 1, shadows bit in SMT1SIGbits
7365 #define SSEL2 SMT1SIGbits.SSEL2 // bit 2, shadows bit in SMT1SIGbits
7366 #define SMT1SSEL2 SMT1SIGbits.SMT1SSEL2 // bit 2, shadows bit in SMT1SIGbits
7368 #define AS SMT1STATbits.AS // bit 0, shadows bit in SMT1STATbits
7369 #define SMT1AS SMT1STATbits.SMT1AS // bit 0, shadows bit in SMT1STATbits
7370 #define WS SMT1STATbits.WS // bit 1, shadows bit in SMT1STATbits
7371 #define SMT1WS SMT1STATbits.SMT1WS // bit 1, shadows bit in SMT1STATbits
7372 #define TS SMT1STATbits.TS // bit 2, shadows bit in SMT1STATbits
7373 #define SMT1TS SMT1STATbits.SMT1TS // bit 2, shadows bit in SMT1STATbits
7374 #define RST SMT1STATbits.RST // bit 5, shadows bit in SMT1STATbits
7375 #define SMT1RESET SMT1STATbits.SMT1RESET // bit 5, shadows bit in SMT1STATbits
7376 #define CPWUP SMT1STATbits.CPWUP // bit 6, shadows bit in SMT1STATbits
7377 #define SMT1CPWUP SMT1STATbits.SMT1CPWUP // bit 6, shadows bit in SMT1STATbits
7378 #define CPRUP SMT1STATbits.CPRUP // bit 7, shadows bit in SMT1STATbits
7379 #define SMT1CPRUP SMT1STATbits.SMT1CPRUP // bit 7, shadows bit in SMT1STATbits
7381 #define SMT1TMR8 SMT1TMRHbits.SMT1TMR8 // bit 0
7382 #define SMT1TMR9 SMT1TMRHbits.SMT1TMR9 // bit 1
7383 #define SMT1TMR10 SMT1TMRHbits.SMT1TMR10 // bit 2
7384 #define SMT1TMR11 SMT1TMRHbits.SMT1TMR11 // bit 3
7385 #define SMT1TMR12 SMT1TMRHbits.SMT1TMR12 // bit 4
7386 #define SMT1TMR13 SMT1TMRHbits.SMT1TMR13 // bit 5
7387 #define SMT1TMR14 SMT1TMRHbits.SMT1TMR14 // bit 6
7388 #define SMT1TMR15 SMT1TMRHbits.SMT1TMR15 // bit 7
7390 #define SMT1TMR0 SMT1TMRLbits.SMT1TMR0 // bit 0
7391 #define SMT1TMR1 SMT1TMRLbits.SMT1TMR1 // bit 1
7392 #define SMT1TMR2 SMT1TMRLbits.SMT1TMR2 // bit 2
7393 #define SMT1TMR3 SMT1TMRLbits.SMT1TMR3 // bit 3
7394 #define SMT1TMR4 SMT1TMRLbits.SMT1TMR4 // bit 4
7395 #define SMT1TMR5 SMT1TMRLbits.SMT1TMR5 // bit 5
7396 #define SMT1TMR6 SMT1TMRLbits.SMT1TMR6 // bit 6
7397 #define SMT1TMR7 SMT1TMRLbits.SMT1TMR7 // bit 7
7399 #define SMT1TMR16 SMT1TMRUbits.SMT1TMR16 // bit 0
7400 #define SMT1TMR17 SMT1TMRUbits.SMT1TMR17 // bit 1
7401 #define SMT1TMR18 SMT1TMRUbits.SMT1TMR18 // bit 2
7402 #define SMT1TMR19 SMT1TMRUbits.SMT1TMR19 // bit 3
7403 #define SMT1TMR20 SMT1TMRUbits.SMT1TMR20 // bit 4
7404 #define SMT1TMR21 SMT1TMRUbits.SMT1TMR21 // bit 5
7405 #define SMT1TMR22 SMT1TMRUbits.SMT1TMR22 // bit 6
7406 #define SMT1TMR23 SMT1TMRUbits.SMT1TMR23 // bit 7
7408 #define WSEL0 SMT1WINbits.WSEL0 // bit 0, shadows bit in SMT1WINbits
7409 #define SMT1WSEL0 SMT1WINbits.SMT1WSEL0 // bit 0, shadows bit in SMT1WINbits
7410 #define WSEL1 SMT1WINbits.WSEL1 // bit 1, shadows bit in SMT1WINbits
7411 #define SMT1WSEL1 SMT1WINbits.SMT1WSEL1 // bit 1, shadows bit in SMT1WINbits
7412 #define WSEL2 SMT1WINbits.WSEL2 // bit 2, shadows bit in SMT1WINbits
7413 #define SMT1WSEL2 SMT1WINbits.SMT1WSEL2 // bit 2, shadows bit in SMT1WINbits
7414 #define WSEL3 SMT1WINbits.WSEL3 // bit 3, shadows bit in SMT1WINbits
7415 #define SMT1WSEL3 SMT1WINbits.SMT1WSEL3 // bit 3, shadows bit in SMT1WINbits
7417 #define SMT2CPR8 SMT2CPRHbits.SMT2CPR8 // bit 0
7418 #define SMT2CPR9 SMT2CPRHbits.SMT2CPR9 // bit 1
7419 #define SMT2CPR10 SMT2CPRHbits.SMT2CPR10 // bit 2
7420 #define SMT2CPR11 SMT2CPRHbits.SMT2CPR11 // bit 3
7421 #define SMT2CPR12 SMT2CPRHbits.SMT2CPR12 // bit 4
7422 #define SMT2CPR13 SMT2CPRHbits.SMT2CPR13 // bit 5
7423 #define SMT2CPR14 SMT2CPRHbits.SMT2CPR14 // bit 6
7424 #define SMT2CPR15 SMT2CPRHbits.SMT2CPR15 // bit 7
7426 #define SMT2CPR0 SMT2CPRLbits.SMT2CPR0 // bit 0
7427 #define SMT2CPR1 SMT2CPRLbits.SMT2CPR1 // bit 1
7428 #define SMT2CPR2 SMT2CPRLbits.SMT2CPR2 // bit 2
7429 #define SMT2CPR3 SMT2CPRLbits.SMT2CPR3 // bit 3
7430 #define SMT2CPR4 SMT2CPRLbits.SMT2CPR4 // bit 4
7431 #define SMT2CPR5 SMT2CPRLbits.SMT2CPR5 // bit 5
7432 #define SMT2CPR6 SMT2CPRLbits.SMT2CPR6 // bit 6
7433 #define SMT2CPR7 SMT2CPRLbits.SMT2CPR7 // bit 7
7435 #define SMT2CPR16 SMT2CPRUbits.SMT2CPR16 // bit 0
7436 #define SMT2CPR17 SMT2CPRUbits.SMT2CPR17 // bit 1
7437 #define SMT2CPR18 SMT2CPRUbits.SMT2CPR18 // bit 2
7438 #define SMT2CPR19 SMT2CPRUbits.SMT2CPR19 // bit 3
7439 #define SMT2CPR20 SMT2CPRUbits.SMT2CPR20 // bit 4
7440 #define SMT2CPR21 SMT2CPRUbits.SMT2CPR21 // bit 5
7441 #define SMT2CPR22 SMT2CPRUbits.SMT2CPR22 // bit 6
7442 #define SMT2CPR23 SMT2CPRUbits.SMT2CPR23 // bit 7
7444 #define SMT2CPW8 SMT2CPWHbits.SMT2CPW8 // bit 0
7445 #define SMT2CPW9 SMT2CPWHbits.SMT2CPW9 // bit 1
7446 #define SMT2CPW10 SMT2CPWHbits.SMT2CPW10 // bit 2
7447 #define SMT2CPW11 SMT2CPWHbits.SMT2CPW11 // bit 3
7448 #define SMT2CPW12 SMT2CPWHbits.SMT2CPW12 // bit 4
7449 #define SMT2CPW13 SMT2CPWHbits.SMT2CPW13 // bit 5
7450 #define SMT2CPW14 SMT2CPWHbits.SMT2CPW14 // bit 6
7451 #define SMT2CPW15 SMT2CPWHbits.SMT2CPW15 // bit 7
7453 #define SMT2CPW0 SMT2CPWLbits.SMT2CPW0 // bit 0
7454 #define SMT2CPW1 SMT2CPWLbits.SMT2CPW1 // bit 1
7455 #define SMT2CPW2 SMT2CPWLbits.SMT2CPW2 // bit 2
7456 #define SMT2CPW3 SMT2CPWLbits.SMT2CPW3 // bit 3
7457 #define SMT2CPW4 SMT2CPWLbits.SMT2CPW4 // bit 4
7458 #define SMT2CPW5 SMT2CPWLbits.SMT2CPW5 // bit 5
7459 #define SMT2CPW6 SMT2CPWLbits.SMT2CPW6 // bit 6
7460 #define SMT2CPW7 SMT2CPWLbits.SMT2CPW7 // bit 7
7462 #define SMT2CPW16 SMT2CPWUbits.SMT2CPW16 // bit 0
7463 #define SMT2CPW17 SMT2CPWUbits.SMT2CPW17 // bit 1
7464 #define SMT2CPW18 SMT2CPWUbits.SMT2CPW18 // bit 2
7465 #define SMT2CPW19 SMT2CPWUbits.SMT2CPW19 // bit 3
7466 #define SMT2CPW20 SMT2CPWUbits.SMT2CPW20 // bit 4
7467 #define SMT2CPW21 SMT2CPWUbits.SMT2CPW21 // bit 5
7468 #define SMT2CPW22 SMT2CPWUbits.SMT2CPW22 // bit 6
7469 #define SMT2CPW23 SMT2CPWUbits.SMT2CPW23 // bit 7
7471 #define SMT2PR8 SMT2PRHbits.SMT2PR8 // bit 0
7472 #define SMT2PR9 SMT2PRHbits.SMT2PR9 // bit 1
7473 #define SMT2PR10 SMT2PRHbits.SMT2PR10 // bit 2
7474 #define SMT2PR11 SMT2PRHbits.SMT2PR11 // bit 3
7475 #define SMT2PR12 SMT2PRHbits.SMT2PR12 // bit 4
7476 #define SMT2PR13 SMT2PRHbits.SMT2PR13 // bit 5
7477 #define SMT2PR14 SMT2PRHbits.SMT2PR14 // bit 6
7478 #define SMT2PR15 SMT2PRHbits.SMT2PR15 // bit 7
7480 #define SMT2PR0 SMT2PRLbits.SMT2PR0 // bit 0
7481 #define SMT2PR1 SMT2PRLbits.SMT2PR1 // bit 1
7482 #define SMT2PR2 SMT2PRLbits.SMT2PR2 // bit 2
7483 #define SMT2PR3 SMT2PRLbits.SMT2PR3 // bit 3
7484 #define SMT2PR4 SMT2PRLbits.SMT2PR4 // bit 4
7485 #define SMT2PR5 SMT2PRLbits.SMT2PR5 // bit 5
7486 #define SMT2PR6 SMT2PRLbits.SMT2PR6 // bit 6
7487 #define SMT2PR7 SMT2PRLbits.SMT2PR7 // bit 7
7489 #define SMT2PR16 SMT2PRUbits.SMT2PR16 // bit 0
7490 #define SMT2PR17 SMT2PRUbits.SMT2PR17 // bit 1
7491 #define SMT2PR18 SMT2PRUbits.SMT2PR18 // bit 2
7492 #define SMT2PR19 SMT2PRUbits.SMT2PR19 // bit 3
7493 #define SMT2PR20 SMT2PRUbits.SMT2PR20 // bit 4
7494 #define SMT2PR21 SMT2PRUbits.SMT2PR21 // bit 5
7495 #define SMT2PR22 SMT2PRUbits.SMT2PR22 // bit 6
7496 #define SMT2PR23 SMT2PRUbits.SMT2PR23 // bit 7
7498 #define SMT2TMR8 SMT2TMRHbits.SMT2TMR8 // bit 0
7499 #define SMT2TMR9 SMT2TMRHbits.SMT2TMR9 // bit 1
7500 #define SMT2TMR10 SMT2TMRHbits.SMT2TMR10 // bit 2
7501 #define SMT2TMR11 SMT2TMRHbits.SMT2TMR11 // bit 3
7502 #define SMT2TMR12 SMT2TMRHbits.SMT2TMR12 // bit 4
7503 #define SMT2TMR13 SMT2TMRHbits.SMT2TMR13 // bit 5
7504 #define SMT2TMR14 SMT2TMRHbits.SMT2TMR14 // bit 6
7505 #define SMT2TMR15 SMT2TMRHbits.SMT2TMR15 // bit 7
7507 #define SMT2TMR0 SMT2TMRLbits.SMT2TMR0 // bit 0
7508 #define SMT2TMR1 SMT2TMRLbits.SMT2TMR1 // bit 1
7509 #define SMT2TMR2 SMT2TMRLbits.SMT2TMR2 // bit 2
7510 #define SMT2TMR3 SMT2TMRLbits.SMT2TMR3 // bit 3
7511 #define SMT2TMR4 SMT2TMRLbits.SMT2TMR4 // bit 4
7512 #define SMT2TMR5 SMT2TMRLbits.SMT2TMR5 // bit 5
7513 #define SMT2TMR6 SMT2TMRLbits.SMT2TMR6 // bit 6
7514 #define SMT2TMR7 SMT2TMRLbits.SMT2TMR7 // bit 7
7516 #define SMT2TMR16 SMT2TMRUbits.SMT2TMR16 // bit 0
7517 #define SMT2TMR17 SMT2TMRUbits.SMT2TMR17 // bit 1
7518 #define SMT2TMR18 SMT2TMRUbits.SMT2TMR18 // bit 2
7519 #define SMT2TMR19 SMT2TMRUbits.SMT2TMR19 // bit 3
7520 #define SMT2TMR20 SMT2TMRUbits.SMT2TMR20 // bit 4
7521 #define SMT2TMR21 SMT2TMRUbits.SMT2TMR21 // bit 5
7522 #define SMT2TMR22 SMT2TMRUbits.SMT2TMR22 // bit 6
7523 #define SMT2TMR23 SMT2TMRUbits.SMT2TMR23 // bit 7
7525 #define C STATUSbits.C // bit 0
7526 #define DC STATUSbits.DC // bit 1
7527 #define Z STATUSbits.Z // bit 2
7528 #define NOT_PD STATUSbits.NOT_PD // bit 3
7529 #define NOT_TO STATUSbits.NOT_TO // bit 4
7531 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
7532 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
7533 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
7535 #define TMR1ON T1CONbits.TMR1ON // bit 0
7536 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
7537 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
7538 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
7539 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
7540 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
7542 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
7543 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
7544 #define T1GVAL T1GCONbits.T1GVAL // bit 2
7545 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
7546 #define T1GSPM T1GCONbits.T1GSPM // bit 4
7547 #define T1GTM T1GCONbits.T1GTM // bit 5
7548 #define T1GPOL T1GCONbits.T1GPOL // bit 6
7549 #define TMR1GE T1GCONbits.TMR1GE // bit 7
7551 #define T2CS0 T2CLKCONbits.T2CS0 // bit 0
7552 #define T2CS1 T2CLKCONbits.T2CS1 // bit 1
7553 #define T2CS2 T2CLKCONbits.T2CS2 // bit 2
7555 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 0, shadows bit in T2CONbits
7556 #define OUTPS0 T2CONbits.OUTPS0 // bit 0, shadows bit in T2CONbits
7557 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 1, shadows bit in T2CONbits
7558 #define OUTPS1 T2CONbits.OUTPS1 // bit 1, shadows bit in T2CONbits
7559 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 2, shadows bit in T2CONbits
7560 #define OUTPS2 T2CONbits.OUTPS2 // bit 2, shadows bit in T2CONbits
7561 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 3, shadows bit in T2CONbits
7562 #define OUTPS3 T2CONbits.OUTPS3 // bit 3, shadows bit in T2CONbits
7563 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 4, shadows bit in T2CONbits
7564 #define CKPS0 T2CONbits.CKPS0 // bit 4, shadows bit in T2CONbits
7565 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 5, shadows bit in T2CONbits
7566 #define CKPS1 T2CONbits.CKPS1 // bit 5, shadows bit in T2CONbits
7567 #define T2CKPS2 T2CONbits.T2CKPS2 // bit 6, shadows bit in T2CONbits
7568 #define CKPS2 T2CONbits.CKPS2 // bit 6, shadows bit in T2CONbits
7569 #define ON T2CONbits.ON // bit 7, shadows bit in T2CONbits
7570 #define T2ON T2CONbits.T2ON // bit 7, shadows bit in T2CONbits
7571 #define TMR2ON T2CONbits.TMR2ON // bit 7, shadows bit in T2CONbits
7573 #define RSEL0 T2RSTbits.RSEL0 // bit 0, shadows bit in T2RSTbits
7574 #define T2RSEL0 T2RSTbits.T2RSEL0 // bit 0, shadows bit in T2RSTbits
7575 #define RSEL1 T2RSTbits.RSEL1 // bit 1, shadows bit in T2RSTbits
7576 #define T2RSEL1 T2RSTbits.T2RSEL1 // bit 1, shadows bit in T2RSTbits
7577 #define RSEL2 T2RSTbits.RSEL2 // bit 2, shadows bit in T2RSTbits
7578 #define T2RSEL2 T2RSTbits.T2RSEL2 // bit 2, shadows bit in T2RSTbits
7579 #define RSEL3 T2RSTbits.RSEL3 // bit 3, shadows bit in T2RSTbits
7580 #define T2RSEL3 T2RSTbits.T2RSEL3 // bit 3, shadows bit in T2RSTbits
7582 #define T4CS0 T4CLKCONbits.T4CS0 // bit 0
7583 #define T4CS1 T4CLKCONbits.T4CS1 // bit 1
7584 #define T4CS2 T4CLKCONbits.T4CS2 // bit 2
7586 #define T6CS0 T6CLKCONbits.T6CS0 // bit 0
7587 #define T6CS1 T6CLKCONbits.T6CS1 // bit 1
7588 #define T6CS2 T6CLKCONbits.T6CS2 // bit 2
7590 #define TRISA0 TRISAbits.TRISA0 // bit 0
7591 #define TRISA1 TRISAbits.TRISA1 // bit 1
7592 #define TRISA2 TRISAbits.TRISA2 // bit 2
7593 #define TRISA3 TRISAbits.TRISA3 // bit 3
7594 #define TRISA4 TRISAbits.TRISA4 // bit 4
7595 #define TRISA5 TRISAbits.TRISA5 // bit 5
7597 #define TRISC0 TRISCbits.TRISC0 // bit 0
7598 #define TRISC1 TRISCbits.TRISC1 // bit 1
7599 #define TRISC2 TRISCbits.TRISC2 // bit 2
7600 #define TRISC3 TRISCbits.TRISC3 // bit 3
7601 #define TRISC4 TRISCbits.TRISC4 // bit 4
7602 #define TRISC5 TRISCbits.TRISC5 // bit 5
7604 #define SEN WDTCON0bits.SEN // bit 0, shadows bit in WDTCON0bits
7605 #define SWDTEN WDTCON0bits.SWDTEN // bit 0, shadows bit in WDTCON0bits
7606 #define WDTSEN WDTCON0bits.WDTSEN // bit 0, shadows bit in WDTCON0bits
7607 #define WDTPS0 WDTCON0bits.WDTPS0 // bit 1
7608 #define WDTPS1 WDTCON0bits.WDTPS1 // bit 2
7609 #define WDTPS2 WDTCON0bits.WDTPS2 // bit 3
7610 #define WDTPS3 WDTCON0bits.WDTPS3 // bit 4
7611 #define WDTPS4 WDTCON0bits.WDTPS4 // bit 5
7613 #define WINDOW0 WDTCON1bits.WINDOW0 // bit 0, shadows bit in WDTCON1bits
7614 #define WDTWINDOW0 WDTCON1bits.WDTWINDOW0 // bit 0, shadows bit in WDTCON1bits
7615 #define WINDOW1 WDTCON1bits.WINDOW1 // bit 1, shadows bit in WDTCON1bits
7616 #define WDTWINDOW1 WDTCON1bits.WDTWINDOW1 // bit 1, shadows bit in WDTCON1bits
7617 #define WINDOW2 WDTCON1bits.WINDOW2 // bit 2, shadows bit in WDTCON1bits
7618 #define WDTWINDOW2 WDTCON1bits.WDTWINDOW2 // bit 2, shadows bit in WDTCON1bits
7619 #define WDTCS0 WDTCON1bits.WDTCS0 // bit 4
7620 #define WDTCS1 WDTCON1bits.WDTCS1 // bit 5
7621 #define WDTCS2 WDTCON1bits.WDTCS2 // bit 6
7623 #define PSCNT8 WDTPSHbits.PSCNT8 // bit 0, shadows bit in WDTPSHbits
7624 #define WDTPSCNT8 WDTPSHbits.WDTPSCNT8 // bit 0, shadows bit in WDTPSHbits
7625 #define PSCNT9 WDTPSHbits.PSCNT9 // bit 1, shadows bit in WDTPSHbits
7626 #define WDTPSCNT9 WDTPSHbits.WDTPSCNT9 // bit 1, shadows bit in WDTPSHbits
7627 #define PSCNT10 WDTPSHbits.PSCNT10 // bit 2, shadows bit in WDTPSHbits
7628 #define WDTPSCNT10 WDTPSHbits.WDTPSCNT10 // bit 2, shadows bit in WDTPSHbits
7629 #define PSCNT11 WDTPSHbits.PSCNT11 // bit 3, shadows bit in WDTPSHbits
7630 #define WDTPSCNT11 WDTPSHbits.WDTPSCNT11 // bit 3, shadows bit in WDTPSHbits
7631 #define PSCNT12 WDTPSHbits.PSCNT12 // bit 4, shadows bit in WDTPSHbits
7632 #define WDTPSCNT12 WDTPSHbits.WDTPSCNT12 // bit 4, shadows bit in WDTPSHbits
7633 #define PSCNT13 WDTPSHbits.PSCNT13 // bit 5, shadows bit in WDTPSHbits
7634 #define WDTPSCNT13 WDTPSHbits.WDTPSCNT13 // bit 5, shadows bit in WDTPSHbits
7635 #define PSCNT14 WDTPSHbits.PSCNT14 // bit 6, shadows bit in WDTPSHbits
7636 #define WDTPSCNT14 WDTPSHbits.WDTPSCNT14 // bit 6, shadows bit in WDTPSHbits
7637 #define PSCNT15 WDTPSHbits.PSCNT15 // bit 7, shadows bit in WDTPSHbits
7638 #define WDTPSCNT15 WDTPSHbits.WDTPSCNT15 // bit 7, shadows bit in WDTPSHbits
7640 #define PSCNT0 WDTPSLbits.PSCNT0 // bit 0, shadows bit in WDTPSLbits
7641 #define WDTPSCNT0 WDTPSLbits.WDTPSCNT0 // bit 0, shadows bit in WDTPSLbits
7642 #define PSCNT1 WDTPSLbits.PSCNT1 // bit 1, shadows bit in WDTPSLbits
7643 #define WDTPSCNT1 WDTPSLbits.WDTPSCNT1 // bit 1, shadows bit in WDTPSLbits
7644 #define PSCNT2 WDTPSLbits.PSCNT2 // bit 2, shadows bit in WDTPSLbits
7645 #define WDTPSCNT2 WDTPSLbits.WDTPSCNT2 // bit 2, shadows bit in WDTPSLbits
7646 #define PSCNT3 WDTPSLbits.PSCNT3 // bit 3, shadows bit in WDTPSLbits
7647 #define WDTPSCNT3 WDTPSLbits.WDTPSCNT3 // bit 3, shadows bit in WDTPSLbits
7648 #define PSCNT4 WDTPSLbits.PSCNT4 // bit 4, shadows bit in WDTPSLbits
7649 #define WDTPSCNT4 WDTPSLbits.WDTPSCNT4 // bit 4, shadows bit in WDTPSLbits
7650 #define PSCNT5 WDTPSLbits.PSCNT5 // bit 5, shadows bit in WDTPSLbits
7651 #define WDTPSCNT5 WDTPSLbits.WDTPSCNT5 // bit 5, shadows bit in WDTPSLbits
7652 #define PSCNT6 WDTPSLbits.PSCNT6 // bit 6, shadows bit in WDTPSLbits
7653 #define WDTPSCNT6 WDTPSLbits.WDTPSCNT6 // bit 6, shadows bit in WDTPSLbits
7654 #define PSCNT7 WDTPSLbits.PSCNT7 // bit 7, shadows bit in WDTPSLbits
7655 #define WDTPSCNT7 WDTPSLbits.WDTPSCNT7 // bit 7, shadows bit in WDTPSLbits
7657 #define PSCNT16 WDTTMRbits.PSCNT16 // bit 0, shadows bit in WDTTMRbits
7658 #define WDTPSCNT16 WDTTMRbits.WDTPSCNT16 // bit 0, shadows bit in WDTTMRbits
7659 #define PSCNT17 WDTTMRbits.PSCNT17 // bit 1, shadows bit in WDTTMRbits
7660 #define WDTPSCNT17 WDTTMRbits.WDTPSCNT17 // bit 1, shadows bit in WDTTMRbits
7661 #define STATE WDTTMRbits.STATE // bit 2, shadows bit in WDTTMRbits
7662 #define WDTSTATE WDTTMRbits.WDTSTATE // bit 2, shadows bit in WDTTMRbits
7663 #define WDTTMR0 WDTTMRbits.WDTTMR0 // bit 3
7664 #define WDTTMR1 WDTTMRbits.WDTTMR1 // bit 4
7665 #define WDTTMR2 WDTTMRbits.WDTTMR2 // bit 5
7666 #define WDTTMR3 WDTTMRbits.WDTTMR3 // bit 6
7667 #define WDTTMR4 WDTTMRbits.WDTTMR4 // bit 7
7669 #define WPUA0 WPUAbits.WPUA0 // bit 0
7670 #define WPUA1 WPUAbits.WPUA1 // bit 1
7671 #define WPUA2 WPUAbits.WPUA2 // bit 2
7672 #define WPUA3 WPUAbits.WPUA3 // bit 3
7673 #define WPUA4 WPUAbits.WPUA4 // bit 4
7674 #define WPUA5 WPUAbits.WPUA5 // bit 5
7676 #define WPUC0 WPUCbits.WPUC0 // bit 0
7677 #define WPUC1 WPUCbits.WPUC1 // bit 1
7678 #define WPUC2 WPUCbits.WPUC2 // bit 2
7679 #define WPUC3 WPUCbits.WPUC3 // bit 3
7680 #define WPUC4 WPUCbits.WPUC4 // bit 4
7681 #define WPUC5 WPUCbits.WPUC5 // bit 5
7683 #define ZCD1INTN ZCD1CONbits.ZCD1INTN // bit 0
7684 #define ZCD1INTP ZCD1CONbits.ZCD1INTP // bit 1
7685 #define ZCD1POL ZCD1CONbits.ZCD1POL // bit 4
7686 #define ZCD1OUT ZCD1CONbits.ZCD1OUT // bit 5
7687 #define ZCD1OE ZCD1CONbits.ZCD1OE // bit 6
7688 #define ZCD1EN ZCD1CONbits.ZCD1EN // bit 7
7690 #endif // #ifndef NO_BIT_DEFINES
7692 #endif // #ifndef __PIC16LF1613_H__