2 * This declarations of the PIC16LF1718 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:13 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16LF1718_H__
26 #define __PIC16LF1718_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PORTE_ADDR 0x0010
54 #define PIR1_ADDR 0x0011
55 #define PIR2_ADDR 0x0012
56 #define PIR3_ADDR 0x0013
57 #define TMR0_ADDR 0x0015
58 #define TMR1_ADDR 0x0016
59 #define TMR1L_ADDR 0x0016
60 #define TMR1H_ADDR 0x0017
61 #define T1CON_ADDR 0x0018
62 #define T1GCON_ADDR 0x0019
63 #define TMR2_ADDR 0x001A
64 #define PR2_ADDR 0x001B
65 #define T2CON_ADDR 0x001C
66 #define TRISA_ADDR 0x008C
67 #define TRISB_ADDR 0x008D
68 #define TRISC_ADDR 0x008E
69 #define TRISE_ADDR 0x0090
70 #define PIE1_ADDR 0x0091
71 #define PIE2_ADDR 0x0092
72 #define PIE3_ADDR 0x0093
73 #define OPTION_REG_ADDR 0x0095
74 #define PCON_ADDR 0x0096
75 #define WDTCON_ADDR 0x0097
76 #define OSCTUNE_ADDR 0x0098
77 #define OSCCON_ADDR 0x0099
78 #define OSCSTAT_ADDR 0x009A
79 #define ADRES_ADDR 0x009B
80 #define ADRESL_ADDR 0x009B
81 #define ADRESH_ADDR 0x009C
82 #define ADCON0_ADDR 0x009D
83 #define ADCON1_ADDR 0x009E
84 #define ADCON2_ADDR 0x009F
85 #define LATA_ADDR 0x010C
86 #define LATB_ADDR 0x010D
87 #define LATC_ADDR 0x010E
88 #define CM1CON0_ADDR 0x0111
89 #define CM1CON1_ADDR 0x0112
90 #define CM2CON0_ADDR 0x0113
91 #define CM2CON1_ADDR 0x0114
92 #define CMOUT_ADDR 0x0115
93 #define BORCON_ADDR 0x0116
94 #define FVRCON_ADDR 0x0117
95 #define DAC1CON0_ADDR 0x0118
96 #define DAC1CON1_ADDR 0x0119
97 #define DAC2CON0_ADDR 0x011A
98 #define DAC2CON1_ADDR 0x011B
99 #define DAC2REF_ADDR 0x011B
100 #define ZCD1CON_ADDR 0x011C
101 #define ANSELA_ADDR 0x018C
102 #define ANSELB_ADDR 0x018D
103 #define ANSELC_ADDR 0x018E
104 #define PMADR_ADDR 0x0191
105 #define PMADRL_ADDR 0x0191
106 #define PMADRH_ADDR 0x0192
107 #define PMDAT_ADDR 0x0193
108 #define PMDATL_ADDR 0x0193
109 #define PMDATH_ADDR 0x0194
110 #define PMCON1_ADDR 0x0195
111 #define PMCON2_ADDR 0x0196
112 #define RC1REG_ADDR 0x0199
113 #define RCREG_ADDR 0x0199
114 #define RCREG1_ADDR 0x0199
115 #define TX1REG_ADDR 0x019A
116 #define TXREG_ADDR 0x019A
117 #define TXREG1_ADDR 0x019A
118 #define SP1BRG_ADDR 0x019B
119 #define SP1BRGL_ADDR 0x019B
120 #define SPBRG_ADDR 0x019B
121 #define SPBRG1_ADDR 0x019B
122 #define SPBRGL_ADDR 0x019B
123 #define SP1BRGH_ADDR 0x019C
124 #define SPBRGH_ADDR 0x019C
125 #define SPBRGH1_ADDR 0x019C
126 #define RC1STA_ADDR 0x019D
127 #define RCSTA_ADDR 0x019D
128 #define RCSTA1_ADDR 0x019D
129 #define TX1STA_ADDR 0x019E
130 #define TXSTA_ADDR 0x019E
131 #define TXSTA1_ADDR 0x019E
132 #define BAUD1CON_ADDR 0x019F
133 #define BAUDCON_ADDR 0x019F
134 #define BAUDCON1_ADDR 0x019F
135 #define BAUDCTL_ADDR 0x019F
136 #define BAUDCTL1_ADDR 0x019F
137 #define WPUA_ADDR 0x020C
138 #define WPUB_ADDR 0x020D
139 #define WPUC_ADDR 0x020E
140 #define WPUE_ADDR 0x0210
141 #define SSP1BUF_ADDR 0x0211
142 #define SSPBUF_ADDR 0x0211
143 #define SSP1ADD_ADDR 0x0212
144 #define SSPADD_ADDR 0x0212
145 #define SSP1MSK_ADDR 0x0213
146 #define SSPMSK_ADDR 0x0213
147 #define SSP1STAT_ADDR 0x0214
148 #define SSPSTAT_ADDR 0x0214
149 #define SSP1CON_ADDR 0x0215
150 #define SSP1CON1_ADDR 0x0215
151 #define SSPCON_ADDR 0x0215
152 #define SSPCON1_ADDR 0x0215
153 #define SSP1CON2_ADDR 0x0216
154 #define SSPCON2_ADDR 0x0216
155 #define SSP1CON3_ADDR 0x0217
156 #define SSPCON3_ADDR 0x0217
157 #define ODCONA_ADDR 0x028C
158 #define ODCONB_ADDR 0x028D
159 #define ODCONC_ADDR 0x028E
160 #define CCPR1_ADDR 0x0291
161 #define CCPR1L_ADDR 0x0291
162 #define CCPR1H_ADDR 0x0292
163 #define CCP1CON_ADDR 0x0293
164 #define ECCP1CON_ADDR 0x0293
165 #define CCPR2_ADDR 0x0298
166 #define CCPR2L_ADDR 0x0298
167 #define CCPR2H_ADDR 0x0299
168 #define CCP2CON_ADDR 0x029A
169 #define ECCP2CON_ADDR 0x029A
170 #define CCPTMRS_ADDR 0x029E
171 #define SLRCONA_ADDR 0x030C
172 #define SLRCONB_ADDR 0x030D
173 #define SLRCONC_ADDR 0x030E
174 #define INLVLA_ADDR 0x038C
175 #define INLVLB_ADDR 0x038D
176 #define INLVLC_ADDR 0x038E
177 #define INLVLE_ADDR 0x0390
178 #define IOCAP_ADDR 0x0391
179 #define IOCAN_ADDR 0x0392
180 #define IOCAF_ADDR 0x0393
181 #define IOCBP_ADDR 0x0394
182 #define IOCBN_ADDR 0x0395
183 #define IOCBF_ADDR 0x0396
184 #define IOCCP_ADDR 0x0397
185 #define IOCCN_ADDR 0x0398
186 #define IOCCF_ADDR 0x0399
187 #define IOCEP_ADDR 0x039D
188 #define IOCEN_ADDR 0x039E
189 #define IOCEF_ADDR 0x039F
190 #define TMR4_ADDR 0x0415
191 #define PR4_ADDR 0x0416
192 #define T4CON_ADDR 0x0417
193 #define TMR6_ADDR 0x041C
194 #define PR6_ADDR 0x041D
195 #define T6CON_ADDR 0x041E
196 #define NCO1ACC_ADDR 0x0498
197 #define NCO1ACCL_ADDR 0x0498
198 #define NCO1ACCH_ADDR 0x0499
199 #define NCO1ACCU_ADDR 0x049A
200 #define NCO1INC_ADDR 0x049B
201 #define NCO1INCL_ADDR 0x049B
202 #define NCO1INCH_ADDR 0x049C
203 #define NCO1INCU_ADDR 0x049D
204 #define NCO1CON_ADDR 0x049E
205 #define NCO1CLK_ADDR 0x049F
206 #define OPA1CON_ADDR 0x0511
207 #define OPA2CON_ADDR 0x0515
208 #define PWM3DCL_ADDR 0x0617
209 #define PWM3DCH_ADDR 0x0618
210 #define PWM3CON_ADDR 0x0619
211 #define PWM3CON0_ADDR 0x0619
212 #define PWM4DCL_ADDR 0x061A
213 #define PWM4DCH_ADDR 0x061B
214 #define PWM4CON_ADDR 0x061C
215 #define PWM4CON0_ADDR 0x061C
216 #define COG1PHR_ADDR 0x0691
217 #define COG1PHF_ADDR 0x0692
218 #define COG1BLKR_ADDR 0x0693
219 #define COG1BLKF_ADDR 0x0694
220 #define COG1DBR_ADDR 0x0695
221 #define COG1DBF_ADDR 0x0696
222 #define COG1CON0_ADDR 0x0697
223 #define COG1CON1_ADDR 0x0698
224 #define COG1RIS_ADDR 0x0699
225 #define COG1RSIM_ADDR 0x069A
226 #define COG1FIS_ADDR 0x069B
227 #define COG1FSIM_ADDR 0x069C
228 #define COG1ASD0_ADDR 0x069D
229 #define COG1ASD1_ADDR 0x069E
230 #define COG1STR_ADDR 0x069F
231 #define PPSLOCK_ADDR 0x0E0F
232 #define INTPPS_ADDR 0x0E10
233 #define T0CKIPPS_ADDR 0x0E11
234 #define T1CKIPPS_ADDR 0x0E12
235 #define T1GPPS_ADDR 0x0E13
236 #define CCP1PPS_ADDR 0x0E14
237 #define CCP2PPS_ADDR 0x0E15
238 #define COGINPPS_ADDR 0x0E17
239 #define SSPCLKPPS_ADDR 0x0E20
240 #define SSPDATPPS_ADDR 0x0E21
241 #define SSPSSPPS_ADDR 0x0E22
242 #define RXPPS_ADDR 0x0E24
243 #define CKPPS_ADDR 0x0E25
244 #define CLCIN0PPS_ADDR 0x0E28
245 #define CLCIN1PPS_ADDR 0x0E29
246 #define CLCIN2PPS_ADDR 0x0E2A
247 #define CLCIN3PPS_ADDR 0x0E2B
248 #define RA0PPS_ADDR 0x0E90
249 #define RA1PPS_ADDR 0x0E91
250 #define RA2PPS_ADDR 0x0E92
251 #define RA3PPS_ADDR 0x0E93
252 #define RA4PPS_ADDR 0x0E94
253 #define RA5PPS_ADDR 0x0E95
254 #define RA6PPS_ADDR 0x0E96
255 #define RA7PPS_ADDR 0x0E97
256 #define RB0PPS_ADDR 0x0E98
257 #define RB1PPS_ADDR 0x0E99
258 #define RB2PPS_ADDR 0x0E9A
259 #define RB3PPS_ADDR 0x0E9B
260 #define RB4PPS_ADDR 0x0E9C
261 #define RB5PPS_ADDR 0x0E9D
262 #define RB6PPS_ADDR 0x0E9E
263 #define RB7PPS_ADDR 0x0E9F
264 #define RC0PPS_ADDR 0x0EA0
265 #define RC1PPS_ADDR 0x0EA1
266 #define RC2PPS_ADDR 0x0EA2
267 #define RC3PPS_ADDR 0x0EA3
268 #define RC4PPS_ADDR 0x0EA4
269 #define RC5PPS_ADDR 0x0EA5
270 #define RC6PPS_ADDR 0x0EA6
271 #define RC7PPS_ADDR 0x0EA7
272 #define CLCDATA_ADDR 0x0F0F
273 #define CLC1CON_ADDR 0x0F10
274 #define CLC1POL_ADDR 0x0F11
275 #define CLC1SEL0_ADDR 0x0F12
276 #define CLC1SEL1_ADDR 0x0F13
277 #define CLC1SEL2_ADDR 0x0F14
278 #define CLC1SEL3_ADDR 0x0F15
279 #define CLC1GLS0_ADDR 0x0F16
280 #define CLC1GLS1_ADDR 0x0F17
281 #define CLC1GLS2_ADDR 0x0F18
282 #define CLC1GLS3_ADDR 0x0F19
283 #define CLC2CON_ADDR 0x0F1A
284 #define CLC2POL_ADDR 0x0F1B
285 #define CLC2SEL0_ADDR 0x0F1C
286 #define CLC2SEL1_ADDR 0x0F1D
287 #define CLC2SEL2_ADDR 0x0F1E
288 #define CLC2SEL3_ADDR 0x0F1F
289 #define CLC2GLS0_ADDR 0x0F20
290 #define CLC2GLS1_ADDR 0x0F21
291 #define CLC2GLS2_ADDR 0x0F22
292 #define CLC2GLS3_ADDR 0x0F23
293 #define CLC3CON_ADDR 0x0F24
294 #define CLC3POL_ADDR 0x0F25
295 #define CLC3SEL0_ADDR 0x0F26
296 #define CLC3SEL1_ADDR 0x0F27
297 #define CLC3SEL2_ADDR 0x0F28
298 #define CLC3SEL3_ADDR 0x0F29
299 #define CLC3GLS0_ADDR 0x0F2A
300 #define CLC3GLS1_ADDR 0x0F2B
301 #define CLC3GLS2_ADDR 0x0F2C
302 #define CLC3GLS3_ADDR 0x0F2D
303 #define CLC4CON_ADDR 0x0F2E
304 #define CLC4POL_ADDR 0x0F2F
305 #define CLC4SEL0_ADDR 0x0F30
306 #define CLC4SEL1_ADDR 0x0F31
307 #define CLC4SEL2_ADDR 0x0F32
308 #define CLC4SEL3_ADDR 0x0F33
309 #define CLC4GLS0_ADDR 0x0F34
310 #define CLC4GLS1_ADDR 0x0F35
311 #define CLC4GLS2_ADDR 0x0F36
312 #define CLC4GLS3_ADDR 0x0F37
313 #define STATUS_SHAD_ADDR 0x0FE4
314 #define WREG_SHAD_ADDR 0x0FE5
315 #define BSR_SHAD_ADDR 0x0FE6
316 #define PCLATH_SHAD_ADDR 0x0FE7
317 #define FSR0L_SHAD_ADDR 0x0FE8
318 #define FSR0H_SHAD_ADDR 0x0FE9
319 #define FSR1L_SHAD_ADDR 0x0FEA
320 #define FSR1H_SHAD_ADDR 0x0FEB
321 #define STKPTR_ADDR 0x0FED
322 #define TOSL_ADDR 0x0FEE
323 #define TOSH_ADDR 0x0FEF
325 #endif // #ifndef NO_ADDR_DEFINES
327 //==============================================================================
329 // Register Definitions
331 //==============================================================================
333 extern __at(0x0000) __sfr INDF0
;
334 extern __at(0x0001) __sfr INDF1
;
335 extern __at(0x0002) __sfr PCL
;
337 //==============================================================================
340 extern __at(0x0003) __sfr STATUS
;
354 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
362 //==============================================================================
364 extern __at(0x0004) __sfr FSR0
;
365 extern __at(0x0004) __sfr FSR0L
;
366 extern __at(0x0005) __sfr FSR0H
;
367 extern __at(0x0006) __sfr FSR1
;
368 extern __at(0x0006) __sfr FSR1L
;
369 extern __at(0x0007) __sfr FSR1H
;
371 //==============================================================================
374 extern __at(0x0008) __sfr BSR
;
397 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
405 //==============================================================================
407 extern __at(0x0009) __sfr WREG
;
408 extern __at(0x000A) __sfr PCLATH
;
410 //==============================================================================
413 extern __at(0x000B) __sfr INTCON
;
442 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
455 //==============================================================================
458 //==============================================================================
461 extern __at(0x000C) __sfr PORTA
;
475 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
486 //==============================================================================
489 //==============================================================================
492 extern __at(0x000D) __sfr PORTB
;
506 extern __at(0x000D) volatile __PORTBbits_t PORTBbits
;
517 //==============================================================================
520 //==============================================================================
523 extern __at(0x000E) __sfr PORTC
;
537 extern __at(0x000E) volatile __PORTCbits_t PORTCbits
;
548 //==============================================================================
551 //==============================================================================
554 extern __at(0x0010) __sfr PORTE
;
568 extern __at(0x0010) volatile __PORTEbits_t PORTEbits
;
572 //==============================================================================
575 //==============================================================================
578 extern __at(0x0011) __sfr PIR1
;
589 unsigned TMR1GIF
: 1;
592 extern __at(0x0011) volatile __PIR1bits_t PIR1bits
;
601 #define _TMR1GIF 0x80
603 //==============================================================================
606 //==============================================================================
609 extern __at(0x0012) __sfr PIR2
;
623 extern __at(0x0012) volatile __PIR2bits_t PIR2bits
;
633 //==============================================================================
636 //==============================================================================
639 extern __at(0x0013) __sfr PIR3
;
653 extern __at(0x0013) volatile __PIR3bits_t PIR3bits
;
663 //==============================================================================
665 extern __at(0x0015) __sfr TMR0
;
666 extern __at(0x0016) __sfr TMR1
;
667 extern __at(0x0016) __sfr TMR1L
;
668 extern __at(0x0017) __sfr TMR1H
;
670 //==============================================================================
673 extern __at(0x0018) __sfr T1CON
;
681 unsigned NOT_T1SYNC
: 1;
682 unsigned T1OSCEN
: 1;
683 unsigned T1CKPS0
: 1;
684 unsigned T1CKPS1
: 1;
685 unsigned TMR1CS0
: 1;
686 unsigned TMR1CS1
: 1;
703 extern __at(0x0018) volatile __T1CONbits_t T1CONbits
;
706 #define _NOT_T1SYNC 0x04
707 #define _T1OSCEN 0x08
708 #define _T1CKPS0 0x10
709 #define _T1CKPS1 0x20
710 #define _TMR1CS0 0x40
711 #define _TMR1CS1 0x80
713 //==============================================================================
716 //==============================================================================
719 extern __at(0x0019) __sfr T1GCON
;
728 unsigned T1GGO_NOT_DONE
: 1;
742 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits
;
747 #define _T1GGO_NOT_DONE 0x08
753 //==============================================================================
755 extern __at(0x001A) __sfr TMR2
;
756 extern __at(0x001B) __sfr PR2
;
758 //==============================================================================
761 extern __at(0x001C) __sfr T2CON
;
767 unsigned T2CKPS0
: 1;
768 unsigned T2CKPS1
: 1;
770 unsigned T2OUTPS0
: 1;
771 unsigned T2OUTPS1
: 1;
772 unsigned T2OUTPS2
: 1;
773 unsigned T2OUTPS3
: 1;
786 unsigned T2OUTPS
: 4;
791 extern __at(0x001C) volatile __T2CONbits_t T2CONbits
;
793 #define _T2CKPS0 0x01
794 #define _T2CKPS1 0x02
796 #define _T2OUTPS0 0x08
797 #define _T2OUTPS1 0x10
798 #define _T2OUTPS2 0x20
799 #define _T2OUTPS3 0x40
801 //==============================================================================
804 //==============================================================================
807 extern __at(0x008C) __sfr TRISA
;
821 extern __at(0x008C) volatile __TRISAbits_t TRISAbits
;
832 //==============================================================================
835 //==============================================================================
838 extern __at(0x008D) __sfr TRISB
;
852 extern __at(0x008D) volatile __TRISBbits_t TRISBbits
;
863 //==============================================================================
866 //==============================================================================
869 extern __at(0x008E) __sfr TRISC
;
883 extern __at(0x008E) volatile __TRISCbits_t TRISCbits
;
894 //==============================================================================
897 //==============================================================================
900 extern __at(0x0090) __sfr TRISE
;
914 extern __at(0x0090) volatile __TRISEbits_t TRISEbits
;
918 //==============================================================================
921 //==============================================================================
924 extern __at(0x0091) __sfr PIE1
;
935 unsigned TMR1GIE
: 1;
938 extern __at(0x0091) volatile __PIE1bits_t PIE1bits
;
947 #define _TMR1GIE 0x80
949 //==============================================================================
952 //==============================================================================
955 extern __at(0x0092) __sfr PIE2
;
969 extern __at(0x0092) volatile __PIE2bits_t PIE2bits
;
979 //==============================================================================
982 //==============================================================================
985 extern __at(0x0093) __sfr PIE3
;
999 extern __at(0x0093) volatile __PIE3bits_t PIE3bits
;
1001 #define _CLC1IE 0x01
1002 #define _CLC2IE 0x02
1003 #define _CLC3IE 0x04
1004 #define _CLC4IE 0x08
1009 //==============================================================================
1012 //==============================================================================
1015 extern __at(0x0095) __sfr OPTION_REG
;
1025 unsigned TMR0SE
: 1;
1026 unsigned TMR0CS
: 1;
1027 unsigned INTEDG
: 1;
1028 unsigned NOT_WPUEN
: 1;
1048 } __OPTION_REGbits_t
;
1050 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits
;
1056 #define _TMR0SE 0x10
1058 #define _TMR0CS 0x20
1060 #define _INTEDG 0x40
1061 #define _NOT_WPUEN 0x80
1063 //==============================================================================
1066 //==============================================================================
1069 extern __at(0x0096) __sfr PCON
;
1073 unsigned NOT_BOR
: 1;
1074 unsigned NOT_POR
: 1;
1075 unsigned NOT_RI
: 1;
1076 unsigned NOT_RMCLR
: 1;
1077 unsigned NOT_RWDT
: 1;
1079 unsigned STKUNF
: 1;
1080 unsigned STKOVF
: 1;
1083 extern __at(0x0096) volatile __PCONbits_t PCONbits
;
1085 #define _NOT_BOR 0x01
1086 #define _NOT_POR 0x02
1087 #define _NOT_RI 0x04
1088 #define _NOT_RMCLR 0x08
1089 #define _NOT_RWDT 0x10
1090 #define _STKUNF 0x40
1091 #define _STKOVF 0x80
1093 //==============================================================================
1096 //==============================================================================
1099 extern __at(0x0097) __sfr WDTCON
;
1105 unsigned SWDTEN
: 1;
1106 unsigned WDTPS0
: 1;
1107 unsigned WDTPS1
: 1;
1108 unsigned WDTPS2
: 1;
1109 unsigned WDTPS3
: 1;
1110 unsigned WDTPS4
: 1;
1123 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits
;
1125 #define _SWDTEN 0x01
1126 #define _WDTPS0 0x02
1127 #define _WDTPS1 0x04
1128 #define _WDTPS2 0x08
1129 #define _WDTPS3 0x10
1130 #define _WDTPS4 0x20
1132 //==============================================================================
1135 //==============================================================================
1138 extern __at(0x0098) __sfr OSCTUNE
;
1161 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits
;
1170 //==============================================================================
1173 //==============================================================================
1176 extern __at(0x0099) __sfr OSCCON
;
1189 unsigned SPLLEN
: 1;
1206 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits
;
1214 #define _SPLLEN 0x80
1216 //==============================================================================
1219 //==============================================================================
1222 extern __at(0x009A) __sfr OSCSTAT
;
1226 unsigned HFIOFS
: 1;
1227 unsigned LFIOFR
: 1;
1228 unsigned MFIOFR
: 1;
1229 unsigned HFIOFL
: 1;
1230 unsigned HFIOFR
: 1;
1236 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits
;
1238 #define _HFIOFS 0x01
1239 #define _LFIOFR 0x02
1240 #define _MFIOFR 0x04
1241 #define _HFIOFL 0x08
1242 #define _HFIOFR 0x10
1247 //==============================================================================
1249 extern __at(0x009B) __sfr ADRES
;
1250 extern __at(0x009B) __sfr ADRESL
;
1251 extern __at(0x009C) __sfr ADRESH
;
1253 //==============================================================================
1256 extern __at(0x009D) __sfr ADCON0
;
1263 unsigned GO_NOT_DONE
: 1;
1304 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits
;
1307 #define _GO_NOT_DONE 0x02
1316 //==============================================================================
1319 //==============================================================================
1322 extern __at(0x009E) __sfr ADCON1
;
1328 unsigned ADPREF0
: 1;
1329 unsigned ADPREF1
: 1;
1330 unsigned ADNREF
: 1;
1340 unsigned ADPREF
: 2;
1345 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits
;
1347 #define _ADPREF0 0x01
1348 #define _ADPREF1 0x02
1349 #define _ADNREF 0x04
1352 //==============================================================================
1355 //==============================================================================
1358 extern __at(0x009F) __sfr ADCON2
;
1368 unsigned TRIGSEL0
: 1;
1369 unsigned TRIGSEL1
: 1;
1370 unsigned TRIGSEL2
: 1;
1371 unsigned TRIGSEL3
: 1;
1377 unsigned TRIGSEL
: 4;
1381 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits
;
1383 #define _TRIGSEL0 0x10
1384 #define _TRIGSEL1 0x20
1385 #define _TRIGSEL2 0x40
1386 #define _TRIGSEL3 0x80
1388 //==============================================================================
1391 //==============================================================================
1394 extern __at(0x010C) __sfr LATA
;
1408 extern __at(0x010C) volatile __LATAbits_t LATAbits
;
1419 //==============================================================================
1422 //==============================================================================
1425 extern __at(0x010D) __sfr LATB
;
1439 extern __at(0x010D) volatile __LATBbits_t LATBbits
;
1450 //==============================================================================
1453 //==============================================================================
1456 extern __at(0x010E) __sfr LATC
;
1470 extern __at(0x010E) volatile __LATCbits_t LATCbits
;
1481 //==============================================================================
1484 //==============================================================================
1487 extern __at(0x0111) __sfr CM1CON0
;
1491 unsigned C1SYNC
: 1;
1501 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits
;
1503 #define _C1SYNC 0x01
1511 //==============================================================================
1514 //==============================================================================
1517 extern __at(0x0112) __sfr CM1CON1
;
1523 unsigned C1NCH0
: 1;
1524 unsigned C1NCH1
: 1;
1525 unsigned C1NCH2
: 1;
1526 unsigned C1PCH0
: 1;
1527 unsigned C1PCH1
: 1;
1528 unsigned C1PCH2
: 1;
1529 unsigned C1INTN
: 1;
1530 unsigned C1INTP
: 1;
1547 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits
;
1549 #define _C1NCH0 0x01
1550 #define _C1NCH1 0x02
1551 #define _C1NCH2 0x04
1552 #define _C1PCH0 0x08
1553 #define _C1PCH1 0x10
1554 #define _C1PCH2 0x20
1555 #define _C1INTN 0x40
1556 #define _C1INTP 0x80
1558 //==============================================================================
1561 //==============================================================================
1564 extern __at(0x0113) __sfr CM2CON0
;
1568 unsigned C2SYNC
: 1;
1578 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits
;
1580 #define _C2SYNC 0x01
1588 //==============================================================================
1591 //==============================================================================
1594 extern __at(0x0114) __sfr CM2CON1
;
1600 unsigned C2NCH0
: 1;
1601 unsigned C2NCH1
: 1;
1602 unsigned C2NCH2
: 1;
1603 unsigned C2PCH0
: 1;
1604 unsigned C2PCH1
: 1;
1605 unsigned C2PCH2
: 1;
1606 unsigned C2INTN
: 1;
1607 unsigned C2INTP
: 1;
1624 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits
;
1626 #define _C2NCH0 0x01
1627 #define _C2NCH1 0x02
1628 #define _C2NCH2 0x04
1629 #define _C2PCH0 0x08
1630 #define _C2PCH1 0x10
1631 #define _C2PCH2 0x20
1632 #define _C2INTN 0x40
1633 #define _C2INTP 0x80
1635 //==============================================================================
1638 //==============================================================================
1641 extern __at(0x0115) __sfr CMOUT
;
1645 unsigned MC1OUT
: 1;
1646 unsigned MC2OUT
: 1;
1655 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits
;
1657 #define _MC1OUT 0x01
1658 #define _MC2OUT 0x02
1660 //==============================================================================
1663 //==============================================================================
1666 extern __at(0x0116) __sfr BORCON
;
1670 unsigned BORRDY
: 1;
1677 unsigned SBOREN
: 1;
1680 extern __at(0x0116) volatile __BORCONbits_t BORCONbits
;
1682 #define _BORRDY 0x01
1684 #define _SBOREN 0x80
1686 //==============================================================================
1689 //==============================================================================
1692 extern __at(0x0117) __sfr FVRCON
;
1698 unsigned ADFVR0
: 1;
1699 unsigned ADFVR1
: 1;
1700 unsigned CDAFVR0
: 1;
1701 unsigned CDAFVR1
: 1;
1704 unsigned FVRRDY
: 1;
1717 unsigned CDAFVR
: 2;
1722 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits
;
1724 #define _ADFVR0 0x01
1725 #define _ADFVR1 0x02
1726 #define _CDAFVR0 0x04
1727 #define _CDAFVR1 0x08
1730 #define _FVRRDY 0x40
1733 //==============================================================================
1736 //==============================================================================
1739 extern __at(0x0118) __sfr DAC1CON0
;
1745 unsigned DAC1NSS
: 1;
1747 unsigned DAC1PSS0
: 1;
1748 unsigned DAC1PSS1
: 1;
1749 unsigned DAC1OE2
: 1;
1750 unsigned DAC1OE1
: 1;
1752 unsigned DAC1EN
: 1;
1757 unsigned DACNSS
: 1;
1759 unsigned DACPSS0
: 1;
1760 unsigned DACPSS1
: 1;
1761 unsigned DACOE0
: 1;
1762 unsigned DACOE1
: 1;
1770 unsigned DAC1PSS
: 2;
1777 unsigned DACPSS
: 2;
1789 extern __at(0x0118) volatile __DAC1CON0bits_t DAC1CON0bits
;
1791 #define _DAC1NSS 0x01
1792 #define _DACNSS 0x01
1793 #define _DAC1PSS0 0x04
1794 #define _DACPSS0 0x04
1795 #define _DAC1PSS1 0x08
1796 #define _DACPSS1 0x08
1797 #define _DAC1OE2 0x10
1798 #define _DACOE0 0x10
1799 #define _DAC1OE1 0x20
1800 #define _DACOE1 0x20
1801 #define _DAC1EN 0x80
1804 //==============================================================================
1807 //==============================================================================
1810 extern __at(0x0119) __sfr DAC1CON1
;
1816 unsigned DAC1R0
: 1;
1817 unsigned DAC1R1
: 1;
1818 unsigned DAC1R2
: 1;
1819 unsigned DAC1R3
: 1;
1820 unsigned DAC1R4
: 1;
1821 unsigned DAC1R5
: 1;
1822 unsigned DAC1R6
: 1;
1823 unsigned DAC1R7
: 1;
1839 extern __at(0x0119) volatile __DAC1CON1bits_t DAC1CON1bits
;
1841 #define _DAC1R0 0x01
1843 #define _DAC1R1 0x02
1845 #define _DAC1R2 0x04
1847 #define _DAC1R3 0x08
1849 #define _DAC1R4 0x10
1851 #define _DAC1R5 0x20
1853 #define _DAC1R6 0x40
1855 #define _DAC1R7 0x80
1858 //==============================================================================
1861 //==============================================================================
1864 extern __at(0x011A) __sfr DAC2CON0
;
1882 unsigned DACNSS
: 1;
1884 unsigned DACPSS0
: 1;
1885 unsigned DACPSS1
: 1;
1886 unsigned DACOE2
: 1;
1887 unsigned DACOE1
: 1;
1894 unsigned DAC2NSS
: 1;
1896 unsigned DAC2PSS0
: 1;
1897 unsigned DAC2PSS1
: 1;
1898 unsigned DAC2OE2
: 1;
1899 unsigned DAC2OE1
: 1;
1901 unsigned DAC2EN
: 1;
1914 unsigned DACPSS
: 2;
1921 unsigned DAC2PSS
: 2;
1926 extern __at(0x011A) volatile __DAC2CON0bits_t DAC2CON0bits
;
1928 #define _DAC2CON0_NSS 0x01
1929 #define _DAC2CON0_DACNSS 0x01
1930 #define _DAC2CON0_DAC2NSS 0x01
1931 #define _DAC2CON0_PSS0 0x04
1932 #define _DAC2CON0_DACPSS0 0x04
1933 #define _DAC2CON0_DAC2PSS0 0x04
1934 #define _DAC2CON0_PSS1 0x08
1935 #define _DAC2CON0_DACPSS1 0x08
1936 #define _DAC2CON0_DAC2PSS1 0x08
1937 #define _DAC2CON0_OE2 0x10
1938 #define _DAC2CON0_DACOE2 0x10
1939 #define _DAC2CON0_DAC2OE2 0x10
1940 #define _DAC2CON0_OE1 0x20
1941 #define _DAC2CON0_DACOE1 0x20
1942 #define _DAC2CON0_DAC2OE1 0x20
1943 #define _DAC2CON0_EN 0x80
1944 #define _DAC2CON0_DACEN 0x80
1945 #define _DAC2CON0_DAC2EN 0x80
1947 //==============================================================================
1950 //==============================================================================
1953 extern __at(0x011B) __sfr DAC2CON1
;
1976 unsigned DAC2REF5
: 1;
1983 unsigned DAC2R0
: 1;
1984 unsigned DAC2R1
: 1;
1985 unsigned DAC2R2
: 1;
1986 unsigned DAC2R3
: 1;
1987 unsigned DAC2R4
: 1;
2007 unsigned DAC2REF0
: 1;
2008 unsigned DAC2REF1
: 1;
2009 unsigned DAC2REF2
: 1;
2010 unsigned DAC2REF3
: 1;
2011 unsigned DAC2REF4
: 1;
2043 unsigned DAC2REF
: 6;
2048 extern __at(0x011B) volatile __DAC2CON1bits_t DAC2CON1bits
;
2050 #define _DAC2CON1_DACR0 0x01
2051 #define _DAC2CON1_R0 0x01
2052 #define _DAC2CON1_DAC2R0 0x01
2053 #define _DAC2CON1_REF0 0x01
2054 #define _DAC2CON1_DAC2REF0 0x01
2055 #define _DAC2CON1_DACR1 0x02
2056 #define _DAC2CON1_R1 0x02
2057 #define _DAC2CON1_DAC2R1 0x02
2058 #define _DAC2CON1_REF1 0x02
2059 #define _DAC2CON1_DAC2REF1 0x02
2060 #define _DAC2CON1_DACR2 0x04
2061 #define _DAC2CON1_R2 0x04
2062 #define _DAC2CON1_DAC2R2 0x04
2063 #define _DAC2CON1_REF2 0x04
2064 #define _DAC2CON1_DAC2REF2 0x04
2065 #define _DAC2CON1_DACR3 0x08
2066 #define _DAC2CON1_R3 0x08
2067 #define _DAC2CON1_DAC2R3 0x08
2068 #define _DAC2CON1_REF3 0x08
2069 #define _DAC2CON1_DAC2REF3 0x08
2070 #define _DAC2CON1_DACR4 0x10
2071 #define _DAC2CON1_R4 0x10
2072 #define _DAC2CON1_DAC2R4 0x10
2073 #define _DAC2CON1_REF4 0x10
2074 #define _DAC2CON1_DAC2REF4 0x10
2075 #define _DAC2CON1_REF5 0x20
2076 #define _DAC2CON1_DAC2REF5 0x20
2078 //==============================================================================
2081 //==============================================================================
2084 extern __at(0x011B) __sfr DAC2REF
;
2107 unsigned DAC2REF5
: 1;
2114 unsigned DAC2R0
: 1;
2115 unsigned DAC2R1
: 1;
2116 unsigned DAC2R2
: 1;
2117 unsigned DAC2R3
: 1;
2118 unsigned DAC2R4
: 1;
2138 unsigned DAC2REF0
: 1;
2139 unsigned DAC2REF1
: 1;
2140 unsigned DAC2REF2
: 1;
2141 unsigned DAC2REF3
: 1;
2142 unsigned DAC2REF4
: 1;
2150 unsigned DAC2REF
: 6;
2179 extern __at(0x011B) volatile __DAC2REFbits_t DAC2REFbits
;
2181 #define _DAC2REF_DACR0 0x01
2182 #define _DAC2REF_R0 0x01
2183 #define _DAC2REF_DAC2R0 0x01
2184 #define _DAC2REF_REF0 0x01
2185 #define _DAC2REF_DAC2REF0 0x01
2186 #define _DAC2REF_DACR1 0x02
2187 #define _DAC2REF_R1 0x02
2188 #define _DAC2REF_DAC2R1 0x02
2189 #define _DAC2REF_REF1 0x02
2190 #define _DAC2REF_DAC2REF1 0x02
2191 #define _DAC2REF_DACR2 0x04
2192 #define _DAC2REF_R2 0x04
2193 #define _DAC2REF_DAC2R2 0x04
2194 #define _DAC2REF_REF2 0x04
2195 #define _DAC2REF_DAC2REF2 0x04
2196 #define _DAC2REF_DACR3 0x08
2197 #define _DAC2REF_R3 0x08
2198 #define _DAC2REF_DAC2R3 0x08
2199 #define _DAC2REF_REF3 0x08
2200 #define _DAC2REF_DAC2REF3 0x08
2201 #define _DAC2REF_DACR4 0x10
2202 #define _DAC2REF_R4 0x10
2203 #define _DAC2REF_DAC2R4 0x10
2204 #define _DAC2REF_REF4 0x10
2205 #define _DAC2REF_DAC2REF4 0x10
2206 #define _DAC2REF_REF5 0x20
2207 #define _DAC2REF_DAC2REF5 0x20
2209 //==============================================================================
2212 //==============================================================================
2215 extern __at(0x011C) __sfr ZCD1CON
;
2219 unsigned ZCD1INTN
: 1;
2220 unsigned ZCD1INTP
: 1;
2223 unsigned ZCD1POL
: 1;
2224 unsigned ZCD1OUT
: 1;
2226 unsigned ZCD1EN
: 1;
2229 extern __at(0x011C) volatile __ZCD1CONbits_t ZCD1CONbits
;
2231 #define _ZCD1INTN 0x01
2232 #define _ZCD1INTP 0x02
2233 #define _ZCD1POL 0x10
2234 #define _ZCD1OUT 0x20
2235 #define _ZCD1EN 0x80
2237 //==============================================================================
2240 //==============================================================================
2243 extern __at(0x018C) __sfr ANSELA
;
2266 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits
;
2275 //==============================================================================
2278 //==============================================================================
2281 extern __at(0x018D) __sfr ANSELB
;
2304 extern __at(0x018D) volatile __ANSELBbits_t ANSELBbits
;
2313 //==============================================================================
2316 //==============================================================================
2319 extern __at(0x018E) __sfr ANSELC
;
2333 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits
;
2342 //==============================================================================
2344 extern __at(0x0191) __sfr PMADR
;
2345 extern __at(0x0191) __sfr PMADRL
;
2346 extern __at(0x0192) __sfr PMADRH
;
2347 extern __at(0x0193) __sfr PMDAT
;
2348 extern __at(0x0193) __sfr PMDATL
;
2349 extern __at(0x0194) __sfr PMDATH
;
2351 //==============================================================================
2354 extern __at(0x0195) __sfr PMCON1
;
2368 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits
;
2378 //==============================================================================
2380 extern __at(0x0196) __sfr PMCON2
;
2381 extern __at(0x0199) __sfr RC1REG
;
2382 extern __at(0x0199) __sfr RCREG
;
2383 extern __at(0x0199) __sfr RCREG1
;
2384 extern __at(0x019A) __sfr TX1REG
;
2385 extern __at(0x019A) __sfr TXREG
;
2386 extern __at(0x019A) __sfr TXREG1
;
2387 extern __at(0x019B) __sfr SP1BRG
;
2388 extern __at(0x019B) __sfr SP1BRGL
;
2389 extern __at(0x019B) __sfr SPBRG
;
2390 extern __at(0x019B) __sfr SPBRG1
;
2391 extern __at(0x019B) __sfr SPBRGL
;
2392 extern __at(0x019C) __sfr SP1BRGH
;
2393 extern __at(0x019C) __sfr SPBRGH
;
2394 extern __at(0x019C) __sfr SPBRGH1
;
2396 //==============================================================================
2399 extern __at(0x019D) __sfr RC1STA
;
2413 extern __at(0x019D) volatile __RC1STAbits_t RC1STAbits
;
2424 //==============================================================================
2427 //==============================================================================
2430 extern __at(0x019D) __sfr RCSTA
;
2444 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits
;
2446 #define _RCSTA_RX9D 0x01
2447 #define _RCSTA_OERR 0x02
2448 #define _RCSTA_FERR 0x04
2449 #define _RCSTA_ADDEN 0x08
2450 #define _RCSTA_CREN 0x10
2451 #define _RCSTA_SREN 0x20
2452 #define _RCSTA_RX9 0x40
2453 #define _RCSTA_SPEN 0x80
2455 //==============================================================================
2458 //==============================================================================
2461 extern __at(0x019D) __sfr RCSTA1
;
2475 extern __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits
;
2477 #define _RCSTA1_RX9D 0x01
2478 #define _RCSTA1_OERR 0x02
2479 #define _RCSTA1_FERR 0x04
2480 #define _RCSTA1_ADDEN 0x08
2481 #define _RCSTA1_CREN 0x10
2482 #define _RCSTA1_SREN 0x20
2483 #define _RCSTA1_RX9 0x40
2484 #define _RCSTA1_SPEN 0x80
2486 //==============================================================================
2489 //==============================================================================
2492 extern __at(0x019E) __sfr TX1STA
;
2506 extern __at(0x019E) volatile __TX1STAbits_t TX1STAbits
;
2517 //==============================================================================
2520 //==============================================================================
2523 extern __at(0x019E) __sfr TXSTA
;
2537 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits
;
2539 #define _TXSTA_TX9D 0x01
2540 #define _TXSTA_TRMT 0x02
2541 #define _TXSTA_BRGH 0x04
2542 #define _TXSTA_SENDB 0x08
2543 #define _TXSTA_SYNC 0x10
2544 #define _TXSTA_TXEN 0x20
2545 #define _TXSTA_TX9 0x40
2546 #define _TXSTA_CSRC 0x80
2548 //==============================================================================
2551 //==============================================================================
2554 extern __at(0x019E) __sfr TXSTA1
;
2568 extern __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits
;
2570 #define _TXSTA1_TX9D 0x01
2571 #define _TXSTA1_TRMT 0x02
2572 #define _TXSTA1_BRGH 0x04
2573 #define _TXSTA1_SENDB 0x08
2574 #define _TXSTA1_SYNC 0x10
2575 #define _TXSTA1_TXEN 0x20
2576 #define _TXSTA1_TX9 0x40
2577 #define _TXSTA1_CSRC 0x80
2579 //==============================================================================
2582 //==============================================================================
2585 extern __at(0x019F) __sfr BAUD1CON
;
2596 unsigned ABDOVF
: 1;
2599 extern __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits
;
2606 #define _ABDOVF 0x80
2608 //==============================================================================
2611 //==============================================================================
2614 extern __at(0x019F) __sfr BAUDCON
;
2625 unsigned ABDOVF
: 1;
2628 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits
;
2630 #define _BAUDCON_ABDEN 0x01
2631 #define _BAUDCON_WUE 0x02
2632 #define _BAUDCON_BRG16 0x08
2633 #define _BAUDCON_SCKP 0x10
2634 #define _BAUDCON_RCIDL 0x40
2635 #define _BAUDCON_ABDOVF 0x80
2637 //==============================================================================
2640 //==============================================================================
2643 extern __at(0x019F) __sfr BAUDCON1
;
2654 unsigned ABDOVF
: 1;
2657 extern __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits
;
2659 #define _BAUDCON1_ABDEN 0x01
2660 #define _BAUDCON1_WUE 0x02
2661 #define _BAUDCON1_BRG16 0x08
2662 #define _BAUDCON1_SCKP 0x10
2663 #define _BAUDCON1_RCIDL 0x40
2664 #define _BAUDCON1_ABDOVF 0x80
2666 //==============================================================================
2669 //==============================================================================
2672 extern __at(0x019F) __sfr BAUDCTL
;
2683 unsigned ABDOVF
: 1;
2686 extern __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits
;
2688 #define _BAUDCTL_ABDEN 0x01
2689 #define _BAUDCTL_WUE 0x02
2690 #define _BAUDCTL_BRG16 0x08
2691 #define _BAUDCTL_SCKP 0x10
2692 #define _BAUDCTL_RCIDL 0x40
2693 #define _BAUDCTL_ABDOVF 0x80
2695 //==============================================================================
2698 //==============================================================================
2701 extern __at(0x019F) __sfr BAUDCTL1
;
2712 unsigned ABDOVF
: 1;
2715 extern __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits
;
2717 #define _BAUDCTL1_ABDEN 0x01
2718 #define _BAUDCTL1_WUE 0x02
2719 #define _BAUDCTL1_BRG16 0x08
2720 #define _BAUDCTL1_SCKP 0x10
2721 #define _BAUDCTL1_RCIDL 0x40
2722 #define _BAUDCTL1_ABDOVF 0x80
2724 //==============================================================================
2727 //==============================================================================
2730 extern __at(0x020C) __sfr WPUA
;
2744 extern __at(0x020C) volatile __WPUAbits_t WPUAbits
;
2755 //==============================================================================
2758 //==============================================================================
2761 extern __at(0x020D) __sfr WPUB
;
2775 extern __at(0x020D) volatile __WPUBbits_t WPUBbits
;
2786 //==============================================================================
2789 //==============================================================================
2792 extern __at(0x020E) __sfr WPUC
;
2806 extern __at(0x020E) volatile __WPUCbits_t WPUCbits
;
2817 //==============================================================================
2820 //==============================================================================
2823 extern __at(0x0210) __sfr WPUE
;
2837 extern __at(0x0210) volatile __WPUEbits_t WPUEbits
;
2841 //==============================================================================
2844 //==============================================================================
2847 extern __at(0x0211) __sfr SSP1BUF
;
2853 unsigned SSP1BUF0
: 1;
2854 unsigned SSP1BUF1
: 1;
2855 unsigned SSP1BUF2
: 1;
2856 unsigned SSP1BUF3
: 1;
2857 unsigned SSP1BUF4
: 1;
2858 unsigned SSP1BUF5
: 1;
2859 unsigned SSP1BUF6
: 1;
2860 unsigned SSP1BUF7
: 1;
2876 extern __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits
;
2878 #define _SSP1BUF0 0x01
2880 #define _SSP1BUF1 0x02
2882 #define _SSP1BUF2 0x04
2884 #define _SSP1BUF3 0x08
2886 #define _SSP1BUF4 0x10
2888 #define _SSP1BUF5 0x20
2890 #define _SSP1BUF6 0x40
2892 #define _SSP1BUF7 0x80
2895 //==============================================================================
2898 //==============================================================================
2901 extern __at(0x0211) __sfr SSPBUF
;
2907 unsigned SSP1BUF0
: 1;
2908 unsigned SSP1BUF1
: 1;
2909 unsigned SSP1BUF2
: 1;
2910 unsigned SSP1BUF3
: 1;
2911 unsigned SSP1BUF4
: 1;
2912 unsigned SSP1BUF5
: 1;
2913 unsigned SSP1BUF6
: 1;
2914 unsigned SSP1BUF7
: 1;
2930 extern __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits
;
2932 #define _SSPBUF_SSP1BUF0 0x01
2933 #define _SSPBUF_BUF0 0x01
2934 #define _SSPBUF_SSP1BUF1 0x02
2935 #define _SSPBUF_BUF1 0x02
2936 #define _SSPBUF_SSP1BUF2 0x04
2937 #define _SSPBUF_BUF2 0x04
2938 #define _SSPBUF_SSP1BUF3 0x08
2939 #define _SSPBUF_BUF3 0x08
2940 #define _SSPBUF_SSP1BUF4 0x10
2941 #define _SSPBUF_BUF4 0x10
2942 #define _SSPBUF_SSP1BUF5 0x20
2943 #define _SSPBUF_BUF5 0x20
2944 #define _SSPBUF_SSP1BUF6 0x40
2945 #define _SSPBUF_BUF6 0x40
2946 #define _SSPBUF_SSP1BUF7 0x80
2947 #define _SSPBUF_BUF7 0x80
2949 //==============================================================================
2952 //==============================================================================
2955 extern __at(0x0212) __sfr SSP1ADD
;
2961 unsigned SSP1ADD0
: 1;
2962 unsigned SSP1ADD1
: 1;
2963 unsigned SSP1ADD2
: 1;
2964 unsigned SSP1ADD3
: 1;
2965 unsigned SSP1ADD4
: 1;
2966 unsigned SSP1ADD5
: 1;
2967 unsigned SSP1ADD6
: 1;
2968 unsigned SSP1ADD7
: 1;
2984 extern __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits
;
2986 #define _SSP1ADD0 0x01
2988 #define _SSP1ADD1 0x02
2990 #define _SSP1ADD2 0x04
2992 #define _SSP1ADD3 0x08
2994 #define _SSP1ADD4 0x10
2996 #define _SSP1ADD5 0x20
2998 #define _SSP1ADD6 0x40
3000 #define _SSP1ADD7 0x80
3003 //==============================================================================
3006 //==============================================================================
3009 extern __at(0x0212) __sfr SSPADD
;
3015 unsigned SSP1ADD0
: 1;
3016 unsigned SSP1ADD1
: 1;
3017 unsigned SSP1ADD2
: 1;
3018 unsigned SSP1ADD3
: 1;
3019 unsigned SSP1ADD4
: 1;
3020 unsigned SSP1ADD5
: 1;
3021 unsigned SSP1ADD6
: 1;
3022 unsigned SSP1ADD7
: 1;
3038 extern __at(0x0212) volatile __SSPADDbits_t SSPADDbits
;
3040 #define _SSPADD_SSP1ADD0 0x01
3041 #define _SSPADD_ADD0 0x01
3042 #define _SSPADD_SSP1ADD1 0x02
3043 #define _SSPADD_ADD1 0x02
3044 #define _SSPADD_SSP1ADD2 0x04
3045 #define _SSPADD_ADD2 0x04
3046 #define _SSPADD_SSP1ADD3 0x08
3047 #define _SSPADD_ADD3 0x08
3048 #define _SSPADD_SSP1ADD4 0x10
3049 #define _SSPADD_ADD4 0x10
3050 #define _SSPADD_SSP1ADD5 0x20
3051 #define _SSPADD_ADD5 0x20
3052 #define _SSPADD_SSP1ADD6 0x40
3053 #define _SSPADD_ADD6 0x40
3054 #define _SSPADD_SSP1ADD7 0x80
3055 #define _SSPADD_ADD7 0x80
3057 //==============================================================================
3060 //==============================================================================
3063 extern __at(0x0213) __sfr SSP1MSK
;
3069 unsigned SSP1MSK0
: 1;
3070 unsigned SSP1MSK1
: 1;
3071 unsigned SSP1MSK2
: 1;
3072 unsigned SSP1MSK3
: 1;
3073 unsigned SSP1MSK4
: 1;
3074 unsigned SSP1MSK5
: 1;
3075 unsigned SSP1MSK6
: 1;
3076 unsigned SSP1MSK7
: 1;
3092 extern __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits
;
3094 #define _SSP1MSK0 0x01
3096 #define _SSP1MSK1 0x02
3098 #define _SSP1MSK2 0x04
3100 #define _SSP1MSK3 0x08
3102 #define _SSP1MSK4 0x10
3104 #define _SSP1MSK5 0x20
3106 #define _SSP1MSK6 0x40
3108 #define _SSP1MSK7 0x80
3111 //==============================================================================
3114 //==============================================================================
3117 extern __at(0x0213) __sfr SSPMSK
;
3123 unsigned SSP1MSK0
: 1;
3124 unsigned SSP1MSK1
: 1;
3125 unsigned SSP1MSK2
: 1;
3126 unsigned SSP1MSK3
: 1;
3127 unsigned SSP1MSK4
: 1;
3128 unsigned SSP1MSK5
: 1;
3129 unsigned SSP1MSK6
: 1;
3130 unsigned SSP1MSK7
: 1;
3146 extern __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits
;
3148 #define _SSPMSK_SSP1MSK0 0x01
3149 #define _SSPMSK_MSK0 0x01
3150 #define _SSPMSK_SSP1MSK1 0x02
3151 #define _SSPMSK_MSK1 0x02
3152 #define _SSPMSK_SSP1MSK2 0x04
3153 #define _SSPMSK_MSK2 0x04
3154 #define _SSPMSK_SSP1MSK3 0x08
3155 #define _SSPMSK_MSK3 0x08
3156 #define _SSPMSK_SSP1MSK4 0x10
3157 #define _SSPMSK_MSK4 0x10
3158 #define _SSPMSK_SSP1MSK5 0x20
3159 #define _SSPMSK_MSK5 0x20
3160 #define _SSPMSK_SSP1MSK6 0x40
3161 #define _SSPMSK_MSK6 0x40
3162 #define _SSPMSK_SSP1MSK7 0x80
3163 #define _SSPMSK_MSK7 0x80
3165 //==============================================================================
3168 //==============================================================================
3171 extern __at(0x0214) __sfr SSP1STAT
;
3177 unsigned R_NOT_W
: 1;
3180 unsigned D_NOT_A
: 1;
3185 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits
;
3189 #define _R_NOT_W 0x04
3192 #define _D_NOT_A 0x20
3196 //==============================================================================
3199 //==============================================================================
3202 extern __at(0x0214) __sfr SSPSTAT
;
3208 unsigned R_NOT_W
: 1;
3211 unsigned D_NOT_A
: 1;
3216 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits
;
3218 #define _SSPSTAT_BF 0x01
3219 #define _SSPSTAT_UA 0x02
3220 #define _SSPSTAT_R_NOT_W 0x04
3221 #define _SSPSTAT_S 0x08
3222 #define _SSPSTAT_P 0x10
3223 #define _SSPSTAT_D_NOT_A 0x20
3224 #define _SSPSTAT_CKE 0x40
3225 #define _SSPSTAT_SMP 0x80
3227 //==============================================================================
3230 //==============================================================================
3233 extern __at(0x0215) __sfr SSP1CON
;
3256 extern __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits
;
3267 //==============================================================================
3270 //==============================================================================
3273 extern __at(0x0215) __sfr SSP1CON1
;
3296 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits
;
3298 #define _SSP1CON1_SSPM0 0x01
3299 #define _SSP1CON1_SSPM1 0x02
3300 #define _SSP1CON1_SSPM2 0x04
3301 #define _SSP1CON1_SSPM3 0x08
3302 #define _SSP1CON1_CKP 0x10
3303 #define _SSP1CON1_SSPEN 0x20
3304 #define _SSP1CON1_SSPOV 0x40
3305 #define _SSP1CON1_WCOL 0x80
3307 //==============================================================================
3310 //==============================================================================
3313 extern __at(0x0215) __sfr SSPCON
;
3336 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits
;
3338 #define _SSPCON_SSPM0 0x01
3339 #define _SSPCON_SSPM1 0x02
3340 #define _SSPCON_SSPM2 0x04
3341 #define _SSPCON_SSPM3 0x08
3342 #define _SSPCON_CKP 0x10
3343 #define _SSPCON_SSPEN 0x20
3344 #define _SSPCON_SSPOV 0x40
3345 #define _SSPCON_WCOL 0x80
3347 //==============================================================================
3350 //==============================================================================
3353 extern __at(0x0215) __sfr SSPCON1
;
3376 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits
;
3378 #define _SSPCON1_SSPM0 0x01
3379 #define _SSPCON1_SSPM1 0x02
3380 #define _SSPCON1_SSPM2 0x04
3381 #define _SSPCON1_SSPM3 0x08
3382 #define _SSPCON1_CKP 0x10
3383 #define _SSPCON1_SSPEN 0x20
3384 #define _SSPCON1_SSPOV 0x40
3385 #define _SSPCON1_WCOL 0x80
3387 //==============================================================================
3390 //==============================================================================
3393 extern __at(0x0216) __sfr SSP1CON2
;
3403 unsigned ACKSTAT
: 1;
3407 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits
;
3415 #define _ACKSTAT 0x40
3418 //==============================================================================
3421 //==============================================================================
3424 extern __at(0x0216) __sfr SSPCON2
;
3434 unsigned ACKSTAT
: 1;
3438 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits
;
3440 #define _SSPCON2_SEN 0x01
3441 #define _SSPCON2_RSEN 0x02
3442 #define _SSPCON2_PEN 0x04
3443 #define _SSPCON2_RCEN 0x08
3444 #define _SSPCON2_ACKEN 0x10
3445 #define _SSPCON2_ACKDT 0x20
3446 #define _SSPCON2_ACKSTAT 0x40
3447 #define _SSPCON2_GCEN 0x80
3449 //==============================================================================
3452 //==============================================================================
3455 extern __at(0x0217) __sfr SSP1CON3
;
3466 unsigned ACKTIM
: 1;
3469 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits
;
3478 #define _ACKTIM 0x80
3480 //==============================================================================
3483 //==============================================================================
3486 extern __at(0x0217) __sfr SSPCON3
;
3497 unsigned ACKTIM
: 1;
3500 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits
;
3502 #define _SSPCON3_DHEN 0x01
3503 #define _SSPCON3_AHEN 0x02
3504 #define _SSPCON3_SBCDE 0x04
3505 #define _SSPCON3_SDAHT 0x08
3506 #define _SSPCON3_BOEN 0x10
3507 #define _SSPCON3_SCIE 0x20
3508 #define _SSPCON3_PCIE 0x40
3509 #define _SSPCON3_ACKTIM 0x80
3511 //==============================================================================
3514 //==============================================================================
3517 extern __at(0x028C) __sfr ODCONA
;
3531 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits
;
3542 //==============================================================================
3545 //==============================================================================
3548 extern __at(0x028D) __sfr ODCONB
;
3562 extern __at(0x028D) volatile __ODCONBbits_t ODCONBbits
;
3573 //==============================================================================
3576 //==============================================================================
3579 extern __at(0x028E) __sfr ODCONC
;
3593 extern __at(0x028E) volatile __ODCONCbits_t ODCONCbits
;
3604 //==============================================================================
3606 extern __at(0x0291) __sfr CCPR1
;
3607 extern __at(0x0291) __sfr CCPR1L
;
3608 extern __at(0x0292) __sfr CCPR1H
;
3610 //==============================================================================
3613 extern __at(0x0293) __sfr CCP1CON
;
3619 unsigned CCP1M0
: 1;
3620 unsigned CCP1M1
: 1;
3621 unsigned CCP1M2
: 1;
3622 unsigned CCP1M3
: 1;
3655 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits
;
3657 #define _CCP1M0 0x01
3658 #define _CCP1M1 0x02
3659 #define _CCP1M2 0x04
3660 #define _CCP1M3 0x08
3666 //==============================================================================
3669 //==============================================================================
3672 extern __at(0x0293) __sfr ECCP1CON
;
3678 unsigned CCP1M0
: 1;
3679 unsigned CCP1M1
: 1;
3680 unsigned CCP1M2
: 1;
3681 unsigned CCP1M3
: 1;
3714 extern __at(0x0293) volatile __ECCP1CONbits_t ECCP1CONbits
;
3716 #define _ECCP1CON_CCP1M0 0x01
3717 #define _ECCP1CON_CCP1M1 0x02
3718 #define _ECCP1CON_CCP1M2 0x04
3719 #define _ECCP1CON_CCP1M3 0x08
3720 #define _ECCP1CON_DC1B0 0x10
3721 #define _ECCP1CON_CCP1Y 0x10
3722 #define _ECCP1CON_DC1B1 0x20
3723 #define _ECCP1CON_CCP1X 0x20
3725 //==============================================================================
3727 extern __at(0x0298) __sfr CCPR2
;
3728 extern __at(0x0298) __sfr CCPR2L
;
3729 extern __at(0x0299) __sfr CCPR2H
;
3731 //==============================================================================
3734 extern __at(0x029A) __sfr CCP2CON
;
3740 unsigned CCP2M0
: 1;
3741 unsigned CCP2M1
: 1;
3742 unsigned CCP2M2
: 1;
3743 unsigned CCP2M3
: 1;
3776 extern __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits
;
3778 #define _CCP2M0 0x01
3779 #define _CCP2M1 0x02
3780 #define _CCP2M2 0x04
3781 #define _CCP2M3 0x08
3787 //==============================================================================
3790 //==============================================================================
3793 extern __at(0x029A) __sfr ECCP2CON
;
3799 unsigned CCP2M0
: 1;
3800 unsigned CCP2M1
: 1;
3801 unsigned CCP2M2
: 1;
3802 unsigned CCP2M3
: 1;
3835 extern __at(0x029A) volatile __ECCP2CONbits_t ECCP2CONbits
;
3837 #define _ECCP2CON_CCP2M0 0x01
3838 #define _ECCP2CON_CCP2M1 0x02
3839 #define _ECCP2CON_CCP2M2 0x04
3840 #define _ECCP2CON_CCP2M3 0x08
3841 #define _ECCP2CON_DC2B0 0x10
3842 #define _ECCP2CON_CCP2Y 0x10
3843 #define _ECCP2CON_DC2B1 0x20
3844 #define _ECCP2CON_CCP2X 0x20
3846 //==============================================================================
3849 //==============================================================================
3852 extern __at(0x029E) __sfr CCPTMRS
;
3858 unsigned C1TSEL0
: 1;
3859 unsigned C1TSEL1
: 1;
3860 unsigned C2TSEL0
: 1;
3861 unsigned C2TSEL1
: 1;
3862 unsigned P3TSEL0
: 1;
3863 unsigned P3TSEL1
: 1;
3864 unsigned P4TSEL0
: 1;
3865 unsigned P4TSEL1
: 1;
3870 unsigned C1TSEL
: 2;
3877 unsigned C2TSEL
: 2;
3884 unsigned P3TSEL
: 2;
3891 unsigned P4TSEL
: 2;
3895 extern __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits
;
3897 #define _C1TSEL0 0x01
3898 #define _C1TSEL1 0x02
3899 #define _C2TSEL0 0x04
3900 #define _C2TSEL1 0x08
3901 #define _P3TSEL0 0x10
3902 #define _P3TSEL1 0x20
3903 #define _P4TSEL0 0x40
3904 #define _P4TSEL1 0x80
3906 //==============================================================================
3909 //==============================================================================
3912 extern __at(0x030C) __sfr SLRCONA
;
3926 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits
;
3937 //==============================================================================
3940 //==============================================================================
3943 extern __at(0x030D) __sfr SLRCONB
;
3957 extern __at(0x030D) volatile __SLRCONBbits_t SLRCONBbits
;
3968 //==============================================================================
3971 //==============================================================================
3974 extern __at(0x030E) __sfr SLRCONC
;
3988 extern __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits
;
3999 //==============================================================================
4002 //==============================================================================
4005 extern __at(0x038C) __sfr INLVLA
;
4009 unsigned INLVLA0
: 1;
4010 unsigned INLVLA1
: 1;
4011 unsigned INLVLA2
: 1;
4012 unsigned INLVLA3
: 1;
4013 unsigned INLVLA4
: 1;
4014 unsigned INLVLA5
: 1;
4015 unsigned INLVLA6
: 1;
4016 unsigned INLVLA7
: 1;
4019 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits
;
4021 #define _INLVLA0 0x01
4022 #define _INLVLA1 0x02
4023 #define _INLVLA2 0x04
4024 #define _INLVLA3 0x08
4025 #define _INLVLA4 0x10
4026 #define _INLVLA5 0x20
4027 #define _INLVLA6 0x40
4028 #define _INLVLA7 0x80
4030 //==============================================================================
4033 //==============================================================================
4036 extern __at(0x038D) __sfr INLVLB
;
4040 unsigned INLVLB0
: 1;
4041 unsigned INLVLB1
: 1;
4042 unsigned INLVLB2
: 1;
4043 unsigned INLVLB3
: 1;
4044 unsigned INLVLB4
: 1;
4045 unsigned INLVLB5
: 1;
4046 unsigned INLVLB6
: 1;
4047 unsigned INLVLB7
: 1;
4050 extern __at(0x038D) volatile __INLVLBbits_t INLVLBbits
;
4052 #define _INLVLB0 0x01
4053 #define _INLVLB1 0x02
4054 #define _INLVLB2 0x04
4055 #define _INLVLB3 0x08
4056 #define _INLVLB4 0x10
4057 #define _INLVLB5 0x20
4058 #define _INLVLB6 0x40
4059 #define _INLVLB7 0x80
4061 //==============================================================================
4064 //==============================================================================
4067 extern __at(0x038E) __sfr INLVLC
;
4071 unsigned INLVLC0
: 1;
4072 unsigned INLVLC1
: 1;
4073 unsigned INLVLC2
: 1;
4074 unsigned INLVLC3
: 1;
4075 unsigned INLVLC4
: 1;
4076 unsigned INLVLC5
: 1;
4077 unsigned INLVLC6
: 1;
4078 unsigned INLVLC7
: 1;
4081 extern __at(0x038E) volatile __INLVLCbits_t INLVLCbits
;
4083 #define _INLVLC0 0x01
4084 #define _INLVLC1 0x02
4085 #define _INLVLC2 0x04
4086 #define _INLVLC3 0x08
4087 #define _INLVLC4 0x10
4088 #define _INLVLC5 0x20
4089 #define _INLVLC6 0x40
4090 #define _INLVLC7 0x80
4092 //==============================================================================
4095 //==============================================================================
4098 extern __at(0x0390) __sfr INLVLE
;
4105 unsigned INLVLE3
: 1;
4112 extern __at(0x0390) volatile __INLVLEbits_t INLVLEbits
;
4114 #define _INLVLE3 0x08
4116 //==============================================================================
4119 //==============================================================================
4122 extern __at(0x0391) __sfr IOCAP
;
4126 unsigned IOCAP0
: 1;
4127 unsigned IOCAP1
: 1;
4128 unsigned IOCAP2
: 1;
4129 unsigned IOCAP3
: 1;
4130 unsigned IOCAP4
: 1;
4131 unsigned IOCAP5
: 1;
4132 unsigned IOCAP6
: 1;
4133 unsigned IOCAP7
: 1;
4136 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits
;
4138 #define _IOCAP0 0x01
4139 #define _IOCAP1 0x02
4140 #define _IOCAP2 0x04
4141 #define _IOCAP3 0x08
4142 #define _IOCAP4 0x10
4143 #define _IOCAP5 0x20
4144 #define _IOCAP6 0x40
4145 #define _IOCAP7 0x80
4147 //==============================================================================
4150 //==============================================================================
4153 extern __at(0x0392) __sfr IOCAN
;
4157 unsigned IOCAN0
: 1;
4158 unsigned IOCAN1
: 1;
4159 unsigned IOCAN2
: 1;
4160 unsigned IOCAN3
: 1;
4161 unsigned IOCAN4
: 1;
4162 unsigned IOCAN5
: 1;
4163 unsigned IOCAN6
: 1;
4164 unsigned IOCAN7
: 1;
4167 extern __at(0x0392) volatile __IOCANbits_t IOCANbits
;
4169 #define _IOCAN0 0x01
4170 #define _IOCAN1 0x02
4171 #define _IOCAN2 0x04
4172 #define _IOCAN3 0x08
4173 #define _IOCAN4 0x10
4174 #define _IOCAN5 0x20
4175 #define _IOCAN6 0x40
4176 #define _IOCAN7 0x80
4178 //==============================================================================
4181 //==============================================================================
4184 extern __at(0x0393) __sfr IOCAF
;
4188 unsigned IOCAF0
: 1;
4189 unsigned IOCAF1
: 1;
4190 unsigned IOCAF2
: 1;
4191 unsigned IOCAF3
: 1;
4192 unsigned IOCAF4
: 1;
4193 unsigned IOCAF5
: 1;
4194 unsigned IOCAF6
: 1;
4195 unsigned IOCAF7
: 1;
4198 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits
;
4200 #define _IOCAF0 0x01
4201 #define _IOCAF1 0x02
4202 #define _IOCAF2 0x04
4203 #define _IOCAF3 0x08
4204 #define _IOCAF4 0x10
4205 #define _IOCAF5 0x20
4206 #define _IOCAF6 0x40
4207 #define _IOCAF7 0x80
4209 //==============================================================================
4212 //==============================================================================
4215 extern __at(0x0394) __sfr IOCBP
;
4219 unsigned IOCBP0
: 1;
4220 unsigned IOCBP1
: 1;
4221 unsigned IOCBP2
: 1;
4222 unsigned IOCBP3
: 1;
4223 unsigned IOCBP4
: 1;
4224 unsigned IOCBP5
: 1;
4225 unsigned IOCBP6
: 1;
4226 unsigned IOCBP7
: 1;
4229 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits
;
4231 #define _IOCBP0 0x01
4232 #define _IOCBP1 0x02
4233 #define _IOCBP2 0x04
4234 #define _IOCBP3 0x08
4235 #define _IOCBP4 0x10
4236 #define _IOCBP5 0x20
4237 #define _IOCBP6 0x40
4238 #define _IOCBP7 0x80
4240 //==============================================================================
4243 //==============================================================================
4246 extern __at(0x0395) __sfr IOCBN
;
4250 unsigned IOCBN0
: 1;
4251 unsigned IOCBN1
: 1;
4252 unsigned IOCBN2
: 1;
4253 unsigned IOCBN3
: 1;
4254 unsigned IOCBN4
: 1;
4255 unsigned IOCBN5
: 1;
4256 unsigned IOCBN6
: 1;
4257 unsigned IOCBN7
: 1;
4260 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits
;
4262 #define _IOCBN0 0x01
4263 #define _IOCBN1 0x02
4264 #define _IOCBN2 0x04
4265 #define _IOCBN3 0x08
4266 #define _IOCBN4 0x10
4267 #define _IOCBN5 0x20
4268 #define _IOCBN6 0x40
4269 #define _IOCBN7 0x80
4271 //==============================================================================
4274 //==============================================================================
4277 extern __at(0x0396) __sfr IOCBF
;
4281 unsigned IOCBF0
: 1;
4282 unsigned IOCBF1
: 1;
4283 unsigned IOCBF2
: 1;
4284 unsigned IOCBF3
: 1;
4285 unsigned IOCBF4
: 1;
4286 unsigned IOCBF5
: 1;
4287 unsigned IOCBF6
: 1;
4288 unsigned IOCBF7
: 1;
4291 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits
;
4293 #define _IOCBF0 0x01
4294 #define _IOCBF1 0x02
4295 #define _IOCBF2 0x04
4296 #define _IOCBF3 0x08
4297 #define _IOCBF4 0x10
4298 #define _IOCBF5 0x20
4299 #define _IOCBF6 0x40
4300 #define _IOCBF7 0x80
4302 //==============================================================================
4305 //==============================================================================
4308 extern __at(0x0397) __sfr IOCCP
;
4312 unsigned IOCCP0
: 1;
4313 unsigned IOCCP1
: 1;
4314 unsigned IOCCP2
: 1;
4315 unsigned IOCCP3
: 1;
4316 unsigned IOCCP4
: 1;
4317 unsigned IOCCP5
: 1;
4318 unsigned IOCCP6
: 1;
4319 unsigned IOCCP7
: 1;
4322 extern __at(0x0397) volatile __IOCCPbits_t IOCCPbits
;
4324 #define _IOCCP0 0x01
4325 #define _IOCCP1 0x02
4326 #define _IOCCP2 0x04
4327 #define _IOCCP3 0x08
4328 #define _IOCCP4 0x10
4329 #define _IOCCP5 0x20
4330 #define _IOCCP6 0x40
4331 #define _IOCCP7 0x80
4333 //==============================================================================
4336 //==============================================================================
4339 extern __at(0x0398) __sfr IOCCN
;
4343 unsigned IOCCN0
: 1;
4344 unsigned IOCCN1
: 1;
4345 unsigned IOCCN2
: 1;
4346 unsigned IOCCN3
: 1;
4347 unsigned IOCCN4
: 1;
4348 unsigned IOCCN5
: 1;
4349 unsigned IOCCN6
: 1;
4350 unsigned IOCCN7
: 1;
4353 extern __at(0x0398) volatile __IOCCNbits_t IOCCNbits
;
4355 #define _IOCCN0 0x01
4356 #define _IOCCN1 0x02
4357 #define _IOCCN2 0x04
4358 #define _IOCCN3 0x08
4359 #define _IOCCN4 0x10
4360 #define _IOCCN5 0x20
4361 #define _IOCCN6 0x40
4362 #define _IOCCN7 0x80
4364 //==============================================================================
4367 //==============================================================================
4370 extern __at(0x0399) __sfr IOCCF
;
4374 unsigned IOCCF0
: 1;
4375 unsigned IOCCF1
: 1;
4376 unsigned IOCCF2
: 1;
4377 unsigned IOCCF3
: 1;
4378 unsigned IOCCF4
: 1;
4379 unsigned IOCCF5
: 1;
4380 unsigned IOCCF6
: 1;
4381 unsigned IOCCF7
: 1;
4384 extern __at(0x0399) volatile __IOCCFbits_t IOCCFbits
;
4386 #define _IOCCF0 0x01
4387 #define _IOCCF1 0x02
4388 #define _IOCCF2 0x04
4389 #define _IOCCF3 0x08
4390 #define _IOCCF4 0x10
4391 #define _IOCCF5 0x20
4392 #define _IOCCF6 0x40
4393 #define _IOCCF7 0x80
4395 //==============================================================================
4398 //==============================================================================
4401 extern __at(0x039D) __sfr IOCEP
;
4408 unsigned IOCEP3
: 1;
4415 extern __at(0x039D) volatile __IOCEPbits_t IOCEPbits
;
4417 #define _IOCEP3 0x08
4419 //==============================================================================
4422 //==============================================================================
4425 extern __at(0x039E) __sfr IOCEN
;
4432 unsigned IOCEN3
: 1;
4439 extern __at(0x039E) volatile __IOCENbits_t IOCENbits
;
4441 #define _IOCEN3 0x08
4443 //==============================================================================
4446 //==============================================================================
4449 extern __at(0x039F) __sfr IOCEF
;
4456 unsigned IOCEF3
: 1;
4463 extern __at(0x039F) volatile __IOCEFbits_t IOCEFbits
;
4465 #define _IOCEF3 0x08
4467 //==============================================================================
4469 extern __at(0x0415) __sfr TMR4
;
4470 extern __at(0x0416) __sfr PR4
;
4472 //==============================================================================
4475 extern __at(0x0417) __sfr T4CON
;
4481 unsigned T4CKPS0
: 1;
4482 unsigned T4CKPS1
: 1;
4483 unsigned TMR4ON
: 1;
4484 unsigned T4OUTPS0
: 1;
4485 unsigned T4OUTPS1
: 1;
4486 unsigned T4OUTPS2
: 1;
4487 unsigned T4OUTPS3
: 1;
4493 unsigned T4CKPS
: 2;
4500 unsigned T4OUTPS
: 4;
4505 extern __at(0x0417) volatile __T4CONbits_t T4CONbits
;
4507 #define _T4CKPS0 0x01
4508 #define _T4CKPS1 0x02
4509 #define _TMR4ON 0x04
4510 #define _T4OUTPS0 0x08
4511 #define _T4OUTPS1 0x10
4512 #define _T4OUTPS2 0x20
4513 #define _T4OUTPS3 0x40
4515 //==============================================================================
4517 extern __at(0x041C) __sfr TMR6
;
4518 extern __at(0x041D) __sfr PR6
;
4520 //==============================================================================
4523 extern __at(0x041E) __sfr T6CON
;
4529 unsigned T6CKPS0
: 1;
4530 unsigned T6CKPS1
: 1;
4531 unsigned TMR6ON
: 1;
4532 unsigned T6OUTPS0
: 1;
4533 unsigned T6OUTPS1
: 1;
4534 unsigned T6OUTPS2
: 1;
4535 unsigned T6OUTPS3
: 1;
4541 unsigned T6CKPS
: 2;
4548 unsigned T6OUTPS
: 4;
4553 extern __at(0x041E) volatile __T6CONbits_t T6CONbits
;
4555 #define _T6CKPS0 0x01
4556 #define _T6CKPS1 0x02
4557 #define _TMR6ON 0x04
4558 #define _T6OUTPS0 0x08
4559 #define _T6OUTPS1 0x10
4560 #define _T6OUTPS2 0x20
4561 #define _T6OUTPS3 0x40
4563 //==============================================================================
4565 extern __at(0x0498) __sfr NCO1ACC
;
4567 //==============================================================================
4570 extern __at(0x0498) __sfr NCO1ACCL
;
4574 unsigned NCO1ACC0
: 1;
4575 unsigned NCO1ACC1
: 1;
4576 unsigned NCO1ACC2
: 1;
4577 unsigned NCO1ACC3
: 1;
4578 unsigned NCO1ACC4
: 1;
4579 unsigned NCO1ACC5
: 1;
4580 unsigned NCO1ACC6
: 1;
4581 unsigned NCO1ACC7
: 1;
4584 extern __at(0x0498) volatile __NCO1ACCLbits_t NCO1ACCLbits
;
4586 #define _NCO1ACC0 0x01
4587 #define _NCO1ACC1 0x02
4588 #define _NCO1ACC2 0x04
4589 #define _NCO1ACC3 0x08
4590 #define _NCO1ACC4 0x10
4591 #define _NCO1ACC5 0x20
4592 #define _NCO1ACC6 0x40
4593 #define _NCO1ACC7 0x80
4595 //==============================================================================
4598 //==============================================================================
4601 extern __at(0x0499) __sfr NCO1ACCH
;
4605 unsigned NCO1ACC8
: 1;
4606 unsigned NCO1ACC9
: 1;
4607 unsigned NCO1ACC10
: 1;
4608 unsigned NCO1ACC11
: 1;
4609 unsigned NCO1ACC12
: 1;
4610 unsigned NCO1ACC13
: 1;
4611 unsigned NCO1ACC14
: 1;
4612 unsigned NCO1ACC15
: 1;
4615 extern __at(0x0499) volatile __NCO1ACCHbits_t NCO1ACCHbits
;
4617 #define _NCO1ACC8 0x01
4618 #define _NCO1ACC9 0x02
4619 #define _NCO1ACC10 0x04
4620 #define _NCO1ACC11 0x08
4621 #define _NCO1ACC12 0x10
4622 #define _NCO1ACC13 0x20
4623 #define _NCO1ACC14 0x40
4624 #define _NCO1ACC15 0x80
4626 //==============================================================================
4629 //==============================================================================
4632 extern __at(0x049A) __sfr NCO1ACCU
;
4636 unsigned NCO1ACC16
: 1;
4637 unsigned NCO1ACC17
: 1;
4638 unsigned NCO1ACC18
: 1;
4639 unsigned NCO1ACC19
: 1;
4646 extern __at(0x049A) volatile __NCO1ACCUbits_t NCO1ACCUbits
;
4648 #define _NCO1ACC16 0x01
4649 #define _NCO1ACC17 0x02
4650 #define _NCO1ACC18 0x04
4651 #define _NCO1ACC19 0x08
4653 //==============================================================================
4655 extern __at(0x049B) __sfr NCO1INC
;
4657 //==============================================================================
4660 extern __at(0x049B) __sfr NCO1INCL
;
4664 unsigned NCO1INC0
: 1;
4665 unsigned NCO1INC1
: 1;
4666 unsigned NCO1INC2
: 1;
4667 unsigned NCO1INC3
: 1;
4668 unsigned NCO1INC4
: 1;
4669 unsigned NCO1INC5
: 1;
4670 unsigned NCO1INC6
: 1;
4671 unsigned NCO1INC7
: 1;
4674 extern __at(0x049B) volatile __NCO1INCLbits_t NCO1INCLbits
;
4676 #define _NCO1INC0 0x01
4677 #define _NCO1INC1 0x02
4678 #define _NCO1INC2 0x04
4679 #define _NCO1INC3 0x08
4680 #define _NCO1INC4 0x10
4681 #define _NCO1INC5 0x20
4682 #define _NCO1INC6 0x40
4683 #define _NCO1INC7 0x80
4685 //==============================================================================
4688 //==============================================================================
4691 extern __at(0x049C) __sfr NCO1INCH
;
4695 unsigned NCO1INC8
: 1;
4696 unsigned NCO1INC9
: 1;
4697 unsigned NCO1INC10
: 1;
4698 unsigned NCO1INC11
: 1;
4699 unsigned NCO1INC12
: 1;
4700 unsigned NCO1INC13
: 1;
4701 unsigned NCO1INC14
: 1;
4702 unsigned NCO1INC15
: 1;
4705 extern __at(0x049C) volatile __NCO1INCHbits_t NCO1INCHbits
;
4707 #define _NCO1INC8 0x01
4708 #define _NCO1INC9 0x02
4709 #define _NCO1INC10 0x04
4710 #define _NCO1INC11 0x08
4711 #define _NCO1INC12 0x10
4712 #define _NCO1INC13 0x20
4713 #define _NCO1INC14 0x40
4714 #define _NCO1INC15 0x80
4716 //==============================================================================
4719 //==============================================================================
4722 extern __at(0x049D) __sfr NCO1INCU
;
4726 unsigned NCO1INC16
: 1;
4727 unsigned NCO1INC17
: 1;
4728 unsigned NCO1INC18
: 1;
4729 unsigned NCO1INC19
: 1;
4736 extern __at(0x049D) volatile __NCO1INCUbits_t NCO1INCUbits
;
4738 #define _NCO1INC16 0x01
4739 #define _NCO1INC17 0x02
4740 #define _NCO1INC18 0x04
4741 #define _NCO1INC19 0x08
4743 //==============================================================================
4746 //==============================================================================
4749 extern __at(0x049E) __sfr NCO1CON
;
4763 extern __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits
;
4770 //==============================================================================
4773 //==============================================================================
4776 extern __at(0x049F) __sfr NCO1CLK
;
4782 unsigned N1CKS0
: 1;
4783 unsigned N1CKS1
: 1;
4787 unsigned N1PWS0
: 1;
4788 unsigned N1PWS1
: 1;
4789 unsigned N1PWS2
: 1;
4805 extern __at(0x049F) volatile __NCO1CLKbits_t NCO1CLKbits
;
4807 #define _N1CKS0 0x01
4808 #define _N1CKS1 0x02
4809 #define _N1PWS0 0x20
4810 #define _N1PWS1 0x40
4811 #define _N1PWS2 0x80
4813 //==============================================================================
4816 //==============================================================================
4819 extern __at(0x0511) __sfr OPA1CON
;
4825 unsigned OPA1PCH0
: 1;
4826 unsigned OPA1PCH1
: 1;
4829 unsigned OPA1UG
: 1;
4831 unsigned OPA1SP
: 1;
4832 unsigned OPA1EN
: 1;
4837 unsigned OPA1PCH
: 2;
4842 extern __at(0x0511) volatile __OPA1CONbits_t OPA1CONbits
;
4844 #define _OPA1PCH0 0x01
4845 #define _OPA1PCH1 0x02
4846 #define _OPA1UG 0x10
4847 #define _OPA1SP 0x40
4848 #define _OPA1EN 0x80
4850 //==============================================================================
4853 //==============================================================================
4856 extern __at(0x0515) __sfr OPA2CON
;
4862 unsigned OPA2PCH0
: 1;
4863 unsigned OPA2PCH1
: 1;
4866 unsigned OPA2UG
: 1;
4868 unsigned OPA2SP
: 1;
4869 unsigned OPA2EN
: 1;
4874 unsigned OPA2PCH
: 2;
4879 extern __at(0x0515) volatile __OPA2CONbits_t OPA2CONbits
;
4881 #define _OPA2PCH0 0x01
4882 #define _OPA2PCH1 0x02
4883 #define _OPA2UG 0x10
4884 #define _OPA2SP 0x40
4885 #define _OPA2EN 0x80
4887 //==============================================================================
4890 //==============================================================================
4893 extern __at(0x0617) __sfr PWM3DCL
;
4905 unsigned PWM3DCL0
: 1;
4906 unsigned PWM3DCL1
: 1;
4912 unsigned PWM3DCL
: 2;
4916 extern __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits
;
4918 #define _PWM3DCL0 0x40
4919 #define _PWM3DCL1 0x80
4921 //==============================================================================
4924 //==============================================================================
4927 extern __at(0x0618) __sfr PWM3DCH
;
4931 unsigned PWM3DCH0
: 1;
4932 unsigned PWM3DCH1
: 1;
4933 unsigned PWM3DCH2
: 1;
4934 unsigned PWM3DCH3
: 1;
4935 unsigned PWM3DCH4
: 1;
4936 unsigned PWM3DCH5
: 1;
4937 unsigned PWM3DCH6
: 1;
4938 unsigned PWM3DCH7
: 1;
4941 extern __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits
;
4943 #define _PWM3DCH0 0x01
4944 #define _PWM3DCH1 0x02
4945 #define _PWM3DCH2 0x04
4946 #define _PWM3DCH3 0x08
4947 #define _PWM3DCH4 0x10
4948 #define _PWM3DCH5 0x20
4949 #define _PWM3DCH6 0x40
4950 #define _PWM3DCH7 0x80
4952 //==============================================================================
4955 //==============================================================================
4958 extern __at(0x0619) __sfr PWM3CON
;
4966 unsigned PWM3POL
: 1;
4967 unsigned PWM3OUT
: 1;
4969 unsigned PWM3EN
: 1;
4972 extern __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits
;
4974 #define _PWM3POL 0x10
4975 #define _PWM3OUT 0x20
4976 #define _PWM3EN 0x80
4978 //==============================================================================
4981 //==============================================================================
4984 extern __at(0x0619) __sfr PWM3CON0
;
4992 unsigned PWM3POL
: 1;
4993 unsigned PWM3OUT
: 1;
4995 unsigned PWM3EN
: 1;
4998 extern __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits
;
5000 #define _PWM3CON0_PWM3POL 0x10
5001 #define _PWM3CON0_PWM3OUT 0x20
5002 #define _PWM3CON0_PWM3EN 0x80
5004 //==============================================================================
5007 //==============================================================================
5010 extern __at(0x061A) __sfr PWM4DCL
;
5022 unsigned PWM4DCL0
: 1;
5023 unsigned PWM4DCL1
: 1;
5029 unsigned PWM4DCL
: 2;
5033 extern __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits
;
5035 #define _PWM4DCL0 0x40
5036 #define _PWM4DCL1 0x80
5038 //==============================================================================
5041 //==============================================================================
5044 extern __at(0x061B) __sfr PWM4DCH
;
5048 unsigned PWM4DCH0
: 1;
5049 unsigned PWM4DCH1
: 1;
5050 unsigned PWM4DCH2
: 1;
5051 unsigned PWM4DCH3
: 1;
5052 unsigned PWM4DCH4
: 1;
5053 unsigned PWM4DCH5
: 1;
5054 unsigned PWM4DCH6
: 1;
5055 unsigned PWM4DCH7
: 1;
5058 extern __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits
;
5060 #define _PWM4DCH0 0x01
5061 #define _PWM4DCH1 0x02
5062 #define _PWM4DCH2 0x04
5063 #define _PWM4DCH3 0x08
5064 #define _PWM4DCH4 0x10
5065 #define _PWM4DCH5 0x20
5066 #define _PWM4DCH6 0x40
5067 #define _PWM4DCH7 0x80
5069 //==============================================================================
5072 //==============================================================================
5075 extern __at(0x061C) __sfr PWM4CON
;
5083 unsigned PWM4POL
: 1;
5084 unsigned PWM4OUT
: 1;
5086 unsigned PWM4EN
: 1;
5089 extern __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits
;
5091 #define _PWM4POL 0x10
5092 #define _PWM4OUT 0x20
5093 #define _PWM4EN 0x80
5095 //==============================================================================
5098 //==============================================================================
5101 extern __at(0x061C) __sfr PWM4CON0
;
5109 unsigned PWM4POL
: 1;
5110 unsigned PWM4OUT
: 1;
5112 unsigned PWM4EN
: 1;
5115 extern __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits
;
5117 #define _PWM4CON0_PWM4POL 0x10
5118 #define _PWM4CON0_PWM4OUT 0x20
5119 #define _PWM4CON0_PWM4EN 0x80
5121 //==============================================================================
5124 //==============================================================================
5127 extern __at(0x0691) __sfr COG1PHR
;
5133 unsigned G1PHR0
: 1;
5134 unsigned G1PHR1
: 1;
5135 unsigned G1PHR2
: 1;
5136 unsigned G1PHR3
: 1;
5137 unsigned G1PHR4
: 1;
5138 unsigned G1PHR5
: 1;
5150 extern __at(0x0691) volatile __COG1PHRbits_t COG1PHRbits
;
5152 #define _G1PHR0 0x01
5153 #define _G1PHR1 0x02
5154 #define _G1PHR2 0x04
5155 #define _G1PHR3 0x08
5156 #define _G1PHR4 0x10
5157 #define _G1PHR5 0x20
5159 //==============================================================================
5162 //==============================================================================
5165 extern __at(0x0692) __sfr COG1PHF
;
5171 unsigned G1PHF0
: 1;
5172 unsigned G1PHF1
: 1;
5173 unsigned G1PHF2
: 1;
5174 unsigned G1PHF3
: 1;
5175 unsigned G1PHF4
: 1;
5176 unsigned G1PHF5
: 1;
5188 extern __at(0x0692) volatile __COG1PHFbits_t COG1PHFbits
;
5190 #define _G1PHF0 0x01
5191 #define _G1PHF1 0x02
5192 #define _G1PHF2 0x04
5193 #define _G1PHF3 0x08
5194 #define _G1PHF4 0x10
5195 #define _G1PHF5 0x20
5197 //==============================================================================
5200 //==============================================================================
5203 extern __at(0x0693) __sfr COG1BLKR
;
5209 unsigned G1BLKR0
: 1;
5210 unsigned G1BLKR1
: 1;
5211 unsigned G1BLKR2
: 1;
5212 unsigned G1BLKR3
: 1;
5213 unsigned G1BLKR4
: 1;
5214 unsigned G1BLKR5
: 1;
5221 unsigned G1BLKR
: 6;
5226 extern __at(0x0693) volatile __COG1BLKRbits_t COG1BLKRbits
;
5228 #define _G1BLKR0 0x01
5229 #define _G1BLKR1 0x02
5230 #define _G1BLKR2 0x04
5231 #define _G1BLKR3 0x08
5232 #define _G1BLKR4 0x10
5233 #define _G1BLKR5 0x20
5235 //==============================================================================
5238 //==============================================================================
5241 extern __at(0x0694) __sfr COG1BLKF
;
5247 unsigned G1BLKF0
: 1;
5248 unsigned G1BLKF1
: 1;
5249 unsigned G1BLKF2
: 1;
5250 unsigned G1BLKF3
: 1;
5251 unsigned G1BLKF4
: 1;
5252 unsigned G1BLKF5
: 1;
5259 unsigned G1BLKF
: 6;
5264 extern __at(0x0694) volatile __COG1BLKFbits_t COG1BLKFbits
;
5266 #define _G1BLKF0 0x01
5267 #define _G1BLKF1 0x02
5268 #define _G1BLKF2 0x04
5269 #define _G1BLKF3 0x08
5270 #define _G1BLKF4 0x10
5271 #define _G1BLKF5 0x20
5273 //==============================================================================
5276 //==============================================================================
5279 extern __at(0x0695) __sfr COG1DBR
;
5285 unsigned G1DBR0
: 1;
5286 unsigned G1DBR1
: 1;
5287 unsigned G1DBR2
: 1;
5288 unsigned G1DBR3
: 1;
5289 unsigned G1DBR4
: 1;
5290 unsigned G1DBR5
: 1;
5302 extern __at(0x0695) volatile __COG1DBRbits_t COG1DBRbits
;
5304 #define _G1DBR0 0x01
5305 #define _G1DBR1 0x02
5306 #define _G1DBR2 0x04
5307 #define _G1DBR3 0x08
5308 #define _G1DBR4 0x10
5309 #define _G1DBR5 0x20
5311 //==============================================================================
5314 //==============================================================================
5317 extern __at(0x0696) __sfr COG1DBF
;
5323 unsigned G1DBF0
: 1;
5324 unsigned G1DBF1
: 1;
5325 unsigned G1DBF2
: 1;
5326 unsigned G1DBF3
: 1;
5327 unsigned G1DBF4
: 1;
5328 unsigned G1DBF5
: 1;
5340 extern __at(0x0696) volatile __COG1DBFbits_t COG1DBFbits
;
5342 #define _G1DBF0 0x01
5343 #define _G1DBF1 0x02
5344 #define _G1DBF2 0x04
5345 #define _G1DBF3 0x08
5346 #define _G1DBF4 0x10
5347 #define _G1DBF5 0x20
5349 //==============================================================================
5352 //==============================================================================
5355 extern __at(0x0697) __sfr COG1CON0
;
5385 extern __at(0x0697) volatile __COG1CON0bits_t COG1CON0bits
;
5395 //==============================================================================
5398 //==============================================================================
5401 extern __at(0x0698) __sfr COG1CON1
;
5405 unsigned G1POLA
: 1;
5406 unsigned G1POLB
: 1;
5407 unsigned G1POLC
: 1;
5408 unsigned G1POLD
: 1;
5411 unsigned G1FDBS
: 1;
5412 unsigned G1RDBS
: 1;
5415 extern __at(0x0698) volatile __COG1CON1bits_t COG1CON1bits
;
5417 #define _G1POLA 0x01
5418 #define _G1POLB 0x02
5419 #define _G1POLC 0x04
5420 #define _G1POLD 0x08
5421 #define _G1FDBS 0x40
5422 #define _G1RDBS 0x80
5424 //==============================================================================
5427 //==============================================================================
5430 extern __at(0x0699) __sfr COG1RIS
;
5434 unsigned G1RIS0
: 1;
5435 unsigned G1RIS1
: 1;
5436 unsigned G1RIS2
: 1;
5437 unsigned G1RIS3
: 1;
5438 unsigned G1RIS4
: 1;
5439 unsigned G1RIS5
: 1;
5440 unsigned G1RIS6
: 1;
5441 unsigned G1RIS7
: 1;
5444 extern __at(0x0699) volatile __COG1RISbits_t COG1RISbits
;
5446 #define _G1RIS0 0x01
5447 #define _G1RIS1 0x02
5448 #define _G1RIS2 0x04
5449 #define _G1RIS3 0x08
5450 #define _G1RIS4 0x10
5451 #define _G1RIS5 0x20
5452 #define _G1RIS6 0x40
5453 #define _G1RIS7 0x80
5455 //==============================================================================
5458 //==============================================================================
5461 extern __at(0x069A) __sfr COG1RSIM
;
5465 unsigned G1RSIM0
: 1;
5466 unsigned G1RSIM1
: 1;
5467 unsigned G1RSIM2
: 1;
5468 unsigned G1RSIM3
: 1;
5469 unsigned G1RSIM4
: 1;
5470 unsigned G1RSIM5
: 1;
5471 unsigned G1RSIM6
: 1;
5472 unsigned G1RSIM7
: 1;
5475 extern __at(0x069A) volatile __COG1RSIMbits_t COG1RSIMbits
;
5477 #define _G1RSIM0 0x01
5478 #define _G1RSIM1 0x02
5479 #define _G1RSIM2 0x04
5480 #define _G1RSIM3 0x08
5481 #define _G1RSIM4 0x10
5482 #define _G1RSIM5 0x20
5483 #define _G1RSIM6 0x40
5484 #define _G1RSIM7 0x80
5486 //==============================================================================
5489 //==============================================================================
5492 extern __at(0x069B) __sfr COG1FIS
;
5496 unsigned G1FIS0
: 1;
5497 unsigned G1FIS1
: 1;
5498 unsigned G1FIS2
: 1;
5499 unsigned G1FIS3
: 1;
5500 unsigned G1FIS4
: 1;
5501 unsigned G1FIS5
: 1;
5502 unsigned G1FIS6
: 1;
5503 unsigned G1FIS7
: 1;
5506 extern __at(0x069B) volatile __COG1FISbits_t COG1FISbits
;
5508 #define _G1FIS0 0x01
5509 #define _G1FIS1 0x02
5510 #define _G1FIS2 0x04
5511 #define _G1FIS3 0x08
5512 #define _G1FIS4 0x10
5513 #define _G1FIS5 0x20
5514 #define _G1FIS6 0x40
5515 #define _G1FIS7 0x80
5517 //==============================================================================
5520 //==============================================================================
5523 extern __at(0x069C) __sfr COG1FSIM
;
5527 unsigned G1FSIM0
: 1;
5528 unsigned G1FSIM1
: 1;
5529 unsigned G1FSIM2
: 1;
5530 unsigned G1FSIM3
: 1;
5531 unsigned G1FSIM4
: 1;
5532 unsigned G1FSIM5
: 1;
5533 unsigned G1FSIM6
: 1;
5534 unsigned G1FSIM7
: 1;
5537 extern __at(0x069C) volatile __COG1FSIMbits_t COG1FSIMbits
;
5539 #define _G1FSIM0 0x01
5540 #define _G1FSIM1 0x02
5541 #define _G1FSIM2 0x04
5542 #define _G1FSIM3 0x08
5543 #define _G1FSIM4 0x10
5544 #define _G1FSIM5 0x20
5545 #define _G1FSIM6 0x40
5546 #define _G1FSIM7 0x80
5548 //==============================================================================
5551 //==============================================================================
5554 extern __at(0x069D) __sfr COG1ASD0
;
5562 unsigned G1ASDAC0
: 1;
5563 unsigned G1ASDAC1
: 1;
5564 unsigned G1ASDBD0
: 1;
5565 unsigned G1ASDBD1
: 1;
5566 unsigned G1ARSEN
: 1;
5573 unsigned G1ASDAC
: 2;
5580 unsigned G1ASDBD
: 2;
5585 extern __at(0x069D) volatile __COG1ASD0bits_t COG1ASD0bits
;
5587 #define _G1ASDAC0 0x04
5588 #define _G1ASDAC1 0x08
5589 #define _G1ASDBD0 0x10
5590 #define _G1ASDBD1 0x20
5591 #define _G1ARSEN 0x40
5594 //==============================================================================
5597 //==============================================================================
5600 extern __at(0x069E) __sfr COG1ASD1
;
5604 unsigned G1AS0E
: 1;
5605 unsigned G1AS1E
: 1;
5606 unsigned G1AS2E
: 1;
5607 unsigned G1AS3E
: 1;
5614 extern __at(0x069E) volatile __COG1ASD1bits_t COG1ASD1bits
;
5616 #define _G1AS0E 0x01
5617 #define _G1AS1E 0x02
5618 #define _G1AS2E 0x04
5619 #define _G1AS3E 0x08
5621 //==============================================================================
5624 //==============================================================================
5627 extern __at(0x069F) __sfr COG1STR
;
5631 unsigned G1STRA
: 1;
5632 unsigned G1STRB
: 1;
5633 unsigned G1STRC
: 1;
5634 unsigned G1STRD
: 1;
5635 unsigned G1SDATA
: 1;
5636 unsigned G1SDATB
: 1;
5637 unsigned G1SDATC
: 1;
5638 unsigned G1SDATD
: 1;
5641 extern __at(0x069F) volatile __COG1STRbits_t COG1STRbits
;
5643 #define _G1STRA 0x01
5644 #define _G1STRB 0x02
5645 #define _G1STRC 0x04
5646 #define _G1STRD 0x08
5647 #define _G1SDATA 0x10
5648 #define _G1SDATB 0x20
5649 #define _G1SDATC 0x40
5650 #define _G1SDATD 0x80
5652 //==============================================================================
5655 //==============================================================================
5658 extern __at(0x0E0F) __sfr PPSLOCK
;
5662 unsigned PPSLOCKED
: 1;
5672 extern __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits
;
5674 #define _PPSLOCKED 0x01
5676 //==============================================================================
5678 extern __at(0x0E10) __sfr INTPPS
;
5679 extern __at(0x0E11) __sfr T0CKIPPS
;
5680 extern __at(0x0E12) __sfr T1CKIPPS
;
5681 extern __at(0x0E13) __sfr T1GPPS
;
5682 extern __at(0x0E14) __sfr CCP1PPS
;
5683 extern __at(0x0E15) __sfr CCP2PPS
;
5684 extern __at(0x0E17) __sfr COGINPPS
;
5685 extern __at(0x0E20) __sfr SSPCLKPPS
;
5686 extern __at(0x0E21) __sfr SSPDATPPS
;
5687 extern __at(0x0E22) __sfr SSPSSPPS
;
5688 extern __at(0x0E24) __sfr RXPPS
;
5689 extern __at(0x0E25) __sfr CKPPS
;
5690 extern __at(0x0E28) __sfr CLCIN0PPS
;
5691 extern __at(0x0E29) __sfr CLCIN1PPS
;
5692 extern __at(0x0E2A) __sfr CLCIN2PPS
;
5693 extern __at(0x0E2B) __sfr CLCIN3PPS
;
5694 extern __at(0x0E90) __sfr RA0PPS
;
5695 extern __at(0x0E91) __sfr RA1PPS
;
5696 extern __at(0x0E92) __sfr RA2PPS
;
5697 extern __at(0x0E93) __sfr RA3PPS
;
5698 extern __at(0x0E94) __sfr RA4PPS
;
5699 extern __at(0x0E95) __sfr RA5PPS
;
5700 extern __at(0x0E96) __sfr RA6PPS
;
5701 extern __at(0x0E97) __sfr RA7PPS
;
5702 extern __at(0x0E98) __sfr RB0PPS
;
5703 extern __at(0x0E99) __sfr RB1PPS
;
5704 extern __at(0x0E9A) __sfr RB2PPS
;
5705 extern __at(0x0E9B) __sfr RB3PPS
;
5706 extern __at(0x0E9C) __sfr RB4PPS
;
5707 extern __at(0x0E9D) __sfr RB5PPS
;
5708 extern __at(0x0E9E) __sfr RB6PPS
;
5709 extern __at(0x0E9F) __sfr RB7PPS
;
5710 extern __at(0x0EA0) __sfr RC0PPS
;
5711 extern __at(0x0EA1) __sfr RC1PPS
;
5712 extern __at(0x0EA2) __sfr RC2PPS
;
5713 extern __at(0x0EA3) __sfr RC3PPS
;
5714 extern __at(0x0EA4) __sfr RC4PPS
;
5715 extern __at(0x0EA5) __sfr RC5PPS
;
5716 extern __at(0x0EA6) __sfr RC6PPS
;
5717 extern __at(0x0EA7) __sfr RC7PPS
;
5719 //==============================================================================
5722 extern __at(0x0F0F) __sfr CLCDATA
;
5728 unsigned MLC1OUT
: 1;
5729 unsigned MLC2OUT
: 1;
5730 unsigned MLC3OUT
: 1;
5731 unsigned MLC4OUT
: 1;
5740 unsigned MCLC1OUT
: 1;
5741 unsigned MCLC2OUT
: 1;
5742 unsigned MCLC3OUT
: 1;
5743 unsigned MCLC4OUT
: 1;
5751 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits
;
5753 #define _MLC1OUT 0x01
5754 #define _MCLC1OUT 0x01
5755 #define _MLC2OUT 0x02
5756 #define _MCLC2OUT 0x02
5757 #define _MLC3OUT 0x04
5758 #define _MCLC3OUT 0x04
5759 #define _MLC4OUT 0x08
5760 #define _MCLC4OUT 0x08
5762 //==============================================================================
5765 //==============================================================================
5768 extern __at(0x0F10) __sfr CLC1CON
;
5774 unsigned LC1MODE0
: 1;
5775 unsigned LC1MODE1
: 1;
5776 unsigned LC1MODE2
: 1;
5777 unsigned LC1INTN
: 1;
5778 unsigned LC1INTP
: 1;
5779 unsigned LC1OUT
: 1;
5804 unsigned LC1MODE
: 3;
5809 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits
;
5811 #define _LC1MODE0 0x01
5813 #define _LC1MODE1 0x02
5815 #define _LC1MODE2 0x04
5817 #define _LC1INTN 0x08
5819 #define _LC1INTP 0x10
5821 #define _LC1OUT 0x20
5826 //==============================================================================
5829 //==============================================================================
5832 extern __at(0x0F11) __sfr CLC1POL
;
5838 unsigned LC1G1POL
: 1;
5839 unsigned LC1G2POL
: 1;
5840 unsigned LC1G3POL
: 1;
5841 unsigned LC1G4POL
: 1;
5845 unsigned LC1POL
: 1;
5861 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits
;
5863 #define _LC1G1POL 0x01
5865 #define _LC1G2POL 0x02
5867 #define _LC1G3POL 0x04
5869 #define _LC1G4POL 0x08
5871 #define _LC1POL 0x80
5874 //==============================================================================
5877 //==============================================================================
5880 extern __at(0x0F12) __sfr CLC1SEL0
;
5886 unsigned LC1D1S0
: 1;
5887 unsigned LC1D1S1
: 1;
5888 unsigned LC1D1S2
: 1;
5889 unsigned LC1D1S3
: 1;
5890 unsigned LC1D1S4
: 1;
5910 unsigned LC1D1S
: 5;
5921 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits
;
5923 #define _LC1D1S0 0x01
5925 #define _LC1D1S1 0x02
5927 #define _LC1D1S2 0x04
5929 #define _LC1D1S3 0x08
5931 #define _LC1D1S4 0x10
5934 //==============================================================================
5937 //==============================================================================
5940 extern __at(0x0F13) __sfr CLC1SEL1
;
5946 unsigned LC1D2S0
: 1;
5947 unsigned LC1D2S1
: 1;
5948 unsigned LC1D2S2
: 1;
5949 unsigned LC1D2S3
: 1;
5950 unsigned LC1D2S4
: 1;
5976 unsigned LC1D2S
: 5;
5981 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits
;
5983 #define _LC1D2S0 0x01
5985 #define _LC1D2S1 0x02
5987 #define _LC1D2S2 0x04
5989 #define _LC1D2S3 0x08
5991 #define _LC1D2S4 0x10
5994 //==============================================================================
5997 //==============================================================================
6000 extern __at(0x0F14) __sfr CLC1SEL2
;
6006 unsigned LC1D3S0
: 1;
6007 unsigned LC1D3S1
: 1;
6008 unsigned LC1D3S2
: 1;
6009 unsigned LC1D3S3
: 1;
6010 unsigned LC1D3S4
: 1;
6030 unsigned LC1D3S
: 5;
6041 extern __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits
;
6043 #define _LC1D3S0 0x01
6045 #define _LC1D3S1 0x02
6047 #define _LC1D3S2 0x04
6049 #define _LC1D3S3 0x08
6051 #define _LC1D3S4 0x10
6054 //==============================================================================
6057 //==============================================================================
6060 extern __at(0x0F15) __sfr CLC1SEL3
;
6066 unsigned LC1D4S0
: 1;
6067 unsigned LC1D4S1
: 1;
6068 unsigned LC1D4S2
: 1;
6069 unsigned LC1D4S3
: 1;
6070 unsigned LC1D4S4
: 1;
6090 unsigned LC1D4S
: 5;
6101 extern __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits
;
6103 #define _LC1D4S0 0x01
6105 #define _LC1D4S1 0x02
6107 #define _LC1D4S2 0x04
6109 #define _LC1D4S3 0x08
6111 #define _LC1D4S4 0x10
6114 //==============================================================================
6117 //==============================================================================
6120 extern __at(0x0F16) __sfr CLC1GLS0
;
6126 unsigned LC1G1D1N
: 1;
6127 unsigned LC1G1D1T
: 1;
6128 unsigned LC1G1D2N
: 1;
6129 unsigned LC1G1D2T
: 1;
6130 unsigned LC1G1D3N
: 1;
6131 unsigned LC1G1D3T
: 1;
6132 unsigned LC1G1D4N
: 1;
6133 unsigned LC1G1D4T
: 1;
6149 extern __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits
;
6151 #define _LC1G1D1N 0x01
6153 #define _LC1G1D1T 0x02
6155 #define _LC1G1D2N 0x04
6157 #define _LC1G1D2T 0x08
6159 #define _LC1G1D3N 0x10
6161 #define _LC1G1D3T 0x20
6163 #define _LC1G1D4N 0x40
6165 #define _LC1G1D4T 0x80
6168 //==============================================================================
6171 //==============================================================================
6174 extern __at(0x0F17) __sfr CLC1GLS1
;
6180 unsigned LC1G2D1N
: 1;
6181 unsigned LC1G2D1T
: 1;
6182 unsigned LC1G2D2N
: 1;
6183 unsigned LC1G2D2T
: 1;
6184 unsigned LC1G2D3N
: 1;
6185 unsigned LC1G2D3T
: 1;
6186 unsigned LC1G2D4N
: 1;
6187 unsigned LC1G2D4T
: 1;
6203 extern __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits
;
6205 #define _CLC1GLS1_LC1G2D1N 0x01
6206 #define _CLC1GLS1_D1N 0x01
6207 #define _CLC1GLS1_LC1G2D1T 0x02
6208 #define _CLC1GLS1_D1T 0x02
6209 #define _CLC1GLS1_LC1G2D2N 0x04
6210 #define _CLC1GLS1_D2N 0x04
6211 #define _CLC1GLS1_LC1G2D2T 0x08
6212 #define _CLC1GLS1_D2T 0x08
6213 #define _CLC1GLS1_LC1G2D3N 0x10
6214 #define _CLC1GLS1_D3N 0x10
6215 #define _CLC1GLS1_LC1G2D3T 0x20
6216 #define _CLC1GLS1_D3T 0x20
6217 #define _CLC1GLS1_LC1G2D4N 0x40
6218 #define _CLC1GLS1_D4N 0x40
6219 #define _CLC1GLS1_LC1G2D4T 0x80
6220 #define _CLC1GLS1_D4T 0x80
6222 //==============================================================================
6225 //==============================================================================
6228 extern __at(0x0F18) __sfr CLC1GLS2
;
6234 unsigned LC1G3D1N
: 1;
6235 unsigned LC1G3D1T
: 1;
6236 unsigned LC1G3D2N
: 1;
6237 unsigned LC1G3D2T
: 1;
6238 unsigned LC1G3D3N
: 1;
6239 unsigned LC1G3D3T
: 1;
6240 unsigned LC1G3D4N
: 1;
6241 unsigned LC1G3D4T
: 1;
6257 extern __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits
;
6259 #define _CLC1GLS2_LC1G3D1N 0x01
6260 #define _CLC1GLS2_D1N 0x01
6261 #define _CLC1GLS2_LC1G3D1T 0x02
6262 #define _CLC1GLS2_D1T 0x02
6263 #define _CLC1GLS2_LC1G3D2N 0x04
6264 #define _CLC1GLS2_D2N 0x04
6265 #define _CLC1GLS2_LC1G3D2T 0x08
6266 #define _CLC1GLS2_D2T 0x08
6267 #define _CLC1GLS2_LC1G3D3N 0x10
6268 #define _CLC1GLS2_D3N 0x10
6269 #define _CLC1GLS2_LC1G3D3T 0x20
6270 #define _CLC1GLS2_D3T 0x20
6271 #define _CLC1GLS2_LC1G3D4N 0x40
6272 #define _CLC1GLS2_D4N 0x40
6273 #define _CLC1GLS2_LC1G3D4T 0x80
6274 #define _CLC1GLS2_D4T 0x80
6276 //==============================================================================
6279 //==============================================================================
6282 extern __at(0x0F19) __sfr CLC1GLS3
;
6288 unsigned LC1G4D1N
: 1;
6289 unsigned LC1G4D1T
: 1;
6290 unsigned LC1G4D2N
: 1;
6291 unsigned LC1G4D2T
: 1;
6292 unsigned LC1G4D3N
: 1;
6293 unsigned LC1G4D3T
: 1;
6294 unsigned LC1G4D4N
: 1;
6295 unsigned LC1G4D4T
: 1;
6311 extern __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits
;
6313 #define _LC1G4D1N 0x01
6315 #define _LC1G4D1T 0x02
6317 #define _LC1G4D2N 0x04
6319 #define _LC1G4D2T 0x08
6321 #define _LC1G4D3N 0x10
6323 #define _LC1G4D3T 0x20
6325 #define _LC1G4D4N 0x40
6327 #define _LC1G4D4T 0x80
6330 //==============================================================================
6333 //==============================================================================
6336 extern __at(0x0F1A) __sfr CLC2CON
;
6342 unsigned LC2MODE0
: 1;
6343 unsigned LC2MODE1
: 1;
6344 unsigned LC2MODE2
: 1;
6345 unsigned LC2INTN
: 1;
6346 unsigned LC2INTP
: 1;
6347 unsigned LC2OUT
: 1;
6366 unsigned LC2MODE
: 3;
6377 extern __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits
;
6379 #define _CLC2CON_LC2MODE0 0x01
6380 #define _CLC2CON_MODE0 0x01
6381 #define _CLC2CON_LC2MODE1 0x02
6382 #define _CLC2CON_MODE1 0x02
6383 #define _CLC2CON_LC2MODE2 0x04
6384 #define _CLC2CON_MODE2 0x04
6385 #define _CLC2CON_LC2INTN 0x08
6386 #define _CLC2CON_INTN 0x08
6387 #define _CLC2CON_LC2INTP 0x10
6388 #define _CLC2CON_INTP 0x10
6389 #define _CLC2CON_LC2OUT 0x20
6390 #define _CLC2CON_OUT 0x20
6391 #define _CLC2CON_LC2EN 0x80
6392 #define _CLC2CON_EN 0x80
6394 //==============================================================================
6397 //==============================================================================
6400 extern __at(0x0F1B) __sfr CLC2POL
;
6406 unsigned LC2G1POL
: 1;
6407 unsigned LC2G2POL
: 1;
6408 unsigned LC2G3POL
: 1;
6409 unsigned LC2G4POL
: 1;
6413 unsigned LC2POL
: 1;
6429 extern __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits
;
6431 #define _CLC2POL_LC2G1POL 0x01
6432 #define _CLC2POL_G1POL 0x01
6433 #define _CLC2POL_LC2G2POL 0x02
6434 #define _CLC2POL_G2POL 0x02
6435 #define _CLC2POL_LC2G3POL 0x04
6436 #define _CLC2POL_G3POL 0x04
6437 #define _CLC2POL_LC2G4POL 0x08
6438 #define _CLC2POL_G4POL 0x08
6439 #define _CLC2POL_LC2POL 0x80
6440 #define _CLC2POL_POL 0x80
6442 //==============================================================================
6445 //==============================================================================
6448 extern __at(0x0F1C) __sfr CLC2SEL0
;
6454 unsigned LC2D1S0
: 1;
6455 unsigned LC2D1S1
: 1;
6456 unsigned LC2D1S2
: 1;
6457 unsigned LC2D1S3
: 1;
6458 unsigned LC2D1S4
: 1;
6484 unsigned LC2D1S
: 5;
6489 extern __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits
;
6491 #define _CLC2SEL0_LC2D1S0 0x01
6492 #define _CLC2SEL0_D1S0 0x01
6493 #define _CLC2SEL0_LC2D1S1 0x02
6494 #define _CLC2SEL0_D1S1 0x02
6495 #define _CLC2SEL0_LC2D1S2 0x04
6496 #define _CLC2SEL0_D1S2 0x04
6497 #define _CLC2SEL0_LC2D1S3 0x08
6498 #define _CLC2SEL0_D1S3 0x08
6499 #define _CLC2SEL0_LC2D1S4 0x10
6500 #define _CLC2SEL0_D1S4 0x10
6502 //==============================================================================
6505 //==============================================================================
6508 extern __at(0x0F1D) __sfr CLC2SEL1
;
6514 unsigned LC2D2S0
: 1;
6515 unsigned LC2D2S1
: 1;
6516 unsigned LC2D2S2
: 1;
6517 unsigned LC2D2S3
: 1;
6518 unsigned LC2D2S4
: 1;
6538 unsigned LC2D2S
: 5;
6549 extern __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits
;
6551 #define _CLC2SEL1_LC2D2S0 0x01
6552 #define _CLC2SEL1_D2S0 0x01
6553 #define _CLC2SEL1_LC2D2S1 0x02
6554 #define _CLC2SEL1_D2S1 0x02
6555 #define _CLC2SEL1_LC2D2S2 0x04
6556 #define _CLC2SEL1_D2S2 0x04
6557 #define _CLC2SEL1_LC2D2S3 0x08
6558 #define _CLC2SEL1_D2S3 0x08
6559 #define _CLC2SEL1_LC2D2S4 0x10
6560 #define _CLC2SEL1_D2S4 0x10
6562 //==============================================================================
6565 //==============================================================================
6568 extern __at(0x0F1E) __sfr CLC2SEL2
;
6574 unsigned LC2D3S0
: 1;
6575 unsigned LC2D3S1
: 1;
6576 unsigned LC2D3S2
: 1;
6577 unsigned LC2D3S3
: 1;
6578 unsigned LC2D3S4
: 1;
6598 unsigned LC2D3S
: 5;
6609 extern __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits
;
6611 #define _CLC2SEL2_LC2D3S0 0x01
6612 #define _CLC2SEL2_D3S0 0x01
6613 #define _CLC2SEL2_LC2D3S1 0x02
6614 #define _CLC2SEL2_D3S1 0x02
6615 #define _CLC2SEL2_LC2D3S2 0x04
6616 #define _CLC2SEL2_D3S2 0x04
6617 #define _CLC2SEL2_LC2D3S3 0x08
6618 #define _CLC2SEL2_D3S3 0x08
6619 #define _CLC2SEL2_LC2D3S4 0x10
6620 #define _CLC2SEL2_D3S4 0x10
6622 //==============================================================================
6625 //==============================================================================
6628 extern __at(0x0F1F) __sfr CLC2SEL3
;
6634 unsigned LC2D4S0
: 1;
6635 unsigned LC2D4S1
: 1;
6636 unsigned LC2D4S2
: 1;
6637 unsigned LC2D4S3
: 1;
6638 unsigned LC2D4S4
: 1;
6658 unsigned LC2D4S
: 5;
6669 extern __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits
;
6671 #define _CLC2SEL3_LC2D4S0 0x01
6672 #define _CLC2SEL3_D4S0 0x01
6673 #define _CLC2SEL3_LC2D4S1 0x02
6674 #define _CLC2SEL3_D4S1 0x02
6675 #define _CLC2SEL3_LC2D4S2 0x04
6676 #define _CLC2SEL3_D4S2 0x04
6677 #define _CLC2SEL3_LC2D4S3 0x08
6678 #define _CLC2SEL3_D4S3 0x08
6679 #define _CLC2SEL3_LC2D4S4 0x10
6680 #define _CLC2SEL3_D4S4 0x10
6682 //==============================================================================
6685 //==============================================================================
6688 extern __at(0x0F20) __sfr CLC2GLS0
;
6694 unsigned LC2G1D1N
: 1;
6695 unsigned LC2G1D1T
: 1;
6696 unsigned LC2G1D2N
: 1;
6697 unsigned LC2G1D2T
: 1;
6698 unsigned LC2G1D3N
: 1;
6699 unsigned LC2G1D3T
: 1;
6700 unsigned LC2G1D4N
: 1;
6701 unsigned LC2G1D4T
: 1;
6717 extern __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits
;
6719 #define _CLC2GLS0_LC2G1D1N 0x01
6720 #define _CLC2GLS0_D1N 0x01
6721 #define _CLC2GLS0_LC2G1D1T 0x02
6722 #define _CLC2GLS0_D1T 0x02
6723 #define _CLC2GLS0_LC2G1D2N 0x04
6724 #define _CLC2GLS0_D2N 0x04
6725 #define _CLC2GLS0_LC2G1D2T 0x08
6726 #define _CLC2GLS0_D2T 0x08
6727 #define _CLC2GLS0_LC2G1D3N 0x10
6728 #define _CLC2GLS0_D3N 0x10
6729 #define _CLC2GLS0_LC2G1D3T 0x20
6730 #define _CLC2GLS0_D3T 0x20
6731 #define _CLC2GLS0_LC2G1D4N 0x40
6732 #define _CLC2GLS0_D4N 0x40
6733 #define _CLC2GLS0_LC2G1D4T 0x80
6734 #define _CLC2GLS0_D4T 0x80
6736 //==============================================================================
6739 //==============================================================================
6742 extern __at(0x0F21) __sfr CLC2GLS1
;
6748 unsigned LC2G2D1N
: 1;
6749 unsigned LC2G2D1T
: 1;
6750 unsigned LC2G2D2N
: 1;
6751 unsigned LC2G2D2T
: 1;
6752 unsigned LC2G2D3N
: 1;
6753 unsigned LC2G2D3T
: 1;
6754 unsigned LC2G2D4N
: 1;
6755 unsigned LC2G2D4T
: 1;
6771 extern __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits
;
6773 #define _CLC2GLS1_LC2G2D1N 0x01
6774 #define _CLC2GLS1_D1N 0x01
6775 #define _CLC2GLS1_LC2G2D1T 0x02
6776 #define _CLC2GLS1_D1T 0x02
6777 #define _CLC2GLS1_LC2G2D2N 0x04
6778 #define _CLC2GLS1_D2N 0x04
6779 #define _CLC2GLS1_LC2G2D2T 0x08
6780 #define _CLC2GLS1_D2T 0x08
6781 #define _CLC2GLS1_LC2G2D3N 0x10
6782 #define _CLC2GLS1_D3N 0x10
6783 #define _CLC2GLS1_LC2G2D3T 0x20
6784 #define _CLC2GLS1_D3T 0x20
6785 #define _CLC2GLS1_LC2G2D4N 0x40
6786 #define _CLC2GLS1_D4N 0x40
6787 #define _CLC2GLS1_LC2G2D4T 0x80
6788 #define _CLC2GLS1_D4T 0x80
6790 //==============================================================================
6793 //==============================================================================
6796 extern __at(0x0F22) __sfr CLC2GLS2
;
6802 unsigned LC2G3D1N
: 1;
6803 unsigned LC2G3D1T
: 1;
6804 unsigned LC2G3D2N
: 1;
6805 unsigned LC2G3D2T
: 1;
6806 unsigned LC2G3D3N
: 1;
6807 unsigned LC2G3D3T
: 1;
6808 unsigned LC2G3D4N
: 1;
6809 unsigned LC2G3D4T
: 1;
6825 extern __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits
;
6827 #define _CLC2GLS2_LC2G3D1N 0x01
6828 #define _CLC2GLS2_D1N 0x01
6829 #define _CLC2GLS2_LC2G3D1T 0x02
6830 #define _CLC2GLS2_D1T 0x02
6831 #define _CLC2GLS2_LC2G3D2N 0x04
6832 #define _CLC2GLS2_D2N 0x04
6833 #define _CLC2GLS2_LC2G3D2T 0x08
6834 #define _CLC2GLS2_D2T 0x08
6835 #define _CLC2GLS2_LC2G3D3N 0x10
6836 #define _CLC2GLS2_D3N 0x10
6837 #define _CLC2GLS2_LC2G3D3T 0x20
6838 #define _CLC2GLS2_D3T 0x20
6839 #define _CLC2GLS2_LC2G3D4N 0x40
6840 #define _CLC2GLS2_D4N 0x40
6841 #define _CLC2GLS2_LC2G3D4T 0x80
6842 #define _CLC2GLS2_D4T 0x80
6844 //==============================================================================
6847 //==============================================================================
6850 extern __at(0x0F23) __sfr CLC2GLS3
;
6856 unsigned LC2G4D1N
: 1;
6857 unsigned LC2G4D1T
: 1;
6858 unsigned LC2G4D2N
: 1;
6859 unsigned LC2G4D2T
: 1;
6860 unsigned LC2G4D3N
: 1;
6861 unsigned LC2G4D3T
: 1;
6862 unsigned LC2G4D4N
: 1;
6863 unsigned LC2G4D4T
: 1;
6879 extern __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits
;
6881 #define _CLC2GLS3_LC2G4D1N 0x01
6882 #define _CLC2GLS3_G4D1N 0x01
6883 #define _CLC2GLS3_LC2G4D1T 0x02
6884 #define _CLC2GLS3_G4D1T 0x02
6885 #define _CLC2GLS3_LC2G4D2N 0x04
6886 #define _CLC2GLS3_G4D2N 0x04
6887 #define _CLC2GLS3_LC2G4D2T 0x08
6888 #define _CLC2GLS3_G4D2T 0x08
6889 #define _CLC2GLS3_LC2G4D3N 0x10
6890 #define _CLC2GLS3_G4D3N 0x10
6891 #define _CLC2GLS3_LC2G4D3T 0x20
6892 #define _CLC2GLS3_G4D3T 0x20
6893 #define _CLC2GLS3_LC2G4D4N 0x40
6894 #define _CLC2GLS3_G4D4N 0x40
6895 #define _CLC2GLS3_LC2G4D4T 0x80
6896 #define _CLC2GLS3_G4D4T 0x80
6898 //==============================================================================
6901 //==============================================================================
6904 extern __at(0x0F24) __sfr CLC3CON
;
6910 unsigned LC3MODE0
: 1;
6911 unsigned LC3MODE1
: 1;
6912 unsigned LC3MODE2
: 1;
6913 unsigned LC3INTN
: 1;
6914 unsigned LC3INTP
: 1;
6915 unsigned LC3OUT
: 1;
6940 unsigned LC3MODE
: 3;
6945 extern __at(0x0F24) volatile __CLC3CONbits_t CLC3CONbits
;
6947 #define _CLC3CON_LC3MODE0 0x01
6948 #define _CLC3CON_MODE0 0x01
6949 #define _CLC3CON_LC3MODE1 0x02
6950 #define _CLC3CON_MODE1 0x02
6951 #define _CLC3CON_LC3MODE2 0x04
6952 #define _CLC3CON_MODE2 0x04
6953 #define _CLC3CON_LC3INTN 0x08
6954 #define _CLC3CON_INTN 0x08
6955 #define _CLC3CON_LC3INTP 0x10
6956 #define _CLC3CON_INTP 0x10
6957 #define _CLC3CON_LC3OUT 0x20
6958 #define _CLC3CON_OUT 0x20
6959 #define _CLC3CON_LC3EN 0x80
6960 #define _CLC3CON_EN 0x80
6962 //==============================================================================
6965 //==============================================================================
6968 extern __at(0x0F25) __sfr CLC3POL
;
6974 unsigned LC3G1POL
: 1;
6975 unsigned LC3G2POL
: 1;
6976 unsigned LC3G3POL
: 1;
6977 unsigned LC3G4POL
: 1;
6981 unsigned LC3POL
: 1;
6997 extern __at(0x0F25) volatile __CLC3POLbits_t CLC3POLbits
;
6999 #define _CLC3POL_LC3G1POL 0x01
7000 #define _CLC3POL_G1POL 0x01
7001 #define _CLC3POL_LC3G2POL 0x02
7002 #define _CLC3POL_G2POL 0x02
7003 #define _CLC3POL_LC3G3POL 0x04
7004 #define _CLC3POL_G3POL 0x04
7005 #define _CLC3POL_LC3G4POL 0x08
7006 #define _CLC3POL_G4POL 0x08
7007 #define _CLC3POL_LC3POL 0x80
7008 #define _CLC3POL_POL 0x80
7010 //==============================================================================
7013 //==============================================================================
7016 extern __at(0x0F26) __sfr CLC3SEL0
;
7022 unsigned LC3D1S0
: 1;
7023 unsigned LC3D1S1
: 1;
7024 unsigned LC3D1S2
: 1;
7025 unsigned LC3D1S3
: 1;
7026 unsigned LC3D1S4
: 1;
7052 unsigned LC3D1S
: 5;
7057 extern __at(0x0F26) volatile __CLC3SEL0bits_t CLC3SEL0bits
;
7059 #define _CLC3SEL0_LC3D1S0 0x01
7060 #define _CLC3SEL0_D1S0 0x01
7061 #define _CLC3SEL0_LC3D1S1 0x02
7062 #define _CLC3SEL0_D1S1 0x02
7063 #define _CLC3SEL0_LC3D1S2 0x04
7064 #define _CLC3SEL0_D1S2 0x04
7065 #define _CLC3SEL0_LC3D1S3 0x08
7066 #define _CLC3SEL0_D1S3 0x08
7067 #define _CLC3SEL0_LC3D1S4 0x10
7068 #define _CLC3SEL0_D1S4 0x10
7070 //==============================================================================
7073 //==============================================================================
7076 extern __at(0x0F27) __sfr CLC3SEL1
;
7082 unsigned LC3D2S0
: 1;
7083 unsigned LC3D2S1
: 1;
7084 unsigned LC3D2S2
: 1;
7085 unsigned LC3D2S3
: 1;
7086 unsigned LC3D2S4
: 1;
7112 unsigned LC3D2S
: 5;
7117 extern __at(0x0F27) volatile __CLC3SEL1bits_t CLC3SEL1bits
;
7119 #define _CLC3SEL1_LC3D2S0 0x01
7120 #define _CLC3SEL1_D2S0 0x01
7121 #define _CLC3SEL1_LC3D2S1 0x02
7122 #define _CLC3SEL1_D2S1 0x02
7123 #define _CLC3SEL1_LC3D2S2 0x04
7124 #define _CLC3SEL1_D2S2 0x04
7125 #define _CLC3SEL1_LC3D2S3 0x08
7126 #define _CLC3SEL1_D2S3 0x08
7127 #define _CLC3SEL1_LC3D2S4 0x10
7128 #define _CLC3SEL1_D2S4 0x10
7130 //==============================================================================
7133 //==============================================================================
7136 extern __at(0x0F28) __sfr CLC3SEL2
;
7142 unsigned LC3D3S0
: 1;
7143 unsigned LC3D3S1
: 1;
7144 unsigned LC3D3S2
: 1;
7145 unsigned LC3D3S3
: 1;
7146 unsigned LC3D3S4
: 1;
7166 unsigned LC3D3S
: 5;
7177 extern __at(0x0F28) volatile __CLC3SEL2bits_t CLC3SEL2bits
;
7179 #define _CLC3SEL2_LC3D3S0 0x01
7180 #define _CLC3SEL2_D3S0 0x01
7181 #define _CLC3SEL2_LC3D3S1 0x02
7182 #define _CLC3SEL2_D3S1 0x02
7183 #define _CLC3SEL2_LC3D3S2 0x04
7184 #define _CLC3SEL2_D3S2 0x04
7185 #define _CLC3SEL2_LC3D3S3 0x08
7186 #define _CLC3SEL2_D3S3 0x08
7187 #define _CLC3SEL2_LC3D3S4 0x10
7188 #define _CLC3SEL2_D3S4 0x10
7190 //==============================================================================
7193 //==============================================================================
7196 extern __at(0x0F29) __sfr CLC3SEL3
;
7202 unsigned LC3D4S0
: 1;
7203 unsigned LC3D4S1
: 1;
7204 unsigned LC3D4S2
: 1;
7205 unsigned LC3D4S3
: 1;
7206 unsigned LC3D4S4
: 1;
7226 unsigned LC3D4S
: 5;
7237 extern __at(0x0F29) volatile __CLC3SEL3bits_t CLC3SEL3bits
;
7239 #define _CLC3SEL3_LC3D4S0 0x01
7240 #define _CLC3SEL3_D4S0 0x01
7241 #define _CLC3SEL3_LC3D4S1 0x02
7242 #define _CLC3SEL3_D4S1 0x02
7243 #define _CLC3SEL3_LC3D4S2 0x04
7244 #define _CLC3SEL3_D4S2 0x04
7245 #define _CLC3SEL3_LC3D4S3 0x08
7246 #define _CLC3SEL3_D4S3 0x08
7247 #define _CLC3SEL3_LC3D4S4 0x10
7248 #define _CLC3SEL3_D4S4 0x10
7250 //==============================================================================
7253 //==============================================================================
7256 extern __at(0x0F2A) __sfr CLC3GLS0
;
7262 unsigned LC3G1D1N
: 1;
7263 unsigned LC3G1D1T
: 1;
7264 unsigned LC3G1D2N
: 1;
7265 unsigned LC3G1D2T
: 1;
7266 unsigned LC3G1D3N
: 1;
7267 unsigned LC3G1D3T
: 1;
7268 unsigned LC3G1D4N
: 1;
7269 unsigned LC3G1D4T
: 1;
7285 extern __at(0x0F2A) volatile __CLC3GLS0bits_t CLC3GLS0bits
;
7287 #define _CLC3GLS0_LC3G1D1N 0x01
7288 #define _CLC3GLS0_D1N 0x01
7289 #define _CLC3GLS0_LC3G1D1T 0x02
7290 #define _CLC3GLS0_D1T 0x02
7291 #define _CLC3GLS0_LC3G1D2N 0x04
7292 #define _CLC3GLS0_D2N 0x04
7293 #define _CLC3GLS0_LC3G1D2T 0x08
7294 #define _CLC3GLS0_D2T 0x08
7295 #define _CLC3GLS0_LC3G1D3N 0x10
7296 #define _CLC3GLS0_D3N 0x10
7297 #define _CLC3GLS0_LC3G1D3T 0x20
7298 #define _CLC3GLS0_D3T 0x20
7299 #define _CLC3GLS0_LC3G1D4N 0x40
7300 #define _CLC3GLS0_D4N 0x40
7301 #define _CLC3GLS0_LC3G1D4T 0x80
7302 #define _CLC3GLS0_D4T 0x80
7304 //==============================================================================
7307 //==============================================================================
7310 extern __at(0x0F2B) __sfr CLC3GLS1
;
7316 unsigned LC3G2D1N
: 1;
7317 unsigned LC3G2D1T
: 1;
7318 unsigned LC3G2D2N
: 1;
7319 unsigned LC3G2D2T
: 1;
7320 unsigned LC3G2D3N
: 1;
7321 unsigned LC3G2D3T
: 1;
7322 unsigned LC3G2D4N
: 1;
7323 unsigned LC3G2D4T
: 1;
7339 extern __at(0x0F2B) volatile __CLC3GLS1bits_t CLC3GLS1bits
;
7341 #define _CLC3GLS1_LC3G2D1N 0x01
7342 #define _CLC3GLS1_D1N 0x01
7343 #define _CLC3GLS1_LC3G2D1T 0x02
7344 #define _CLC3GLS1_D1T 0x02
7345 #define _CLC3GLS1_LC3G2D2N 0x04
7346 #define _CLC3GLS1_D2N 0x04
7347 #define _CLC3GLS1_LC3G2D2T 0x08
7348 #define _CLC3GLS1_D2T 0x08
7349 #define _CLC3GLS1_LC3G2D3N 0x10
7350 #define _CLC3GLS1_D3N 0x10
7351 #define _CLC3GLS1_LC3G2D3T 0x20
7352 #define _CLC3GLS1_D3T 0x20
7353 #define _CLC3GLS1_LC3G2D4N 0x40
7354 #define _CLC3GLS1_D4N 0x40
7355 #define _CLC3GLS1_LC3G2D4T 0x80
7356 #define _CLC3GLS1_D4T 0x80
7358 //==============================================================================
7361 //==============================================================================
7364 extern __at(0x0F2C) __sfr CLC3GLS2
;
7370 unsigned LC3G3D1N
: 1;
7371 unsigned LC3G3D1T
: 1;
7372 unsigned LC3G3D2N
: 1;
7373 unsigned LC3G3D2T
: 1;
7374 unsigned LC3G3D3N
: 1;
7375 unsigned LC3G3D3T
: 1;
7376 unsigned LC3G3D4N
: 1;
7377 unsigned LC3G3D4T
: 1;
7393 extern __at(0x0F2C) volatile __CLC3GLS2bits_t CLC3GLS2bits
;
7395 #define _CLC3GLS2_LC3G3D1N 0x01
7396 #define _CLC3GLS2_D1N 0x01
7397 #define _CLC3GLS2_LC3G3D1T 0x02
7398 #define _CLC3GLS2_D1T 0x02
7399 #define _CLC3GLS2_LC3G3D2N 0x04
7400 #define _CLC3GLS2_D2N 0x04
7401 #define _CLC3GLS2_LC3G3D2T 0x08
7402 #define _CLC3GLS2_D2T 0x08
7403 #define _CLC3GLS2_LC3G3D3N 0x10
7404 #define _CLC3GLS2_D3N 0x10
7405 #define _CLC3GLS2_LC3G3D3T 0x20
7406 #define _CLC3GLS2_D3T 0x20
7407 #define _CLC3GLS2_LC3G3D4N 0x40
7408 #define _CLC3GLS2_D4N 0x40
7409 #define _CLC3GLS2_LC3G3D4T 0x80
7410 #define _CLC3GLS2_D4T 0x80
7412 //==============================================================================
7415 //==============================================================================
7418 extern __at(0x0F2D) __sfr CLC3GLS3
;
7424 unsigned LC3G4D1N
: 1;
7425 unsigned LC3G4D1T
: 1;
7426 unsigned LC3G4D2N
: 1;
7427 unsigned LC3G4D2T
: 1;
7428 unsigned LC3G4D3N
: 1;
7429 unsigned LC3G4D3T
: 1;
7430 unsigned LC3G4D4N
: 1;
7431 unsigned LC3G4D4T
: 1;
7447 extern __at(0x0F2D) volatile __CLC3GLS3bits_t CLC3GLS3bits
;
7449 #define _CLC3GLS3_LC3G4D1N 0x01
7450 #define _CLC3GLS3_G4D1N 0x01
7451 #define _CLC3GLS3_LC3G4D1T 0x02
7452 #define _CLC3GLS3_G4D1T 0x02
7453 #define _CLC3GLS3_LC3G4D2N 0x04
7454 #define _CLC3GLS3_G4D2N 0x04
7455 #define _CLC3GLS3_LC3G4D2T 0x08
7456 #define _CLC3GLS3_G4D2T 0x08
7457 #define _CLC3GLS3_LC3G4D3N 0x10
7458 #define _CLC3GLS3_G4D3N 0x10
7459 #define _CLC3GLS3_LC3G4D3T 0x20
7460 #define _CLC3GLS3_G4D3T 0x20
7461 #define _CLC3GLS3_LC3G4D4N 0x40
7462 #define _CLC3GLS3_G4D4N 0x40
7463 #define _CLC3GLS3_LC3G4D4T 0x80
7464 #define _CLC3GLS3_G4D4T 0x80
7466 //==============================================================================
7469 //==============================================================================
7472 extern __at(0x0F2E) __sfr CLC4CON
;
7478 unsigned LC4MODE0
: 1;
7479 unsigned LC4MODE1
: 1;
7480 unsigned LC4MODE2
: 1;
7481 unsigned LC4INTN
: 1;
7482 unsigned LC4INTP
: 1;
7483 unsigned LC4OUT
: 1;
7502 unsigned LC4MODE
: 3;
7513 extern __at(0x0F2E) volatile __CLC4CONbits_t CLC4CONbits
;
7515 #define _CLC4CON_LC4MODE0 0x01
7516 #define _CLC4CON_MODE0 0x01
7517 #define _CLC4CON_LC4MODE1 0x02
7518 #define _CLC4CON_MODE1 0x02
7519 #define _CLC4CON_LC4MODE2 0x04
7520 #define _CLC4CON_MODE2 0x04
7521 #define _CLC4CON_LC4INTN 0x08
7522 #define _CLC4CON_INTN 0x08
7523 #define _CLC4CON_LC4INTP 0x10
7524 #define _CLC4CON_INTP 0x10
7525 #define _CLC4CON_LC4OUT 0x20
7526 #define _CLC4CON_OUT 0x20
7527 #define _CLC4CON_LC4EN 0x80
7528 #define _CLC4CON_EN 0x80
7530 //==============================================================================
7533 //==============================================================================
7536 extern __at(0x0F2F) __sfr CLC4POL
;
7542 unsigned LC4G1POL
: 1;
7543 unsigned LC4G2POL
: 1;
7544 unsigned LC4G3POL
: 1;
7545 unsigned LC4G4POL
: 1;
7549 unsigned LC4POL
: 1;
7565 extern __at(0x0F2F) volatile __CLC4POLbits_t CLC4POLbits
;
7567 #define _CLC4POL_LC4G1POL 0x01
7568 #define _CLC4POL_G1POL 0x01
7569 #define _CLC4POL_LC4G2POL 0x02
7570 #define _CLC4POL_G2POL 0x02
7571 #define _CLC4POL_LC4G3POL 0x04
7572 #define _CLC4POL_G3POL 0x04
7573 #define _CLC4POL_LC4G4POL 0x08
7574 #define _CLC4POL_G4POL 0x08
7575 #define _CLC4POL_LC4POL 0x80
7576 #define _CLC4POL_POL 0x80
7578 //==============================================================================
7581 //==============================================================================
7584 extern __at(0x0F30) __sfr CLC4SEL0
;
7590 unsigned LC4D1S0
: 1;
7591 unsigned LC4D1S1
: 1;
7592 unsigned LC4D1S2
: 1;
7593 unsigned LC4D1S3
: 1;
7594 unsigned LC4D1S4
: 1;
7620 unsigned LC4D1S
: 5;
7625 extern __at(0x0F30) volatile __CLC4SEL0bits_t CLC4SEL0bits
;
7627 #define _CLC4SEL0_LC4D1S0 0x01
7628 #define _CLC4SEL0_D1S0 0x01
7629 #define _CLC4SEL0_LC4D1S1 0x02
7630 #define _CLC4SEL0_D1S1 0x02
7631 #define _CLC4SEL0_LC4D1S2 0x04
7632 #define _CLC4SEL0_D1S2 0x04
7633 #define _CLC4SEL0_LC4D1S3 0x08
7634 #define _CLC4SEL0_D1S3 0x08
7635 #define _CLC4SEL0_LC4D1S4 0x10
7636 #define _CLC4SEL0_D1S4 0x10
7638 //==============================================================================
7641 //==============================================================================
7644 extern __at(0x0F31) __sfr CLC4SEL1
;
7650 unsigned LC4D2S0
: 1;
7651 unsigned LC4D2S1
: 1;
7652 unsigned LC4D2S2
: 1;
7653 unsigned LC4D2S3
: 1;
7654 unsigned LC4D2S4
: 1;
7674 unsigned LC4D2S
: 5;
7685 extern __at(0x0F31) volatile __CLC4SEL1bits_t CLC4SEL1bits
;
7687 #define _CLC4SEL1_LC4D2S0 0x01
7688 #define _CLC4SEL1_D2S0 0x01
7689 #define _CLC4SEL1_LC4D2S1 0x02
7690 #define _CLC4SEL1_D2S1 0x02
7691 #define _CLC4SEL1_LC4D2S2 0x04
7692 #define _CLC4SEL1_D2S2 0x04
7693 #define _CLC4SEL1_LC4D2S3 0x08
7694 #define _CLC4SEL1_D2S3 0x08
7695 #define _CLC4SEL1_LC4D2S4 0x10
7696 #define _CLC4SEL1_D2S4 0x10
7698 //==============================================================================
7701 //==============================================================================
7704 extern __at(0x0F32) __sfr CLC4SEL2
;
7710 unsigned LC4D3S0
: 1;
7711 unsigned LC4D3S1
: 1;
7712 unsigned LC4D3S2
: 1;
7713 unsigned LC4D3S3
: 1;
7714 unsigned LC4D3S4
: 1;
7734 unsigned LC4D3S
: 5;
7745 extern __at(0x0F32) volatile __CLC4SEL2bits_t CLC4SEL2bits
;
7747 #define _CLC4SEL2_LC4D3S0 0x01
7748 #define _CLC4SEL2_D3S0 0x01
7749 #define _CLC4SEL2_LC4D3S1 0x02
7750 #define _CLC4SEL2_D3S1 0x02
7751 #define _CLC4SEL2_LC4D3S2 0x04
7752 #define _CLC4SEL2_D3S2 0x04
7753 #define _CLC4SEL2_LC4D3S3 0x08
7754 #define _CLC4SEL2_D3S3 0x08
7755 #define _CLC4SEL2_LC4D3S4 0x10
7756 #define _CLC4SEL2_D3S4 0x10
7758 //==============================================================================
7761 //==============================================================================
7764 extern __at(0x0F33) __sfr CLC4SEL3
;
7770 unsigned LC4D4S0
: 1;
7771 unsigned LC4D4S1
: 1;
7772 unsigned LC4D4S2
: 1;
7773 unsigned LC4D4S3
: 1;
7774 unsigned LC4D4S4
: 1;
7794 unsigned LC4D4S
: 5;
7805 extern __at(0x0F33) volatile __CLC4SEL3bits_t CLC4SEL3bits
;
7807 #define _CLC4SEL3_LC4D4S0 0x01
7808 #define _CLC4SEL3_D4S0 0x01
7809 #define _CLC4SEL3_LC4D4S1 0x02
7810 #define _CLC4SEL3_D4S1 0x02
7811 #define _CLC4SEL3_LC4D4S2 0x04
7812 #define _CLC4SEL3_D4S2 0x04
7813 #define _CLC4SEL3_LC4D4S3 0x08
7814 #define _CLC4SEL3_D4S3 0x08
7815 #define _CLC4SEL3_LC4D4S4 0x10
7816 #define _CLC4SEL3_D4S4 0x10
7818 //==============================================================================
7821 //==============================================================================
7824 extern __at(0x0F34) __sfr CLC4GLS0
;
7830 unsigned LC4G1D1N
: 1;
7831 unsigned LC4G1D1T
: 1;
7832 unsigned LC4G1D2N
: 1;
7833 unsigned LC4G1D2T
: 1;
7834 unsigned LC4G1D3N
: 1;
7835 unsigned LC4G1D3T
: 1;
7836 unsigned LC4G1D4N
: 1;
7837 unsigned LC4G1D4T
: 1;
7853 extern __at(0x0F34) volatile __CLC4GLS0bits_t CLC4GLS0bits
;
7855 #define _CLC4GLS0_LC4G1D1N 0x01
7856 #define _CLC4GLS0_D1N 0x01
7857 #define _CLC4GLS0_LC4G1D1T 0x02
7858 #define _CLC4GLS0_D1T 0x02
7859 #define _CLC4GLS0_LC4G1D2N 0x04
7860 #define _CLC4GLS0_D2N 0x04
7861 #define _CLC4GLS0_LC4G1D2T 0x08
7862 #define _CLC4GLS0_D2T 0x08
7863 #define _CLC4GLS0_LC4G1D3N 0x10
7864 #define _CLC4GLS0_D3N 0x10
7865 #define _CLC4GLS0_LC4G1D3T 0x20
7866 #define _CLC4GLS0_D3T 0x20
7867 #define _CLC4GLS0_LC4G1D4N 0x40
7868 #define _CLC4GLS0_D4N 0x40
7869 #define _CLC4GLS0_LC4G1D4T 0x80
7870 #define _CLC4GLS0_D4T 0x80
7872 //==============================================================================
7875 //==============================================================================
7878 extern __at(0x0F35) __sfr CLC4GLS1
;
7884 unsigned LC4G2D1N
: 1;
7885 unsigned LC4G2D1T
: 1;
7886 unsigned LC4G2D2N
: 1;
7887 unsigned LC4G2D2T
: 1;
7888 unsigned LC4G2D3N
: 1;
7889 unsigned LC4G2D3T
: 1;
7890 unsigned LC4G2D4N
: 1;
7891 unsigned LC4G2D4T
: 1;
7907 extern __at(0x0F35) volatile __CLC4GLS1bits_t CLC4GLS1bits
;
7909 #define _CLC4GLS1_LC4G2D1N 0x01
7910 #define _CLC4GLS1_D1N 0x01
7911 #define _CLC4GLS1_LC4G2D1T 0x02
7912 #define _CLC4GLS1_D1T 0x02
7913 #define _CLC4GLS1_LC4G2D2N 0x04
7914 #define _CLC4GLS1_D2N 0x04
7915 #define _CLC4GLS1_LC4G2D2T 0x08
7916 #define _CLC4GLS1_D2T 0x08
7917 #define _CLC4GLS1_LC4G2D3N 0x10
7918 #define _CLC4GLS1_D3N 0x10
7919 #define _CLC4GLS1_LC4G2D3T 0x20
7920 #define _CLC4GLS1_D3T 0x20
7921 #define _CLC4GLS1_LC4G2D4N 0x40
7922 #define _CLC4GLS1_D4N 0x40
7923 #define _CLC4GLS1_LC4G2D4T 0x80
7924 #define _CLC4GLS1_D4T 0x80
7926 //==============================================================================
7929 //==============================================================================
7932 extern __at(0x0F36) __sfr CLC4GLS2
;
7938 unsigned LC4G3D1N
: 1;
7939 unsigned LC4G3D1T
: 1;
7940 unsigned LC4G3D2N
: 1;
7941 unsigned LC4G3D2T
: 1;
7942 unsigned LC4G3D3N
: 1;
7943 unsigned LC4G3D3T
: 1;
7944 unsigned LC4G3D4N
: 1;
7945 unsigned LC4G3D4T
: 1;
7961 extern __at(0x0F36) volatile __CLC4GLS2bits_t CLC4GLS2bits
;
7963 #define _CLC4GLS2_LC4G3D1N 0x01
7964 #define _CLC4GLS2_D1N 0x01
7965 #define _CLC4GLS2_LC4G3D1T 0x02
7966 #define _CLC4GLS2_D1T 0x02
7967 #define _CLC4GLS2_LC4G3D2N 0x04
7968 #define _CLC4GLS2_D2N 0x04
7969 #define _CLC4GLS2_LC4G3D2T 0x08
7970 #define _CLC4GLS2_D2T 0x08
7971 #define _CLC4GLS2_LC4G3D3N 0x10
7972 #define _CLC4GLS2_D3N 0x10
7973 #define _CLC4GLS2_LC4G3D3T 0x20
7974 #define _CLC4GLS2_D3T 0x20
7975 #define _CLC4GLS2_LC4G3D4N 0x40
7976 #define _CLC4GLS2_D4N 0x40
7977 #define _CLC4GLS2_LC4G3D4T 0x80
7978 #define _CLC4GLS2_D4T 0x80
7980 //==============================================================================
7983 //==============================================================================
7986 extern __at(0x0F37) __sfr CLC4GLS3
;
7992 unsigned LC4G4D1N
: 1;
7993 unsigned LC4G4D1T
: 1;
7994 unsigned LC4G4D2N
: 1;
7995 unsigned LC4G4D2T
: 1;
7996 unsigned LC4G4D3N
: 1;
7997 unsigned LC4G4D3T
: 1;
7998 unsigned LC4G4D4N
: 1;
7999 unsigned LC4G4D4T
: 1;
8015 extern __at(0x0F37) volatile __CLC4GLS3bits_t CLC4GLS3bits
;
8017 #define _CLC4GLS3_LC4G4D1N 0x01
8018 #define _CLC4GLS3_G4D1N 0x01
8019 #define _CLC4GLS3_LC4G4D1T 0x02
8020 #define _CLC4GLS3_G4D1T 0x02
8021 #define _CLC4GLS3_LC4G4D2N 0x04
8022 #define _CLC4GLS3_G4D2N 0x04
8023 #define _CLC4GLS3_LC4G4D2T 0x08
8024 #define _CLC4GLS3_G4D2T 0x08
8025 #define _CLC4GLS3_LC4G4D3N 0x10
8026 #define _CLC4GLS3_G4D3N 0x10
8027 #define _CLC4GLS3_LC4G4D3T 0x20
8028 #define _CLC4GLS3_G4D3T 0x20
8029 #define _CLC4GLS3_LC4G4D4N 0x40
8030 #define _CLC4GLS3_G4D4N 0x40
8031 #define _CLC4GLS3_LC4G4D4T 0x80
8032 #define _CLC4GLS3_G4D4T 0x80
8034 //==============================================================================
8037 //==============================================================================
8040 extern __at(0x0FE4) __sfr STATUS_SHAD
;
8044 unsigned C_SHAD
: 1;
8045 unsigned DC_SHAD
: 1;
8046 unsigned Z_SHAD
: 1;
8052 } __STATUS_SHADbits_t
;
8054 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
8056 #define _C_SHAD 0x01
8057 #define _DC_SHAD 0x02
8058 #define _Z_SHAD 0x04
8060 //==============================================================================
8062 extern __at(0x0FE5) __sfr WREG_SHAD
;
8063 extern __at(0x0FE6) __sfr BSR_SHAD
;
8064 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
8065 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
8066 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
8067 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
8068 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
8069 extern __at(0x0FED) __sfr STKPTR
;
8070 extern __at(0x0FEE) __sfr TOSL
;
8071 extern __at(0x0FEF) __sfr TOSH
;
8073 //==============================================================================
8075 // Configuration Bits
8077 //==============================================================================
8079 #define _CONFIG1 0x8007
8080 #define _CONFIG2 0x8008
8082 //----------------------------- CONFIG1 Options -------------------------------
8084 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
8085 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
8086 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
8087 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
8088 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
8089 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
8090 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
8091 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
8092 #define _WDTE_OFF 0x3FE7 // WDT disabled.
8093 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
8094 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
8095 #define _WDTE_ON 0x3FFF // WDT enabled.
8096 #define _PWRTE_ON 0x3FDF // PWRT enabled.
8097 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
8098 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input if LVP bit is also 0.
8099 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
8100 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
8101 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
8102 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
8103 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
8104 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
8105 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
8106 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
8107 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
8108 #define _IESO_OFF 0x2FFF // Internal/External Switchover Mode is disabled.
8109 #define _IESO_ON 0x3FFF // Internal/External Switchover Mode is enabled.
8110 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
8111 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
8113 //----------------------------- CONFIG2 Options -------------------------------
8115 #define _WRT_ALL 0x3FFC // 0000h to 1FFFh write protected, no addresses may be modified by EECON control.
8116 #define _WRT_HALF 0x3FFD // 0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
8117 #define _WRT_BOOT 0x3FFE // 0000h to 03FFh write protected, 0400h to 1FFFh may be modified by EECON control.
8118 #define _WRT_OFF 0x3FFF // Write protection off.
8119 #define _PPS1WAY_OFF 0x3FFB // The PPSLOCK bit can be set and cleared repeatedly by software.
8120 #define _PPS1WAY_ON 0x3FFF // The PPSLOCK bit cannot be cleared once it is set by software.
8121 #define _ZCDDIS_OFF 0x3F7F // Zero-cross detect circuit is always enabled.
8122 #define _ZCDDIS_ON 0x3FFF // Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.
8123 #define _PLLEN_OFF 0x3EFF // 4x PLL is enabled when software sets the SPLLEN bit.
8124 #define _PLLEN_ON 0x3FFF // 4x PLL is always enabled.
8125 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
8126 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
8127 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
8128 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
8129 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
8130 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
8131 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
8132 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
8133 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
8134 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
8136 //==============================================================================
8138 #define _DEVID1 0x8006
8140 #define _IDLOC0 0x8000
8141 #define _IDLOC1 0x8001
8142 #define _IDLOC2 0x8002
8143 #define _IDLOC3 0x8003
8145 //==============================================================================
8147 #ifndef NO_BIT_DEFINES
8149 #define ADON ADCON0bits.ADON // bit 0
8150 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
8151 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
8152 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
8153 #define CHS0 ADCON0bits.CHS0 // bit 2
8154 #define CHS1 ADCON0bits.CHS1 // bit 3
8155 #define CHS2 ADCON0bits.CHS2 // bit 4
8156 #define CHS3 ADCON0bits.CHS3 // bit 5
8157 #define CHS4 ADCON0bits.CHS4 // bit 6
8159 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
8160 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
8161 #define ADNREF ADCON1bits.ADNREF // bit 2
8162 #define ADFM ADCON1bits.ADFM // bit 7
8164 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
8165 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
8166 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
8167 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
8169 #define ANSA0 ANSELAbits.ANSA0 // bit 0
8170 #define ANSA1 ANSELAbits.ANSA1 // bit 1
8171 #define ANSA2 ANSELAbits.ANSA2 // bit 2
8172 #define ANSA3 ANSELAbits.ANSA3 // bit 3
8173 #define ANSA4 ANSELAbits.ANSA4 // bit 4
8174 #define ANSA5 ANSELAbits.ANSA5 // bit 5
8176 #define ANSB0 ANSELBbits.ANSB0 // bit 0
8177 #define ANSB1 ANSELBbits.ANSB1 // bit 1
8178 #define ANSB2 ANSELBbits.ANSB2 // bit 2
8179 #define ANSB3 ANSELBbits.ANSB3 // bit 3
8180 #define ANSB4 ANSELBbits.ANSB4 // bit 4
8181 #define ANSB5 ANSELBbits.ANSB5 // bit 5
8183 #define ANSC2 ANSELCbits.ANSC2 // bit 2
8184 #define ANSC3 ANSELCbits.ANSC3 // bit 3
8185 #define ANSC4 ANSELCbits.ANSC4 // bit 4
8186 #define ANSC5 ANSELCbits.ANSC5 // bit 5
8187 #define ANSC6 ANSELCbits.ANSC6 // bit 6
8188 #define ANSC7 ANSELCbits.ANSC7 // bit 7
8190 #define ABDEN BAUD1CONbits.ABDEN // bit 0
8191 #define WUE BAUD1CONbits.WUE // bit 1
8192 #define BRG16 BAUD1CONbits.BRG16 // bit 3
8193 #define SCKP BAUD1CONbits.SCKP // bit 4
8194 #define RCIDL BAUD1CONbits.RCIDL // bit 6
8195 #define ABDOVF BAUD1CONbits.ABDOVF // bit 7
8197 #define BORRDY BORCONbits.BORRDY // bit 0
8198 #define BORFS BORCONbits.BORFS // bit 6
8199 #define SBOREN BORCONbits.SBOREN // bit 7
8201 #define BSR0 BSRbits.BSR0 // bit 0
8202 #define BSR1 BSRbits.BSR1 // bit 1
8203 #define BSR2 BSRbits.BSR2 // bit 2
8204 #define BSR3 BSRbits.BSR3 // bit 3
8205 #define BSR4 BSRbits.BSR4 // bit 4
8207 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
8208 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
8209 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
8210 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
8211 #define DC1B0 CCP1CONbits.DC1B0 // bit 4, shadows bit in CCP1CONbits
8212 #define CCP1Y CCP1CONbits.CCP1Y // bit 4, shadows bit in CCP1CONbits
8213 #define DC1B1 CCP1CONbits.DC1B1 // bit 5, shadows bit in CCP1CONbits
8214 #define CCP1X CCP1CONbits.CCP1X // bit 5, shadows bit in CCP1CONbits
8216 #define CCP2M0 CCP2CONbits.CCP2M0 // bit 0
8217 #define CCP2M1 CCP2CONbits.CCP2M1 // bit 1
8218 #define CCP2M2 CCP2CONbits.CCP2M2 // bit 2
8219 #define CCP2M3 CCP2CONbits.CCP2M3 // bit 3
8220 #define DC2B0 CCP2CONbits.DC2B0 // bit 4, shadows bit in CCP2CONbits
8221 #define CCP2Y CCP2CONbits.CCP2Y // bit 4, shadows bit in CCP2CONbits
8222 #define DC2B1 CCP2CONbits.DC2B1 // bit 5, shadows bit in CCP2CONbits
8223 #define CCP2X CCP2CONbits.CCP2X // bit 5, shadows bit in CCP2CONbits
8225 #define C1TSEL0 CCPTMRSbits.C1TSEL0 // bit 0
8226 #define C1TSEL1 CCPTMRSbits.C1TSEL1 // bit 1
8227 #define C2TSEL0 CCPTMRSbits.C2TSEL0 // bit 2
8228 #define C2TSEL1 CCPTMRSbits.C2TSEL1 // bit 3
8229 #define P3TSEL0 CCPTMRSbits.P3TSEL0 // bit 4
8230 #define P3TSEL1 CCPTMRSbits.P3TSEL1 // bit 5
8231 #define P4TSEL0 CCPTMRSbits.P4TSEL0 // bit 6
8232 #define P4TSEL1 CCPTMRSbits.P4TSEL1 // bit 7
8234 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits
8235 #define MODE0 CLC1CONbits.MODE0 // bit 0, shadows bit in CLC1CONbits
8236 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits
8237 #define MODE1 CLC1CONbits.MODE1 // bit 1, shadows bit in CLC1CONbits
8238 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits
8239 #define MODE2 CLC1CONbits.MODE2 // bit 2, shadows bit in CLC1CONbits
8240 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits
8241 #define INTN CLC1CONbits.INTN // bit 3, shadows bit in CLC1CONbits
8242 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits
8243 #define INTP CLC1CONbits.INTP // bit 4, shadows bit in CLC1CONbits
8244 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits
8245 #define OUT CLC1CONbits.OUT // bit 5, shadows bit in CLC1CONbits
8246 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits
8247 #define EN CLC1CONbits.EN // bit 7, shadows bit in CLC1CONbits
8249 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
8250 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
8251 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
8252 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
8253 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
8254 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
8255 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
8256 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
8257 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
8258 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
8259 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
8260 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
8261 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
8262 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
8263 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
8264 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
8266 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
8267 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
8268 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
8269 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
8270 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
8271 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
8272 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
8273 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
8274 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
8275 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
8276 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
8277 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
8278 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
8279 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
8280 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
8281 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
8283 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
8284 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
8285 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
8286 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
8287 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
8288 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
8289 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
8290 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
8291 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
8292 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
8294 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
8295 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
8296 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
8297 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
8298 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
8299 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
8300 #define LC1D1S3 CLC1SEL0bits.LC1D1S3 // bit 3, shadows bit in CLC1SEL0bits
8301 #define D1S3 CLC1SEL0bits.D1S3 // bit 3, shadows bit in CLC1SEL0bits
8302 #define LC1D1S4 CLC1SEL0bits.LC1D1S4 // bit 4, shadows bit in CLC1SEL0bits
8303 #define D1S4 CLC1SEL0bits.D1S4 // bit 4, shadows bit in CLC1SEL0bits
8305 #define LC1D2S0 CLC1SEL1bits.LC1D2S0 // bit 0, shadows bit in CLC1SEL1bits
8306 #define D2S0 CLC1SEL1bits.D2S0 // bit 0, shadows bit in CLC1SEL1bits
8307 #define LC1D2S1 CLC1SEL1bits.LC1D2S1 // bit 1, shadows bit in CLC1SEL1bits
8308 #define D2S1 CLC1SEL1bits.D2S1 // bit 1, shadows bit in CLC1SEL1bits
8309 #define LC1D2S2 CLC1SEL1bits.LC1D2S2 // bit 2, shadows bit in CLC1SEL1bits
8310 #define D2S2 CLC1SEL1bits.D2S2 // bit 2, shadows bit in CLC1SEL1bits
8311 #define LC1D2S3 CLC1SEL1bits.LC1D2S3 // bit 3, shadows bit in CLC1SEL1bits
8312 #define D2S3 CLC1SEL1bits.D2S3 // bit 3, shadows bit in CLC1SEL1bits
8313 #define LC1D2S4 CLC1SEL1bits.LC1D2S4 // bit 4, shadows bit in CLC1SEL1bits
8314 #define D2S4 CLC1SEL1bits.D2S4 // bit 4, shadows bit in CLC1SEL1bits
8316 #define LC1D3S0 CLC1SEL2bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL2bits
8317 #define D3S0 CLC1SEL2bits.D3S0 // bit 0, shadows bit in CLC1SEL2bits
8318 #define LC1D3S1 CLC1SEL2bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL2bits
8319 #define D3S1 CLC1SEL2bits.D3S1 // bit 1, shadows bit in CLC1SEL2bits
8320 #define LC1D3S2 CLC1SEL2bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL2bits
8321 #define D3S2 CLC1SEL2bits.D3S2 // bit 2, shadows bit in CLC1SEL2bits
8322 #define LC1D3S3 CLC1SEL2bits.LC1D3S3 // bit 3, shadows bit in CLC1SEL2bits
8323 #define D3S3 CLC1SEL2bits.D3S3 // bit 3, shadows bit in CLC1SEL2bits
8324 #define LC1D3S4 CLC1SEL2bits.LC1D3S4 // bit 4, shadows bit in CLC1SEL2bits
8325 #define D3S4 CLC1SEL2bits.D3S4 // bit 4, shadows bit in CLC1SEL2bits
8327 #define LC1D4S0 CLC1SEL3bits.LC1D4S0 // bit 0, shadows bit in CLC1SEL3bits
8328 #define D4S0 CLC1SEL3bits.D4S0 // bit 0, shadows bit in CLC1SEL3bits
8329 #define LC1D4S1 CLC1SEL3bits.LC1D4S1 // bit 1, shadows bit in CLC1SEL3bits
8330 #define D4S1 CLC1SEL3bits.D4S1 // bit 1, shadows bit in CLC1SEL3bits
8331 #define LC1D4S2 CLC1SEL3bits.LC1D4S2 // bit 2, shadows bit in CLC1SEL3bits
8332 #define D4S2 CLC1SEL3bits.D4S2 // bit 2, shadows bit in CLC1SEL3bits
8333 #define LC1D4S3 CLC1SEL3bits.LC1D4S3 // bit 3, shadows bit in CLC1SEL3bits
8334 #define D4S3 CLC1SEL3bits.D4S3 // bit 3, shadows bit in CLC1SEL3bits
8335 #define LC1D4S4 CLC1SEL3bits.LC1D4S4 // bit 4, shadows bit in CLC1SEL3bits
8336 #define D4S4 CLC1SEL3bits.D4S4 // bit 4, shadows bit in CLC1SEL3bits
8338 #define MLC1OUT CLCDATAbits.MLC1OUT // bit 0, shadows bit in CLCDATAbits
8339 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0, shadows bit in CLCDATAbits
8340 #define MLC2OUT CLCDATAbits.MLC2OUT // bit 1, shadows bit in CLCDATAbits
8341 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1, shadows bit in CLCDATAbits
8342 #define MLC3OUT CLCDATAbits.MLC3OUT // bit 2, shadows bit in CLCDATAbits
8343 #define MCLC3OUT CLCDATAbits.MCLC3OUT // bit 2, shadows bit in CLCDATAbits
8344 #define MLC4OUT CLCDATAbits.MLC4OUT // bit 3, shadows bit in CLCDATAbits
8345 #define MCLC4OUT CLCDATAbits.MCLC4OUT // bit 3, shadows bit in CLCDATAbits
8347 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
8348 #define C1HYS CM1CON0bits.C1HYS // bit 1
8349 #define C1SP CM1CON0bits.C1SP // bit 2
8350 #define C1ZLF CM1CON0bits.C1ZLF // bit 3
8351 #define C1POL CM1CON0bits.C1POL // bit 4
8352 #define C1OUT CM1CON0bits.C1OUT // bit 6
8353 #define C1ON CM1CON0bits.C1ON // bit 7
8355 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
8356 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
8357 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
8358 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 3
8359 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 4
8360 #define C1PCH2 CM1CON1bits.C1PCH2 // bit 5
8361 #define C1INTN CM1CON1bits.C1INTN // bit 6
8362 #define C1INTP CM1CON1bits.C1INTP // bit 7
8364 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
8365 #define C2HYS CM2CON0bits.C2HYS // bit 1
8366 #define C2SP CM2CON0bits.C2SP // bit 2
8367 #define C2ZLF CM2CON0bits.C2ZLF // bit 3
8368 #define C2POL CM2CON0bits.C2POL // bit 4
8369 #define C2OUT CM2CON0bits.C2OUT // bit 6
8370 #define C2ON CM2CON0bits.C2ON // bit 7
8372 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
8373 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
8374 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
8375 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 3
8376 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 4
8377 #define C2PCH2 CM2CON1bits.C2PCH2 // bit 5
8378 #define C2INTN CM2CON1bits.C2INTN // bit 6
8379 #define C2INTP CM2CON1bits.C2INTP // bit 7
8381 #define MC1OUT CMOUTbits.MC1OUT // bit 0
8382 #define MC2OUT CMOUTbits.MC2OUT // bit 1
8384 #define G1ASDAC0 COG1ASD0bits.G1ASDAC0 // bit 2
8385 #define G1ASDAC1 COG1ASD0bits.G1ASDAC1 // bit 3
8386 #define G1ASDBD0 COG1ASD0bits.G1ASDBD0 // bit 4
8387 #define G1ASDBD1 COG1ASD0bits.G1ASDBD1 // bit 5
8388 #define G1ARSEN COG1ASD0bits.G1ARSEN // bit 6
8389 #define G1ASE COG1ASD0bits.G1ASE // bit 7
8391 #define G1AS0E COG1ASD1bits.G1AS0E // bit 0
8392 #define G1AS1E COG1ASD1bits.G1AS1E // bit 1
8393 #define G1AS2E COG1ASD1bits.G1AS2E // bit 2
8394 #define G1AS3E COG1ASD1bits.G1AS3E // bit 3
8396 #define G1BLKF0 COG1BLKFbits.G1BLKF0 // bit 0
8397 #define G1BLKF1 COG1BLKFbits.G1BLKF1 // bit 1
8398 #define G1BLKF2 COG1BLKFbits.G1BLKF2 // bit 2
8399 #define G1BLKF3 COG1BLKFbits.G1BLKF3 // bit 3
8400 #define G1BLKF4 COG1BLKFbits.G1BLKF4 // bit 4
8401 #define G1BLKF5 COG1BLKFbits.G1BLKF5 // bit 5
8403 #define G1BLKR0 COG1BLKRbits.G1BLKR0 // bit 0
8404 #define G1BLKR1 COG1BLKRbits.G1BLKR1 // bit 1
8405 #define G1BLKR2 COG1BLKRbits.G1BLKR2 // bit 2
8406 #define G1BLKR3 COG1BLKRbits.G1BLKR3 // bit 3
8407 #define G1BLKR4 COG1BLKRbits.G1BLKR4 // bit 4
8408 #define G1BLKR5 COG1BLKRbits.G1BLKR5 // bit 5
8410 #define G1MD0 COG1CON0bits.G1MD0 // bit 0
8411 #define G1MD1 COG1CON0bits.G1MD1 // bit 1
8412 #define G1MD2 COG1CON0bits.G1MD2 // bit 2
8413 #define G1CS0 COG1CON0bits.G1CS0 // bit 3
8414 #define G1CS1 COG1CON0bits.G1CS1 // bit 4
8415 #define G1LD COG1CON0bits.G1LD // bit 6
8416 #define G1EN COG1CON0bits.G1EN // bit 7
8418 #define G1POLA COG1CON1bits.G1POLA // bit 0
8419 #define G1POLB COG1CON1bits.G1POLB // bit 1
8420 #define G1POLC COG1CON1bits.G1POLC // bit 2
8421 #define G1POLD COG1CON1bits.G1POLD // bit 3
8422 #define G1FDBS COG1CON1bits.G1FDBS // bit 6
8423 #define G1RDBS COG1CON1bits.G1RDBS // bit 7
8425 #define G1DBF0 COG1DBFbits.G1DBF0 // bit 0
8426 #define G1DBF1 COG1DBFbits.G1DBF1 // bit 1
8427 #define G1DBF2 COG1DBFbits.G1DBF2 // bit 2
8428 #define G1DBF3 COG1DBFbits.G1DBF3 // bit 3
8429 #define G1DBF4 COG1DBFbits.G1DBF4 // bit 4
8430 #define G1DBF5 COG1DBFbits.G1DBF5 // bit 5
8432 #define G1DBR0 COG1DBRbits.G1DBR0 // bit 0
8433 #define G1DBR1 COG1DBRbits.G1DBR1 // bit 1
8434 #define G1DBR2 COG1DBRbits.G1DBR2 // bit 2
8435 #define G1DBR3 COG1DBRbits.G1DBR3 // bit 3
8436 #define G1DBR4 COG1DBRbits.G1DBR4 // bit 4
8437 #define G1DBR5 COG1DBRbits.G1DBR5 // bit 5
8439 #define G1FIS0 COG1FISbits.G1FIS0 // bit 0
8440 #define G1FIS1 COG1FISbits.G1FIS1 // bit 1
8441 #define G1FIS2 COG1FISbits.G1FIS2 // bit 2
8442 #define G1FIS3 COG1FISbits.G1FIS3 // bit 3
8443 #define G1FIS4 COG1FISbits.G1FIS4 // bit 4
8444 #define G1FIS5 COG1FISbits.G1FIS5 // bit 5
8445 #define G1FIS6 COG1FISbits.G1FIS6 // bit 6
8446 #define G1FIS7 COG1FISbits.G1FIS7 // bit 7
8448 #define G1FSIM0 COG1FSIMbits.G1FSIM0 // bit 0
8449 #define G1FSIM1 COG1FSIMbits.G1FSIM1 // bit 1
8450 #define G1FSIM2 COG1FSIMbits.G1FSIM2 // bit 2
8451 #define G1FSIM3 COG1FSIMbits.G1FSIM3 // bit 3
8452 #define G1FSIM4 COG1FSIMbits.G1FSIM4 // bit 4
8453 #define G1FSIM5 COG1FSIMbits.G1FSIM5 // bit 5
8454 #define G1FSIM6 COG1FSIMbits.G1FSIM6 // bit 6
8455 #define G1FSIM7 COG1FSIMbits.G1FSIM7 // bit 7
8457 #define G1PHF0 COG1PHFbits.G1PHF0 // bit 0
8458 #define G1PHF1 COG1PHFbits.G1PHF1 // bit 1
8459 #define G1PHF2 COG1PHFbits.G1PHF2 // bit 2
8460 #define G1PHF3 COG1PHFbits.G1PHF3 // bit 3
8461 #define G1PHF4 COG1PHFbits.G1PHF4 // bit 4
8462 #define G1PHF5 COG1PHFbits.G1PHF5 // bit 5
8464 #define G1PHR0 COG1PHRbits.G1PHR0 // bit 0
8465 #define G1PHR1 COG1PHRbits.G1PHR1 // bit 1
8466 #define G1PHR2 COG1PHRbits.G1PHR2 // bit 2
8467 #define G1PHR3 COG1PHRbits.G1PHR3 // bit 3
8468 #define G1PHR4 COG1PHRbits.G1PHR4 // bit 4
8469 #define G1PHR5 COG1PHRbits.G1PHR5 // bit 5
8471 #define G1RIS0 COG1RISbits.G1RIS0 // bit 0
8472 #define G1RIS1 COG1RISbits.G1RIS1 // bit 1
8473 #define G1RIS2 COG1RISbits.G1RIS2 // bit 2
8474 #define G1RIS3 COG1RISbits.G1RIS3 // bit 3
8475 #define G1RIS4 COG1RISbits.G1RIS4 // bit 4
8476 #define G1RIS5 COG1RISbits.G1RIS5 // bit 5
8477 #define G1RIS6 COG1RISbits.G1RIS6 // bit 6
8478 #define G1RIS7 COG1RISbits.G1RIS7 // bit 7
8480 #define G1RSIM0 COG1RSIMbits.G1RSIM0 // bit 0
8481 #define G1RSIM1 COG1RSIMbits.G1RSIM1 // bit 1
8482 #define G1RSIM2 COG1RSIMbits.G1RSIM2 // bit 2
8483 #define G1RSIM3 COG1RSIMbits.G1RSIM3 // bit 3
8484 #define G1RSIM4 COG1RSIMbits.G1RSIM4 // bit 4
8485 #define G1RSIM5 COG1RSIMbits.G1RSIM5 // bit 5
8486 #define G1RSIM6 COG1RSIMbits.G1RSIM6 // bit 6
8487 #define G1RSIM7 COG1RSIMbits.G1RSIM7 // bit 7
8489 #define G1STRA COG1STRbits.G1STRA // bit 0
8490 #define G1STRB COG1STRbits.G1STRB // bit 1
8491 #define G1STRC COG1STRbits.G1STRC // bit 2
8492 #define G1STRD COG1STRbits.G1STRD // bit 3
8493 #define G1SDATA COG1STRbits.G1SDATA // bit 4
8494 #define G1SDATB COG1STRbits.G1SDATB // bit 5
8495 #define G1SDATC COG1STRbits.G1SDATC // bit 6
8496 #define G1SDATD COG1STRbits.G1SDATD // bit 7
8498 #define DAC1NSS DAC1CON0bits.DAC1NSS // bit 0, shadows bit in DAC1CON0bits
8499 #define DACNSS DAC1CON0bits.DACNSS // bit 0, shadows bit in DAC1CON0bits
8500 #define DAC1PSS0 DAC1CON0bits.DAC1PSS0 // bit 2, shadows bit in DAC1CON0bits
8501 #define DACPSS0 DAC1CON0bits.DACPSS0 // bit 2, shadows bit in DAC1CON0bits
8502 #define DAC1PSS1 DAC1CON0bits.DAC1PSS1 // bit 3, shadows bit in DAC1CON0bits
8503 #define DACPSS1 DAC1CON0bits.DACPSS1 // bit 3, shadows bit in DAC1CON0bits
8504 #define DAC1OE2 DAC1CON0bits.DAC1OE2 // bit 4, shadows bit in DAC1CON0bits
8505 #define DACOE0 DAC1CON0bits.DACOE0 // bit 4, shadows bit in DAC1CON0bits
8506 #define DAC1OE1 DAC1CON0bits.DAC1OE1 // bit 5, shadows bit in DAC1CON0bits
8507 #define DACOE1 DAC1CON0bits.DACOE1 // bit 5, shadows bit in DAC1CON0bits
8508 #define DAC1EN DAC1CON0bits.DAC1EN // bit 7, shadows bit in DAC1CON0bits
8509 #define DACEN DAC1CON0bits.DACEN // bit 7, shadows bit in DAC1CON0bits
8511 #define DAC1R0 DAC1CON1bits.DAC1R0 // bit 0, shadows bit in DAC1CON1bits
8512 #define DACR0 DAC1CON1bits.DACR0 // bit 0, shadows bit in DAC1CON1bits
8513 #define DAC1R1 DAC1CON1bits.DAC1R1 // bit 1, shadows bit in DAC1CON1bits
8514 #define DACR1 DAC1CON1bits.DACR1 // bit 1, shadows bit in DAC1CON1bits
8515 #define DAC1R2 DAC1CON1bits.DAC1R2 // bit 2, shadows bit in DAC1CON1bits
8516 #define DACR2 DAC1CON1bits.DACR2 // bit 2, shadows bit in DAC1CON1bits
8517 #define DAC1R3 DAC1CON1bits.DAC1R3 // bit 3, shadows bit in DAC1CON1bits
8518 #define DACR3 DAC1CON1bits.DACR3 // bit 3, shadows bit in DAC1CON1bits
8519 #define DAC1R4 DAC1CON1bits.DAC1R4 // bit 4, shadows bit in DAC1CON1bits
8520 #define DACR4 DAC1CON1bits.DACR4 // bit 4, shadows bit in DAC1CON1bits
8521 #define DAC1R5 DAC1CON1bits.DAC1R5 // bit 5, shadows bit in DAC1CON1bits
8522 #define DACR5 DAC1CON1bits.DACR5 // bit 5, shadows bit in DAC1CON1bits
8523 #define DAC1R6 DAC1CON1bits.DAC1R6 // bit 6, shadows bit in DAC1CON1bits
8524 #define DACR6 DAC1CON1bits.DACR6 // bit 6, shadows bit in DAC1CON1bits
8525 #define DAC1R7 DAC1CON1bits.DAC1R7 // bit 7, shadows bit in DAC1CON1bits
8526 #define DACR7 DAC1CON1bits.DACR7 // bit 7, shadows bit in DAC1CON1bits
8528 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
8529 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
8530 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
8531 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
8532 #define TSRNG FVRCONbits.TSRNG // bit 4
8533 #define TSEN FVRCONbits.TSEN // bit 5
8534 #define FVRRDY FVRCONbits.FVRRDY // bit 6
8535 #define FVREN FVRCONbits.FVREN // bit 7
8537 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
8538 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
8539 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
8540 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
8541 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
8542 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
8543 #define INLVLA6 INLVLAbits.INLVLA6 // bit 6
8544 #define INLVLA7 INLVLAbits.INLVLA7 // bit 7
8546 #define INLVLB0 INLVLBbits.INLVLB0 // bit 0
8547 #define INLVLB1 INLVLBbits.INLVLB1 // bit 1
8548 #define INLVLB2 INLVLBbits.INLVLB2 // bit 2
8549 #define INLVLB3 INLVLBbits.INLVLB3 // bit 3
8550 #define INLVLB4 INLVLBbits.INLVLB4 // bit 4
8551 #define INLVLB5 INLVLBbits.INLVLB5 // bit 5
8552 #define INLVLB6 INLVLBbits.INLVLB6 // bit 6
8553 #define INLVLB7 INLVLBbits.INLVLB7 // bit 7
8555 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0
8556 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1
8557 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2
8558 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3
8559 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4
8560 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5
8561 #define INLVLC6 INLVLCbits.INLVLC6 // bit 6
8562 #define INLVLC7 INLVLCbits.INLVLC7 // bit 7
8564 #define INLVLE3 INLVLEbits.INLVLE3 // bit 3
8566 #define IOCIF INTCONbits.IOCIF // bit 0
8567 #define INTF INTCONbits.INTF // bit 1
8568 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
8569 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
8570 #define IOCIE INTCONbits.IOCIE // bit 3
8571 #define INTE INTCONbits.INTE // bit 4
8572 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
8573 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
8574 #define PEIE INTCONbits.PEIE // bit 6
8575 #define GIE INTCONbits.GIE // bit 7
8577 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
8578 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
8579 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
8580 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
8581 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
8582 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
8583 #define IOCAF6 IOCAFbits.IOCAF6 // bit 6
8584 #define IOCAF7 IOCAFbits.IOCAF7 // bit 7
8586 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
8587 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
8588 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
8589 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
8590 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
8591 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
8592 #define IOCAN6 IOCANbits.IOCAN6 // bit 6
8593 #define IOCAN7 IOCANbits.IOCAN7 // bit 7
8595 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
8596 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
8597 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
8598 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
8599 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
8600 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
8601 #define IOCAP6 IOCAPbits.IOCAP6 // bit 6
8602 #define IOCAP7 IOCAPbits.IOCAP7 // bit 7
8604 #define IOCBF0 IOCBFbits.IOCBF0 // bit 0
8605 #define IOCBF1 IOCBFbits.IOCBF1 // bit 1
8606 #define IOCBF2 IOCBFbits.IOCBF2 // bit 2
8607 #define IOCBF3 IOCBFbits.IOCBF3 // bit 3
8608 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
8609 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
8610 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
8611 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
8613 #define IOCBN0 IOCBNbits.IOCBN0 // bit 0
8614 #define IOCBN1 IOCBNbits.IOCBN1 // bit 1
8615 #define IOCBN2 IOCBNbits.IOCBN2 // bit 2
8616 #define IOCBN3 IOCBNbits.IOCBN3 // bit 3
8617 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
8618 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
8619 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
8620 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
8622 #define IOCBP0 IOCBPbits.IOCBP0 // bit 0
8623 #define IOCBP1 IOCBPbits.IOCBP1 // bit 1
8624 #define IOCBP2 IOCBPbits.IOCBP2 // bit 2
8625 #define IOCBP3 IOCBPbits.IOCBP3 // bit 3
8626 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
8627 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
8628 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
8629 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
8631 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
8632 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
8633 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
8634 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
8635 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
8636 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
8637 #define IOCCF6 IOCCFbits.IOCCF6 // bit 6
8638 #define IOCCF7 IOCCFbits.IOCCF7 // bit 7
8640 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
8641 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
8642 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
8643 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
8644 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
8645 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
8646 #define IOCCN6 IOCCNbits.IOCCN6 // bit 6
8647 #define IOCCN7 IOCCNbits.IOCCN7 // bit 7
8649 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
8650 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
8651 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
8652 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
8653 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
8654 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
8655 #define IOCCP6 IOCCPbits.IOCCP6 // bit 6
8656 #define IOCCP7 IOCCPbits.IOCCP7 // bit 7
8658 #define IOCEF3 IOCEFbits.IOCEF3 // bit 3
8660 #define IOCEN3 IOCENbits.IOCEN3 // bit 3
8662 #define IOCEP3 IOCEPbits.IOCEP3 // bit 3
8664 #define LATA0 LATAbits.LATA0 // bit 0
8665 #define LATA1 LATAbits.LATA1 // bit 1
8666 #define LATA2 LATAbits.LATA2 // bit 2
8667 #define LATA3 LATAbits.LATA3 // bit 3
8668 #define LATA4 LATAbits.LATA4 // bit 4
8669 #define LATA5 LATAbits.LATA5 // bit 5
8670 #define LATA6 LATAbits.LATA6 // bit 6
8671 #define LATA7 LATAbits.LATA7 // bit 7
8673 #define LATB0 LATBbits.LATB0 // bit 0
8674 #define LATB1 LATBbits.LATB1 // bit 1
8675 #define LATB2 LATBbits.LATB2 // bit 2
8676 #define LATB3 LATBbits.LATB3 // bit 3
8677 #define LATB4 LATBbits.LATB4 // bit 4
8678 #define LATB5 LATBbits.LATB5 // bit 5
8679 #define LATB6 LATBbits.LATB6 // bit 6
8680 #define LATB7 LATBbits.LATB7 // bit 7
8682 #define LATC0 LATCbits.LATC0 // bit 0
8683 #define LATC1 LATCbits.LATC1 // bit 1
8684 #define LATC2 LATCbits.LATC2 // bit 2
8685 #define LATC3 LATCbits.LATC3 // bit 3
8686 #define LATC4 LATCbits.LATC4 // bit 4
8687 #define LATC5 LATCbits.LATC5 // bit 5
8688 #define LATC6 LATCbits.LATC6 // bit 6
8689 #define LATC7 LATCbits.LATC7 // bit 7
8691 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
8692 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
8693 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
8694 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
8695 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
8696 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
8697 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
8698 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
8700 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
8701 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
8702 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
8703 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
8704 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
8705 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
8706 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
8707 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
8709 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
8710 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
8711 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
8712 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
8714 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
8715 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
8716 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
8717 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
8718 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
8720 #define N1PFM NCO1CONbits.N1PFM // bit 0
8721 #define N1POL NCO1CONbits.N1POL // bit 4
8722 #define N1OUT NCO1CONbits.N1OUT // bit 5
8723 #define N1EN NCO1CONbits.N1EN // bit 7
8725 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
8726 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
8727 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
8728 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
8729 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
8730 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
8731 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
8732 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
8734 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
8735 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
8736 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
8737 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
8738 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
8739 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
8740 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
8741 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
8743 #define NCO1INC16 NCO1INCUbits.NCO1INC16 // bit 0
8744 #define NCO1INC17 NCO1INCUbits.NCO1INC17 // bit 1
8745 #define NCO1INC18 NCO1INCUbits.NCO1INC18 // bit 2
8746 #define NCO1INC19 NCO1INCUbits.NCO1INC19 // bit 3
8748 #define ODA0 ODCONAbits.ODA0 // bit 0
8749 #define ODA1 ODCONAbits.ODA1 // bit 1
8750 #define ODA2 ODCONAbits.ODA2 // bit 2
8751 #define ODA3 ODCONAbits.ODA3 // bit 3
8752 #define ODA4 ODCONAbits.ODA4 // bit 4
8753 #define ODA5 ODCONAbits.ODA5 // bit 5
8754 #define ODA6 ODCONAbits.ODA6 // bit 6
8755 #define ODA7 ODCONAbits.ODA7 // bit 7
8757 #define ODB0 ODCONBbits.ODB0 // bit 0
8758 #define ODB1 ODCONBbits.ODB1 // bit 1
8759 #define ODB2 ODCONBbits.ODB2 // bit 2
8760 #define ODB3 ODCONBbits.ODB3 // bit 3
8761 #define ODB4 ODCONBbits.ODB4 // bit 4
8762 #define ODB5 ODCONBbits.ODB5 // bit 5
8763 #define ODB6 ODCONBbits.ODB6 // bit 6
8764 #define ODB7 ODCONBbits.ODB7 // bit 7
8766 #define ODC0 ODCONCbits.ODC0 // bit 0
8767 #define ODC1 ODCONCbits.ODC1 // bit 1
8768 #define ODC2 ODCONCbits.ODC2 // bit 2
8769 #define ODC3 ODCONCbits.ODC3 // bit 3
8770 #define ODC4 ODCONCbits.ODC4 // bit 4
8771 #define ODC5 ODCONCbits.ODC5 // bit 5
8772 #define ODC6 ODCONCbits.ODC6 // bit 6
8773 #define ODC7 ODCONCbits.ODC7 // bit 7
8775 #define OPA1PCH0 OPA1CONbits.OPA1PCH0 // bit 0
8776 #define OPA1PCH1 OPA1CONbits.OPA1PCH1 // bit 1
8777 #define OPA1UG OPA1CONbits.OPA1UG // bit 4
8778 #define OPA1SP OPA1CONbits.OPA1SP // bit 6
8779 #define OPA1EN OPA1CONbits.OPA1EN // bit 7
8781 #define OPA2PCH0 OPA2CONbits.OPA2PCH0 // bit 0
8782 #define OPA2PCH1 OPA2CONbits.OPA2PCH1 // bit 1
8783 #define OPA2UG OPA2CONbits.OPA2UG // bit 4
8784 #define OPA2SP OPA2CONbits.OPA2SP // bit 6
8785 #define OPA2EN OPA2CONbits.OPA2EN // bit 7
8787 #define PS0 OPTION_REGbits.PS0 // bit 0
8788 #define PS1 OPTION_REGbits.PS1 // bit 1
8789 #define PS2 OPTION_REGbits.PS2 // bit 2
8790 #define PSA OPTION_REGbits.PSA // bit 3
8791 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
8792 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
8793 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
8794 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
8795 #define INTEDG OPTION_REGbits.INTEDG // bit 6
8796 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
8798 #define SCS0 OSCCONbits.SCS0 // bit 0
8799 #define SCS1 OSCCONbits.SCS1 // bit 1
8800 #define IRCF0 OSCCONbits.IRCF0 // bit 3
8801 #define IRCF1 OSCCONbits.IRCF1 // bit 4
8802 #define IRCF2 OSCCONbits.IRCF2 // bit 5
8803 #define IRCF3 OSCCONbits.IRCF3 // bit 6
8804 #define SPLLEN OSCCONbits.SPLLEN // bit 7
8806 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
8807 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
8808 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
8809 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
8810 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
8811 #define OSTS OSCSTATbits.OSTS // bit 5
8812 #define PLLR OSCSTATbits.PLLR // bit 6
8813 #define SOSCR OSCSTATbits.SOSCR // bit 7
8815 #define TUN0 OSCTUNEbits.TUN0 // bit 0
8816 #define TUN1 OSCTUNEbits.TUN1 // bit 1
8817 #define TUN2 OSCTUNEbits.TUN2 // bit 2
8818 #define TUN3 OSCTUNEbits.TUN3 // bit 3
8819 #define TUN4 OSCTUNEbits.TUN4 // bit 4
8820 #define TUN5 OSCTUNEbits.TUN5 // bit 5
8822 #define NOT_BOR PCONbits.NOT_BOR // bit 0
8823 #define NOT_POR PCONbits.NOT_POR // bit 1
8824 #define NOT_RI PCONbits.NOT_RI // bit 2
8825 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
8826 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
8827 #define STKUNF PCONbits.STKUNF // bit 6
8828 #define STKOVF PCONbits.STKOVF // bit 7
8830 #define TMR1IE PIE1bits.TMR1IE // bit 0
8831 #define TMR2IE PIE1bits.TMR2IE // bit 1
8832 #define CCP1IE PIE1bits.CCP1IE // bit 2
8833 #define SSP1IE PIE1bits.SSP1IE // bit 3
8834 #define TXIE PIE1bits.TXIE // bit 4
8835 #define RCIE PIE1bits.RCIE // bit 5
8836 #define ADIE PIE1bits.ADIE // bit 6
8837 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
8839 #define CCP2IE PIE2bits.CCP2IE // bit 0
8840 #define TMR4IE PIE2bits.TMR4IE // bit 1
8841 #define TMR6IE PIE2bits.TMR6IE // bit 2
8842 #define BCL1IE PIE2bits.BCL1IE // bit 3
8843 #define C1IE PIE2bits.C1IE // bit 5
8844 #define C2IE PIE2bits.C2IE // bit 6
8845 #define OSFIE PIE2bits.OSFIE // bit 7
8847 #define CLC1IE PIE3bits.CLC1IE // bit 0
8848 #define CLC2IE PIE3bits.CLC2IE // bit 1
8849 #define CLC3IE PIE3bits.CLC3IE // bit 2
8850 #define CLC4IE PIE3bits.CLC4IE // bit 3
8851 #define ZCDIE PIE3bits.ZCDIE // bit 4
8852 #define COGIE PIE3bits.COGIE // bit 5
8853 #define NCOIE PIE3bits.NCOIE // bit 6
8855 #define TMR1IF PIR1bits.TMR1IF // bit 0
8856 #define TMR2IF PIR1bits.TMR2IF // bit 1
8857 #define CCP1IF PIR1bits.CCP1IF // bit 2
8858 #define SSP1IF PIR1bits.SSP1IF // bit 3
8859 #define TXIF PIR1bits.TXIF // bit 4
8860 #define RCIF PIR1bits.RCIF // bit 5
8861 #define ADIF PIR1bits.ADIF // bit 6
8862 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
8864 #define CCP2IF PIR2bits.CCP2IF // bit 0
8865 #define TMR4IF PIR2bits.TMR4IF // bit 1
8866 #define TMR6IF PIR2bits.TMR6IF // bit 2
8867 #define BCL1IF PIR2bits.BCL1IF // bit 3
8868 #define C1IF PIR2bits.C1IF // bit 5
8869 #define C2IF PIR2bits.C2IF // bit 6
8870 #define OSFIF PIR2bits.OSFIF // bit 7
8872 #define CLC1IF PIR3bits.CLC1IF // bit 0
8873 #define CLC2IF PIR3bits.CLC2IF // bit 1
8874 #define CLC3IF PIR3bits.CLC3IF // bit 2
8875 #define CLC4IF PIR3bits.CLC4IF // bit 3
8876 #define ZCDIF PIR3bits.ZCDIF // bit 4
8877 #define COGIF PIR3bits.COGIF // bit 5
8878 #define NCOIF PIR3bits.NCOIF // bit 6
8880 #define RD PMCON1bits.RD // bit 0
8881 #define WR PMCON1bits.WR // bit 1
8882 #define WREN PMCON1bits.WREN // bit 2
8883 #define WRERR PMCON1bits.WRERR // bit 3
8884 #define FREE PMCON1bits.FREE // bit 4
8885 #define LWLO PMCON1bits.LWLO // bit 5
8886 #define CFGS PMCON1bits.CFGS // bit 6
8888 #define RA0 PORTAbits.RA0 // bit 0
8889 #define RA1 PORTAbits.RA1 // bit 1
8890 #define RA2 PORTAbits.RA2 // bit 2
8891 #define RA3 PORTAbits.RA3 // bit 3
8892 #define RA4 PORTAbits.RA4 // bit 4
8893 #define RA5 PORTAbits.RA5 // bit 5
8894 #define RA6 PORTAbits.RA6 // bit 6
8895 #define RA7 PORTAbits.RA7 // bit 7
8897 #define RB0 PORTBbits.RB0 // bit 0
8898 #define RB1 PORTBbits.RB1 // bit 1
8899 #define RB2 PORTBbits.RB2 // bit 2
8900 #define RB3 PORTBbits.RB3 // bit 3
8901 #define RB4 PORTBbits.RB4 // bit 4
8902 #define RB5 PORTBbits.RB5 // bit 5
8903 #define RB6 PORTBbits.RB6 // bit 6
8904 #define RB7 PORTBbits.RB7 // bit 7
8906 #define RC0 PORTCbits.RC0 // bit 0
8907 #define RC1 PORTCbits.RC1 // bit 1
8908 #define RC2 PORTCbits.RC2 // bit 2
8909 #define RC3 PORTCbits.RC3 // bit 3
8910 #define RC4 PORTCbits.RC4 // bit 4
8911 #define RC5 PORTCbits.RC5 // bit 5
8912 #define RC6 PORTCbits.RC6 // bit 6
8913 #define RC7 PORTCbits.RC7 // bit 7
8915 #define RE3 PORTEbits.RE3 // bit 3
8917 #define PPSLOCKED PPSLOCKbits.PPSLOCKED // bit 0
8919 #define PWM3POL PWM3CONbits.PWM3POL // bit 4
8920 #define PWM3OUT PWM3CONbits.PWM3OUT // bit 5
8921 #define PWM3EN PWM3CONbits.PWM3EN // bit 7
8923 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
8924 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
8925 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
8926 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
8927 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
8928 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
8929 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
8930 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
8932 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 6
8933 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 7
8935 #define PWM4POL PWM4CONbits.PWM4POL // bit 4
8936 #define PWM4OUT PWM4CONbits.PWM4OUT // bit 5
8937 #define PWM4EN PWM4CONbits.PWM4EN // bit 7
8939 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
8940 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
8941 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
8942 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
8943 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
8944 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
8945 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
8946 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
8948 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 6
8949 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 7
8951 #define RX9D RC1STAbits.RX9D // bit 0
8952 #define OERR RC1STAbits.OERR // bit 1
8953 #define FERR RC1STAbits.FERR // bit 2
8954 #define ADDEN RC1STAbits.ADDEN // bit 3
8955 #define CREN RC1STAbits.CREN // bit 4
8956 #define SREN RC1STAbits.SREN // bit 5
8957 #define RX9 RC1STAbits.RX9 // bit 6
8958 #define SPEN RC1STAbits.SPEN // bit 7
8960 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
8961 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
8962 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
8963 #define SLRA3 SLRCONAbits.SLRA3 // bit 3
8964 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
8965 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
8966 #define SLRA6 SLRCONAbits.SLRA6 // bit 6
8967 #define SLRA7 SLRCONAbits.SLRA7 // bit 7
8969 #define SLRB0 SLRCONBbits.SLRB0 // bit 0
8970 #define SLRB1 SLRCONBbits.SLRB1 // bit 1
8971 #define SLRB2 SLRCONBbits.SLRB2 // bit 2
8972 #define SLRB3 SLRCONBbits.SLRB3 // bit 3
8973 #define SLRB4 SLRCONBbits.SLRB4 // bit 4
8974 #define SLRB5 SLRCONBbits.SLRB5 // bit 5
8975 #define SLRB6 SLRCONBbits.SLRB6 // bit 6
8976 #define SLRB7 SLRCONBbits.SLRB7 // bit 7
8978 #define SLRC0 SLRCONCbits.SLRC0 // bit 0
8979 #define SLRC1 SLRCONCbits.SLRC1 // bit 1
8980 #define SLRC2 SLRCONCbits.SLRC2 // bit 2
8981 #define SLRC3 SLRCONCbits.SLRC3 // bit 3
8982 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
8983 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
8984 #define SLRC6 SLRCONCbits.SLRC6 // bit 6
8985 #define SLRC7 SLRCONCbits.SLRC7 // bit 7
8987 #define SSP1ADD0 SSP1ADDbits.SSP1ADD0 // bit 0, shadows bit in SSP1ADDbits
8988 #define ADD0 SSP1ADDbits.ADD0 // bit 0, shadows bit in SSP1ADDbits
8989 #define SSP1ADD1 SSP1ADDbits.SSP1ADD1 // bit 1, shadows bit in SSP1ADDbits
8990 #define ADD1 SSP1ADDbits.ADD1 // bit 1, shadows bit in SSP1ADDbits
8991 #define SSP1ADD2 SSP1ADDbits.SSP1ADD2 // bit 2, shadows bit in SSP1ADDbits
8992 #define ADD2 SSP1ADDbits.ADD2 // bit 2, shadows bit in SSP1ADDbits
8993 #define SSP1ADD3 SSP1ADDbits.SSP1ADD3 // bit 3, shadows bit in SSP1ADDbits
8994 #define ADD3 SSP1ADDbits.ADD3 // bit 3, shadows bit in SSP1ADDbits
8995 #define SSP1ADD4 SSP1ADDbits.SSP1ADD4 // bit 4, shadows bit in SSP1ADDbits
8996 #define ADD4 SSP1ADDbits.ADD4 // bit 4, shadows bit in SSP1ADDbits
8997 #define SSP1ADD5 SSP1ADDbits.SSP1ADD5 // bit 5, shadows bit in SSP1ADDbits
8998 #define ADD5 SSP1ADDbits.ADD5 // bit 5, shadows bit in SSP1ADDbits
8999 #define SSP1ADD6 SSP1ADDbits.SSP1ADD6 // bit 6, shadows bit in SSP1ADDbits
9000 #define ADD6 SSP1ADDbits.ADD6 // bit 6, shadows bit in SSP1ADDbits
9001 #define SSP1ADD7 SSP1ADDbits.SSP1ADD7 // bit 7, shadows bit in SSP1ADDbits
9002 #define ADD7 SSP1ADDbits.ADD7 // bit 7, shadows bit in SSP1ADDbits
9004 #define SSP1BUF0 SSP1BUFbits.SSP1BUF0 // bit 0, shadows bit in SSP1BUFbits
9005 #define BUF0 SSP1BUFbits.BUF0 // bit 0, shadows bit in SSP1BUFbits
9006 #define SSP1BUF1 SSP1BUFbits.SSP1BUF1 // bit 1, shadows bit in SSP1BUFbits
9007 #define BUF1 SSP1BUFbits.BUF1 // bit 1, shadows bit in SSP1BUFbits
9008 #define SSP1BUF2 SSP1BUFbits.SSP1BUF2 // bit 2, shadows bit in SSP1BUFbits
9009 #define BUF2 SSP1BUFbits.BUF2 // bit 2, shadows bit in SSP1BUFbits
9010 #define SSP1BUF3 SSP1BUFbits.SSP1BUF3 // bit 3, shadows bit in SSP1BUFbits
9011 #define BUF3 SSP1BUFbits.BUF3 // bit 3, shadows bit in SSP1BUFbits
9012 #define SSP1BUF4 SSP1BUFbits.SSP1BUF4 // bit 4, shadows bit in SSP1BUFbits
9013 #define BUF4 SSP1BUFbits.BUF4 // bit 4, shadows bit in SSP1BUFbits
9014 #define SSP1BUF5 SSP1BUFbits.SSP1BUF5 // bit 5, shadows bit in SSP1BUFbits
9015 #define BUF5 SSP1BUFbits.BUF5 // bit 5, shadows bit in SSP1BUFbits
9016 #define SSP1BUF6 SSP1BUFbits.SSP1BUF6 // bit 6, shadows bit in SSP1BUFbits
9017 #define BUF6 SSP1BUFbits.BUF6 // bit 6, shadows bit in SSP1BUFbits
9018 #define SSP1BUF7 SSP1BUFbits.SSP1BUF7 // bit 7, shadows bit in SSP1BUFbits
9019 #define BUF7 SSP1BUFbits.BUF7 // bit 7, shadows bit in SSP1BUFbits
9021 #define SSPM0 SSP1CONbits.SSPM0 // bit 0
9022 #define SSPM1 SSP1CONbits.SSPM1 // bit 1
9023 #define SSPM2 SSP1CONbits.SSPM2 // bit 2
9024 #define SSPM3 SSP1CONbits.SSPM3 // bit 3
9025 #define CKP SSP1CONbits.CKP // bit 4
9026 #define SSPEN SSP1CONbits.SSPEN // bit 5
9027 #define SSPOV SSP1CONbits.SSPOV // bit 6
9028 #define WCOL SSP1CONbits.WCOL // bit 7
9030 #define SEN SSP1CON2bits.SEN // bit 0
9031 #define RSEN SSP1CON2bits.RSEN // bit 1
9032 #define PEN SSP1CON2bits.PEN // bit 2
9033 #define RCEN SSP1CON2bits.RCEN // bit 3
9034 #define ACKEN SSP1CON2bits.ACKEN // bit 4
9035 #define ACKDT SSP1CON2bits.ACKDT // bit 5
9036 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
9037 #define GCEN SSP1CON2bits.GCEN // bit 7
9039 #define DHEN SSP1CON3bits.DHEN // bit 0
9040 #define AHEN SSP1CON3bits.AHEN // bit 1
9041 #define SBCDE SSP1CON3bits.SBCDE // bit 2
9042 #define SDAHT SSP1CON3bits.SDAHT // bit 3
9043 #define BOEN SSP1CON3bits.BOEN // bit 4
9044 #define SCIE SSP1CON3bits.SCIE // bit 5
9045 #define PCIE SSP1CON3bits.PCIE // bit 6
9046 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
9048 #define SSP1MSK0 SSP1MSKbits.SSP1MSK0 // bit 0, shadows bit in SSP1MSKbits
9049 #define MSK0 SSP1MSKbits.MSK0 // bit 0, shadows bit in SSP1MSKbits
9050 #define SSP1MSK1 SSP1MSKbits.SSP1MSK1 // bit 1, shadows bit in SSP1MSKbits
9051 #define MSK1 SSP1MSKbits.MSK1 // bit 1, shadows bit in SSP1MSKbits
9052 #define SSP1MSK2 SSP1MSKbits.SSP1MSK2 // bit 2, shadows bit in SSP1MSKbits
9053 #define MSK2 SSP1MSKbits.MSK2 // bit 2, shadows bit in SSP1MSKbits
9054 #define SSP1MSK3 SSP1MSKbits.SSP1MSK3 // bit 3, shadows bit in SSP1MSKbits
9055 #define MSK3 SSP1MSKbits.MSK3 // bit 3, shadows bit in SSP1MSKbits
9056 #define SSP1MSK4 SSP1MSKbits.SSP1MSK4 // bit 4, shadows bit in SSP1MSKbits
9057 #define MSK4 SSP1MSKbits.MSK4 // bit 4, shadows bit in SSP1MSKbits
9058 #define SSP1MSK5 SSP1MSKbits.SSP1MSK5 // bit 5, shadows bit in SSP1MSKbits
9059 #define MSK5 SSP1MSKbits.MSK5 // bit 5, shadows bit in SSP1MSKbits
9060 #define SSP1MSK6 SSP1MSKbits.SSP1MSK6 // bit 6, shadows bit in SSP1MSKbits
9061 #define MSK6 SSP1MSKbits.MSK6 // bit 6, shadows bit in SSP1MSKbits
9062 #define SSP1MSK7 SSP1MSKbits.SSP1MSK7 // bit 7, shadows bit in SSP1MSKbits
9063 #define MSK7 SSP1MSKbits.MSK7 // bit 7, shadows bit in SSP1MSKbits
9065 #define BF SSP1STATbits.BF // bit 0
9066 #define UA SSP1STATbits.UA // bit 1
9067 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
9068 #define S SSP1STATbits.S // bit 3
9069 #define P SSP1STATbits.P // bit 4
9070 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
9071 #define CKE SSP1STATbits.CKE // bit 6
9072 #define SMP SSP1STATbits.SMP // bit 7
9074 #define C STATUSbits.C // bit 0
9075 #define DC STATUSbits.DC // bit 1
9076 #define Z STATUSbits.Z // bit 2
9077 #define NOT_PD STATUSbits.NOT_PD // bit 3
9078 #define NOT_TO STATUSbits.NOT_TO // bit 4
9080 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
9081 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
9082 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
9084 #define TMR1ON T1CONbits.TMR1ON // bit 0
9085 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
9086 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
9087 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
9088 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
9089 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
9090 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
9092 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
9093 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
9094 #define T1GVAL T1GCONbits.T1GVAL // bit 2
9095 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
9096 #define T1GSPM T1GCONbits.T1GSPM // bit 4
9097 #define T1GTM T1GCONbits.T1GTM // bit 5
9098 #define T1GPOL T1GCONbits.T1GPOL // bit 6
9099 #define TMR1GE T1GCONbits.TMR1GE // bit 7
9101 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
9102 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
9103 #define TMR2ON T2CONbits.TMR2ON // bit 2
9104 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
9105 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
9106 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
9107 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
9109 #define T4CKPS0 T4CONbits.T4CKPS0 // bit 0
9110 #define T4CKPS1 T4CONbits.T4CKPS1 // bit 1
9111 #define TMR4ON T4CONbits.TMR4ON // bit 2
9112 #define T4OUTPS0 T4CONbits.T4OUTPS0 // bit 3
9113 #define T4OUTPS1 T4CONbits.T4OUTPS1 // bit 4
9114 #define T4OUTPS2 T4CONbits.T4OUTPS2 // bit 5
9115 #define T4OUTPS3 T4CONbits.T4OUTPS3 // bit 6
9117 #define T6CKPS0 T6CONbits.T6CKPS0 // bit 0
9118 #define T6CKPS1 T6CONbits.T6CKPS1 // bit 1
9119 #define TMR6ON T6CONbits.TMR6ON // bit 2
9120 #define T6OUTPS0 T6CONbits.T6OUTPS0 // bit 3
9121 #define T6OUTPS1 T6CONbits.T6OUTPS1 // bit 4
9122 #define T6OUTPS2 T6CONbits.T6OUTPS2 // bit 5
9123 #define T6OUTPS3 T6CONbits.T6OUTPS3 // bit 6
9125 #define TRISA0 TRISAbits.TRISA0 // bit 0
9126 #define TRISA1 TRISAbits.TRISA1 // bit 1
9127 #define TRISA2 TRISAbits.TRISA2 // bit 2
9128 #define TRISA3 TRISAbits.TRISA3 // bit 3
9129 #define TRISA4 TRISAbits.TRISA4 // bit 4
9130 #define TRISA5 TRISAbits.TRISA5 // bit 5
9131 #define TRISA6 TRISAbits.TRISA6 // bit 6
9132 #define TRISA7 TRISAbits.TRISA7 // bit 7
9134 #define TRISB0 TRISBbits.TRISB0 // bit 0
9135 #define TRISB1 TRISBbits.TRISB1 // bit 1
9136 #define TRISB2 TRISBbits.TRISB2 // bit 2
9137 #define TRISB3 TRISBbits.TRISB3 // bit 3
9138 #define TRISB4 TRISBbits.TRISB4 // bit 4
9139 #define TRISB5 TRISBbits.TRISB5 // bit 5
9140 #define TRISB6 TRISBbits.TRISB6 // bit 6
9141 #define TRISB7 TRISBbits.TRISB7 // bit 7
9143 #define TRISC0 TRISCbits.TRISC0 // bit 0
9144 #define TRISC1 TRISCbits.TRISC1 // bit 1
9145 #define TRISC2 TRISCbits.TRISC2 // bit 2
9146 #define TRISC3 TRISCbits.TRISC3 // bit 3
9147 #define TRISC4 TRISCbits.TRISC4 // bit 4
9148 #define TRISC5 TRISCbits.TRISC5 // bit 5
9149 #define TRISC6 TRISCbits.TRISC6 // bit 6
9150 #define TRISC7 TRISCbits.TRISC7 // bit 7
9152 #define TRISE3 TRISEbits.TRISE3 // bit 3
9154 #define TX9D TX1STAbits.TX9D // bit 0
9155 #define TRMT TX1STAbits.TRMT // bit 1
9156 #define BRGH TX1STAbits.BRGH // bit 2
9157 #define SENDB TX1STAbits.SENDB // bit 3
9158 #define SYNC TX1STAbits.SYNC // bit 4
9159 #define TXEN TX1STAbits.TXEN // bit 5
9160 #define TX9 TX1STAbits.TX9 // bit 6
9161 #define CSRC TX1STAbits.CSRC // bit 7
9163 #define SWDTEN WDTCONbits.SWDTEN // bit 0
9164 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
9165 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
9166 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
9167 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
9168 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
9170 #define WPUA0 WPUAbits.WPUA0 // bit 0
9171 #define WPUA1 WPUAbits.WPUA1 // bit 1
9172 #define WPUA2 WPUAbits.WPUA2 // bit 2
9173 #define WPUA3 WPUAbits.WPUA3 // bit 3
9174 #define WPUA4 WPUAbits.WPUA4 // bit 4
9175 #define WPUA5 WPUAbits.WPUA5 // bit 5
9176 #define WPUA6 WPUAbits.WPUA6 // bit 6
9177 #define WPUA7 WPUAbits.WPUA7 // bit 7
9179 #define WPUB0 WPUBbits.WPUB0 // bit 0
9180 #define WPUB1 WPUBbits.WPUB1 // bit 1
9181 #define WPUB2 WPUBbits.WPUB2 // bit 2
9182 #define WPUB3 WPUBbits.WPUB3 // bit 3
9183 #define WPUB4 WPUBbits.WPUB4 // bit 4
9184 #define WPUB5 WPUBbits.WPUB5 // bit 5
9185 #define WPUB6 WPUBbits.WPUB6 // bit 6
9186 #define WPUB7 WPUBbits.WPUB7 // bit 7
9188 #define WPUC0 WPUCbits.WPUC0 // bit 0
9189 #define WPUC1 WPUCbits.WPUC1 // bit 1
9190 #define WPUC2 WPUCbits.WPUC2 // bit 2
9191 #define WPUC3 WPUCbits.WPUC3 // bit 3
9192 #define WPUC4 WPUCbits.WPUC4 // bit 4
9193 #define WPUC5 WPUCbits.WPUC5 // bit 5
9194 #define WPUC6 WPUCbits.WPUC6 // bit 6
9195 #define WPUC7 WPUCbits.WPUC7 // bit 7
9197 #define WPUE3 WPUEbits.WPUE3 // bit 3
9199 #define ZCD1INTN ZCD1CONbits.ZCD1INTN // bit 0
9200 #define ZCD1INTP ZCD1CONbits.ZCD1INTP // bit 1
9201 #define ZCD1POL ZCD1CONbits.ZCD1POL // bit 4
9202 #define ZCD1OUT ZCD1CONbits.ZCD1OUT // bit 5
9203 #define ZCD1EN ZCD1CONbits.ZCD1EN // bit 7
9205 #endif // #ifndef NO_BIT_DEFINES
9207 #endif // #ifndef __PIC16LF1718_H__