2 * This declarations of the PIC16LF1777 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:16 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16LF1777_H__
26 #define __PIC16LF1777_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PORTD_ADDR 0x000F
54 #define PORTE_ADDR 0x0010
55 #define PIR1_ADDR 0x0011
56 #define PIR2_ADDR 0x0012
57 #define PIR3_ADDR 0x0013
58 #define PIR4_ADDR 0x0014
59 #define PIR5_ADDR 0x0015
60 #define PIR6_ADDR 0x0016
61 #define TMR0_ADDR 0x0017
62 #define TMR1_ADDR 0x0018
63 #define TMR1L_ADDR 0x0018
64 #define TMR1H_ADDR 0x0019
65 #define T1CON_ADDR 0x001A
66 #define T1GCON_ADDR 0x001B
67 #define TMR3_ADDR 0x001C
68 #define TMR3L_ADDR 0x001C
69 #define TMR3H_ADDR 0x001D
70 #define T3CON_ADDR 0x001E
71 #define T3GCON_ADDR 0x001F
72 #define TRISA_ADDR 0x008C
73 #define TRISB_ADDR 0x008D
74 #define TRISC_ADDR 0x008E
75 #define TRISD_ADDR 0x008F
76 #define TRISE_ADDR 0x0090
77 #define PIE1_ADDR 0x0091
78 #define PIE2_ADDR 0x0092
79 #define PIE3_ADDR 0x0093
80 #define PIE4_ADDR 0x0094
81 #define PIE5_ADDR 0x0095
82 #define PIE6_ADDR 0x0096
83 #define OPTION_REG_ADDR 0x0097
84 #define PCON_ADDR 0x0098
85 #define WDTCON_ADDR 0x0099
86 #define OSCTUNE_ADDR 0x009A
87 #define OSCCON_ADDR 0x009B
88 #define OSCSTAT_ADDR 0x009C
89 #define BORCON_ADDR 0x009D
90 #define FVRCON_ADDR 0x009E
91 #define ZCD1CON_ADDR 0x009F
92 #define LATA_ADDR 0x010C
93 #define LATB_ADDR 0x010D
94 #define LATC_ADDR 0x010E
95 #define LATD_ADDR 0x010F
96 #define LATE_ADDR 0x0110
97 #define CMOUT_ADDR 0x0111
98 #define CM1CON0_ADDR 0x0112
99 #define CM1CON1_ADDR 0x0113
100 #define CM1NSEL_ADDR 0x0114
101 #define CM1PSEL_ADDR 0x0115
102 #define CM2CON0_ADDR 0x0116
103 #define CM2CON1_ADDR 0x0117
104 #define CM2NSEL_ADDR 0x0118
105 #define CM2PSEL_ADDR 0x0119
106 #define CM3CON0_ADDR 0x011A
107 #define CM3CON1_ADDR 0x011B
108 #define CM3NSEL_ADDR 0x011C
109 #define CM3PSEL_ADDR 0x011D
110 #define ANSELA_ADDR 0x018C
111 #define ANSELB_ADDR 0x018D
112 #define ANSELC_ADDR 0x018E
113 #define ANSELD_ADDR 0x018F
114 #define ANSELE_ADDR 0x0190
115 #define PMADR_ADDR 0x0191
116 #define PMADRL_ADDR 0x0191
117 #define PMADRH_ADDR 0x0192
118 #define PMDAT_ADDR 0x0193
119 #define PMDATL_ADDR 0x0193
120 #define PMDATH_ADDR 0x0194
121 #define PMCON1_ADDR 0x0195
122 #define PMCON2_ADDR 0x0196
123 #define RC1REG_ADDR 0x0199
124 #define RCREG_ADDR 0x0199
125 #define RCREG1_ADDR 0x0199
126 #define TX1REG_ADDR 0x019A
127 #define TXREG_ADDR 0x019A
128 #define TXREG1_ADDR 0x019A
129 #define SP1BRG_ADDR 0x019B
130 #define SP1BRGL_ADDR 0x019B
131 #define SPBRG_ADDR 0x019B
132 #define SPBRG1_ADDR 0x019B
133 #define SPBRGL_ADDR 0x019B
134 #define SP1BRGH_ADDR 0x019C
135 #define SPBRGH_ADDR 0x019C
136 #define SPBRGH1_ADDR 0x019C
137 #define RC1STA_ADDR 0x019D
138 #define RCSTA_ADDR 0x019D
139 #define RCSTA1_ADDR 0x019D
140 #define TX1STA_ADDR 0x019E
141 #define TXSTA_ADDR 0x019E
142 #define TXSTA1_ADDR 0x019E
143 #define BAUD1CON_ADDR 0x019F
144 #define BAUDCON_ADDR 0x019F
145 #define BAUDCON1_ADDR 0x019F
146 #define BAUDCTL_ADDR 0x019F
147 #define BAUDCTL1_ADDR 0x019F
148 #define WPUA_ADDR 0x020C
149 #define WPUB_ADDR 0x020D
150 #define WPUC_ADDR 0x020E
151 #define WPUD_ADDR 0x020F
152 #define WPUE_ADDR 0x0210
153 #define SSP1BUF_ADDR 0x0211
154 #define SSPBUF_ADDR 0x0211
155 #define SSP1ADD_ADDR 0x0212
156 #define SSPADD_ADDR 0x0212
157 #define SSP1MSK_ADDR 0x0213
158 #define SSPMSK_ADDR 0x0213
159 #define SSP1STAT_ADDR 0x0214
160 #define SSPSTAT_ADDR 0x0214
161 #define SSP1CON_ADDR 0x0215
162 #define SSP1CON1_ADDR 0x0215
163 #define SSPCON_ADDR 0x0215
164 #define SSPCON1_ADDR 0x0215
165 #define SSP1CON2_ADDR 0x0216
166 #define SSPCON2_ADDR 0x0216
167 #define SSP1CON3_ADDR 0x0217
168 #define SSPCON3_ADDR 0x0217
169 #define MD3CON0_ADDR 0x021B
170 #define MD3CON1_ADDR 0x021C
171 #define MD3SRC_ADDR 0x021D
172 #define MD3CARL_ADDR 0x021E
173 #define MD3CARH_ADDR 0x021F
174 #define ODCONA_ADDR 0x028C
175 #define ODCONB_ADDR 0x028D
176 #define ODCONC_ADDR 0x028E
177 #define ODCOND_ADDR 0x028F
178 #define ODCONE_ADDR 0x0290
179 #define CCPR1_ADDR 0x0291
180 #define CCPR1L_ADDR 0x0291
181 #define CCPR1H_ADDR 0x0292
182 #define CCP1CON_ADDR 0x0293
183 #define CCP1CAP_ADDR 0x0294
184 #define CCPR2_ADDR 0x0295
185 #define CCPR2L_ADDR 0x0295
186 #define CCPR2H_ADDR 0x0296
187 #define CCP2CON_ADDR 0x0297
188 #define CCP2CAP_ADDR 0x0298
189 #define CCPR7_ADDR 0x0299
190 #define CCPR7L_ADDR 0x0299
191 #define CCPR7H_ADDR 0x029A
192 #define CCP7CON_ADDR 0x029B
193 #define CCP7CAP_ADDR 0x029C
194 #define CCPTMRS1_ADDR 0x029E
195 #define CCPTMRS2_ADDR 0x029F
196 #define SLRCONA_ADDR 0x030C
197 #define SLRCONB_ADDR 0x030D
198 #define SLRCONC_ADDR 0x030E
199 #define SLRCOND_ADDR 0x030F
200 #define SLRCONE_ADDR 0x0310
201 #define CCPR8_ADDR 0x0311
202 #define CCPR8L_ADDR 0x0311
203 #define CCPR8H_ADDR 0x0312
204 #define CCP8CON_ADDR 0x0313
205 #define CCP8CAP_ADDR 0x0314
206 #define MD1CON0_ADDR 0x0315
207 #define MD1CON1_ADDR 0x0316
208 #define MD1SRC_ADDR 0x0317
209 #define MD1CARL_ADDR 0x0318
210 #define MD1CARH_ADDR 0x0319
211 #define MD2CON0_ADDR 0x031B
212 #define MD2CON1_ADDR 0x031C
213 #define MD2SRC_ADDR 0x031D
214 #define MD2CARL_ADDR 0x031E
215 #define MD2CARH_ADDR 0x031F
216 #define INLVLA_ADDR 0x038C
217 #define INLVLB_ADDR 0x038D
218 #define INLVLC_ADDR 0x038E
219 #define INLVLD_ADDR 0x038F
220 #define INLVE_ADDR 0x0390
221 #define IOCAP_ADDR 0x0391
222 #define IOCAN_ADDR 0x0392
223 #define IOCAF_ADDR 0x0393
224 #define IOCBP_ADDR 0x0394
225 #define IOCBN_ADDR 0x0395
226 #define IOCBF_ADDR 0x0396
227 #define IOCCP_ADDR 0x0397
228 #define IOCCN_ADDR 0x0398
229 #define IOCCF_ADDR 0x0399
230 #define IOCEP_ADDR 0x039D
231 #define IOCEN_ADDR 0x039E
232 #define IOCEF_ADDR 0x039F
233 #define HIDRVB_ADDR 0x040D
234 #define TMR5_ADDR 0x040F
235 #define TMR5L_ADDR 0x040F
236 #define TMR5H_ADDR 0x0410
237 #define T5CON_ADDR 0x0411
238 #define T5GCON_ADDR 0x0412
239 #define T4TMR_ADDR 0x0413
240 #define TMR4_ADDR 0x0413
241 #define PR4_ADDR 0x0414
242 #define T4PR_ADDR 0x0414
243 #define T4CON_ADDR 0x0415
244 #define T4HLT_ADDR 0x0416
245 #define T4CLKCON_ADDR 0x0417
246 #define T4RST_ADDR 0x0418
247 #define T6TMR_ADDR 0x041A
248 #define TMR6_ADDR 0x041A
249 #define PR6_ADDR 0x041B
250 #define T6PR_ADDR 0x041B
251 #define T6CON_ADDR 0x041C
252 #define T6HLT_ADDR 0x041D
253 #define T6CLKCON_ADDR 0x041E
254 #define T6RST_ADDR 0x041F
255 #define ADRESL_ADDR 0x048E
256 #define ADRESH_ADDR 0x048F
257 #define ADCON0_ADDR 0x0490
258 #define ADCON1_ADDR 0x0491
259 #define ADCON2_ADDR 0x0492
260 #define T2TMR_ADDR 0x0493
261 #define TMR2_ADDR 0x0493
262 #define PR2_ADDR 0x0494
263 #define T2PR_ADDR 0x0494
264 #define T2CON_ADDR 0x0495
265 #define T2HLT_ADDR 0x0496
266 #define T2CLKCON_ADDR 0x0497
267 #define T2RST_ADDR 0x0498
268 #define T8TMR_ADDR 0x049A
269 #define TMR8_ADDR 0x049A
270 #define PR8_ADDR 0x049B
271 #define T8PR_ADDR 0x049B
272 #define T8CON_ADDR 0x049C
273 #define T8HLT_ADDR 0x049D
274 #define T8CLKCON_ADDR 0x049E
275 #define T8RST_ADDR 0x049F
276 #define OPA1NCHS_ADDR 0x050F
277 #define OPA1PCHS_ADDR 0x0510
278 #define OPA1CON_ADDR 0x0511
279 #define OPA1ORS_ADDR 0x0512
280 #define OPA2NCHS_ADDR 0x0513
281 #define OPA2PCHS_ADDR 0x0514
282 #define OPA2CON_ADDR 0x0515
283 #define OPA2ORS_ADDR 0x0516
284 #define OPA3NCHS_ADDR 0x0517
285 #define OPA3PCHS_ADDR 0x0518
286 #define OPA3CON_ADDR 0x0519
287 #define OPA3ORS_ADDR 0x051A
288 #define OPA4NCHS_ADDR 0x051B
289 #define OPA4PCHS_ADDR 0x051C
290 #define OPA4CON_ADDR 0x051D
291 #define OPA4ORS_ADDR 0x051E
292 #define DACLD_ADDR 0x058D
293 #define DAC1CON0_ADDR 0x058E
294 #define DAC1CON1_ADDR 0x058F
295 #define DAC1REF_ADDR 0x058F
296 #define DAC1REFL_ADDR 0x058F
297 #define DAC1CON2_ADDR 0x0590
298 #define DAC1REFH_ADDR 0x0590
299 #define DAC2CON0_ADDR 0x0591
300 #define DAC2CON1_ADDR 0x0592
301 #define DAC2REF_ADDR 0x0592
302 #define DAC2REFL_ADDR 0x0592
303 #define DAC2CON2_ADDR 0x0593
304 #define DAC2REFH_ADDR 0x0593
305 #define DAC3CON0_ADDR 0x0594
306 #define DAC3CON1_ADDR 0x0595
307 #define DAC3REF_ADDR 0x0595
308 #define DAC4CON0_ADDR 0x0596
309 #define DAC4CON1_ADDR 0x0597
310 #define DAC4REF_ADDR 0x0597
311 #define DAC5CON0_ADDR 0x0598
312 #define DAC5CON1_ADDR 0x0599
313 #define DAC5REF_ADDR 0x0599
314 #define DAC5REFL_ADDR 0x0599
315 #define DAC5CON2_ADDR 0x059A
316 #define DAC5REFH_ADDR 0x059A
317 #define DAC6CON0_ADDR 0x059B
318 #define DAC6CON1_ADDR 0x059C
319 #define DAC6REF_ADDR 0x059C
320 #define DAC6REFL_ADDR 0x059C
321 #define DAC6CON2_ADDR 0x059D
322 #define DAC6REFH_ADDR 0x059D
323 #define DAC7CON0_ADDR 0x059E
324 #define DAC7CON1_ADDR 0x059F
325 #define DAC7REF_ADDR 0x059F
326 #define DAC8CON0_ADDR 0x060C
327 #define DAC8CON1_ADDR 0x060D
328 #define DAC8REF_ADDR 0x060D
329 #define PRG4RTSS_ADDR 0x060E
330 #define PRG4FTSS_ADDR 0x060F
331 #define PRG4INS_ADDR 0x0610
332 #define PRG4CON0_ADDR 0x0611
333 #define PRG4CON1_ADDR 0x0612
334 #define PRG4CON2_ADDR 0x0613
335 #define PWM3DCL_ADDR 0x0614
336 #define PWM3DCH_ADDR 0x0615
337 #define PWM3CON_ADDR 0x0616
338 #define PWM4DCL_ADDR 0x0617
339 #define PWM4DCH_ADDR 0x0618
340 #define PWM4CON_ADDR 0x0619
341 #define PWM9DCL_ADDR 0x061A
342 #define PWM9DCH_ADDR 0x061B
343 #define PWM9CON_ADDR 0x061C
344 #define PWM10DCL_ADDR 0x061D
345 #define PWM10DCH_ADDR 0x061E
346 #define PWM10CON_ADDR 0x061F
347 #define COG1PHR_ADDR 0x068D
348 #define COG1PHF_ADDR 0x068E
349 #define COG1BLKR_ADDR 0x068F
350 #define COG1BLKF_ADDR 0x0690
351 #define COG1DBR_ADDR 0x0691
352 #define COG1DBF_ADDR 0x0692
353 #define COG1CON0_ADDR 0x0693
354 #define COG1CON1_ADDR 0x0694
355 #define COG1RIS0_ADDR 0x0695
356 #define COG1RIS1_ADDR 0x0696
357 #define COG1RSIM0_ADDR 0x0697
358 #define COG1RSIM1_ADDR 0x0698
359 #define COG1FIS0_ADDR 0x0699
360 #define COG1FIS1_ADDR 0x069A
361 #define COG1FSIM0_ADDR 0x069B
362 #define COG1FSIM1_ADDR 0x069C
363 #define COG1ASD0_ADDR 0x069D
364 #define COG1ASD1_ADDR 0x069E
365 #define COG1STR_ADDR 0x069F
366 #define COG2PHR_ADDR 0x070D
367 #define COG2PHF_ADDR 0x070E
368 #define COG2BLKR_ADDR 0x070F
369 #define COG2BLKF_ADDR 0x0710
370 #define COG2DBR_ADDR 0x0711
371 #define COG2DBF_ADDR 0x0712
372 #define COG2CON0_ADDR 0x0713
373 #define COG2CON1_ADDR 0x0714
374 #define COG2RIS0_ADDR 0x0715
375 #define COG2RIS1_ADDR 0x0716
376 #define COG2RSIM0_ADDR 0x0717
377 #define COG2RSIM1_ADDR 0x0718
378 #define COG2FIS0_ADDR 0x0719
379 #define COG2FIS1_ADDR 0x071A
380 #define COG2FSIM0_ADDR 0x071B
381 #define COG2FSIM1_ADDR 0x071C
382 #define COG2ASD0_ADDR 0x071D
383 #define COG2ASD1_ADDR 0x071E
384 #define COG2STR_ADDR 0x071F
385 #define PRG1RTSS_ADDR 0x078E
386 #define PRG1FTSS_ADDR 0x078F
387 #define PRG1INS_ADDR 0x0790
388 #define PRG1CON0_ADDR 0x0791
389 #define PRG1CON1_ADDR 0x0792
390 #define PRG1CON2_ADDR 0x0793
391 #define PRG2RTSS_ADDR 0x0794
392 #define PRG2FTSS_ADDR 0x0795
393 #define PRG2INS_ADDR 0x0796
394 #define PRG2CON0_ADDR 0x0797
395 #define PRG2CON1_ADDR 0x0798
396 #define PRG2CON2_ADDR 0x0799
397 #define PRG3RTSS_ADDR 0x079A
398 #define PRG3FTSS_ADDR 0x079B
399 #define PRG3INS_ADDR 0x079C
400 #define PRG3CON0_ADDR 0x079D
401 #define PRG3CON1_ADDR 0x079E
402 #define PRG3CON2_ADDR 0x079F
403 #define COG3PHR_ADDR 0x080D
404 #define COG3PHF_ADDR 0x080E
405 #define COG3BLKR_ADDR 0x080F
406 #define COG3BLKF_ADDR 0x0810
407 #define COG3DBR_ADDR 0x0811
408 #define COG3DBF_ADDR 0x0812
409 #define COG3CON0_ADDR 0x0813
410 #define COG3CON1_ADDR 0x0814
411 #define COG3RIS0_ADDR 0x0815
412 #define COG3RIS1_ADDR 0x0816
413 #define COG3RSIM0_ADDR 0x0817
414 #define COG3RSIM1_ADDR 0x0818
415 #define COG3FIS0_ADDR 0x0819
416 #define COG3FIS1_ADDR 0x081A
417 #define COG3FSIM0_ADDR 0x081B
418 #define COG3FSIM1_ADDR 0x081C
419 #define COG3ASD0_ADDR 0x081D
420 #define COG3ASD1_ADDR 0x081E
421 #define COG3STR_ADDR 0x081F
422 #define COG4PHR_ADDR 0x088D
423 #define COG4PHF_ADDR 0x088E
424 #define COG4BLKR_ADDR 0x088F
425 #define COG4BLKF_ADDR 0x0890
426 #define COG4DBR_ADDR 0x0891
427 #define COG4DBF_ADDR 0x0892
428 #define COG4CON0_ADDR 0x0893
429 #define COG4CON1_ADDR 0x0894
430 #define COG4RIS0_ADDR 0x0895
431 #define COG4RIS1_ADDR 0x0896
432 #define COG4RSIM0_ADDR 0x0897
433 #define COG4RSIM1_ADDR 0x0898
434 #define COG4FIS0_ADDR 0x0899
435 #define COG4FIS1_ADDR 0x089A
436 #define COG4FSIM0_ADDR 0x089B
437 #define COG4FSIM1_ADDR 0x089C
438 #define COG4ASD0_ADDR 0x089D
439 #define COG4ASD1_ADDR 0x089E
440 #define COG4STR_ADDR 0x089F
441 #define CM4CON0_ADDR 0x090C
442 #define CM4CON1_ADDR 0x090D
443 #define CM4NSEL_ADDR 0x090E
444 #define CM4PSEL_ADDR 0x090F
445 #define CM5CON0_ADDR 0x0910
446 #define CM5CON1_ADDR 0x0911
447 #define CM5NSEL_ADDR 0x0912
448 #define CM5PSEL_ADDR 0x0913
449 #define CM6CON0_ADDR 0x0914
450 #define CM6CON1_ADDR 0x0915
451 #define CM6NSEL_ADDR 0x0916
452 #define CM6PSEL_ADDR 0x0917
453 #define CM7CON0_ADDR 0x0918
454 #define CM7CON1_ADDR 0x0919
455 #define CM7NSEL_ADDR 0x091A
456 #define CM7PSEL_ADDR 0x091B
457 #define CM8CON0_ADDR 0x091C
458 #define CM8CON1_ADDR 0x091D
459 #define CM8NSEL_ADDR 0x091E
460 #define CM8PSEL_ADDR 0x091F
461 #define MD4CON0_ADDR 0x0D1B
462 #define MD4CON1_ADDR 0x0D1C
463 #define MD4SRC_ADDR 0x0D1D
464 #define MD4CARL_ADDR 0x0D1E
465 #define MD4CARH_ADDR 0x0D1F
466 #define PWMEN_ADDR 0x0D8E
467 #define PWMLD_ADDR 0x0D8F
468 #define PWMOUT_ADDR 0x0D90
469 #define PWM5PH_ADDR 0x0D91
470 #define PWM5PHL_ADDR 0x0D91
471 #define PWM5PHH_ADDR 0x0D92
472 #define PWM5DC_ADDR 0x0D93
473 #define PWM5DCL_ADDR 0x0D93
474 #define PWM5DCH_ADDR 0x0D94
475 #define PWM5PR_ADDR 0x0D95
476 #define PWM5PRL_ADDR 0x0D95
477 #define PWM5PRH_ADDR 0x0D96
478 #define PWM5OF_ADDR 0x0D97
479 #define PWM5OFL_ADDR 0x0D97
480 #define PWM5OFH_ADDR 0x0D98
481 #define PWM5TMR_ADDR 0x0D99
482 #define PWM5TMRL_ADDR 0x0D99
483 #define PWM5TMRH_ADDR 0x0D9A
484 #define PWM5CON_ADDR 0x0D9B
485 #define PWM5INTCON_ADDR 0x0D9C
486 #define PWM5INTE_ADDR 0x0D9C
487 #define PWM5INTF_ADDR 0x0D9D
488 #define PWM5INTFLG_ADDR 0x0D9D
489 #define PWM5CLKCON_ADDR 0x0D9E
490 #define PWM5LDCON_ADDR 0x0D9F
491 #define PWM5OFCON_ADDR 0x0DA0
492 #define PWM6PH_ADDR 0x0DA1
493 #define PWM6PHL_ADDR 0x0DA1
494 #define PWM6PHH_ADDR 0x0DA2
495 #define PWM6DC_ADDR 0x0DA3
496 #define PWM6DCL_ADDR 0x0DA3
497 #define PWM6DCH_ADDR 0x0DA4
498 #define PWM6PR_ADDR 0x0DA5
499 #define PWM6PRL_ADDR 0x0DA5
500 #define PWM6PRH_ADDR 0x0DA6
501 #define PWM6OF_ADDR 0x0DA7
502 #define PWM6OFL_ADDR 0x0DA7
503 #define PWM6OFH_ADDR 0x0DA8
504 #define PWM6TMR_ADDR 0x0DA9
505 #define PWM6TMRL_ADDR 0x0DA9
506 #define PWM6TMRH_ADDR 0x0DAA
507 #define PWM6CON_ADDR 0x0DAB
508 #define PWM6INTCON_ADDR 0x0DAC
509 #define PWM6INTE_ADDR 0x0DAC
510 #define PWM6INTF_ADDR 0x0DAD
511 #define PWM6INTFLG_ADDR 0x0DAD
512 #define PWM6CLKCON_ADDR 0x0DAE
513 #define PWM6LDCON_ADDR 0x0DAF
514 #define PWM6OFCON_ADDR 0x0DB0
515 #define PWM11PH_ADDR 0x0DB1
516 #define PWM11PHL_ADDR 0x0DB1
517 #define PWM11PHH_ADDR 0x0DB2
518 #define PWM11DC_ADDR 0x0DB3
519 #define PWM11DCL_ADDR 0x0DB3
520 #define PWM11DCH_ADDR 0x0DB4
521 #define PWM11PR_ADDR 0x0DB5
522 #define PWM11PRL_ADDR 0x0DB5
523 #define PWM11PRH_ADDR 0x0DB6
524 #define PWM11OF_ADDR 0x0DB7
525 #define PWM11OFL_ADDR 0x0DB7
526 #define PWM11OFH_ADDR 0x0DB8
527 #define PWM11TMR_ADDR 0x0DB9
528 #define PWM11TMRL_ADDR 0x0DB9
529 #define PWM11TMRH_ADDR 0x0DBA
530 #define PWM11CON_ADDR 0x0DBB
531 #define PWM11INTCON_ADDR 0x0DBC
532 #define PWM11INTE_ADDR 0x0DBC
533 #define PWM11INTF_ADDR 0x0DBD
534 #define PWM11INTFLG_ADDR 0x0DBD
535 #define PWM11CLKCON_ADDR 0x0DBE
536 #define PWM11LDCON_ADDR 0x0DBF
537 #define PWM11OFCON_ADDR 0x0DC0
538 #define PWM12PH_ADDR 0x0DC1
539 #define PWM12PHL_ADDR 0x0DC1
540 #define PWM12PHH_ADDR 0x0DC2
541 #define PWM12DC_ADDR 0x0DC3
542 #define PWM12DCL_ADDR 0x0DC3
543 #define PWM12DCH_ADDR 0x0DC4
544 #define PWM12PR_ADDR 0x0DC5
545 #define PWM12PRL_ADDR 0x0DC5
546 #define PWM12PRH_ADDR 0x0DC6
547 #define PWM12OF_ADDR 0x0DC7
548 #define PWM12OFL_ADDR 0x0DC7
549 #define PWM12OFH_ADDR 0x0DC8
550 #define PWM12TMR_ADDR 0x0DC9
551 #define PWM12TMRL_ADDR 0x0DC9
552 #define PWM12TMRH_ADDR 0x0DCA
553 #define PWM12CON_ADDR 0x0DCB
554 #define PWM12INTCON_ADDR 0x0DCC
555 #define PWM12INTE_ADDR 0x0DCC
556 #define PWM12INTF_ADDR 0x0DCD
557 #define PWM12INTFLG_ADDR 0x0DCD
558 #define PWM12CLKCON_ADDR 0x0DCE
559 #define PWM12LDCON_ADDR 0x0DCF
560 #define PWM12OFCON_ADDR 0x0DD0
561 #define PPSLOCK_ADDR 0x0E0C
562 #define INTPPS_ADDR 0x0E0D
563 #define T0CKIPPS_ADDR 0x0E0E
564 #define T1CKIPPS_ADDR 0x0E0F
565 #define T1GPPS_ADDR 0x0E10
566 #define T3CKIPPS_ADDR 0x0E11
567 #define T3GPPS_ADDR 0x0E12
568 #define T5CKIPPS_ADDR 0x0E13
569 #define T5GPPS_ADDR 0x0E14
570 #define T2CKIPPS_ADDR 0x0E15
571 #define T4CKIPPS_ADDR 0x0E16
572 #define T6CKIPPS_ADDR 0x0E17
573 #define T8CKIPPS_ADDR 0x0E18
574 #define CCP1PPS_ADDR 0x0E19
575 #define CCP2PPS_ADDR 0x0E1A
576 #define CCP7PPS_ADDR 0x0E1B
577 #define CCP8PPS_ADDR 0x0E1C
578 #define COG1INPPS_ADDR 0x0E1D
579 #define COG2INPPS_ADDR 0x0E1E
580 #define COG3INPPS_ADDR 0x0E1F
581 #define COG4INPPS_ADDR 0x0E20
582 #define MD1CLPPS_ADDR 0x0E21
583 #define MD1CHPPS_ADDR 0x0E22
584 #define MD1MODPPS_ADDR 0x0E23
585 #define MD2CLPPS_ADDR 0x0E24
586 #define MD2CHPPS_ADDR 0x0E25
587 #define MD2MODPPS_ADDR 0x0E26
588 #define MD3CLPPS_ADDR 0x0E27
589 #define MD3CHPPS_ADDR 0x0E28
590 #define MD3MODPPS_ADDR 0x0E29
591 #define MD4CLPPS_ADDR 0x0E2A
592 #define MD4CHPPS_ADDR 0x0E2B
593 #define MD4MODPPS_ADDR 0x0E2C
594 #define PRG1RPPS_ADDR 0x0E2D
595 #define PRG1FPPS_ADDR 0x0E2E
596 #define PRG2RPPS_ADDR 0x0E2F
597 #define PRG2FPPS_ADDR 0x0E30
598 #define PRG3RPPS_ADDR 0x0E31
599 #define PRG3FPPS_ADDR 0x0E32
600 #define PRG4RPPS_ADDR 0x0E33
601 #define PRG4FPPS_ADDR 0x0E34
602 #define CLCIN0PPS_ADDR 0x0E35
603 #define CLCIN1PPS_ADDR 0x0E36
604 #define CLCIN2PPS_ADDR 0x0E37
605 #define CLCIN3PPS_ADDR 0x0E38
606 #define ADCACTPPS_ADDR 0x0E39
607 #define SSPCLKPPS_ADDR 0x0E3A
608 #define SSPDATPPS_ADDR 0x0E3B
609 #define SSPSSPPS_ADDR 0x0E3C
610 #define RXPPS_ADDR 0x0E3D
611 #define CKPPS_ADDR 0x0E3E
612 #define RA0PPS_ADDR 0x0E90
613 #define RA1PPS_ADDR 0x0E91
614 #define RA2PPS_ADDR 0x0E92
615 #define RA3PPS_ADDR 0x0E93
616 #define RA4PPS_ADDR 0x0E94
617 #define RA5PPS_ADDR 0x0E95
618 #define RA6PPS_ADDR 0x0E96
619 #define RA7PPS_ADDR 0x0E97
620 #define RB0PPS_ADDR 0x0E98
621 #define RB1PPS_ADDR 0x0E99
622 #define RB2PPS_ADDR 0x0E9A
623 #define RB3PPS_ADDR 0x0E9B
624 #define RB4PPS_ADDR 0x0E9C
625 #define RB5PPS_ADDR 0x0E9D
626 #define RB6PPS_ADDR 0x0E9E
627 #define RB7PPS_ADDR 0x0E9F
628 #define RC0PPS_ADDR 0x0EA0
629 #define RC1PPS_ADDR 0x0EA1
630 #define RC2PPS_ADDR 0x0EA2
631 #define RC3PPS_ADDR 0x0EA3
632 #define RC4PPS_ADDR 0x0EA4
633 #define RC5PPS_ADDR 0x0EA5
634 #define RC6PPS_ADDR 0x0EA6
635 #define RC7PPS_ADDR 0x0EA7
636 #define RD0PPS_ADDR 0x0EA8
637 #define RD1PPS_ADDR 0x0EA9
638 #define RD2PPS_ADDR 0x0EAA
639 #define RD3PPS_ADDR 0x0EAB
640 #define RD4PPS_ADDR 0x0EAC
641 #define RD5PPS_ADDR 0x0EAD
642 #define RD6PPS_ADDR 0x0EAE
643 #define RD7PPS_ADDR 0x0EAF
644 #define RE0PPS_ADDR 0x0EB0
645 #define RE1PPS_ADDR 0x0EB1
646 #define RE2PPS_ADDR 0x0EB2
647 #define CLCDATA_ADDR 0x0F0F
648 #define CLC1CON_ADDR 0x0F10
649 #define CLC1POL_ADDR 0x0F11
650 #define CLC1SEL0_ADDR 0x0F12
651 #define CLC1SEL1_ADDR 0x0F13
652 #define CLC1SEL2_ADDR 0x0F14
653 #define CLC1SEL3_ADDR 0x0F15
654 #define CLC1GLS0_ADDR 0x0F16
655 #define CLC1GLS1_ADDR 0x0F17
656 #define CLC1GLS2_ADDR 0x0F18
657 #define CLC1GLS3_ADDR 0x0F19
658 #define CLC2CON_ADDR 0x0F1A
659 #define CLC2POL_ADDR 0x0F1B
660 #define CLC2SEL0_ADDR 0x0F1C
661 #define CLC2SEL1_ADDR 0x0F1D
662 #define CLC2SEL2_ADDR 0x0F1E
663 #define CLC2SEL3_ADDR 0x0F1F
664 #define CLC2GLS0_ADDR 0x0F20
665 #define CLC2GLS1_ADDR 0x0F21
666 #define CLC2GLS2_ADDR 0x0F22
667 #define CLC2GLS3_ADDR 0x0F23
668 #define CLC3CON_ADDR 0x0F24
669 #define CLC3POL_ADDR 0x0F25
670 #define CLC3SEL0_ADDR 0x0F26
671 #define CLC3SEL1_ADDR 0x0F27
672 #define CLC3SEL2_ADDR 0x0F28
673 #define CLC3SEL3_ADDR 0x0F29
674 #define CLC3GLS0_ADDR 0x0F2A
675 #define CLC3GLS1_ADDR 0x0F2B
676 #define CLC3GLS2_ADDR 0x0F2C
677 #define CLC3GLS3_ADDR 0x0F2D
678 #define CLC4CON_ADDR 0x0F2E
679 #define CLC4POL_ADDR 0x0F2F
680 #define CLC4SEL0_ADDR 0x0F30
681 #define CLC4SEL1_ADDR 0x0F31
682 #define CLC4SEL2_ADDR 0x0F32
683 #define CLC4SEL3_ADDR 0x0F33
684 #define CLC4GLS0_ADDR 0x0F34
685 #define CLC4GLS1_ADDR 0x0F35
686 #define CLC4GLS2_ADDR 0x0F36
687 #define CLC4GLS3_ADDR 0x0F37
688 #define STATUS_SHAD_ADDR 0x0FE4
689 #define WREG_SHAD_ADDR 0x0FE5
690 #define BSR_SHAD_ADDR 0x0FE6
691 #define PCLATH_SHAD_ADDR 0x0FE7
692 #define FSR0L_SHAD_ADDR 0x0FE8
693 #define FSR0H_SHAD_ADDR 0x0FE9
694 #define FSR1L_SHAD_ADDR 0x0FEA
695 #define FSR1H_SHAD_ADDR 0x0FEB
696 #define STKPTR_ADDR 0x0FED
697 #define TOSL_ADDR 0x0FEE
698 #define TOSH_ADDR 0x0FEF
700 #endif // #ifndef NO_ADDR_DEFINES
702 //==============================================================================
704 // Register Definitions
706 //==============================================================================
708 extern __at(0x0000) __sfr INDF0
;
709 extern __at(0x0001) __sfr INDF1
;
710 extern __at(0x0002) __sfr PCL
;
712 //==============================================================================
715 extern __at(0x0003) __sfr STATUS
;
729 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
737 //==============================================================================
739 extern __at(0x0004) __sfr FSR0
;
740 extern __at(0x0004) __sfr FSR0L
;
741 extern __at(0x0005) __sfr FSR0H
;
742 extern __at(0x0006) __sfr FSR1
;
743 extern __at(0x0006) __sfr FSR1L
;
744 extern __at(0x0007) __sfr FSR1H
;
746 //==============================================================================
749 extern __at(0x0008) __sfr BSR
;
772 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
780 //==============================================================================
782 extern __at(0x0009) __sfr WREG
;
783 extern __at(0x000A) __sfr PCLATH
;
785 //==============================================================================
788 extern __at(0x000B) __sfr INTCON
;
817 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
830 //==============================================================================
833 //==============================================================================
836 extern __at(0x000C) __sfr PORTA
;
850 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
861 //==============================================================================
864 //==============================================================================
867 extern __at(0x000D) __sfr PORTB
;
881 extern __at(0x000D) volatile __PORTBbits_t PORTBbits
;
892 //==============================================================================
895 //==============================================================================
898 extern __at(0x000E) __sfr PORTC
;
912 extern __at(0x000E) volatile __PORTCbits_t PORTCbits
;
923 //==============================================================================
926 //==============================================================================
929 extern __at(0x000F) __sfr PORTD
;
943 extern __at(0x000F) volatile __PORTDbits_t PORTDbits
;
954 //==============================================================================
957 //==============================================================================
960 extern __at(0x0010) __sfr PORTE
;
983 extern __at(0x0010) volatile __PORTEbits_t PORTEbits
;
990 //==============================================================================
993 //==============================================================================
996 extern __at(0x0011) __sfr PIR1
;
1002 unsigned TMR1IF
: 1;
1003 unsigned TMR2IF
: 1;
1004 unsigned CCP1IF
: 1;
1005 unsigned SSP1IF
: 1;
1009 unsigned TMR1GIF
: 1;
1025 extern __at(0x0011) volatile __PIR1bits_t PIR1bits
;
1027 #define _TMR1IF 0x01
1028 #define _TMR2IF 0x02
1029 #define _CCP1IF 0x04
1031 #define _SSP1IF 0x08
1035 #define _TMR1GIF 0x80
1037 //==============================================================================
1040 //==============================================================================
1043 extern __at(0x0012) __sfr PIR2
;
1047 unsigned CCP2IF
: 1;
1050 unsigned BCL1IF
: 1;
1051 unsigned COG1IF
: 1;
1057 extern __at(0x0012) volatile __PIR2bits_t PIR2bits
;
1059 #define _CCP2IF 0x01
1062 #define _BCL1IF 0x08
1063 #define _COG1IF 0x10
1068 //==============================================================================
1071 //==============================================================================
1074 extern __at(0x0013) __sfr PIR3
;
1078 unsigned CLC1IF
: 1;
1079 unsigned CLC2IF
: 1;
1080 unsigned CLC3IF
: 1;
1081 unsigned CLC4IF
: 1;
1083 unsigned COG2IF
: 1;
1088 extern __at(0x0013) volatile __PIR3bits_t PIR3bits
;
1090 #define _CLC1IF 0x01
1091 #define _CLC2IF 0x02
1092 #define _CLC3IF 0x04
1093 #define _CLC4IF 0x08
1095 #define _COG2IF 0x20
1097 //==============================================================================
1100 //==============================================================================
1103 extern __at(0x0014) __sfr PIR4
;
1107 unsigned TMR4IF
: 1;
1108 unsigned TMR6IF
: 1;
1109 unsigned TMR3IF
: 1;
1110 unsigned TMR3GIF
: 1;
1111 unsigned TMR5IF
: 1;
1112 unsigned TMR5GIF
: 1;
1113 unsigned TMR8IF
: 1;
1117 extern __at(0x0014) volatile __PIR4bits_t PIR4bits
;
1119 #define _TMR4IF 0x01
1120 #define _TMR6IF 0x02
1121 #define _TMR3IF 0x04
1122 #define _TMR3GIF 0x08
1123 #define _TMR5IF 0x10
1124 #define _TMR5GIF 0x20
1125 #define _TMR8IF 0x40
1127 //==============================================================================
1130 //==============================================================================
1133 extern __at(0x0015) __sfr PIR5
;
1141 unsigned COG3IF
: 1;
1142 unsigned COG4IF
: 1;
1143 unsigned CCP7IF
: 1;
1144 unsigned CCP8IF
: 1;
1147 extern __at(0x0015) volatile __PIR5bits_t PIR5bits
;
1153 #define _COG3IF 0x10
1154 #define _COG4IF 0x20
1155 #define _CCP7IF 0x40
1156 #define _CCP8IF 0x80
1158 //==============================================================================
1161 //==============================================================================
1164 extern __at(0x0016) __sfr PIR6
;
1168 unsigned PWM5IF
: 1;
1169 unsigned PWM6IF
: 1;
1170 unsigned PWM11IF
: 1;
1171 unsigned PWM12IF
: 1;
1178 extern __at(0x0016) volatile __PIR6bits_t PIR6bits
;
1180 #define _PWM5IF 0x01
1181 #define _PWM6IF 0x02
1182 #define _PWM11IF 0x04
1183 #define _PWM12IF 0x08
1185 //==============================================================================
1187 extern __at(0x0017) __sfr TMR0
;
1188 extern __at(0x0018) __sfr TMR1
;
1189 extern __at(0x0018) __sfr TMR1L
;
1190 extern __at(0x0019) __sfr TMR1H
;
1192 //==============================================================================
1195 extern __at(0x001A) __sfr T1CON
;
1203 unsigned NOT_SYNC
: 1;
1216 unsigned SOSCEN
: 1;
1217 unsigned T1CKPS0
: 1;
1218 unsigned T1CKPS1
: 1;
1225 unsigned TMR1ON
: 1;
1227 unsigned NOT_T1SYNC
: 1;
1228 unsigned T1OSCEN
: 1;
1231 unsigned TMR1CS0
: 1;
1232 unsigned TMR1CS1
: 1;
1257 unsigned T1CKPS
: 2;
1276 unsigned TMR1CS
: 2;
1280 extern __at(0x001A) volatile __T1CONbits_t T1CONbits
;
1282 #define _T1CON_ON 0x01
1283 #define _T1CON_TMRON 0x01
1284 #define _T1CON_TMR1ON 0x01
1285 #define _T1CON_T1ON 0x01
1286 #define _T1CON_NOT_SYNC 0x04
1287 #define _T1CON_SYNC 0x04
1288 #define _T1CON_NOT_T1SYNC 0x04
1289 #define _T1CON_OSCEN 0x08
1290 #define _T1CON_SOSCEN 0x08
1291 #define _T1CON_T1OSCEN 0x08
1292 #define _T1CON_CKPS0 0x10
1293 #define _T1CON_T1CKPS0 0x10
1294 #define _T1CON_CKPS1 0x20
1295 #define _T1CON_T1CKPS1 0x20
1296 #define _T1CON_CS0 0x40
1297 #define _T1CON_T1CS0 0x40
1298 #define _T1CON_TMR1CS0 0x40
1299 #define _T1CON_CS1 0x80
1300 #define _T1CON_T1CS1 0x80
1301 #define _T1CON_TMR1CS1 0x80
1303 //==============================================================================
1306 //==============================================================================
1309 extern __at(0x001B) __sfr T1GCON
;
1318 unsigned GGO_NOT_DONE
: 1;
1327 unsigned T1GSS0
: 1;
1328 unsigned T1GSS1
: 1;
1329 unsigned T1GVAL
: 1;
1330 unsigned T1GGO_NOT_DONE
: 1;
1331 unsigned T1GSPM
: 1;
1333 unsigned T1GPOL
: 1;
1346 unsigned TMR1GE
: 1;
1362 extern __at(0x001B) volatile __T1GCONbits_t T1GCONbits
;
1365 #define _T1GSS0 0x01
1367 #define _T1GSS1 0x02
1369 #define _T1GVAL 0x04
1370 #define _GGO_NOT_DONE 0x08
1371 #define _T1GGO_NOT_DONE 0x08
1373 #define _T1GSPM 0x10
1377 #define _T1GPOL 0x40
1380 #define _TMR1GE 0x80
1382 //==============================================================================
1384 extern __at(0x001C) __sfr TMR3
;
1385 extern __at(0x001C) __sfr TMR3L
;
1386 extern __at(0x001D) __sfr TMR3H
;
1388 //==============================================================================
1391 extern __at(0x001E) __sfr T3CON
;
1399 unsigned NOT_SYNC
: 1;
1412 unsigned SOSCEN
: 1;
1413 unsigned T3CKPS0
: 1;
1414 unsigned T3CKPS1
: 1;
1421 unsigned TMR3ON
: 1;
1423 unsigned NOT_T3SYNC
: 1;
1424 unsigned T3OSCEN
: 1;
1427 unsigned TMR3CS0
: 1;
1428 unsigned TMR3CS1
: 1;
1453 unsigned T3CKPS
: 2;
1472 unsigned TMR3CS
: 2;
1476 extern __at(0x001E) volatile __T3CONbits_t T3CONbits
;
1478 #define _T3CON_ON 0x01
1479 #define _T3CON_TMRON 0x01
1480 #define _T3CON_TMR3ON 0x01
1481 #define _T3CON_T3ON 0x01
1482 #define _T3CON_NOT_SYNC 0x04
1483 #define _T3CON_SYNC 0x04
1484 #define _T3CON_NOT_T3SYNC 0x04
1485 #define _T3CON_OSCEN 0x08
1486 #define _T3CON_SOSCEN 0x08
1487 #define _T3CON_T3OSCEN 0x08
1488 #define _T3CON_CKPS0 0x10
1489 #define _T3CON_T3CKPS0 0x10
1490 #define _T3CON_CKPS1 0x20
1491 #define _T3CON_T3CKPS1 0x20
1492 #define _T3CON_CS0 0x40
1493 #define _T3CON_T3CS0 0x40
1494 #define _T3CON_TMR3CS0 0x40
1495 #define _T3CON_CS1 0x80
1496 #define _T3CON_T3CS1 0x80
1497 #define _T3CON_TMR3CS1 0x80
1499 //==============================================================================
1502 //==============================================================================
1505 extern __at(0x001F) __sfr T3GCON
;
1514 unsigned GGO_NOT_DONE
: 1;
1523 unsigned T3GSS0
: 1;
1524 unsigned T3GSS1
: 1;
1525 unsigned T3GVAL
: 1;
1526 unsigned T3GGO_NOT_DONE
: 1;
1527 unsigned T3GSPM
: 1;
1529 unsigned T3GPOL
: 1;
1542 unsigned TMR3GE
: 1;
1558 extern __at(0x001F) volatile __T3GCONbits_t T3GCONbits
;
1560 #define _T3GCON_GSS0 0x01
1561 #define _T3GCON_T3GSS0 0x01
1562 #define _T3GCON_GSS1 0x02
1563 #define _T3GCON_T3GSS1 0x02
1564 #define _T3GCON_GVAL 0x04
1565 #define _T3GCON_T3GVAL 0x04
1566 #define _T3GCON_GGO_NOT_DONE 0x08
1567 #define _T3GCON_T3GGO_NOT_DONE 0x08
1568 #define _T3GCON_GSPM 0x10
1569 #define _T3GCON_T3GSPM 0x10
1570 #define _T3GCON_GTM 0x20
1571 #define _T3GCON_T3GTM 0x20
1572 #define _T3GCON_GPOL 0x40
1573 #define _T3GCON_T3GPOL 0x40
1574 #define _T3GCON_GE 0x80
1575 #define _T3GCON_T3GE 0x80
1576 #define _T3GCON_TMR3GE 0x80
1578 //==============================================================================
1581 //==============================================================================
1584 extern __at(0x008C) __sfr TRISA
;
1588 unsigned TRISA0
: 1;
1589 unsigned TRISA1
: 1;
1590 unsigned TRISA2
: 1;
1591 unsigned TRISA3
: 1;
1592 unsigned TRISA4
: 1;
1593 unsigned TRISA5
: 1;
1594 unsigned TRISA6
: 1;
1595 unsigned TRISA7
: 1;
1598 extern __at(0x008C) volatile __TRISAbits_t TRISAbits
;
1600 #define _TRISA0 0x01
1601 #define _TRISA1 0x02
1602 #define _TRISA2 0x04
1603 #define _TRISA3 0x08
1604 #define _TRISA4 0x10
1605 #define _TRISA5 0x20
1606 #define _TRISA6 0x40
1607 #define _TRISA7 0x80
1609 //==============================================================================
1612 //==============================================================================
1615 extern __at(0x008D) __sfr TRISB
;
1619 unsigned TRISB0
: 1;
1620 unsigned TRISB1
: 1;
1621 unsigned TRISB2
: 1;
1622 unsigned TRISB3
: 1;
1623 unsigned TRISB4
: 1;
1624 unsigned TRISB5
: 1;
1625 unsigned TRISB6
: 1;
1626 unsigned TRISB7
: 1;
1629 extern __at(0x008D) volatile __TRISBbits_t TRISBbits
;
1631 #define _TRISB0 0x01
1632 #define _TRISB1 0x02
1633 #define _TRISB2 0x04
1634 #define _TRISB3 0x08
1635 #define _TRISB4 0x10
1636 #define _TRISB5 0x20
1637 #define _TRISB6 0x40
1638 #define _TRISB7 0x80
1640 //==============================================================================
1643 //==============================================================================
1646 extern __at(0x008E) __sfr TRISC
;
1650 unsigned TRISC0
: 1;
1651 unsigned TRISC1
: 1;
1652 unsigned TRISC2
: 1;
1653 unsigned TRISC3
: 1;
1654 unsigned TRISC4
: 1;
1655 unsigned TRISC5
: 1;
1656 unsigned TRISC6
: 1;
1657 unsigned TRISC7
: 1;
1660 extern __at(0x008E) volatile __TRISCbits_t TRISCbits
;
1662 #define _TRISC0 0x01
1663 #define _TRISC1 0x02
1664 #define _TRISC2 0x04
1665 #define _TRISC3 0x08
1666 #define _TRISC4 0x10
1667 #define _TRISC5 0x20
1668 #define _TRISC6 0x40
1669 #define _TRISC7 0x80
1671 //==============================================================================
1674 //==============================================================================
1677 extern __at(0x008F) __sfr TRISD
;
1681 unsigned TRISD0
: 1;
1682 unsigned TRISD1
: 1;
1683 unsigned TRISD2
: 1;
1684 unsigned TRISD3
: 1;
1685 unsigned TRISD4
: 1;
1686 unsigned TRISD5
: 1;
1687 unsigned TRISD6
: 1;
1688 unsigned TRISD7
: 1;
1691 extern __at(0x008F) volatile __TRISDbits_t TRISDbits
;
1693 #define _TRISD0 0x01
1694 #define _TRISD1 0x02
1695 #define _TRISD2 0x04
1696 #define _TRISD3 0x08
1697 #define _TRISD4 0x10
1698 #define _TRISD5 0x20
1699 #define _TRISD6 0x40
1700 #define _TRISD7 0x80
1702 //==============================================================================
1705 //==============================================================================
1708 extern __at(0x0090) __sfr TRISE
;
1714 unsigned TRISE0
: 1;
1715 unsigned TRISE1
: 1;
1716 unsigned TRISE2
: 1;
1717 unsigned TRISE3
: 1;
1731 extern __at(0x0090) volatile __TRISEbits_t TRISEbits
;
1733 #define _TRISE0 0x01
1734 #define _TRISE1 0x02
1735 #define _TRISE2 0x04
1736 #define _TRISE3 0x08
1738 //==============================================================================
1741 //==============================================================================
1744 extern __at(0x0091) __sfr PIE1
;
1750 unsigned TMR1IE
: 1;
1751 unsigned TMR2IE
: 1;
1752 unsigned CCP1IE
: 1;
1753 unsigned SSP1IE
: 1;
1757 unsigned TMR1GIE
: 1;
1773 extern __at(0x0091) volatile __PIE1bits_t PIE1bits
;
1775 #define _TMR1IE 0x01
1776 #define _TMR2IE 0x02
1777 #define _CCP1IE 0x04
1779 #define _SSP1IE 0x08
1783 #define _TMR1GIE 0x80
1785 //==============================================================================
1788 //==============================================================================
1791 extern __at(0x0092) __sfr PIE2
;
1795 unsigned CCP2IE
: 1;
1798 unsigned BCL1IE
: 1;
1805 extern __at(0x0092) volatile __PIE2bits_t PIE2bits
;
1807 #define _CCP2IE 0x01
1810 #define _BCL1IE 0x08
1816 //==============================================================================
1819 //==============================================================================
1822 extern __at(0x0093) __sfr PIE3
;
1826 unsigned CLC1IE
: 1;
1827 unsigned CLC2IE
: 1;
1828 unsigned CLC3IE
: 1;
1829 unsigned CLC4IE
: 1;
1831 unsigned COG2IE
: 1;
1836 extern __at(0x0093) volatile __PIE3bits_t PIE3bits
;
1838 #define _CLC1IE 0x01
1839 #define _CLC2IE 0x02
1840 #define _CLC3IE 0x04
1841 #define _CLC4IE 0x08
1843 #define _COG2IE 0x20
1845 //==============================================================================
1848 //==============================================================================
1851 extern __at(0x0094) __sfr PIE4
;
1855 unsigned TMR4IE
: 1;
1856 unsigned TMR6IE
: 1;
1857 unsigned TMR3IE
: 1;
1858 unsigned TMR3GIE
: 1;
1859 unsigned TMR5IE
: 1;
1860 unsigned TMR5GIE
: 1;
1861 unsigned TMR8IE
: 1;
1865 extern __at(0x0094) volatile __PIE4bits_t PIE4bits
;
1867 #define _TMR4IE 0x01
1868 #define _TMR6IE 0x02
1869 #define _TMR3IE 0x04
1870 #define _TMR3GIE 0x08
1871 #define _TMR5IE 0x10
1872 #define _TMR5GIE 0x20
1873 #define _TMR8IE 0x40
1875 //==============================================================================
1878 //==============================================================================
1881 extern __at(0x0095) __sfr PIE5
;
1889 unsigned COG3IE
: 1;
1890 unsigned COG4IE
: 1;
1891 unsigned CCP7IE
: 1;
1892 unsigned CCP8IE
: 1;
1895 extern __at(0x0095) volatile __PIE5bits_t PIE5bits
;
1901 #define _COG3IE 0x10
1902 #define _COG4IE 0x20
1903 #define _CCP7IE 0x40
1904 #define _CCP8IE 0x80
1906 //==============================================================================
1909 //==============================================================================
1912 extern __at(0x0096) __sfr PIE6
;
1916 unsigned PWM5IE
: 1;
1917 unsigned PWM6IE
: 1;
1918 unsigned PWM11IE
: 1;
1919 unsigned PWM12IE
: 1;
1926 extern __at(0x0096) volatile __PIE6bits_t PIE6bits
;
1928 #define _PWM5IE 0x01
1929 #define _PWM6IE 0x02
1930 #define _PWM11IE 0x04
1931 #define _PWM12IE 0x08
1933 //==============================================================================
1936 //==============================================================================
1939 extern __at(0x0097) __sfr OPTION_REG
;
1949 unsigned TMR0SE
: 1;
1950 unsigned TMR0CS
: 1;
1951 unsigned INTEDG
: 1;
1952 unsigned NOT_WPUEN
: 1;
1972 } __OPTION_REGbits_t
;
1974 extern __at(0x0097) volatile __OPTION_REGbits_t OPTION_REGbits
;
1980 #define _TMR0SE 0x10
1982 #define _TMR0CS 0x20
1984 #define _INTEDG 0x40
1985 #define _NOT_WPUEN 0x80
1987 //==============================================================================
1990 //==============================================================================
1993 extern __at(0x0098) __sfr PCON
;
1997 unsigned NOT_BOR
: 1;
1998 unsigned NOT_POR
: 1;
1999 unsigned NOT_RI
: 1;
2000 unsigned NOT_RMCLR
: 1;
2001 unsigned NOT_RWDT
: 1;
2003 unsigned STKUNF
: 1;
2004 unsigned STKOVF
: 1;
2007 extern __at(0x0098) volatile __PCONbits_t PCONbits
;
2009 #define _NOT_BOR 0x01
2010 #define _NOT_POR 0x02
2011 #define _NOT_RI 0x04
2012 #define _NOT_RMCLR 0x08
2013 #define _NOT_RWDT 0x10
2014 #define _STKUNF 0x40
2015 #define _STKOVF 0x80
2017 //==============================================================================
2020 //==============================================================================
2023 extern __at(0x0099) __sfr WDTCON
;
2029 unsigned SWDTEN
: 1;
2030 unsigned WDTPS0
: 1;
2031 unsigned WDTPS1
: 1;
2032 unsigned WDTPS2
: 1;
2033 unsigned WDTPS3
: 1;
2034 unsigned WDTPS4
: 1;
2047 extern __at(0x0099) volatile __WDTCONbits_t WDTCONbits
;
2049 #define _SWDTEN 0x01
2050 #define _WDTPS0 0x02
2051 #define _WDTPS1 0x04
2052 #define _WDTPS2 0x08
2053 #define _WDTPS3 0x10
2054 #define _WDTPS4 0x20
2056 //==============================================================================
2059 //==============================================================================
2062 extern __at(0x009A) __sfr OSCTUNE
;
2085 extern __at(0x009A) volatile __OSCTUNEbits_t OSCTUNEbits
;
2094 //==============================================================================
2097 //==============================================================================
2100 extern __at(0x009B) __sfr OSCCON
;
2113 unsigned SPLLEN
: 1;
2130 extern __at(0x009B) volatile __OSCCONbits_t OSCCONbits
;
2138 #define _SPLLEN 0x80
2140 //==============================================================================
2143 //==============================================================================
2146 extern __at(0x009C) __sfr OSCSTAT
;
2150 unsigned HFIOFS
: 1;
2151 unsigned LFIOFR
: 1;
2152 unsigned MFIOFR
: 1;
2153 unsigned HFIOFL
: 1;
2154 unsigned HFIOFR
: 1;
2160 extern __at(0x009C) volatile __OSCSTATbits_t OSCSTATbits
;
2162 #define _HFIOFS 0x01
2163 #define _LFIOFR 0x02
2164 #define _MFIOFR 0x04
2165 #define _HFIOFL 0x08
2166 #define _HFIOFR 0x10
2171 //==============================================================================
2174 //==============================================================================
2177 extern __at(0x009D) __sfr BORCON
;
2181 unsigned BORRDY
: 1;
2188 unsigned SBOREN
: 1;
2191 extern __at(0x009D) volatile __BORCONbits_t BORCONbits
;
2193 #define _BORRDY 0x01
2195 #define _SBOREN 0x80
2197 //==============================================================================
2200 //==============================================================================
2203 extern __at(0x009E) __sfr FVRCON
;
2213 unsigned FVRRDY
: 1;
2217 extern __at(0x009E) volatile __FVRCONbits_t FVRCONbits
;
2221 #define _FVRRDY 0x40
2224 //==============================================================================
2227 //==============================================================================
2230 extern __at(0x009F) __sfr ZCD1CON
;
2234 unsigned ZCD1INTN
: 1;
2235 unsigned ZCD1INTP
: 1;
2238 unsigned ZCD1POL
: 1;
2239 unsigned ZCD1OUT
: 1;
2241 unsigned ZCD1EN
: 1;
2244 extern __at(0x009F) volatile __ZCD1CONbits_t ZCD1CONbits
;
2246 #define _ZCD1INTN 0x01
2247 #define _ZCD1INTP 0x02
2248 #define _ZCD1POL 0x10
2249 #define _ZCD1OUT 0x20
2250 #define _ZCD1EN 0x80
2252 //==============================================================================
2255 //==============================================================================
2258 extern __at(0x010C) __sfr LATA
;
2272 extern __at(0x010C) volatile __LATAbits_t LATAbits
;
2283 //==============================================================================
2286 //==============================================================================
2289 extern __at(0x010D) __sfr LATB
;
2303 extern __at(0x010D) volatile __LATBbits_t LATBbits
;
2314 //==============================================================================
2317 //==============================================================================
2320 extern __at(0x010E) __sfr LATC
;
2334 extern __at(0x010E) volatile __LATCbits_t LATCbits
;
2345 //==============================================================================
2348 //==============================================================================
2351 extern __at(0x010F) __sfr LATD
;
2365 extern __at(0x010F) volatile __LATDbits_t LATDbits
;
2376 //==============================================================================
2379 //==============================================================================
2382 extern __at(0x0110) __sfr LATE
;
2405 extern __at(0x0110) volatile __LATEbits_t LATEbits
;
2411 //==============================================================================
2414 //==============================================================================
2417 extern __at(0x0111) __sfr CMOUT
;
2421 unsigned MC1OUT
: 1;
2422 unsigned MC2OUT
: 1;
2423 unsigned MC3OUT
: 1;
2424 unsigned MC4OUT
: 1;
2425 unsigned MC5OUT
: 1;
2426 unsigned MC6OUT
: 1;
2427 unsigned MC7OUT
: 1;
2428 unsigned MC80UT
: 1;
2431 extern __at(0x0111) volatile __CMOUTbits_t CMOUTbits
;
2433 #define _MC1OUT 0x01
2434 #define _MC2OUT 0x02
2435 #define _MC3OUT 0x04
2436 #define _MC4OUT 0x08
2437 #define _MC5OUT 0x10
2438 #define _MC6OUT 0x20
2439 #define _MC7OUT 0x40
2440 #define _MC80UT 0x80
2442 //==============================================================================
2445 //==============================================================================
2448 extern __at(0x0112) __sfr CM1CON0
;
2456 unsigned Reserved
: 1;
2466 unsigned C1SYNC
: 1;
2477 extern __at(0x0112) volatile __CM1CON0bits_t CM1CON0bits
;
2479 #define _CM1CON0_SYNC 0x01
2480 #define _CM1CON0_C1SYNC 0x01
2481 #define _CM1CON0_HYS 0x02
2482 #define _CM1CON0_C1HYS 0x02
2483 #define _CM1CON0_Reserved 0x04
2484 #define _CM1CON0_C1SP 0x04
2485 #define _CM1CON0_ZLF 0x08
2486 #define _CM1CON0_C1ZLF 0x08
2487 #define _CM1CON0_POL 0x10
2488 #define _CM1CON0_C1POL 0x10
2489 #define _CM1CON0_OUT 0x40
2490 #define _CM1CON0_C1OUT 0x40
2491 #define _CM1CON0_ON 0x80
2492 #define _CM1CON0_C1ON 0x80
2494 //==============================================================================
2497 //==============================================================================
2500 extern __at(0x0113) __sfr CM1CON1
;
2518 unsigned C1INTN
: 1;
2519 unsigned C1INTP
: 1;
2529 extern __at(0x0113) volatile __CM1CON1bits_t CM1CON1bits
;
2531 #define _CM1CON1_INTN 0x01
2532 #define _CM1CON1_C1INTN 0x01
2533 #define _CM1CON1_INTP 0x02
2534 #define _CM1CON1_C1INTP 0x02
2536 //==============================================================================
2539 //==============================================================================
2542 extern __at(0x0114) __sfr CM1NSEL
;
2548 unsigned C1NCH0
: 1;
2549 unsigned C1NCH1
: 1;
2550 unsigned C1NCH2
: 1;
2551 unsigned C1NCH3
: 1;
2565 extern __at(0x0114) volatile __CM1NSELbits_t CM1NSELbits
;
2567 #define _C1NCH0 0x01
2568 #define _C1NCH1 0x02
2569 #define _C1NCH2 0x04
2570 #define _C1NCH3 0x08
2572 //==============================================================================
2575 //==============================================================================
2578 extern __at(0x0115) __sfr CM1PSEL
;
2596 unsigned C1PCH0
: 1;
2597 unsigned C1PCH1
: 1;
2598 unsigned C1PCH2
: 1;
2599 unsigned C1PCH3
: 1;
2619 extern __at(0x0115) volatile __CM1PSELbits_t CM1PSELbits
;
2622 #define _C1PCH0 0x01
2624 #define _C1PCH1 0x02
2626 #define _C1PCH2 0x04
2628 #define _C1PCH3 0x08
2630 //==============================================================================
2633 //==============================================================================
2636 extern __at(0x0116) __sfr CM2CON0
;
2644 unsigned Reserved
: 1;
2654 unsigned C2SYNC
: 1;
2665 extern __at(0x0116) volatile __CM2CON0bits_t CM2CON0bits
;
2667 #define _CM2CON0_SYNC 0x01
2668 #define _CM2CON0_C2SYNC 0x01
2669 #define _CM2CON0_HYS 0x02
2670 #define _CM2CON0_C2HYS 0x02
2671 #define _CM2CON0_Reserved 0x04
2672 #define _CM2CON0_C2SP 0x04
2673 #define _CM2CON0_ZLF 0x08
2674 #define _CM2CON0_C2ZLF 0x08
2675 #define _CM2CON0_POL 0x10
2676 #define _CM2CON0_C2POL 0x10
2677 #define _CM2CON0_OUT 0x40
2678 #define _CM2CON0_C2OUT 0x40
2679 #define _CM2CON0_ON 0x80
2680 #define _CM2CON0_C2ON 0x80
2682 //==============================================================================
2685 //==============================================================================
2688 extern __at(0x0117) __sfr CM2CON1
;
2706 unsigned C2INTN
: 1;
2707 unsigned C2INTP
: 1;
2717 extern __at(0x0117) volatile __CM2CON1bits_t CM2CON1bits
;
2719 #define _CM2CON1_INTN 0x01
2720 #define _CM2CON1_C2INTN 0x01
2721 #define _CM2CON1_INTP 0x02
2722 #define _CM2CON1_C2INTP 0x02
2724 //==============================================================================
2727 //==============================================================================
2730 extern __at(0x0118) __sfr CM2NSEL
;
2736 unsigned C2NCH0
: 1;
2737 unsigned C2NCH1
: 1;
2738 unsigned C2NCH2
: 1;
2739 unsigned C2NCH3
: 1;
2753 extern __at(0x0118) volatile __CM2NSELbits_t CM2NSELbits
;
2755 #define _C2NCH0 0x01
2756 #define _C2NCH1 0x02
2757 #define _C2NCH2 0x04
2758 #define _C2NCH3 0x08
2760 //==============================================================================
2763 //==============================================================================
2766 extern __at(0x0119) __sfr CM2PSEL
;
2784 unsigned C2PCH0
: 1;
2785 unsigned C2PCH1
: 1;
2786 unsigned C2PCH2
: 1;
2787 unsigned C2PCH3
: 1;
2807 extern __at(0x0119) volatile __CM2PSELbits_t CM2PSELbits
;
2809 #define _CM2PSEL_PCH0 0x01
2810 #define _CM2PSEL_C2PCH0 0x01
2811 #define _CM2PSEL_PCH1 0x02
2812 #define _CM2PSEL_C2PCH1 0x02
2813 #define _CM2PSEL_PCH2 0x04
2814 #define _CM2PSEL_C2PCH2 0x04
2815 #define _CM2PSEL_PCH3 0x08
2816 #define _CM2PSEL_C2PCH3 0x08
2818 //==============================================================================
2821 //==============================================================================
2824 extern __at(0x011A) __sfr CM3CON0
;
2832 unsigned Reserved
: 1;
2842 unsigned C3SYNC
: 1;
2853 extern __at(0x011A) volatile __CM3CON0bits_t CM3CON0bits
;
2855 #define _CM3CON0_SYNC 0x01
2856 #define _CM3CON0_C3SYNC 0x01
2857 #define _CM3CON0_HYS 0x02
2858 #define _CM3CON0_C3HYS 0x02
2859 #define _CM3CON0_Reserved 0x04
2860 #define _CM3CON0_C3SP 0x04
2861 #define _CM3CON0_ZLF 0x08
2862 #define _CM3CON0_C3ZLF 0x08
2863 #define _CM3CON0_POL 0x10
2864 #define _CM3CON0_C3POL 0x10
2865 #define _CM3CON0_OUT 0x40
2866 #define _CM3CON0_C3OUT 0x40
2867 #define _CM3CON0_ON 0x80
2868 #define _CM3CON0_C3ON 0x80
2870 //==============================================================================
2873 //==============================================================================
2876 extern __at(0x011B) __sfr CM3CON1
;
2894 unsigned C3INTN
: 1;
2895 unsigned C3INTP
: 1;
2905 extern __at(0x011B) volatile __CM3CON1bits_t CM3CON1bits
;
2907 #define _CM3CON1_INTN 0x01
2908 #define _CM3CON1_C3INTN 0x01
2909 #define _CM3CON1_INTP 0x02
2910 #define _CM3CON1_C3INTP 0x02
2912 //==============================================================================
2915 //==============================================================================
2918 extern __at(0x011C) __sfr CM3NSEL
;
2924 unsigned C3NCH0
: 1;
2925 unsigned C3NCH1
: 1;
2926 unsigned C3NCH2
: 1;
2927 unsigned C3NCH3
: 1;
2941 extern __at(0x011C) volatile __CM3NSELbits_t CM3NSELbits
;
2943 #define _C3NCH0 0x01
2944 #define _C3NCH1 0x02
2945 #define _C3NCH2 0x04
2946 #define _C3NCH3 0x08
2948 //==============================================================================
2951 //==============================================================================
2954 extern __at(0x011D) __sfr CM3PSEL
;
2972 unsigned C3PCH0
: 1;
2973 unsigned C3PCH1
: 1;
2974 unsigned C3PCH2
: 1;
2975 unsigned C3PCH3
: 1;
2995 extern __at(0x011D) volatile __CM3PSELbits_t CM3PSELbits
;
2997 #define _CM3PSEL_PCH0 0x01
2998 #define _CM3PSEL_C3PCH0 0x01
2999 #define _CM3PSEL_PCH1 0x02
3000 #define _CM3PSEL_C3PCH1 0x02
3001 #define _CM3PSEL_PCH2 0x04
3002 #define _CM3PSEL_C3PCH2 0x04
3003 #define _CM3PSEL_PCH3 0x08
3004 #define _CM3PSEL_C3PCH3 0x08
3006 //==============================================================================
3009 //==============================================================================
3012 extern __at(0x018C) __sfr ANSELA
;
3035 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits
;
3044 //==============================================================================
3047 //==============================================================================
3050 extern __at(0x018D) __sfr ANSELB
;
3073 extern __at(0x018D) volatile __ANSELBbits_t ANSELBbits
;
3082 //==============================================================================
3085 //==============================================================================
3088 extern __at(0x018E) __sfr ANSELC
;
3102 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits
;
3111 //==============================================================================
3114 //==============================================================================
3117 extern __at(0x018F) __sfr ANSELD
;
3131 extern __at(0x018F) volatile __ANSELDbits_t ANSELDbits
;
3142 //==============================================================================
3145 //==============================================================================
3148 extern __at(0x0190) __sfr ANSELE
;
3171 extern __at(0x0190) volatile __ANSELEbits_t ANSELEbits
;
3177 //==============================================================================
3179 extern __at(0x0191) __sfr PMADR
;
3180 extern __at(0x0191) __sfr PMADRL
;
3181 extern __at(0x0192) __sfr PMADRH
;
3182 extern __at(0x0193) __sfr PMDAT
;
3183 extern __at(0x0193) __sfr PMDATL
;
3184 extern __at(0x0194) __sfr PMDATH
;
3186 //==============================================================================
3189 extern __at(0x0195) __sfr PMCON1
;
3203 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits
;
3213 //==============================================================================
3215 extern __at(0x0196) __sfr PMCON2
;
3216 extern __at(0x0199) __sfr RC1REG
;
3217 extern __at(0x0199) __sfr RCREG
;
3218 extern __at(0x0199) __sfr RCREG1
;
3219 extern __at(0x019A) __sfr TX1REG
;
3220 extern __at(0x019A) __sfr TXREG
;
3221 extern __at(0x019A) __sfr TXREG1
;
3222 extern __at(0x019B) __sfr SP1BRG
;
3223 extern __at(0x019B) __sfr SP1BRGL
;
3224 extern __at(0x019B) __sfr SPBRG
;
3225 extern __at(0x019B) __sfr SPBRG1
;
3226 extern __at(0x019B) __sfr SPBRGL
;
3227 extern __at(0x019C) __sfr SP1BRGH
;
3228 extern __at(0x019C) __sfr SPBRGH
;
3229 extern __at(0x019C) __sfr SPBRGH1
;
3231 //==============================================================================
3234 extern __at(0x019D) __sfr RC1STA
;
3248 extern __at(0x019D) volatile __RC1STAbits_t RC1STAbits
;
3259 //==============================================================================
3262 //==============================================================================
3265 extern __at(0x019D) __sfr RCSTA
;
3279 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits
;
3281 #define _RCSTA_RX9D 0x01
3282 #define _RCSTA_OERR 0x02
3283 #define _RCSTA_FERR 0x04
3284 #define _RCSTA_ADDEN 0x08
3285 #define _RCSTA_CREN 0x10
3286 #define _RCSTA_SREN 0x20
3287 #define _RCSTA_RX9 0x40
3288 #define _RCSTA_SPEN 0x80
3290 //==============================================================================
3293 //==============================================================================
3296 extern __at(0x019D) __sfr RCSTA1
;
3310 extern __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits
;
3312 #define _RCSTA1_RX9D 0x01
3313 #define _RCSTA1_OERR 0x02
3314 #define _RCSTA1_FERR 0x04
3315 #define _RCSTA1_ADDEN 0x08
3316 #define _RCSTA1_CREN 0x10
3317 #define _RCSTA1_SREN 0x20
3318 #define _RCSTA1_RX9 0x40
3319 #define _RCSTA1_SPEN 0x80
3321 //==============================================================================
3324 //==============================================================================
3327 extern __at(0x019E) __sfr TX1STA
;
3341 extern __at(0x019E) volatile __TX1STAbits_t TX1STAbits
;
3343 #define _TX1STA_TX9D 0x01
3344 #define _TX1STA_TRMT 0x02
3345 #define _TX1STA_BRGH 0x04
3346 #define _TX1STA_SENDB 0x08
3347 #define _TX1STA_SYNC 0x10
3348 #define _TX1STA_TXEN 0x20
3349 #define _TX1STA_TX9 0x40
3350 #define _TX1STA_CSRC 0x80
3352 //==============================================================================
3355 //==============================================================================
3358 extern __at(0x019E) __sfr TXSTA
;
3372 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits
;
3374 #define _TXSTA_TX9D 0x01
3375 #define _TXSTA_TRMT 0x02
3376 #define _TXSTA_BRGH 0x04
3377 #define _TXSTA_SENDB 0x08
3378 #define _TXSTA_SYNC 0x10
3379 #define _TXSTA_TXEN 0x20
3380 #define _TXSTA_TX9 0x40
3381 #define _TXSTA_CSRC 0x80
3383 //==============================================================================
3386 //==============================================================================
3389 extern __at(0x019E) __sfr TXSTA1
;
3403 extern __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits
;
3405 #define _TXSTA1_TX9D 0x01
3406 #define _TXSTA1_TRMT 0x02
3407 #define _TXSTA1_BRGH 0x04
3408 #define _TXSTA1_SENDB 0x08
3409 #define _TXSTA1_SYNC 0x10
3410 #define _TXSTA1_TXEN 0x20
3411 #define _TXSTA1_TX9 0x40
3412 #define _TXSTA1_CSRC 0x80
3414 //==============================================================================
3417 //==============================================================================
3420 extern __at(0x019F) __sfr BAUD1CON
;
3431 unsigned ABDOVF
: 1;
3434 extern __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits
;
3441 #define _ABDOVF 0x80
3443 //==============================================================================
3446 //==============================================================================
3449 extern __at(0x019F) __sfr BAUDCON
;
3460 unsigned ABDOVF
: 1;
3463 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits
;
3465 #define _BAUDCON_ABDEN 0x01
3466 #define _BAUDCON_WUE 0x02
3467 #define _BAUDCON_BRG16 0x08
3468 #define _BAUDCON_SCKP 0x10
3469 #define _BAUDCON_RCIDL 0x40
3470 #define _BAUDCON_ABDOVF 0x80
3472 //==============================================================================
3475 //==============================================================================
3478 extern __at(0x019F) __sfr BAUDCON1
;
3489 unsigned ABDOVF
: 1;
3492 extern __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits
;
3494 #define _BAUDCON1_ABDEN 0x01
3495 #define _BAUDCON1_WUE 0x02
3496 #define _BAUDCON1_BRG16 0x08
3497 #define _BAUDCON1_SCKP 0x10
3498 #define _BAUDCON1_RCIDL 0x40
3499 #define _BAUDCON1_ABDOVF 0x80
3501 //==============================================================================
3504 //==============================================================================
3507 extern __at(0x019F) __sfr BAUDCTL
;
3518 unsigned ABDOVF
: 1;
3521 extern __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits
;
3523 #define _BAUDCTL_ABDEN 0x01
3524 #define _BAUDCTL_WUE 0x02
3525 #define _BAUDCTL_BRG16 0x08
3526 #define _BAUDCTL_SCKP 0x10
3527 #define _BAUDCTL_RCIDL 0x40
3528 #define _BAUDCTL_ABDOVF 0x80
3530 //==============================================================================
3533 //==============================================================================
3536 extern __at(0x019F) __sfr BAUDCTL1
;
3547 unsigned ABDOVF
: 1;
3550 extern __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits
;
3552 #define _BAUDCTL1_ABDEN 0x01
3553 #define _BAUDCTL1_WUE 0x02
3554 #define _BAUDCTL1_BRG16 0x08
3555 #define _BAUDCTL1_SCKP 0x10
3556 #define _BAUDCTL1_RCIDL 0x40
3557 #define _BAUDCTL1_ABDOVF 0x80
3559 //==============================================================================
3562 //==============================================================================
3565 extern __at(0x020C) __sfr WPUA
;
3579 extern __at(0x020C) volatile __WPUAbits_t WPUAbits
;
3590 //==============================================================================
3593 //==============================================================================
3596 extern __at(0x020D) __sfr WPUB
;
3610 extern __at(0x020D) volatile __WPUBbits_t WPUBbits
;
3621 //==============================================================================
3624 //==============================================================================
3627 extern __at(0x020E) __sfr WPUC
;
3641 extern __at(0x020E) volatile __WPUCbits_t WPUCbits
;
3652 //==============================================================================
3655 //==============================================================================
3658 extern __at(0x020F) __sfr WPUD
;
3672 extern __at(0x020F) volatile __WPUDbits_t WPUDbits
;
3683 //==============================================================================
3686 //==============================================================================
3689 extern __at(0x0210) __sfr WPUE
;
3712 extern __at(0x0210) volatile __WPUEbits_t WPUEbits
;
3719 //==============================================================================
3722 //==============================================================================
3725 extern __at(0x0211) __sfr SSP1BUF
;
3731 unsigned SSP1BUF0
: 1;
3732 unsigned SSP1BUF1
: 1;
3733 unsigned SSP1BUF2
: 1;
3734 unsigned SSP1BUF3
: 1;
3735 unsigned SSP1BUF4
: 1;
3736 unsigned SSP1BUF5
: 1;
3737 unsigned SSP1BUF6
: 1;
3738 unsigned SSP1BUF7
: 1;
3754 extern __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits
;
3756 #define _SSP1BUF0 0x01
3758 #define _SSP1BUF1 0x02
3760 #define _SSP1BUF2 0x04
3762 #define _SSP1BUF3 0x08
3764 #define _SSP1BUF4 0x10
3766 #define _SSP1BUF5 0x20
3768 #define _SSP1BUF6 0x40
3770 #define _SSP1BUF7 0x80
3773 //==============================================================================
3776 //==============================================================================
3779 extern __at(0x0211) __sfr SSPBUF
;
3785 unsigned SSP1BUF0
: 1;
3786 unsigned SSP1BUF1
: 1;
3787 unsigned SSP1BUF2
: 1;
3788 unsigned SSP1BUF3
: 1;
3789 unsigned SSP1BUF4
: 1;
3790 unsigned SSP1BUF5
: 1;
3791 unsigned SSP1BUF6
: 1;
3792 unsigned SSP1BUF7
: 1;
3808 extern __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits
;
3810 #define _SSPBUF_SSP1BUF0 0x01
3811 #define _SSPBUF_BUF0 0x01
3812 #define _SSPBUF_SSP1BUF1 0x02
3813 #define _SSPBUF_BUF1 0x02
3814 #define _SSPBUF_SSP1BUF2 0x04
3815 #define _SSPBUF_BUF2 0x04
3816 #define _SSPBUF_SSP1BUF3 0x08
3817 #define _SSPBUF_BUF3 0x08
3818 #define _SSPBUF_SSP1BUF4 0x10
3819 #define _SSPBUF_BUF4 0x10
3820 #define _SSPBUF_SSP1BUF5 0x20
3821 #define _SSPBUF_BUF5 0x20
3822 #define _SSPBUF_SSP1BUF6 0x40
3823 #define _SSPBUF_BUF6 0x40
3824 #define _SSPBUF_SSP1BUF7 0x80
3825 #define _SSPBUF_BUF7 0x80
3827 //==============================================================================
3830 //==============================================================================
3833 extern __at(0x0212) __sfr SSP1ADD
;
3839 unsigned SSP1ADD0
: 1;
3840 unsigned SSP1ADD1
: 1;
3841 unsigned SSP1ADD2
: 1;
3842 unsigned SSP1ADD3
: 1;
3843 unsigned SSP1ADD4
: 1;
3844 unsigned SSP1ADD5
: 1;
3845 unsigned SSP1ADD6
: 1;
3846 unsigned SSP1ADD7
: 1;
3862 extern __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits
;
3864 #define _SSP1ADD0 0x01
3866 #define _SSP1ADD1 0x02
3868 #define _SSP1ADD2 0x04
3870 #define _SSP1ADD3 0x08
3872 #define _SSP1ADD4 0x10
3874 #define _SSP1ADD5 0x20
3876 #define _SSP1ADD6 0x40
3878 #define _SSP1ADD7 0x80
3881 //==============================================================================
3884 //==============================================================================
3887 extern __at(0x0212) __sfr SSPADD
;
3893 unsigned SSP1ADD0
: 1;
3894 unsigned SSP1ADD1
: 1;
3895 unsigned SSP1ADD2
: 1;
3896 unsigned SSP1ADD3
: 1;
3897 unsigned SSP1ADD4
: 1;
3898 unsigned SSP1ADD5
: 1;
3899 unsigned SSP1ADD6
: 1;
3900 unsigned SSP1ADD7
: 1;
3916 extern __at(0x0212) volatile __SSPADDbits_t SSPADDbits
;
3918 #define _SSPADD_SSP1ADD0 0x01
3919 #define _SSPADD_ADD0 0x01
3920 #define _SSPADD_SSP1ADD1 0x02
3921 #define _SSPADD_ADD1 0x02
3922 #define _SSPADD_SSP1ADD2 0x04
3923 #define _SSPADD_ADD2 0x04
3924 #define _SSPADD_SSP1ADD3 0x08
3925 #define _SSPADD_ADD3 0x08
3926 #define _SSPADD_SSP1ADD4 0x10
3927 #define _SSPADD_ADD4 0x10
3928 #define _SSPADD_SSP1ADD5 0x20
3929 #define _SSPADD_ADD5 0x20
3930 #define _SSPADD_SSP1ADD6 0x40
3931 #define _SSPADD_ADD6 0x40
3932 #define _SSPADD_SSP1ADD7 0x80
3933 #define _SSPADD_ADD7 0x80
3935 //==============================================================================
3938 //==============================================================================
3941 extern __at(0x0213) __sfr SSP1MSK
;
3947 unsigned SSP1MSK0
: 1;
3948 unsigned SSP1MSK1
: 1;
3949 unsigned SSP1MSK2
: 1;
3950 unsigned SSP1MSK3
: 1;
3951 unsigned SSP1MSK4
: 1;
3952 unsigned SSP1MSK5
: 1;
3953 unsigned SSP1MSK6
: 1;
3954 unsigned SSP1MSK7
: 1;
3970 extern __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits
;
3972 #define _SSP1MSK0 0x01
3974 #define _SSP1MSK1 0x02
3976 #define _SSP1MSK2 0x04
3978 #define _SSP1MSK3 0x08
3980 #define _SSP1MSK4 0x10
3982 #define _SSP1MSK5 0x20
3984 #define _SSP1MSK6 0x40
3986 #define _SSP1MSK7 0x80
3989 //==============================================================================
3992 //==============================================================================
3995 extern __at(0x0213) __sfr SSPMSK
;
4001 unsigned SSP1MSK0
: 1;
4002 unsigned SSP1MSK1
: 1;
4003 unsigned SSP1MSK2
: 1;
4004 unsigned SSP1MSK3
: 1;
4005 unsigned SSP1MSK4
: 1;
4006 unsigned SSP1MSK5
: 1;
4007 unsigned SSP1MSK6
: 1;
4008 unsigned SSP1MSK7
: 1;
4024 extern __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits
;
4026 #define _SSPMSK_SSP1MSK0 0x01
4027 #define _SSPMSK_MSK0 0x01
4028 #define _SSPMSK_SSP1MSK1 0x02
4029 #define _SSPMSK_MSK1 0x02
4030 #define _SSPMSK_SSP1MSK2 0x04
4031 #define _SSPMSK_MSK2 0x04
4032 #define _SSPMSK_SSP1MSK3 0x08
4033 #define _SSPMSK_MSK3 0x08
4034 #define _SSPMSK_SSP1MSK4 0x10
4035 #define _SSPMSK_MSK4 0x10
4036 #define _SSPMSK_SSP1MSK5 0x20
4037 #define _SSPMSK_MSK5 0x20
4038 #define _SSPMSK_SSP1MSK6 0x40
4039 #define _SSPMSK_MSK6 0x40
4040 #define _SSPMSK_SSP1MSK7 0x80
4041 #define _SSPMSK_MSK7 0x80
4043 //==============================================================================
4046 //==============================================================================
4049 extern __at(0x0214) __sfr SSP1STAT
;
4055 unsigned R_NOT_W
: 1;
4058 unsigned D_NOT_A
: 1;
4063 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits
;
4067 #define _R_NOT_W 0x04
4070 #define _D_NOT_A 0x20
4074 //==============================================================================
4077 //==============================================================================
4080 extern __at(0x0214) __sfr SSPSTAT
;
4086 unsigned R_NOT_W
: 1;
4089 unsigned D_NOT_A
: 1;
4094 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits
;
4096 #define _SSPSTAT_BF 0x01
4097 #define _SSPSTAT_UA 0x02
4098 #define _SSPSTAT_R_NOT_W 0x04
4099 #define _SSPSTAT_S 0x08
4100 #define _SSPSTAT_P 0x10
4101 #define _SSPSTAT_D_NOT_A 0x20
4102 #define _SSPSTAT_CKE 0x40
4103 #define _SSPSTAT_SMP 0x80
4105 //==============================================================================
4108 //==============================================================================
4111 extern __at(0x0215) __sfr SSP1CON
;
4134 extern __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits
;
4145 //==============================================================================
4148 //==============================================================================
4151 extern __at(0x0215) __sfr SSP1CON1
;
4174 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits
;
4176 #define _SSP1CON1_SSPM0 0x01
4177 #define _SSP1CON1_SSPM1 0x02
4178 #define _SSP1CON1_SSPM2 0x04
4179 #define _SSP1CON1_SSPM3 0x08
4180 #define _SSP1CON1_CKP 0x10
4181 #define _SSP1CON1_SSPEN 0x20
4182 #define _SSP1CON1_SSPOV 0x40
4183 #define _SSP1CON1_WCOL 0x80
4185 //==============================================================================
4188 //==============================================================================
4191 extern __at(0x0215) __sfr SSPCON
;
4214 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits
;
4216 #define _SSPCON_SSPM0 0x01
4217 #define _SSPCON_SSPM1 0x02
4218 #define _SSPCON_SSPM2 0x04
4219 #define _SSPCON_SSPM3 0x08
4220 #define _SSPCON_CKP 0x10
4221 #define _SSPCON_SSPEN 0x20
4222 #define _SSPCON_SSPOV 0x40
4223 #define _SSPCON_WCOL 0x80
4225 //==============================================================================
4228 //==============================================================================
4231 extern __at(0x0215) __sfr SSPCON1
;
4254 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits
;
4256 #define _SSPCON1_SSPM0 0x01
4257 #define _SSPCON1_SSPM1 0x02
4258 #define _SSPCON1_SSPM2 0x04
4259 #define _SSPCON1_SSPM3 0x08
4260 #define _SSPCON1_CKP 0x10
4261 #define _SSPCON1_SSPEN 0x20
4262 #define _SSPCON1_SSPOV 0x40
4263 #define _SSPCON1_WCOL 0x80
4265 //==============================================================================
4268 //==============================================================================
4271 extern __at(0x0216) __sfr SSP1CON2
;
4281 unsigned ACKSTAT
: 1;
4285 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits
;
4293 #define _ACKSTAT 0x40
4296 //==============================================================================
4299 //==============================================================================
4302 extern __at(0x0216) __sfr SSPCON2
;
4312 unsigned ACKSTAT
: 1;
4316 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits
;
4318 #define _SSPCON2_SEN 0x01
4319 #define _SSPCON2_RSEN 0x02
4320 #define _SSPCON2_PEN 0x04
4321 #define _SSPCON2_RCEN 0x08
4322 #define _SSPCON2_ACKEN 0x10
4323 #define _SSPCON2_ACKDT 0x20
4324 #define _SSPCON2_ACKSTAT 0x40
4325 #define _SSPCON2_GCEN 0x80
4327 //==============================================================================
4330 //==============================================================================
4333 extern __at(0x0217) __sfr SSP1CON3
;
4344 unsigned ACKTIM
: 1;
4347 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits
;
4356 #define _ACKTIM 0x80
4358 //==============================================================================
4361 //==============================================================================
4364 extern __at(0x0217) __sfr SSPCON3
;
4375 unsigned ACKTIM
: 1;
4378 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits
;
4380 #define _SSPCON3_DHEN 0x01
4381 #define _SSPCON3_AHEN 0x02
4382 #define _SSPCON3_SBCDE 0x04
4383 #define _SSPCON3_SDAHT 0x08
4384 #define _SSPCON3_BOEN 0x10
4385 #define _SSPCON3_SCIE 0x20
4386 #define _SSPCON3_PCIE 0x40
4387 #define _SSPCON3_ACKTIM 0x80
4389 //==============================================================================
4392 //==============================================================================
4395 extern __at(0x021B) __sfr MD3CON0
;
4413 unsigned MD3BIT
: 1;
4417 unsigned MD3OPOL
: 1;
4418 unsigned MD3OUT
: 1;
4424 extern __at(0x021B) volatile __MD3CON0bits_t MD3CON0bits
;
4426 #define _MD3CON0_BIT 0x01
4427 #define _MD3CON0_MD3BIT 0x01
4428 #define _MD3CON0_OPOL 0x10
4429 #define _MD3CON0_MD3OPOL 0x10
4430 #define _MD3CON0_OUT 0x20
4431 #define _MD3CON0_MD3OUT 0x20
4432 #define _MD3CON0_EN 0x80
4433 #define _MD3CON0_MD3EN 0x80
4435 //==============================================================================
4438 //==============================================================================
4441 extern __at(0x021C) __sfr MD3CON1
;
4447 unsigned CLSYNC
: 1;
4451 unsigned CHSYNC
: 1;
4459 unsigned MD3CLSYNC
: 1;
4460 unsigned MD3CLPOL
: 1;
4463 unsigned MD3CHSYNC
: 1;
4464 unsigned MD3CHPOL
: 1;
4470 extern __at(0x021C) volatile __MD3CON1bits_t MD3CON1bits
;
4472 #define _MD3CON1_CLSYNC 0x01
4473 #define _MD3CON1_MD3CLSYNC 0x01
4474 #define _MD3CON1_CLPOL 0x02
4475 #define _MD3CON1_MD3CLPOL 0x02
4476 #define _MD3CON1_CHSYNC 0x10
4477 #define _MD3CON1_MD3CHSYNC 0x10
4478 #define _MD3CON1_CHPOL 0x20
4479 #define _MD3CON1_MD3CHPOL 0x20
4481 //==============================================================================
4484 //==============================================================================
4487 extern __at(0x021D) __sfr MD3SRC
;
4505 unsigned MD3MS0
: 1;
4506 unsigned MD3MS1
: 1;
4507 unsigned MD3MS2
: 1;
4508 unsigned MD3MS3
: 1;
4509 unsigned MD3MS4
: 1;
4528 extern __at(0x021D) volatile __MD3SRCbits_t MD3SRCbits
;
4530 #define _MD3SRC_MS0 0x01
4531 #define _MD3SRC_MD3MS0 0x01
4532 #define _MD3SRC_MS1 0x02
4533 #define _MD3SRC_MD3MS1 0x02
4534 #define _MD3SRC_MS2 0x04
4535 #define _MD3SRC_MD3MS2 0x04
4536 #define _MD3SRC_MS3 0x08
4537 #define _MD3SRC_MD3MS3 0x08
4538 #define _MD3SRC_MS4 0x10
4539 #define _MD3SRC_MD3MS4 0x10
4541 //==============================================================================
4544 //==============================================================================
4547 extern __at(0x021E) __sfr MD3CARL
;
4565 unsigned MD3CL0
: 1;
4566 unsigned MD3CL1
: 1;
4567 unsigned MD3CL2
: 1;
4568 unsigned MD3CL3
: 1;
4588 extern __at(0x021E) volatile __MD3CARLbits_t MD3CARLbits
;
4590 #define _MD3CARL_CL0 0x01
4591 #define _MD3CARL_MD3CL0 0x01
4592 #define _MD3CARL_CL1 0x02
4593 #define _MD3CARL_MD3CL1 0x02
4594 #define _MD3CARL_CL2 0x04
4595 #define _MD3CARL_MD3CL2 0x04
4596 #define _MD3CARL_CL3 0x08
4597 #define _MD3CARL_MD3CL3 0x08
4598 #define _MD3CARL_CL4 0x10
4600 //==============================================================================
4603 //==============================================================================
4606 extern __at(0x021F) __sfr MD3CARH
;
4624 unsigned MD3CH0
: 1;
4625 unsigned MD3CH1
: 1;
4626 unsigned MD3CH2
: 1;
4627 unsigned MD3CH3
: 1;
4647 extern __at(0x021F) volatile __MD3CARHbits_t MD3CARHbits
;
4649 #define _MD3CARH_CH0 0x01
4650 #define _MD3CARH_MD3CH0 0x01
4651 #define _MD3CARH_CH1 0x02
4652 #define _MD3CARH_MD3CH1 0x02
4653 #define _MD3CARH_CH2 0x04
4654 #define _MD3CARH_MD3CH2 0x04
4655 #define _MD3CARH_CH3 0x08
4656 #define _MD3CARH_MD3CH3 0x08
4657 #define _MD3CARH_CH4 0x10
4659 //==============================================================================
4662 //==============================================================================
4665 extern __at(0x028C) __sfr ODCONA
;
4679 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits
;
4690 //==============================================================================
4693 //==============================================================================
4696 extern __at(0x028D) __sfr ODCONB
;
4710 extern __at(0x028D) volatile __ODCONBbits_t ODCONBbits
;
4721 //==============================================================================
4724 //==============================================================================
4727 extern __at(0x028E) __sfr ODCONC
;
4741 extern __at(0x028E) volatile __ODCONCbits_t ODCONCbits
;
4752 //==============================================================================
4755 //==============================================================================
4758 extern __at(0x028F) __sfr ODCOND
;
4772 extern __at(0x028F) volatile __ODCONDbits_t ODCONDbits
;
4783 //==============================================================================
4786 //==============================================================================
4789 extern __at(0x0290) __sfr ODCONE
;
4812 extern __at(0x0290) volatile __ODCONEbits_t ODCONEbits
;
4818 //==============================================================================
4820 extern __at(0x0291) __sfr CCPR1
;
4821 extern __at(0x0291) __sfr CCPR1L
;
4822 extern __at(0x0292) __sfr CCPR1H
;
4824 //==============================================================================
4827 extern __at(0x0293) __sfr CCP1CON
;
4845 unsigned CCP1MODE0
: 1;
4846 unsigned CCP1MODE1
: 1;
4847 unsigned CCP1MODE2
: 1;
4848 unsigned CCP1MODE3
: 1;
4849 unsigned CCP1FMT
: 1;
4850 unsigned CCP1OUT
: 1;
4852 unsigned CCP1EN
: 1;
4863 unsigned CCP1MODE
: 4;
4868 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits
;
4871 #define _CCP1MODE0 0x01
4873 #define _CCP1MODE1 0x02
4875 #define _CCP1MODE2 0x04
4877 #define _CCP1MODE3 0x08
4879 #define _CCP1FMT 0x10
4881 #define _CCP1OUT 0x20
4883 #define _CCP1EN 0x80
4885 //==============================================================================
4888 //==============================================================================
4891 extern __at(0x0294) __sfr CCP1CAP
;
4909 unsigned CCP1CTS0
: 1;
4910 unsigned CCP1CTS1
: 1;
4911 unsigned CCP1CTS2
: 1;
4912 unsigned CCP1CTS3
: 1;
4921 unsigned CCP1CTS
: 4;
4932 extern __at(0x0294) volatile __CCP1CAPbits_t CCP1CAPbits
;
4935 #define _CCP1CTS0 0x01
4937 #define _CCP1CTS1 0x02
4939 #define _CCP1CTS2 0x04
4941 #define _CCP1CTS3 0x08
4943 //==============================================================================
4945 extern __at(0x0295) __sfr CCPR2
;
4946 extern __at(0x0295) __sfr CCPR2L
;
4947 extern __at(0x0296) __sfr CCPR2H
;
4949 //==============================================================================
4952 extern __at(0x0297) __sfr CCP2CON
;
4970 unsigned CCP2MODE0
: 1;
4971 unsigned CCP2MODE1
: 1;
4972 unsigned CCP2MODE2
: 1;
4973 unsigned CCP2MODE3
: 1;
4974 unsigned CCP2FMT
: 1;
4975 unsigned CCP2OUT
: 1;
4977 unsigned CCP2EN
: 1;
4988 unsigned CCP2MODE
: 4;
4993 extern __at(0x0297) volatile __CCP2CONbits_t CCP2CONbits
;
4995 #define _CCP2CON_MODE0 0x01
4996 #define _CCP2CON_CCP2MODE0 0x01
4997 #define _CCP2CON_MODE1 0x02
4998 #define _CCP2CON_CCP2MODE1 0x02
4999 #define _CCP2CON_MODE2 0x04
5000 #define _CCP2CON_CCP2MODE2 0x04
5001 #define _CCP2CON_MODE3 0x08
5002 #define _CCP2CON_CCP2MODE3 0x08
5003 #define _CCP2CON_FMT 0x10
5004 #define _CCP2CON_CCP2FMT 0x10
5005 #define _CCP2CON_OUT 0x20
5006 #define _CCP2CON_CCP2OUT 0x20
5007 #define _CCP2CON_EN 0x80
5008 #define _CCP2CON_CCP2EN 0x80
5010 //==============================================================================
5013 //==============================================================================
5016 extern __at(0x0298) __sfr CCP2CAP
;
5034 unsigned CCP2CTS0
: 1;
5035 unsigned CCP2CTS1
: 1;
5036 unsigned CCP2CTS2
: 1;
5037 unsigned CCP2CTS3
: 1;
5052 unsigned CCP2CTS
: 4;
5057 extern __at(0x0298) volatile __CCP2CAPbits_t CCP2CAPbits
;
5059 #define _CCP2CAP_CTS0 0x01
5060 #define _CCP2CAP_CCP2CTS0 0x01
5061 #define _CCP2CAP_CTS1 0x02
5062 #define _CCP2CAP_CCP2CTS1 0x02
5063 #define _CCP2CAP_CTS2 0x04
5064 #define _CCP2CAP_CCP2CTS2 0x04
5065 #define _CCP2CAP_CTS3 0x08
5066 #define _CCP2CAP_CCP2CTS3 0x08
5068 //==============================================================================
5070 extern __at(0x0299) __sfr CCPR7
;
5071 extern __at(0x0299) __sfr CCPR7L
;
5072 extern __at(0x029A) __sfr CCPR7H
;
5074 //==============================================================================
5077 extern __at(0x029B) __sfr CCP7CON
;
5095 unsigned CCP7MODE0
: 1;
5096 unsigned CCP7MODE1
: 1;
5097 unsigned CCP7MODE2
: 1;
5098 unsigned CCP7MODE3
: 1;
5099 unsigned CCP7FMT
: 1;
5100 unsigned CCP7OUT
: 1;
5102 unsigned CCP7EN
: 1;
5113 unsigned CCP7MODE
: 4;
5118 extern __at(0x029B) volatile __CCP7CONbits_t CCP7CONbits
;
5120 #define _CCP7CON_MODE0 0x01
5121 #define _CCP7CON_CCP7MODE0 0x01
5122 #define _CCP7CON_MODE1 0x02
5123 #define _CCP7CON_CCP7MODE1 0x02
5124 #define _CCP7CON_MODE2 0x04
5125 #define _CCP7CON_CCP7MODE2 0x04
5126 #define _CCP7CON_MODE3 0x08
5127 #define _CCP7CON_CCP7MODE3 0x08
5128 #define _CCP7CON_FMT 0x10
5129 #define _CCP7CON_CCP7FMT 0x10
5130 #define _CCP7CON_OUT 0x20
5131 #define _CCP7CON_CCP7OUT 0x20
5132 #define _CCP7CON_EN 0x80
5133 #define _CCP7CON_CCP7EN 0x80
5135 //==============================================================================
5138 //==============================================================================
5141 extern __at(0x029C) __sfr CCP7CAP
;
5159 unsigned CCP7CTS0
: 1;
5160 unsigned CCP7CTS1
: 1;
5161 unsigned CCP7CTS2
: 1;
5162 unsigned CCP7CTS3
: 1;
5171 unsigned CCP7CTS
: 4;
5182 extern __at(0x029C) volatile __CCP7CAPbits_t CCP7CAPbits
;
5184 #define _CCP7CAP_CTS0 0x01
5185 #define _CCP7CAP_CCP7CTS0 0x01
5186 #define _CCP7CAP_CTS1 0x02
5187 #define _CCP7CAP_CCP7CTS1 0x02
5188 #define _CCP7CAP_CTS2 0x04
5189 #define _CCP7CAP_CCP7CTS2 0x04
5190 #define _CCP7CAP_CTS3 0x08
5191 #define _CCP7CAP_CCP7CTS3 0x08
5193 //==============================================================================
5196 //==============================================================================
5199 extern __at(0x029E) __sfr CCPTMRS1
;
5205 unsigned C1TSEL0
: 1;
5206 unsigned C1TSEL1
: 1;
5207 unsigned C2TSEL0
: 1;
5208 unsigned C2TSEL1
: 1;
5209 unsigned C7TSEL0
: 1;
5210 unsigned C7TSEL1
: 1;
5217 unsigned C1TSEL
: 2;
5224 unsigned C2TSEL
: 2;
5231 unsigned C7TSEL
: 2;
5236 extern __at(0x029E) volatile __CCPTMRS1bits_t CCPTMRS1bits
;
5238 #define _C1TSEL0 0x01
5239 #define _C1TSEL1 0x02
5240 #define _C2TSEL0 0x04
5241 #define _C2TSEL1 0x08
5242 #define _C7TSEL0 0x10
5243 #define _C7TSEL1 0x20
5245 //==============================================================================
5248 //==============================================================================
5251 extern __at(0x029F) __sfr CCPTMRS2
;
5257 unsigned P3TSEL0
: 1;
5258 unsigned P3TSEL1
: 1;
5259 unsigned P4TSEL0
: 1;
5260 unsigned P4TSEL1
: 1;
5261 unsigned P9TSEL0
: 1;
5262 unsigned P9TSEL1
: 1;
5269 unsigned P3TSEL
: 2;
5276 unsigned P4TSEL
: 2;
5283 unsigned P9TSEL
: 2;
5288 extern __at(0x029F) volatile __CCPTMRS2bits_t CCPTMRS2bits
;
5290 #define _P3TSEL0 0x01
5291 #define _P3TSEL1 0x02
5292 #define _P4TSEL0 0x04
5293 #define _P4TSEL1 0x08
5294 #define _P9TSEL0 0x10
5295 #define _P9TSEL1 0x20
5297 //==============================================================================
5300 //==============================================================================
5303 extern __at(0x030C) __sfr SLRCONA
;
5317 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits
;
5328 //==============================================================================
5331 //==============================================================================
5334 extern __at(0x030D) __sfr SLRCONB
;
5348 extern __at(0x030D) volatile __SLRCONBbits_t SLRCONBbits
;
5359 //==============================================================================
5362 //==============================================================================
5365 extern __at(0x030E) __sfr SLRCONC
;
5379 extern __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits
;
5390 //==============================================================================
5393 //==============================================================================
5396 extern __at(0x030F) __sfr SLRCOND
;
5410 extern __at(0x030F) volatile __SLRCONDbits_t SLRCONDbits
;
5421 //==============================================================================
5424 //==============================================================================
5427 extern __at(0x0310) __sfr SLRCONE
;
5450 extern __at(0x0310) volatile __SLRCONEbits_t SLRCONEbits
;
5456 //==============================================================================
5458 extern __at(0x0311) __sfr CCPR8
;
5459 extern __at(0x0311) __sfr CCPR8L
;
5460 extern __at(0x0312) __sfr CCPR8H
;
5462 //==============================================================================
5465 extern __at(0x0313) __sfr CCP8CON
;
5483 unsigned CCP8MODE0
: 1;
5484 unsigned CCP8MODE1
: 1;
5485 unsigned CCP8MODE2
: 1;
5486 unsigned CCP8MODE3
: 1;
5487 unsigned CCP8FMT
: 1;
5488 unsigned CCP8OUT
: 1;
5490 unsigned CCP8EN
: 1;
5501 unsigned CCP8MODE
: 4;
5506 extern __at(0x0313) volatile __CCP8CONbits_t CCP8CONbits
;
5508 #define _CCP8CON_MODE0 0x01
5509 #define _CCP8CON_CCP8MODE0 0x01
5510 #define _CCP8CON_MODE1 0x02
5511 #define _CCP8CON_CCP8MODE1 0x02
5512 #define _CCP8CON_MODE2 0x04
5513 #define _CCP8CON_CCP8MODE2 0x04
5514 #define _CCP8CON_MODE3 0x08
5515 #define _CCP8CON_CCP8MODE3 0x08
5516 #define _CCP8CON_FMT 0x10
5517 #define _CCP8CON_CCP8FMT 0x10
5518 #define _CCP8CON_OUT 0x20
5519 #define _CCP8CON_CCP8OUT 0x20
5520 #define _CCP8CON_EN 0x80
5521 #define _CCP8CON_CCP8EN 0x80
5523 //==============================================================================
5526 //==============================================================================
5529 extern __at(0x0314) __sfr CCP8CAP
;
5547 unsigned CCP8CTS0
: 1;
5548 unsigned CCP8CTS1
: 1;
5549 unsigned CCP8CTS2
: 1;
5550 unsigned CCP8CTS3
: 1;
5565 unsigned CCP8CTS
: 4;
5570 extern __at(0x0314) volatile __CCP8CAPbits_t CCP8CAPbits
;
5572 #define _CCP8CAP_CTS0 0x01
5573 #define _CCP8CAP_CCP8CTS0 0x01
5574 #define _CCP8CAP_CTS1 0x02
5575 #define _CCP8CAP_CCP8CTS1 0x02
5576 #define _CCP8CAP_CTS2 0x04
5577 #define _CCP8CAP_CCP8CTS2 0x04
5578 #define _CCP8CAP_CTS3 0x08
5579 #define _CCP8CAP_CCP8CTS3 0x08
5581 //==============================================================================
5584 //==============================================================================
5587 extern __at(0x0315) __sfr MD1CON0
;
5605 unsigned MD1BIT
: 1;
5609 unsigned MD1OPOL
: 1;
5610 unsigned MD1OUT
: 1;
5616 extern __at(0x0315) volatile __MD1CON0bits_t MD1CON0bits
;
5618 #define _MD1CON0_BIT 0x01
5619 #define _MD1CON0_MD1BIT 0x01
5620 #define _MD1CON0_OPOL 0x10
5621 #define _MD1CON0_MD1OPOL 0x10
5622 #define _MD1CON0_OUT 0x20
5623 #define _MD1CON0_MD1OUT 0x20
5624 #define _MD1CON0_EN 0x80
5625 #define _MD1CON0_MD1EN 0x80
5627 //==============================================================================
5630 //==============================================================================
5633 extern __at(0x0316) __sfr MD1CON1
;
5639 unsigned CLSYNC
: 1;
5643 unsigned CHSYNC
: 1;
5651 unsigned MD1CLSYNC
: 1;
5652 unsigned MD1CLPOL
: 1;
5655 unsigned MD1CHSYNC
: 1;
5656 unsigned MD1CHPOL
: 1;
5662 extern __at(0x0316) volatile __MD1CON1bits_t MD1CON1bits
;
5664 #define _CLSYNC 0x01
5665 #define _MD1CLSYNC 0x01
5667 #define _MD1CLPOL 0x02
5668 #define _CHSYNC 0x10
5669 #define _MD1CHSYNC 0x10
5671 #define _MD1CHPOL 0x20
5673 //==============================================================================
5676 //==============================================================================
5679 extern __at(0x0317) __sfr MD1SRC
;
5697 unsigned MD1MS0
: 1;
5698 unsigned MD1MS1
: 1;
5699 unsigned MD1MS2
: 1;
5700 unsigned MD1MS3
: 1;
5701 unsigned MD1MS4
: 1;
5720 extern __at(0x0317) volatile __MD1SRCbits_t MD1SRCbits
;
5723 #define _MD1MS0 0x01
5725 #define _MD1MS1 0x02
5727 #define _MD1MS2 0x04
5729 #define _MD1MS3 0x08
5731 #define _MD1MS4 0x10
5733 //==============================================================================
5736 //==============================================================================
5739 extern __at(0x0318) __sfr MD1CARL
;
5757 unsigned MD1CL0
: 1;
5758 unsigned MD1CL1
: 1;
5759 unsigned MD1CL2
: 1;
5760 unsigned MD1CL3
: 1;
5780 extern __at(0x0318) volatile __MD1CARLbits_t MD1CARLbits
;
5783 #define _MD1CL0 0x01
5785 #define _MD1CL1 0x02
5787 #define _MD1CL2 0x04
5789 #define _MD1CL3 0x08
5792 //==============================================================================
5795 //==============================================================================
5798 extern __at(0x0319) __sfr MD1CARH
;
5816 unsigned MD1CH0
: 1;
5817 unsigned MD1CH1
: 1;
5818 unsigned MD1CH2
: 1;
5819 unsigned MD1CH3
: 1;
5839 extern __at(0x0319) volatile __MD1CARHbits_t MD1CARHbits
;
5842 #define _MD1CH0 0x01
5844 #define _MD1CH1 0x02
5846 #define _MD1CH2 0x04
5848 #define _MD1CH3 0x08
5851 //==============================================================================
5854 //==============================================================================
5857 extern __at(0x031B) __sfr MD2CON0
;
5875 unsigned MD2BIT
: 1;
5879 unsigned MD2OPOL
: 1;
5880 unsigned MD2OUT
: 1;
5886 extern __at(0x031B) volatile __MD2CON0bits_t MD2CON0bits
;
5888 #define _MD2CON0_BIT 0x01
5889 #define _MD2CON0_MD2BIT 0x01
5890 #define _MD2CON0_OPOL 0x10
5891 #define _MD2CON0_MD2OPOL 0x10
5892 #define _MD2CON0_OUT 0x20
5893 #define _MD2CON0_MD2OUT 0x20
5894 #define _MD2CON0_EN 0x80
5895 #define _MD2CON0_MD2EN 0x80
5897 //==============================================================================
5900 //==============================================================================
5903 extern __at(0x031C) __sfr MD2CON1
;
5909 unsigned CLSYNC
: 1;
5913 unsigned CHSYNC
: 1;
5921 unsigned MD2CLSYNC
: 1;
5922 unsigned MD2CLPOL
: 1;
5925 unsigned MD2CHSYNC
: 1;
5926 unsigned MD2CHPOL
: 1;
5932 extern __at(0x031C) volatile __MD2CON1bits_t MD2CON1bits
;
5934 #define _MD2CON1_CLSYNC 0x01
5935 #define _MD2CON1_MD2CLSYNC 0x01
5936 #define _MD2CON1_CLPOL 0x02
5937 #define _MD2CON1_MD2CLPOL 0x02
5938 #define _MD2CON1_CHSYNC 0x10
5939 #define _MD2CON1_MD2CHSYNC 0x10
5940 #define _MD2CON1_CHPOL 0x20
5941 #define _MD2CON1_MD2CHPOL 0x20
5943 //==============================================================================
5946 //==============================================================================
5949 extern __at(0x031D) __sfr MD2SRC
;
5967 unsigned MD2MS0
: 1;
5968 unsigned MD2MS1
: 1;
5969 unsigned MD2MS2
: 1;
5970 unsigned MD2MS3
: 1;
5971 unsigned MD2MS4
: 1;
5990 extern __at(0x031D) volatile __MD2SRCbits_t MD2SRCbits
;
5992 #define _MD2SRC_MS0 0x01
5993 #define _MD2SRC_MD2MS0 0x01
5994 #define _MD2SRC_MS1 0x02
5995 #define _MD2SRC_MD2MS1 0x02
5996 #define _MD2SRC_MS2 0x04
5997 #define _MD2SRC_MD2MS2 0x04
5998 #define _MD2SRC_MS3 0x08
5999 #define _MD2SRC_MD2MS3 0x08
6000 #define _MD2SRC_MS4 0x10
6001 #define _MD2SRC_MD2MS4 0x10
6003 //==============================================================================
6006 //==============================================================================
6009 extern __at(0x031E) __sfr MD2CARL
;
6027 unsigned MD2CL0
: 1;
6028 unsigned MD2CL1
: 1;
6029 unsigned MD2CL2
: 1;
6030 unsigned MD2CL3
: 1;
6050 extern __at(0x031E) volatile __MD2CARLbits_t MD2CARLbits
;
6052 #define _MD2CARL_CL0 0x01
6053 #define _MD2CARL_MD2CL0 0x01
6054 #define _MD2CARL_CL1 0x02
6055 #define _MD2CARL_MD2CL1 0x02
6056 #define _MD2CARL_CL2 0x04
6057 #define _MD2CARL_MD2CL2 0x04
6058 #define _MD2CARL_CL3 0x08
6059 #define _MD2CARL_MD2CL3 0x08
6060 #define _MD2CARL_CL4 0x10
6062 //==============================================================================
6065 //==============================================================================
6068 extern __at(0x031F) __sfr MD2CARH
;
6086 unsigned MD2CH0
: 1;
6087 unsigned MD2CH1
: 1;
6088 unsigned MD2CH2
: 1;
6089 unsigned MD2CH3
: 1;
6109 extern __at(0x031F) volatile __MD2CARHbits_t MD2CARHbits
;
6111 #define _MD2CARH_CH0 0x01
6112 #define _MD2CARH_MD2CH0 0x01
6113 #define _MD2CARH_CH1 0x02
6114 #define _MD2CARH_MD2CH1 0x02
6115 #define _MD2CARH_CH2 0x04
6116 #define _MD2CARH_MD2CH2 0x04
6117 #define _MD2CARH_CH3 0x08
6118 #define _MD2CARH_MD2CH3 0x08
6119 #define _MD2CARH_CH4 0x10
6121 //==============================================================================
6124 //==============================================================================
6127 extern __at(0x038C) __sfr INLVLA
;
6133 unsigned INLVLA0
: 1;
6134 unsigned INLVLA1
: 1;
6135 unsigned INLVLA2
: 1;
6136 unsigned INLVLA3
: 1;
6137 unsigned INLVLA4
: 1;
6138 unsigned INLVLA5
: 1;
6139 unsigned INLVA6
: 1;
6140 unsigned INLVA7
: 1;
6145 unsigned INLVLA
: 6;
6150 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits
;
6152 #define _INLVLA0 0x01
6153 #define _INLVLA1 0x02
6154 #define _INLVLA2 0x04
6155 #define _INLVLA3 0x08
6156 #define _INLVLA4 0x10
6157 #define _INLVLA5 0x20
6158 #define _INLVA6 0x40
6159 #define _INLVA7 0x80
6161 //==============================================================================
6164 //==============================================================================
6167 extern __at(0x038D) __sfr INLVLB
;
6173 unsigned INLVB0
: 1;
6174 unsigned INLVB1
: 1;
6175 unsigned INLVB2
: 1;
6176 unsigned INLVB3
: 1;
6177 unsigned INLVLB4
: 1;
6178 unsigned INLVLB5
: 1;
6179 unsigned INLVLB6
: 1;
6180 unsigned INLVLB7
: 1;
6190 extern __at(0x038D) volatile __INLVLBbits_t INLVLBbits
;
6192 #define _INLVB0 0x01
6193 #define _INLVB1 0x02
6194 #define _INLVB2 0x04
6195 #define _INLVB3 0x08
6196 #define _INLVLB4 0x10
6197 #define _INLVLB5 0x20
6198 #define _INLVLB6 0x40
6199 #define _INLVLB7 0x80
6201 //==============================================================================
6204 //==============================================================================
6207 extern __at(0x038E) __sfr INLVLC
;
6211 unsigned INLVLC0
: 1;
6212 unsigned INLVLC1
: 1;
6213 unsigned INLVLC2
: 1;
6214 unsigned INLVLC3
: 1;
6215 unsigned INLVLC4
: 1;
6216 unsigned INLVLC5
: 1;
6217 unsigned INLVLC6
: 1;
6218 unsigned INLVLC7
: 1;
6221 extern __at(0x038E) volatile __INLVLCbits_t INLVLCbits
;
6223 #define _INLVLC0 0x01
6224 #define _INLVLC1 0x02
6225 #define _INLVLC2 0x04
6226 #define _INLVLC3 0x08
6227 #define _INLVLC4 0x10
6228 #define _INLVLC5 0x20
6229 #define _INLVLC6 0x40
6230 #define _INLVLC7 0x80
6232 //==============================================================================
6235 //==============================================================================
6238 extern __at(0x038F) __sfr INLVLD
;
6242 unsigned INLVLD0
: 1;
6243 unsigned INLVLD1
: 1;
6244 unsigned INLVLD2
: 1;
6245 unsigned INLVLD3
: 1;
6246 unsigned INLVLD4
: 1;
6247 unsigned INLVLD5
: 1;
6248 unsigned INLVLD6
: 1;
6249 unsigned INLVLD7
: 1;
6252 extern __at(0x038F) volatile __INLVLDbits_t INLVLDbits
;
6254 #define _INLVLD0 0x01
6255 #define _INLVLD1 0x02
6256 #define _INLVLD2 0x04
6257 #define _INLVLD3 0x08
6258 #define _INLVLD4 0x10
6259 #define _INLVLD5 0x20
6260 #define _INLVLD6 0x40
6261 #define _INLVLD7 0x80
6263 //==============================================================================
6266 //==============================================================================
6269 extern __at(0x0390) __sfr INLVE
;
6275 unsigned INLVE0
: 1;
6276 unsigned INLVE1
: 1;
6277 unsigned INLVE2
: 1;
6278 unsigned INLVE3
: 1;
6292 extern __at(0x0390) volatile __INLVEbits_t INLVEbits
;
6294 #define _INLVE0 0x01
6295 #define _INLVE1 0x02
6296 #define _INLVE2 0x04
6297 #define _INLVE3 0x08
6299 //==============================================================================
6302 //==============================================================================
6305 extern __at(0x0391) __sfr IOCAP
;
6309 unsigned IOCAP0
: 1;
6310 unsigned IOCAP1
: 1;
6311 unsigned IOCAP2
: 1;
6312 unsigned IOCAP3
: 1;
6313 unsigned IOCAP4
: 1;
6314 unsigned IOCAP5
: 1;
6315 unsigned IOCAP6
: 1;
6316 unsigned IOCAP7
: 1;
6319 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits
;
6321 #define _IOCAP0 0x01
6322 #define _IOCAP1 0x02
6323 #define _IOCAP2 0x04
6324 #define _IOCAP3 0x08
6325 #define _IOCAP4 0x10
6326 #define _IOCAP5 0x20
6327 #define _IOCAP6 0x40
6328 #define _IOCAP7 0x80
6330 //==============================================================================
6333 //==============================================================================
6336 extern __at(0x0392) __sfr IOCAN
;
6340 unsigned IOCAN0
: 1;
6341 unsigned IOCAN1
: 1;
6342 unsigned IOCAN2
: 1;
6343 unsigned IOCAN3
: 1;
6344 unsigned IOCAN4
: 1;
6345 unsigned IOCAN5
: 1;
6346 unsigned IOCAN6
: 1;
6347 unsigned IOCAN7
: 1;
6350 extern __at(0x0392) volatile __IOCANbits_t IOCANbits
;
6352 #define _IOCAN0 0x01
6353 #define _IOCAN1 0x02
6354 #define _IOCAN2 0x04
6355 #define _IOCAN3 0x08
6356 #define _IOCAN4 0x10
6357 #define _IOCAN5 0x20
6358 #define _IOCAN6 0x40
6359 #define _IOCAN7 0x80
6361 //==============================================================================
6364 //==============================================================================
6367 extern __at(0x0393) __sfr IOCAF
;
6371 unsigned IOCAF0
: 1;
6372 unsigned IOCAF1
: 1;
6373 unsigned IOCAF2
: 1;
6374 unsigned IOCAF3
: 1;
6375 unsigned IOCAF4
: 1;
6376 unsigned IOCAF5
: 1;
6377 unsigned IOCAF6
: 1;
6378 unsigned IOCAF7
: 1;
6381 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits
;
6383 #define _IOCAF0 0x01
6384 #define _IOCAF1 0x02
6385 #define _IOCAF2 0x04
6386 #define _IOCAF3 0x08
6387 #define _IOCAF4 0x10
6388 #define _IOCAF5 0x20
6389 #define _IOCAF6 0x40
6390 #define _IOCAF7 0x80
6392 //==============================================================================
6395 //==============================================================================
6398 extern __at(0x0394) __sfr IOCBP
;
6402 unsigned IOCBP0
: 1;
6403 unsigned IOCBP1
: 1;
6404 unsigned IOCBP2
: 1;
6405 unsigned IOCBP3
: 1;
6406 unsigned IOCBP4
: 1;
6407 unsigned IOCBP5
: 1;
6408 unsigned IOCBP6
: 1;
6409 unsigned IOCBP7
: 1;
6412 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits
;
6414 #define _IOCBP0 0x01
6415 #define _IOCBP1 0x02
6416 #define _IOCBP2 0x04
6417 #define _IOCBP3 0x08
6418 #define _IOCBP4 0x10
6419 #define _IOCBP5 0x20
6420 #define _IOCBP6 0x40
6421 #define _IOCBP7 0x80
6423 //==============================================================================
6426 //==============================================================================
6429 extern __at(0x0395) __sfr IOCBN
;
6433 unsigned IOCBN0
: 1;
6434 unsigned IOCBN1
: 1;
6435 unsigned IOCBN2
: 1;
6436 unsigned IOCBN3
: 1;
6437 unsigned IOCBN4
: 1;
6438 unsigned IOCBN5
: 1;
6439 unsigned IOCBN6
: 1;
6440 unsigned IOCBN7
: 1;
6443 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits
;
6445 #define _IOCBN0 0x01
6446 #define _IOCBN1 0x02
6447 #define _IOCBN2 0x04
6448 #define _IOCBN3 0x08
6449 #define _IOCBN4 0x10
6450 #define _IOCBN5 0x20
6451 #define _IOCBN6 0x40
6452 #define _IOCBN7 0x80
6454 //==============================================================================
6457 //==============================================================================
6460 extern __at(0x0396) __sfr IOCBF
;
6464 unsigned IOCBF0
: 1;
6465 unsigned IOCBF1
: 1;
6466 unsigned IOCBF2
: 1;
6467 unsigned IOCBF3
: 1;
6468 unsigned IOCBF4
: 1;
6469 unsigned IOCBF5
: 1;
6470 unsigned IOCBF6
: 1;
6471 unsigned IOCBF7
: 1;
6474 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits
;
6476 #define _IOCBF0 0x01
6477 #define _IOCBF1 0x02
6478 #define _IOCBF2 0x04
6479 #define _IOCBF3 0x08
6480 #define _IOCBF4 0x10
6481 #define _IOCBF5 0x20
6482 #define _IOCBF6 0x40
6483 #define _IOCBF7 0x80
6485 //==============================================================================
6488 //==============================================================================
6491 extern __at(0x0397) __sfr IOCCP
;
6495 unsigned IOCCP0
: 1;
6496 unsigned IOCCP1
: 1;
6497 unsigned IOCCP2
: 1;
6498 unsigned IOCCP3
: 1;
6499 unsigned IOCCP4
: 1;
6500 unsigned IOCCP5
: 1;
6501 unsigned IOCCP6
: 1;
6502 unsigned IOCCP7
: 1;
6505 extern __at(0x0397) volatile __IOCCPbits_t IOCCPbits
;
6507 #define _IOCCP0 0x01
6508 #define _IOCCP1 0x02
6509 #define _IOCCP2 0x04
6510 #define _IOCCP3 0x08
6511 #define _IOCCP4 0x10
6512 #define _IOCCP5 0x20
6513 #define _IOCCP6 0x40
6514 #define _IOCCP7 0x80
6516 //==============================================================================
6519 //==============================================================================
6522 extern __at(0x0398) __sfr IOCCN
;
6526 unsigned IOCCN0
: 1;
6527 unsigned IOCCN1
: 1;
6528 unsigned IOCCN2
: 1;
6529 unsigned IOCCN3
: 1;
6530 unsigned IOCCN4
: 1;
6531 unsigned IOCCN5
: 1;
6532 unsigned IOCCN6
: 1;
6533 unsigned IOCCN7
: 1;
6536 extern __at(0x0398) volatile __IOCCNbits_t IOCCNbits
;
6538 #define _IOCCN0 0x01
6539 #define _IOCCN1 0x02
6540 #define _IOCCN2 0x04
6541 #define _IOCCN3 0x08
6542 #define _IOCCN4 0x10
6543 #define _IOCCN5 0x20
6544 #define _IOCCN6 0x40
6545 #define _IOCCN7 0x80
6547 //==============================================================================
6550 //==============================================================================
6553 extern __at(0x0399) __sfr IOCCF
;
6557 unsigned IOCCF0
: 1;
6558 unsigned IOCCF1
: 1;
6559 unsigned IOCCF2
: 1;
6560 unsigned IOCCF3
: 1;
6561 unsigned IOCCF4
: 1;
6562 unsigned IOCCF5
: 1;
6563 unsigned IOCCF6
: 1;
6564 unsigned IOCCF7
: 1;
6567 extern __at(0x0399) volatile __IOCCFbits_t IOCCFbits
;
6569 #define _IOCCF0 0x01
6570 #define _IOCCF1 0x02
6571 #define _IOCCF2 0x04
6572 #define _IOCCF3 0x08
6573 #define _IOCCF4 0x10
6574 #define _IOCCF5 0x20
6575 #define _IOCCF6 0x40
6576 #define _IOCCF7 0x80
6578 //==============================================================================
6581 //==============================================================================
6584 extern __at(0x039D) __sfr IOCEP
;
6591 unsigned IOCEP3
: 1;
6598 extern __at(0x039D) volatile __IOCEPbits_t IOCEPbits
;
6600 #define _IOCEP3 0x08
6602 //==============================================================================
6605 //==============================================================================
6608 extern __at(0x039E) __sfr IOCEN
;
6615 unsigned IOCEN3
: 1;
6622 extern __at(0x039E) volatile __IOCENbits_t IOCENbits
;
6624 #define _IOCEN3 0x08
6626 //==============================================================================
6629 //==============================================================================
6632 extern __at(0x039F) __sfr IOCEF
;
6639 unsigned IOCEF3
: 1;
6646 extern __at(0x039F) volatile __IOCEFbits_t IOCEFbits
;
6648 #define _IOCEF3 0x08
6650 //==============================================================================
6653 //==============================================================================
6656 extern __at(0x040D) __sfr HIDRVB
;
6679 extern __at(0x040D) volatile __HIDRVBbits_t HIDRVBbits
;
6684 //==============================================================================
6686 extern __at(0x040F) __sfr TMR5
;
6687 extern __at(0x040F) __sfr TMR5L
;
6688 extern __at(0x0410) __sfr TMR5H
;
6690 //==============================================================================
6693 extern __at(0x0411) __sfr T5CON
;
6701 unsigned NOT_SYNC
: 1;
6714 unsigned SOSCEN
: 1;
6715 unsigned T5CKPS0
: 1;
6716 unsigned T5CKPS1
: 1;
6723 unsigned TMR5ON
: 1;
6725 unsigned NOT_T5SYNC
: 1;
6726 unsigned T5OSCEN
: 1;
6729 unsigned TMR5CS0
: 1;
6730 unsigned TMR5CS1
: 1;
6748 unsigned T5CKPS
: 2;
6768 unsigned TMR5CS
: 2;
6778 extern __at(0x0411) volatile __T5CONbits_t T5CONbits
;
6780 #define _T5CON_ON 0x01
6781 #define _T5CON_TMRON 0x01
6782 #define _T5CON_TMR5ON 0x01
6783 #define _T5CON_T5ON 0x01
6784 #define _T5CON_NOT_SYNC 0x04
6785 #define _T5CON_SYNC 0x04
6786 #define _T5CON_NOT_T5SYNC 0x04
6787 #define _T5CON_OSCEN 0x08
6788 #define _T5CON_SOSCEN 0x08
6789 #define _T5CON_T5OSCEN 0x08
6790 #define _T5CON_CKPS0 0x10
6791 #define _T5CON_T5CKPS0 0x10
6792 #define _T5CON_CKPS1 0x20
6793 #define _T5CON_T5CKPS1 0x20
6794 #define _T5CON_CS0 0x40
6795 #define _T5CON_T5CS0 0x40
6796 #define _T5CON_TMR5CS0 0x40
6797 #define _T5CON_CS1 0x80
6798 #define _T5CON_T5CS1 0x80
6799 #define _T5CON_TMR5CS1 0x80
6801 //==============================================================================
6804 //==============================================================================
6807 extern __at(0x0412) __sfr T5GCON
;
6816 unsigned GGO_NOT_DONE
: 1;
6825 unsigned T5GSS0
: 1;
6826 unsigned T5GSS1
: 1;
6827 unsigned T5GVAL
: 1;
6828 unsigned T5GGO_NOT_DONE
: 1;
6829 unsigned T5GSPM
: 1;
6831 unsigned T5GPOL
: 1;
6844 unsigned TMR5GE
: 1;
6860 extern __at(0x0412) volatile __T5GCONbits_t T5GCONbits
;
6862 #define _T5GCON_GSS0 0x01
6863 #define _T5GCON_T5GSS0 0x01
6864 #define _T5GCON_GSS1 0x02
6865 #define _T5GCON_T5GSS1 0x02
6866 #define _T5GCON_GVAL 0x04
6867 #define _T5GCON_T5GVAL 0x04
6868 #define _T5GCON_GGO_NOT_DONE 0x08
6869 #define _T5GCON_T5GGO_NOT_DONE 0x08
6870 #define _T5GCON_GSPM 0x10
6871 #define _T5GCON_T5GSPM 0x10
6872 #define _T5GCON_GTM 0x20
6873 #define _T5GCON_T5GTM 0x20
6874 #define _T5GCON_GPOL 0x40
6875 #define _T5GCON_T5GPOL 0x40
6876 #define _T5GCON_GE 0x80
6877 #define _T5GCON_T5GE 0x80
6878 #define _T5GCON_TMR5GE 0x80
6880 //==============================================================================
6882 extern __at(0x0413) __sfr T4TMR
;
6883 extern __at(0x0413) __sfr TMR4
;
6884 extern __at(0x0414) __sfr PR4
;
6885 extern __at(0x0414) __sfr T4PR
;
6887 //==============================================================================
6890 extern __at(0x0415) __sfr T4CON
;
6896 unsigned OUTPS0
: 1;
6897 unsigned OUTPS1
: 1;
6898 unsigned OUTPS2
: 1;
6899 unsigned OUTPS3
: 1;
6908 unsigned T4OUTPS0
: 1;
6909 unsigned T4OUTPS1
: 1;
6910 unsigned T4OUTPS2
: 1;
6911 unsigned T4OUTPS3
: 1;
6912 unsigned T4CKPS0
: 1;
6913 unsigned T4CKPS1
: 1;
6914 unsigned T4CKPS2
: 1;
6927 unsigned TMR4ON
: 1;
6932 unsigned T4OUTPS
: 4;
6952 unsigned T4CKPS
: 3;
6957 extern __at(0x0415) volatile __T4CONbits_t T4CONbits
;
6959 #define _T4CON_OUTPS0 0x01
6960 #define _T4CON_T4OUTPS0 0x01
6961 #define _T4CON_OUTPS1 0x02
6962 #define _T4CON_T4OUTPS1 0x02
6963 #define _T4CON_OUTPS2 0x04
6964 #define _T4CON_T4OUTPS2 0x04
6965 #define _T4CON_OUTPS3 0x08
6966 #define _T4CON_T4OUTPS3 0x08
6967 #define _T4CON_CKPS0 0x10
6968 #define _T4CON_T4CKPS0 0x10
6969 #define _T4CON_CKPS1 0x20
6970 #define _T4CON_T4CKPS1 0x20
6971 #define _T4CON_CKPS2 0x40
6972 #define _T4CON_T4CKPS2 0x40
6973 #define _T4CON_ON 0x80
6974 #define _T4CON_T4ON 0x80
6975 #define _T4CON_TMR4ON 0x80
6977 //==============================================================================
6980 //==============================================================================
6983 extern __at(0x0416) __sfr T4HLT
;
6994 unsigned CKSYNC
: 1;
7001 unsigned T4MODE0
: 1;
7002 unsigned T4MODE1
: 1;
7003 unsigned T4MODE2
: 1;
7004 unsigned T4MODE3
: 1;
7005 unsigned T4MODE4
: 1;
7006 unsigned T4CKSYNC
: 1;
7007 unsigned T4CKPOL
: 1;
7008 unsigned T4PSYNC
: 1;
7019 unsigned T4MODE
: 5;
7024 extern __at(0x0416) volatile __T4HLTbits_t T4HLTbits
;
7026 #define _T4HLT_MODE0 0x01
7027 #define _T4HLT_T4MODE0 0x01
7028 #define _T4HLT_MODE1 0x02
7029 #define _T4HLT_T4MODE1 0x02
7030 #define _T4HLT_MODE2 0x04
7031 #define _T4HLT_T4MODE2 0x04
7032 #define _T4HLT_MODE3 0x08
7033 #define _T4HLT_T4MODE3 0x08
7034 #define _T4HLT_MODE4 0x10
7035 #define _T4HLT_T4MODE4 0x10
7036 #define _T4HLT_CKSYNC 0x20
7037 #define _T4HLT_T4CKSYNC 0x20
7038 #define _T4HLT_CKPOL 0x40
7039 #define _T4HLT_T4CKPOL 0x40
7040 #define _T4HLT_PSYNC 0x80
7041 #define _T4HLT_T4PSYNC 0x80
7043 //==============================================================================
7046 //==============================================================================
7049 extern __at(0x0417) __sfr T4CLKCON
;
7090 extern __at(0x0417) volatile __T4CLKCONbits_t T4CLKCONbits
;
7092 #define _T4CLKCON_CS0 0x01
7093 #define _T4CLKCON_T4CS0 0x01
7094 #define _T4CLKCON_CS1 0x02
7095 #define _T4CLKCON_T4CS1 0x02
7096 #define _T4CLKCON_CS2 0x04
7097 #define _T4CLKCON_T4CS2 0x04
7098 #define _T4CLKCON_CS3 0x08
7099 #define _T4CLKCON_T4CS3 0x08
7101 //==============================================================================
7104 //==============================================================================
7107 extern __at(0x0418) __sfr T4RST
;
7125 unsigned T4RSEL0
: 1;
7126 unsigned T4RSEL1
: 1;
7127 unsigned T4RSEL2
: 1;
7128 unsigned T4RSEL3
: 1;
7129 unsigned T4RSEL4
: 1;
7143 unsigned T4RSEL
: 5;
7148 extern __at(0x0418) volatile __T4RSTbits_t T4RSTbits
;
7150 #define _T4RST_RSEL0 0x01
7151 #define _T4RST_T4RSEL0 0x01
7152 #define _T4RST_RSEL1 0x02
7153 #define _T4RST_T4RSEL1 0x02
7154 #define _T4RST_RSEL2 0x04
7155 #define _T4RST_T4RSEL2 0x04
7156 #define _T4RST_RSEL3 0x08
7157 #define _T4RST_T4RSEL3 0x08
7158 #define _T4RST_RSEL4 0x10
7159 #define _T4RST_T4RSEL4 0x10
7161 //==============================================================================
7163 extern __at(0x041A) __sfr T6TMR
;
7164 extern __at(0x041A) __sfr TMR6
;
7165 extern __at(0x041B) __sfr PR6
;
7166 extern __at(0x041B) __sfr T6PR
;
7168 //==============================================================================
7171 extern __at(0x041C) __sfr T6CON
;
7177 unsigned OUTPS0
: 1;
7178 unsigned OUTPS1
: 1;
7179 unsigned OUTPS2
: 1;
7180 unsigned OUTPS3
: 1;
7189 unsigned T6OUTPS0
: 1;
7190 unsigned T6OUTPS1
: 1;
7191 unsigned T6OUTPS2
: 1;
7192 unsigned T6OUTPS3
: 1;
7193 unsigned T6CKPS0
: 1;
7194 unsigned T6CKPS1
: 1;
7195 unsigned T6CKPS2
: 1;
7208 unsigned TMR6ON
: 1;
7219 unsigned T6OUTPS
: 4;
7226 unsigned T6CKPS
: 3;
7238 extern __at(0x041C) volatile __T6CONbits_t T6CONbits
;
7240 #define _T6CON_OUTPS0 0x01
7241 #define _T6CON_T6OUTPS0 0x01
7242 #define _T6CON_OUTPS1 0x02
7243 #define _T6CON_T6OUTPS1 0x02
7244 #define _T6CON_OUTPS2 0x04
7245 #define _T6CON_T6OUTPS2 0x04
7246 #define _T6CON_OUTPS3 0x08
7247 #define _T6CON_T6OUTPS3 0x08
7248 #define _T6CON_CKPS0 0x10
7249 #define _T6CON_T6CKPS0 0x10
7250 #define _T6CON_CKPS1 0x20
7251 #define _T6CON_T6CKPS1 0x20
7252 #define _T6CON_CKPS2 0x40
7253 #define _T6CON_T6CKPS2 0x40
7254 #define _T6CON_ON 0x80
7255 #define _T6CON_T6ON 0x80
7256 #define _T6CON_TMR6ON 0x80
7258 //==============================================================================
7261 //==============================================================================
7264 extern __at(0x041D) __sfr T6HLT
;
7275 unsigned CKSYNC
: 1;
7282 unsigned T6MODE0
: 1;
7283 unsigned T6MODE1
: 1;
7284 unsigned T6MODE2
: 1;
7285 unsigned T6MODE3
: 1;
7286 unsigned T6MODE4
: 1;
7287 unsigned T6CKSYNC
: 1;
7288 unsigned T6CKPOL
: 1;
7289 unsigned T6PSYNC
: 1;
7300 unsigned T6MODE
: 5;
7305 extern __at(0x041D) volatile __T6HLTbits_t T6HLTbits
;
7307 #define _T6HLT_MODE0 0x01
7308 #define _T6HLT_T6MODE0 0x01
7309 #define _T6HLT_MODE1 0x02
7310 #define _T6HLT_T6MODE1 0x02
7311 #define _T6HLT_MODE2 0x04
7312 #define _T6HLT_T6MODE2 0x04
7313 #define _T6HLT_MODE3 0x08
7314 #define _T6HLT_T6MODE3 0x08
7315 #define _T6HLT_MODE4 0x10
7316 #define _T6HLT_T6MODE4 0x10
7317 #define _T6HLT_CKSYNC 0x20
7318 #define _T6HLT_T6CKSYNC 0x20
7319 #define _T6HLT_CKPOL 0x40
7320 #define _T6HLT_T6CKPOL 0x40
7321 #define _T6HLT_PSYNC 0x80
7322 #define _T6HLT_T6PSYNC 0x80
7324 //==============================================================================
7327 //==============================================================================
7330 extern __at(0x041E) __sfr T6CLKCON
;
7371 extern __at(0x041E) volatile __T6CLKCONbits_t T6CLKCONbits
;
7373 #define _T6CLKCON_CS0 0x01
7374 #define _T6CLKCON_T6CS0 0x01
7375 #define _T6CLKCON_CS1 0x02
7376 #define _T6CLKCON_T6CS1 0x02
7377 #define _T6CLKCON_CS2 0x04
7378 #define _T6CLKCON_T6CS2 0x04
7379 #define _T6CLKCON_CS3 0x08
7380 #define _T6CLKCON_T6CS3 0x08
7382 //==============================================================================
7385 //==============================================================================
7388 extern __at(0x041F) __sfr T6RST
;
7406 unsigned T6RSEL0
: 1;
7407 unsigned T6RSEL1
: 1;
7408 unsigned T6RSEL2
: 1;
7409 unsigned T6RSEL3
: 1;
7410 unsigned T6RSEL4
: 1;
7424 unsigned T6RSEL
: 5;
7429 extern __at(0x041F) volatile __T6RSTbits_t T6RSTbits
;
7431 #define _T6RST_RSEL0 0x01
7432 #define _T6RST_T6RSEL0 0x01
7433 #define _T6RST_RSEL1 0x02
7434 #define _T6RST_T6RSEL1 0x02
7435 #define _T6RST_RSEL2 0x04
7436 #define _T6RST_T6RSEL2 0x04
7437 #define _T6RST_RSEL3 0x08
7438 #define _T6RST_T6RSEL3 0x08
7439 #define _T6RST_RSEL4 0x10
7440 #define _T6RST_T6RSEL4 0x10
7442 //==============================================================================
7444 extern __at(0x048E) __sfr ADRESL
;
7445 extern __at(0x048F) __sfr ADRESH
;
7447 //==============================================================================
7450 extern __at(0x0490) __sfr ADCON0
;
7464 extern __at(0x0490) volatile __ADCON0bits_t ADCON0bits
;
7469 //==============================================================================
7472 //==============================================================================
7475 extern __at(0x0491) __sfr ADCON1
;
7481 unsigned ADNREF
: 1;
7489 extern __at(0x0491) volatile __ADCON1bits_t ADCON1bits
;
7491 #define _ADNREF 0x04
7494 //==============================================================================
7496 extern __at(0x0492) __sfr ADCON2
;
7497 extern __at(0x0493) __sfr T2TMR
;
7498 extern __at(0x0493) __sfr TMR2
;
7499 extern __at(0x0494) __sfr PR2
;
7500 extern __at(0x0494) __sfr T2PR
;
7502 //==============================================================================
7505 extern __at(0x0495) __sfr T2CON
;
7511 unsigned OUTPS0
: 1;
7512 unsigned OUTPS1
: 1;
7513 unsigned OUTPS2
: 1;
7514 unsigned OUTPS3
: 1;
7523 unsigned T2OUTPS0
: 1;
7524 unsigned T2OUTPS1
: 1;
7525 unsigned T2OUTPS2
: 1;
7526 unsigned T2OUTPS3
: 1;
7527 unsigned T2CKPS0
: 1;
7528 unsigned T2CKPS1
: 1;
7529 unsigned T2CKPS2
: 1;
7542 unsigned TMR2ON
: 1;
7553 unsigned T2OUTPS
: 4;
7560 unsigned T2CKPS
: 3;
7572 extern __at(0x0495) volatile __T2CONbits_t T2CONbits
;
7574 #define _T2CON_OUTPS0 0x01
7575 #define _T2CON_T2OUTPS0 0x01
7576 #define _T2CON_OUTPS1 0x02
7577 #define _T2CON_T2OUTPS1 0x02
7578 #define _T2CON_OUTPS2 0x04
7579 #define _T2CON_T2OUTPS2 0x04
7580 #define _T2CON_OUTPS3 0x08
7581 #define _T2CON_T2OUTPS3 0x08
7582 #define _T2CON_CKPS0 0x10
7583 #define _T2CON_T2CKPS0 0x10
7584 #define _T2CON_CKPS1 0x20
7585 #define _T2CON_T2CKPS1 0x20
7586 #define _T2CON_CKPS2 0x40
7587 #define _T2CON_T2CKPS2 0x40
7588 #define _T2CON_ON 0x80
7589 #define _T2CON_T2ON 0x80
7590 #define _T2CON_TMR2ON 0x80
7592 //==============================================================================
7595 //==============================================================================
7598 extern __at(0x0496) __sfr T2HLT
;
7609 unsigned CKSYNC
: 1;
7616 unsigned T2MODE0
: 1;
7617 unsigned T2MODE1
: 1;
7618 unsigned T2MODE2
: 1;
7619 unsigned T2MODE3
: 1;
7620 unsigned T2MODE4
: 1;
7621 unsigned T2CKSYNC
: 1;
7622 unsigned T2CKPOL
: 1;
7623 unsigned T2PSYNC
: 1;
7628 unsigned T2MODE
: 5;
7639 extern __at(0x0496) volatile __T2HLTbits_t T2HLTbits
;
7641 #define _T2HLT_MODE0 0x01
7642 #define _T2HLT_T2MODE0 0x01
7643 #define _T2HLT_MODE1 0x02
7644 #define _T2HLT_T2MODE1 0x02
7645 #define _T2HLT_MODE2 0x04
7646 #define _T2HLT_T2MODE2 0x04
7647 #define _T2HLT_MODE3 0x08
7648 #define _T2HLT_T2MODE3 0x08
7649 #define _T2HLT_MODE4 0x10
7650 #define _T2HLT_T2MODE4 0x10
7651 #define _T2HLT_CKSYNC 0x20
7652 #define _T2HLT_T2CKSYNC 0x20
7653 #define _T2HLT_CKPOL 0x40
7654 #define _T2HLT_T2CKPOL 0x40
7655 #define _T2HLT_PSYNC 0x80
7656 #define _T2HLT_T2PSYNC 0x80
7658 //==============================================================================
7661 //==============================================================================
7664 extern __at(0x0497) __sfr T2CLKCON
;
7705 extern __at(0x0497) volatile __T2CLKCONbits_t T2CLKCONbits
;
7707 #define _T2CLKCON_CS0 0x01
7708 #define _T2CLKCON_T2CS0 0x01
7709 #define _T2CLKCON_CS1 0x02
7710 #define _T2CLKCON_T2CS1 0x02
7711 #define _T2CLKCON_CS2 0x04
7712 #define _T2CLKCON_T2CS2 0x04
7713 #define _T2CLKCON_CS3 0x08
7714 #define _T2CLKCON_T2CS3 0x08
7716 //==============================================================================
7719 //==============================================================================
7722 extern __at(0x0498) __sfr T2RST
;
7740 unsigned T2RSEL0
: 1;
7741 unsigned T2RSEL1
: 1;
7742 unsigned T2RSEL2
: 1;
7743 unsigned T2RSEL3
: 1;
7744 unsigned T2RSEL4
: 1;
7752 unsigned T2RSEL
: 5;
7763 extern __at(0x0498) volatile __T2RSTbits_t T2RSTbits
;
7766 #define _T2RSEL0 0x01
7768 #define _T2RSEL1 0x02
7770 #define _T2RSEL2 0x04
7772 #define _T2RSEL3 0x08
7774 #define _T2RSEL4 0x10
7776 //==============================================================================
7778 extern __at(0x049A) __sfr T8TMR
;
7779 extern __at(0x049A) __sfr TMR8
;
7780 extern __at(0x049B) __sfr PR8
;
7781 extern __at(0x049B) __sfr T8PR
;
7783 //==============================================================================
7786 extern __at(0x049C) __sfr T8CON
;
7792 unsigned OUTPS0
: 1;
7793 unsigned OUTPS1
: 1;
7794 unsigned OUTPS2
: 1;
7795 unsigned OUTPS3
: 1;
7804 unsigned T8OUTPS0
: 1;
7805 unsigned T8OUTPS1
: 1;
7806 unsigned T8OUTPS2
: 1;
7807 unsigned T8OUTPS3
: 1;
7808 unsigned T8CKPS0
: 1;
7809 unsigned T8CKPS1
: 1;
7810 unsigned T8CKPS2
: 1;
7823 unsigned TMR8ON
: 1;
7828 unsigned T8OUTPS
: 4;
7841 unsigned T8CKPS
: 3;
7853 extern __at(0x049C) volatile __T8CONbits_t T8CONbits
;
7855 #define _T8CON_OUTPS0 0x01
7856 #define _T8CON_T8OUTPS0 0x01
7857 #define _T8CON_OUTPS1 0x02
7858 #define _T8CON_T8OUTPS1 0x02
7859 #define _T8CON_OUTPS2 0x04
7860 #define _T8CON_T8OUTPS2 0x04
7861 #define _T8CON_OUTPS3 0x08
7862 #define _T8CON_T8OUTPS3 0x08
7863 #define _T8CON_CKPS0 0x10
7864 #define _T8CON_T8CKPS0 0x10
7865 #define _T8CON_CKPS1 0x20
7866 #define _T8CON_T8CKPS1 0x20
7867 #define _T8CON_CKPS2 0x40
7868 #define _T8CON_T8CKPS2 0x40
7869 #define _T8CON_ON 0x80
7870 #define _T8CON_T8ON 0x80
7871 #define _T8CON_TMR8ON 0x80
7873 //==============================================================================
7876 //==============================================================================
7879 extern __at(0x049D) __sfr T8HLT
;
7890 unsigned CKSYNC
: 1;
7897 unsigned T8MODE0
: 1;
7898 unsigned T8MODE1
: 1;
7899 unsigned T8MODE2
: 1;
7900 unsigned T8MODE3
: 1;
7901 unsigned T8MODE4
: 1;
7902 unsigned T8CKSYNC
: 1;
7903 unsigned T8CKPOL
: 1;
7904 unsigned T8PSYNC
: 1;
7909 unsigned T8MODE
: 5;
7920 extern __at(0x049D) volatile __T8HLTbits_t T8HLTbits
;
7922 #define _T8HLT_MODE0 0x01
7923 #define _T8HLT_T8MODE0 0x01
7924 #define _T8HLT_MODE1 0x02
7925 #define _T8HLT_T8MODE1 0x02
7926 #define _T8HLT_MODE2 0x04
7927 #define _T8HLT_T8MODE2 0x04
7928 #define _T8HLT_MODE3 0x08
7929 #define _T8HLT_T8MODE3 0x08
7930 #define _T8HLT_MODE4 0x10
7931 #define _T8HLT_T8MODE4 0x10
7932 #define _T8HLT_CKSYNC 0x20
7933 #define _T8HLT_T8CKSYNC 0x20
7934 #define _T8HLT_CKPOL 0x40
7935 #define _T8HLT_T8CKPOL 0x40
7936 #define _T8HLT_PSYNC 0x80
7937 #define _T8HLT_T8PSYNC 0x80
7939 //==============================================================================
7942 //==============================================================================
7945 extern __at(0x049E) __sfr T8CLKCON
;
7986 extern __at(0x049E) volatile __T8CLKCONbits_t T8CLKCONbits
;
7988 #define _T8CLKCON_CS0 0x01
7989 #define _T8CLKCON_T8CS0 0x01
7990 #define _T8CLKCON_CS1 0x02
7991 #define _T8CLKCON_T8CS1 0x02
7992 #define _T8CLKCON_CS2 0x04
7993 #define _T8CLKCON_T8CS2 0x04
7994 #define _T8CLKCON_CS3 0x08
7995 #define _T8CLKCON_T8CS3 0x08
7997 //==============================================================================
8000 //==============================================================================
8003 extern __at(0x049F) __sfr T8RST
;
8021 unsigned T8RSEL0
: 1;
8022 unsigned T8RSEL1
: 1;
8023 unsigned T8RSEL2
: 1;
8024 unsigned T8RSEL3
: 1;
8025 unsigned T8RSEL4
: 1;
8039 unsigned T8RSEL
: 5;
8044 extern __at(0x049F) volatile __T8RSTbits_t T8RSTbits
;
8046 #define _T8RST_RSEL0 0x01
8047 #define _T8RST_T8RSEL0 0x01
8048 #define _T8RST_RSEL1 0x02
8049 #define _T8RST_T8RSEL1 0x02
8050 #define _T8RST_RSEL2 0x04
8051 #define _T8RST_T8RSEL2 0x04
8052 #define _T8RST_RSEL3 0x08
8053 #define _T8RST_T8RSEL3 0x08
8054 #define _T8RST_RSEL4 0x10
8055 #define _T8RST_T8RSEL4 0x10
8057 //==============================================================================
8059 extern __at(0x050F) __sfr OPA1NCHS
;
8060 extern __at(0x0510) __sfr OPA1PCHS
;
8062 //==============================================================================
8065 extern __at(0x0511) __sfr OPA1CON
;
8083 unsigned OPA1ORM0
: 1;
8084 unsigned OPA1ORM1
: 1;
8085 unsigned OPA1ORPOL
: 1;
8087 unsigned OPA1UG
: 1;
8090 unsigned OPA1EN
: 1;
8101 unsigned OPA1ORM
: 2;
8106 extern __at(0x0511) volatile __OPA1CONbits_t OPA1CONbits
;
8108 #define _OPA1CON_ORM0 0x01
8109 #define _OPA1CON_OPA1ORM0 0x01
8110 #define _OPA1CON_ORM1 0x02
8111 #define _OPA1CON_OPA1ORM1 0x02
8112 #define _OPA1CON_ORPOL 0x04
8113 #define _OPA1CON_OPA1ORPOL 0x04
8114 #define _OPA1CON_UG 0x10
8115 #define _OPA1CON_OPA1UG 0x10
8116 #define _OPA1CON_EN 0x80
8117 #define _OPA1CON_OPA1EN 0x80
8119 //==============================================================================
8121 extern __at(0x0512) __sfr OPA1ORS
;
8122 extern __at(0x0513) __sfr OPA2NCHS
;
8123 extern __at(0x0514) __sfr OPA2PCHS
;
8125 //==============================================================================
8128 extern __at(0x0515) __sfr OPA2CON
;
8146 unsigned OPA2ORM0
: 1;
8147 unsigned OPA2ORM1
: 1;
8148 unsigned OPA2ORPOL
: 1;
8150 unsigned OPA2UG
: 1;
8153 unsigned OPA2EN
: 1;
8164 unsigned OPA2ORM
: 2;
8169 extern __at(0x0515) volatile __OPA2CONbits_t OPA2CONbits
;
8171 #define _OPA2CON_ORM0 0x01
8172 #define _OPA2CON_OPA2ORM0 0x01
8173 #define _OPA2CON_ORM1 0x02
8174 #define _OPA2CON_OPA2ORM1 0x02
8175 #define _OPA2CON_ORPOL 0x04
8176 #define _OPA2CON_OPA2ORPOL 0x04
8177 #define _OPA2CON_UG 0x10
8178 #define _OPA2CON_OPA2UG 0x10
8179 #define _OPA2CON_EN 0x80
8180 #define _OPA2CON_OPA2EN 0x80
8182 //==============================================================================
8184 extern __at(0x0516) __sfr OPA2ORS
;
8185 extern __at(0x0517) __sfr OPA3NCHS
;
8186 extern __at(0x0518) __sfr OPA3PCHS
;
8188 //==============================================================================
8191 extern __at(0x0519) __sfr OPA3CON
;
8209 unsigned OPA3ORM0
: 1;
8210 unsigned OPA3ORM1
: 1;
8211 unsigned OPA3ORPOL
: 1;
8213 unsigned OPA3UG
: 1;
8215 unsigned OPA3SP
: 1;
8216 unsigned OPA3EN
: 1;
8227 unsigned OPA3ORM
: 2;
8232 extern __at(0x0519) volatile __OPA3CONbits_t OPA3CONbits
;
8234 #define _OPA3CON_ORM0 0x01
8235 #define _OPA3CON_OPA3ORM0 0x01
8236 #define _OPA3CON_ORM1 0x02
8237 #define _OPA3CON_OPA3ORM1 0x02
8238 #define _OPA3CON_ORPOL 0x04
8239 #define _OPA3CON_OPA3ORPOL 0x04
8240 #define _OPA3CON_UG 0x10
8241 #define _OPA3CON_OPA3UG 0x10
8242 #define _OPA3CON_SP 0x40
8243 #define _OPA3CON_OPA3SP 0x40
8244 #define _OPA3CON_EN 0x80
8245 #define _OPA3CON_OPA3EN 0x80
8247 //==============================================================================
8249 extern __at(0x051A) __sfr OPA3ORS
;
8250 extern __at(0x051B) __sfr OPA4NCHS
;
8251 extern __at(0x051C) __sfr OPA4PCHS
;
8253 //==============================================================================
8256 extern __at(0x051D) __sfr OPA4CON
;
8274 unsigned OPA4ORM0
: 1;
8275 unsigned OPA4ORM1
: 1;
8276 unsigned OPA4ORPOL
: 1;
8278 unsigned OPA4UG
: 1;
8280 unsigned OPA4SP
: 1;
8281 unsigned OPA4EN
: 1;
8292 unsigned OPA4ORM
: 2;
8297 extern __at(0x051D) volatile __OPA4CONbits_t OPA4CONbits
;
8299 #define _OPA4CON_ORM0 0x01
8300 #define _OPA4CON_OPA4ORM0 0x01
8301 #define _OPA4CON_ORM1 0x02
8302 #define _OPA4CON_OPA4ORM1 0x02
8303 #define _OPA4CON_ORPOL 0x04
8304 #define _OPA4CON_OPA4ORPOL 0x04
8305 #define _OPA4CON_UG 0x10
8306 #define _OPA4CON_OPA4UG 0x10
8307 #define _OPA4CON_SP 0x40
8308 #define _OPA4CON_OPA4SP 0x40
8309 #define _OPA4CON_EN 0x80
8310 #define _OPA4CON_OPA4EN 0x80
8312 //==============================================================================
8314 extern __at(0x051E) __sfr OPA4ORS
;
8316 //==============================================================================
8319 extern __at(0x058D) __sfr DACLD
;
8323 unsigned DAC1LD
: 1;
8324 unsigned DAC2LD
: 1;
8327 unsigned DAC5LD
: 1;
8328 unsigned DAC6LD
: 1;
8333 extern __at(0x058D) volatile __DACLDbits_t DACLDbits
;
8335 #define _DAC1LD 0x01
8336 #define _DAC2LD 0x02
8337 #define _DAC5LD 0x10
8338 #define _DAC6LD 0x20
8340 //==============================================================================
8343 //==============================================================================
8346 extern __at(0x058E) __sfr DAC1CON0
;
8364 unsigned DACNSS0
: 1;
8365 unsigned DACNSS1
: 1;
8366 unsigned DACPSS0
: 1;
8367 unsigned DACPSS1
: 1;
8368 unsigned DACOE2
: 1;
8376 unsigned DAC1NSS0
: 1;
8377 unsigned DAC1NSS1
: 1;
8378 unsigned DAC1PSS0
: 1;
8379 unsigned DAC1PSS1
: 1;
8380 unsigned DAC1OE2
: 1;
8381 unsigned DACOE1
: 1;
8382 unsigned DAC1FM
: 1;
8383 unsigned DAC1EN
: 1;
8405 unsigned DAC1OE1
: 1;
8412 unsigned DACNSS
: 2;
8424 unsigned DAC1NSS
: 2;
8431 unsigned DAC1PSS
: 2;
8445 unsigned DACPSS
: 2;
8450 extern __at(0x058E) volatile __DAC1CON0bits_t DAC1CON0bits
;
8452 #define _DAC1CON0_NSS0 0x01
8453 #define _DAC1CON0_DACNSS0 0x01
8454 #define _DAC1CON0_DAC1NSS0 0x01
8455 #define _DAC1CON0_NSS1 0x02
8456 #define _DAC1CON0_DACNSS1 0x02
8457 #define _DAC1CON0_DAC1NSS1 0x02
8458 #define _DAC1CON0_PSS0 0x04
8459 #define _DAC1CON0_DACPSS0 0x04
8460 #define _DAC1CON0_DAC1PSS0 0x04
8461 #define _DAC1CON0_PSS1 0x08
8462 #define _DAC1CON0_DACPSS1 0x08
8463 #define _DAC1CON0_DAC1PSS1 0x08
8464 #define _DAC1CON0_OE2 0x10
8465 #define _DAC1CON0_DACOE2 0x10
8466 #define _DAC1CON0_DAC1OE2 0x10
8467 #define _DAC1CON0_OE1 0x20
8468 #define _DAC1CON0_OE 0x20
8469 #define _DAC1CON0_DACOE1 0x20
8470 #define _DAC1CON0_DACOE 0x20
8471 #define _DAC1CON0_DAC1OE1 0x20
8472 #define _DAC1CON0_FM 0x40
8473 #define _DAC1CON0_DACFM 0x40
8474 #define _DAC1CON0_DAC1FM 0x40
8475 #define _DAC1CON0_EN 0x80
8476 #define _DAC1CON0_DACEN 0x80
8477 #define _DAC1CON0_DAC1EN 0x80
8479 //==============================================================================
8482 //==============================================================================
8485 extern __at(0x058F) __sfr DAC1CON1
;
8503 unsigned DAC1REF0
: 1;
8504 unsigned DAC1REF1
: 1;
8505 unsigned DAC1REF2
: 1;
8506 unsigned DAC1REF3
: 1;
8507 unsigned DAC1REF4
: 1;
8508 unsigned DAC1REF5
: 1;
8509 unsigned DAC1REF6
: 1;
8510 unsigned DAC1REF7
: 1;
8527 unsigned DAC1R0
: 1;
8528 unsigned DAC1R1
: 1;
8529 unsigned DAC1R2
: 1;
8530 unsigned DAC1R3
: 1;
8531 unsigned DAC1R4
: 1;
8532 unsigned DAC1R5
: 1;
8533 unsigned DAC1R6
: 1;
8534 unsigned DAC1R7
: 1;
8538 extern __at(0x058F) volatile __DAC1CON1bits_t DAC1CON1bits
;
8541 #define _DAC1REF0 0x01
8543 #define _DAC1R0 0x01
8545 #define _DAC1REF1 0x02
8547 #define _DAC1R1 0x02
8549 #define _DAC1REF2 0x04
8551 #define _DAC1R2 0x04
8553 #define _DAC1REF3 0x08
8555 #define _DAC1R3 0x08
8557 #define _DAC1REF4 0x10
8559 #define _DAC1R4 0x10
8561 #define _DAC1REF5 0x20
8563 #define _DAC1R5 0x20
8565 #define _DAC1REF6 0x40
8567 #define _DAC1R6 0x40
8569 #define _DAC1REF7 0x80
8571 #define _DAC1R7 0x80
8573 //==============================================================================
8575 extern __at(0x058F) __sfr DAC1REF
;
8577 //==============================================================================
8580 extern __at(0x058F) __sfr DAC1REFL
;
8598 unsigned DAC1REF0
: 1;
8599 unsigned DAC1REF1
: 1;
8600 unsigned DAC1REF2
: 1;
8601 unsigned DAC1REF3
: 1;
8602 unsigned DAC1REF4
: 1;
8603 unsigned DAC1REF5
: 1;
8604 unsigned DAC1REF6
: 1;
8605 unsigned DAC1REF7
: 1;
8622 unsigned DAC1R0
: 1;
8623 unsigned DAC1R1
: 1;
8624 unsigned DAC1R2
: 1;
8625 unsigned DAC1R3
: 1;
8626 unsigned DAC1R4
: 1;
8627 unsigned DAC1R5
: 1;
8628 unsigned DAC1R6
: 1;
8629 unsigned DAC1R7
: 1;
8633 extern __at(0x058F) volatile __DAC1REFLbits_t DAC1REFLbits
;
8635 #define _DAC1REFL_REF0 0x01
8636 #define _DAC1REFL_DAC1REF0 0x01
8637 #define _DAC1REFL_R0 0x01
8638 #define _DAC1REFL_DAC1R0 0x01
8639 #define _DAC1REFL_REF1 0x02
8640 #define _DAC1REFL_DAC1REF1 0x02
8641 #define _DAC1REFL_R1 0x02
8642 #define _DAC1REFL_DAC1R1 0x02
8643 #define _DAC1REFL_REF2 0x04
8644 #define _DAC1REFL_DAC1REF2 0x04
8645 #define _DAC1REFL_R2 0x04
8646 #define _DAC1REFL_DAC1R2 0x04
8647 #define _DAC1REFL_REF3 0x08
8648 #define _DAC1REFL_DAC1REF3 0x08
8649 #define _DAC1REFL_R3 0x08
8650 #define _DAC1REFL_DAC1R3 0x08
8651 #define _DAC1REFL_REF4 0x10
8652 #define _DAC1REFL_DAC1REF4 0x10
8653 #define _DAC1REFL_R4 0x10
8654 #define _DAC1REFL_DAC1R4 0x10
8655 #define _DAC1REFL_REF5 0x20
8656 #define _DAC1REFL_DAC1REF5 0x20
8657 #define _DAC1REFL_R5 0x20
8658 #define _DAC1REFL_DAC1R5 0x20
8659 #define _DAC1REFL_REF6 0x40
8660 #define _DAC1REFL_DAC1REF6 0x40
8661 #define _DAC1REFL_R6 0x40
8662 #define _DAC1REFL_DAC1R6 0x40
8663 #define _DAC1REFL_REF7 0x80
8664 #define _DAC1REFL_DAC1REF7 0x80
8665 #define _DAC1REFL_R7 0x80
8666 #define _DAC1REFL_DAC1R7 0x80
8668 //==============================================================================
8671 //==============================================================================
8674 extern __at(0x0590) __sfr DAC1CON2
;
8692 unsigned DAC1REF8
: 1;
8693 unsigned DAC1REF9
: 1;
8694 unsigned DAC1REF10
: 1;
8695 unsigned DAC1REF11
: 1;
8696 unsigned DAC1REF12
: 1;
8697 unsigned DAC1REF13
: 1;
8698 unsigned DAC1REF14
: 1;
8699 unsigned DAC1REF15
: 1;
8716 unsigned DAC1R8
: 1;
8717 unsigned DAC1R9
: 1;
8718 unsigned DAC1R10
: 1;
8719 unsigned DAC1R11
: 1;
8720 unsigned DAC1R12
: 1;
8721 unsigned DAC1R13
: 1;
8722 unsigned DAC1R14
: 1;
8723 unsigned DAC1R15
: 1;
8727 extern __at(0x0590) volatile __DAC1CON2bits_t DAC1CON2bits
;
8730 #define _DAC1REF8 0x01
8732 #define _DAC1R8 0x01
8734 #define _DAC1REF9 0x02
8736 #define _DAC1R9 0x02
8738 #define _DAC1REF10 0x04
8740 #define _DAC1R10 0x04
8742 #define _DAC1REF11 0x08
8744 #define _DAC1R11 0x08
8746 #define _DAC1REF12 0x10
8748 #define _DAC1R12 0x10
8750 #define _DAC1REF13 0x20
8752 #define _DAC1R13 0x20
8754 #define _DAC1REF14 0x40
8756 #define _DAC1R14 0x40
8758 #define _DAC1REF15 0x80
8760 #define _DAC1R15 0x80
8762 //==============================================================================
8765 //==============================================================================
8768 extern __at(0x0590) __sfr DAC1REFH
;
8786 unsigned DAC1REF8
: 1;
8787 unsigned DAC1REF9
: 1;
8788 unsigned DAC1REF10
: 1;
8789 unsigned DAC1REF11
: 1;
8790 unsigned DAC1REF12
: 1;
8791 unsigned DAC1REF13
: 1;
8792 unsigned DAC1REF14
: 1;
8793 unsigned DAC1REF15
: 1;
8810 unsigned DAC1R8
: 1;
8811 unsigned DAC1R9
: 1;
8812 unsigned DAC1R10
: 1;
8813 unsigned DAC1R11
: 1;
8814 unsigned DAC1R12
: 1;
8815 unsigned DAC1R13
: 1;
8816 unsigned DAC1R14
: 1;
8817 unsigned DAC1R15
: 1;
8821 extern __at(0x0590) volatile __DAC1REFHbits_t DAC1REFHbits
;
8823 #define _DAC1REFH_REF8 0x01
8824 #define _DAC1REFH_DAC1REF8 0x01
8825 #define _DAC1REFH_R8 0x01
8826 #define _DAC1REFH_DAC1R8 0x01
8827 #define _DAC1REFH_REF9 0x02
8828 #define _DAC1REFH_DAC1REF9 0x02
8829 #define _DAC1REFH_R9 0x02
8830 #define _DAC1REFH_DAC1R9 0x02
8831 #define _DAC1REFH_REF10 0x04
8832 #define _DAC1REFH_DAC1REF10 0x04
8833 #define _DAC1REFH_R10 0x04
8834 #define _DAC1REFH_DAC1R10 0x04
8835 #define _DAC1REFH_REF11 0x08
8836 #define _DAC1REFH_DAC1REF11 0x08
8837 #define _DAC1REFH_R11 0x08
8838 #define _DAC1REFH_DAC1R11 0x08
8839 #define _DAC1REFH_REF12 0x10
8840 #define _DAC1REFH_DAC1REF12 0x10
8841 #define _DAC1REFH_R12 0x10
8842 #define _DAC1REFH_DAC1R12 0x10
8843 #define _DAC1REFH_REF13 0x20
8844 #define _DAC1REFH_DAC1REF13 0x20
8845 #define _DAC1REFH_R13 0x20
8846 #define _DAC1REFH_DAC1R13 0x20
8847 #define _DAC1REFH_REF14 0x40
8848 #define _DAC1REFH_DAC1REF14 0x40
8849 #define _DAC1REFH_R14 0x40
8850 #define _DAC1REFH_DAC1R14 0x40
8851 #define _DAC1REFH_REF15 0x80
8852 #define _DAC1REFH_DAC1REF15 0x80
8853 #define _DAC1REFH_R15 0x80
8854 #define _DAC1REFH_DAC1R15 0x80
8856 //==============================================================================
8859 //==============================================================================
8862 extern __at(0x0591) __sfr DAC2CON0
;
8880 unsigned DACNSS0
: 1;
8881 unsigned DACNSS1
: 1;
8882 unsigned DACPSS0
: 1;
8883 unsigned DACPSS1
: 1;
8884 unsigned DACOE2
: 1;
8892 unsigned DAC2NSS0
: 1;
8893 unsigned DAC2NSS1
: 1;
8894 unsigned DAC2PSS0
: 1;
8895 unsigned DAC2PSS1
: 1;
8896 unsigned DAC2OE2
: 1;
8897 unsigned DACOE1
: 1;
8898 unsigned DAC2FM
: 1;
8899 unsigned DAC2EN
: 1;
8921 unsigned DAC2OE1
: 1;
8928 unsigned DACNSS
: 2;
8940 unsigned DAC2NSS
: 2;
8947 unsigned DAC2PSS
: 2;
8961 unsigned DACPSS
: 2;
8966 extern __at(0x0591) volatile __DAC2CON0bits_t DAC2CON0bits
;
8968 #define _DAC2CON0_NSS0 0x01
8969 #define _DAC2CON0_DACNSS0 0x01
8970 #define _DAC2CON0_DAC2NSS0 0x01
8971 #define _DAC2CON0_NSS1 0x02
8972 #define _DAC2CON0_DACNSS1 0x02
8973 #define _DAC2CON0_DAC2NSS1 0x02
8974 #define _DAC2CON0_PSS0 0x04
8975 #define _DAC2CON0_DACPSS0 0x04
8976 #define _DAC2CON0_DAC2PSS0 0x04
8977 #define _DAC2CON0_PSS1 0x08
8978 #define _DAC2CON0_DACPSS1 0x08
8979 #define _DAC2CON0_DAC2PSS1 0x08
8980 #define _DAC2CON0_OE2 0x10
8981 #define _DAC2CON0_DACOE2 0x10
8982 #define _DAC2CON0_DAC2OE2 0x10
8983 #define _DAC2CON0_OE1 0x20
8984 #define _DAC2CON0_OE 0x20
8985 #define _DAC2CON0_DACOE1 0x20
8986 #define _DAC2CON0_DACOE 0x20
8987 #define _DAC2CON0_DAC2OE1 0x20
8988 #define _DAC2CON0_FM 0x40
8989 #define _DAC2CON0_DACFM 0x40
8990 #define _DAC2CON0_DAC2FM 0x40
8991 #define _DAC2CON0_EN 0x80
8992 #define _DAC2CON0_DACEN 0x80
8993 #define _DAC2CON0_DAC2EN 0x80
8995 //==============================================================================
8998 //==============================================================================
9001 extern __at(0x0592) __sfr DAC2CON1
;
9019 unsigned DAC2REF0
: 1;
9020 unsigned DAC2REF1
: 1;
9021 unsigned DAC2REF2
: 1;
9022 unsigned DAC2REF3
: 1;
9023 unsigned DAC2REF4
: 1;
9024 unsigned DAC2REF5
: 1;
9025 unsigned DAC2REF6
: 1;
9026 unsigned DAC2REF7
: 1;
9043 unsigned DAC2R0
: 1;
9044 unsigned DAC2R1
: 1;
9045 unsigned DAC2R2
: 1;
9046 unsigned DAC2R3
: 1;
9047 unsigned DAC2R4
: 1;
9048 unsigned DAC2R5
: 1;
9049 unsigned DAC2R6
: 1;
9050 unsigned DAC2R7
: 1;
9054 extern __at(0x0592) volatile __DAC2CON1bits_t DAC2CON1bits
;
9056 #define _DAC2CON1_REF0 0x01
9057 #define _DAC2CON1_DAC2REF0 0x01
9058 #define _DAC2CON1_R0 0x01
9059 #define _DAC2CON1_DAC2R0 0x01
9060 #define _DAC2CON1_REF1 0x02
9061 #define _DAC2CON1_DAC2REF1 0x02
9062 #define _DAC2CON1_R1 0x02
9063 #define _DAC2CON1_DAC2R1 0x02
9064 #define _DAC2CON1_REF2 0x04
9065 #define _DAC2CON1_DAC2REF2 0x04
9066 #define _DAC2CON1_R2 0x04
9067 #define _DAC2CON1_DAC2R2 0x04
9068 #define _DAC2CON1_REF3 0x08
9069 #define _DAC2CON1_DAC2REF3 0x08
9070 #define _DAC2CON1_R3 0x08
9071 #define _DAC2CON1_DAC2R3 0x08
9072 #define _DAC2CON1_REF4 0x10
9073 #define _DAC2CON1_DAC2REF4 0x10
9074 #define _DAC2CON1_R4 0x10
9075 #define _DAC2CON1_DAC2R4 0x10
9076 #define _DAC2CON1_REF5 0x20
9077 #define _DAC2CON1_DAC2REF5 0x20
9078 #define _DAC2CON1_R5 0x20
9079 #define _DAC2CON1_DAC2R5 0x20
9080 #define _DAC2CON1_REF6 0x40
9081 #define _DAC2CON1_DAC2REF6 0x40
9082 #define _DAC2CON1_R6 0x40
9083 #define _DAC2CON1_DAC2R6 0x40
9084 #define _DAC2CON1_REF7 0x80
9085 #define _DAC2CON1_DAC2REF7 0x80
9086 #define _DAC2CON1_R7 0x80
9087 #define _DAC2CON1_DAC2R7 0x80
9089 //==============================================================================
9091 extern __at(0x0592) __sfr DAC2REF
;
9093 //==============================================================================
9096 extern __at(0x0592) __sfr DAC2REFL
;
9114 unsigned DAC2REF0
: 1;
9115 unsigned DAC2REF1
: 1;
9116 unsigned DAC2REF2
: 1;
9117 unsigned DAC2REF3
: 1;
9118 unsigned DAC2REF4
: 1;
9119 unsigned DAC2REF5
: 1;
9120 unsigned DAC2REF6
: 1;
9121 unsigned DAC2REF7
: 1;
9138 unsigned DAC2R0
: 1;
9139 unsigned DAC2R1
: 1;
9140 unsigned DAC2R2
: 1;
9141 unsigned DAC2R3
: 1;
9142 unsigned DAC2R4
: 1;
9143 unsigned DAC2R5
: 1;
9144 unsigned DAC2R6
: 1;
9145 unsigned DAC2R7
: 1;
9149 extern __at(0x0592) volatile __DAC2REFLbits_t DAC2REFLbits
;
9151 #define _DAC2REFL_REF0 0x01
9152 #define _DAC2REFL_DAC2REF0 0x01
9153 #define _DAC2REFL_R0 0x01
9154 #define _DAC2REFL_DAC2R0 0x01
9155 #define _DAC2REFL_REF1 0x02
9156 #define _DAC2REFL_DAC2REF1 0x02
9157 #define _DAC2REFL_R1 0x02
9158 #define _DAC2REFL_DAC2R1 0x02
9159 #define _DAC2REFL_REF2 0x04
9160 #define _DAC2REFL_DAC2REF2 0x04
9161 #define _DAC2REFL_R2 0x04
9162 #define _DAC2REFL_DAC2R2 0x04
9163 #define _DAC2REFL_REF3 0x08
9164 #define _DAC2REFL_DAC2REF3 0x08
9165 #define _DAC2REFL_R3 0x08
9166 #define _DAC2REFL_DAC2R3 0x08
9167 #define _DAC2REFL_REF4 0x10
9168 #define _DAC2REFL_DAC2REF4 0x10
9169 #define _DAC2REFL_R4 0x10
9170 #define _DAC2REFL_DAC2R4 0x10
9171 #define _DAC2REFL_REF5 0x20
9172 #define _DAC2REFL_DAC2REF5 0x20
9173 #define _DAC2REFL_R5 0x20
9174 #define _DAC2REFL_DAC2R5 0x20
9175 #define _DAC2REFL_REF6 0x40
9176 #define _DAC2REFL_DAC2REF6 0x40
9177 #define _DAC2REFL_R6 0x40
9178 #define _DAC2REFL_DAC2R6 0x40
9179 #define _DAC2REFL_REF7 0x80
9180 #define _DAC2REFL_DAC2REF7 0x80
9181 #define _DAC2REFL_R7 0x80
9182 #define _DAC2REFL_DAC2R7 0x80
9184 //==============================================================================
9187 //==============================================================================
9190 extern __at(0x0593) __sfr DAC2CON2
;
9208 unsigned DAC2REF8
: 1;
9209 unsigned DAC2REF9
: 1;
9210 unsigned DAC2REF10
: 1;
9211 unsigned DAC2REF11
: 1;
9212 unsigned DAC2REF12
: 1;
9213 unsigned DAC2REF13
: 1;
9214 unsigned DAC2REF14
: 1;
9215 unsigned DAC2REF15
: 1;
9232 unsigned DAC2R8
: 1;
9233 unsigned DAC2R9
: 1;
9234 unsigned DAC2R10
: 1;
9235 unsigned DAC2R11
: 1;
9236 unsigned DAC2R12
: 1;
9237 unsigned DAC2R13
: 1;
9238 unsigned DAC2R14
: 1;
9239 unsigned DAC2R15
: 1;
9243 extern __at(0x0593) volatile __DAC2CON2bits_t DAC2CON2bits
;
9245 #define _DAC2CON2_REF8 0x01
9246 #define _DAC2CON2_DAC2REF8 0x01
9247 #define _DAC2CON2_R8 0x01
9248 #define _DAC2CON2_DAC2R8 0x01
9249 #define _DAC2CON2_REF9 0x02
9250 #define _DAC2CON2_DAC2REF9 0x02
9251 #define _DAC2CON2_R9 0x02
9252 #define _DAC2CON2_DAC2R9 0x02
9253 #define _DAC2CON2_REF10 0x04
9254 #define _DAC2CON2_DAC2REF10 0x04
9255 #define _DAC2CON2_R10 0x04
9256 #define _DAC2CON2_DAC2R10 0x04
9257 #define _DAC2CON2_REF11 0x08
9258 #define _DAC2CON2_DAC2REF11 0x08
9259 #define _DAC2CON2_R11 0x08
9260 #define _DAC2CON2_DAC2R11 0x08
9261 #define _DAC2CON2_REF12 0x10
9262 #define _DAC2CON2_DAC2REF12 0x10
9263 #define _DAC2CON2_R12 0x10
9264 #define _DAC2CON2_DAC2R12 0x10
9265 #define _DAC2CON2_REF13 0x20
9266 #define _DAC2CON2_DAC2REF13 0x20
9267 #define _DAC2CON2_R13 0x20
9268 #define _DAC2CON2_DAC2R13 0x20
9269 #define _DAC2CON2_REF14 0x40
9270 #define _DAC2CON2_DAC2REF14 0x40
9271 #define _DAC2CON2_R14 0x40
9272 #define _DAC2CON2_DAC2R14 0x40
9273 #define _DAC2CON2_REF15 0x80
9274 #define _DAC2CON2_DAC2REF15 0x80
9275 #define _DAC2CON2_R15 0x80
9276 #define _DAC2CON2_DAC2R15 0x80
9278 //==============================================================================
9281 //==============================================================================
9284 extern __at(0x0593) __sfr DAC2REFH
;
9302 unsigned DAC2REF8
: 1;
9303 unsigned DAC2REF9
: 1;
9304 unsigned DAC2REF10
: 1;
9305 unsigned DAC2REF11
: 1;
9306 unsigned DAC2REF12
: 1;
9307 unsigned DAC2REF13
: 1;
9308 unsigned DAC2REF14
: 1;
9309 unsigned DAC2REF15
: 1;
9326 unsigned DAC2R8
: 1;
9327 unsigned DAC2R9
: 1;
9328 unsigned DAC2R10
: 1;
9329 unsigned DAC2R11
: 1;
9330 unsigned DAC2R12
: 1;
9331 unsigned DAC2R13
: 1;
9332 unsigned DAC2R14
: 1;
9333 unsigned DAC2R15
: 1;
9337 extern __at(0x0593) volatile __DAC2REFHbits_t DAC2REFHbits
;
9339 #define _DAC2REFH_REF8 0x01
9340 #define _DAC2REFH_DAC2REF8 0x01
9341 #define _DAC2REFH_R8 0x01
9342 #define _DAC2REFH_DAC2R8 0x01
9343 #define _DAC2REFH_REF9 0x02
9344 #define _DAC2REFH_DAC2REF9 0x02
9345 #define _DAC2REFH_R9 0x02
9346 #define _DAC2REFH_DAC2R9 0x02
9347 #define _DAC2REFH_REF10 0x04
9348 #define _DAC2REFH_DAC2REF10 0x04
9349 #define _DAC2REFH_R10 0x04
9350 #define _DAC2REFH_DAC2R10 0x04
9351 #define _DAC2REFH_REF11 0x08
9352 #define _DAC2REFH_DAC2REF11 0x08
9353 #define _DAC2REFH_R11 0x08
9354 #define _DAC2REFH_DAC2R11 0x08
9355 #define _DAC2REFH_REF12 0x10
9356 #define _DAC2REFH_DAC2REF12 0x10
9357 #define _DAC2REFH_R12 0x10
9358 #define _DAC2REFH_DAC2R12 0x10
9359 #define _DAC2REFH_REF13 0x20
9360 #define _DAC2REFH_DAC2REF13 0x20
9361 #define _DAC2REFH_R13 0x20
9362 #define _DAC2REFH_DAC2R13 0x20
9363 #define _DAC2REFH_REF14 0x40
9364 #define _DAC2REFH_DAC2REF14 0x40
9365 #define _DAC2REFH_R14 0x40
9366 #define _DAC2REFH_DAC2R14 0x40
9367 #define _DAC2REFH_REF15 0x80
9368 #define _DAC2REFH_DAC2REF15 0x80
9369 #define _DAC2REFH_R15 0x80
9370 #define _DAC2REFH_DAC2R15 0x80
9372 //==============================================================================
9375 //==============================================================================
9378 extern __at(0x0594) __sfr DAC3CON0
;
9396 unsigned DACNSS0
: 1;
9397 unsigned DACNSS1
: 1;
9398 unsigned DACPSS0
: 1;
9399 unsigned DACPSS1
: 1;
9400 unsigned DACOE2
: 1;
9401 unsigned DACOE1
: 1;
9408 unsigned DAC3NSS0
: 1;
9409 unsigned DAC3NSS1
: 1;
9410 unsigned DAC3PSS0
: 1;
9411 unsigned DAC3PSS1
: 1;
9412 unsigned DAC3OE2
: 1;
9413 unsigned DAC3OE1
: 1;
9415 unsigned DAC3EN
: 1;
9426 unsigned DACNSS
: 2;
9432 unsigned DAC3NSS
: 2;
9446 unsigned DAC3PSS
: 2;
9453 unsigned DACPSS
: 2;
9458 extern __at(0x0594) volatile __DAC3CON0bits_t DAC3CON0bits
;
9460 #define _DAC3CON0_NSS0 0x01
9461 #define _DAC3CON0_DACNSS0 0x01
9462 #define _DAC3CON0_DAC3NSS0 0x01
9463 #define _DAC3CON0_NSS1 0x02
9464 #define _DAC3CON0_DACNSS1 0x02
9465 #define _DAC3CON0_DAC3NSS1 0x02
9466 #define _DAC3CON0_PSS0 0x04
9467 #define _DAC3CON0_DACPSS0 0x04
9468 #define _DAC3CON0_DAC3PSS0 0x04
9469 #define _DAC3CON0_PSS1 0x08
9470 #define _DAC3CON0_DACPSS1 0x08
9471 #define _DAC3CON0_DAC3PSS1 0x08
9472 #define _DAC3CON0_OE2 0x10
9473 #define _DAC3CON0_DACOE2 0x10
9474 #define _DAC3CON0_DAC3OE2 0x10
9475 #define _DAC3CON0_OE1 0x20
9476 #define _DAC3CON0_DACOE1 0x20
9477 #define _DAC3CON0_DAC3OE1 0x20
9478 #define _DAC3CON0_EN 0x80
9479 #define _DAC3CON0_DACEN 0x80
9480 #define _DAC3CON0_DAC3EN 0x80
9482 //==============================================================================
9485 //==============================================================================
9488 extern __at(0x0595) __sfr DAC3CON1
;
9518 unsigned DAC3R0
: 1;
9519 unsigned DAC3R1
: 1;
9520 unsigned DAC3R2
: 1;
9521 unsigned DAC3R3
: 1;
9522 unsigned DAC3R4
: 1;
9542 unsigned DAC3REF0
: 1;
9543 unsigned DAC3REF1
: 1;
9544 unsigned DAC3REF2
: 1;
9545 unsigned DAC3REF3
: 1;
9546 unsigned DAC3REF4
: 1;
9560 unsigned DAC3REF
: 5;
9583 extern __at(0x0595) volatile __DAC3CON1bits_t DAC3CON1bits
;
9585 #define _DAC3CON1_DACR0 0x01
9586 #define _DAC3CON1_R0 0x01
9587 #define _DAC3CON1_DAC3R0 0x01
9588 #define _DAC3CON1_REF0 0x01
9589 #define _DAC3CON1_DAC3REF0 0x01
9590 #define _DAC3CON1_DACR1 0x02
9591 #define _DAC3CON1_R1 0x02
9592 #define _DAC3CON1_DAC3R1 0x02
9593 #define _DAC3CON1_REF1 0x02
9594 #define _DAC3CON1_DAC3REF1 0x02
9595 #define _DAC3CON1_DACR2 0x04
9596 #define _DAC3CON1_R2 0x04
9597 #define _DAC3CON1_DAC3R2 0x04
9598 #define _DAC3CON1_REF2 0x04
9599 #define _DAC3CON1_DAC3REF2 0x04
9600 #define _DAC3CON1_DACR3 0x08
9601 #define _DAC3CON1_R3 0x08
9602 #define _DAC3CON1_DAC3R3 0x08
9603 #define _DAC3CON1_REF3 0x08
9604 #define _DAC3CON1_DAC3REF3 0x08
9605 #define _DAC3CON1_DACR4 0x10
9606 #define _DAC3CON1_R4 0x10
9607 #define _DAC3CON1_DAC3R4 0x10
9608 #define _DAC3CON1_REF4 0x10
9609 #define _DAC3CON1_DAC3REF4 0x10
9611 //==============================================================================
9614 //==============================================================================
9617 extern __at(0x0595) __sfr DAC3REF
;
9647 unsigned DAC3R0
: 1;
9648 unsigned DAC3R1
: 1;
9649 unsigned DAC3R2
: 1;
9650 unsigned DAC3R3
: 1;
9651 unsigned DAC3R4
: 1;
9671 unsigned DAC3REF0
: 1;
9672 unsigned DAC3REF1
: 1;
9673 unsigned DAC3REF2
: 1;
9674 unsigned DAC3REF3
: 1;
9675 unsigned DAC3REF4
: 1;
9695 unsigned DAC3REF
: 5;
9712 extern __at(0x0595) volatile __DAC3REFbits_t DAC3REFbits
;
9714 #define _DAC3REF_DACR0 0x01
9715 #define _DAC3REF_R0 0x01
9716 #define _DAC3REF_DAC3R0 0x01
9717 #define _DAC3REF_REF0 0x01
9718 #define _DAC3REF_DAC3REF0 0x01
9719 #define _DAC3REF_DACR1 0x02
9720 #define _DAC3REF_R1 0x02
9721 #define _DAC3REF_DAC3R1 0x02
9722 #define _DAC3REF_REF1 0x02
9723 #define _DAC3REF_DAC3REF1 0x02
9724 #define _DAC3REF_DACR2 0x04
9725 #define _DAC3REF_R2 0x04
9726 #define _DAC3REF_DAC3R2 0x04
9727 #define _DAC3REF_REF2 0x04
9728 #define _DAC3REF_DAC3REF2 0x04
9729 #define _DAC3REF_DACR3 0x08
9730 #define _DAC3REF_R3 0x08
9731 #define _DAC3REF_DAC3R3 0x08
9732 #define _DAC3REF_REF3 0x08
9733 #define _DAC3REF_DAC3REF3 0x08
9734 #define _DAC3REF_DACR4 0x10
9735 #define _DAC3REF_R4 0x10
9736 #define _DAC3REF_DAC3R4 0x10
9737 #define _DAC3REF_REF4 0x10
9738 #define _DAC3REF_DAC3REF4 0x10
9740 //==============================================================================
9743 //==============================================================================
9746 extern __at(0x0596) __sfr DAC4CON0
;
9764 unsigned DACNSS0
: 1;
9765 unsigned DACNSS1
: 1;
9766 unsigned DACPSS0
: 1;
9767 unsigned DACPSS1
: 1;
9768 unsigned DACOE2
: 1;
9769 unsigned DACOE1
: 1;
9776 unsigned DAC4NSS0
: 1;
9777 unsigned DAC4NSS1
: 1;
9778 unsigned DAC4PSS0
: 1;
9779 unsigned DAC4PSS1
: 1;
9780 unsigned DAC4OE2
: 1;
9781 unsigned DAC4OE1
: 1;
9783 unsigned DAC4EN
: 1;
9788 unsigned DAC4NSS
: 2;
9800 unsigned DACNSS
: 2;
9807 unsigned DAC4PSS
: 2;
9814 unsigned DACPSS
: 2;
9826 extern __at(0x0596) volatile __DAC4CON0bits_t DAC4CON0bits
;
9828 #define _DAC4CON0_NSS0 0x01
9829 #define _DAC4CON0_DACNSS0 0x01
9830 #define _DAC4CON0_DAC4NSS0 0x01
9831 #define _DAC4CON0_NSS1 0x02
9832 #define _DAC4CON0_DACNSS1 0x02
9833 #define _DAC4CON0_DAC4NSS1 0x02
9834 #define _DAC4CON0_PSS0 0x04
9835 #define _DAC4CON0_DACPSS0 0x04
9836 #define _DAC4CON0_DAC4PSS0 0x04
9837 #define _DAC4CON0_PSS1 0x08
9838 #define _DAC4CON0_DACPSS1 0x08
9839 #define _DAC4CON0_DAC4PSS1 0x08
9840 #define _DAC4CON0_OE2 0x10
9841 #define _DAC4CON0_DACOE2 0x10
9842 #define _DAC4CON0_DAC4OE2 0x10
9843 #define _DAC4CON0_OE1 0x20
9844 #define _DAC4CON0_DACOE1 0x20
9845 #define _DAC4CON0_DAC4OE1 0x20
9846 #define _DAC4CON0_EN 0x80
9847 #define _DAC4CON0_DACEN 0x80
9848 #define _DAC4CON0_DAC4EN 0x80
9850 //==============================================================================
9853 //==============================================================================
9856 extern __at(0x0597) __sfr DAC4CON1
;
9886 unsigned DAC4R0
: 1;
9887 unsigned DAC4R1
: 1;
9888 unsigned DAC4R2
: 1;
9889 unsigned DAC4R3
: 1;
9890 unsigned DAC4R4
: 1;
9910 unsigned DAC4REF0
: 1;
9911 unsigned DAC4REF1
: 1;
9912 unsigned DAC4REF2
: 1;
9913 unsigned DAC4REF3
: 1;
9914 unsigned DAC4REF4
: 1;
9934 unsigned DAC4REF
: 5;
9951 extern __at(0x0597) volatile __DAC4CON1bits_t DAC4CON1bits
;
9953 #define _DAC4CON1_DACR0 0x01
9954 #define _DAC4CON1_R0 0x01
9955 #define _DAC4CON1_DAC4R0 0x01
9956 #define _DAC4CON1_REF0 0x01
9957 #define _DAC4CON1_DAC4REF0 0x01
9958 #define _DAC4CON1_DACR1 0x02
9959 #define _DAC4CON1_R1 0x02
9960 #define _DAC4CON1_DAC4R1 0x02
9961 #define _DAC4CON1_REF1 0x02
9962 #define _DAC4CON1_DAC4REF1 0x02
9963 #define _DAC4CON1_DACR2 0x04
9964 #define _DAC4CON1_R2 0x04
9965 #define _DAC4CON1_DAC4R2 0x04
9966 #define _DAC4CON1_REF2 0x04
9967 #define _DAC4CON1_DAC4REF2 0x04
9968 #define _DAC4CON1_DACR3 0x08
9969 #define _DAC4CON1_R3 0x08
9970 #define _DAC4CON1_DAC4R3 0x08
9971 #define _DAC4CON1_REF3 0x08
9972 #define _DAC4CON1_DAC4REF3 0x08
9973 #define _DAC4CON1_DACR4 0x10
9974 #define _DAC4CON1_R4 0x10
9975 #define _DAC4CON1_DAC4R4 0x10
9976 #define _DAC4CON1_REF4 0x10
9977 #define _DAC4CON1_DAC4REF4 0x10
9979 //==============================================================================
9982 //==============================================================================
9985 extern __at(0x0597) __sfr DAC4REF
;
10015 unsigned DAC4R0
: 1;
10016 unsigned DAC4R1
: 1;
10017 unsigned DAC4R2
: 1;
10018 unsigned DAC4R3
: 1;
10019 unsigned DAC4R4
: 1;
10039 unsigned DAC4REF0
: 1;
10040 unsigned DAC4REF1
: 1;
10041 unsigned DAC4REF2
: 1;
10042 unsigned DAC4REF3
: 1;
10043 unsigned DAC4REF4
: 1;
10063 unsigned DAC4R
: 5;
10075 unsigned DAC4REF
: 5;
10080 extern __at(0x0597) volatile __DAC4REFbits_t DAC4REFbits
;
10082 #define _DAC4REF_DACR0 0x01
10083 #define _DAC4REF_R0 0x01
10084 #define _DAC4REF_DAC4R0 0x01
10085 #define _DAC4REF_REF0 0x01
10086 #define _DAC4REF_DAC4REF0 0x01
10087 #define _DAC4REF_DACR1 0x02
10088 #define _DAC4REF_R1 0x02
10089 #define _DAC4REF_DAC4R1 0x02
10090 #define _DAC4REF_REF1 0x02
10091 #define _DAC4REF_DAC4REF1 0x02
10092 #define _DAC4REF_DACR2 0x04
10093 #define _DAC4REF_R2 0x04
10094 #define _DAC4REF_DAC4R2 0x04
10095 #define _DAC4REF_REF2 0x04
10096 #define _DAC4REF_DAC4REF2 0x04
10097 #define _DAC4REF_DACR3 0x08
10098 #define _DAC4REF_R3 0x08
10099 #define _DAC4REF_DAC4R3 0x08
10100 #define _DAC4REF_REF3 0x08
10101 #define _DAC4REF_DAC4REF3 0x08
10102 #define _DAC4REF_DACR4 0x10
10103 #define _DAC4REF_R4 0x10
10104 #define _DAC4REF_DAC4R4 0x10
10105 #define _DAC4REF_REF4 0x10
10106 #define _DAC4REF_DAC4REF4 0x10
10108 //==============================================================================
10111 //==============================================================================
10114 extern __at(0x0598) __sfr DAC5CON0
;
10132 unsigned DACNSS0
: 1;
10133 unsigned DACNSS1
: 1;
10134 unsigned DACPSS0
: 1;
10135 unsigned DACPSS1
: 1;
10136 unsigned DACOE2
: 1;
10138 unsigned DACFM
: 1;
10139 unsigned DACEN
: 1;
10144 unsigned DAC5NSS0
: 1;
10145 unsigned DAC5NSS1
: 1;
10146 unsigned DAC5PSS0
: 1;
10147 unsigned DAC5PSS1
: 1;
10148 unsigned DAC5OE2
: 1;
10149 unsigned DACOE1
: 1;
10150 unsigned DAC5FM
: 1;
10151 unsigned DAC5EN
: 1;
10161 unsigned DACOE
: 1;
10173 unsigned DAC5OE1
: 1;
10180 unsigned DACNSS
: 2;
10192 unsigned DAC5NSS
: 2;
10206 unsigned DAC5PSS
: 2;
10213 unsigned DACPSS
: 2;
10216 } __DAC5CON0bits_t
;
10218 extern __at(0x0598) volatile __DAC5CON0bits_t DAC5CON0bits
;
10220 #define _DAC5CON0_NSS0 0x01
10221 #define _DAC5CON0_DACNSS0 0x01
10222 #define _DAC5CON0_DAC5NSS0 0x01
10223 #define _DAC5CON0_NSS1 0x02
10224 #define _DAC5CON0_DACNSS1 0x02
10225 #define _DAC5CON0_DAC5NSS1 0x02
10226 #define _DAC5CON0_PSS0 0x04
10227 #define _DAC5CON0_DACPSS0 0x04
10228 #define _DAC5CON0_DAC5PSS0 0x04
10229 #define _DAC5CON0_PSS1 0x08
10230 #define _DAC5CON0_DACPSS1 0x08
10231 #define _DAC5CON0_DAC5PSS1 0x08
10232 #define _DAC5CON0_OE2 0x10
10233 #define _DAC5CON0_DACOE2 0x10
10234 #define _DAC5CON0_DAC5OE2 0x10
10235 #define _DAC5CON0_OE1 0x20
10236 #define _DAC5CON0_OE 0x20
10237 #define _DAC5CON0_DACOE1 0x20
10238 #define _DAC5CON0_DACOE 0x20
10239 #define _DAC5CON0_DAC5OE1 0x20
10240 #define _DAC5CON0_FM 0x40
10241 #define _DAC5CON0_DACFM 0x40
10242 #define _DAC5CON0_DAC5FM 0x40
10243 #define _DAC5CON0_EN 0x80
10244 #define _DAC5CON0_DACEN 0x80
10245 #define _DAC5CON0_DAC5EN 0x80
10247 //==============================================================================
10250 //==============================================================================
10253 extern __at(0x0599) __sfr DAC5CON1
;
10271 unsigned DAC5REF0
: 1;
10272 unsigned DAC5REF1
: 1;
10273 unsigned DAC5REF2
: 1;
10274 unsigned DAC5REF3
: 1;
10275 unsigned DAC5REF4
: 1;
10276 unsigned DAC5REF5
: 1;
10277 unsigned DAC5REF6
: 1;
10278 unsigned DAC5REF7
: 1;
10295 unsigned DAC5R0
: 1;
10296 unsigned DAC5R1
: 1;
10297 unsigned DAC5R2
: 1;
10298 unsigned DAC5R3
: 1;
10299 unsigned DAC5R4
: 1;
10300 unsigned DAC5R5
: 1;
10301 unsigned DAC5R6
: 1;
10302 unsigned DAC5R7
: 1;
10304 } __DAC5CON1bits_t
;
10306 extern __at(0x0599) volatile __DAC5CON1bits_t DAC5CON1bits
;
10308 #define _DAC5CON1_REF0 0x01
10309 #define _DAC5CON1_DAC5REF0 0x01
10310 #define _DAC5CON1_R0 0x01
10311 #define _DAC5CON1_DAC5R0 0x01
10312 #define _DAC5CON1_REF1 0x02
10313 #define _DAC5CON1_DAC5REF1 0x02
10314 #define _DAC5CON1_R1 0x02
10315 #define _DAC5CON1_DAC5R1 0x02
10316 #define _DAC5CON1_REF2 0x04
10317 #define _DAC5CON1_DAC5REF2 0x04
10318 #define _DAC5CON1_R2 0x04
10319 #define _DAC5CON1_DAC5R2 0x04
10320 #define _DAC5CON1_REF3 0x08
10321 #define _DAC5CON1_DAC5REF3 0x08
10322 #define _DAC5CON1_R3 0x08
10323 #define _DAC5CON1_DAC5R3 0x08
10324 #define _DAC5CON1_REF4 0x10
10325 #define _DAC5CON1_DAC5REF4 0x10
10326 #define _DAC5CON1_R4 0x10
10327 #define _DAC5CON1_DAC5R4 0x10
10328 #define _DAC5CON1_REF5 0x20
10329 #define _DAC5CON1_DAC5REF5 0x20
10330 #define _DAC5CON1_R5 0x20
10331 #define _DAC5CON1_DAC5R5 0x20
10332 #define _DAC5CON1_REF6 0x40
10333 #define _DAC5CON1_DAC5REF6 0x40
10334 #define _DAC5CON1_R6 0x40
10335 #define _DAC5CON1_DAC5R6 0x40
10336 #define _DAC5CON1_REF7 0x80
10337 #define _DAC5CON1_DAC5REF7 0x80
10338 #define _DAC5CON1_R7 0x80
10339 #define _DAC5CON1_DAC5R7 0x80
10341 //==============================================================================
10343 extern __at(0x0599) __sfr DAC5REF
;
10345 //==============================================================================
10348 extern __at(0x0599) __sfr DAC5REFL
;
10366 unsigned DAC5REF0
: 1;
10367 unsigned DAC5REF1
: 1;
10368 unsigned DAC5REF2
: 1;
10369 unsigned DAC5REF3
: 1;
10370 unsigned DAC5REF4
: 1;
10371 unsigned DAC5REF5
: 1;
10372 unsigned DAC5REF6
: 1;
10373 unsigned DAC5REF7
: 1;
10390 unsigned DAC5R0
: 1;
10391 unsigned DAC5R1
: 1;
10392 unsigned DAC5R2
: 1;
10393 unsigned DAC5R3
: 1;
10394 unsigned DAC5R4
: 1;
10395 unsigned DAC5R5
: 1;
10396 unsigned DAC5R6
: 1;
10397 unsigned DAC5R7
: 1;
10399 } __DAC5REFLbits_t
;
10401 extern __at(0x0599) volatile __DAC5REFLbits_t DAC5REFLbits
;
10403 #define _DAC5REFL_REF0 0x01
10404 #define _DAC5REFL_DAC5REF0 0x01
10405 #define _DAC5REFL_R0 0x01
10406 #define _DAC5REFL_DAC5R0 0x01
10407 #define _DAC5REFL_REF1 0x02
10408 #define _DAC5REFL_DAC5REF1 0x02
10409 #define _DAC5REFL_R1 0x02
10410 #define _DAC5REFL_DAC5R1 0x02
10411 #define _DAC5REFL_REF2 0x04
10412 #define _DAC5REFL_DAC5REF2 0x04
10413 #define _DAC5REFL_R2 0x04
10414 #define _DAC5REFL_DAC5R2 0x04
10415 #define _DAC5REFL_REF3 0x08
10416 #define _DAC5REFL_DAC5REF3 0x08
10417 #define _DAC5REFL_R3 0x08
10418 #define _DAC5REFL_DAC5R3 0x08
10419 #define _DAC5REFL_REF4 0x10
10420 #define _DAC5REFL_DAC5REF4 0x10
10421 #define _DAC5REFL_R4 0x10
10422 #define _DAC5REFL_DAC5R4 0x10
10423 #define _DAC5REFL_REF5 0x20
10424 #define _DAC5REFL_DAC5REF5 0x20
10425 #define _DAC5REFL_R5 0x20
10426 #define _DAC5REFL_DAC5R5 0x20
10427 #define _DAC5REFL_REF6 0x40
10428 #define _DAC5REFL_DAC5REF6 0x40
10429 #define _DAC5REFL_R6 0x40
10430 #define _DAC5REFL_DAC5R6 0x40
10431 #define _DAC5REFL_REF7 0x80
10432 #define _DAC5REFL_DAC5REF7 0x80
10433 #define _DAC5REFL_R7 0x80
10434 #define _DAC5REFL_DAC5R7 0x80
10436 //==============================================================================
10439 //==============================================================================
10442 extern __at(0x059A) __sfr DAC5CON2
;
10450 unsigned REF10
: 1;
10451 unsigned REF11
: 1;
10452 unsigned REF12
: 1;
10453 unsigned REF13
: 1;
10454 unsigned REF14
: 1;
10455 unsigned REF15
: 1;
10460 unsigned DAC5REF8
: 1;
10461 unsigned DAC5REF9
: 1;
10462 unsigned DAC5REF10
: 1;
10463 unsigned DAC5REF11
: 1;
10464 unsigned DAC5REF12
: 1;
10465 unsigned DAC5REF13
: 1;
10466 unsigned DAC5REF14
: 1;
10467 unsigned DAC5REF15
: 1;
10484 unsigned DAC5R8
: 1;
10485 unsigned DAC5R9
: 1;
10486 unsigned DAC5R10
: 1;
10487 unsigned DAC5R11
: 1;
10488 unsigned DAC5R12
: 1;
10489 unsigned DAC5R13
: 1;
10490 unsigned DAC5R14
: 1;
10491 unsigned DAC5R15
: 1;
10493 } __DAC5CON2bits_t
;
10495 extern __at(0x059A) volatile __DAC5CON2bits_t DAC5CON2bits
;
10497 #define _DAC5CON2_REF8 0x01
10498 #define _DAC5CON2_DAC5REF8 0x01
10499 #define _DAC5CON2_R8 0x01
10500 #define _DAC5CON2_DAC5R8 0x01
10501 #define _DAC5CON2_REF9 0x02
10502 #define _DAC5CON2_DAC5REF9 0x02
10503 #define _DAC5CON2_R9 0x02
10504 #define _DAC5CON2_DAC5R9 0x02
10505 #define _DAC5CON2_REF10 0x04
10506 #define _DAC5CON2_DAC5REF10 0x04
10507 #define _DAC5CON2_R10 0x04
10508 #define _DAC5CON2_DAC5R10 0x04
10509 #define _DAC5CON2_REF11 0x08
10510 #define _DAC5CON2_DAC5REF11 0x08
10511 #define _DAC5CON2_R11 0x08
10512 #define _DAC5CON2_DAC5R11 0x08
10513 #define _DAC5CON2_REF12 0x10
10514 #define _DAC5CON2_DAC5REF12 0x10
10515 #define _DAC5CON2_R12 0x10
10516 #define _DAC5CON2_DAC5R12 0x10
10517 #define _DAC5CON2_REF13 0x20
10518 #define _DAC5CON2_DAC5REF13 0x20
10519 #define _DAC5CON2_R13 0x20
10520 #define _DAC5CON2_DAC5R13 0x20
10521 #define _DAC5CON2_REF14 0x40
10522 #define _DAC5CON2_DAC5REF14 0x40
10523 #define _DAC5CON2_R14 0x40
10524 #define _DAC5CON2_DAC5R14 0x40
10525 #define _DAC5CON2_REF15 0x80
10526 #define _DAC5CON2_DAC5REF15 0x80
10527 #define _DAC5CON2_R15 0x80
10528 #define _DAC5CON2_DAC5R15 0x80
10530 //==============================================================================
10533 //==============================================================================
10536 extern __at(0x059A) __sfr DAC5REFH
;
10544 unsigned REF10
: 1;
10545 unsigned REF11
: 1;
10546 unsigned REF12
: 1;
10547 unsigned REF13
: 1;
10548 unsigned REF14
: 1;
10549 unsigned REF15
: 1;
10554 unsigned DAC5REF8
: 1;
10555 unsigned DAC5REF9
: 1;
10556 unsigned DAC5REF10
: 1;
10557 unsigned DAC5REF11
: 1;
10558 unsigned DAC5REF12
: 1;
10559 unsigned DAC5REF13
: 1;
10560 unsigned DAC5REF14
: 1;
10561 unsigned DAC5REF15
: 1;
10578 unsigned DAC5R8
: 1;
10579 unsigned DAC5R9
: 1;
10580 unsigned DAC5R10
: 1;
10581 unsigned DAC5R11
: 1;
10582 unsigned DAC5R12
: 1;
10583 unsigned DAC5R13
: 1;
10584 unsigned DAC5R14
: 1;
10585 unsigned DAC5R15
: 1;
10587 } __DAC5REFHbits_t
;
10589 extern __at(0x059A) volatile __DAC5REFHbits_t DAC5REFHbits
;
10591 #define _DAC5REFH_REF8 0x01
10592 #define _DAC5REFH_DAC5REF8 0x01
10593 #define _DAC5REFH_R8 0x01
10594 #define _DAC5REFH_DAC5R8 0x01
10595 #define _DAC5REFH_REF9 0x02
10596 #define _DAC5REFH_DAC5REF9 0x02
10597 #define _DAC5REFH_R9 0x02
10598 #define _DAC5REFH_DAC5R9 0x02
10599 #define _DAC5REFH_REF10 0x04
10600 #define _DAC5REFH_DAC5REF10 0x04
10601 #define _DAC5REFH_R10 0x04
10602 #define _DAC5REFH_DAC5R10 0x04
10603 #define _DAC5REFH_REF11 0x08
10604 #define _DAC5REFH_DAC5REF11 0x08
10605 #define _DAC5REFH_R11 0x08
10606 #define _DAC5REFH_DAC5R11 0x08
10607 #define _DAC5REFH_REF12 0x10
10608 #define _DAC5REFH_DAC5REF12 0x10
10609 #define _DAC5REFH_R12 0x10
10610 #define _DAC5REFH_DAC5R12 0x10
10611 #define _DAC5REFH_REF13 0x20
10612 #define _DAC5REFH_DAC5REF13 0x20
10613 #define _DAC5REFH_R13 0x20
10614 #define _DAC5REFH_DAC5R13 0x20
10615 #define _DAC5REFH_REF14 0x40
10616 #define _DAC5REFH_DAC5REF14 0x40
10617 #define _DAC5REFH_R14 0x40
10618 #define _DAC5REFH_DAC5R14 0x40
10619 #define _DAC5REFH_REF15 0x80
10620 #define _DAC5REFH_DAC5REF15 0x80
10621 #define _DAC5REFH_R15 0x80
10622 #define _DAC5REFH_DAC5R15 0x80
10624 //==============================================================================
10627 //==============================================================================
10630 extern __at(0x059B) __sfr DAC6CON0
;
10648 unsigned DACNSS0
: 1;
10649 unsigned DACNSS1
: 1;
10650 unsigned DACPSS0
: 1;
10651 unsigned DACPSS1
: 1;
10652 unsigned DACOE2
: 1;
10654 unsigned DACFM
: 1;
10655 unsigned DACEN
: 1;
10660 unsigned DAC6NSS0
: 1;
10661 unsigned DAC6NSS1
: 1;
10662 unsigned DAC6PSS0
: 1;
10663 unsigned DAC6PSS1
: 1;
10664 unsigned DAC6OE2
: 1;
10665 unsigned DACOE1
: 1;
10666 unsigned DAC6FM
: 1;
10667 unsigned DAC6EN
: 1;
10677 unsigned DACOE
: 1;
10689 unsigned DAC6OE1
: 1;
10696 unsigned DAC6NSS
: 2;
10702 unsigned DACNSS
: 2;
10715 unsigned DACPSS
: 2;
10729 unsigned DAC6PSS
: 2;
10732 } __DAC6CON0bits_t
;
10734 extern __at(0x059B) volatile __DAC6CON0bits_t DAC6CON0bits
;
10736 #define _DAC6CON0_NSS0 0x01
10737 #define _DAC6CON0_DACNSS0 0x01
10738 #define _DAC6CON0_DAC6NSS0 0x01
10739 #define _DAC6CON0_NSS1 0x02
10740 #define _DAC6CON0_DACNSS1 0x02
10741 #define _DAC6CON0_DAC6NSS1 0x02
10742 #define _DAC6CON0_PSS0 0x04
10743 #define _DAC6CON0_DACPSS0 0x04
10744 #define _DAC6CON0_DAC6PSS0 0x04
10745 #define _DAC6CON0_PSS1 0x08
10746 #define _DAC6CON0_DACPSS1 0x08
10747 #define _DAC6CON0_DAC6PSS1 0x08
10748 #define _DAC6CON0_OE2 0x10
10749 #define _DAC6CON0_DACOE2 0x10
10750 #define _DAC6CON0_DAC6OE2 0x10
10751 #define _DAC6CON0_OE1 0x20
10752 #define _DAC6CON0_OE 0x20
10753 #define _DAC6CON0_DACOE1 0x20
10754 #define _DAC6CON0_DACOE 0x20
10755 #define _DAC6CON0_DAC6OE1 0x20
10756 #define _DAC6CON0_FM 0x40
10757 #define _DAC6CON0_DACFM 0x40
10758 #define _DAC6CON0_DAC6FM 0x40
10759 #define _DAC6CON0_EN 0x80
10760 #define _DAC6CON0_DACEN 0x80
10761 #define _DAC6CON0_DAC6EN 0x80
10763 //==============================================================================
10766 //==============================================================================
10769 extern __at(0x059C) __sfr DAC6CON1
;
10787 unsigned DAC6REF0
: 1;
10788 unsigned DAC6REF1
: 1;
10789 unsigned DAC6REF2
: 1;
10790 unsigned DAC6REF3
: 1;
10791 unsigned DAC6REF4
: 1;
10792 unsigned DAC6REF5
: 1;
10793 unsigned DAC6REF6
: 1;
10794 unsigned DAC6REF7
: 1;
10811 unsigned DAC6R0
: 1;
10812 unsigned DAC6R1
: 1;
10813 unsigned DAC6R2
: 1;
10814 unsigned DAC6R3
: 1;
10815 unsigned DAC6R4
: 1;
10816 unsigned DAC6R5
: 1;
10817 unsigned DAC6R6
: 1;
10818 unsigned DAC6R7
: 1;
10820 } __DAC6CON1bits_t
;
10822 extern __at(0x059C) volatile __DAC6CON1bits_t DAC6CON1bits
;
10824 #define _DAC6CON1_REF0 0x01
10825 #define _DAC6CON1_DAC6REF0 0x01
10826 #define _DAC6CON1_R0 0x01
10827 #define _DAC6CON1_DAC6R0 0x01
10828 #define _DAC6CON1_REF1 0x02
10829 #define _DAC6CON1_DAC6REF1 0x02
10830 #define _DAC6CON1_R1 0x02
10831 #define _DAC6CON1_DAC6R1 0x02
10832 #define _DAC6CON1_REF2 0x04
10833 #define _DAC6CON1_DAC6REF2 0x04
10834 #define _DAC6CON1_R2 0x04
10835 #define _DAC6CON1_DAC6R2 0x04
10836 #define _DAC6CON1_REF3 0x08
10837 #define _DAC6CON1_DAC6REF3 0x08
10838 #define _DAC6CON1_R3 0x08
10839 #define _DAC6CON1_DAC6R3 0x08
10840 #define _DAC6CON1_REF4 0x10
10841 #define _DAC6CON1_DAC6REF4 0x10
10842 #define _DAC6CON1_R4 0x10
10843 #define _DAC6CON1_DAC6R4 0x10
10844 #define _DAC6CON1_REF5 0x20
10845 #define _DAC6CON1_DAC6REF5 0x20
10846 #define _DAC6CON1_R5 0x20
10847 #define _DAC6CON1_DAC6R5 0x20
10848 #define _DAC6CON1_REF6 0x40
10849 #define _DAC6CON1_DAC6REF6 0x40
10850 #define _DAC6CON1_R6 0x40
10851 #define _DAC6CON1_DAC6R6 0x40
10852 #define _DAC6CON1_REF7 0x80
10853 #define _DAC6CON1_DAC6REF7 0x80
10854 #define _DAC6CON1_R7 0x80
10855 #define _DAC6CON1_DAC6R7 0x80
10857 //==============================================================================
10859 extern __at(0x059C) __sfr DAC6REF
;
10861 //==============================================================================
10864 extern __at(0x059C) __sfr DAC6REFL
;
10882 unsigned DAC6REF0
: 1;
10883 unsigned DAC6REF1
: 1;
10884 unsigned DAC6REF2
: 1;
10885 unsigned DAC6REF3
: 1;
10886 unsigned DAC6REF4
: 1;
10887 unsigned DAC6REF5
: 1;
10888 unsigned DAC6REF6
: 1;
10889 unsigned DAC6REF7
: 1;
10906 unsigned DAC6R0
: 1;
10907 unsigned DAC6R1
: 1;
10908 unsigned DAC6R2
: 1;
10909 unsigned DAC6R3
: 1;
10910 unsigned DAC6R4
: 1;
10911 unsigned DAC6R5
: 1;
10912 unsigned DAC6R6
: 1;
10913 unsigned DAC6R7
: 1;
10915 } __DAC6REFLbits_t
;
10917 extern __at(0x059C) volatile __DAC6REFLbits_t DAC6REFLbits
;
10919 #define _DAC6REFL_REF0 0x01
10920 #define _DAC6REFL_DAC6REF0 0x01
10921 #define _DAC6REFL_R0 0x01
10922 #define _DAC6REFL_DAC6R0 0x01
10923 #define _DAC6REFL_REF1 0x02
10924 #define _DAC6REFL_DAC6REF1 0x02
10925 #define _DAC6REFL_R1 0x02
10926 #define _DAC6REFL_DAC6R1 0x02
10927 #define _DAC6REFL_REF2 0x04
10928 #define _DAC6REFL_DAC6REF2 0x04
10929 #define _DAC6REFL_R2 0x04
10930 #define _DAC6REFL_DAC6R2 0x04
10931 #define _DAC6REFL_REF3 0x08
10932 #define _DAC6REFL_DAC6REF3 0x08
10933 #define _DAC6REFL_R3 0x08
10934 #define _DAC6REFL_DAC6R3 0x08
10935 #define _DAC6REFL_REF4 0x10
10936 #define _DAC6REFL_DAC6REF4 0x10
10937 #define _DAC6REFL_R4 0x10
10938 #define _DAC6REFL_DAC6R4 0x10
10939 #define _DAC6REFL_REF5 0x20
10940 #define _DAC6REFL_DAC6REF5 0x20
10941 #define _DAC6REFL_R5 0x20
10942 #define _DAC6REFL_DAC6R5 0x20
10943 #define _DAC6REFL_REF6 0x40
10944 #define _DAC6REFL_DAC6REF6 0x40
10945 #define _DAC6REFL_R6 0x40
10946 #define _DAC6REFL_DAC6R6 0x40
10947 #define _DAC6REFL_REF7 0x80
10948 #define _DAC6REFL_DAC6REF7 0x80
10949 #define _DAC6REFL_R7 0x80
10950 #define _DAC6REFL_DAC6R7 0x80
10952 //==============================================================================
10955 //==============================================================================
10958 extern __at(0x059D) __sfr DAC6CON2
;
10966 unsigned REF10
: 1;
10967 unsigned REF11
: 1;
10968 unsigned REF12
: 1;
10969 unsigned REF13
: 1;
10970 unsigned REF14
: 1;
10971 unsigned REF15
: 1;
10976 unsigned DAC6REF8
: 1;
10977 unsigned DAC6REF9
: 1;
10978 unsigned DAC6REF10
: 1;
10979 unsigned DAC6REF11
: 1;
10980 unsigned DAC6REF12
: 1;
10981 unsigned DAC6REF13
: 1;
10982 unsigned DAC6REF14
: 1;
10983 unsigned DAC6REF15
: 1;
11000 unsigned DAC6R8
: 1;
11001 unsigned DAC6R9
: 1;
11002 unsigned DAC6R10
: 1;
11003 unsigned DAC6R11
: 1;
11004 unsigned DAC6R12
: 1;
11005 unsigned DAC6R13
: 1;
11006 unsigned DAC6R14
: 1;
11007 unsigned DAC6R15
: 1;
11009 } __DAC6CON2bits_t
;
11011 extern __at(0x059D) volatile __DAC6CON2bits_t DAC6CON2bits
;
11013 #define _DAC6CON2_REF8 0x01
11014 #define _DAC6CON2_DAC6REF8 0x01
11015 #define _DAC6CON2_R8 0x01
11016 #define _DAC6CON2_DAC6R8 0x01
11017 #define _DAC6CON2_REF9 0x02
11018 #define _DAC6CON2_DAC6REF9 0x02
11019 #define _DAC6CON2_R9 0x02
11020 #define _DAC6CON2_DAC6R9 0x02
11021 #define _DAC6CON2_REF10 0x04
11022 #define _DAC6CON2_DAC6REF10 0x04
11023 #define _DAC6CON2_R10 0x04
11024 #define _DAC6CON2_DAC6R10 0x04
11025 #define _DAC6CON2_REF11 0x08
11026 #define _DAC6CON2_DAC6REF11 0x08
11027 #define _DAC6CON2_R11 0x08
11028 #define _DAC6CON2_DAC6R11 0x08
11029 #define _DAC6CON2_REF12 0x10
11030 #define _DAC6CON2_DAC6REF12 0x10
11031 #define _DAC6CON2_R12 0x10
11032 #define _DAC6CON2_DAC6R12 0x10
11033 #define _DAC6CON2_REF13 0x20
11034 #define _DAC6CON2_DAC6REF13 0x20
11035 #define _DAC6CON2_R13 0x20
11036 #define _DAC6CON2_DAC6R13 0x20
11037 #define _DAC6CON2_REF14 0x40
11038 #define _DAC6CON2_DAC6REF14 0x40
11039 #define _DAC6CON2_R14 0x40
11040 #define _DAC6CON2_DAC6R14 0x40
11041 #define _DAC6CON2_REF15 0x80
11042 #define _DAC6CON2_DAC6REF15 0x80
11043 #define _DAC6CON2_R15 0x80
11044 #define _DAC6CON2_DAC6R15 0x80
11046 //==============================================================================
11049 //==============================================================================
11052 extern __at(0x059D) __sfr DAC6REFH
;
11060 unsigned REF10
: 1;
11061 unsigned REF11
: 1;
11062 unsigned REF12
: 1;
11063 unsigned REF13
: 1;
11064 unsigned REF14
: 1;
11065 unsigned REF15
: 1;
11070 unsigned DAC6REF8
: 1;
11071 unsigned DAC6REF9
: 1;
11072 unsigned DAC6REF10
: 1;
11073 unsigned DAC6REF11
: 1;
11074 unsigned DAC6REF12
: 1;
11075 unsigned DAC6REF13
: 1;
11076 unsigned DAC6REF14
: 1;
11077 unsigned DAC6REF15
: 1;
11094 unsigned DAC6R8
: 1;
11095 unsigned DAC6R9
: 1;
11096 unsigned DAC6R10
: 1;
11097 unsigned DAC6R11
: 1;
11098 unsigned DAC6R12
: 1;
11099 unsigned DAC6R13
: 1;
11100 unsigned DAC6R14
: 1;
11101 unsigned DAC6R15
: 1;
11103 } __DAC6REFHbits_t
;
11105 extern __at(0x059D) volatile __DAC6REFHbits_t DAC6REFHbits
;
11107 #define _DAC6REFH_REF8 0x01
11108 #define _DAC6REFH_DAC6REF8 0x01
11109 #define _DAC6REFH_R8 0x01
11110 #define _DAC6REFH_DAC6R8 0x01
11111 #define _DAC6REFH_REF9 0x02
11112 #define _DAC6REFH_DAC6REF9 0x02
11113 #define _DAC6REFH_R9 0x02
11114 #define _DAC6REFH_DAC6R9 0x02
11115 #define _DAC6REFH_REF10 0x04
11116 #define _DAC6REFH_DAC6REF10 0x04
11117 #define _DAC6REFH_R10 0x04
11118 #define _DAC6REFH_DAC6R10 0x04
11119 #define _DAC6REFH_REF11 0x08
11120 #define _DAC6REFH_DAC6REF11 0x08
11121 #define _DAC6REFH_R11 0x08
11122 #define _DAC6REFH_DAC6R11 0x08
11123 #define _DAC6REFH_REF12 0x10
11124 #define _DAC6REFH_DAC6REF12 0x10
11125 #define _DAC6REFH_R12 0x10
11126 #define _DAC6REFH_DAC6R12 0x10
11127 #define _DAC6REFH_REF13 0x20
11128 #define _DAC6REFH_DAC6REF13 0x20
11129 #define _DAC6REFH_R13 0x20
11130 #define _DAC6REFH_DAC6R13 0x20
11131 #define _DAC6REFH_REF14 0x40
11132 #define _DAC6REFH_DAC6REF14 0x40
11133 #define _DAC6REFH_R14 0x40
11134 #define _DAC6REFH_DAC6R14 0x40
11135 #define _DAC6REFH_REF15 0x80
11136 #define _DAC6REFH_DAC6REF15 0x80
11137 #define _DAC6REFH_R15 0x80
11138 #define _DAC6REFH_DAC6R15 0x80
11140 //==============================================================================
11143 //==============================================================================
11146 extern __at(0x059E) __sfr DAC7CON0
;
11164 unsigned DACNSS0
: 1;
11165 unsigned DACNSS1
: 1;
11166 unsigned DACPSS0
: 1;
11167 unsigned DACPSS1
: 1;
11168 unsigned DACOE2
: 1;
11169 unsigned DACOE1
: 1;
11171 unsigned DACEN
: 1;
11176 unsigned DAC7NSS0
: 1;
11177 unsigned DAC7NSS1
: 1;
11178 unsigned DAC7PSS0
: 1;
11179 unsigned DAC7PSS1
: 1;
11180 unsigned DAC7OE2
: 1;
11181 unsigned DAC7OE1
: 1;
11183 unsigned DAC7EN
: 1;
11188 unsigned DACNSS
: 2;
11200 unsigned DAC7NSS
: 2;
11207 unsigned DAC7PSS
: 2;
11221 unsigned DACPSS
: 2;
11224 } __DAC7CON0bits_t
;
11226 extern __at(0x059E) volatile __DAC7CON0bits_t DAC7CON0bits
;
11228 #define _DAC7CON0_NSS0 0x01
11229 #define _DAC7CON0_DACNSS0 0x01
11230 #define _DAC7CON0_DAC7NSS0 0x01
11231 #define _DAC7CON0_NSS1 0x02
11232 #define _DAC7CON0_DACNSS1 0x02
11233 #define _DAC7CON0_DAC7NSS1 0x02
11234 #define _DAC7CON0_PSS0 0x04
11235 #define _DAC7CON0_DACPSS0 0x04
11236 #define _DAC7CON0_DAC7PSS0 0x04
11237 #define _DAC7CON0_PSS1 0x08
11238 #define _DAC7CON0_DACPSS1 0x08
11239 #define _DAC7CON0_DAC7PSS1 0x08
11240 #define _DAC7CON0_OE2 0x10
11241 #define _DAC7CON0_DACOE2 0x10
11242 #define _DAC7CON0_DAC7OE2 0x10
11243 #define _DAC7CON0_OE1 0x20
11244 #define _DAC7CON0_DACOE1 0x20
11245 #define _DAC7CON0_DAC7OE1 0x20
11246 #define _DAC7CON0_EN 0x80
11247 #define _DAC7CON0_DACEN 0x80
11248 #define _DAC7CON0_DAC7EN 0x80
11250 //==============================================================================
11253 //==============================================================================
11256 extern __at(0x059F) __sfr DAC7CON1
;
11262 unsigned DACR0
: 1;
11263 unsigned DACR1
: 1;
11264 unsigned DACR2
: 1;
11265 unsigned DACR3
: 1;
11266 unsigned DACR4
: 1;
11286 unsigned DAC7R0
: 1;
11287 unsigned DAC7R1
: 1;
11288 unsigned DAC7R2
: 1;
11289 unsigned DAC7R3
: 1;
11290 unsigned DAC7R4
: 1;
11310 unsigned DAC7REF0
: 1;
11311 unsigned DAC7REF1
: 1;
11312 unsigned DAC7REF2
: 1;
11313 unsigned DAC7REF3
: 1;
11314 unsigned DAC7REF4
: 1;
11334 unsigned DAC7REF
: 5;
11340 unsigned DAC7R
: 5;
11349 } __DAC7CON1bits_t
;
11351 extern __at(0x059F) volatile __DAC7CON1bits_t DAC7CON1bits
;
11353 #define _DAC7CON1_DACR0 0x01
11354 #define _DAC7CON1_R0 0x01
11355 #define _DAC7CON1_DAC7R0 0x01
11356 #define _DAC7CON1_REF0 0x01
11357 #define _DAC7CON1_DAC7REF0 0x01
11358 #define _DAC7CON1_DACR1 0x02
11359 #define _DAC7CON1_R1 0x02
11360 #define _DAC7CON1_DAC7R1 0x02
11361 #define _DAC7CON1_REF1 0x02
11362 #define _DAC7CON1_DAC7REF1 0x02
11363 #define _DAC7CON1_DACR2 0x04
11364 #define _DAC7CON1_R2 0x04
11365 #define _DAC7CON1_DAC7R2 0x04
11366 #define _DAC7CON1_REF2 0x04
11367 #define _DAC7CON1_DAC7REF2 0x04
11368 #define _DAC7CON1_DACR3 0x08
11369 #define _DAC7CON1_R3 0x08
11370 #define _DAC7CON1_DAC7R3 0x08
11371 #define _DAC7CON1_REF3 0x08
11372 #define _DAC7CON1_DAC7REF3 0x08
11373 #define _DAC7CON1_DACR4 0x10
11374 #define _DAC7CON1_R4 0x10
11375 #define _DAC7CON1_DAC7R4 0x10
11376 #define _DAC7CON1_REF4 0x10
11377 #define _DAC7CON1_DAC7REF4 0x10
11379 //==============================================================================
11382 //==============================================================================
11385 extern __at(0x059F) __sfr DAC7REF
;
11391 unsigned DACR0
: 1;
11392 unsigned DACR1
: 1;
11393 unsigned DACR2
: 1;
11394 unsigned DACR3
: 1;
11395 unsigned DACR4
: 1;
11415 unsigned DAC7R0
: 1;
11416 unsigned DAC7R1
: 1;
11417 unsigned DAC7R2
: 1;
11418 unsigned DAC7R3
: 1;
11419 unsigned DAC7R4
: 1;
11439 unsigned DAC7REF0
: 1;
11440 unsigned DAC7REF1
: 1;
11441 unsigned DAC7REF2
: 1;
11442 unsigned DAC7REF3
: 1;
11443 unsigned DAC7REF4
: 1;
11451 unsigned DAC7REF
: 5;
11457 unsigned DAC7R
: 5;
11480 extern __at(0x059F) volatile __DAC7REFbits_t DAC7REFbits
;
11482 #define _DAC7REF_DACR0 0x01
11483 #define _DAC7REF_R0 0x01
11484 #define _DAC7REF_DAC7R0 0x01
11485 #define _DAC7REF_REF0 0x01
11486 #define _DAC7REF_DAC7REF0 0x01
11487 #define _DAC7REF_DACR1 0x02
11488 #define _DAC7REF_R1 0x02
11489 #define _DAC7REF_DAC7R1 0x02
11490 #define _DAC7REF_REF1 0x02
11491 #define _DAC7REF_DAC7REF1 0x02
11492 #define _DAC7REF_DACR2 0x04
11493 #define _DAC7REF_R2 0x04
11494 #define _DAC7REF_DAC7R2 0x04
11495 #define _DAC7REF_REF2 0x04
11496 #define _DAC7REF_DAC7REF2 0x04
11497 #define _DAC7REF_DACR3 0x08
11498 #define _DAC7REF_R3 0x08
11499 #define _DAC7REF_DAC7R3 0x08
11500 #define _DAC7REF_REF3 0x08
11501 #define _DAC7REF_DAC7REF3 0x08
11502 #define _DAC7REF_DACR4 0x10
11503 #define _DAC7REF_R4 0x10
11504 #define _DAC7REF_DAC7R4 0x10
11505 #define _DAC7REF_REF4 0x10
11506 #define _DAC7REF_DAC7REF4 0x10
11508 //==============================================================================
11511 //==============================================================================
11514 extern __at(0x060C) __sfr DAC8CON0
;
11532 unsigned DACNSS0
: 1;
11533 unsigned DACNSS1
: 1;
11534 unsigned DACPSS0
: 1;
11535 unsigned DACPSS1
: 1;
11536 unsigned DACOE2
: 1;
11537 unsigned DACOE1
: 1;
11539 unsigned DACEN
: 1;
11544 unsigned DAC8NSS0
: 1;
11545 unsigned DAC8NSS1
: 1;
11546 unsigned DAC8PSS0
: 1;
11547 unsigned DAC8PSS1
: 1;
11548 unsigned DAC8OE2
: 1;
11549 unsigned DAC8OE1
: 1;
11551 unsigned DAC8EN
: 1;
11556 unsigned DAC8NSS
: 2;
11562 unsigned DACNSS
: 2;
11575 unsigned DAC8PSS
: 2;
11582 unsigned DACPSS
: 2;
11592 } __DAC8CON0bits_t
;
11594 extern __at(0x060C) volatile __DAC8CON0bits_t DAC8CON0bits
;
11596 #define _DAC8CON0_NSS0 0x01
11597 #define _DAC8CON0_DACNSS0 0x01
11598 #define _DAC8CON0_DAC8NSS0 0x01
11599 #define _DAC8CON0_NSS1 0x02
11600 #define _DAC8CON0_DACNSS1 0x02
11601 #define _DAC8CON0_DAC8NSS1 0x02
11602 #define _DAC8CON0_PSS0 0x04
11603 #define _DAC8CON0_DACPSS0 0x04
11604 #define _DAC8CON0_DAC8PSS0 0x04
11605 #define _DAC8CON0_PSS1 0x08
11606 #define _DAC8CON0_DACPSS1 0x08
11607 #define _DAC8CON0_DAC8PSS1 0x08
11608 #define _DAC8CON0_OE2 0x10
11609 #define _DAC8CON0_DACOE2 0x10
11610 #define _DAC8CON0_DAC8OE2 0x10
11611 #define _DAC8CON0_OE1 0x20
11612 #define _DAC8CON0_DACOE1 0x20
11613 #define _DAC8CON0_DAC8OE1 0x20
11614 #define _DAC8CON0_EN 0x80
11615 #define _DAC8CON0_DACEN 0x80
11616 #define _DAC8CON0_DAC8EN 0x80
11618 //==============================================================================
11621 //==============================================================================
11624 extern __at(0x060D) __sfr DAC8CON1
;
11630 unsigned DACR0
: 1;
11631 unsigned DACR1
: 1;
11632 unsigned DACR2
: 1;
11633 unsigned DACR3
: 1;
11634 unsigned DACR4
: 1;
11654 unsigned DAC8R0
: 1;
11655 unsigned DAC8R1
: 1;
11656 unsigned DAC8R2
: 1;
11657 unsigned DAC8R3
: 1;
11658 unsigned DAC8R4
: 1;
11678 unsigned DAC8REF0
: 1;
11679 unsigned DAC8REF1
: 1;
11680 unsigned DAC8REF2
: 1;
11681 unsigned DAC8REF3
: 1;
11682 unsigned DAC8REF4
: 1;
11696 unsigned DAC8R
: 5;
11708 unsigned DAC8REF
: 5;
11717 } __DAC8CON1bits_t
;
11719 extern __at(0x060D) volatile __DAC8CON1bits_t DAC8CON1bits
;
11721 #define _DAC8CON1_DACR0 0x01
11722 #define _DAC8CON1_R0 0x01
11723 #define _DAC8CON1_DAC8R0 0x01
11724 #define _DAC8CON1_REF0 0x01
11725 #define _DAC8CON1_DAC8REF0 0x01
11726 #define _DAC8CON1_DACR1 0x02
11727 #define _DAC8CON1_R1 0x02
11728 #define _DAC8CON1_DAC8R1 0x02
11729 #define _DAC8CON1_REF1 0x02
11730 #define _DAC8CON1_DAC8REF1 0x02
11731 #define _DAC8CON1_DACR2 0x04
11732 #define _DAC8CON1_R2 0x04
11733 #define _DAC8CON1_DAC8R2 0x04
11734 #define _DAC8CON1_REF2 0x04
11735 #define _DAC8CON1_DAC8REF2 0x04
11736 #define _DAC8CON1_DACR3 0x08
11737 #define _DAC8CON1_R3 0x08
11738 #define _DAC8CON1_DAC8R3 0x08
11739 #define _DAC8CON1_REF3 0x08
11740 #define _DAC8CON1_DAC8REF3 0x08
11741 #define _DAC8CON1_DACR4 0x10
11742 #define _DAC8CON1_R4 0x10
11743 #define _DAC8CON1_DAC8R4 0x10
11744 #define _DAC8CON1_REF4 0x10
11745 #define _DAC8CON1_DAC8REF4 0x10
11747 //==============================================================================
11750 //==============================================================================
11753 extern __at(0x060D) __sfr DAC8REF
;
11759 unsigned DACR0
: 1;
11760 unsigned DACR1
: 1;
11761 unsigned DACR2
: 1;
11762 unsigned DACR3
: 1;
11763 unsigned DACR4
: 1;
11783 unsigned DAC8R0
: 1;
11784 unsigned DAC8R1
: 1;
11785 unsigned DAC8R2
: 1;
11786 unsigned DAC8R3
: 1;
11787 unsigned DAC8R4
: 1;
11807 unsigned DAC8REF0
: 1;
11808 unsigned DAC8REF1
: 1;
11809 unsigned DAC8REF2
: 1;
11810 unsigned DAC8REF3
: 1;
11811 unsigned DAC8REF4
: 1;
11825 unsigned DAC8REF
: 5;
11837 unsigned DAC8R
: 5;
11848 extern __at(0x060D) volatile __DAC8REFbits_t DAC8REFbits
;
11850 #define _DAC8REF_DACR0 0x01
11851 #define _DAC8REF_R0 0x01
11852 #define _DAC8REF_DAC8R0 0x01
11853 #define _DAC8REF_REF0 0x01
11854 #define _DAC8REF_DAC8REF0 0x01
11855 #define _DAC8REF_DACR1 0x02
11856 #define _DAC8REF_R1 0x02
11857 #define _DAC8REF_DAC8R1 0x02
11858 #define _DAC8REF_REF1 0x02
11859 #define _DAC8REF_DAC8REF1 0x02
11860 #define _DAC8REF_DACR2 0x04
11861 #define _DAC8REF_R2 0x04
11862 #define _DAC8REF_DAC8R2 0x04
11863 #define _DAC8REF_REF2 0x04
11864 #define _DAC8REF_DAC8REF2 0x04
11865 #define _DAC8REF_DACR3 0x08
11866 #define _DAC8REF_R3 0x08
11867 #define _DAC8REF_DAC8R3 0x08
11868 #define _DAC8REF_REF3 0x08
11869 #define _DAC8REF_DAC8REF3 0x08
11870 #define _DAC8REF_DACR4 0x10
11871 #define _DAC8REF_R4 0x10
11872 #define _DAC8REF_DAC8R4 0x10
11873 #define _DAC8REF_REF4 0x10
11874 #define _DAC8REF_DAC8REF4 0x10
11876 //==============================================================================
11879 //==============================================================================
11882 extern __at(0x060E) __sfr PRG4RTSS
;
11888 unsigned RTSS0
: 1;
11889 unsigned RTSS1
: 1;
11890 unsigned RTSS2
: 1;
11891 unsigned RTSS3
: 1;
11900 unsigned RG4RTSS0
: 1;
11901 unsigned RG4RTSS1
: 1;
11902 unsigned RG4RTSS2
: 1;
11903 unsigned RG4RTSS3
: 1;
11912 unsigned RG4RTSS
: 4;
11921 } __PRG4RTSSbits_t
;
11923 extern __at(0x060E) volatile __PRG4RTSSbits_t PRG4RTSSbits
;
11925 #define _PRG4RTSS_RTSS0 0x01
11926 #define _PRG4RTSS_RG4RTSS0 0x01
11927 #define _PRG4RTSS_RTSS1 0x02
11928 #define _PRG4RTSS_RG4RTSS1 0x02
11929 #define _PRG4RTSS_RTSS2 0x04
11930 #define _PRG4RTSS_RG4RTSS2 0x04
11931 #define _PRG4RTSS_RTSS3 0x08
11932 #define _PRG4RTSS_RG4RTSS3 0x08
11934 //==============================================================================
11937 //==============================================================================
11940 extern __at(0x060F) __sfr PRG4FTSS
;
11946 unsigned FTSS0
: 1;
11947 unsigned FTSS1
: 1;
11948 unsigned FTSS2
: 1;
11949 unsigned FTSS3
: 1;
11958 unsigned RG4FTSS0
: 1;
11959 unsigned RG4FTSS1
: 1;
11960 unsigned RG4FTSS2
: 1;
11961 unsigned RG4FTSS3
: 1;
11970 unsigned RG4FTSS
: 4;
11979 } __PRG4FTSSbits_t
;
11981 extern __at(0x060F) volatile __PRG4FTSSbits_t PRG4FTSSbits
;
11983 #define _PRG4FTSS_FTSS0 0x01
11984 #define _PRG4FTSS_RG4FTSS0 0x01
11985 #define _PRG4FTSS_FTSS1 0x02
11986 #define _PRG4FTSS_RG4FTSS1 0x02
11987 #define _PRG4FTSS_FTSS2 0x04
11988 #define _PRG4FTSS_RG4FTSS2 0x04
11989 #define _PRG4FTSS_FTSS3 0x08
11990 #define _PRG4FTSS_RG4FTSS3 0x08
11992 //==============================================================================
11995 //==============================================================================
11998 extern __at(0x0610) __sfr PRG4INS
;
12016 unsigned RG4INS0
: 1;
12017 unsigned RG4INS1
: 1;
12018 unsigned RG4INS2
: 1;
12019 unsigned RG4INS3
: 1;
12034 unsigned RG4INS
: 4;
12039 extern __at(0x0610) volatile __PRG4INSbits_t PRG4INSbits
;
12041 #define _PRG4INS_INS0 0x01
12042 #define _PRG4INS_RG4INS0 0x01
12043 #define _PRG4INS_INS1 0x02
12044 #define _PRG4INS_RG4INS1 0x02
12045 #define _PRG4INS_INS2 0x04
12046 #define _PRG4INS_RG4INS2 0x04
12047 #define _PRG4INS_INS3 0x08
12048 #define _PRG4INS_RG4INS3 0x08
12050 //==============================================================================
12053 //==============================================================================
12056 extern __at(0x0611) __sfr PRG4CON0
;
12064 unsigned MODE0
: 1;
12065 unsigned MODE1
: 1;
12074 unsigned RG4GO
: 1;
12075 unsigned RG4OS
: 1;
12076 unsigned RG4MODE0
: 1;
12077 unsigned RG4MODE1
: 1;
12078 unsigned RG4REDG
: 1;
12079 unsigned RG4FEDG
: 1;
12081 unsigned RG4EN
: 1;
12087 unsigned RG4MODE
: 2;
12097 } __PRG4CON0bits_t
;
12099 extern __at(0x0611) volatile __PRG4CON0bits_t PRG4CON0bits
;
12101 #define _PRG4CON0_GO 0x01
12102 #define _PRG4CON0_RG4GO 0x01
12103 #define _PRG4CON0_OS 0x02
12104 #define _PRG4CON0_RG4OS 0x02
12105 #define _PRG4CON0_MODE0 0x04
12106 #define _PRG4CON0_RG4MODE0 0x04
12107 #define _PRG4CON0_MODE1 0x08
12108 #define _PRG4CON0_RG4MODE1 0x08
12109 #define _PRG4CON0_REDG 0x10
12110 #define _PRG4CON0_RG4REDG 0x10
12111 #define _PRG4CON0_FEDG 0x20
12112 #define _PRG4CON0_RG4FEDG 0x20
12113 #define _PRG4CON0_EN 0x80
12114 #define _PRG4CON0_RG4EN 0x80
12116 //==============================================================================
12119 //==============================================================================
12122 extern __at(0x0612) __sfr PRG4CON1
;
12140 unsigned RG4RPOL
: 1;
12141 unsigned RG4FPOL
: 1;
12142 unsigned RG4RDY
: 1;
12149 } __PRG4CON1bits_t
;
12151 extern __at(0x0612) volatile __PRG4CON1bits_t PRG4CON1bits
;
12153 #define _PRG4CON1_RPOL 0x01
12154 #define _PRG4CON1_RG4RPOL 0x01
12155 #define _PRG4CON1_FPOL 0x02
12156 #define _PRG4CON1_RG4FPOL 0x02
12157 #define _PRG4CON1_RDY 0x04
12158 #define _PRG4CON1_RG4RDY 0x04
12160 //==============================================================================
12163 //==============================================================================
12166 extern __at(0x0613) __sfr PRG4CON2
;
12172 unsigned ISET0
: 1;
12173 unsigned ISET1
: 1;
12174 unsigned ISET2
: 1;
12175 unsigned ISET3
: 1;
12176 unsigned ISET4
: 1;
12184 unsigned RG4ISET0
: 1;
12185 unsigned RG4ISET1
: 1;
12186 unsigned RG4ISET2
: 1;
12187 unsigned RG4ISET3
: 1;
12188 unsigned RG4ISET4
: 1;
12196 unsigned RG4ISET
: 5;
12205 } __PRG4CON2bits_t
;
12207 extern __at(0x0613) volatile __PRG4CON2bits_t PRG4CON2bits
;
12209 #define _PRG4CON2_ISET0 0x01
12210 #define _PRG4CON2_RG4ISET0 0x01
12211 #define _PRG4CON2_ISET1 0x02
12212 #define _PRG4CON2_RG4ISET1 0x02
12213 #define _PRG4CON2_ISET2 0x04
12214 #define _PRG4CON2_RG4ISET2 0x04
12215 #define _PRG4CON2_ISET3 0x08
12216 #define _PRG4CON2_RG4ISET3 0x08
12217 #define _PRG4CON2_ISET4 0x10
12218 #define _PRG4CON2_RG4ISET4 0x10
12220 //==============================================================================
12223 //==============================================================================
12226 extern __at(0x0614) __sfr PWM3DCL
;
12250 unsigned PWM3DC0
: 1;
12251 unsigned PWM3DC1
: 1;
12262 unsigned PWMPW0
: 1;
12263 unsigned PWMPW1
: 1;
12269 unsigned PWMPW
: 2;
12275 unsigned PWM3DC
: 2;
12285 extern __at(0x0614) volatile __PWM3DCLbits_t PWM3DCLbits
;
12288 #define _PWM3DC0 0x40
12289 #define _PWMPW0 0x40
12291 #define _PWM3DC1 0x80
12292 #define _PWMPW1 0x80
12294 //==============================================================================
12297 //==============================================================================
12300 extern __at(0x0615) __sfr PWM3DCH
;
12318 unsigned PWM3DC2
: 1;
12319 unsigned PWM3DC3
: 1;
12320 unsigned PWM3DC4
: 1;
12321 unsigned PWM3DC5
: 1;
12322 unsigned PWM3DC6
: 1;
12323 unsigned PWM3DC7
: 1;
12324 unsigned PWM3DC8
: 1;
12325 unsigned PWM3DC9
: 1;
12330 unsigned PWMPW2
: 1;
12331 unsigned PWMPW3
: 1;
12332 unsigned PWMPW4
: 1;
12333 unsigned PWMPW5
: 1;
12334 unsigned PWMPW6
: 1;
12335 unsigned PWMPW7
: 1;
12336 unsigned PWMPW8
: 1;
12337 unsigned PWMPW9
: 1;
12341 extern __at(0x0615) volatile __PWM3DCHbits_t PWM3DCHbits
;
12344 #define _PWM3DC2 0x01
12345 #define _PWMPW2 0x01
12347 #define _PWM3DC3 0x02
12348 #define _PWMPW3 0x02
12350 #define _PWM3DC4 0x04
12351 #define _PWMPW4 0x04
12353 #define _PWM3DC5 0x08
12354 #define _PWMPW5 0x08
12356 #define _PWM3DC6 0x10
12357 #define _PWMPW6 0x10
12359 #define _PWM3DC7 0x20
12360 #define _PWMPW7 0x20
12362 #define _PWM3DC8 0x40
12363 #define _PWMPW8 0x40
12365 #define _PWM3DC9 0x80
12366 #define _PWMPW9 0x80
12368 //==============================================================================
12371 //==============================================================================
12374 extern __at(0x0616) __sfr PWM3CON
;
12396 unsigned PWM3POL
: 1;
12397 unsigned PWM3OUT
: 1;
12399 unsigned PWM3EN
: 1;
12403 extern __at(0x0616) volatile __PWM3CONbits_t PWM3CONbits
;
12405 #define _PWM3CON_POL 0x10
12406 #define _PWM3CON_PWM3POL 0x10
12407 #define _PWM3CON_OUT 0x20
12408 #define _PWM3CON_PWM3OUT 0x20
12409 #define _PWM3CON_EN 0x80
12410 #define _PWM3CON_PWM3EN 0x80
12412 //==============================================================================
12415 //==============================================================================
12418 extern __at(0x0617) __sfr PWM4DCL
;
12442 unsigned PWM4DC0
: 1;
12443 unsigned PWM4DC1
: 1;
12454 unsigned PWMPW0
: 1;
12455 unsigned PWMPW1
: 1;
12467 unsigned PWMPW
: 2;
12473 unsigned PWM4DC
: 2;
12477 extern __at(0x0617) volatile __PWM4DCLbits_t PWM4DCLbits
;
12479 #define _PWM4DCL_DC0 0x40
12480 #define _PWM4DCL_PWM4DC0 0x40
12481 #define _PWM4DCL_PWMPW0 0x40
12482 #define _PWM4DCL_DC1 0x80
12483 #define _PWM4DCL_PWM4DC1 0x80
12484 #define _PWM4DCL_PWMPW1 0x80
12486 //==============================================================================
12489 //==============================================================================
12492 extern __at(0x0618) __sfr PWM4DCH
;
12510 unsigned PWM4DC2
: 1;
12511 unsigned PWM4DC3
: 1;
12512 unsigned PWM4DC4
: 1;
12513 unsigned PWM4DC5
: 1;
12514 unsigned PWM4DC6
: 1;
12515 unsigned PWM4DC7
: 1;
12516 unsigned PWM4DC8
: 1;
12517 unsigned PWM4DC9
: 1;
12522 unsigned PWMPW2
: 1;
12523 unsigned PWMPW3
: 1;
12524 unsigned PWMPW4
: 1;
12525 unsigned PWMPW5
: 1;
12526 unsigned PWMPW6
: 1;
12527 unsigned PWMPW7
: 1;
12528 unsigned PWMPW8
: 1;
12529 unsigned PWMPW9
: 1;
12533 extern __at(0x0618) volatile __PWM4DCHbits_t PWM4DCHbits
;
12535 #define _PWM4DCH_DC2 0x01
12536 #define _PWM4DCH_PWM4DC2 0x01
12537 #define _PWM4DCH_PWMPW2 0x01
12538 #define _PWM4DCH_DC3 0x02
12539 #define _PWM4DCH_PWM4DC3 0x02
12540 #define _PWM4DCH_PWMPW3 0x02
12541 #define _PWM4DCH_DC4 0x04
12542 #define _PWM4DCH_PWM4DC4 0x04
12543 #define _PWM4DCH_PWMPW4 0x04
12544 #define _PWM4DCH_DC5 0x08
12545 #define _PWM4DCH_PWM4DC5 0x08
12546 #define _PWM4DCH_PWMPW5 0x08
12547 #define _PWM4DCH_DC6 0x10
12548 #define _PWM4DCH_PWM4DC6 0x10
12549 #define _PWM4DCH_PWMPW6 0x10
12550 #define _PWM4DCH_DC7 0x20
12551 #define _PWM4DCH_PWM4DC7 0x20
12552 #define _PWM4DCH_PWMPW7 0x20
12553 #define _PWM4DCH_DC8 0x40
12554 #define _PWM4DCH_PWM4DC8 0x40
12555 #define _PWM4DCH_PWMPW8 0x40
12556 #define _PWM4DCH_DC9 0x80
12557 #define _PWM4DCH_PWM4DC9 0x80
12558 #define _PWM4DCH_PWMPW9 0x80
12560 //==============================================================================
12563 //==============================================================================
12566 extern __at(0x0619) __sfr PWM4CON
;
12588 unsigned PWM4POL
: 1;
12589 unsigned PWM4OUT
: 1;
12591 unsigned PWM4EN
: 1;
12595 extern __at(0x0619) volatile __PWM4CONbits_t PWM4CONbits
;
12597 #define _PWM4CON_POL 0x10
12598 #define _PWM4CON_PWM4POL 0x10
12599 #define _PWM4CON_OUT 0x20
12600 #define _PWM4CON_PWM4OUT 0x20
12601 #define _PWM4CON_EN 0x80
12602 #define _PWM4CON_PWM4EN 0x80
12604 //==============================================================================
12607 //==============================================================================
12610 extern __at(0x061A) __sfr PWM9DCL
;
12634 unsigned PWM9DC0
: 1;
12635 unsigned PWM9DC1
: 1;
12646 unsigned PWMPW0
: 1;
12647 unsigned PWMPW1
: 1;
12653 unsigned PWMPW
: 2;
12659 unsigned PWM9DC
: 2;
12669 extern __at(0x061A) volatile __PWM9DCLbits_t PWM9DCLbits
;
12671 #define _PWM9DCL_DC0 0x40
12672 #define _PWM9DCL_PWM9DC0 0x40
12673 #define _PWM9DCL_PWMPW0 0x40
12674 #define _PWM9DCL_DC1 0x80
12675 #define _PWM9DCL_PWM9DC1 0x80
12676 #define _PWM9DCL_PWMPW1 0x80
12678 //==============================================================================
12681 //==============================================================================
12684 extern __at(0x061B) __sfr PWM9DCH
;
12702 unsigned PWM9DC2
: 1;
12703 unsigned PWM9DC3
: 1;
12704 unsigned PWM9DC4
: 1;
12705 unsigned PWM9DC5
: 1;
12706 unsigned PWM9DC6
: 1;
12707 unsigned PWM9DC7
: 1;
12708 unsigned PWM9DC8
: 1;
12709 unsigned PWM9DC9
: 1;
12714 unsigned PWMPW2
: 1;
12715 unsigned PWMPW3
: 1;
12716 unsigned PWMPW4
: 1;
12717 unsigned PWMPW5
: 1;
12718 unsigned PWMPW6
: 1;
12719 unsigned PWMPW7
: 1;
12720 unsigned PWMPW8
: 1;
12721 unsigned PWMPW9
: 1;
12725 extern __at(0x061B) volatile __PWM9DCHbits_t PWM9DCHbits
;
12727 #define _PWM9DCH_DC2 0x01
12728 #define _PWM9DCH_PWM9DC2 0x01
12729 #define _PWM9DCH_PWMPW2 0x01
12730 #define _PWM9DCH_DC3 0x02
12731 #define _PWM9DCH_PWM9DC3 0x02
12732 #define _PWM9DCH_PWMPW3 0x02
12733 #define _PWM9DCH_DC4 0x04
12734 #define _PWM9DCH_PWM9DC4 0x04
12735 #define _PWM9DCH_PWMPW4 0x04
12736 #define _PWM9DCH_DC5 0x08
12737 #define _PWM9DCH_PWM9DC5 0x08
12738 #define _PWM9DCH_PWMPW5 0x08
12739 #define _PWM9DCH_DC6 0x10
12740 #define _PWM9DCH_PWM9DC6 0x10
12741 #define _PWM9DCH_PWMPW6 0x10
12742 #define _PWM9DCH_DC7 0x20
12743 #define _PWM9DCH_PWM9DC7 0x20
12744 #define _PWM9DCH_PWMPW7 0x20
12745 #define _PWM9DCH_DC8 0x40
12746 #define _PWM9DCH_PWM9DC8 0x40
12747 #define _PWM9DCH_PWMPW8 0x40
12748 #define _PWM9DCH_DC9 0x80
12749 #define _PWM9DCH_PWM9DC9 0x80
12750 #define _PWM9DCH_PWMPW9 0x80
12752 //==============================================================================
12755 //==============================================================================
12758 extern __at(0x061C) __sfr PWM9CON
;
12780 unsigned PWM9POL
: 1;
12781 unsigned PWM9OUT
: 1;
12783 unsigned PWM9EN
: 1;
12787 extern __at(0x061C) volatile __PWM9CONbits_t PWM9CONbits
;
12789 #define _PWM9CON_POL 0x10
12790 #define _PWM9CON_PWM9POL 0x10
12791 #define _PWM9CON_OUT 0x20
12792 #define _PWM9CON_PWM9OUT 0x20
12793 #define _PWM9CON_EN 0x80
12794 #define _PWM9CON_PWM9EN 0x80
12796 //==============================================================================
12799 //==============================================================================
12802 extern __at(0x061D) __sfr PWM10DCL
;
12826 unsigned PWM10DC0
: 1;
12827 unsigned PWM10DC1
: 1;
12838 unsigned PWMPW0
: 1;
12839 unsigned PWMPW1
: 1;
12845 unsigned PWM10DC
: 2;
12851 unsigned PWMPW
: 2;
12859 } __PWM10DCLbits_t
;
12861 extern __at(0x061D) volatile __PWM10DCLbits_t PWM10DCLbits
;
12863 #define _PWM10DCL_DC0 0x40
12864 #define _PWM10DCL_PWM10DC0 0x40
12865 #define _PWM10DCL_PWMPW0 0x40
12866 #define _PWM10DCL_DC1 0x80
12867 #define _PWM10DCL_PWM10DC1 0x80
12868 #define _PWM10DCL_PWMPW1 0x80
12870 //==============================================================================
12873 //==============================================================================
12876 extern __at(0x061E) __sfr PWM10DCH
;
12894 unsigned PWM10DC2
: 1;
12895 unsigned PWM10DC3
: 1;
12896 unsigned PWM10DC4
: 1;
12897 unsigned PWM10DC5
: 1;
12898 unsigned PWM10DC6
: 1;
12899 unsigned PWM10DC7
: 1;
12900 unsigned PWM10DC8
: 1;
12901 unsigned PWM10DC9
: 1;
12906 unsigned PWMPW2
: 1;
12907 unsigned PWMPW3
: 1;
12908 unsigned PWMPW4
: 1;
12909 unsigned PWMPW5
: 1;
12910 unsigned PWMPW6
: 1;
12911 unsigned PWMPW7
: 1;
12912 unsigned PWMPW8
: 1;
12913 unsigned PWMPW9
: 1;
12915 } __PWM10DCHbits_t
;
12917 extern __at(0x061E) volatile __PWM10DCHbits_t PWM10DCHbits
;
12919 #define _PWM10DCH_DC2 0x01
12920 #define _PWM10DCH_PWM10DC2 0x01
12921 #define _PWM10DCH_PWMPW2 0x01
12922 #define _PWM10DCH_DC3 0x02
12923 #define _PWM10DCH_PWM10DC3 0x02
12924 #define _PWM10DCH_PWMPW3 0x02
12925 #define _PWM10DCH_DC4 0x04
12926 #define _PWM10DCH_PWM10DC4 0x04
12927 #define _PWM10DCH_PWMPW4 0x04
12928 #define _PWM10DCH_DC5 0x08
12929 #define _PWM10DCH_PWM10DC5 0x08
12930 #define _PWM10DCH_PWMPW5 0x08
12931 #define _PWM10DCH_DC6 0x10
12932 #define _PWM10DCH_PWM10DC6 0x10
12933 #define _PWM10DCH_PWMPW6 0x10
12934 #define _PWM10DCH_DC7 0x20
12935 #define _PWM10DCH_PWM10DC7 0x20
12936 #define _PWM10DCH_PWMPW7 0x20
12937 #define _PWM10DCH_DC8 0x40
12938 #define _PWM10DCH_PWM10DC8 0x40
12939 #define _PWM10DCH_PWMPW8 0x40
12940 #define _PWM10DCH_DC9 0x80
12941 #define _PWM10DCH_PWM10DC9 0x80
12942 #define _PWM10DCH_PWMPW9 0x80
12944 //==============================================================================
12947 //==============================================================================
12950 extern __at(0x061F) __sfr PWM10CON
;
12972 unsigned PWM10POL
: 1;
12973 unsigned PWM10OUT
: 1;
12975 unsigned PWM10EN
: 1;
12977 } __PWM10CONbits_t
;
12979 extern __at(0x061F) volatile __PWM10CONbits_t PWM10CONbits
;
12981 #define _PWM10CON_POL 0x10
12982 #define _PWM10CON_PWM10POL 0x10
12983 #define _PWM10CON_OUT 0x20
12984 #define _PWM10CON_PWM10OUT 0x20
12985 #define _PWM10CON_EN 0x80
12986 #define _PWM10CON_PWM10EN 0x80
12988 //==============================================================================
12991 //==============================================================================
12994 extern __at(0x068D) __sfr COG1PHR
;
13012 unsigned G1PHR0
: 1;
13013 unsigned G1PHR1
: 1;
13014 unsigned G1PHR2
: 1;
13015 unsigned G1PHR3
: 1;
13016 unsigned G1PHR4
: 1;
13017 unsigned G1PHR5
: 1;
13030 unsigned G1PHR
: 6;
13035 extern __at(0x068D) volatile __COG1PHRbits_t COG1PHRbits
;
13038 #define _G1PHR0 0x01
13040 #define _G1PHR1 0x02
13042 #define _G1PHR2 0x04
13044 #define _G1PHR3 0x08
13046 #define _G1PHR4 0x10
13048 #define _G1PHR5 0x20
13050 //==============================================================================
13053 //==============================================================================
13056 extern __at(0x068E) __sfr COG1PHF
;
13074 unsigned G1PHF0
: 1;
13075 unsigned G1PHF1
: 1;
13076 unsigned G1PHF2
: 1;
13077 unsigned G1PHF3
: 1;
13078 unsigned G1PHF4
: 1;
13079 unsigned G1PHF5
: 1;
13086 unsigned G1PHF
: 6;
13097 extern __at(0x068E) volatile __COG1PHFbits_t COG1PHFbits
;
13100 #define _G1PHF0 0x01
13102 #define _G1PHF1 0x02
13104 #define _G1PHF2 0x04
13106 #define _G1PHF3 0x08
13108 #define _G1PHF4 0x10
13110 #define _G1PHF5 0x20
13112 //==============================================================================
13115 //==============================================================================
13118 extern __at(0x068F) __sfr COG1BLKR
;
13124 unsigned BLKR0
: 1;
13125 unsigned BLKR1
: 1;
13126 unsigned BLKR2
: 1;
13127 unsigned BLKR3
: 1;
13128 unsigned BLKR4
: 1;
13129 unsigned BLKR5
: 1;
13136 unsigned G1BLKR0
: 1;
13137 unsigned G1BLKR1
: 1;
13138 unsigned G1BLKR2
: 1;
13139 unsigned G1BLKR3
: 1;
13140 unsigned G1BLKR4
: 1;
13141 unsigned G1BLKR5
: 1;
13154 unsigned G1BLKR
: 6;
13157 } __COG1BLKRbits_t
;
13159 extern __at(0x068F) volatile __COG1BLKRbits_t COG1BLKRbits
;
13161 #define _BLKR0 0x01
13162 #define _G1BLKR0 0x01
13163 #define _BLKR1 0x02
13164 #define _G1BLKR1 0x02
13165 #define _BLKR2 0x04
13166 #define _G1BLKR2 0x04
13167 #define _BLKR3 0x08
13168 #define _G1BLKR3 0x08
13169 #define _BLKR4 0x10
13170 #define _G1BLKR4 0x10
13171 #define _BLKR5 0x20
13172 #define _G1BLKR5 0x20
13174 //==============================================================================
13177 //==============================================================================
13180 extern __at(0x0690) __sfr COG1BLKF
;
13186 unsigned BLKF0
: 1;
13187 unsigned BLKF1
: 1;
13188 unsigned BLKF2
: 1;
13189 unsigned BLKF3
: 1;
13190 unsigned BLKF4
: 1;
13191 unsigned BLKF5
: 1;
13198 unsigned G1BLKF0
: 1;
13199 unsigned G1BLKF1
: 1;
13200 unsigned G1BLKF2
: 1;
13201 unsigned G1BLKF3
: 1;
13202 unsigned G1BLKF4
: 1;
13203 unsigned G1BLKF5
: 1;
13216 unsigned G1BLKF
: 6;
13219 } __COG1BLKFbits_t
;
13221 extern __at(0x0690) volatile __COG1BLKFbits_t COG1BLKFbits
;
13223 #define _BLKF0 0x01
13224 #define _G1BLKF0 0x01
13225 #define _BLKF1 0x02
13226 #define _G1BLKF1 0x02
13227 #define _BLKF2 0x04
13228 #define _G1BLKF2 0x04
13229 #define _BLKF3 0x08
13230 #define _G1BLKF3 0x08
13231 #define _BLKF4 0x10
13232 #define _G1BLKF4 0x10
13233 #define _BLKF5 0x20
13234 #define _G1BLKF5 0x20
13236 //==============================================================================
13239 //==============================================================================
13242 extern __at(0x0691) __sfr COG1DBR
;
13260 unsigned G1DBR0
: 1;
13261 unsigned G1DBR1
: 1;
13262 unsigned G1DBR2
: 1;
13263 unsigned G1DBR3
: 1;
13264 unsigned G1DBR4
: 1;
13265 unsigned G1DBR5
: 1;
13272 unsigned G1DBR
: 6;
13283 extern __at(0x0691) volatile __COG1DBRbits_t COG1DBRbits
;
13286 #define _G1DBR0 0x01
13288 #define _G1DBR1 0x02
13290 #define _G1DBR2 0x04
13292 #define _G1DBR3 0x08
13294 #define _G1DBR4 0x10
13296 #define _G1DBR5 0x20
13298 //==============================================================================
13301 //==============================================================================
13304 extern __at(0x0692) __sfr COG1DBF
;
13322 unsigned G1DBF0
: 1;
13323 unsigned G1DBF1
: 1;
13324 unsigned G1DBF2
: 1;
13325 unsigned G1DBF3
: 1;
13326 unsigned G1DBF4
: 1;
13327 unsigned G1DBF5
: 1;
13334 unsigned G1DBF
: 6;
13345 extern __at(0x0692) volatile __COG1DBFbits_t COG1DBFbits
;
13348 #define _G1DBF0 0x01
13350 #define _G1DBF1 0x02
13352 #define _G1DBF2 0x04
13354 #define _G1DBF3 0x08
13356 #define _G1DBF4 0x10
13358 #define _G1DBF5 0x20
13360 //==============================================================================
13363 //==============================================================================
13366 extern __at(0x0693) __sfr COG1CON0
;
13384 unsigned G1MD0
: 1;
13385 unsigned G1MD1
: 1;
13386 unsigned G1MD2
: 1;
13387 unsigned G1CS0
: 1;
13388 unsigned G1CS1
: 1;
13419 } __COG1CON0bits_t
;
13421 extern __at(0x0693) volatile __COG1CON0bits_t COG1CON0bits
;
13423 #define _COG1CON0_MD0 0x01
13424 #define _COG1CON0_G1MD0 0x01
13425 #define _COG1CON0_MD1 0x02
13426 #define _COG1CON0_G1MD1 0x02
13427 #define _COG1CON0_MD2 0x04
13428 #define _COG1CON0_G1MD2 0x04
13429 #define _COG1CON0_CS0 0x08
13430 #define _COG1CON0_G1CS0 0x08
13431 #define _COG1CON0_CS1 0x10
13432 #define _COG1CON0_G1CS1 0x10
13433 #define _COG1CON0_LD 0x40
13434 #define _COG1CON0_G1LD 0x40
13435 #define _COG1CON0_EN 0x80
13436 #define _COG1CON0_G1EN 0x80
13438 //==============================================================================
13441 //==============================================================================
13444 extern __at(0x0694) __sfr COG1CON1
;
13462 unsigned G1POLA
: 1;
13463 unsigned G1POLB
: 1;
13464 unsigned G1POLC
: 1;
13465 unsigned G1POLD
: 1;
13468 unsigned G1FDBS
: 1;
13469 unsigned G1RDBS
: 1;
13471 } __COG1CON1bits_t
;
13473 extern __at(0x0694) volatile __COG1CON1bits_t COG1CON1bits
;
13476 #define _G1POLA 0x01
13478 #define _G1POLB 0x02
13480 #define _G1POLC 0x04
13482 #define _G1POLD 0x08
13484 #define _G1FDBS 0x40
13486 #define _G1RDBS 0x80
13488 //==============================================================================
13491 //==============================================================================
13494 extern __at(0x0695) __sfr COG1RIS0
;
13512 unsigned G1RIS0
: 1;
13513 unsigned G1RIS1
: 1;
13514 unsigned G1RIS2
: 1;
13515 unsigned G1RIS3
: 1;
13516 unsigned G1RIS4
: 1;
13517 unsigned G1RIS5
: 1;
13518 unsigned G1RIS6
: 1;
13519 unsigned G1RIS7
: 1;
13521 } __COG1RIS0bits_t
;
13523 extern __at(0x0695) volatile __COG1RIS0bits_t COG1RIS0bits
;
13526 #define _G1RIS0 0x01
13528 #define _G1RIS1 0x02
13530 #define _G1RIS2 0x04
13532 #define _G1RIS3 0x08
13534 #define _G1RIS4 0x10
13536 #define _G1RIS5 0x20
13538 #define _G1RIS6 0x40
13540 #define _G1RIS7 0x80
13542 //==============================================================================
13545 //==============================================================================
13548 extern __at(0x0696) __sfr COG1RIS1
;
13556 unsigned RIS10
: 1;
13557 unsigned RIS11
: 1;
13558 unsigned RIS12
: 1;
13559 unsigned RIS13
: 1;
13560 unsigned RIS14
: 1;
13561 unsigned RIS15
: 1;
13566 unsigned G1RIS8
: 1;
13567 unsigned G1RIS9
: 1;
13568 unsigned G1RIS10
: 1;
13569 unsigned G1RIS11
: 1;
13570 unsigned G1RIS12
: 1;
13571 unsigned G1RIS13
: 1;
13572 unsigned G1RIS14
: 1;
13573 unsigned G1RIS15
: 1;
13575 } __COG1RIS1bits_t
;
13577 extern __at(0x0696) volatile __COG1RIS1bits_t COG1RIS1bits
;
13580 #define _G1RIS8 0x01
13582 #define _G1RIS9 0x02
13583 #define _RIS10 0x04
13584 #define _G1RIS10 0x04
13585 #define _RIS11 0x08
13586 #define _G1RIS11 0x08
13587 #define _RIS12 0x10
13588 #define _G1RIS12 0x10
13589 #define _RIS13 0x20
13590 #define _G1RIS13 0x20
13591 #define _RIS14 0x40
13592 #define _G1RIS14 0x40
13593 #define _RIS15 0x80
13594 #define _G1RIS15 0x80
13596 //==============================================================================
13599 //==============================================================================
13602 extern __at(0x0697) __sfr COG1RSIM0
;
13608 unsigned RSIM0
: 1;
13609 unsigned RSIM1
: 1;
13610 unsigned RSIM2
: 1;
13611 unsigned RSIM3
: 1;
13612 unsigned RSIM4
: 1;
13613 unsigned RSIM5
: 1;
13614 unsigned RSIM6
: 1;
13615 unsigned RSIM7
: 1;
13620 unsigned G1RSIM0
: 1;
13621 unsigned G1RSIM1
: 1;
13622 unsigned G1RSIM2
: 1;
13623 unsigned G1RSIM3
: 1;
13624 unsigned G1RSIM4
: 1;
13625 unsigned G1RSIM5
: 1;
13626 unsigned G1RSIM6
: 1;
13627 unsigned G1RSIM7
: 1;
13629 } __COG1RSIM0bits_t
;
13631 extern __at(0x0697) volatile __COG1RSIM0bits_t COG1RSIM0bits
;
13633 #define _RSIM0 0x01
13634 #define _G1RSIM0 0x01
13635 #define _RSIM1 0x02
13636 #define _G1RSIM1 0x02
13637 #define _RSIM2 0x04
13638 #define _G1RSIM2 0x04
13639 #define _RSIM3 0x08
13640 #define _G1RSIM3 0x08
13641 #define _RSIM4 0x10
13642 #define _G1RSIM4 0x10
13643 #define _RSIM5 0x20
13644 #define _G1RSIM5 0x20
13645 #define _RSIM6 0x40
13646 #define _G1RSIM6 0x40
13647 #define _RSIM7 0x80
13648 #define _G1RSIM7 0x80
13650 //==============================================================================
13653 //==============================================================================
13656 extern __at(0x0698) __sfr COG1RSIM1
;
13662 unsigned RSIM8
: 1;
13663 unsigned RSIM9
: 1;
13664 unsigned RSIM10
: 1;
13665 unsigned RSIM11
: 1;
13666 unsigned RSIM12
: 1;
13667 unsigned RSIM13
: 1;
13668 unsigned RSIM14
: 1;
13669 unsigned RSIM15
: 1;
13674 unsigned G1RSIM8
: 1;
13675 unsigned G1RSIM9
: 1;
13676 unsigned G1RSIM10
: 1;
13677 unsigned G1RSIM11
: 1;
13678 unsigned G1RSIM12
: 1;
13679 unsigned G1RSIM13
: 1;
13680 unsigned G1RSIM14
: 1;
13681 unsigned G1RSIM15
: 1;
13683 } __COG1RSIM1bits_t
;
13685 extern __at(0x0698) volatile __COG1RSIM1bits_t COG1RSIM1bits
;
13687 #define _RSIM8 0x01
13688 #define _G1RSIM8 0x01
13689 #define _RSIM9 0x02
13690 #define _G1RSIM9 0x02
13691 #define _RSIM10 0x04
13692 #define _G1RSIM10 0x04
13693 #define _RSIM11 0x08
13694 #define _G1RSIM11 0x08
13695 #define _RSIM12 0x10
13696 #define _G1RSIM12 0x10
13697 #define _RSIM13 0x20
13698 #define _G1RSIM13 0x20
13699 #define _RSIM14 0x40
13700 #define _G1RSIM14 0x40
13701 #define _RSIM15 0x80
13702 #define _G1RSIM15 0x80
13704 //==============================================================================
13707 //==============================================================================
13710 extern __at(0x0699) __sfr COG1FIS0
;
13728 unsigned G1FIS0
: 1;
13729 unsigned G1FIS1
: 1;
13730 unsigned G1FIS2
: 1;
13731 unsigned G1FIS3
: 1;
13732 unsigned G1FIS4
: 1;
13733 unsigned G1FIS5
: 1;
13734 unsigned G1FIS6
: 1;
13735 unsigned G1FIS7
: 1;
13737 } __COG1FIS0bits_t
;
13739 extern __at(0x0699) volatile __COG1FIS0bits_t COG1FIS0bits
;
13742 #define _G1FIS0 0x01
13744 #define _G1FIS1 0x02
13746 #define _G1FIS2 0x04
13748 #define _G1FIS3 0x08
13750 #define _G1FIS4 0x10
13752 #define _G1FIS5 0x20
13754 #define _G1FIS6 0x40
13756 #define _G1FIS7 0x80
13758 //==============================================================================
13761 //==============================================================================
13764 extern __at(0x069A) __sfr COG1FIS1
;
13772 unsigned FIS10
: 1;
13773 unsigned FIS11
: 1;
13774 unsigned FIS12
: 1;
13775 unsigned FIS13
: 1;
13776 unsigned FIS14
: 1;
13777 unsigned FIS15
: 1;
13782 unsigned G1FIS8
: 1;
13783 unsigned G1FIS9
: 1;
13784 unsigned G1FIS10
: 1;
13785 unsigned G1FIS11
: 1;
13786 unsigned G1FIS12
: 1;
13787 unsigned G1FIS13
: 1;
13788 unsigned G1FIS14
: 1;
13789 unsigned G1FIS15
: 1;
13791 } __COG1FIS1bits_t
;
13793 extern __at(0x069A) volatile __COG1FIS1bits_t COG1FIS1bits
;
13796 #define _G1FIS8 0x01
13798 #define _G1FIS9 0x02
13799 #define _FIS10 0x04
13800 #define _G1FIS10 0x04
13801 #define _FIS11 0x08
13802 #define _G1FIS11 0x08
13803 #define _FIS12 0x10
13804 #define _G1FIS12 0x10
13805 #define _FIS13 0x20
13806 #define _G1FIS13 0x20
13807 #define _FIS14 0x40
13808 #define _G1FIS14 0x40
13809 #define _FIS15 0x80
13810 #define _G1FIS15 0x80
13812 //==============================================================================
13815 //==============================================================================
13818 extern __at(0x069B) __sfr COG1FSIM0
;
13824 unsigned FSIM0
: 1;
13825 unsigned FSIM1
: 1;
13826 unsigned FSIM2
: 1;
13827 unsigned FSIM3
: 1;
13828 unsigned FSIM4
: 1;
13829 unsigned FSIM5
: 1;
13830 unsigned FSIM6
: 1;
13831 unsigned FSIM7
: 1;
13836 unsigned G1FSIM0
: 1;
13837 unsigned G1FSIM1
: 1;
13838 unsigned G1FSIM2
: 1;
13839 unsigned G1FSIM3
: 1;
13840 unsigned G1FSIM4
: 1;
13841 unsigned G1FSIM5
: 1;
13842 unsigned G1FSIM6
: 1;
13843 unsigned G1FSIM7
: 1;
13845 } __COG1FSIM0bits_t
;
13847 extern __at(0x069B) volatile __COG1FSIM0bits_t COG1FSIM0bits
;
13849 #define _FSIM0 0x01
13850 #define _G1FSIM0 0x01
13851 #define _FSIM1 0x02
13852 #define _G1FSIM1 0x02
13853 #define _FSIM2 0x04
13854 #define _G1FSIM2 0x04
13855 #define _FSIM3 0x08
13856 #define _G1FSIM3 0x08
13857 #define _FSIM4 0x10
13858 #define _G1FSIM4 0x10
13859 #define _FSIM5 0x20
13860 #define _G1FSIM5 0x20
13861 #define _FSIM6 0x40
13862 #define _G1FSIM6 0x40
13863 #define _FSIM7 0x80
13864 #define _G1FSIM7 0x80
13866 //==============================================================================
13869 //==============================================================================
13872 extern __at(0x069C) __sfr COG1FSIM1
;
13878 unsigned FSIM8
: 1;
13879 unsigned FSIM9
: 1;
13880 unsigned FSIM10
: 1;
13881 unsigned FSIM11
: 1;
13882 unsigned FSIM12
: 1;
13883 unsigned FSIM13
: 1;
13884 unsigned FSIM14
: 1;
13885 unsigned FSIM15
: 1;
13890 unsigned G1FSIM8
: 1;
13891 unsigned G1FSIM9
: 1;
13892 unsigned G1FSIM10
: 1;
13893 unsigned G1FSIM11
: 1;
13894 unsigned G1FSIM12
: 1;
13895 unsigned G1FSIM13
: 1;
13896 unsigned G1FSIM14
: 1;
13897 unsigned G1FSIM15
: 1;
13899 } __COG1FSIM1bits_t
;
13901 extern __at(0x069C) volatile __COG1FSIM1bits_t COG1FSIM1bits
;
13903 #define _FSIM8 0x01
13904 #define _G1FSIM8 0x01
13905 #define _FSIM9 0x02
13906 #define _G1FSIM9 0x02
13907 #define _FSIM10 0x04
13908 #define _G1FSIM10 0x04
13909 #define _FSIM11 0x08
13910 #define _G1FSIM11 0x08
13911 #define _FSIM12 0x10
13912 #define _G1FSIM12 0x10
13913 #define _FSIM13 0x20
13914 #define _G1FSIM13 0x20
13915 #define _FSIM14 0x40
13916 #define _G1FSIM14 0x40
13917 #define _FSIM15 0x80
13918 #define _G1FSIM15 0x80
13920 //==============================================================================
13923 //==============================================================================
13926 extern __at(0x069D) __sfr COG1ASD0
;
13934 unsigned ASDAC0
: 1;
13935 unsigned ASDAC1
: 1;
13936 unsigned ASDBD0
: 1;
13937 unsigned ASDBD1
: 1;
13938 unsigned ASREN
: 1;
13946 unsigned G1ASDAC0
: 1;
13947 unsigned G1ASDAC1
: 1;
13948 unsigned G1ASDBD0
: 1;
13949 unsigned G1ASDBD1
: 1;
13950 unsigned ARSEN
: 1;
13951 unsigned G1ASE
: 1;
13962 unsigned G1ARSEN
: 1;
13974 unsigned G1ASREN
: 1;
13981 unsigned ASDAC
: 2;
13988 unsigned G1ASDAC
: 2;
13995 unsigned ASDBD
: 2;
14002 unsigned G1ASDBD
: 2;
14005 } __COG1ASD0bits_t
;
14007 extern __at(0x069D) volatile __COG1ASD0bits_t COG1ASD0bits
;
14009 #define _ASDAC0 0x04
14010 #define _G1ASDAC0 0x04
14011 #define _ASDAC1 0x08
14012 #define _G1ASDAC1 0x08
14013 #define _ASDBD0 0x10
14014 #define _G1ASDBD0 0x10
14015 #define _ASDBD1 0x20
14016 #define _G1ASDBD1 0x20
14017 #define _ASREN 0x40
14018 #define _ARSEN 0x40
14019 #define _G1ARSEN 0x40
14020 #define _G1ASREN 0x40
14022 #define _G1ASE 0x80
14024 //==============================================================================
14027 //==============================================================================
14030 extern __at(0x069E) __sfr COG1ASD1
;
14048 unsigned G1AS0E
: 1;
14049 unsigned G1AS1E
: 1;
14050 unsigned G1AS2E
: 1;
14051 unsigned G1AS3E
: 1;
14052 unsigned G1AS4E
: 1;
14053 unsigned G1AS5E
: 1;
14054 unsigned G1AS6E
: 1;
14055 unsigned G1AS7E
: 1;
14057 } __COG1ASD1bits_t
;
14059 extern __at(0x069E) volatile __COG1ASD1bits_t COG1ASD1bits
;
14062 #define _G1AS0E 0x01
14064 #define _G1AS1E 0x02
14066 #define _G1AS2E 0x04
14068 #define _G1AS3E 0x08
14070 #define _G1AS4E 0x10
14072 #define _G1AS5E 0x20
14074 #define _G1AS6E 0x40
14076 #define _G1AS7E 0x80
14078 //==============================================================================
14081 //==============================================================================
14084 extern __at(0x069F) __sfr COG1STR
;
14094 unsigned SDATA
: 1;
14095 unsigned SDATB
: 1;
14096 unsigned SDATC
: 1;
14097 unsigned SDATD
: 1;
14102 unsigned G1STRA
: 1;
14103 unsigned G1STRB
: 1;
14104 unsigned G1STRC
: 1;
14105 unsigned G1STRD
: 1;
14106 unsigned G1SDATA
: 1;
14107 unsigned G1SDATB
: 1;
14108 unsigned G1SDATC
: 1;
14109 unsigned G1SDATD
: 1;
14113 extern __at(0x069F) volatile __COG1STRbits_t COG1STRbits
;
14116 #define _G1STRA 0x01
14118 #define _G1STRB 0x02
14120 #define _G1STRC 0x04
14122 #define _G1STRD 0x08
14123 #define _SDATA 0x10
14124 #define _G1SDATA 0x10
14125 #define _SDATB 0x20
14126 #define _G1SDATB 0x20
14127 #define _SDATC 0x40
14128 #define _G1SDATC 0x40
14129 #define _SDATD 0x80
14130 #define _G1SDATD 0x80
14132 //==============================================================================
14135 //==============================================================================
14138 extern __at(0x070D) __sfr COG2PHR
;
14156 unsigned G2PHR0
: 1;
14157 unsigned G2PHR1
: 1;
14158 unsigned G2PHR2
: 1;
14159 unsigned G2PHR3
: 1;
14160 unsigned G2PHR4
: 1;
14161 unsigned G2PHR5
: 1;
14174 unsigned G2PHR
: 6;
14179 extern __at(0x070D) volatile __COG2PHRbits_t COG2PHRbits
;
14181 #define _COG2PHR_PHR0 0x01
14182 #define _COG2PHR_G2PHR0 0x01
14183 #define _COG2PHR_PHR1 0x02
14184 #define _COG2PHR_G2PHR1 0x02
14185 #define _COG2PHR_PHR2 0x04
14186 #define _COG2PHR_G2PHR2 0x04
14187 #define _COG2PHR_PHR3 0x08
14188 #define _COG2PHR_G2PHR3 0x08
14189 #define _COG2PHR_PHR4 0x10
14190 #define _COG2PHR_G2PHR4 0x10
14191 #define _COG2PHR_PHR5 0x20
14192 #define _COG2PHR_G2PHR5 0x20
14194 //==============================================================================
14197 //==============================================================================
14200 extern __at(0x070E) __sfr COG2PHF
;
14218 unsigned G2PHF0
: 1;
14219 unsigned G2PHF1
: 1;
14220 unsigned G2PHF2
: 1;
14221 unsigned G2PHF3
: 1;
14222 unsigned G2PHF4
: 1;
14223 unsigned G2PHF5
: 1;
14230 unsigned G2PHF
: 6;
14241 extern __at(0x070E) volatile __COG2PHFbits_t COG2PHFbits
;
14243 #define _COG2PHF_PHF0 0x01
14244 #define _COG2PHF_G2PHF0 0x01
14245 #define _COG2PHF_PHF1 0x02
14246 #define _COG2PHF_G2PHF1 0x02
14247 #define _COG2PHF_PHF2 0x04
14248 #define _COG2PHF_G2PHF2 0x04
14249 #define _COG2PHF_PHF3 0x08
14250 #define _COG2PHF_G2PHF3 0x08
14251 #define _COG2PHF_PHF4 0x10
14252 #define _COG2PHF_G2PHF4 0x10
14253 #define _COG2PHF_PHF5 0x20
14254 #define _COG2PHF_G2PHF5 0x20
14256 //==============================================================================
14259 //==============================================================================
14262 extern __at(0x070F) __sfr COG2BLKR
;
14268 unsigned BLKR0
: 1;
14269 unsigned BLKR1
: 1;
14270 unsigned BLKR2
: 1;
14271 unsigned BLKR3
: 1;
14272 unsigned BLKR4
: 1;
14273 unsigned BLKR5
: 1;
14280 unsigned G2BLKR0
: 1;
14281 unsigned G2BLKR1
: 1;
14282 unsigned G2BLKR2
: 1;
14283 unsigned G2BLKR3
: 1;
14284 unsigned G2BLKR4
: 1;
14285 unsigned G2BLKR5
: 1;
14298 unsigned G2BLKR
: 6;
14301 } __COG2BLKRbits_t
;
14303 extern __at(0x070F) volatile __COG2BLKRbits_t COG2BLKRbits
;
14305 #define _COG2BLKR_BLKR0 0x01
14306 #define _COG2BLKR_G2BLKR0 0x01
14307 #define _COG2BLKR_BLKR1 0x02
14308 #define _COG2BLKR_G2BLKR1 0x02
14309 #define _COG2BLKR_BLKR2 0x04
14310 #define _COG2BLKR_G2BLKR2 0x04
14311 #define _COG2BLKR_BLKR3 0x08
14312 #define _COG2BLKR_G2BLKR3 0x08
14313 #define _COG2BLKR_BLKR4 0x10
14314 #define _COG2BLKR_G2BLKR4 0x10
14315 #define _COG2BLKR_BLKR5 0x20
14316 #define _COG2BLKR_G2BLKR5 0x20
14318 //==============================================================================
14321 //==============================================================================
14324 extern __at(0x0710) __sfr COG2BLKF
;
14330 unsigned BLKF0
: 1;
14331 unsigned BLKF1
: 1;
14332 unsigned BLKF2
: 1;
14333 unsigned BLKF3
: 1;
14334 unsigned BLKF4
: 1;
14335 unsigned BLKF5
: 1;
14342 unsigned G2BLKF0
: 1;
14343 unsigned G2BLKF1
: 1;
14344 unsigned G2BLKF2
: 1;
14345 unsigned G2BLKF3
: 1;
14346 unsigned G2BLKF4
: 1;
14347 unsigned G2BLKF5
: 1;
14354 unsigned G2BLKF
: 6;
14363 } __COG2BLKFbits_t
;
14365 extern __at(0x0710) volatile __COG2BLKFbits_t COG2BLKFbits
;
14367 #define _COG2BLKF_BLKF0 0x01
14368 #define _COG2BLKF_G2BLKF0 0x01
14369 #define _COG2BLKF_BLKF1 0x02
14370 #define _COG2BLKF_G2BLKF1 0x02
14371 #define _COG2BLKF_BLKF2 0x04
14372 #define _COG2BLKF_G2BLKF2 0x04
14373 #define _COG2BLKF_BLKF3 0x08
14374 #define _COG2BLKF_G2BLKF3 0x08
14375 #define _COG2BLKF_BLKF4 0x10
14376 #define _COG2BLKF_G2BLKF4 0x10
14377 #define _COG2BLKF_BLKF5 0x20
14378 #define _COG2BLKF_G2BLKF5 0x20
14380 //==============================================================================
14383 //==============================================================================
14386 extern __at(0x0711) __sfr COG2DBR
;
14404 unsigned G2DBR0
: 1;
14405 unsigned G2DBR1
: 1;
14406 unsigned G2DBR2
: 1;
14407 unsigned G2DBR3
: 1;
14408 unsigned G2DBR4
: 1;
14409 unsigned G2DBR5
: 1;
14416 unsigned G2DBR
: 6;
14427 extern __at(0x0711) volatile __COG2DBRbits_t COG2DBRbits
;
14429 #define _COG2DBR_DBR0 0x01
14430 #define _COG2DBR_G2DBR0 0x01
14431 #define _COG2DBR_DBR1 0x02
14432 #define _COG2DBR_G2DBR1 0x02
14433 #define _COG2DBR_DBR2 0x04
14434 #define _COG2DBR_G2DBR2 0x04
14435 #define _COG2DBR_DBR3 0x08
14436 #define _COG2DBR_G2DBR3 0x08
14437 #define _COG2DBR_DBR4 0x10
14438 #define _COG2DBR_G2DBR4 0x10
14439 #define _COG2DBR_DBR5 0x20
14440 #define _COG2DBR_G2DBR5 0x20
14442 //==============================================================================
14445 //==============================================================================
14448 extern __at(0x0712) __sfr COG2DBF
;
14466 unsigned G2DBF0
: 1;
14467 unsigned G2DBF1
: 1;
14468 unsigned G2DBF2
: 1;
14469 unsigned G2DBF3
: 1;
14470 unsigned G2DBF4
: 1;
14471 unsigned G2DBF5
: 1;
14478 unsigned G2DBF
: 6;
14489 extern __at(0x0712) volatile __COG2DBFbits_t COG2DBFbits
;
14491 #define _COG2DBF_DBF0 0x01
14492 #define _COG2DBF_G2DBF0 0x01
14493 #define _COG2DBF_DBF1 0x02
14494 #define _COG2DBF_G2DBF1 0x02
14495 #define _COG2DBF_DBF2 0x04
14496 #define _COG2DBF_G2DBF2 0x04
14497 #define _COG2DBF_DBF3 0x08
14498 #define _COG2DBF_G2DBF3 0x08
14499 #define _COG2DBF_DBF4 0x10
14500 #define _COG2DBF_G2DBF4 0x10
14501 #define _COG2DBF_DBF5 0x20
14502 #define _COG2DBF_G2DBF5 0x20
14504 //==============================================================================
14507 //==============================================================================
14510 extern __at(0x0713) __sfr COG2CON0
;
14528 unsigned G2MD0
: 1;
14529 unsigned G2MD1
: 1;
14530 unsigned G2MD2
: 1;
14531 unsigned G2CS0
: 1;
14532 unsigned G2CS1
: 1;
14563 } __COG2CON0bits_t
;
14565 extern __at(0x0713) volatile __COG2CON0bits_t COG2CON0bits
;
14567 #define _COG2CON0_MD0 0x01
14568 #define _COG2CON0_G2MD0 0x01
14569 #define _COG2CON0_MD1 0x02
14570 #define _COG2CON0_G2MD1 0x02
14571 #define _COG2CON0_MD2 0x04
14572 #define _COG2CON0_G2MD2 0x04
14573 #define _COG2CON0_CS0 0x08
14574 #define _COG2CON0_G2CS0 0x08
14575 #define _COG2CON0_CS1 0x10
14576 #define _COG2CON0_G2CS1 0x10
14577 #define _COG2CON0_LD 0x40
14578 #define _COG2CON0_G2LD 0x40
14579 #define _COG2CON0_EN 0x80
14580 #define _COG2CON0_G2EN 0x80
14582 //==============================================================================
14585 //==============================================================================
14588 extern __at(0x0714) __sfr COG2CON1
;
14606 unsigned G2POLA
: 1;
14607 unsigned G2POLB
: 1;
14608 unsigned G2POLC
: 1;
14609 unsigned G2POLD
: 1;
14612 unsigned G2FDBS
: 1;
14613 unsigned G2RDBS
: 1;
14615 } __COG2CON1bits_t
;
14617 extern __at(0x0714) volatile __COG2CON1bits_t COG2CON1bits
;
14619 #define _COG2CON1_POLA 0x01
14620 #define _COG2CON1_G2POLA 0x01
14621 #define _COG2CON1_POLB 0x02
14622 #define _COG2CON1_G2POLB 0x02
14623 #define _COG2CON1_POLC 0x04
14624 #define _COG2CON1_G2POLC 0x04
14625 #define _COG2CON1_POLD 0x08
14626 #define _COG2CON1_G2POLD 0x08
14627 #define _COG2CON1_FDBS 0x40
14628 #define _COG2CON1_G2FDBS 0x40
14629 #define _COG2CON1_RDBS 0x80
14630 #define _COG2CON1_G2RDBS 0x80
14632 //==============================================================================
14635 //==============================================================================
14638 extern __at(0x0715) __sfr COG2RIS0
;
14656 unsigned G2RIS0
: 1;
14657 unsigned G2RIS1
: 1;
14658 unsigned G2RIS2
: 1;
14659 unsigned G2RIS3
: 1;
14660 unsigned G2RIS4
: 1;
14661 unsigned G2RIS5
: 1;
14662 unsigned G2RIS6
: 1;
14663 unsigned G2RIS7
: 1;
14665 } __COG2RIS0bits_t
;
14667 extern __at(0x0715) volatile __COG2RIS0bits_t COG2RIS0bits
;
14669 #define _COG2RIS0_RIS0 0x01
14670 #define _COG2RIS0_G2RIS0 0x01
14671 #define _COG2RIS0_RIS1 0x02
14672 #define _COG2RIS0_G2RIS1 0x02
14673 #define _COG2RIS0_RIS2 0x04
14674 #define _COG2RIS0_G2RIS2 0x04
14675 #define _COG2RIS0_RIS3 0x08
14676 #define _COG2RIS0_G2RIS3 0x08
14677 #define _COG2RIS0_RIS4 0x10
14678 #define _COG2RIS0_G2RIS4 0x10
14679 #define _COG2RIS0_RIS5 0x20
14680 #define _COG2RIS0_G2RIS5 0x20
14681 #define _COG2RIS0_RIS6 0x40
14682 #define _COG2RIS0_G2RIS6 0x40
14683 #define _COG2RIS0_RIS7 0x80
14684 #define _COG2RIS0_G2RIS7 0x80
14686 //==============================================================================
14689 //==============================================================================
14692 extern __at(0x0716) __sfr COG2RIS1
;
14700 unsigned RIS10
: 1;
14701 unsigned RIS11
: 1;
14702 unsigned RIS12
: 1;
14703 unsigned RIS13
: 1;
14704 unsigned RIS14
: 1;
14705 unsigned RIS15
: 1;
14710 unsigned G2RIS8
: 1;
14711 unsigned G2RIS9
: 1;
14712 unsigned G2RIS10
: 1;
14713 unsigned G2RIS11
: 1;
14714 unsigned G2RIS12
: 1;
14715 unsigned G2RIS13
: 1;
14716 unsigned G2RIS14
: 1;
14717 unsigned G2RIS15
: 1;
14719 } __COG2RIS1bits_t
;
14721 extern __at(0x0716) volatile __COG2RIS1bits_t COG2RIS1bits
;
14723 #define _COG2RIS1_RIS8 0x01
14724 #define _COG2RIS1_G2RIS8 0x01
14725 #define _COG2RIS1_RIS9 0x02
14726 #define _COG2RIS1_G2RIS9 0x02
14727 #define _COG2RIS1_RIS10 0x04
14728 #define _COG2RIS1_G2RIS10 0x04
14729 #define _COG2RIS1_RIS11 0x08
14730 #define _COG2RIS1_G2RIS11 0x08
14731 #define _COG2RIS1_RIS12 0x10
14732 #define _COG2RIS1_G2RIS12 0x10
14733 #define _COG2RIS1_RIS13 0x20
14734 #define _COG2RIS1_G2RIS13 0x20
14735 #define _COG2RIS1_RIS14 0x40
14736 #define _COG2RIS1_G2RIS14 0x40
14737 #define _COG2RIS1_RIS15 0x80
14738 #define _COG2RIS1_G2RIS15 0x80
14740 //==============================================================================
14743 //==============================================================================
14746 extern __at(0x0717) __sfr COG2RSIM0
;
14752 unsigned RSIM0
: 1;
14753 unsigned RSIM1
: 1;
14754 unsigned RSIM2
: 1;
14755 unsigned RSIM3
: 1;
14756 unsigned RSIM4
: 1;
14757 unsigned RSIM5
: 1;
14758 unsigned RSIM6
: 1;
14759 unsigned RSIM7
: 1;
14764 unsigned G2RSIM0
: 1;
14765 unsigned G2RSIM1
: 1;
14766 unsigned G2RSIM2
: 1;
14767 unsigned G2RSIM3
: 1;
14768 unsigned G2RSIM4
: 1;
14769 unsigned G2RSIM5
: 1;
14770 unsigned G2RSIM6
: 1;
14771 unsigned G2RSIM7
: 1;
14773 } __COG2RSIM0bits_t
;
14775 extern __at(0x0717) volatile __COG2RSIM0bits_t COG2RSIM0bits
;
14777 #define _COG2RSIM0_RSIM0 0x01
14778 #define _COG2RSIM0_G2RSIM0 0x01
14779 #define _COG2RSIM0_RSIM1 0x02
14780 #define _COG2RSIM0_G2RSIM1 0x02
14781 #define _COG2RSIM0_RSIM2 0x04
14782 #define _COG2RSIM0_G2RSIM2 0x04
14783 #define _COG2RSIM0_RSIM3 0x08
14784 #define _COG2RSIM0_G2RSIM3 0x08
14785 #define _COG2RSIM0_RSIM4 0x10
14786 #define _COG2RSIM0_G2RSIM4 0x10
14787 #define _COG2RSIM0_RSIM5 0x20
14788 #define _COG2RSIM0_G2RSIM5 0x20
14789 #define _COG2RSIM0_RSIM6 0x40
14790 #define _COG2RSIM0_G2RSIM6 0x40
14791 #define _COG2RSIM0_RSIM7 0x80
14792 #define _COG2RSIM0_G2RSIM7 0x80
14794 //==============================================================================
14797 //==============================================================================
14800 extern __at(0x0718) __sfr COG2RSIM1
;
14806 unsigned RSIM8
: 1;
14807 unsigned RSIM9
: 1;
14808 unsigned RSIM10
: 1;
14809 unsigned RSIM11
: 1;
14810 unsigned RSIM12
: 1;
14811 unsigned RSIM13
: 1;
14812 unsigned RSIM14
: 1;
14813 unsigned RSIM15
: 1;
14818 unsigned G2RSIM8
: 1;
14819 unsigned G2RSIM9
: 1;
14820 unsigned G2RSIM10
: 1;
14821 unsigned G2RSIM11
: 1;
14822 unsigned G2RSIM12
: 1;
14823 unsigned G2RSIM13
: 1;
14824 unsigned G2RSIM14
: 1;
14825 unsigned G2RSIM15
: 1;
14827 } __COG2RSIM1bits_t
;
14829 extern __at(0x0718) volatile __COG2RSIM1bits_t COG2RSIM1bits
;
14831 #define _COG2RSIM1_RSIM8 0x01
14832 #define _COG2RSIM1_G2RSIM8 0x01
14833 #define _COG2RSIM1_RSIM9 0x02
14834 #define _COG2RSIM1_G2RSIM9 0x02
14835 #define _COG2RSIM1_RSIM10 0x04
14836 #define _COG2RSIM1_G2RSIM10 0x04
14837 #define _COG2RSIM1_RSIM11 0x08
14838 #define _COG2RSIM1_G2RSIM11 0x08
14839 #define _COG2RSIM1_RSIM12 0x10
14840 #define _COG2RSIM1_G2RSIM12 0x10
14841 #define _COG2RSIM1_RSIM13 0x20
14842 #define _COG2RSIM1_G2RSIM13 0x20
14843 #define _COG2RSIM1_RSIM14 0x40
14844 #define _COG2RSIM1_G2RSIM14 0x40
14845 #define _COG2RSIM1_RSIM15 0x80
14846 #define _COG2RSIM1_G2RSIM15 0x80
14848 //==============================================================================
14851 //==============================================================================
14854 extern __at(0x0719) __sfr COG2FIS0
;
14872 unsigned G2FIS0
: 1;
14873 unsigned G2FIS1
: 1;
14874 unsigned G2FIS2
: 1;
14875 unsigned G2FIS3
: 1;
14876 unsigned G2FIS4
: 1;
14877 unsigned G2FIS5
: 1;
14878 unsigned G2FIS6
: 1;
14879 unsigned G2FIS7
: 1;
14881 } __COG2FIS0bits_t
;
14883 extern __at(0x0719) volatile __COG2FIS0bits_t COG2FIS0bits
;
14885 #define _COG2FIS0_FIS0 0x01
14886 #define _COG2FIS0_G2FIS0 0x01
14887 #define _COG2FIS0_FIS1 0x02
14888 #define _COG2FIS0_G2FIS1 0x02
14889 #define _COG2FIS0_FIS2 0x04
14890 #define _COG2FIS0_G2FIS2 0x04
14891 #define _COG2FIS0_FIS3 0x08
14892 #define _COG2FIS0_G2FIS3 0x08
14893 #define _COG2FIS0_FIS4 0x10
14894 #define _COG2FIS0_G2FIS4 0x10
14895 #define _COG2FIS0_FIS5 0x20
14896 #define _COG2FIS0_G2FIS5 0x20
14897 #define _COG2FIS0_FIS6 0x40
14898 #define _COG2FIS0_G2FIS6 0x40
14899 #define _COG2FIS0_FIS7 0x80
14900 #define _COG2FIS0_G2FIS7 0x80
14902 //==============================================================================
14905 //==============================================================================
14908 extern __at(0x071A) __sfr COG2FIS1
;
14916 unsigned FIS10
: 1;
14917 unsigned FIS11
: 1;
14918 unsigned FIS12
: 1;
14919 unsigned FIS13
: 1;
14920 unsigned FIS14
: 1;
14921 unsigned FIS15
: 1;
14926 unsigned G2FIS8
: 1;
14927 unsigned G2FIS9
: 1;
14928 unsigned G2FIS10
: 1;
14929 unsigned G2FIS11
: 1;
14930 unsigned G2FIS12
: 1;
14931 unsigned G2FIS13
: 1;
14932 unsigned G2FIS14
: 1;
14933 unsigned G2FIS15
: 1;
14935 } __COG2FIS1bits_t
;
14937 extern __at(0x071A) volatile __COG2FIS1bits_t COG2FIS1bits
;
14939 #define _COG2FIS1_FIS8 0x01
14940 #define _COG2FIS1_G2FIS8 0x01
14941 #define _COG2FIS1_FIS9 0x02
14942 #define _COG2FIS1_G2FIS9 0x02
14943 #define _COG2FIS1_FIS10 0x04
14944 #define _COG2FIS1_G2FIS10 0x04
14945 #define _COG2FIS1_FIS11 0x08
14946 #define _COG2FIS1_G2FIS11 0x08
14947 #define _COG2FIS1_FIS12 0x10
14948 #define _COG2FIS1_G2FIS12 0x10
14949 #define _COG2FIS1_FIS13 0x20
14950 #define _COG2FIS1_G2FIS13 0x20
14951 #define _COG2FIS1_FIS14 0x40
14952 #define _COG2FIS1_G2FIS14 0x40
14953 #define _COG2FIS1_FIS15 0x80
14954 #define _COG2FIS1_G2FIS15 0x80
14956 //==============================================================================
14959 //==============================================================================
14962 extern __at(0x071B) __sfr COG2FSIM0
;
14968 unsigned FSIM0
: 1;
14969 unsigned FSIM1
: 1;
14970 unsigned FSIM2
: 1;
14971 unsigned FSIM3
: 1;
14972 unsigned FSIM4
: 1;
14973 unsigned FSIM5
: 1;
14974 unsigned FSIM6
: 1;
14975 unsigned FSIM7
: 1;
14980 unsigned G2FSIM0
: 1;
14981 unsigned G2FSIM1
: 1;
14982 unsigned G2FSIM2
: 1;
14983 unsigned G2FSIM3
: 1;
14984 unsigned G2FSIM4
: 1;
14985 unsigned G2FSIM5
: 1;
14986 unsigned G2FSIM6
: 1;
14987 unsigned G2FSIM7
: 1;
14989 } __COG2FSIM0bits_t
;
14991 extern __at(0x071B) volatile __COG2FSIM0bits_t COG2FSIM0bits
;
14993 #define _COG2FSIM0_FSIM0 0x01
14994 #define _COG2FSIM0_G2FSIM0 0x01
14995 #define _COG2FSIM0_FSIM1 0x02
14996 #define _COG2FSIM0_G2FSIM1 0x02
14997 #define _COG2FSIM0_FSIM2 0x04
14998 #define _COG2FSIM0_G2FSIM2 0x04
14999 #define _COG2FSIM0_FSIM3 0x08
15000 #define _COG2FSIM0_G2FSIM3 0x08
15001 #define _COG2FSIM0_FSIM4 0x10
15002 #define _COG2FSIM0_G2FSIM4 0x10
15003 #define _COG2FSIM0_FSIM5 0x20
15004 #define _COG2FSIM0_G2FSIM5 0x20
15005 #define _COG2FSIM0_FSIM6 0x40
15006 #define _COG2FSIM0_G2FSIM6 0x40
15007 #define _COG2FSIM0_FSIM7 0x80
15008 #define _COG2FSIM0_G2FSIM7 0x80
15010 //==============================================================================
15013 //==============================================================================
15016 extern __at(0x071C) __sfr COG2FSIM1
;
15022 unsigned FSIM8
: 1;
15023 unsigned FSIM9
: 1;
15024 unsigned FSIM10
: 1;
15025 unsigned FSIM11
: 1;
15026 unsigned FSIM12
: 1;
15027 unsigned FSIM13
: 1;
15028 unsigned FSIM14
: 1;
15029 unsigned FSIM15
: 1;
15034 unsigned G2FSIM8
: 1;
15035 unsigned G2FSIM9
: 1;
15036 unsigned G2FSIM10
: 1;
15037 unsigned G2FSIM11
: 1;
15038 unsigned G2FSIM12
: 1;
15039 unsigned G2FSIM13
: 1;
15040 unsigned G2FSIM14
: 1;
15041 unsigned G2FSIM15
: 1;
15043 } __COG2FSIM1bits_t
;
15045 extern __at(0x071C) volatile __COG2FSIM1bits_t COG2FSIM1bits
;
15047 #define _COG2FSIM1_FSIM8 0x01
15048 #define _COG2FSIM1_G2FSIM8 0x01
15049 #define _COG2FSIM1_FSIM9 0x02
15050 #define _COG2FSIM1_G2FSIM9 0x02
15051 #define _COG2FSIM1_FSIM10 0x04
15052 #define _COG2FSIM1_G2FSIM10 0x04
15053 #define _COG2FSIM1_FSIM11 0x08
15054 #define _COG2FSIM1_G2FSIM11 0x08
15055 #define _COG2FSIM1_FSIM12 0x10
15056 #define _COG2FSIM1_G2FSIM12 0x10
15057 #define _COG2FSIM1_FSIM13 0x20
15058 #define _COG2FSIM1_G2FSIM13 0x20
15059 #define _COG2FSIM1_FSIM14 0x40
15060 #define _COG2FSIM1_G2FSIM14 0x40
15061 #define _COG2FSIM1_FSIM15 0x80
15062 #define _COG2FSIM1_G2FSIM15 0x80
15064 //==============================================================================
15067 //==============================================================================
15070 extern __at(0x071D) __sfr COG2ASD0
;
15078 unsigned ASDAC0
: 1;
15079 unsigned ASDAC1
: 1;
15080 unsigned ASDBD0
: 1;
15081 unsigned ASDBD1
: 1;
15082 unsigned ASREN
: 1;
15090 unsigned G2ASDAC0
: 1;
15091 unsigned G2ASDAC1
: 1;
15092 unsigned G2ASDBD0
: 1;
15093 unsigned G2ASDBD1
: 1;
15094 unsigned ARSEN
: 1;
15095 unsigned G2ASE
: 1;
15106 unsigned G2ARSEN
: 1;
15118 unsigned G2ASREN
: 1;
15125 unsigned ASDAC
: 2;
15132 unsigned G2ASDAC
: 2;
15139 unsigned ASDBD
: 2;
15146 unsigned G2ASDBD
: 2;
15149 } __COG2ASD0bits_t
;
15151 extern __at(0x071D) volatile __COG2ASD0bits_t COG2ASD0bits
;
15153 #define _COG2ASD0_ASDAC0 0x04
15154 #define _COG2ASD0_G2ASDAC0 0x04
15155 #define _COG2ASD0_ASDAC1 0x08
15156 #define _COG2ASD0_G2ASDAC1 0x08
15157 #define _COG2ASD0_ASDBD0 0x10
15158 #define _COG2ASD0_G2ASDBD0 0x10
15159 #define _COG2ASD0_ASDBD1 0x20
15160 #define _COG2ASD0_G2ASDBD1 0x20
15161 #define _COG2ASD0_ASREN 0x40
15162 #define _COG2ASD0_ARSEN 0x40
15163 #define _COG2ASD0_G2ARSEN 0x40
15164 #define _COG2ASD0_G2ASREN 0x40
15165 #define _COG2ASD0_ASE 0x80
15166 #define _COG2ASD0_G2ASE 0x80
15168 //==============================================================================
15171 //==============================================================================
15174 extern __at(0x071E) __sfr COG2ASD1
;
15192 unsigned G2AS0E
: 1;
15193 unsigned G2AS1E
: 1;
15194 unsigned G2AS2E
: 1;
15195 unsigned G2AS3E
: 1;
15196 unsigned G2AS4E
: 1;
15197 unsigned G2AS5E
: 1;
15198 unsigned G2AS6E
: 1;
15199 unsigned G2AS7E
: 1;
15201 } __COG2ASD1bits_t
;
15203 extern __at(0x071E) volatile __COG2ASD1bits_t COG2ASD1bits
;
15205 #define _COG2ASD1_AS0E 0x01
15206 #define _COG2ASD1_G2AS0E 0x01
15207 #define _COG2ASD1_AS1E 0x02
15208 #define _COG2ASD1_G2AS1E 0x02
15209 #define _COG2ASD1_AS2E 0x04
15210 #define _COG2ASD1_G2AS2E 0x04
15211 #define _COG2ASD1_AS3E 0x08
15212 #define _COG2ASD1_G2AS3E 0x08
15213 #define _COG2ASD1_AS4E 0x10
15214 #define _COG2ASD1_G2AS4E 0x10
15215 #define _COG2ASD1_AS5E 0x20
15216 #define _COG2ASD1_G2AS5E 0x20
15217 #define _COG2ASD1_AS6E 0x40
15218 #define _COG2ASD1_G2AS6E 0x40
15219 #define _COG2ASD1_AS7E 0x80
15220 #define _COG2ASD1_G2AS7E 0x80
15222 //==============================================================================
15225 //==============================================================================
15228 extern __at(0x071F) __sfr COG2STR
;
15238 unsigned SDATA
: 1;
15239 unsigned SDATB
: 1;
15240 unsigned SDATC
: 1;
15241 unsigned SDATD
: 1;
15246 unsigned G2STRA
: 1;
15247 unsigned G2STRB
: 1;
15248 unsigned G2STRC
: 1;
15249 unsigned G2STRD
: 1;
15250 unsigned G2SDATA
: 1;
15251 unsigned G2SDATB
: 1;
15252 unsigned G2SDATC
: 1;
15253 unsigned G2SDATD
: 1;
15257 extern __at(0x071F) volatile __COG2STRbits_t COG2STRbits
;
15259 #define _COG2STR_STRA 0x01
15260 #define _COG2STR_G2STRA 0x01
15261 #define _COG2STR_STRB 0x02
15262 #define _COG2STR_G2STRB 0x02
15263 #define _COG2STR_STRC 0x04
15264 #define _COG2STR_G2STRC 0x04
15265 #define _COG2STR_STRD 0x08
15266 #define _COG2STR_G2STRD 0x08
15267 #define _COG2STR_SDATA 0x10
15268 #define _COG2STR_G2SDATA 0x10
15269 #define _COG2STR_SDATB 0x20
15270 #define _COG2STR_G2SDATB 0x20
15271 #define _COG2STR_SDATC 0x40
15272 #define _COG2STR_G2SDATC 0x40
15273 #define _COG2STR_SDATD 0x80
15274 #define _COG2STR_G2SDATD 0x80
15276 //==============================================================================
15279 //==============================================================================
15282 extern __at(0x078E) __sfr PRG1RTSS
;
15288 unsigned RTSS0
: 1;
15289 unsigned RTSS1
: 1;
15290 unsigned RTSS2
: 1;
15291 unsigned RTSS3
: 1;
15300 unsigned RG1RTSS0
: 1;
15301 unsigned RG1RTSS1
: 1;
15302 unsigned RG1RTSS2
: 1;
15303 unsigned RG1RTSS3
: 1;
15312 unsigned RG1RTSS
: 4;
15321 } __PRG1RTSSbits_t
;
15323 extern __at(0x078E) volatile __PRG1RTSSbits_t PRG1RTSSbits
;
15325 #define _RTSS0 0x01
15326 #define _RG1RTSS0 0x01
15327 #define _RTSS1 0x02
15328 #define _RG1RTSS1 0x02
15329 #define _RTSS2 0x04
15330 #define _RG1RTSS2 0x04
15331 #define _RTSS3 0x08
15332 #define _RG1RTSS3 0x08
15334 //==============================================================================
15337 //==============================================================================
15340 extern __at(0x078F) __sfr PRG1FTSS
;
15346 unsigned FTSS0
: 1;
15347 unsigned FTSS1
: 1;
15348 unsigned FTSS2
: 1;
15349 unsigned FTSS3
: 1;
15358 unsigned RG1FTSS0
: 1;
15359 unsigned RG1FTSS1
: 1;
15360 unsigned RG1FTSS2
: 1;
15361 unsigned RG1FTSS3
: 1;
15376 unsigned RG1FTSS
: 4;
15379 } __PRG1FTSSbits_t
;
15381 extern __at(0x078F) volatile __PRG1FTSSbits_t PRG1FTSSbits
;
15383 #define _FTSS0 0x01
15384 #define _RG1FTSS0 0x01
15385 #define _FTSS1 0x02
15386 #define _RG1FTSS1 0x02
15387 #define _FTSS2 0x04
15388 #define _RG1FTSS2 0x04
15389 #define _FTSS3 0x08
15390 #define _RG1FTSS3 0x08
15392 //==============================================================================
15395 //==============================================================================
15398 extern __at(0x0790) __sfr PRG1INS
;
15416 unsigned RG1INS0
: 1;
15417 unsigned RG1INS1
: 1;
15418 unsigned RG1INS2
: 1;
15419 unsigned RG1INS3
: 1;
15434 unsigned RG1INS
: 4;
15439 extern __at(0x0790) volatile __PRG1INSbits_t PRG1INSbits
;
15442 #define _RG1INS0 0x01
15444 #define _RG1INS1 0x02
15446 #define _RG1INS2 0x04
15448 #define _RG1INS3 0x08
15450 //==============================================================================
15453 //==============================================================================
15456 extern __at(0x0791) __sfr PRG1CON0
;
15464 unsigned MODE0
: 1;
15465 unsigned MODE1
: 1;
15474 unsigned RG1GO
: 1;
15475 unsigned RG1OS
: 1;
15476 unsigned RG1MODE0
: 1;
15477 unsigned RG1MODE1
: 1;
15478 unsigned RG1REDG
: 1;
15479 unsigned RG1FEDG
: 1;
15481 unsigned RG1EN
: 1;
15487 unsigned RG1MODE
: 2;
15497 } __PRG1CON0bits_t
;
15499 extern __at(0x0791) volatile __PRG1CON0bits_t PRG1CON0bits
;
15501 #define _PRG1CON0_GO 0x01
15502 #define _PRG1CON0_RG1GO 0x01
15503 #define _PRG1CON0_OS 0x02
15504 #define _PRG1CON0_RG1OS 0x02
15505 #define _PRG1CON0_MODE0 0x04
15506 #define _PRG1CON0_RG1MODE0 0x04
15507 #define _PRG1CON0_MODE1 0x08
15508 #define _PRG1CON0_RG1MODE1 0x08
15509 #define _PRG1CON0_REDG 0x10
15510 #define _PRG1CON0_RG1REDG 0x10
15511 #define _PRG1CON0_FEDG 0x20
15512 #define _PRG1CON0_RG1FEDG 0x20
15513 #define _PRG1CON0_EN 0x80
15514 #define _PRG1CON0_RG1EN 0x80
15516 //==============================================================================
15519 //==============================================================================
15522 extern __at(0x0792) __sfr PRG1CON1
;
15540 unsigned RG1RPOL
: 1;
15541 unsigned RG1FPOL
: 1;
15542 unsigned RG1RDY
: 1;
15549 } __PRG1CON1bits_t
;
15551 extern __at(0x0792) volatile __PRG1CON1bits_t PRG1CON1bits
;
15554 #define _RG1RPOL 0x01
15556 #define _RG1FPOL 0x02
15558 #define _RG1RDY 0x04
15560 //==============================================================================
15563 //==============================================================================
15566 extern __at(0x0793) __sfr PRG1CON2
;
15572 unsigned ISET0
: 1;
15573 unsigned ISET1
: 1;
15574 unsigned ISET2
: 1;
15575 unsigned ISET3
: 1;
15576 unsigned ISET4
: 1;
15584 unsigned RG1ISET0
: 1;
15585 unsigned RG1ISET1
: 1;
15586 unsigned RG1ISET2
: 1;
15587 unsigned RG1ISET3
: 1;
15588 unsigned RG1ISET4
: 1;
15596 unsigned RG1ISET
: 5;
15605 } __PRG1CON2bits_t
;
15607 extern __at(0x0793) volatile __PRG1CON2bits_t PRG1CON2bits
;
15609 #define _ISET0 0x01
15610 #define _RG1ISET0 0x01
15611 #define _ISET1 0x02
15612 #define _RG1ISET1 0x02
15613 #define _ISET2 0x04
15614 #define _RG1ISET2 0x04
15615 #define _ISET3 0x08
15616 #define _RG1ISET3 0x08
15617 #define _ISET4 0x10
15618 #define _RG1ISET4 0x10
15620 //==============================================================================
15623 //==============================================================================
15626 extern __at(0x0794) __sfr PRG2RTSS
;
15632 unsigned RTSS0
: 1;
15633 unsigned RTSS1
: 1;
15634 unsigned RTSS2
: 1;
15635 unsigned RTSS3
: 1;
15644 unsigned RG2RTSS0
: 1;
15645 unsigned RG2RTSS1
: 1;
15646 unsigned RG2RTSS2
: 1;
15647 unsigned RG2RTSS3
: 1;
15656 unsigned RG2RTSS
: 4;
15665 } __PRG2RTSSbits_t
;
15667 extern __at(0x0794) volatile __PRG2RTSSbits_t PRG2RTSSbits
;
15669 #define _PRG2RTSS_RTSS0 0x01
15670 #define _PRG2RTSS_RG2RTSS0 0x01
15671 #define _PRG2RTSS_RTSS1 0x02
15672 #define _PRG2RTSS_RG2RTSS1 0x02
15673 #define _PRG2RTSS_RTSS2 0x04
15674 #define _PRG2RTSS_RG2RTSS2 0x04
15675 #define _PRG2RTSS_RTSS3 0x08
15676 #define _PRG2RTSS_RG2RTSS3 0x08
15678 //==============================================================================
15681 //==============================================================================
15684 extern __at(0x0795) __sfr PRG2FTSS
;
15690 unsigned FTSS0
: 1;
15691 unsigned FTSS1
: 1;
15692 unsigned FTSS2
: 1;
15693 unsigned FTSS3
: 1;
15702 unsigned RG2FTSS0
: 1;
15703 unsigned RG2FTSS1
: 1;
15704 unsigned RG2FTSS2
: 1;
15705 unsigned RG2FTSS3
: 1;
15720 unsigned RG2FTSS
: 4;
15723 } __PRG2FTSSbits_t
;
15725 extern __at(0x0795) volatile __PRG2FTSSbits_t PRG2FTSSbits
;
15727 #define _PRG2FTSS_FTSS0 0x01
15728 #define _PRG2FTSS_RG2FTSS0 0x01
15729 #define _PRG2FTSS_FTSS1 0x02
15730 #define _PRG2FTSS_RG2FTSS1 0x02
15731 #define _PRG2FTSS_FTSS2 0x04
15732 #define _PRG2FTSS_RG2FTSS2 0x04
15733 #define _PRG2FTSS_FTSS3 0x08
15734 #define _PRG2FTSS_RG2FTSS3 0x08
15736 //==============================================================================
15739 //==============================================================================
15742 extern __at(0x0796) __sfr PRG2INS
;
15760 unsigned RG2INS0
: 1;
15761 unsigned RG2INS1
: 1;
15762 unsigned RG2INS2
: 1;
15763 unsigned RG2INS3
: 1;
15772 unsigned RG2INS
: 4;
15783 extern __at(0x0796) volatile __PRG2INSbits_t PRG2INSbits
;
15785 #define _PRG2INS_INS0 0x01
15786 #define _PRG2INS_RG2INS0 0x01
15787 #define _PRG2INS_INS1 0x02
15788 #define _PRG2INS_RG2INS1 0x02
15789 #define _PRG2INS_INS2 0x04
15790 #define _PRG2INS_RG2INS2 0x04
15791 #define _PRG2INS_INS3 0x08
15792 #define _PRG2INS_RG2INS3 0x08
15794 //==============================================================================
15797 //==============================================================================
15800 extern __at(0x0797) __sfr PRG2CON0
;
15808 unsigned MODE0
: 1;
15809 unsigned MODE1
: 1;
15818 unsigned RG2GO
: 1;
15819 unsigned RG2OS
: 1;
15820 unsigned RG2MODE0
: 1;
15821 unsigned RG2MODE1
: 1;
15822 unsigned RG2REDG
: 1;
15823 unsigned RG2FEDG
: 1;
15825 unsigned RG2EN
: 1;
15838 unsigned RG2MODE
: 2;
15841 } __PRG2CON0bits_t
;
15843 extern __at(0x0797) volatile __PRG2CON0bits_t PRG2CON0bits
;
15845 #define _PRG2CON0_GO 0x01
15846 #define _PRG2CON0_RG2GO 0x01
15847 #define _PRG2CON0_OS 0x02
15848 #define _PRG2CON0_RG2OS 0x02
15849 #define _PRG2CON0_MODE0 0x04
15850 #define _PRG2CON0_RG2MODE0 0x04
15851 #define _PRG2CON0_MODE1 0x08
15852 #define _PRG2CON0_RG2MODE1 0x08
15853 #define _PRG2CON0_REDG 0x10
15854 #define _PRG2CON0_RG2REDG 0x10
15855 #define _PRG2CON0_FEDG 0x20
15856 #define _PRG2CON0_RG2FEDG 0x20
15857 #define _PRG2CON0_EN 0x80
15858 #define _PRG2CON0_RG2EN 0x80
15860 //==============================================================================
15863 //==============================================================================
15866 extern __at(0x0798) __sfr PRG2CON1
;
15884 unsigned RG2RPOL
: 1;
15885 unsigned RG2FPOL
: 1;
15886 unsigned RG2RDY
: 1;
15893 } __PRG2CON1bits_t
;
15895 extern __at(0x0798) volatile __PRG2CON1bits_t PRG2CON1bits
;
15897 #define _PRG2CON1_RPOL 0x01
15898 #define _PRG2CON1_RG2RPOL 0x01
15899 #define _PRG2CON1_FPOL 0x02
15900 #define _PRG2CON1_RG2FPOL 0x02
15901 #define _PRG2CON1_RDY 0x04
15902 #define _PRG2CON1_RG2RDY 0x04
15904 //==============================================================================
15907 //==============================================================================
15910 extern __at(0x0799) __sfr PRG2CON2
;
15916 unsigned ISET0
: 1;
15917 unsigned ISET1
: 1;
15918 unsigned ISET2
: 1;
15919 unsigned ISET3
: 1;
15920 unsigned ISET4
: 1;
15928 unsigned RG2ISET0
: 1;
15929 unsigned RG2ISET1
: 1;
15930 unsigned RG2ISET2
: 1;
15931 unsigned RG2ISET3
: 1;
15932 unsigned RG2ISET4
: 1;
15946 unsigned RG2ISET
: 5;
15949 } __PRG2CON2bits_t
;
15951 extern __at(0x0799) volatile __PRG2CON2bits_t PRG2CON2bits
;
15953 #define _PRG2CON2_ISET0 0x01
15954 #define _PRG2CON2_RG2ISET0 0x01
15955 #define _PRG2CON2_ISET1 0x02
15956 #define _PRG2CON2_RG2ISET1 0x02
15957 #define _PRG2CON2_ISET2 0x04
15958 #define _PRG2CON2_RG2ISET2 0x04
15959 #define _PRG2CON2_ISET3 0x08
15960 #define _PRG2CON2_RG2ISET3 0x08
15961 #define _PRG2CON2_ISET4 0x10
15962 #define _PRG2CON2_RG2ISET4 0x10
15964 //==============================================================================
15967 //==============================================================================
15970 extern __at(0x079A) __sfr PRG3RTSS
;
15976 unsigned RTSS0
: 1;
15977 unsigned RTSS1
: 1;
15978 unsigned RTSS2
: 1;
15979 unsigned RTSS3
: 1;
15988 unsigned RG3RTSS0
: 1;
15989 unsigned RG3RTSS1
: 1;
15990 unsigned RG3RTSS2
: 1;
15991 unsigned RG3RTSS3
: 1;
16000 unsigned RG3RTSS
: 4;
16009 } __PRG3RTSSbits_t
;
16011 extern __at(0x079A) volatile __PRG3RTSSbits_t PRG3RTSSbits
;
16013 #define _PRG3RTSS_RTSS0 0x01
16014 #define _PRG3RTSS_RG3RTSS0 0x01
16015 #define _PRG3RTSS_RTSS1 0x02
16016 #define _PRG3RTSS_RG3RTSS1 0x02
16017 #define _PRG3RTSS_RTSS2 0x04
16018 #define _PRG3RTSS_RG3RTSS2 0x04
16019 #define _PRG3RTSS_RTSS3 0x08
16020 #define _PRG3RTSS_RG3RTSS3 0x08
16022 //==============================================================================
16025 //==============================================================================
16028 extern __at(0x079B) __sfr PRG3FTSS
;
16034 unsigned FTSS0
: 1;
16035 unsigned FTSS1
: 1;
16036 unsigned FTSS2
: 1;
16037 unsigned FTSS3
: 1;
16046 unsigned RG3FTSS0
: 1;
16047 unsigned RG3FTSS1
: 1;
16048 unsigned RG3FTSS2
: 1;
16049 unsigned RG3FTSS3
: 1;
16064 unsigned RG3FTSS
: 4;
16067 } __PRG3FTSSbits_t
;
16069 extern __at(0x079B) volatile __PRG3FTSSbits_t PRG3FTSSbits
;
16071 #define _PRG3FTSS_FTSS0 0x01
16072 #define _PRG3FTSS_RG3FTSS0 0x01
16073 #define _PRG3FTSS_FTSS1 0x02
16074 #define _PRG3FTSS_RG3FTSS1 0x02
16075 #define _PRG3FTSS_FTSS2 0x04
16076 #define _PRG3FTSS_RG3FTSS2 0x04
16077 #define _PRG3FTSS_FTSS3 0x08
16078 #define _PRG3FTSS_RG3FTSS3 0x08
16080 //==============================================================================
16083 //==============================================================================
16086 extern __at(0x079C) __sfr PRG3INS
;
16104 unsigned RG3INS0
: 1;
16105 unsigned RG3INS1
: 1;
16106 unsigned RG3INS2
: 1;
16107 unsigned RG3INS3
: 1;
16122 unsigned RG3INS
: 4;
16127 extern __at(0x079C) volatile __PRG3INSbits_t PRG3INSbits
;
16129 #define _PRG3INS_INS0 0x01
16130 #define _PRG3INS_RG3INS0 0x01
16131 #define _PRG3INS_INS1 0x02
16132 #define _PRG3INS_RG3INS1 0x02
16133 #define _PRG3INS_INS2 0x04
16134 #define _PRG3INS_RG3INS2 0x04
16135 #define _PRG3INS_INS3 0x08
16136 #define _PRG3INS_RG3INS3 0x08
16138 //==============================================================================
16141 //==============================================================================
16144 extern __at(0x079D) __sfr PRG3CON0
;
16152 unsigned MODE0
: 1;
16153 unsigned MODE1
: 1;
16162 unsigned RG3GO
: 1;
16163 unsigned RG3OS
: 1;
16164 unsigned RG3MODE0
: 1;
16165 unsigned RG3MODE1
: 1;
16166 unsigned RG3REDG
: 1;
16167 unsigned RG3FEDG
: 1;
16169 unsigned RG3EN
: 1;
16182 unsigned RG3MODE
: 2;
16185 } __PRG3CON0bits_t
;
16187 extern __at(0x079D) volatile __PRG3CON0bits_t PRG3CON0bits
;
16189 #define _PRG3CON0_GO 0x01
16190 #define _PRG3CON0_RG3GO 0x01
16191 #define _PRG3CON0_OS 0x02
16192 #define _PRG3CON0_RG3OS 0x02
16193 #define _PRG3CON0_MODE0 0x04
16194 #define _PRG3CON0_RG3MODE0 0x04
16195 #define _PRG3CON0_MODE1 0x08
16196 #define _PRG3CON0_RG3MODE1 0x08
16197 #define _PRG3CON0_REDG 0x10
16198 #define _PRG3CON0_RG3REDG 0x10
16199 #define _PRG3CON0_FEDG 0x20
16200 #define _PRG3CON0_RG3FEDG 0x20
16201 #define _PRG3CON0_EN 0x80
16202 #define _PRG3CON0_RG3EN 0x80
16204 //==============================================================================
16207 //==============================================================================
16210 extern __at(0x079E) __sfr PRG3CON1
;
16228 unsigned RG3RPOL
: 1;
16229 unsigned RG3FPOL
: 1;
16230 unsigned RG3RDY
: 1;
16237 } __PRG3CON1bits_t
;
16239 extern __at(0x079E) volatile __PRG3CON1bits_t PRG3CON1bits
;
16241 #define _PRG3CON1_RPOL 0x01
16242 #define _PRG3CON1_RG3RPOL 0x01
16243 #define _PRG3CON1_FPOL 0x02
16244 #define _PRG3CON1_RG3FPOL 0x02
16245 #define _PRG3CON1_RDY 0x04
16246 #define _PRG3CON1_RG3RDY 0x04
16248 //==============================================================================
16251 //==============================================================================
16254 extern __at(0x079F) __sfr PRG3CON2
;
16260 unsigned ISET0
: 1;
16261 unsigned ISET1
: 1;
16262 unsigned ISET2
: 1;
16263 unsigned ISET3
: 1;
16264 unsigned ISET4
: 1;
16272 unsigned RG3ISET0
: 1;
16273 unsigned RG3ISET1
: 1;
16274 unsigned RG3ISET2
: 1;
16275 unsigned RG3ISET3
: 1;
16276 unsigned RG3ISET4
: 1;
16284 unsigned RG3ISET
: 5;
16293 } __PRG3CON2bits_t
;
16295 extern __at(0x079F) volatile __PRG3CON2bits_t PRG3CON2bits
;
16297 #define _PRG3CON2_ISET0 0x01
16298 #define _PRG3CON2_RG3ISET0 0x01
16299 #define _PRG3CON2_ISET1 0x02
16300 #define _PRG3CON2_RG3ISET1 0x02
16301 #define _PRG3CON2_ISET2 0x04
16302 #define _PRG3CON2_RG3ISET2 0x04
16303 #define _PRG3CON2_ISET3 0x08
16304 #define _PRG3CON2_RG3ISET3 0x08
16305 #define _PRG3CON2_ISET4 0x10
16306 #define _PRG3CON2_RG3ISET4 0x10
16308 //==============================================================================
16311 //==============================================================================
16314 extern __at(0x080D) __sfr COG3PHR
;
16332 unsigned G3PHR0
: 1;
16333 unsigned G3PHR1
: 1;
16334 unsigned G3PHR2
: 1;
16335 unsigned G3PHR3
: 1;
16336 unsigned G3PHR4
: 1;
16337 unsigned G3PHR5
: 1;
16350 unsigned G3PHR
: 6;
16355 extern __at(0x080D) volatile __COG3PHRbits_t COG3PHRbits
;
16357 #define _COG3PHR_PHR0 0x01
16358 #define _COG3PHR_G3PHR0 0x01
16359 #define _COG3PHR_PHR1 0x02
16360 #define _COG3PHR_G3PHR1 0x02
16361 #define _COG3PHR_PHR2 0x04
16362 #define _COG3PHR_G3PHR2 0x04
16363 #define _COG3PHR_PHR3 0x08
16364 #define _COG3PHR_G3PHR3 0x08
16365 #define _COG3PHR_PHR4 0x10
16366 #define _COG3PHR_G3PHR4 0x10
16367 #define _COG3PHR_PHR5 0x20
16368 #define _COG3PHR_G3PHR5 0x20
16370 //==============================================================================
16373 //==============================================================================
16376 extern __at(0x080E) __sfr COG3PHF
;
16394 unsigned G3PHF0
: 1;
16395 unsigned G3PHF1
: 1;
16396 unsigned G3PHF2
: 1;
16397 unsigned G3PHF3
: 1;
16398 unsigned G3PHF4
: 1;
16399 unsigned G3PHF5
: 1;
16406 unsigned G3PHF
: 6;
16417 extern __at(0x080E) volatile __COG3PHFbits_t COG3PHFbits
;
16419 #define _COG3PHF_PHF0 0x01
16420 #define _COG3PHF_G3PHF0 0x01
16421 #define _COG3PHF_PHF1 0x02
16422 #define _COG3PHF_G3PHF1 0x02
16423 #define _COG3PHF_PHF2 0x04
16424 #define _COG3PHF_G3PHF2 0x04
16425 #define _COG3PHF_PHF3 0x08
16426 #define _COG3PHF_G3PHF3 0x08
16427 #define _COG3PHF_PHF4 0x10
16428 #define _COG3PHF_G3PHF4 0x10
16429 #define _COG3PHF_PHF5 0x20
16430 #define _COG3PHF_G3PHF5 0x20
16432 //==============================================================================
16435 //==============================================================================
16438 extern __at(0x080F) __sfr COG3BLKR
;
16444 unsigned BLKR0
: 1;
16445 unsigned BLKR1
: 1;
16446 unsigned BLKR2
: 1;
16447 unsigned BLKR3
: 1;
16448 unsigned BLKR4
: 1;
16449 unsigned BLKR5
: 1;
16456 unsigned G3BLKR0
: 1;
16457 unsigned G3BLKR1
: 1;
16458 unsigned G3BLKR2
: 1;
16459 unsigned G3BLKR3
: 1;
16460 unsigned G3BLKR4
: 1;
16461 unsigned G3BLKR5
: 1;
16474 unsigned G3BLKR
: 6;
16477 } __COG3BLKRbits_t
;
16479 extern __at(0x080F) volatile __COG3BLKRbits_t COG3BLKRbits
;
16481 #define _COG3BLKR_BLKR0 0x01
16482 #define _COG3BLKR_G3BLKR0 0x01
16483 #define _COG3BLKR_BLKR1 0x02
16484 #define _COG3BLKR_G3BLKR1 0x02
16485 #define _COG3BLKR_BLKR2 0x04
16486 #define _COG3BLKR_G3BLKR2 0x04
16487 #define _COG3BLKR_BLKR3 0x08
16488 #define _COG3BLKR_G3BLKR3 0x08
16489 #define _COG3BLKR_BLKR4 0x10
16490 #define _COG3BLKR_G3BLKR4 0x10
16491 #define _COG3BLKR_BLKR5 0x20
16492 #define _COG3BLKR_G3BLKR5 0x20
16494 //==============================================================================
16497 //==============================================================================
16500 extern __at(0x0810) __sfr COG3BLKF
;
16506 unsigned BLKF0
: 1;
16507 unsigned BLKF1
: 1;
16508 unsigned BLKF2
: 1;
16509 unsigned BLKF3
: 1;
16510 unsigned BLKF4
: 1;
16511 unsigned BLKF5
: 1;
16518 unsigned G3BLKF0
: 1;
16519 unsigned G3BLKF1
: 1;
16520 unsigned G3BLKF2
: 1;
16521 unsigned G3BLKF3
: 1;
16522 unsigned G3BLKF4
: 1;
16523 unsigned G3BLKF5
: 1;
16536 unsigned G3BLKF
: 6;
16539 } __COG3BLKFbits_t
;
16541 extern __at(0x0810) volatile __COG3BLKFbits_t COG3BLKFbits
;
16543 #define _COG3BLKF_BLKF0 0x01
16544 #define _COG3BLKF_G3BLKF0 0x01
16545 #define _COG3BLKF_BLKF1 0x02
16546 #define _COG3BLKF_G3BLKF1 0x02
16547 #define _COG3BLKF_BLKF2 0x04
16548 #define _COG3BLKF_G3BLKF2 0x04
16549 #define _COG3BLKF_BLKF3 0x08
16550 #define _COG3BLKF_G3BLKF3 0x08
16551 #define _COG3BLKF_BLKF4 0x10
16552 #define _COG3BLKF_G3BLKF4 0x10
16553 #define _COG3BLKF_BLKF5 0x20
16554 #define _COG3BLKF_G3BLKF5 0x20
16556 //==============================================================================
16559 //==============================================================================
16562 extern __at(0x0811) __sfr COG3DBR
;
16580 unsigned G3DBR0
: 1;
16581 unsigned G3DBR1
: 1;
16582 unsigned G3DBR2
: 1;
16583 unsigned G3DBR3
: 1;
16584 unsigned G3DBR4
: 1;
16585 unsigned G3DBR5
: 1;
16598 unsigned G3DBR
: 6;
16603 extern __at(0x0811) volatile __COG3DBRbits_t COG3DBRbits
;
16605 #define _COG3DBR_DBR0 0x01
16606 #define _COG3DBR_G3DBR0 0x01
16607 #define _COG3DBR_DBR1 0x02
16608 #define _COG3DBR_G3DBR1 0x02
16609 #define _COG3DBR_DBR2 0x04
16610 #define _COG3DBR_G3DBR2 0x04
16611 #define _COG3DBR_DBR3 0x08
16612 #define _COG3DBR_G3DBR3 0x08
16613 #define _COG3DBR_DBR4 0x10
16614 #define _COG3DBR_G3DBR4 0x10
16615 #define _COG3DBR_DBR5 0x20
16616 #define _COG3DBR_G3DBR5 0x20
16618 //==============================================================================
16621 //==============================================================================
16624 extern __at(0x0812) __sfr COG3DBF
;
16642 unsigned G3DBF0
: 1;
16643 unsigned G3DBF1
: 1;
16644 unsigned G3DBF2
: 1;
16645 unsigned G3DBF3
: 1;
16646 unsigned G3DBF4
: 1;
16647 unsigned G3DBF5
: 1;
16660 unsigned G3DBF
: 6;
16665 extern __at(0x0812) volatile __COG3DBFbits_t COG3DBFbits
;
16667 #define _COG3DBF_DBF0 0x01
16668 #define _COG3DBF_G3DBF0 0x01
16669 #define _COG3DBF_DBF1 0x02
16670 #define _COG3DBF_G3DBF1 0x02
16671 #define _COG3DBF_DBF2 0x04
16672 #define _COG3DBF_G3DBF2 0x04
16673 #define _COG3DBF_DBF3 0x08
16674 #define _COG3DBF_G3DBF3 0x08
16675 #define _COG3DBF_DBF4 0x10
16676 #define _COG3DBF_G3DBF4 0x10
16677 #define _COG3DBF_DBF5 0x20
16678 #define _COG3DBF_G3DBF5 0x20
16680 //==============================================================================
16683 //==============================================================================
16686 extern __at(0x0813) __sfr COG3CON0
;
16704 unsigned G3MD0
: 1;
16705 unsigned G3MD1
: 1;
16706 unsigned G3MD2
: 1;
16707 unsigned G3CS0
: 1;
16708 unsigned G3CS1
: 1;
16739 } __COG3CON0bits_t
;
16741 extern __at(0x0813) volatile __COG3CON0bits_t COG3CON0bits
;
16743 #define _COG3CON0_MD0 0x01
16744 #define _COG3CON0_G3MD0 0x01
16745 #define _COG3CON0_MD1 0x02
16746 #define _COG3CON0_G3MD1 0x02
16747 #define _COG3CON0_MD2 0x04
16748 #define _COG3CON0_G3MD2 0x04
16749 #define _COG3CON0_CS0 0x08
16750 #define _COG3CON0_G3CS0 0x08
16751 #define _COG3CON0_CS1 0x10
16752 #define _COG3CON0_G3CS1 0x10
16753 #define _COG3CON0_LD 0x40
16754 #define _COG3CON0_G3LD 0x40
16755 #define _COG3CON0_EN 0x80
16756 #define _COG3CON0_G3EN 0x80
16758 //==============================================================================
16761 //==============================================================================
16764 extern __at(0x0814) __sfr COG3CON1
;
16782 unsigned G3POLA
: 1;
16783 unsigned G3POLB
: 1;
16784 unsigned G3POLC
: 1;
16785 unsigned G3POLD
: 1;
16788 unsigned G3FDBS
: 1;
16789 unsigned G3RDBS
: 1;
16791 } __COG3CON1bits_t
;
16793 extern __at(0x0814) volatile __COG3CON1bits_t COG3CON1bits
;
16795 #define _COG3CON1_POLA 0x01
16796 #define _COG3CON1_G3POLA 0x01
16797 #define _COG3CON1_POLB 0x02
16798 #define _COG3CON1_G3POLB 0x02
16799 #define _COG3CON1_POLC 0x04
16800 #define _COG3CON1_G3POLC 0x04
16801 #define _COG3CON1_POLD 0x08
16802 #define _COG3CON1_G3POLD 0x08
16803 #define _COG3CON1_FDBS 0x40
16804 #define _COG3CON1_G3FDBS 0x40
16805 #define _COG3CON1_RDBS 0x80
16806 #define _COG3CON1_G3RDBS 0x80
16808 //==============================================================================
16811 //==============================================================================
16814 extern __at(0x0815) __sfr COG3RIS0
;
16832 unsigned G3RIS0
: 1;
16833 unsigned G3RIS1
: 1;
16834 unsigned G3RIS2
: 1;
16835 unsigned G3RIS3
: 1;
16836 unsigned G3RIS4
: 1;
16837 unsigned G3RIS5
: 1;
16838 unsigned G3RIS6
: 1;
16839 unsigned G3RIS7
: 1;
16841 } __COG3RIS0bits_t
;
16843 extern __at(0x0815) volatile __COG3RIS0bits_t COG3RIS0bits
;
16845 #define _COG3RIS0_RIS0 0x01
16846 #define _COG3RIS0_G3RIS0 0x01
16847 #define _COG3RIS0_RIS1 0x02
16848 #define _COG3RIS0_G3RIS1 0x02
16849 #define _COG3RIS0_RIS2 0x04
16850 #define _COG3RIS0_G3RIS2 0x04
16851 #define _COG3RIS0_RIS3 0x08
16852 #define _COG3RIS0_G3RIS3 0x08
16853 #define _COG3RIS0_RIS4 0x10
16854 #define _COG3RIS0_G3RIS4 0x10
16855 #define _COG3RIS0_RIS5 0x20
16856 #define _COG3RIS0_G3RIS5 0x20
16857 #define _COG3RIS0_RIS6 0x40
16858 #define _COG3RIS0_G3RIS6 0x40
16859 #define _COG3RIS0_RIS7 0x80
16860 #define _COG3RIS0_G3RIS7 0x80
16862 //==============================================================================
16865 //==============================================================================
16868 extern __at(0x0816) __sfr COG3RIS1
;
16877 unsigned RIS11
: 1;
16878 unsigned RIS12
: 1;
16879 unsigned RIS13
: 1;
16880 unsigned RIS14
: 1;
16881 unsigned RIS15
: 1;
16887 unsigned G3RIS9
: 1;
16889 unsigned G3RIS11
: 1;
16890 unsigned G3RIS12
: 1;
16891 unsigned G3RIS13
: 1;
16892 unsigned G3RIS14
: 1;
16893 unsigned G3RIS15
: 1;
16895 } __COG3RIS1bits_t
;
16897 extern __at(0x0816) volatile __COG3RIS1bits_t COG3RIS1bits
;
16899 #define _COG3RIS1_RIS9 0x02
16900 #define _COG3RIS1_G3RIS9 0x02
16901 #define _COG3RIS1_RIS11 0x08
16902 #define _COG3RIS1_G3RIS11 0x08
16903 #define _COG3RIS1_RIS12 0x10
16904 #define _COG3RIS1_G3RIS12 0x10
16905 #define _COG3RIS1_RIS13 0x20
16906 #define _COG3RIS1_G3RIS13 0x20
16907 #define _COG3RIS1_RIS14 0x40
16908 #define _COG3RIS1_G3RIS14 0x40
16909 #define _COG3RIS1_RIS15 0x80
16910 #define _COG3RIS1_G3RIS15 0x80
16912 //==============================================================================
16915 //==============================================================================
16918 extern __at(0x0817) __sfr COG3RSIM0
;
16924 unsigned RSIM0
: 1;
16925 unsigned RSIM1
: 1;
16926 unsigned RSIM2
: 1;
16927 unsigned RSIM3
: 1;
16928 unsigned RSIM4
: 1;
16929 unsigned RSIM5
: 1;
16930 unsigned RSIM6
: 1;
16931 unsigned RSIM7
: 1;
16936 unsigned G3RSIM0
: 1;
16937 unsigned G3RSIM1
: 1;
16938 unsigned G3RSIM2
: 1;
16939 unsigned G3RSIM3
: 1;
16940 unsigned G3RSIM4
: 1;
16941 unsigned G3RSIM5
: 1;
16942 unsigned G3RSIM6
: 1;
16943 unsigned G3RSIM7
: 1;
16945 } __COG3RSIM0bits_t
;
16947 extern __at(0x0817) volatile __COG3RSIM0bits_t COG3RSIM0bits
;
16949 #define _COG3RSIM0_RSIM0 0x01
16950 #define _COG3RSIM0_G3RSIM0 0x01
16951 #define _COG3RSIM0_RSIM1 0x02
16952 #define _COG3RSIM0_G3RSIM1 0x02
16953 #define _COG3RSIM0_RSIM2 0x04
16954 #define _COG3RSIM0_G3RSIM2 0x04
16955 #define _COG3RSIM0_RSIM3 0x08
16956 #define _COG3RSIM0_G3RSIM3 0x08
16957 #define _COG3RSIM0_RSIM4 0x10
16958 #define _COG3RSIM0_G3RSIM4 0x10
16959 #define _COG3RSIM0_RSIM5 0x20
16960 #define _COG3RSIM0_G3RSIM5 0x20
16961 #define _COG3RSIM0_RSIM6 0x40
16962 #define _COG3RSIM0_G3RSIM6 0x40
16963 #define _COG3RSIM0_RSIM7 0x80
16964 #define _COG3RSIM0_G3RSIM7 0x80
16966 //==============================================================================
16969 //==============================================================================
16972 extern __at(0x0818) __sfr COG3RSIM1
;
16979 unsigned RSIM9
: 1;
16981 unsigned RSIM11
: 1;
16982 unsigned RSIM12
: 1;
16983 unsigned RSIM13
: 1;
16984 unsigned RSIM14
: 1;
16985 unsigned RSIM15
: 1;
16991 unsigned G3RSIM9
: 1;
16993 unsigned G3RSIM11
: 1;
16994 unsigned G3RSIM12
: 1;
16995 unsigned G3RSIM13
: 1;
16996 unsigned G3RSIM14
: 1;
16997 unsigned G3RSIM15
: 1;
16999 } __COG3RSIM1bits_t
;
17001 extern __at(0x0818) volatile __COG3RSIM1bits_t COG3RSIM1bits
;
17003 #define _COG3RSIM1_RSIM9 0x02
17004 #define _COG3RSIM1_G3RSIM9 0x02
17005 #define _COG3RSIM1_RSIM11 0x08
17006 #define _COG3RSIM1_G3RSIM11 0x08
17007 #define _COG3RSIM1_RSIM12 0x10
17008 #define _COG3RSIM1_G3RSIM12 0x10
17009 #define _COG3RSIM1_RSIM13 0x20
17010 #define _COG3RSIM1_G3RSIM13 0x20
17011 #define _COG3RSIM1_RSIM14 0x40
17012 #define _COG3RSIM1_G3RSIM14 0x40
17013 #define _COG3RSIM1_RSIM15 0x80
17014 #define _COG3RSIM1_G3RSIM15 0x80
17016 //==============================================================================
17019 //==============================================================================
17022 extern __at(0x0819) __sfr COG3FIS0
;
17040 unsigned G3FIS0
: 1;
17041 unsigned G3FIS1
: 1;
17042 unsigned G3FIS2
: 1;
17043 unsigned G3FIS3
: 1;
17044 unsigned G3FIS4
: 1;
17045 unsigned G3FIS5
: 1;
17046 unsigned G3FIS6
: 1;
17047 unsigned G3FIS7
: 1;
17049 } __COG3FIS0bits_t
;
17051 extern __at(0x0819) volatile __COG3FIS0bits_t COG3FIS0bits
;
17053 #define _COG3FIS0_FIS0 0x01
17054 #define _COG3FIS0_G3FIS0 0x01
17055 #define _COG3FIS0_FIS1 0x02
17056 #define _COG3FIS0_G3FIS1 0x02
17057 #define _COG3FIS0_FIS2 0x04
17058 #define _COG3FIS0_G3FIS2 0x04
17059 #define _COG3FIS0_FIS3 0x08
17060 #define _COG3FIS0_G3FIS3 0x08
17061 #define _COG3FIS0_FIS4 0x10
17062 #define _COG3FIS0_G3FIS4 0x10
17063 #define _COG3FIS0_FIS5 0x20
17064 #define _COG3FIS0_G3FIS5 0x20
17065 #define _COG3FIS0_FIS6 0x40
17066 #define _COG3FIS0_G3FIS6 0x40
17067 #define _COG3FIS0_FIS7 0x80
17068 #define _COG3FIS0_G3FIS7 0x80
17070 //==============================================================================
17073 //==============================================================================
17076 extern __at(0x081A) __sfr COG3FIS1
;
17085 unsigned FIS11
: 1;
17086 unsigned FIS12
: 1;
17087 unsigned FIS13
: 1;
17088 unsigned FIS14
: 1;
17089 unsigned FIS15
: 1;
17095 unsigned G3FIS9
: 1;
17097 unsigned G3FIS11
: 1;
17098 unsigned G3FIS12
: 1;
17099 unsigned G3FIS13
: 1;
17100 unsigned G3FIS14
: 1;
17101 unsigned G3FIS15
: 1;
17103 } __COG3FIS1bits_t
;
17105 extern __at(0x081A) volatile __COG3FIS1bits_t COG3FIS1bits
;
17107 #define _COG3FIS1_FIS9 0x02
17108 #define _COG3FIS1_G3FIS9 0x02
17109 #define _COG3FIS1_FIS11 0x08
17110 #define _COG3FIS1_G3FIS11 0x08
17111 #define _COG3FIS1_FIS12 0x10
17112 #define _COG3FIS1_G3FIS12 0x10
17113 #define _COG3FIS1_FIS13 0x20
17114 #define _COG3FIS1_G3FIS13 0x20
17115 #define _COG3FIS1_FIS14 0x40
17116 #define _COG3FIS1_G3FIS14 0x40
17117 #define _COG3FIS1_FIS15 0x80
17118 #define _COG3FIS1_G3FIS15 0x80
17120 //==============================================================================
17123 //==============================================================================
17126 extern __at(0x081B) __sfr COG3FSIM0
;
17132 unsigned FSIM0
: 1;
17133 unsigned FSIM1
: 1;
17134 unsigned FSIM2
: 1;
17135 unsigned FSIM3
: 1;
17136 unsigned FSIM4
: 1;
17137 unsigned FSIM5
: 1;
17138 unsigned FSIM6
: 1;
17139 unsigned FSIM7
: 1;
17144 unsigned G3FSIM0
: 1;
17145 unsigned G3FSIM1
: 1;
17146 unsigned G3FSIM2
: 1;
17147 unsigned G3FSIM3
: 1;
17148 unsigned G3FSIM4
: 1;
17149 unsigned G3FSIM5
: 1;
17150 unsigned G3FSIM6
: 1;
17151 unsigned G3FSIM7
: 1;
17153 } __COG3FSIM0bits_t
;
17155 extern __at(0x081B) volatile __COG3FSIM0bits_t COG3FSIM0bits
;
17157 #define _COG3FSIM0_FSIM0 0x01
17158 #define _COG3FSIM0_G3FSIM0 0x01
17159 #define _COG3FSIM0_FSIM1 0x02
17160 #define _COG3FSIM0_G3FSIM1 0x02
17161 #define _COG3FSIM0_FSIM2 0x04
17162 #define _COG3FSIM0_G3FSIM2 0x04
17163 #define _COG3FSIM0_FSIM3 0x08
17164 #define _COG3FSIM0_G3FSIM3 0x08
17165 #define _COG3FSIM0_FSIM4 0x10
17166 #define _COG3FSIM0_G3FSIM4 0x10
17167 #define _COG3FSIM0_FSIM5 0x20
17168 #define _COG3FSIM0_G3FSIM5 0x20
17169 #define _COG3FSIM0_FSIM6 0x40
17170 #define _COG3FSIM0_G3FSIM6 0x40
17171 #define _COG3FSIM0_FSIM7 0x80
17172 #define _COG3FSIM0_G3FSIM7 0x80
17174 //==============================================================================
17177 //==============================================================================
17180 extern __at(0x081C) __sfr COG3FSIM1
;
17187 unsigned FSIM9
: 1;
17189 unsigned FSIM11
: 1;
17190 unsigned FSIM12
: 1;
17191 unsigned FSIM13
: 1;
17192 unsigned FSIM14
: 1;
17193 unsigned FSIM15
: 1;
17199 unsigned G3FSIM9
: 1;
17201 unsigned G3FSIM11
: 1;
17202 unsigned G3FSIM12
: 1;
17203 unsigned G3FSIM13
: 1;
17204 unsigned G3FSIM14
: 1;
17205 unsigned G3FSIM15
: 1;
17207 } __COG3FSIM1bits_t
;
17209 extern __at(0x081C) volatile __COG3FSIM1bits_t COG3FSIM1bits
;
17211 #define _COG3FSIM1_FSIM9 0x02
17212 #define _COG3FSIM1_G3FSIM9 0x02
17213 #define _COG3FSIM1_FSIM11 0x08
17214 #define _COG3FSIM1_G3FSIM11 0x08
17215 #define _COG3FSIM1_FSIM12 0x10
17216 #define _COG3FSIM1_G3FSIM12 0x10
17217 #define _COG3FSIM1_FSIM13 0x20
17218 #define _COG3FSIM1_G3FSIM13 0x20
17219 #define _COG3FSIM1_FSIM14 0x40
17220 #define _COG3FSIM1_G3FSIM14 0x40
17221 #define _COG3FSIM1_FSIM15 0x80
17222 #define _COG3FSIM1_G3FSIM15 0x80
17224 //==============================================================================
17227 //==============================================================================
17230 extern __at(0x081D) __sfr COG3ASD0
;
17238 unsigned ASDAC0
: 1;
17239 unsigned ASDAC1
: 1;
17240 unsigned ASDBD0
: 1;
17241 unsigned ASDBD1
: 1;
17242 unsigned ASREN
: 1;
17250 unsigned G3ASDAC0
: 1;
17251 unsigned G3ASDAC1
: 1;
17252 unsigned G3ASDBD0
: 1;
17253 unsigned G3ASDBD1
: 1;
17254 unsigned ARSEN
: 1;
17255 unsigned G3ASE
: 1;
17266 unsigned G3ARSEN
: 1;
17278 unsigned G3ASREN
: 1;
17285 unsigned G3ASDAC
: 2;
17292 unsigned ASDAC
: 2;
17299 unsigned G3ASDBD
: 2;
17306 unsigned ASDBD
: 2;
17309 } __COG3ASD0bits_t
;
17311 extern __at(0x081D) volatile __COG3ASD0bits_t COG3ASD0bits
;
17313 #define _COG3ASD0_ASDAC0 0x04
17314 #define _COG3ASD0_G3ASDAC0 0x04
17315 #define _COG3ASD0_ASDAC1 0x08
17316 #define _COG3ASD0_G3ASDAC1 0x08
17317 #define _COG3ASD0_ASDBD0 0x10
17318 #define _COG3ASD0_G3ASDBD0 0x10
17319 #define _COG3ASD0_ASDBD1 0x20
17320 #define _COG3ASD0_G3ASDBD1 0x20
17321 #define _COG3ASD0_ASREN 0x40
17322 #define _COG3ASD0_ARSEN 0x40
17323 #define _COG3ASD0_G3ARSEN 0x40
17324 #define _COG3ASD0_G3ASREN 0x40
17325 #define _COG3ASD0_ASE 0x80
17326 #define _COG3ASD0_G3ASE 0x80
17328 //==============================================================================
17331 //==============================================================================
17334 extern __at(0x081E) __sfr COG3ASD1
;
17352 unsigned G3AS0E
: 1;
17353 unsigned G3AS1E
: 1;
17354 unsigned G3AS2E
: 1;
17355 unsigned G3AS3E
: 1;
17356 unsigned G3AS4E
: 1;
17357 unsigned G3AS5E
: 1;
17358 unsigned G3AS6E
: 1;
17359 unsigned G3AS7E
: 1;
17361 } __COG3ASD1bits_t
;
17363 extern __at(0x081E) volatile __COG3ASD1bits_t COG3ASD1bits
;
17365 #define _COG3ASD1_AS0E 0x01
17366 #define _COG3ASD1_G3AS0E 0x01
17367 #define _COG3ASD1_AS1E 0x02
17368 #define _COG3ASD1_G3AS1E 0x02
17369 #define _COG3ASD1_AS2E 0x04
17370 #define _COG3ASD1_G3AS2E 0x04
17371 #define _COG3ASD1_AS3E 0x08
17372 #define _COG3ASD1_G3AS3E 0x08
17373 #define _COG3ASD1_AS4E 0x10
17374 #define _COG3ASD1_G3AS4E 0x10
17375 #define _COG3ASD1_AS5E 0x20
17376 #define _COG3ASD1_G3AS5E 0x20
17377 #define _COG3ASD1_AS6E 0x40
17378 #define _COG3ASD1_G3AS6E 0x40
17379 #define _COG3ASD1_AS7E 0x80
17380 #define _COG3ASD1_G3AS7E 0x80
17382 //==============================================================================
17385 //==============================================================================
17388 extern __at(0x081F) __sfr COG3STR
;
17398 unsigned SDATA
: 1;
17399 unsigned SDATB
: 1;
17400 unsigned SDATC
: 1;
17401 unsigned SDATD
: 1;
17406 unsigned G3STRA
: 1;
17407 unsigned G3STRB
: 1;
17408 unsigned G3STRC
: 1;
17409 unsigned G3STRD
: 1;
17410 unsigned G3SDATA
: 1;
17411 unsigned G3SDATB
: 1;
17412 unsigned G3SDATC
: 1;
17413 unsigned G3SDATD
: 1;
17417 extern __at(0x081F) volatile __COG3STRbits_t COG3STRbits
;
17419 #define _COG3STR_STRA 0x01
17420 #define _COG3STR_G3STRA 0x01
17421 #define _COG3STR_STRB 0x02
17422 #define _COG3STR_G3STRB 0x02
17423 #define _COG3STR_STRC 0x04
17424 #define _COG3STR_G3STRC 0x04
17425 #define _COG3STR_STRD 0x08
17426 #define _COG3STR_G3STRD 0x08
17427 #define _COG3STR_SDATA 0x10
17428 #define _COG3STR_G3SDATA 0x10
17429 #define _COG3STR_SDATB 0x20
17430 #define _COG3STR_G3SDATB 0x20
17431 #define _COG3STR_SDATC 0x40
17432 #define _COG3STR_G3SDATC 0x40
17433 #define _COG3STR_SDATD 0x80
17434 #define _COG3STR_G3SDATD 0x80
17436 //==============================================================================
17439 //==============================================================================
17442 extern __at(0x088D) __sfr COG4PHR
;
17460 unsigned G4PHR0
: 1;
17461 unsigned G4PHR1
: 1;
17462 unsigned G4PHR2
: 1;
17463 unsigned G4PHR3
: 1;
17464 unsigned G4PHR4
: 1;
17465 unsigned G4PHR5
: 1;
17478 unsigned G4PHR
: 6;
17483 extern __at(0x088D) volatile __COG4PHRbits_t COG4PHRbits
;
17485 #define _COG4PHR_PHR0 0x01
17486 #define _COG4PHR_G4PHR0 0x01
17487 #define _COG4PHR_PHR1 0x02
17488 #define _COG4PHR_G4PHR1 0x02
17489 #define _COG4PHR_PHR2 0x04
17490 #define _COG4PHR_G4PHR2 0x04
17491 #define _COG4PHR_PHR3 0x08
17492 #define _COG4PHR_G4PHR3 0x08
17493 #define _COG4PHR_PHR4 0x10
17494 #define _COG4PHR_G4PHR4 0x10
17495 #define _COG4PHR_PHR5 0x20
17496 #define _COG4PHR_G4PHR5 0x20
17498 //==============================================================================
17501 //==============================================================================
17504 extern __at(0x088E) __sfr COG4PHF
;
17522 unsigned G4PHF0
: 1;
17523 unsigned G4PHF1
: 1;
17524 unsigned G4PHF2
: 1;
17525 unsigned G4PHF3
: 1;
17526 unsigned G4PHF4
: 1;
17527 unsigned G4PHF5
: 1;
17534 unsigned G4PHF
: 6;
17545 extern __at(0x088E) volatile __COG4PHFbits_t COG4PHFbits
;
17547 #define _COG4PHF_PHF0 0x01
17548 #define _COG4PHF_G4PHF0 0x01
17549 #define _COG4PHF_PHF1 0x02
17550 #define _COG4PHF_G4PHF1 0x02
17551 #define _COG4PHF_PHF2 0x04
17552 #define _COG4PHF_G4PHF2 0x04
17553 #define _COG4PHF_PHF3 0x08
17554 #define _COG4PHF_G4PHF3 0x08
17555 #define _COG4PHF_PHF4 0x10
17556 #define _COG4PHF_G4PHF4 0x10
17557 #define _COG4PHF_PHF5 0x20
17558 #define _COG4PHF_G4PHF5 0x20
17560 //==============================================================================
17563 //==============================================================================
17566 extern __at(0x088F) __sfr COG4BLKR
;
17572 unsigned BLKR0
: 1;
17573 unsigned BLKR1
: 1;
17574 unsigned BLKR2
: 1;
17575 unsigned BLKR3
: 1;
17576 unsigned BLKR4
: 1;
17577 unsigned BLKR5
: 1;
17584 unsigned G4BLKR0
: 1;
17585 unsigned G4BLKR1
: 1;
17586 unsigned G4BLKR2
: 1;
17587 unsigned G4BLKR3
: 1;
17588 unsigned G4BLKR4
: 1;
17589 unsigned G4BLKR5
: 1;
17596 unsigned G4BLKR
: 6;
17605 } __COG4BLKRbits_t
;
17607 extern __at(0x088F) volatile __COG4BLKRbits_t COG4BLKRbits
;
17609 #define _COG4BLKR_BLKR0 0x01
17610 #define _COG4BLKR_G4BLKR0 0x01
17611 #define _COG4BLKR_BLKR1 0x02
17612 #define _COG4BLKR_G4BLKR1 0x02
17613 #define _COG4BLKR_BLKR2 0x04
17614 #define _COG4BLKR_G4BLKR2 0x04
17615 #define _COG4BLKR_BLKR3 0x08
17616 #define _COG4BLKR_G4BLKR3 0x08
17617 #define _COG4BLKR_BLKR4 0x10
17618 #define _COG4BLKR_G4BLKR4 0x10
17619 #define _COG4BLKR_BLKR5 0x20
17620 #define _COG4BLKR_G4BLKR5 0x20
17622 //==============================================================================
17625 //==============================================================================
17628 extern __at(0x0890) __sfr COG4BLKF
;
17634 unsigned BLKF0
: 1;
17635 unsigned BLKF1
: 1;
17636 unsigned BLKF2
: 1;
17637 unsigned BLKF3
: 1;
17638 unsigned BLKF4
: 1;
17639 unsigned BLKF5
: 1;
17646 unsigned G4BLKF0
: 1;
17647 unsigned G4BLKF1
: 1;
17648 unsigned G4BLKF2
: 1;
17649 unsigned G4BLKF3
: 1;
17650 unsigned G4BLKF4
: 1;
17651 unsigned G4BLKF5
: 1;
17658 unsigned G4BLKF
: 6;
17667 } __COG4BLKFbits_t
;
17669 extern __at(0x0890) volatile __COG4BLKFbits_t COG4BLKFbits
;
17671 #define _COG4BLKF_BLKF0 0x01
17672 #define _COG4BLKF_G4BLKF0 0x01
17673 #define _COG4BLKF_BLKF1 0x02
17674 #define _COG4BLKF_G4BLKF1 0x02
17675 #define _COG4BLKF_BLKF2 0x04
17676 #define _COG4BLKF_G4BLKF2 0x04
17677 #define _COG4BLKF_BLKF3 0x08
17678 #define _COG4BLKF_G4BLKF3 0x08
17679 #define _COG4BLKF_BLKF4 0x10
17680 #define _COG4BLKF_G4BLKF4 0x10
17681 #define _COG4BLKF_BLKF5 0x20
17682 #define _COG4BLKF_G4BLKF5 0x20
17684 //==============================================================================
17687 //==============================================================================
17690 extern __at(0x0891) __sfr COG4DBR
;
17708 unsigned G4DBR0
: 1;
17709 unsigned G4DBR1
: 1;
17710 unsigned G4DBR2
: 1;
17711 unsigned G4DBR3
: 1;
17712 unsigned G4DBR4
: 1;
17713 unsigned G4DBR5
: 1;
17720 unsigned G4DBR
: 6;
17731 extern __at(0x0891) volatile __COG4DBRbits_t COG4DBRbits
;
17733 #define _COG4DBR_DBR0 0x01
17734 #define _COG4DBR_G4DBR0 0x01
17735 #define _COG4DBR_DBR1 0x02
17736 #define _COG4DBR_G4DBR1 0x02
17737 #define _COG4DBR_DBR2 0x04
17738 #define _COG4DBR_G4DBR2 0x04
17739 #define _COG4DBR_DBR3 0x08
17740 #define _COG4DBR_G4DBR3 0x08
17741 #define _COG4DBR_DBR4 0x10
17742 #define _COG4DBR_G4DBR4 0x10
17743 #define _COG4DBR_DBR5 0x20
17744 #define _COG4DBR_G4DBR5 0x20
17746 //==============================================================================
17749 //==============================================================================
17752 extern __at(0x0892) __sfr COG4DBF
;
17770 unsigned G4DBF0
: 1;
17771 unsigned G4DBF1
: 1;
17772 unsigned G4DBF2
: 1;
17773 unsigned G4DBF3
: 1;
17774 unsigned G4DBF4
: 1;
17775 unsigned G4DBF5
: 1;
17788 unsigned G4DBF
: 6;
17793 extern __at(0x0892) volatile __COG4DBFbits_t COG4DBFbits
;
17795 #define _COG4DBF_DBF0 0x01
17796 #define _COG4DBF_G4DBF0 0x01
17797 #define _COG4DBF_DBF1 0x02
17798 #define _COG4DBF_G4DBF1 0x02
17799 #define _COG4DBF_DBF2 0x04
17800 #define _COG4DBF_G4DBF2 0x04
17801 #define _COG4DBF_DBF3 0x08
17802 #define _COG4DBF_G4DBF3 0x08
17803 #define _COG4DBF_DBF4 0x10
17804 #define _COG4DBF_G4DBF4 0x10
17805 #define _COG4DBF_DBF5 0x20
17806 #define _COG4DBF_G4DBF5 0x20
17808 //==============================================================================
17811 //==============================================================================
17814 extern __at(0x0893) __sfr COG4CON0
;
17832 unsigned G4MD0
: 1;
17833 unsigned G4MD1
: 1;
17834 unsigned G4MD2
: 1;
17835 unsigned G4CS0
: 1;
17836 unsigned G4CS1
: 1;
17867 } __COG4CON0bits_t
;
17869 extern __at(0x0893) volatile __COG4CON0bits_t COG4CON0bits
;
17871 #define _COG4CON0_MD0 0x01
17872 #define _COG4CON0_G4MD0 0x01
17873 #define _COG4CON0_MD1 0x02
17874 #define _COG4CON0_G4MD1 0x02
17875 #define _COG4CON0_MD2 0x04
17876 #define _COG4CON0_G4MD2 0x04
17877 #define _COG4CON0_CS0 0x08
17878 #define _COG4CON0_G4CS0 0x08
17879 #define _COG4CON0_CS1 0x10
17880 #define _COG4CON0_G4CS1 0x10
17881 #define _COG4CON0_LD 0x40
17882 #define _COG4CON0_G4LD 0x40
17883 #define _COG4CON0_EN 0x80
17884 #define _COG4CON0_G4EN 0x80
17886 //==============================================================================
17889 //==============================================================================
17892 extern __at(0x0894) __sfr COG4CON1
;
17910 unsigned G4POLA
: 1;
17911 unsigned G4POLB
: 1;
17912 unsigned G4POLC
: 1;
17913 unsigned G4POLD
: 1;
17916 unsigned G4FDBS
: 1;
17917 unsigned G4RDBS
: 1;
17919 } __COG4CON1bits_t
;
17921 extern __at(0x0894) volatile __COG4CON1bits_t COG4CON1bits
;
17923 #define _COG4CON1_POLA 0x01
17924 #define _COG4CON1_G4POLA 0x01
17925 #define _COG4CON1_POLB 0x02
17926 #define _COG4CON1_G4POLB 0x02
17927 #define _COG4CON1_POLC 0x04
17928 #define _COG4CON1_G4POLC 0x04
17929 #define _COG4CON1_POLD 0x08
17930 #define _COG4CON1_G4POLD 0x08
17931 #define _COG4CON1_FDBS 0x40
17932 #define _COG4CON1_G4FDBS 0x40
17933 #define _COG4CON1_RDBS 0x80
17934 #define _COG4CON1_G4RDBS 0x80
17936 //==============================================================================
17939 //==============================================================================
17942 extern __at(0x0895) __sfr COG4RIS0
;
17960 unsigned G4RIS0
: 1;
17961 unsigned G4RIS1
: 1;
17962 unsigned G4RIS2
: 1;
17963 unsigned G4RIS3
: 1;
17964 unsigned G4RIS4
: 1;
17965 unsigned G4RIS5
: 1;
17966 unsigned G4RIS6
: 1;
17967 unsigned G4RIS7
: 1;
17969 } __COG4RIS0bits_t
;
17971 extern __at(0x0895) volatile __COG4RIS0bits_t COG4RIS0bits
;
17973 #define _COG4RIS0_RIS0 0x01
17974 #define _COG4RIS0_G4RIS0 0x01
17975 #define _COG4RIS0_RIS1 0x02
17976 #define _COG4RIS0_G4RIS1 0x02
17977 #define _COG4RIS0_RIS2 0x04
17978 #define _COG4RIS0_G4RIS2 0x04
17979 #define _COG4RIS0_RIS3 0x08
17980 #define _COG4RIS0_G4RIS3 0x08
17981 #define _COG4RIS0_RIS4 0x10
17982 #define _COG4RIS0_G4RIS4 0x10
17983 #define _COG4RIS0_RIS5 0x20
17984 #define _COG4RIS0_G4RIS5 0x20
17985 #define _COG4RIS0_RIS6 0x40
17986 #define _COG4RIS0_G4RIS6 0x40
17987 #define _COG4RIS0_RIS7 0x80
17988 #define _COG4RIS0_G4RIS7 0x80
17990 //==============================================================================
17993 //==============================================================================
17996 extern __at(0x0896) __sfr COG4RIS1
;
18004 unsigned RIS10
: 1;
18005 unsigned RIS11
: 1;
18006 unsigned RIS12
: 1;
18007 unsigned RIS13
: 1;
18008 unsigned RIS14
: 1;
18009 unsigned RIS15
: 1;
18014 unsigned G4RIS8
: 1;
18015 unsigned G4RIS9
: 1;
18016 unsigned G4RIS10
: 1;
18017 unsigned G4RIS11
: 1;
18018 unsigned G4RIS12
: 1;
18019 unsigned G4RIS13
: 1;
18020 unsigned G4RIS14
: 1;
18021 unsigned G4RIS15
: 1;
18023 } __COG4RIS1bits_t
;
18025 extern __at(0x0896) volatile __COG4RIS1bits_t COG4RIS1bits
;
18027 #define _COG4RIS1_RIS8 0x01
18028 #define _COG4RIS1_G4RIS8 0x01
18029 #define _COG4RIS1_RIS9 0x02
18030 #define _COG4RIS1_G4RIS9 0x02
18031 #define _COG4RIS1_RIS10 0x04
18032 #define _COG4RIS1_G4RIS10 0x04
18033 #define _COG4RIS1_RIS11 0x08
18034 #define _COG4RIS1_G4RIS11 0x08
18035 #define _COG4RIS1_RIS12 0x10
18036 #define _COG4RIS1_G4RIS12 0x10
18037 #define _COG4RIS1_RIS13 0x20
18038 #define _COG4RIS1_G4RIS13 0x20
18039 #define _COG4RIS1_RIS14 0x40
18040 #define _COG4RIS1_G4RIS14 0x40
18041 #define _COG4RIS1_RIS15 0x80
18042 #define _COG4RIS1_G4RIS15 0x80
18044 //==============================================================================
18047 //==============================================================================
18050 extern __at(0x0897) __sfr COG4RSIM0
;
18056 unsigned RSIM0
: 1;
18057 unsigned RSIM1
: 1;
18058 unsigned RSIM2
: 1;
18059 unsigned RSIM3
: 1;
18060 unsigned RSIM4
: 1;
18061 unsigned RSIM5
: 1;
18062 unsigned RSIM6
: 1;
18063 unsigned RSIM7
: 1;
18068 unsigned G4RSIM0
: 1;
18069 unsigned G4RSIM1
: 1;
18070 unsigned G4RSIM2
: 1;
18071 unsigned G4RSIM3
: 1;
18072 unsigned G4RSIM4
: 1;
18073 unsigned G4RSIM5
: 1;
18074 unsigned G4RSIM6
: 1;
18075 unsigned G4RSIM7
: 1;
18077 } __COG4RSIM0bits_t
;
18079 extern __at(0x0897) volatile __COG4RSIM0bits_t COG4RSIM0bits
;
18081 #define _COG4RSIM0_RSIM0 0x01
18082 #define _COG4RSIM0_G4RSIM0 0x01
18083 #define _COG4RSIM0_RSIM1 0x02
18084 #define _COG4RSIM0_G4RSIM1 0x02
18085 #define _COG4RSIM0_RSIM2 0x04
18086 #define _COG4RSIM0_G4RSIM2 0x04
18087 #define _COG4RSIM0_RSIM3 0x08
18088 #define _COG4RSIM0_G4RSIM3 0x08
18089 #define _COG4RSIM0_RSIM4 0x10
18090 #define _COG4RSIM0_G4RSIM4 0x10
18091 #define _COG4RSIM0_RSIM5 0x20
18092 #define _COG4RSIM0_G4RSIM5 0x20
18093 #define _COG4RSIM0_RSIM6 0x40
18094 #define _COG4RSIM0_G4RSIM6 0x40
18095 #define _COG4RSIM0_RSIM7 0x80
18096 #define _COG4RSIM0_G4RSIM7 0x80
18098 //==============================================================================
18101 //==============================================================================
18104 extern __at(0x0898) __sfr COG4RSIM1
;
18110 unsigned RSIM8
: 1;
18111 unsigned RSIM9
: 1;
18112 unsigned RSIM10
: 1;
18113 unsigned RSIM11
: 1;
18114 unsigned RSIM12
: 1;
18115 unsigned RSIM13
: 1;
18116 unsigned RSIM14
: 1;
18117 unsigned RSIM15
: 1;
18122 unsigned G4RSIM8
: 1;
18123 unsigned G4RSIM9
: 1;
18124 unsigned G4RSIM10
: 1;
18125 unsigned G4RSIM11
: 1;
18126 unsigned G4RSIM12
: 1;
18127 unsigned G4RSIM13
: 1;
18128 unsigned G4RSIM14
: 1;
18129 unsigned G4RSIM15
: 1;
18131 } __COG4RSIM1bits_t
;
18133 extern __at(0x0898) volatile __COG4RSIM1bits_t COG4RSIM1bits
;
18135 #define _COG4RSIM1_RSIM8 0x01
18136 #define _COG4RSIM1_G4RSIM8 0x01
18137 #define _COG4RSIM1_RSIM9 0x02
18138 #define _COG4RSIM1_G4RSIM9 0x02
18139 #define _COG4RSIM1_RSIM10 0x04
18140 #define _COG4RSIM1_G4RSIM10 0x04
18141 #define _COG4RSIM1_RSIM11 0x08
18142 #define _COG4RSIM1_G4RSIM11 0x08
18143 #define _COG4RSIM1_RSIM12 0x10
18144 #define _COG4RSIM1_G4RSIM12 0x10
18145 #define _COG4RSIM1_RSIM13 0x20
18146 #define _COG4RSIM1_G4RSIM13 0x20
18147 #define _COG4RSIM1_RSIM14 0x40
18148 #define _COG4RSIM1_G4RSIM14 0x40
18149 #define _COG4RSIM1_RSIM15 0x80
18150 #define _COG4RSIM1_G4RSIM15 0x80
18152 //==============================================================================
18155 //==============================================================================
18158 extern __at(0x0899) __sfr COG4FIS0
;
18176 unsigned G4FIS0
: 1;
18177 unsigned G4FIS1
: 1;
18178 unsigned G4FIS2
: 1;
18179 unsigned G4FIS3
: 1;
18180 unsigned G4FIS4
: 1;
18181 unsigned G4FIS5
: 1;
18182 unsigned G4FIS6
: 1;
18183 unsigned G4FIS7
: 1;
18185 } __COG4FIS0bits_t
;
18187 extern __at(0x0899) volatile __COG4FIS0bits_t COG4FIS0bits
;
18189 #define _COG4FIS0_FIS0 0x01
18190 #define _COG4FIS0_G4FIS0 0x01
18191 #define _COG4FIS0_FIS1 0x02
18192 #define _COG4FIS0_G4FIS1 0x02
18193 #define _COG4FIS0_FIS2 0x04
18194 #define _COG4FIS0_G4FIS2 0x04
18195 #define _COG4FIS0_FIS3 0x08
18196 #define _COG4FIS0_G4FIS3 0x08
18197 #define _COG4FIS0_FIS4 0x10
18198 #define _COG4FIS0_G4FIS4 0x10
18199 #define _COG4FIS0_FIS5 0x20
18200 #define _COG4FIS0_G4FIS5 0x20
18201 #define _COG4FIS0_FIS6 0x40
18202 #define _COG4FIS0_G4FIS6 0x40
18203 #define _COG4FIS0_FIS7 0x80
18204 #define _COG4FIS0_G4FIS7 0x80
18206 //==============================================================================
18209 //==============================================================================
18212 extern __at(0x089A) __sfr COG4FIS1
;
18220 unsigned FIS10
: 1;
18221 unsigned FIS11
: 1;
18222 unsigned FIS12
: 1;
18223 unsigned FIS13
: 1;
18224 unsigned FIS14
: 1;
18225 unsigned FIS15
: 1;
18230 unsigned G4FIS8
: 1;
18231 unsigned G4FIS9
: 1;
18232 unsigned G4FIS10
: 1;
18233 unsigned G4FIS11
: 1;
18234 unsigned G4FIS12
: 1;
18235 unsigned G4FIS13
: 1;
18236 unsigned G4FIS14
: 1;
18237 unsigned G4FIS15
: 1;
18239 } __COG4FIS1bits_t
;
18241 extern __at(0x089A) volatile __COG4FIS1bits_t COG4FIS1bits
;
18243 #define _COG4FIS1_FIS8 0x01
18244 #define _COG4FIS1_G4FIS8 0x01
18245 #define _COG4FIS1_FIS9 0x02
18246 #define _COG4FIS1_G4FIS9 0x02
18247 #define _COG4FIS1_FIS10 0x04
18248 #define _COG4FIS1_G4FIS10 0x04
18249 #define _COG4FIS1_FIS11 0x08
18250 #define _COG4FIS1_G4FIS11 0x08
18251 #define _COG4FIS1_FIS12 0x10
18252 #define _COG4FIS1_G4FIS12 0x10
18253 #define _COG4FIS1_FIS13 0x20
18254 #define _COG4FIS1_G4FIS13 0x20
18255 #define _COG4FIS1_FIS14 0x40
18256 #define _COG4FIS1_G4FIS14 0x40
18257 #define _COG4FIS1_FIS15 0x80
18258 #define _COG4FIS1_G4FIS15 0x80
18260 //==============================================================================
18263 //==============================================================================
18266 extern __at(0x089B) __sfr COG4FSIM0
;
18272 unsigned FSIM0
: 1;
18273 unsigned FSIM1
: 1;
18274 unsigned FSIM2
: 1;
18275 unsigned FSIM3
: 1;
18276 unsigned FSIM4
: 1;
18277 unsigned FSIM5
: 1;
18278 unsigned FSIM6
: 1;
18279 unsigned FSIM7
: 1;
18284 unsigned G4FSIM0
: 1;
18285 unsigned G4FSIM1
: 1;
18286 unsigned G4FSIM2
: 1;
18287 unsigned G4FSIM3
: 1;
18288 unsigned G4FSIM4
: 1;
18289 unsigned G4FSIM5
: 1;
18290 unsigned G4FSIM6
: 1;
18291 unsigned G4FSIM7
: 1;
18293 } __COG4FSIM0bits_t
;
18295 extern __at(0x089B) volatile __COG4FSIM0bits_t COG4FSIM0bits
;
18297 #define _COG4FSIM0_FSIM0 0x01
18298 #define _COG4FSIM0_G4FSIM0 0x01
18299 #define _COG4FSIM0_FSIM1 0x02
18300 #define _COG4FSIM0_G4FSIM1 0x02
18301 #define _COG4FSIM0_FSIM2 0x04
18302 #define _COG4FSIM0_G4FSIM2 0x04
18303 #define _COG4FSIM0_FSIM3 0x08
18304 #define _COG4FSIM0_G4FSIM3 0x08
18305 #define _COG4FSIM0_FSIM4 0x10
18306 #define _COG4FSIM0_G4FSIM4 0x10
18307 #define _COG4FSIM0_FSIM5 0x20
18308 #define _COG4FSIM0_G4FSIM5 0x20
18309 #define _COG4FSIM0_FSIM6 0x40
18310 #define _COG4FSIM0_G4FSIM6 0x40
18311 #define _COG4FSIM0_FSIM7 0x80
18312 #define _COG4FSIM0_G4FSIM7 0x80
18314 //==============================================================================
18317 //==============================================================================
18320 extern __at(0x089C) __sfr COG4FSIM1
;
18326 unsigned FSIM8
: 1;
18327 unsigned FSIM9
: 1;
18328 unsigned FSIM10
: 1;
18329 unsigned FSIM11
: 1;
18330 unsigned FSIM12
: 1;
18331 unsigned FSIM13
: 1;
18332 unsigned FSIM14
: 1;
18333 unsigned FSIM15
: 1;
18338 unsigned G4FSIM8
: 1;
18339 unsigned G4FSIM9
: 1;
18340 unsigned G4FSIM10
: 1;
18341 unsigned G4FSIM11
: 1;
18342 unsigned G4FSIM12
: 1;
18343 unsigned G4FSIM13
: 1;
18344 unsigned G4FSIM14
: 1;
18345 unsigned G4FSIM15
: 1;
18347 } __COG4FSIM1bits_t
;
18349 extern __at(0x089C) volatile __COG4FSIM1bits_t COG4FSIM1bits
;
18351 #define _COG4FSIM1_FSIM8 0x01
18352 #define _COG4FSIM1_G4FSIM8 0x01
18353 #define _COG4FSIM1_FSIM9 0x02
18354 #define _COG4FSIM1_G4FSIM9 0x02
18355 #define _COG4FSIM1_FSIM10 0x04
18356 #define _COG4FSIM1_G4FSIM10 0x04
18357 #define _COG4FSIM1_FSIM11 0x08
18358 #define _COG4FSIM1_G4FSIM11 0x08
18359 #define _COG4FSIM1_FSIM12 0x10
18360 #define _COG4FSIM1_G4FSIM12 0x10
18361 #define _COG4FSIM1_FSIM13 0x20
18362 #define _COG4FSIM1_G4FSIM13 0x20
18363 #define _COG4FSIM1_FSIM14 0x40
18364 #define _COG4FSIM1_G4FSIM14 0x40
18365 #define _COG4FSIM1_FSIM15 0x80
18366 #define _COG4FSIM1_G4FSIM15 0x80
18368 //==============================================================================
18371 //==============================================================================
18374 extern __at(0x089D) __sfr COG4ASD0
;
18382 unsigned ASDAC0
: 1;
18383 unsigned ASDAC1
: 1;
18384 unsigned ASDBD0
: 1;
18385 unsigned ASDBD1
: 1;
18386 unsigned ASREN
: 1;
18394 unsigned G4ASDAC0
: 1;
18395 unsigned G4ASDAC1
: 1;
18396 unsigned G4ASDBD0
: 1;
18397 unsigned G4ASDBD1
: 1;
18398 unsigned ARSEN
: 1;
18399 unsigned G4ASE
: 1;
18410 unsigned G4ARSEN
: 1;
18422 unsigned G4ASREN
: 1;
18429 unsigned G4ASDAC
: 2;
18436 unsigned ASDAC
: 2;
18443 unsigned G4ASDBD
: 2;
18450 unsigned ASDBD
: 2;
18453 } __COG4ASD0bits_t
;
18455 extern __at(0x089D) volatile __COG4ASD0bits_t COG4ASD0bits
;
18457 #define _COG4ASD0_ASDAC0 0x04
18458 #define _COG4ASD0_G4ASDAC0 0x04
18459 #define _COG4ASD0_ASDAC1 0x08
18460 #define _COG4ASD0_G4ASDAC1 0x08
18461 #define _COG4ASD0_ASDBD0 0x10
18462 #define _COG4ASD0_G4ASDBD0 0x10
18463 #define _COG4ASD0_ASDBD1 0x20
18464 #define _COG4ASD0_G4ASDBD1 0x20
18465 #define _COG4ASD0_ASREN 0x40
18466 #define _COG4ASD0_ARSEN 0x40
18467 #define _COG4ASD0_G4ARSEN 0x40
18468 #define _COG4ASD0_G4ASREN 0x40
18469 #define _COG4ASD0_ASE 0x80
18470 #define _COG4ASD0_G4ASE 0x80
18472 //==============================================================================
18475 //==============================================================================
18478 extern __at(0x089E) __sfr COG4ASD1
;
18496 unsigned G4AS0E
: 1;
18497 unsigned G4AS1E
: 1;
18498 unsigned G4AS2E
: 1;
18499 unsigned G4AS3E
: 1;
18500 unsigned G4AS4E
: 1;
18501 unsigned G4AS5E
: 1;
18502 unsigned G4AS6E
: 1;
18503 unsigned G4AS7E
: 1;
18505 } __COG4ASD1bits_t
;
18507 extern __at(0x089E) volatile __COG4ASD1bits_t COG4ASD1bits
;
18509 #define _COG4ASD1_AS0E 0x01
18510 #define _COG4ASD1_G4AS0E 0x01
18511 #define _COG4ASD1_AS1E 0x02
18512 #define _COG4ASD1_G4AS1E 0x02
18513 #define _COG4ASD1_AS2E 0x04
18514 #define _COG4ASD1_G4AS2E 0x04
18515 #define _COG4ASD1_AS3E 0x08
18516 #define _COG4ASD1_G4AS3E 0x08
18517 #define _COG4ASD1_AS4E 0x10
18518 #define _COG4ASD1_G4AS4E 0x10
18519 #define _COG4ASD1_AS5E 0x20
18520 #define _COG4ASD1_G4AS5E 0x20
18521 #define _COG4ASD1_AS6E 0x40
18522 #define _COG4ASD1_G4AS6E 0x40
18523 #define _COG4ASD1_AS7E 0x80
18524 #define _COG4ASD1_G4AS7E 0x80
18526 //==============================================================================
18529 //==============================================================================
18532 extern __at(0x089F) __sfr COG4STR
;
18542 unsigned SDATA
: 1;
18543 unsigned SDATB
: 1;
18544 unsigned SDATC
: 1;
18545 unsigned SDATD
: 1;
18550 unsigned G4STRA
: 1;
18551 unsigned G4STRB
: 1;
18552 unsigned G4STRC
: 1;
18553 unsigned G4STRD
: 1;
18554 unsigned G4SDATA
: 1;
18555 unsigned G4SDATB
: 1;
18556 unsigned G4SDATC
: 1;
18557 unsigned G4SDATD
: 1;
18561 extern __at(0x089F) volatile __COG4STRbits_t COG4STRbits
;
18563 #define _COG4STR_STRA 0x01
18564 #define _COG4STR_G4STRA 0x01
18565 #define _COG4STR_STRB 0x02
18566 #define _COG4STR_G4STRB 0x02
18567 #define _COG4STR_STRC 0x04
18568 #define _COG4STR_G4STRC 0x04
18569 #define _COG4STR_STRD 0x08
18570 #define _COG4STR_G4STRD 0x08
18571 #define _COG4STR_SDATA 0x10
18572 #define _COG4STR_G4SDATA 0x10
18573 #define _COG4STR_SDATB 0x20
18574 #define _COG4STR_G4SDATB 0x20
18575 #define _COG4STR_SDATC 0x40
18576 #define _COG4STR_G4SDATC 0x40
18577 #define _COG4STR_SDATD 0x80
18578 #define _COG4STR_G4SDATD 0x80
18580 //==============================================================================
18583 //==============================================================================
18586 extern __at(0x090C) __sfr CM4CON0
;
18594 unsigned Reserved
: 1;
18604 unsigned C4SYNC
: 1;
18605 unsigned C4HYS
: 1;
18607 unsigned C4ZLF
: 1;
18608 unsigned C4POL
: 1;
18610 unsigned C4OUT
: 1;
18615 extern __at(0x090C) volatile __CM4CON0bits_t CM4CON0bits
;
18617 #define _CM4CON0_SYNC 0x01
18618 #define _CM4CON0_C4SYNC 0x01
18619 #define _CM4CON0_HYS 0x02
18620 #define _CM4CON0_C4HYS 0x02
18621 #define _CM4CON0_Reserved 0x04
18622 #define _CM4CON0_C4SP 0x04
18623 #define _CM4CON0_ZLF 0x08
18624 #define _CM4CON0_C4ZLF 0x08
18625 #define _CM4CON0_POL 0x10
18626 #define _CM4CON0_C4POL 0x10
18627 #define _CM4CON0_OUT 0x40
18628 #define _CM4CON0_C4OUT 0x40
18629 #define _CM4CON0_ON 0x80
18630 #define _CM4CON0_C4ON 0x80
18632 //==============================================================================
18635 //==============================================================================
18638 extern __at(0x090D) __sfr CM4CON1
;
18656 unsigned C4INTN
: 1;
18657 unsigned C4INTP
: 1;
18667 extern __at(0x090D) volatile __CM4CON1bits_t CM4CON1bits
;
18669 #define _CM4CON1_INTN 0x01
18670 #define _CM4CON1_C4INTN 0x01
18671 #define _CM4CON1_INTP 0x02
18672 #define _CM4CON1_C4INTP 0x02
18674 //==============================================================================
18677 //==============================================================================
18680 extern __at(0x090E) __sfr CM4NSEL
;
18686 unsigned C4NCH0
: 1;
18687 unsigned C4NCH1
: 1;
18688 unsigned C4NCH2
: 1;
18689 unsigned C4NCH3
: 1;
18698 unsigned C4NCH
: 4;
18703 extern __at(0x090E) volatile __CM4NSELbits_t CM4NSELbits
;
18705 #define _C4NCH0 0x01
18706 #define _C4NCH1 0x02
18707 #define _C4NCH2 0x04
18708 #define _C4NCH3 0x08
18710 //==============================================================================
18713 //==============================================================================
18716 extern __at(0x090F) __sfr CM4PSEL
;
18734 unsigned C4PCH0
: 1;
18735 unsigned C4PCH1
: 1;
18736 unsigned C4PCH2
: 1;
18737 unsigned C4PCH3
: 1;
18746 unsigned C4PCH
: 4;
18757 extern __at(0x090F) volatile __CM4PSELbits_t CM4PSELbits
;
18759 #define _CM4PSEL_PCH0 0x01
18760 #define _CM4PSEL_C4PCH0 0x01
18761 #define _CM4PSEL_PCH1 0x02
18762 #define _CM4PSEL_C4PCH1 0x02
18763 #define _CM4PSEL_PCH2 0x04
18764 #define _CM4PSEL_C4PCH2 0x04
18765 #define _CM4PSEL_PCH3 0x08
18766 #define _CM4PSEL_C4PCH3 0x08
18768 //==============================================================================
18771 //==============================================================================
18774 extern __at(0x0910) __sfr CM5CON0
;
18782 unsigned Reserved
: 1;
18792 unsigned C5SYNC
: 1;
18793 unsigned C5HYS
: 1;
18795 unsigned C5ZLF
: 1;
18796 unsigned C5POL
: 1;
18798 unsigned C5OUT
: 1;
18803 extern __at(0x0910) volatile __CM5CON0bits_t CM5CON0bits
;
18805 #define _CM5CON0_SYNC 0x01
18806 #define _CM5CON0_C5SYNC 0x01
18807 #define _CM5CON0_HYS 0x02
18808 #define _CM5CON0_C5HYS 0x02
18809 #define _CM5CON0_Reserved 0x04
18810 #define _CM5CON0_C5SP 0x04
18811 #define _CM5CON0_ZLF 0x08
18812 #define _CM5CON0_C5ZLF 0x08
18813 #define _CM5CON0_POL 0x10
18814 #define _CM5CON0_C5POL 0x10
18815 #define _CM5CON0_OUT 0x40
18816 #define _CM5CON0_C5OUT 0x40
18817 #define _CM5CON0_ON 0x80
18818 #define _CM5CON0_C5ON 0x80
18820 //==============================================================================
18823 //==============================================================================
18826 extern __at(0x0911) __sfr CM5CON1
;
18844 unsigned C5INTN
: 1;
18845 unsigned C5INTP
: 1;
18855 extern __at(0x0911) volatile __CM5CON1bits_t CM5CON1bits
;
18857 #define _CM5CON1_INTN 0x01
18858 #define _CM5CON1_C5INTN 0x01
18859 #define _CM5CON1_INTP 0x02
18860 #define _CM5CON1_C5INTP 0x02
18862 //==============================================================================
18865 //==============================================================================
18868 extern __at(0x0912) __sfr CM5NSEL
;
18874 unsigned C5NCH0
: 1;
18875 unsigned C5NCH1
: 1;
18876 unsigned C5NCH2
: 1;
18877 unsigned C5NCH3
: 1;
18886 unsigned C5NCH
: 4;
18891 extern __at(0x0912) volatile __CM5NSELbits_t CM5NSELbits
;
18893 #define _C5NCH0 0x01
18894 #define _C5NCH1 0x02
18895 #define _C5NCH2 0x04
18896 #define _C5NCH3 0x08
18898 //==============================================================================
18901 //==============================================================================
18904 extern __at(0x0913) __sfr CM5PSEL
;
18922 unsigned C5PCH0
: 1;
18923 unsigned C5PCH1
: 1;
18924 unsigned C5PCH2
: 1;
18925 unsigned C5PCH3
: 1;
18934 unsigned C5PCH
: 4;
18945 extern __at(0x0913) volatile __CM5PSELbits_t CM5PSELbits
;
18947 #define _CM5PSEL_PCH0 0x01
18948 #define _CM5PSEL_C5PCH0 0x01
18949 #define _CM5PSEL_PCH1 0x02
18950 #define _CM5PSEL_C5PCH1 0x02
18951 #define _CM5PSEL_PCH2 0x04
18952 #define _CM5PSEL_C5PCH2 0x04
18953 #define _CM5PSEL_PCH3 0x08
18954 #define _CM5PSEL_C5PCH3 0x08
18956 //==============================================================================
18959 //==============================================================================
18962 extern __at(0x0914) __sfr CM6CON0
;
18970 unsigned Reserved
: 1;
18980 unsigned C6SYNC
: 1;
18981 unsigned C6HYS
: 1;
18983 unsigned C6ZLF
: 1;
18984 unsigned C6POL
: 1;
18986 unsigned C6OUT
: 1;
18991 extern __at(0x0914) volatile __CM6CON0bits_t CM6CON0bits
;
18993 #define _CM6CON0_SYNC 0x01
18994 #define _CM6CON0_C6SYNC 0x01
18995 #define _CM6CON0_HYS 0x02
18996 #define _CM6CON0_C6HYS 0x02
18997 #define _CM6CON0_Reserved 0x04
18998 #define _CM6CON0_C6SP 0x04
18999 #define _CM6CON0_ZLF 0x08
19000 #define _CM6CON0_C6ZLF 0x08
19001 #define _CM6CON0_POL 0x10
19002 #define _CM6CON0_C6POL 0x10
19003 #define _CM6CON0_OUT 0x40
19004 #define _CM6CON0_C6OUT 0x40
19005 #define _CM6CON0_ON 0x80
19006 #define _CM6CON0_C6ON 0x80
19008 //==============================================================================
19011 //==============================================================================
19014 extern __at(0x0915) __sfr CM6CON1
;
19032 unsigned C6INTN
: 1;
19033 unsigned C6INTP
: 1;
19043 extern __at(0x0915) volatile __CM6CON1bits_t CM6CON1bits
;
19045 #define _CM6CON1_INTN 0x01
19046 #define _CM6CON1_C6INTN 0x01
19047 #define _CM6CON1_INTP 0x02
19048 #define _CM6CON1_C6INTP 0x02
19050 //==============================================================================
19053 //==============================================================================
19056 extern __at(0x0916) __sfr CM6NSEL
;
19062 unsigned C6NCH0
: 1;
19063 unsigned C6NCH1
: 1;
19064 unsigned C6NCH2
: 1;
19065 unsigned C6NCH3
: 1;
19074 unsigned C6NCH
: 4;
19079 extern __at(0x0916) volatile __CM6NSELbits_t CM6NSELbits
;
19081 #define _C6NCH0 0x01
19082 #define _C6NCH1 0x02
19083 #define _C6NCH2 0x04
19084 #define _C6NCH3 0x08
19086 //==============================================================================
19089 //==============================================================================
19092 extern __at(0x0917) __sfr CM6PSEL
;
19110 unsigned C6PCH0
: 1;
19111 unsigned C6PCH1
: 1;
19112 unsigned C6PCH2
: 1;
19113 unsigned C6PCH3
: 1;
19122 unsigned C6PCH
: 4;
19133 extern __at(0x0917) volatile __CM6PSELbits_t CM6PSELbits
;
19135 #define _CM6PSEL_PCH0 0x01
19136 #define _CM6PSEL_C6PCH0 0x01
19137 #define _CM6PSEL_PCH1 0x02
19138 #define _CM6PSEL_C6PCH1 0x02
19139 #define _CM6PSEL_PCH2 0x04
19140 #define _CM6PSEL_C6PCH2 0x04
19141 #define _CM6PSEL_PCH3 0x08
19142 #define _CM6PSEL_C6PCH3 0x08
19144 //==============================================================================
19147 //==============================================================================
19150 extern __at(0x0918) __sfr CM7CON0
;
19158 unsigned Reserved
: 1;
19168 unsigned C7SYNC
: 1;
19169 unsigned C7HYS
: 1;
19171 unsigned C7ZLF
: 1;
19172 unsigned C7POL
: 1;
19174 unsigned C7OUT
: 1;
19179 extern __at(0x0918) volatile __CM7CON0bits_t CM7CON0bits
;
19181 #define _CM7CON0_SYNC 0x01
19182 #define _CM7CON0_C7SYNC 0x01
19183 #define _CM7CON0_HYS 0x02
19184 #define _CM7CON0_C7HYS 0x02
19185 #define _CM7CON0_Reserved 0x04
19186 #define _CM7CON0_C7SP 0x04
19187 #define _CM7CON0_ZLF 0x08
19188 #define _CM7CON0_C7ZLF 0x08
19189 #define _CM7CON0_POL 0x10
19190 #define _CM7CON0_C7POL 0x10
19191 #define _CM7CON0_OUT 0x40
19192 #define _CM7CON0_C7OUT 0x40
19193 #define _CM7CON0_ON 0x80
19194 #define _CM7CON0_C7ON 0x80
19196 //==============================================================================
19199 //==============================================================================
19202 extern __at(0x0919) __sfr CM7CON1
;
19220 unsigned C7INTN
: 1;
19221 unsigned C7INTP
: 1;
19231 extern __at(0x0919) volatile __CM7CON1bits_t CM7CON1bits
;
19233 #define _CM7CON1_INTN 0x01
19234 #define _CM7CON1_C7INTN 0x01
19235 #define _CM7CON1_INTP 0x02
19236 #define _CM7CON1_C7INTP 0x02
19238 //==============================================================================
19241 //==============================================================================
19244 extern __at(0x091A) __sfr CM7NSEL
;
19250 unsigned C7NCH0
: 1;
19251 unsigned C7NCH1
: 1;
19252 unsigned C7NCH2
: 1;
19253 unsigned C7NCH3
: 1;
19262 unsigned C7NCH
: 4;
19267 extern __at(0x091A) volatile __CM7NSELbits_t CM7NSELbits
;
19269 #define _C7NCH0 0x01
19270 #define _C7NCH1 0x02
19271 #define _C7NCH2 0x04
19272 #define _C7NCH3 0x08
19274 //==============================================================================
19277 //==============================================================================
19280 extern __at(0x091B) __sfr CM7PSEL
;
19298 unsigned C7PCH0
: 1;
19299 unsigned C7PCH1
: 1;
19300 unsigned C7PCH2
: 1;
19301 unsigned C7PCH3
: 1;
19316 unsigned C7PCH
: 4;
19321 extern __at(0x091B) volatile __CM7PSELbits_t CM7PSELbits
;
19323 #define _CM7PSEL_PCH0 0x01
19324 #define _CM7PSEL_C7PCH0 0x01
19325 #define _CM7PSEL_PCH1 0x02
19326 #define _CM7PSEL_C7PCH1 0x02
19327 #define _CM7PSEL_PCH2 0x04
19328 #define _CM7PSEL_C7PCH2 0x04
19329 #define _CM7PSEL_PCH3 0x08
19330 #define _CM7PSEL_C7PCH3 0x08
19332 //==============================================================================
19335 //==============================================================================
19338 extern __at(0x091C) __sfr CM8CON0
;
19346 unsigned Reserved
: 1;
19356 unsigned C8SYNC
: 1;
19357 unsigned C8HYS
: 1;
19359 unsigned C8ZLF
: 1;
19360 unsigned C8POL
: 1;
19362 unsigned C8OUT
: 1;
19367 extern __at(0x091C) volatile __CM8CON0bits_t CM8CON0bits
;
19369 #define _CM8CON0_SYNC 0x01
19370 #define _CM8CON0_C8SYNC 0x01
19371 #define _CM8CON0_HYS 0x02
19372 #define _CM8CON0_C8HYS 0x02
19373 #define _CM8CON0_Reserved 0x04
19374 #define _CM8CON0_C8SP 0x04
19375 #define _CM8CON0_ZLF 0x08
19376 #define _CM8CON0_C8ZLF 0x08
19377 #define _CM8CON0_POL 0x10
19378 #define _CM8CON0_C8POL 0x10
19379 #define _CM8CON0_OUT 0x40
19380 #define _CM8CON0_C8OUT 0x40
19381 #define _CM8CON0_ON 0x80
19382 #define _CM8CON0_C8ON 0x80
19384 //==============================================================================
19387 //==============================================================================
19390 extern __at(0x091D) __sfr CM8CON1
;
19408 unsigned C8INTN
: 1;
19409 unsigned C8INTP
: 1;
19419 extern __at(0x091D) volatile __CM8CON1bits_t CM8CON1bits
;
19421 #define _CM8CON1_INTN 0x01
19422 #define _CM8CON1_C8INTN 0x01
19423 #define _CM8CON1_INTP 0x02
19424 #define _CM8CON1_C8INTP 0x02
19426 //==============================================================================
19429 //==============================================================================
19432 extern __at(0x091E) __sfr CM8NSEL
;
19438 unsigned C8NCH0
: 1;
19439 unsigned C8NCH1
: 1;
19440 unsigned C8NCH2
: 1;
19441 unsigned C8NCH3
: 1;
19450 unsigned C8NCH
: 4;
19455 extern __at(0x091E) volatile __CM8NSELbits_t CM8NSELbits
;
19457 #define _C8NCH0 0x01
19458 #define _C8NCH1 0x02
19459 #define _C8NCH2 0x04
19460 #define _C8NCH3 0x08
19462 //==============================================================================
19465 //==============================================================================
19468 extern __at(0x091F) __sfr CM8PSEL
;
19486 unsigned C8PCH0
: 1;
19487 unsigned C8PCH1
: 1;
19488 unsigned C8PCH2
: 1;
19489 unsigned C8PCH3
: 1;
19504 unsigned C8PCH
: 4;
19509 extern __at(0x091F) volatile __CM8PSELbits_t CM8PSELbits
;
19511 #define _CM8PSEL_PCH0 0x01
19512 #define _CM8PSEL_C8PCH0 0x01
19513 #define _CM8PSEL_PCH1 0x02
19514 #define _CM8PSEL_C8PCH1 0x02
19515 #define _CM8PSEL_PCH2 0x04
19516 #define _CM8PSEL_C8PCH2 0x04
19517 #define _CM8PSEL_PCH3 0x08
19518 #define _CM8PSEL_C8PCH3 0x08
19520 //==============================================================================
19523 //==============================================================================
19526 extern __at(0x0D1B) __sfr MD4CON0
;
19544 unsigned MD4BIT
: 1;
19548 unsigned MD4OPOL
: 1;
19549 unsigned MD4OUT
: 1;
19551 unsigned MD4EN
: 1;
19555 extern __at(0x0D1B) volatile __MD4CON0bits_t MD4CON0bits
;
19557 #define _MD4CON0_BIT 0x01
19558 #define _MD4CON0_MD4BIT 0x01
19559 #define _MD4CON0_OPOL 0x10
19560 #define _MD4CON0_MD4OPOL 0x10
19561 #define _MD4CON0_OUT 0x20
19562 #define _MD4CON0_MD4OUT 0x20
19563 #define _MD4CON0_EN 0x80
19564 #define _MD4CON0_MD4EN 0x80
19566 //==============================================================================
19569 //==============================================================================
19572 extern __at(0x0D1C) __sfr MD4CON1
;
19578 unsigned CLSYNC
: 1;
19579 unsigned CLPOL
: 1;
19582 unsigned CHSYNC
: 1;
19583 unsigned CHPOL
: 1;
19590 unsigned MD4CLSYNC
: 1;
19591 unsigned MD4CLPOL
: 1;
19594 unsigned MD4CHSYNC
: 1;
19595 unsigned MD4CHPOL
: 1;
19601 extern __at(0x0D1C) volatile __MD4CON1bits_t MD4CON1bits
;
19603 #define _MD4CON1_CLSYNC 0x01
19604 #define _MD4CON1_MD4CLSYNC 0x01
19605 #define _MD4CON1_CLPOL 0x02
19606 #define _MD4CON1_MD4CLPOL 0x02
19607 #define _MD4CON1_CHSYNC 0x10
19608 #define _MD4CON1_MD4CHSYNC 0x10
19609 #define _MD4CON1_CHPOL 0x20
19610 #define _MD4CON1_MD4CHPOL 0x20
19612 //==============================================================================
19615 //==============================================================================
19618 extern __at(0x0D1D) __sfr MD4SRC
;
19636 unsigned MD4MS0
: 1;
19637 unsigned MD4MS1
: 1;
19638 unsigned MD4MS2
: 1;
19639 unsigned MD4MS3
: 1;
19640 unsigned MD4MS4
: 1;
19648 unsigned MD4MS
: 5;
19659 extern __at(0x0D1D) volatile __MD4SRCbits_t MD4SRCbits
;
19661 #define _MD4SRC_MS0 0x01
19662 #define _MD4SRC_MD4MS0 0x01
19663 #define _MD4SRC_MS1 0x02
19664 #define _MD4SRC_MD4MS1 0x02
19665 #define _MD4SRC_MS2 0x04
19666 #define _MD4SRC_MD4MS2 0x04
19667 #define _MD4SRC_MS3 0x08
19668 #define _MD4SRC_MD4MS3 0x08
19669 #define _MD4SRC_MS4 0x10
19670 #define _MD4SRC_MD4MS4 0x10
19672 //==============================================================================
19675 //==============================================================================
19678 extern __at(0x0D1E) __sfr MD4CARL
;
19696 unsigned MD4CL0
: 1;
19697 unsigned MD4CL1
: 1;
19698 unsigned MD4CL2
: 1;
19699 unsigned MD4CL3
: 1;
19714 unsigned MD4CL
: 4;
19719 extern __at(0x0D1E) volatile __MD4CARLbits_t MD4CARLbits
;
19721 #define _MD4CARL_CL0 0x01
19722 #define _MD4CARL_MD4CL0 0x01
19723 #define _MD4CARL_CL1 0x02
19724 #define _MD4CARL_MD4CL1 0x02
19725 #define _MD4CARL_CL2 0x04
19726 #define _MD4CARL_MD4CL2 0x04
19727 #define _MD4CARL_CL3 0x08
19728 #define _MD4CARL_MD4CL3 0x08
19729 #define _MD4CARL_CL4 0x10
19731 //==============================================================================
19734 //==============================================================================
19737 extern __at(0x0D1F) __sfr MD4CARH
;
19755 unsigned MD4CH0
: 1;
19756 unsigned MD4CH1
: 1;
19757 unsigned MD4CH2
: 1;
19758 unsigned MD4CH3
: 1;
19773 unsigned MD4CH
: 4;
19778 extern __at(0x0D1F) volatile __MD4CARHbits_t MD4CARHbits
;
19780 #define _MD4CARH_CH0 0x01
19781 #define _MD4CARH_MD4CH0 0x01
19782 #define _MD4CARH_CH1 0x02
19783 #define _MD4CARH_MD4CH1 0x02
19784 #define _MD4CARH_CH2 0x04
19785 #define _MD4CARH_MD4CH2 0x04
19786 #define _MD4CARH_CH3 0x08
19787 #define _MD4CARH_MD4CH3 0x08
19788 #define _MD4CARH_CH4 0x10
19790 //==============================================================================
19793 //==============================================================================
19796 extern __at(0x0D8E) __sfr PWMEN
;
19800 unsigned MPWM5EN
: 1;
19801 unsigned MPWM6EN
: 1;
19802 unsigned MPWM11EN
: 1;
19803 unsigned MPWM12EN
: 1;
19810 extern __at(0x0D8E) volatile __PWMENbits_t PWMENbits
;
19812 #define _MPWM5EN 0x01
19813 #define _MPWM6EN 0x02
19814 #define _MPWM11EN 0x04
19815 #define _MPWM12EN 0x08
19817 //==============================================================================
19820 //==============================================================================
19823 extern __at(0x0D8F) __sfr PWMLD
;
19827 unsigned MPWM5LD
: 1;
19828 unsigned MPWM6LD
: 1;
19829 unsigned MPWM11LD
: 1;
19830 unsigned MPWM12LD
: 1;
19837 extern __at(0x0D8F) volatile __PWMLDbits_t PWMLDbits
;
19839 #define _MPWM5LD 0x01
19840 #define _MPWM6LD 0x02
19841 #define _MPWM11LD 0x04
19842 #define _MPWM12LD 0x08
19844 //==============================================================================
19847 //==============================================================================
19850 extern __at(0x0D90) __sfr PWMOUT
;
19854 unsigned MPWM5OUT
: 1;
19855 unsigned MPWM6OUT
: 1;
19856 unsigned MPWM11OUT
: 1;
19857 unsigned MPWM12OUT
: 1;
19864 extern __at(0x0D90) volatile __PWMOUTbits_t PWMOUTbits
;
19866 #define _MPWM5OUT 0x01
19867 #define _MPWM6OUT 0x02
19868 #define _MPWM11OUT 0x04
19869 #define _MPWM12OUT 0x08
19871 //==============================================================================
19873 extern __at(0x0D91) __sfr PWM5PH
;
19875 //==============================================================================
19878 extern __at(0x0D91) __sfr PWM5PHL
;
19882 unsigned PWM5PHL0
: 1;
19883 unsigned PWM5PHL1
: 1;
19884 unsigned PWM5PHL2
: 1;
19885 unsigned PWM5PHL3
: 1;
19886 unsigned PWM5PHL4
: 1;
19887 unsigned PWM5PHL5
: 1;
19888 unsigned PWM5PHL6
: 1;
19889 unsigned PWM5PHL7
: 1;
19892 extern __at(0x0D91) volatile __PWM5PHLbits_t PWM5PHLbits
;
19894 #define _PWM5PHL0 0x01
19895 #define _PWM5PHL1 0x02
19896 #define _PWM5PHL2 0x04
19897 #define _PWM5PHL3 0x08
19898 #define _PWM5PHL4 0x10
19899 #define _PWM5PHL5 0x20
19900 #define _PWM5PHL6 0x40
19901 #define _PWM5PHL7 0x80
19903 //==============================================================================
19906 //==============================================================================
19909 extern __at(0x0D92) __sfr PWM5PHH
;
19913 unsigned PWM5PHH0
: 1;
19914 unsigned PWM5PHH1
: 1;
19915 unsigned PWM5PHH2
: 1;
19916 unsigned PWM5PHH3
: 1;
19917 unsigned PWM5PHH4
: 1;
19918 unsigned PWM5PHH5
: 1;
19919 unsigned PWM5PHH6
: 1;
19920 unsigned PWM5PHH7
: 1;
19923 extern __at(0x0D92) volatile __PWM5PHHbits_t PWM5PHHbits
;
19925 #define _PWM5PHH0 0x01
19926 #define _PWM5PHH1 0x02
19927 #define _PWM5PHH2 0x04
19928 #define _PWM5PHH3 0x08
19929 #define _PWM5PHH4 0x10
19930 #define _PWM5PHH5 0x20
19931 #define _PWM5PHH6 0x40
19932 #define _PWM5PHH7 0x80
19934 //==============================================================================
19936 extern __at(0x0D93) __sfr PWM5DC
;
19938 //==============================================================================
19941 extern __at(0x0D93) __sfr PWM5DCL
;
19945 unsigned PWM5DCL0
: 1;
19946 unsigned PWM5DCL1
: 1;
19947 unsigned PWM5DCL2
: 1;
19948 unsigned PWM5DCL3
: 1;
19949 unsigned PWM5DCL4
: 1;
19950 unsigned PWM5DCL5
: 1;
19951 unsigned PWM5DCL6
: 1;
19952 unsigned PWM5DCL7
: 1;
19955 extern __at(0x0D93) volatile __PWM5DCLbits_t PWM5DCLbits
;
19957 #define _PWM5DCL0 0x01
19958 #define _PWM5DCL1 0x02
19959 #define _PWM5DCL2 0x04
19960 #define _PWM5DCL3 0x08
19961 #define _PWM5DCL4 0x10
19962 #define _PWM5DCL5 0x20
19963 #define _PWM5DCL6 0x40
19964 #define _PWM5DCL7 0x80
19966 //==============================================================================
19969 //==============================================================================
19972 extern __at(0x0D94) __sfr PWM5DCH
;
19976 unsigned PWM5DCH0
: 1;
19977 unsigned PWM5DCH1
: 1;
19978 unsigned PWM5DCH2
: 1;
19979 unsigned PWM5DCH3
: 1;
19980 unsigned PWM5DCH4
: 1;
19981 unsigned PWM5DCH5
: 1;
19982 unsigned PWM5DCH6
: 1;
19983 unsigned PWM5DCH7
: 1;
19986 extern __at(0x0D94) volatile __PWM5DCHbits_t PWM5DCHbits
;
19988 #define _PWM5DCH0 0x01
19989 #define _PWM5DCH1 0x02
19990 #define _PWM5DCH2 0x04
19991 #define _PWM5DCH3 0x08
19992 #define _PWM5DCH4 0x10
19993 #define _PWM5DCH5 0x20
19994 #define _PWM5DCH6 0x40
19995 #define _PWM5DCH7 0x80
19997 //==============================================================================
19999 extern __at(0x0D95) __sfr PWM5PR
;
20001 //==============================================================================
20004 extern __at(0x0D95) __sfr PWM5PRL
;
20008 unsigned PWM5PRL0
: 1;
20009 unsigned PWM5PRL1
: 1;
20010 unsigned PWM5PRL2
: 1;
20011 unsigned PWM5PRL3
: 1;
20012 unsigned PWM5PRL4
: 1;
20013 unsigned PWM5PRL5
: 1;
20014 unsigned PWM5PRL6
: 1;
20015 unsigned PWM5PRL7
: 1;
20018 extern __at(0x0D95) volatile __PWM5PRLbits_t PWM5PRLbits
;
20020 #define _PWM5PRL0 0x01
20021 #define _PWM5PRL1 0x02
20022 #define _PWM5PRL2 0x04
20023 #define _PWM5PRL3 0x08
20024 #define _PWM5PRL4 0x10
20025 #define _PWM5PRL5 0x20
20026 #define _PWM5PRL6 0x40
20027 #define _PWM5PRL7 0x80
20029 //==============================================================================
20032 //==============================================================================
20035 extern __at(0x0D96) __sfr PWM5PRH
;
20039 unsigned PWM5PRH0
: 1;
20040 unsigned PWM5PRH1
: 1;
20041 unsigned PWM5PRH2
: 1;
20042 unsigned PWM5PRH3
: 1;
20043 unsigned PWM5PRH4
: 1;
20044 unsigned PWM5PRH5
: 1;
20045 unsigned PWM5PRH6
: 1;
20046 unsigned PWM5PRH7
: 1;
20049 extern __at(0x0D96) volatile __PWM5PRHbits_t PWM5PRHbits
;
20051 #define _PWM5PRH0 0x01
20052 #define _PWM5PRH1 0x02
20053 #define _PWM5PRH2 0x04
20054 #define _PWM5PRH3 0x08
20055 #define _PWM5PRH4 0x10
20056 #define _PWM5PRH5 0x20
20057 #define _PWM5PRH6 0x40
20058 #define _PWM5PRH7 0x80
20060 //==============================================================================
20062 extern __at(0x0D97) __sfr PWM5OF
;
20064 //==============================================================================
20067 extern __at(0x0D97) __sfr PWM5OFL
;
20071 unsigned PWM5OFL0
: 1;
20072 unsigned PWM5OFL1
: 1;
20073 unsigned PWM5OFL2
: 1;
20074 unsigned PWM5OFL3
: 1;
20075 unsigned PWM5OFL4
: 1;
20076 unsigned PWM5OFL5
: 1;
20077 unsigned PWM5OFL6
: 1;
20078 unsigned PWM5OFL7
: 1;
20081 extern __at(0x0D97) volatile __PWM5OFLbits_t PWM5OFLbits
;
20083 #define _PWM5OFL0 0x01
20084 #define _PWM5OFL1 0x02
20085 #define _PWM5OFL2 0x04
20086 #define _PWM5OFL3 0x08
20087 #define _PWM5OFL4 0x10
20088 #define _PWM5OFL5 0x20
20089 #define _PWM5OFL6 0x40
20090 #define _PWM5OFL7 0x80
20092 //==============================================================================
20095 //==============================================================================
20098 extern __at(0x0D98) __sfr PWM5OFH
;
20102 unsigned PWM5OFH0
: 1;
20103 unsigned PWM5OFH1
: 1;
20104 unsigned PWM5OFH2
: 1;
20105 unsigned PWM5OFH3
: 1;
20106 unsigned PWM5OFH4
: 1;
20107 unsigned PWM5OFH5
: 1;
20108 unsigned PWM5OFH6
: 1;
20109 unsigned PWM5OFH7
: 1;
20112 extern __at(0x0D98) volatile __PWM5OFHbits_t PWM5OFHbits
;
20114 #define _PWM5OFH0 0x01
20115 #define _PWM5OFH1 0x02
20116 #define _PWM5OFH2 0x04
20117 #define _PWM5OFH3 0x08
20118 #define _PWM5OFH4 0x10
20119 #define _PWM5OFH5 0x20
20120 #define _PWM5OFH6 0x40
20121 #define _PWM5OFH7 0x80
20123 //==============================================================================
20125 extern __at(0x0D99) __sfr PWM5TMR
;
20127 //==============================================================================
20130 extern __at(0x0D99) __sfr PWM5TMRL
;
20134 unsigned PWM5TMRL0
: 1;
20135 unsigned PWM5TMRL1
: 1;
20136 unsigned PWM5TMRL2
: 1;
20137 unsigned PWM5TMRL3
: 1;
20138 unsigned PWM5TMRL4
: 1;
20139 unsigned PWM5TMRL5
: 1;
20140 unsigned PWM5TMRL6
: 1;
20141 unsigned PWM5TMRL7
: 1;
20142 } __PWM5TMRLbits_t
;
20144 extern __at(0x0D99) volatile __PWM5TMRLbits_t PWM5TMRLbits
;
20146 #define _PWM5TMRL0 0x01
20147 #define _PWM5TMRL1 0x02
20148 #define _PWM5TMRL2 0x04
20149 #define _PWM5TMRL3 0x08
20150 #define _PWM5TMRL4 0x10
20151 #define _PWM5TMRL5 0x20
20152 #define _PWM5TMRL6 0x40
20153 #define _PWM5TMRL7 0x80
20155 //==============================================================================
20158 //==============================================================================
20161 extern __at(0x0D9A) __sfr PWM5TMRH
;
20165 unsigned PWM5TMRH0
: 1;
20166 unsigned PWM5TMRH1
: 1;
20167 unsigned PWM5TMRH2
: 1;
20168 unsigned PWM5TMRH3
: 1;
20169 unsigned PWM5TMRH4
: 1;
20170 unsigned PWM5TMRH5
: 1;
20171 unsigned PWM5TMRH6
: 1;
20172 unsigned PWM5TMRH7
: 1;
20173 } __PWM5TMRHbits_t
;
20175 extern __at(0x0D9A) volatile __PWM5TMRHbits_t PWM5TMRHbits
;
20177 #define _PWM5TMRH0 0x01
20178 #define _PWM5TMRH1 0x02
20179 #define _PWM5TMRH2 0x04
20180 #define _PWM5TMRH3 0x08
20181 #define _PWM5TMRH4 0x10
20182 #define _PWM5TMRH5 0x20
20183 #define _PWM5TMRH6 0x40
20184 #define _PWM5TMRH7 0x80
20186 //==============================================================================
20189 //==============================================================================
20192 extern __at(0x0D9B) __sfr PWM5CON
;
20200 unsigned PWM5MODE0
: 1;
20201 unsigned PWM5MODE1
: 1;
20212 unsigned MODE0
: 1;
20213 unsigned MODE1
: 1;
20214 unsigned PWM5POL
: 1;
20215 unsigned PWM5OUT
: 1;
20217 unsigned PWM5EN
: 1;
20223 unsigned PWM5MODE
: 2;
20235 extern __at(0x0D9B) volatile __PWM5CONbits_t PWM5CONbits
;
20237 #define _PWM5CON_PWM5MODE0 0x04
20238 #define _PWM5CON_MODE0 0x04
20239 #define _PWM5CON_PWM5MODE1 0x08
20240 #define _PWM5CON_MODE1 0x08
20241 #define _PWM5CON_POL 0x10
20242 #define _PWM5CON_PWM5POL 0x10
20243 #define _PWM5CON_OUT 0x20
20244 #define _PWM5CON_PWM5OUT 0x20
20245 #define _PWM5CON_EN 0x80
20246 #define _PWM5CON_PWM5EN 0x80
20248 //==============================================================================
20251 //==============================================================================
20254 extern __at(0x0D9C) __sfr PWM5INTCON
;
20272 unsigned PWM5PRIE
: 1;
20273 unsigned PWM5DCIE
: 1;
20274 unsigned PWM5PHIE
: 1;
20275 unsigned PWM5OFIE
: 1;
20281 } __PWM5INTCONbits_t
;
20283 extern __at(0x0D9C) volatile __PWM5INTCONbits_t PWM5INTCONbits
;
20286 #define _PWM5PRIE 0x01
20288 #define _PWM5DCIE 0x02
20290 #define _PWM5PHIE 0x04
20292 #define _PWM5OFIE 0x08
20294 //==============================================================================
20297 //==============================================================================
20300 extern __at(0x0D9C) __sfr PWM5INTE
;
20318 unsigned PWM5PRIE
: 1;
20319 unsigned PWM5DCIE
: 1;
20320 unsigned PWM5PHIE
: 1;
20321 unsigned PWM5OFIE
: 1;
20327 } __PWM5INTEbits_t
;
20329 extern __at(0x0D9C) volatile __PWM5INTEbits_t PWM5INTEbits
;
20331 #define _PWM5INTE_PRIE 0x01
20332 #define _PWM5INTE_PWM5PRIE 0x01
20333 #define _PWM5INTE_DCIE 0x02
20334 #define _PWM5INTE_PWM5DCIE 0x02
20335 #define _PWM5INTE_PHIE 0x04
20336 #define _PWM5INTE_PWM5PHIE 0x04
20337 #define _PWM5INTE_OFIE 0x08
20338 #define _PWM5INTE_PWM5OFIE 0x08
20340 //==============================================================================
20343 //==============================================================================
20346 extern __at(0x0D9D) __sfr PWM5INTF
;
20364 unsigned PWM5PRIF
: 1;
20365 unsigned PWM5DCIF
: 1;
20366 unsigned PWM5PHIF
: 1;
20367 unsigned PWM5OFIF
: 1;
20373 } __PWM5INTFbits_t
;
20375 extern __at(0x0D9D) volatile __PWM5INTFbits_t PWM5INTFbits
;
20378 #define _PWM5PRIF 0x01
20380 #define _PWM5DCIF 0x02
20382 #define _PWM5PHIF 0x04
20384 #define _PWM5OFIF 0x08
20386 //==============================================================================
20389 //==============================================================================
20392 extern __at(0x0D9D) __sfr PWM5INTFLG
;
20410 unsigned PWM5PRIF
: 1;
20411 unsigned PWM5DCIF
: 1;
20412 unsigned PWM5PHIF
: 1;
20413 unsigned PWM5OFIF
: 1;
20419 } __PWM5INTFLGbits_t
;
20421 extern __at(0x0D9D) volatile __PWM5INTFLGbits_t PWM5INTFLGbits
;
20423 #define _PWM5INTFLG_PRIF 0x01
20424 #define _PWM5INTFLG_PWM5PRIF 0x01
20425 #define _PWM5INTFLG_DCIF 0x02
20426 #define _PWM5INTFLG_PWM5DCIF 0x02
20427 #define _PWM5INTFLG_PHIF 0x04
20428 #define _PWM5INTFLG_PWM5PHIF 0x04
20429 #define _PWM5INTFLG_OFIF 0x08
20430 #define _PWM5INTFLG_PWM5OFIF 0x08
20432 //==============================================================================
20435 //==============================================================================
20438 extern __at(0x0D9E) __sfr PWM5CLKCON
;
20444 unsigned PWM5CS0
: 1;
20445 unsigned PWM5CS1
: 1;
20446 unsigned PWM5CS2
: 1;
20448 unsigned PWM5PS0
: 1;
20449 unsigned PWM5PS1
: 1;
20450 unsigned PWM5PS2
: 1;
20468 unsigned PWM5CS
: 3;
20481 unsigned PWM5PS
: 3;
20491 } __PWM5CLKCONbits_t
;
20493 extern __at(0x0D9E) volatile __PWM5CLKCONbits_t PWM5CLKCONbits
;
20495 #define _PWM5CLKCON_PWM5CS0 0x01
20496 #define _PWM5CLKCON_CS0 0x01
20497 #define _PWM5CLKCON_PWM5CS1 0x02
20498 #define _PWM5CLKCON_CS1 0x02
20499 #define _PWM5CLKCON_PWM5CS2 0x04
20500 #define _PWM5CLKCON_CS2 0x04
20501 #define _PWM5CLKCON_PWM5PS0 0x10
20502 #define _PWM5CLKCON_PS0 0x10
20503 #define _PWM5CLKCON_PWM5PS1 0x20
20504 #define _PWM5CLKCON_PS1 0x20
20505 #define _PWM5CLKCON_PWM5PS2 0x40
20506 #define _PWM5CLKCON_PS2 0x40
20508 //==============================================================================
20511 //==============================================================================
20514 extern __at(0x0D9F) __sfr PWM5LDCON
;
20520 unsigned PWM5LDS0
: 1;
20521 unsigned PWM5LDS1
: 1;
20538 unsigned PWM5LDM
: 1;
20539 unsigned PWM5LD
: 1;
20544 unsigned PWM5LDS
: 2;
20553 } __PWM5LDCONbits_t
;
20555 extern __at(0x0D9F) volatile __PWM5LDCONbits_t PWM5LDCONbits
;
20557 #define _PWM5LDS0 0x01
20559 #define _PWM5LDS1 0x02
20562 #define _PWM5LDM 0x40
20564 #define _PWM5LD 0x80
20566 //==============================================================================
20569 //==============================================================================
20572 extern __at(0x0DA0) __sfr PWM5OFCON
;
20578 unsigned PWM5OFS0
: 1;
20579 unsigned PWM5OFS1
: 1;
20583 unsigned PWM5OFM0
: 1;
20584 unsigned PWM5OFM1
: 1;
20594 unsigned PWM5OFMC
: 1;
20608 unsigned PWM5OFS
: 2;
20615 unsigned PWM5OFM
: 2;
20625 } __PWM5OFCONbits_t
;
20627 extern __at(0x0DA0) volatile __PWM5OFCONbits_t PWM5OFCONbits
;
20629 #define _PWM5OFS0 0x01
20631 #define _PWM5OFS1 0x02
20634 #define _PWM5OFMC 0x10
20635 #define _PWM5OFM0 0x20
20637 #define _PWM5OFM1 0x40
20640 //==============================================================================
20642 extern __at(0x0DA1) __sfr PWM6PH
;
20644 //==============================================================================
20647 extern __at(0x0DA1) __sfr PWM6PHL
;
20651 unsigned PWM6PHL0
: 1;
20652 unsigned PWM6PHL1
: 1;
20653 unsigned PWM6PHL2
: 1;
20654 unsigned PWM6PHL3
: 1;
20655 unsigned PWM6PHL4
: 1;
20656 unsigned PWM6PHL5
: 1;
20657 unsigned PWM6PHL6
: 1;
20658 unsigned PWM6PHL7
: 1;
20661 extern __at(0x0DA1) volatile __PWM6PHLbits_t PWM6PHLbits
;
20663 #define _PWM6PHL0 0x01
20664 #define _PWM6PHL1 0x02
20665 #define _PWM6PHL2 0x04
20666 #define _PWM6PHL3 0x08
20667 #define _PWM6PHL4 0x10
20668 #define _PWM6PHL5 0x20
20669 #define _PWM6PHL6 0x40
20670 #define _PWM6PHL7 0x80
20672 //==============================================================================
20675 //==============================================================================
20678 extern __at(0x0DA2) __sfr PWM6PHH
;
20682 unsigned PWM6PHH0
: 1;
20683 unsigned PWM6PHH1
: 1;
20684 unsigned PWM6PHH2
: 1;
20685 unsigned PWM6PHH3
: 1;
20686 unsigned PWM6PHH4
: 1;
20687 unsigned PWM6PHH5
: 1;
20688 unsigned PWM6PHH6
: 1;
20689 unsigned PWM6PHH7
: 1;
20692 extern __at(0x0DA2) volatile __PWM6PHHbits_t PWM6PHHbits
;
20694 #define _PWM6PHH0 0x01
20695 #define _PWM6PHH1 0x02
20696 #define _PWM6PHH2 0x04
20697 #define _PWM6PHH3 0x08
20698 #define _PWM6PHH4 0x10
20699 #define _PWM6PHH5 0x20
20700 #define _PWM6PHH6 0x40
20701 #define _PWM6PHH7 0x80
20703 //==============================================================================
20705 extern __at(0x0DA3) __sfr PWM6DC
;
20707 //==============================================================================
20710 extern __at(0x0DA3) __sfr PWM6DCL
;
20714 unsigned PWM6DCL0
: 1;
20715 unsigned PWM6DCL1
: 1;
20716 unsigned PWM6DCL2
: 1;
20717 unsigned PWM6DCL3
: 1;
20718 unsigned PWM6DCL4
: 1;
20719 unsigned PWM6DCL5
: 1;
20720 unsigned PWM6DCL6
: 1;
20721 unsigned PWM6DCL7
: 1;
20724 extern __at(0x0DA3) volatile __PWM6DCLbits_t PWM6DCLbits
;
20726 #define _PWM6DCL0 0x01
20727 #define _PWM6DCL1 0x02
20728 #define _PWM6DCL2 0x04
20729 #define _PWM6DCL3 0x08
20730 #define _PWM6DCL4 0x10
20731 #define _PWM6DCL5 0x20
20732 #define _PWM6DCL6 0x40
20733 #define _PWM6DCL7 0x80
20735 //==============================================================================
20738 //==============================================================================
20741 extern __at(0x0DA4) __sfr PWM6DCH
;
20745 unsigned PWM6DCH0
: 1;
20746 unsigned PWM6DCH1
: 1;
20747 unsigned PWM6DCH2
: 1;
20748 unsigned PWM6DCH3
: 1;
20749 unsigned PWM6DCH4
: 1;
20750 unsigned PWM6DCH5
: 1;
20751 unsigned PWM6DCH6
: 1;
20752 unsigned PWM6DCH7
: 1;
20755 extern __at(0x0DA4) volatile __PWM6DCHbits_t PWM6DCHbits
;
20757 #define _PWM6DCH0 0x01
20758 #define _PWM6DCH1 0x02
20759 #define _PWM6DCH2 0x04
20760 #define _PWM6DCH3 0x08
20761 #define _PWM6DCH4 0x10
20762 #define _PWM6DCH5 0x20
20763 #define _PWM6DCH6 0x40
20764 #define _PWM6DCH7 0x80
20766 //==============================================================================
20768 extern __at(0x0DA5) __sfr PWM6PR
;
20770 //==============================================================================
20773 extern __at(0x0DA5) __sfr PWM6PRL
;
20777 unsigned PWM6PRL0
: 1;
20778 unsigned PWM6PRL1
: 1;
20779 unsigned PWM6PRL2
: 1;
20780 unsigned PWM6PRL3
: 1;
20781 unsigned PWM6PRL4
: 1;
20782 unsigned PWM6PRL5
: 1;
20783 unsigned PWM6PRL6
: 1;
20784 unsigned PWM6PRL7
: 1;
20787 extern __at(0x0DA5) volatile __PWM6PRLbits_t PWM6PRLbits
;
20789 #define _PWM6PRL0 0x01
20790 #define _PWM6PRL1 0x02
20791 #define _PWM6PRL2 0x04
20792 #define _PWM6PRL3 0x08
20793 #define _PWM6PRL4 0x10
20794 #define _PWM6PRL5 0x20
20795 #define _PWM6PRL6 0x40
20796 #define _PWM6PRL7 0x80
20798 //==============================================================================
20801 //==============================================================================
20804 extern __at(0x0DA6) __sfr PWM6PRH
;
20808 unsigned PWM6PRH0
: 1;
20809 unsigned PWM6PRH1
: 1;
20810 unsigned PWM6PRH2
: 1;
20811 unsigned PWM6PRH3
: 1;
20812 unsigned PWM6PRH4
: 1;
20813 unsigned PWM6PRH5
: 1;
20814 unsigned PWM6PRH6
: 1;
20815 unsigned PWM6PRH7
: 1;
20818 extern __at(0x0DA6) volatile __PWM6PRHbits_t PWM6PRHbits
;
20820 #define _PWM6PRH0 0x01
20821 #define _PWM6PRH1 0x02
20822 #define _PWM6PRH2 0x04
20823 #define _PWM6PRH3 0x08
20824 #define _PWM6PRH4 0x10
20825 #define _PWM6PRH5 0x20
20826 #define _PWM6PRH6 0x40
20827 #define _PWM6PRH7 0x80
20829 //==============================================================================
20831 extern __at(0x0DA7) __sfr PWM6OF
;
20833 //==============================================================================
20836 extern __at(0x0DA7) __sfr PWM6OFL
;
20840 unsigned PWM6OFL0
: 1;
20841 unsigned PWM6OFL1
: 1;
20842 unsigned PWM6OFL2
: 1;
20843 unsigned PWM6OFL3
: 1;
20844 unsigned PWM6OFL4
: 1;
20845 unsigned PWM6OFL5
: 1;
20846 unsigned PWM6OFL6
: 1;
20847 unsigned PWM6OFL7
: 1;
20850 extern __at(0x0DA7) volatile __PWM6OFLbits_t PWM6OFLbits
;
20852 #define _PWM6OFL0 0x01
20853 #define _PWM6OFL1 0x02
20854 #define _PWM6OFL2 0x04
20855 #define _PWM6OFL3 0x08
20856 #define _PWM6OFL4 0x10
20857 #define _PWM6OFL5 0x20
20858 #define _PWM6OFL6 0x40
20859 #define _PWM6OFL7 0x80
20861 //==============================================================================
20864 //==============================================================================
20867 extern __at(0x0DA8) __sfr PWM6OFH
;
20871 unsigned PWM6OFH0
: 1;
20872 unsigned PWM6OFH1
: 1;
20873 unsigned PWM6OFH2
: 1;
20874 unsigned PWM6OFH3
: 1;
20875 unsigned PWM6OFH4
: 1;
20876 unsigned PWM6OFH5
: 1;
20877 unsigned PWM6OFH6
: 1;
20878 unsigned PWM6OFH7
: 1;
20881 extern __at(0x0DA8) volatile __PWM6OFHbits_t PWM6OFHbits
;
20883 #define _PWM6OFH0 0x01
20884 #define _PWM6OFH1 0x02
20885 #define _PWM6OFH2 0x04
20886 #define _PWM6OFH3 0x08
20887 #define _PWM6OFH4 0x10
20888 #define _PWM6OFH5 0x20
20889 #define _PWM6OFH6 0x40
20890 #define _PWM6OFH7 0x80
20892 //==============================================================================
20894 extern __at(0x0DA9) __sfr PWM6TMR
;
20896 //==============================================================================
20899 extern __at(0x0DA9) __sfr PWM6TMRL
;
20903 unsigned PWM6TMRL0
: 1;
20904 unsigned PWM6TMRL1
: 1;
20905 unsigned PWM6TMRL2
: 1;
20906 unsigned PWM6TMRL3
: 1;
20907 unsigned PWM6TMRL4
: 1;
20908 unsigned PWM6TMRL5
: 1;
20909 unsigned PWM6TMRL6
: 1;
20910 unsigned PWM6TMRL7
: 1;
20911 } __PWM6TMRLbits_t
;
20913 extern __at(0x0DA9) volatile __PWM6TMRLbits_t PWM6TMRLbits
;
20915 #define _PWM6TMRL0 0x01
20916 #define _PWM6TMRL1 0x02
20917 #define _PWM6TMRL2 0x04
20918 #define _PWM6TMRL3 0x08
20919 #define _PWM6TMRL4 0x10
20920 #define _PWM6TMRL5 0x20
20921 #define _PWM6TMRL6 0x40
20922 #define _PWM6TMRL7 0x80
20924 //==============================================================================
20927 //==============================================================================
20930 extern __at(0x0DAA) __sfr PWM6TMRH
;
20934 unsigned PWM6TMRH0
: 1;
20935 unsigned PWM6TMRH1
: 1;
20936 unsigned PWM6TMRH2
: 1;
20937 unsigned PWM6TMRH3
: 1;
20938 unsigned PWM6TMRH4
: 1;
20939 unsigned PWM6TMRH5
: 1;
20940 unsigned PWM6TMRH6
: 1;
20941 unsigned PWM6TMRH7
: 1;
20942 } __PWM6TMRHbits_t
;
20944 extern __at(0x0DAA) volatile __PWM6TMRHbits_t PWM6TMRHbits
;
20946 #define _PWM6TMRH0 0x01
20947 #define _PWM6TMRH1 0x02
20948 #define _PWM6TMRH2 0x04
20949 #define _PWM6TMRH3 0x08
20950 #define _PWM6TMRH4 0x10
20951 #define _PWM6TMRH5 0x20
20952 #define _PWM6TMRH6 0x40
20953 #define _PWM6TMRH7 0x80
20955 //==============================================================================
20958 //==============================================================================
20961 extern __at(0x0DAB) __sfr PWM6CON
;
20969 unsigned PWM6MODE0
: 1;
20970 unsigned PWM6MODE1
: 1;
20981 unsigned MODE0
: 1;
20982 unsigned MODE1
: 1;
20983 unsigned PWM6POL
: 1;
20984 unsigned PWM6OUT
: 1;
20986 unsigned PWM6EN
: 1;
20992 unsigned PWM6MODE
: 2;
21004 extern __at(0x0DAB) volatile __PWM6CONbits_t PWM6CONbits
;
21006 #define _PWM6CON_PWM6MODE0 0x04
21007 #define _PWM6CON_MODE0 0x04
21008 #define _PWM6CON_PWM6MODE1 0x08
21009 #define _PWM6CON_MODE1 0x08
21010 #define _PWM6CON_POL 0x10
21011 #define _PWM6CON_PWM6POL 0x10
21012 #define _PWM6CON_OUT 0x20
21013 #define _PWM6CON_PWM6OUT 0x20
21014 #define _PWM6CON_EN 0x80
21015 #define _PWM6CON_PWM6EN 0x80
21017 //==============================================================================
21020 //==============================================================================
21023 extern __at(0x0DAC) __sfr PWM6INTCON
;
21041 unsigned PWM6PRIE
: 1;
21042 unsigned PWM6DCIE
: 1;
21043 unsigned PWM6PHIE
: 1;
21044 unsigned PWM6OFIE
: 1;
21050 } __PWM6INTCONbits_t
;
21052 extern __at(0x0DAC) volatile __PWM6INTCONbits_t PWM6INTCONbits
;
21054 #define _PWM6INTCON_PRIE 0x01
21055 #define _PWM6INTCON_PWM6PRIE 0x01
21056 #define _PWM6INTCON_DCIE 0x02
21057 #define _PWM6INTCON_PWM6DCIE 0x02
21058 #define _PWM6INTCON_PHIE 0x04
21059 #define _PWM6INTCON_PWM6PHIE 0x04
21060 #define _PWM6INTCON_OFIE 0x08
21061 #define _PWM6INTCON_PWM6OFIE 0x08
21063 //==============================================================================
21066 //==============================================================================
21069 extern __at(0x0DAC) __sfr PWM6INTE
;
21087 unsigned PWM6PRIE
: 1;
21088 unsigned PWM6DCIE
: 1;
21089 unsigned PWM6PHIE
: 1;
21090 unsigned PWM6OFIE
: 1;
21096 } __PWM6INTEbits_t
;
21098 extern __at(0x0DAC) volatile __PWM6INTEbits_t PWM6INTEbits
;
21100 #define _PWM6INTE_PRIE 0x01
21101 #define _PWM6INTE_PWM6PRIE 0x01
21102 #define _PWM6INTE_DCIE 0x02
21103 #define _PWM6INTE_PWM6DCIE 0x02
21104 #define _PWM6INTE_PHIE 0x04
21105 #define _PWM6INTE_PWM6PHIE 0x04
21106 #define _PWM6INTE_OFIE 0x08
21107 #define _PWM6INTE_PWM6OFIE 0x08
21109 //==============================================================================
21112 //==============================================================================
21115 extern __at(0x0DAD) __sfr PWM6INTF
;
21133 unsigned PWM6PRIF
: 1;
21134 unsigned PWM6DCIF
: 1;
21135 unsigned PWM6PHIF
: 1;
21136 unsigned PWM6OFIF
: 1;
21142 } __PWM6INTFbits_t
;
21144 extern __at(0x0DAD) volatile __PWM6INTFbits_t PWM6INTFbits
;
21146 #define _PWM6INTF_PRIF 0x01
21147 #define _PWM6INTF_PWM6PRIF 0x01
21148 #define _PWM6INTF_DCIF 0x02
21149 #define _PWM6INTF_PWM6DCIF 0x02
21150 #define _PWM6INTF_PHIF 0x04
21151 #define _PWM6INTF_PWM6PHIF 0x04
21152 #define _PWM6INTF_OFIF 0x08
21153 #define _PWM6INTF_PWM6OFIF 0x08
21155 //==============================================================================
21158 //==============================================================================
21161 extern __at(0x0DAD) __sfr PWM6INTFLG
;
21179 unsigned PWM6PRIF
: 1;
21180 unsigned PWM6DCIF
: 1;
21181 unsigned PWM6PHIF
: 1;
21182 unsigned PWM6OFIF
: 1;
21188 } __PWM6INTFLGbits_t
;
21190 extern __at(0x0DAD) volatile __PWM6INTFLGbits_t PWM6INTFLGbits
;
21192 #define _PWM6INTFLG_PRIF 0x01
21193 #define _PWM6INTFLG_PWM6PRIF 0x01
21194 #define _PWM6INTFLG_DCIF 0x02
21195 #define _PWM6INTFLG_PWM6DCIF 0x02
21196 #define _PWM6INTFLG_PHIF 0x04
21197 #define _PWM6INTFLG_PWM6PHIF 0x04
21198 #define _PWM6INTFLG_OFIF 0x08
21199 #define _PWM6INTFLG_PWM6OFIF 0x08
21201 //==============================================================================
21204 //==============================================================================
21207 extern __at(0x0DAE) __sfr PWM6CLKCON
;
21213 unsigned PWM6CS0
: 1;
21214 unsigned PWM6CS1
: 1;
21215 unsigned PWM6CS2
: 1;
21217 unsigned PWM6PS0
: 1;
21218 unsigned PWM6PS1
: 1;
21219 unsigned PWM6PS2
: 1;
21237 unsigned PWM6CS
: 3;
21250 unsigned PWM6PS
: 3;
21260 } __PWM6CLKCONbits_t
;
21262 extern __at(0x0DAE) volatile __PWM6CLKCONbits_t PWM6CLKCONbits
;
21264 #define _PWM6CLKCON_PWM6CS0 0x01
21265 #define _PWM6CLKCON_CS0 0x01
21266 #define _PWM6CLKCON_PWM6CS1 0x02
21267 #define _PWM6CLKCON_CS1 0x02
21268 #define _PWM6CLKCON_PWM6CS2 0x04
21269 #define _PWM6CLKCON_CS2 0x04
21270 #define _PWM6CLKCON_PWM6PS0 0x10
21271 #define _PWM6CLKCON_PS0 0x10
21272 #define _PWM6CLKCON_PWM6PS1 0x20
21273 #define _PWM6CLKCON_PS1 0x20
21274 #define _PWM6CLKCON_PWM6PS2 0x40
21275 #define _PWM6CLKCON_PS2 0x40
21277 //==============================================================================
21280 //==============================================================================
21283 extern __at(0x0DAF) __sfr PWM6LDCON
;
21289 unsigned PWM6LDS0
: 1;
21290 unsigned PWM6LDS1
: 1;
21307 unsigned PWM6LDM
: 1;
21308 unsigned PWM6LD
: 1;
21319 unsigned PWM6LDS
: 2;
21322 } __PWM6LDCONbits_t
;
21324 extern __at(0x0DAF) volatile __PWM6LDCONbits_t PWM6LDCONbits
;
21326 #define _PWM6LDCON_PWM6LDS0 0x01
21327 #define _PWM6LDCON_LDS0 0x01
21328 #define _PWM6LDCON_PWM6LDS1 0x02
21329 #define _PWM6LDCON_LDS1 0x02
21330 #define _PWM6LDCON_LDT 0x40
21331 #define _PWM6LDCON_PWM6LDM 0x40
21332 #define _PWM6LDCON_LDA 0x80
21333 #define _PWM6LDCON_PWM6LD 0x80
21335 //==============================================================================
21338 //==============================================================================
21341 extern __at(0x0DB0) __sfr PWM6OFCON
;
21347 unsigned PWM6OFS0
: 1;
21348 unsigned PWM6OFS1
: 1;
21352 unsigned PWM6OFM0
: 1;
21353 unsigned PWM6OFM1
: 1;
21363 unsigned PWM6OFMC
: 1;
21371 unsigned PWM6OFS
: 2;
21391 unsigned PWM6OFM
: 2;
21394 } __PWM6OFCONbits_t
;
21396 extern __at(0x0DB0) volatile __PWM6OFCONbits_t PWM6OFCONbits
;
21398 #define _PWM6OFCON_PWM6OFS0 0x01
21399 #define _PWM6OFCON_OFS0 0x01
21400 #define _PWM6OFCON_PWM6OFS1 0x02
21401 #define _PWM6OFCON_OFS1 0x02
21402 #define _PWM6OFCON_OFO 0x10
21403 #define _PWM6OFCON_PWM6OFMC 0x10
21404 #define _PWM6OFCON_PWM6OFM0 0x20
21405 #define _PWM6OFCON_OFM0 0x20
21406 #define _PWM6OFCON_PWM6OFM1 0x40
21407 #define _PWM6OFCON_OFM1 0x40
21409 //==============================================================================
21411 extern __at(0x0DB1) __sfr PWM11PH
;
21413 //==============================================================================
21416 extern __at(0x0DB1) __sfr PWM11PHL
;
21420 unsigned PWM11PHL0
: 1;
21421 unsigned PWM11PHL1
: 1;
21422 unsigned PWM11PHL2
: 1;
21423 unsigned PWM11PHL3
: 1;
21424 unsigned PWM11PHL4
: 1;
21425 unsigned PWM11PHL5
: 1;
21426 unsigned PWM11PHL6
: 1;
21427 unsigned PWM11PHL7
: 1;
21428 } __PWM11PHLbits_t
;
21430 extern __at(0x0DB1) volatile __PWM11PHLbits_t PWM11PHLbits
;
21432 #define _PWM11PHL0 0x01
21433 #define _PWM11PHL1 0x02
21434 #define _PWM11PHL2 0x04
21435 #define _PWM11PHL3 0x08
21436 #define _PWM11PHL4 0x10
21437 #define _PWM11PHL5 0x20
21438 #define _PWM11PHL6 0x40
21439 #define _PWM11PHL7 0x80
21441 //==============================================================================
21444 //==============================================================================
21447 extern __at(0x0DB2) __sfr PWM11PHH
;
21451 unsigned PWM11PHH0
: 1;
21452 unsigned PWM11PHH1
: 1;
21453 unsigned PWM11PHH2
: 1;
21454 unsigned PWM11PHH3
: 1;
21455 unsigned PWM11PHH4
: 1;
21456 unsigned PWM11PHH5
: 1;
21457 unsigned PWM11PHH6
: 1;
21458 unsigned PWM11PHH7
: 1;
21459 } __PWM11PHHbits_t
;
21461 extern __at(0x0DB2) volatile __PWM11PHHbits_t PWM11PHHbits
;
21463 #define _PWM11PHH0 0x01
21464 #define _PWM11PHH1 0x02
21465 #define _PWM11PHH2 0x04
21466 #define _PWM11PHH3 0x08
21467 #define _PWM11PHH4 0x10
21468 #define _PWM11PHH5 0x20
21469 #define _PWM11PHH6 0x40
21470 #define _PWM11PHH7 0x80
21472 //==============================================================================
21474 extern __at(0x0DB3) __sfr PWM11DC
;
21476 //==============================================================================
21479 extern __at(0x0DB3) __sfr PWM11DCL
;
21483 unsigned PWM11DCL0
: 1;
21484 unsigned PWM11DCL1
: 1;
21485 unsigned PWM11DCL2
: 1;
21486 unsigned PWM11DCL3
: 1;
21487 unsigned PWM11DCL4
: 1;
21488 unsigned PWM11DCL5
: 1;
21489 unsigned PWM11DCL6
: 1;
21490 unsigned PWM11DCL7
: 1;
21491 } __PWM11DCLbits_t
;
21493 extern __at(0x0DB3) volatile __PWM11DCLbits_t PWM11DCLbits
;
21495 #define _PWM11DCL0 0x01
21496 #define _PWM11DCL1 0x02
21497 #define _PWM11DCL2 0x04
21498 #define _PWM11DCL3 0x08
21499 #define _PWM11DCL4 0x10
21500 #define _PWM11DCL5 0x20
21501 #define _PWM11DCL6 0x40
21502 #define _PWM11DCL7 0x80
21504 //==============================================================================
21507 //==============================================================================
21510 extern __at(0x0DB4) __sfr PWM11DCH
;
21514 unsigned PWM11DCH0
: 1;
21515 unsigned PWM11DCH1
: 1;
21516 unsigned PWM11DCH2
: 1;
21517 unsigned PWM11DCH3
: 1;
21518 unsigned PWM11DCH4
: 1;
21519 unsigned PWM11DCH5
: 1;
21520 unsigned PWM11DCH6
: 1;
21521 unsigned PWM11DCH7
: 1;
21522 } __PWM11DCHbits_t
;
21524 extern __at(0x0DB4) volatile __PWM11DCHbits_t PWM11DCHbits
;
21526 #define _PWM11DCH0 0x01
21527 #define _PWM11DCH1 0x02
21528 #define _PWM11DCH2 0x04
21529 #define _PWM11DCH3 0x08
21530 #define _PWM11DCH4 0x10
21531 #define _PWM11DCH5 0x20
21532 #define _PWM11DCH6 0x40
21533 #define _PWM11DCH7 0x80
21535 //==============================================================================
21537 extern __at(0x0DB5) __sfr PWM11PR
;
21539 //==============================================================================
21542 extern __at(0x0DB5) __sfr PWM11PRL
;
21546 unsigned PWM11PRL0
: 1;
21547 unsigned PWM11PRL1
: 1;
21548 unsigned PWM11PRL2
: 1;
21549 unsigned PWM11PRL3
: 1;
21550 unsigned PWM11PRL4
: 1;
21551 unsigned PWM11PRL5
: 1;
21552 unsigned PWM11PRL6
: 1;
21553 unsigned PWM11PRL7
: 1;
21554 } __PWM11PRLbits_t
;
21556 extern __at(0x0DB5) volatile __PWM11PRLbits_t PWM11PRLbits
;
21558 #define _PWM11PRL0 0x01
21559 #define _PWM11PRL1 0x02
21560 #define _PWM11PRL2 0x04
21561 #define _PWM11PRL3 0x08
21562 #define _PWM11PRL4 0x10
21563 #define _PWM11PRL5 0x20
21564 #define _PWM11PRL6 0x40
21565 #define _PWM11PRL7 0x80
21567 //==============================================================================
21570 //==============================================================================
21573 extern __at(0x0DB6) __sfr PWM11PRH
;
21577 unsigned PWM11PRH0
: 1;
21578 unsigned PWM11PRH1
: 1;
21579 unsigned PWM11PRH2
: 1;
21580 unsigned PWM11PRH3
: 1;
21581 unsigned PWM11PRH4
: 1;
21582 unsigned PWM11PRH5
: 1;
21583 unsigned PWM11PRH6
: 1;
21584 unsigned PWM11PRH7
: 1;
21585 } __PWM11PRHbits_t
;
21587 extern __at(0x0DB6) volatile __PWM11PRHbits_t PWM11PRHbits
;
21589 #define _PWM11PRH0 0x01
21590 #define _PWM11PRH1 0x02
21591 #define _PWM11PRH2 0x04
21592 #define _PWM11PRH3 0x08
21593 #define _PWM11PRH4 0x10
21594 #define _PWM11PRH5 0x20
21595 #define _PWM11PRH6 0x40
21596 #define _PWM11PRH7 0x80
21598 //==============================================================================
21600 extern __at(0x0DB7) __sfr PWM11OF
;
21602 //==============================================================================
21605 extern __at(0x0DB7) __sfr PWM11OFL
;
21609 unsigned PWM11OFL0
: 1;
21610 unsigned PWM11OFL1
: 1;
21611 unsigned PWM11OFL2
: 1;
21612 unsigned PWM11OFL3
: 1;
21613 unsigned PWM11OFL4
: 1;
21614 unsigned PWM11OFL5
: 1;
21615 unsigned PWM11OFL6
: 1;
21616 unsigned PWM11OFL7
: 1;
21617 } __PWM11OFLbits_t
;
21619 extern __at(0x0DB7) volatile __PWM11OFLbits_t PWM11OFLbits
;
21621 #define _PWM11OFL0 0x01
21622 #define _PWM11OFL1 0x02
21623 #define _PWM11OFL2 0x04
21624 #define _PWM11OFL3 0x08
21625 #define _PWM11OFL4 0x10
21626 #define _PWM11OFL5 0x20
21627 #define _PWM11OFL6 0x40
21628 #define _PWM11OFL7 0x80
21630 //==============================================================================
21633 //==============================================================================
21636 extern __at(0x0DB8) __sfr PWM11OFH
;
21640 unsigned PWM11OFH0
: 1;
21641 unsigned PWM11OFH1
: 1;
21642 unsigned PWM11OFH2
: 1;
21643 unsigned PWM11OFH3
: 1;
21644 unsigned PWM11OFH4
: 1;
21645 unsigned PWM11OFH5
: 1;
21646 unsigned PWM11OFH6
: 1;
21647 unsigned PWM11OFH7
: 1;
21648 } __PWM11OFHbits_t
;
21650 extern __at(0x0DB8) volatile __PWM11OFHbits_t PWM11OFHbits
;
21652 #define _PWM11OFH0 0x01
21653 #define _PWM11OFH1 0x02
21654 #define _PWM11OFH2 0x04
21655 #define _PWM11OFH3 0x08
21656 #define _PWM11OFH4 0x10
21657 #define _PWM11OFH5 0x20
21658 #define _PWM11OFH6 0x40
21659 #define _PWM11OFH7 0x80
21661 //==============================================================================
21663 extern __at(0x0DB9) __sfr PWM11TMR
;
21665 //==============================================================================
21668 extern __at(0x0DB9) __sfr PWM11TMRL
;
21672 unsigned PWM11TMRL0
: 1;
21673 unsigned PWM11TMRL1
: 1;
21674 unsigned PWM11TMRL2
: 1;
21675 unsigned PWM11TMRL3
: 1;
21676 unsigned PWM11TMRL4
: 1;
21677 unsigned PWM11TMRL5
: 1;
21678 unsigned PWM11TMRL6
: 1;
21679 unsigned PWM11TMRL7
: 1;
21680 } __PWM11TMRLbits_t
;
21682 extern __at(0x0DB9) volatile __PWM11TMRLbits_t PWM11TMRLbits
;
21684 #define _PWM11TMRL0 0x01
21685 #define _PWM11TMRL1 0x02
21686 #define _PWM11TMRL2 0x04
21687 #define _PWM11TMRL3 0x08
21688 #define _PWM11TMRL4 0x10
21689 #define _PWM11TMRL5 0x20
21690 #define _PWM11TMRL6 0x40
21691 #define _PWM11TMRL7 0x80
21693 //==============================================================================
21696 //==============================================================================
21699 extern __at(0x0DBA) __sfr PWM11TMRH
;
21703 unsigned PWM11TMRH0
: 1;
21704 unsigned PWM11TMRH1
: 1;
21705 unsigned PWM11TMRH2
: 1;
21706 unsigned PWM11TMRH3
: 1;
21707 unsigned PWM11TMRH4
: 1;
21708 unsigned PWM11TMRH5
: 1;
21709 unsigned PWM11TMRH6
: 1;
21710 unsigned PWM11TMRH7
: 1;
21711 } __PWM11TMRHbits_t
;
21713 extern __at(0x0DBA) volatile __PWM11TMRHbits_t PWM11TMRHbits
;
21715 #define _PWM11TMRH0 0x01
21716 #define _PWM11TMRH1 0x02
21717 #define _PWM11TMRH2 0x04
21718 #define _PWM11TMRH3 0x08
21719 #define _PWM11TMRH4 0x10
21720 #define _PWM11TMRH5 0x20
21721 #define _PWM11TMRH6 0x40
21722 #define _PWM11TMRH7 0x80
21724 //==============================================================================
21727 //==============================================================================
21730 extern __at(0x0DBB) __sfr PWM11CON
;
21738 unsigned PWM11MODE0
: 1;
21739 unsigned PWM11MODE1
: 1;
21750 unsigned MODE0
: 1;
21751 unsigned MODE1
: 1;
21752 unsigned PWM11POL
: 1;
21753 unsigned PWM11OUT
: 1;
21755 unsigned PWM11EN
: 1;
21761 unsigned PWM11MODE
: 2;
21771 } __PWM11CONbits_t
;
21773 extern __at(0x0DBB) volatile __PWM11CONbits_t PWM11CONbits
;
21775 #define _PWM11CON_PWM11MODE0 0x04
21776 #define _PWM11CON_MODE0 0x04
21777 #define _PWM11CON_PWM11MODE1 0x08
21778 #define _PWM11CON_MODE1 0x08
21779 #define _PWM11CON_POL 0x10
21780 #define _PWM11CON_PWM11POL 0x10
21781 #define _PWM11CON_OUT 0x20
21782 #define _PWM11CON_PWM11OUT 0x20
21783 #define _PWM11CON_EN 0x80
21784 #define _PWM11CON_PWM11EN 0x80
21786 //==============================================================================
21789 //==============================================================================
21790 // PWM11INTCON Bits
21792 extern __at(0x0DBC) __sfr PWM11INTCON
;
21810 unsigned PWM11PRIE
: 1;
21811 unsigned PWM11DCIE
: 1;
21812 unsigned PWM11PHIE
: 1;
21813 unsigned PWM11OFIE
: 1;
21819 } __PWM11INTCONbits_t
;
21821 extern __at(0x0DBC) volatile __PWM11INTCONbits_t PWM11INTCONbits
;
21823 #define _PWM11INTCON_PRIE 0x01
21824 #define _PWM11INTCON_PWM11PRIE 0x01
21825 #define _PWM11INTCON_DCIE 0x02
21826 #define _PWM11INTCON_PWM11DCIE 0x02
21827 #define _PWM11INTCON_PHIE 0x04
21828 #define _PWM11INTCON_PWM11PHIE 0x04
21829 #define _PWM11INTCON_OFIE 0x08
21830 #define _PWM11INTCON_PWM11OFIE 0x08
21832 //==============================================================================
21835 //==============================================================================
21838 extern __at(0x0DBC) __sfr PWM11INTE
;
21856 unsigned PWM11PRIE
: 1;
21857 unsigned PWM11DCIE
: 1;
21858 unsigned PWM11PHIE
: 1;
21859 unsigned PWM11OFIE
: 1;
21865 } __PWM11INTEbits_t
;
21867 extern __at(0x0DBC) volatile __PWM11INTEbits_t PWM11INTEbits
;
21869 #define _PWM11INTE_PRIE 0x01
21870 #define _PWM11INTE_PWM11PRIE 0x01
21871 #define _PWM11INTE_DCIE 0x02
21872 #define _PWM11INTE_PWM11DCIE 0x02
21873 #define _PWM11INTE_PHIE 0x04
21874 #define _PWM11INTE_PWM11PHIE 0x04
21875 #define _PWM11INTE_OFIE 0x08
21876 #define _PWM11INTE_PWM11OFIE 0x08
21878 //==============================================================================
21881 //==============================================================================
21884 extern __at(0x0DBD) __sfr PWM11INTF
;
21902 unsigned PWM11PRIF
: 1;
21903 unsigned PWM11DCIF
: 1;
21904 unsigned PWM11PHIF
: 1;
21905 unsigned PWM11OFIF
: 1;
21911 } __PWM11INTFbits_t
;
21913 extern __at(0x0DBD) volatile __PWM11INTFbits_t PWM11INTFbits
;
21915 #define _PWM11INTF_PRIF 0x01
21916 #define _PWM11INTF_PWM11PRIF 0x01
21917 #define _PWM11INTF_DCIF 0x02
21918 #define _PWM11INTF_PWM11DCIF 0x02
21919 #define _PWM11INTF_PHIF 0x04
21920 #define _PWM11INTF_PWM11PHIF 0x04
21921 #define _PWM11INTF_OFIF 0x08
21922 #define _PWM11INTF_PWM11OFIF 0x08
21924 //==============================================================================
21927 //==============================================================================
21928 // PWM11INTFLG Bits
21930 extern __at(0x0DBD) __sfr PWM11INTFLG
;
21948 unsigned PWM11PRIF
: 1;
21949 unsigned PWM11DCIF
: 1;
21950 unsigned PWM11PHIF
: 1;
21951 unsigned PWM11OFIF
: 1;
21957 } __PWM11INTFLGbits_t
;
21959 extern __at(0x0DBD) volatile __PWM11INTFLGbits_t PWM11INTFLGbits
;
21961 #define _PWM11INTFLG_PRIF 0x01
21962 #define _PWM11INTFLG_PWM11PRIF 0x01
21963 #define _PWM11INTFLG_DCIF 0x02
21964 #define _PWM11INTFLG_PWM11DCIF 0x02
21965 #define _PWM11INTFLG_PHIF 0x04
21966 #define _PWM11INTFLG_PWM11PHIF 0x04
21967 #define _PWM11INTFLG_OFIF 0x08
21968 #define _PWM11INTFLG_PWM11OFIF 0x08
21970 //==============================================================================
21973 //==============================================================================
21974 // PWM11CLKCON Bits
21976 extern __at(0x0DBE) __sfr PWM11CLKCON
;
21982 unsigned PWM11CS0
: 1;
21983 unsigned PWM11CS1
: 1;
21984 unsigned PWM11CS2
: 1;
21986 unsigned PWM11PS0
: 1;
21987 unsigned PWM11PS1
: 1;
21988 unsigned PWM11PS2
: 1;
22012 unsigned PWM11CS
: 3;
22026 unsigned PWM11PS
: 3;
22029 } __PWM11CLKCONbits_t
;
22031 extern __at(0x0DBE) volatile __PWM11CLKCONbits_t PWM11CLKCONbits
;
22033 #define _PWM11CLKCON_PWM11CS0 0x01
22034 #define _PWM11CLKCON_CS0 0x01
22035 #define _PWM11CLKCON_PWM11CS1 0x02
22036 #define _PWM11CLKCON_CS1 0x02
22037 #define _PWM11CLKCON_PWM11CS2 0x04
22038 #define _PWM11CLKCON_CS2 0x04
22039 #define _PWM11CLKCON_PWM11PS0 0x10
22040 #define _PWM11CLKCON_PS0 0x10
22041 #define _PWM11CLKCON_PWM11PS1 0x20
22042 #define _PWM11CLKCON_PS1 0x20
22043 #define _PWM11CLKCON_PWM11PS2 0x40
22044 #define _PWM11CLKCON_PS2 0x40
22046 //==============================================================================
22049 //==============================================================================
22052 extern __at(0x0DBF) __sfr PWM11LDCON
;
22058 unsigned PWM11LDS0
: 1;
22059 unsigned PWM11LDS1
: 1;
22076 unsigned PWM11LDM
: 1;
22077 unsigned PWM11LD
: 1;
22082 unsigned PWM11LDS
: 2;
22091 } __PWM11LDCONbits_t
;
22093 extern __at(0x0DBF) volatile __PWM11LDCONbits_t PWM11LDCONbits
;
22095 #define _PWM11LDCON_PWM11LDS0 0x01
22096 #define _PWM11LDCON_LDS0 0x01
22097 #define _PWM11LDCON_PWM11LDS1 0x02
22098 #define _PWM11LDCON_LDS1 0x02
22099 #define _PWM11LDCON_LDT 0x40
22100 #define _PWM11LDCON_PWM11LDM 0x40
22101 #define _PWM11LDCON_LDA 0x80
22102 #define _PWM11LDCON_PWM11LD 0x80
22104 //==============================================================================
22107 //==============================================================================
22110 extern __at(0x0DC0) __sfr PWM11OFCON
;
22116 unsigned PWM11OFS0
: 1;
22117 unsigned PWM11OFS1
: 1;
22121 unsigned PWM11OFM0
: 1;
22122 unsigned PWM11OFM1
: 1;
22132 unsigned PWM11OFMC
: 1;
22140 unsigned PWM11OFS
: 2;
22160 unsigned PWM11OFM
: 2;
22163 } __PWM11OFCONbits_t
;
22165 extern __at(0x0DC0) volatile __PWM11OFCONbits_t PWM11OFCONbits
;
22167 #define _PWM11OFCON_PWM11OFS0 0x01
22168 #define _PWM11OFCON_OFS0 0x01
22169 #define _PWM11OFCON_PWM11OFS1 0x02
22170 #define _PWM11OFCON_OFS1 0x02
22171 #define _PWM11OFCON_OFO 0x10
22172 #define _PWM11OFCON_PWM11OFMC 0x10
22173 #define _PWM11OFCON_PWM11OFM0 0x20
22174 #define _PWM11OFCON_OFM0 0x20
22175 #define _PWM11OFCON_PWM11OFM1 0x40
22176 #define _PWM11OFCON_OFM1 0x40
22178 //==============================================================================
22180 extern __at(0x0DC1) __sfr PWM12PH
;
22182 //==============================================================================
22185 extern __at(0x0DC1) __sfr PWM12PHL
;
22189 unsigned PWM12PHL0
: 1;
22190 unsigned PWM12PHL1
: 1;
22191 unsigned PWM12PHL2
: 1;
22192 unsigned PWM12PHL3
: 1;
22193 unsigned PWM12PHL4
: 1;
22194 unsigned PWM12PHL5
: 1;
22195 unsigned PWM12PHL6
: 1;
22196 unsigned PWM12PHL7
: 1;
22197 } __PWM12PHLbits_t
;
22199 extern __at(0x0DC1) volatile __PWM12PHLbits_t PWM12PHLbits
;
22201 #define _PWM12PHL0 0x01
22202 #define _PWM12PHL1 0x02
22203 #define _PWM12PHL2 0x04
22204 #define _PWM12PHL3 0x08
22205 #define _PWM12PHL4 0x10
22206 #define _PWM12PHL5 0x20
22207 #define _PWM12PHL6 0x40
22208 #define _PWM12PHL7 0x80
22210 //==============================================================================
22213 //==============================================================================
22216 extern __at(0x0DC2) __sfr PWM12PHH
;
22220 unsigned PWM12PHH0
: 1;
22221 unsigned PWM12PHH1
: 1;
22222 unsigned PWM12PHH2
: 1;
22223 unsigned PWM12PHH3
: 1;
22224 unsigned PWM12PHH4
: 1;
22225 unsigned PWM12PHH5
: 1;
22226 unsigned PWM12PHH6
: 1;
22227 unsigned PWM12PHH7
: 1;
22228 } __PWM12PHHbits_t
;
22230 extern __at(0x0DC2) volatile __PWM12PHHbits_t PWM12PHHbits
;
22232 #define _PWM12PHH0 0x01
22233 #define _PWM12PHH1 0x02
22234 #define _PWM12PHH2 0x04
22235 #define _PWM12PHH3 0x08
22236 #define _PWM12PHH4 0x10
22237 #define _PWM12PHH5 0x20
22238 #define _PWM12PHH6 0x40
22239 #define _PWM12PHH7 0x80
22241 //==============================================================================
22243 extern __at(0x0DC3) __sfr PWM12DC
;
22245 //==============================================================================
22248 extern __at(0x0DC3) __sfr PWM12DCL
;
22252 unsigned PWM12DCL0
: 1;
22253 unsigned PWM12DCL1
: 1;
22254 unsigned PWM12DCL2
: 1;
22255 unsigned PWM12DCL3
: 1;
22256 unsigned PWM12DCL4
: 1;
22257 unsigned PWM12DCL5
: 1;
22258 unsigned PWM12DCL6
: 1;
22259 unsigned PWM12DCL7
: 1;
22260 } __PWM12DCLbits_t
;
22262 extern __at(0x0DC3) volatile __PWM12DCLbits_t PWM12DCLbits
;
22264 #define _PWM12DCL0 0x01
22265 #define _PWM12DCL1 0x02
22266 #define _PWM12DCL2 0x04
22267 #define _PWM12DCL3 0x08
22268 #define _PWM12DCL4 0x10
22269 #define _PWM12DCL5 0x20
22270 #define _PWM12DCL6 0x40
22271 #define _PWM12DCL7 0x80
22273 //==============================================================================
22276 //==============================================================================
22279 extern __at(0x0DC4) __sfr PWM12DCH
;
22283 unsigned PWM12DCH0
: 1;
22284 unsigned PWM12DCH1
: 1;
22285 unsigned PWM12DCH2
: 1;
22286 unsigned PWM12DCH3
: 1;
22287 unsigned PWM12DCH4
: 1;
22288 unsigned PWM12DCH5
: 1;
22289 unsigned PWM12DCH6
: 1;
22290 unsigned PWM12DCH7
: 1;
22291 } __PWM12DCHbits_t
;
22293 extern __at(0x0DC4) volatile __PWM12DCHbits_t PWM12DCHbits
;
22295 #define _PWM12DCH0 0x01
22296 #define _PWM12DCH1 0x02
22297 #define _PWM12DCH2 0x04
22298 #define _PWM12DCH3 0x08
22299 #define _PWM12DCH4 0x10
22300 #define _PWM12DCH5 0x20
22301 #define _PWM12DCH6 0x40
22302 #define _PWM12DCH7 0x80
22304 //==============================================================================
22306 extern __at(0x0DC5) __sfr PWM12PR
;
22308 //==============================================================================
22311 extern __at(0x0DC5) __sfr PWM12PRL
;
22315 unsigned PWM12PRL0
: 1;
22316 unsigned PWM12PRL1
: 1;
22317 unsigned PWM12PRL2
: 1;
22318 unsigned PWM12PRL3
: 1;
22319 unsigned PWM12PRL4
: 1;
22320 unsigned PWM12PRL5
: 1;
22321 unsigned PWM12PRL6
: 1;
22322 unsigned PWM12PRL7
: 1;
22323 } __PWM12PRLbits_t
;
22325 extern __at(0x0DC5) volatile __PWM12PRLbits_t PWM12PRLbits
;
22327 #define _PWM12PRL0 0x01
22328 #define _PWM12PRL1 0x02
22329 #define _PWM12PRL2 0x04
22330 #define _PWM12PRL3 0x08
22331 #define _PWM12PRL4 0x10
22332 #define _PWM12PRL5 0x20
22333 #define _PWM12PRL6 0x40
22334 #define _PWM12PRL7 0x80
22336 //==============================================================================
22339 //==============================================================================
22342 extern __at(0x0DC6) __sfr PWM12PRH
;
22346 unsigned PWM12PRH0
: 1;
22347 unsigned PWM12PRH1
: 1;
22348 unsigned PWM12PRH2
: 1;
22349 unsigned PWM12PRH3
: 1;
22350 unsigned PWM12PRH4
: 1;
22351 unsigned PWM12PRH5
: 1;
22352 unsigned PWM12PRH6
: 1;
22353 unsigned PWM12PRH7
: 1;
22354 } __PWM12PRHbits_t
;
22356 extern __at(0x0DC6) volatile __PWM12PRHbits_t PWM12PRHbits
;
22358 #define _PWM12PRH0 0x01
22359 #define _PWM12PRH1 0x02
22360 #define _PWM12PRH2 0x04
22361 #define _PWM12PRH3 0x08
22362 #define _PWM12PRH4 0x10
22363 #define _PWM12PRH5 0x20
22364 #define _PWM12PRH6 0x40
22365 #define _PWM12PRH7 0x80
22367 //==============================================================================
22369 extern __at(0x0DC7) __sfr PWM12OF
;
22371 //==============================================================================
22374 extern __at(0x0DC7) __sfr PWM12OFL
;
22378 unsigned PWM12OFL0
: 1;
22379 unsigned PWM12OFL1
: 1;
22380 unsigned PWM12OFL2
: 1;
22381 unsigned PWM12OFL3
: 1;
22382 unsigned PWM12OFL4
: 1;
22383 unsigned PWM12OFL5
: 1;
22384 unsigned PWM12OFL6
: 1;
22385 unsigned PWM12OFL7
: 1;
22386 } __PWM12OFLbits_t
;
22388 extern __at(0x0DC7) volatile __PWM12OFLbits_t PWM12OFLbits
;
22390 #define _PWM12OFL0 0x01
22391 #define _PWM12OFL1 0x02
22392 #define _PWM12OFL2 0x04
22393 #define _PWM12OFL3 0x08
22394 #define _PWM12OFL4 0x10
22395 #define _PWM12OFL5 0x20
22396 #define _PWM12OFL6 0x40
22397 #define _PWM12OFL7 0x80
22399 //==============================================================================
22402 //==============================================================================
22405 extern __at(0x0DC8) __sfr PWM12OFH
;
22409 unsigned PWM12OFH0
: 1;
22410 unsigned PWM12OFH1
: 1;
22411 unsigned PWM12OFH2
: 1;
22412 unsigned PWM12OFH3
: 1;
22413 unsigned PWM12OFH4
: 1;
22414 unsigned PWM12OFH5
: 1;
22415 unsigned PWM12OFH6
: 1;
22416 unsigned PWM12OFH7
: 1;
22417 } __PWM12OFHbits_t
;
22419 extern __at(0x0DC8) volatile __PWM12OFHbits_t PWM12OFHbits
;
22421 #define _PWM12OFH0 0x01
22422 #define _PWM12OFH1 0x02
22423 #define _PWM12OFH2 0x04
22424 #define _PWM12OFH3 0x08
22425 #define _PWM12OFH4 0x10
22426 #define _PWM12OFH5 0x20
22427 #define _PWM12OFH6 0x40
22428 #define _PWM12OFH7 0x80
22430 //==============================================================================
22432 extern __at(0x0DC9) __sfr PWM12TMR
;
22434 //==============================================================================
22437 extern __at(0x0DC9) __sfr PWM12TMRL
;
22441 unsigned PWM12TMRL0
: 1;
22442 unsigned PWM12TMRL1
: 1;
22443 unsigned PWM12TMRL2
: 1;
22444 unsigned PWM12TMRL3
: 1;
22445 unsigned PWM12TMRL4
: 1;
22446 unsigned PWM12TMRL5
: 1;
22447 unsigned PWM12TMRL6
: 1;
22448 unsigned PWM12TMRL7
: 1;
22449 } __PWM12TMRLbits_t
;
22451 extern __at(0x0DC9) volatile __PWM12TMRLbits_t PWM12TMRLbits
;
22453 #define _PWM12TMRL0 0x01
22454 #define _PWM12TMRL1 0x02
22455 #define _PWM12TMRL2 0x04
22456 #define _PWM12TMRL3 0x08
22457 #define _PWM12TMRL4 0x10
22458 #define _PWM12TMRL5 0x20
22459 #define _PWM12TMRL6 0x40
22460 #define _PWM12TMRL7 0x80
22462 //==============================================================================
22465 //==============================================================================
22468 extern __at(0x0DCA) __sfr PWM12TMRH
;
22472 unsigned PWM12TMRH0
: 1;
22473 unsigned PWM12TMRH1
: 1;
22474 unsigned PWM12TMRH2
: 1;
22475 unsigned PWM12TMRH3
: 1;
22476 unsigned PWM12TMRH4
: 1;
22477 unsigned PWM12TMRH5
: 1;
22478 unsigned PWM12TMRH6
: 1;
22479 unsigned PWM12TMRH7
: 1;
22480 } __PWM12TMRHbits_t
;
22482 extern __at(0x0DCA) volatile __PWM12TMRHbits_t PWM12TMRHbits
;
22484 #define _PWM12TMRH0 0x01
22485 #define _PWM12TMRH1 0x02
22486 #define _PWM12TMRH2 0x04
22487 #define _PWM12TMRH3 0x08
22488 #define _PWM12TMRH4 0x10
22489 #define _PWM12TMRH5 0x20
22490 #define _PWM12TMRH6 0x40
22491 #define _PWM12TMRH7 0x80
22493 //==============================================================================
22496 //==============================================================================
22499 extern __at(0x0DCB) __sfr PWM12CON
;
22507 unsigned PWM12MODE0
: 1;
22508 unsigned PWM12MODE1
: 1;
22519 unsigned MODE0
: 1;
22520 unsigned MODE1
: 1;
22521 unsigned PWM12POL
: 1;
22522 unsigned PWM12OUT
: 1;
22524 unsigned PWM12EN
: 1;
22537 unsigned PWM12MODE
: 2;
22540 } __PWM12CONbits_t
;
22542 extern __at(0x0DCB) volatile __PWM12CONbits_t PWM12CONbits
;
22544 #define _PWM12CON_PWM12MODE0 0x04
22545 #define _PWM12CON_MODE0 0x04
22546 #define _PWM12CON_PWM12MODE1 0x08
22547 #define _PWM12CON_MODE1 0x08
22548 #define _PWM12CON_POL 0x10
22549 #define _PWM12CON_PWM12POL 0x10
22550 #define _PWM12CON_OUT 0x20
22551 #define _PWM12CON_PWM12OUT 0x20
22552 #define _PWM12CON_EN 0x80
22553 #define _PWM12CON_PWM12EN 0x80
22555 //==============================================================================
22558 //==============================================================================
22559 // PWM12INTCON Bits
22561 extern __at(0x0DCC) __sfr PWM12INTCON
;
22579 unsigned PWM12PRIE
: 1;
22580 unsigned PWM12DCIE
: 1;
22581 unsigned PWM12PHIE
: 1;
22582 unsigned PWM12OFIE
: 1;
22588 } __PWM12INTCONbits_t
;
22590 extern __at(0x0DCC) volatile __PWM12INTCONbits_t PWM12INTCONbits
;
22592 #define _PWM12INTCON_PRIE 0x01
22593 #define _PWM12INTCON_PWM12PRIE 0x01
22594 #define _PWM12INTCON_DCIE 0x02
22595 #define _PWM12INTCON_PWM12DCIE 0x02
22596 #define _PWM12INTCON_PHIE 0x04
22597 #define _PWM12INTCON_PWM12PHIE 0x04
22598 #define _PWM12INTCON_OFIE 0x08
22599 #define _PWM12INTCON_PWM12OFIE 0x08
22601 //==============================================================================
22604 //==============================================================================
22607 extern __at(0x0DCC) __sfr PWM12INTE
;
22625 unsigned PWM12PRIE
: 1;
22626 unsigned PWM12DCIE
: 1;
22627 unsigned PWM12PHIE
: 1;
22628 unsigned PWM12OFIE
: 1;
22634 } __PWM12INTEbits_t
;
22636 extern __at(0x0DCC) volatile __PWM12INTEbits_t PWM12INTEbits
;
22638 #define _PWM12INTE_PRIE 0x01
22639 #define _PWM12INTE_PWM12PRIE 0x01
22640 #define _PWM12INTE_DCIE 0x02
22641 #define _PWM12INTE_PWM12DCIE 0x02
22642 #define _PWM12INTE_PHIE 0x04
22643 #define _PWM12INTE_PWM12PHIE 0x04
22644 #define _PWM12INTE_OFIE 0x08
22645 #define _PWM12INTE_PWM12OFIE 0x08
22647 //==============================================================================
22650 //==============================================================================
22653 extern __at(0x0DCD) __sfr PWM12INTF
;
22671 unsigned PWM12PRIF
: 1;
22672 unsigned PWM12DCIF
: 1;
22673 unsigned PWM12PHIF
: 1;
22674 unsigned PWM12OFIF
: 1;
22680 } __PWM12INTFbits_t
;
22682 extern __at(0x0DCD) volatile __PWM12INTFbits_t PWM12INTFbits
;
22684 #define _PWM12INTF_PRIF 0x01
22685 #define _PWM12INTF_PWM12PRIF 0x01
22686 #define _PWM12INTF_DCIF 0x02
22687 #define _PWM12INTF_PWM12DCIF 0x02
22688 #define _PWM12INTF_PHIF 0x04
22689 #define _PWM12INTF_PWM12PHIF 0x04
22690 #define _PWM12INTF_OFIF 0x08
22691 #define _PWM12INTF_PWM12OFIF 0x08
22693 //==============================================================================
22696 //==============================================================================
22697 // PWM12INTFLG Bits
22699 extern __at(0x0DCD) __sfr PWM12INTFLG
;
22717 unsigned PWM12PRIF
: 1;
22718 unsigned PWM12DCIF
: 1;
22719 unsigned PWM12PHIF
: 1;
22720 unsigned PWM12OFIF
: 1;
22726 } __PWM12INTFLGbits_t
;
22728 extern __at(0x0DCD) volatile __PWM12INTFLGbits_t PWM12INTFLGbits
;
22730 #define _PWM12INTFLG_PRIF 0x01
22731 #define _PWM12INTFLG_PWM12PRIF 0x01
22732 #define _PWM12INTFLG_DCIF 0x02
22733 #define _PWM12INTFLG_PWM12DCIF 0x02
22734 #define _PWM12INTFLG_PHIF 0x04
22735 #define _PWM12INTFLG_PWM12PHIF 0x04
22736 #define _PWM12INTFLG_OFIF 0x08
22737 #define _PWM12INTFLG_PWM12OFIF 0x08
22739 //==============================================================================
22742 //==============================================================================
22743 // PWM12CLKCON Bits
22745 extern __at(0x0DCE) __sfr PWM12CLKCON
;
22751 unsigned PWM12CS0
: 1;
22752 unsigned PWM12CS1
: 1;
22753 unsigned PWM12CS2
: 1;
22755 unsigned PWM12PS0
: 1;
22756 unsigned PWM12PS1
: 1;
22757 unsigned PWM12PS2
: 1;
22781 unsigned PWM12CS
: 3;
22795 unsigned PWM12PS
: 3;
22798 } __PWM12CLKCONbits_t
;
22800 extern __at(0x0DCE) volatile __PWM12CLKCONbits_t PWM12CLKCONbits
;
22802 #define _PWM12CLKCON_PWM12CS0 0x01
22803 #define _PWM12CLKCON_CS0 0x01
22804 #define _PWM12CLKCON_PWM12CS1 0x02
22805 #define _PWM12CLKCON_CS1 0x02
22806 #define _PWM12CLKCON_PWM12CS2 0x04
22807 #define _PWM12CLKCON_CS2 0x04
22808 #define _PWM12CLKCON_PWM12PS0 0x10
22809 #define _PWM12CLKCON_PS0 0x10
22810 #define _PWM12CLKCON_PWM12PS1 0x20
22811 #define _PWM12CLKCON_PS1 0x20
22812 #define _PWM12CLKCON_PWM12PS2 0x40
22813 #define _PWM12CLKCON_PS2 0x40
22815 //==============================================================================
22818 //==============================================================================
22821 extern __at(0x0DCF) __sfr PWM12LDCON
;
22827 unsigned PWM12LDS0
: 1;
22828 unsigned PWM12LDS1
: 1;
22845 unsigned PWM12LDM
: 1;
22846 unsigned PWM12LD
: 1;
22851 unsigned PWM12LDS
: 2;
22860 } __PWM12LDCONbits_t
;
22862 extern __at(0x0DCF) volatile __PWM12LDCONbits_t PWM12LDCONbits
;
22864 #define _PWM12LDCON_PWM12LDS0 0x01
22865 #define _PWM12LDCON_LDS0 0x01
22866 #define _PWM12LDCON_PWM12LDS1 0x02
22867 #define _PWM12LDCON_LDS1 0x02
22868 #define _PWM12LDCON_LDT 0x40
22869 #define _PWM12LDCON_PWM12LDM 0x40
22870 #define _PWM12LDCON_LDA 0x80
22871 #define _PWM12LDCON_PWM12LD 0x80
22873 //==============================================================================
22876 //==============================================================================
22879 extern __at(0x0DD0) __sfr PWM12OFCON
;
22885 unsigned PWM12OFS0
: 1;
22886 unsigned PWM12OFS1
: 1;
22890 unsigned PWM12OFM0
: 1;
22891 unsigned PWM12OFM1
: 1;
22901 unsigned PWM12OFMC
: 1;
22915 unsigned PWM12OFS
: 2;
22922 unsigned PWM12OFM
: 2;
22932 } __PWM12OFCONbits_t
;
22934 extern __at(0x0DD0) volatile __PWM12OFCONbits_t PWM12OFCONbits
;
22936 #define _PWM12OFCON_PWM12OFS0 0x01
22937 #define _PWM12OFCON_OFS0 0x01
22938 #define _PWM12OFCON_PWM12OFS1 0x02
22939 #define _PWM12OFCON_OFS1 0x02
22940 #define _PWM12OFCON_OFO 0x10
22941 #define _PWM12OFCON_PWM12OFMC 0x10
22942 #define _PWM12OFCON_PWM12OFM0 0x20
22943 #define _PWM12OFCON_OFM0 0x20
22944 #define _PWM12OFCON_PWM12OFM1 0x40
22945 #define _PWM12OFCON_OFM1 0x40
22947 //==============================================================================
22950 //==============================================================================
22953 extern __at(0x0E0C) __sfr PPSLOCK
;
22957 unsigned PPSLOCKED
: 1;
22967 extern __at(0x0E0C) volatile __PPSLOCKbits_t PPSLOCKbits
;
22969 #define _PPSLOCKED 0x01
22971 //==============================================================================
22973 extern __at(0x0E0D) __sfr INTPPS
;
22974 extern __at(0x0E0E) __sfr T0CKIPPS
;
22975 extern __at(0x0E0F) __sfr T1CKIPPS
;
22976 extern __at(0x0E10) __sfr T1GPPS
;
22977 extern __at(0x0E11) __sfr T3CKIPPS
;
22978 extern __at(0x0E12) __sfr T3GPPS
;
22979 extern __at(0x0E13) __sfr T5CKIPPS
;
22980 extern __at(0x0E14) __sfr T5GPPS
;
22981 extern __at(0x0E15) __sfr T2CKIPPS
;
22982 extern __at(0x0E16) __sfr T4CKIPPS
;
22983 extern __at(0x0E17) __sfr T6CKIPPS
;
22984 extern __at(0x0E18) __sfr T8CKIPPS
;
22985 extern __at(0x0E19) __sfr CCP1PPS
;
22986 extern __at(0x0E1A) __sfr CCP2PPS
;
22987 extern __at(0x0E1B) __sfr CCP7PPS
;
22988 extern __at(0x0E1C) __sfr CCP8PPS
;
22989 extern __at(0x0E1D) __sfr COG1INPPS
;
22990 extern __at(0x0E1E) __sfr COG2INPPS
;
22991 extern __at(0x0E1F) __sfr COG3INPPS
;
22992 extern __at(0x0E20) __sfr COG4INPPS
;
22993 extern __at(0x0E21) __sfr MD1CLPPS
;
22994 extern __at(0x0E22) __sfr MD1CHPPS
;
22995 extern __at(0x0E23) __sfr MD1MODPPS
;
22996 extern __at(0x0E24) __sfr MD2CLPPS
;
22997 extern __at(0x0E25) __sfr MD2CHPPS
;
22998 extern __at(0x0E26) __sfr MD2MODPPS
;
22999 extern __at(0x0E27) __sfr MD3CLPPS
;
23000 extern __at(0x0E28) __sfr MD3CHPPS
;
23001 extern __at(0x0E29) __sfr MD3MODPPS
;
23002 extern __at(0x0E2A) __sfr MD4CLPPS
;
23003 extern __at(0x0E2B) __sfr MD4CHPPS
;
23004 extern __at(0x0E2C) __sfr MD4MODPPS
;
23005 extern __at(0x0E2D) __sfr PRG1RPPS
;
23006 extern __at(0x0E2E) __sfr PRG1FPPS
;
23007 extern __at(0x0E2F) __sfr PRG2RPPS
;
23008 extern __at(0x0E30) __sfr PRG2FPPS
;
23009 extern __at(0x0E31) __sfr PRG3RPPS
;
23010 extern __at(0x0E32) __sfr PRG3FPPS
;
23011 extern __at(0x0E33) __sfr PRG4RPPS
;
23012 extern __at(0x0E34) __sfr PRG4FPPS
;
23013 extern __at(0x0E35) __sfr CLCIN0PPS
;
23014 extern __at(0x0E36) __sfr CLCIN1PPS
;
23015 extern __at(0x0E37) __sfr CLCIN2PPS
;
23016 extern __at(0x0E38) __sfr CLCIN3PPS
;
23017 extern __at(0x0E39) __sfr ADCACTPPS
;
23018 extern __at(0x0E3A) __sfr SSPCLKPPS
;
23019 extern __at(0x0E3B) __sfr SSPDATPPS
;
23020 extern __at(0x0E3C) __sfr SSPSSPPS
;
23021 extern __at(0x0E3D) __sfr RXPPS
;
23022 extern __at(0x0E3E) __sfr CKPPS
;
23023 extern __at(0x0E90) __sfr RA0PPS
;
23024 extern __at(0x0E91) __sfr RA1PPS
;
23025 extern __at(0x0E92) __sfr RA2PPS
;
23026 extern __at(0x0E93) __sfr RA3PPS
;
23027 extern __at(0x0E94) __sfr RA4PPS
;
23028 extern __at(0x0E95) __sfr RA5PPS
;
23029 extern __at(0x0E96) __sfr RA6PPS
;
23030 extern __at(0x0E97) __sfr RA7PPS
;
23031 extern __at(0x0E98) __sfr RB0PPS
;
23032 extern __at(0x0E99) __sfr RB1PPS
;
23033 extern __at(0x0E9A) __sfr RB2PPS
;
23034 extern __at(0x0E9B) __sfr RB3PPS
;
23035 extern __at(0x0E9C) __sfr RB4PPS
;
23036 extern __at(0x0E9D) __sfr RB5PPS
;
23037 extern __at(0x0E9E) __sfr RB6PPS
;
23038 extern __at(0x0E9F) __sfr RB7PPS
;
23039 extern __at(0x0EA0) __sfr RC0PPS
;
23040 extern __at(0x0EA1) __sfr RC1PPS
;
23041 extern __at(0x0EA2) __sfr RC2PPS
;
23042 extern __at(0x0EA3) __sfr RC3PPS
;
23043 extern __at(0x0EA4) __sfr RC4PPS
;
23044 extern __at(0x0EA5) __sfr RC5PPS
;
23045 extern __at(0x0EA6) __sfr RC6PPS
;
23046 extern __at(0x0EA7) __sfr RC7PPS
;
23047 extern __at(0x0EA8) __sfr RD0PPS
;
23048 extern __at(0x0EA9) __sfr RD1PPS
;
23049 extern __at(0x0EAA) __sfr RD2PPS
;
23050 extern __at(0x0EAB) __sfr RD3PPS
;
23051 extern __at(0x0EAC) __sfr RD4PPS
;
23052 extern __at(0x0EAD) __sfr RD5PPS
;
23053 extern __at(0x0EAE) __sfr RD6PPS
;
23054 extern __at(0x0EAF) __sfr RD7PPS
;
23055 extern __at(0x0EB0) __sfr RE0PPS
;
23056 extern __at(0x0EB1) __sfr RE1PPS
;
23057 extern __at(0x0EB2) __sfr RE2PPS
;
23059 //==============================================================================
23062 extern __at(0x0F0F) __sfr CLCDATA
;
23066 unsigned MCLC1OUT
: 1;
23067 unsigned MCLC2OUT
: 1;
23068 unsigned MCLC3OUT
: 1;
23069 unsigned MLC4OUT
: 1;
23076 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits
;
23078 #define _MCLC1OUT 0x01
23079 #define _MCLC2OUT 0x02
23080 #define _MCLC3OUT 0x04
23081 #define _MLC4OUT 0x08
23083 //==============================================================================
23086 //==============================================================================
23089 extern __at(0x0F10) __sfr CLC1CON
;
23095 unsigned LC1MODE0
: 1;
23096 unsigned LC1MODE1
: 1;
23097 unsigned LC1MODE2
: 1;
23098 unsigned LC1INTN
: 1;
23099 unsigned LC1INTP
: 1;
23100 unsigned LC1OUT
: 1;
23102 unsigned LC1EN
: 1;
23107 unsigned MODE0
: 1;
23108 unsigned MODE1
: 1;
23109 unsigned MODE2
: 1;
23119 unsigned LC1MODE
: 3;
23130 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits
;
23132 #define _CLC1CON_LC1MODE0 0x01
23133 #define _CLC1CON_MODE0 0x01
23134 #define _CLC1CON_LC1MODE1 0x02
23135 #define _CLC1CON_MODE1 0x02
23136 #define _CLC1CON_LC1MODE2 0x04
23137 #define _CLC1CON_MODE2 0x04
23138 #define _CLC1CON_LC1INTN 0x08
23139 #define _CLC1CON_INTN 0x08
23140 #define _CLC1CON_LC1INTP 0x10
23141 #define _CLC1CON_INTP 0x10
23142 #define _CLC1CON_LC1OUT 0x20
23143 #define _CLC1CON_OUT 0x20
23144 #define _CLC1CON_LC1EN 0x80
23145 #define _CLC1CON_EN 0x80
23147 //==============================================================================
23150 //==============================================================================
23153 extern __at(0x0F11) __sfr CLC1POL
;
23159 unsigned LC1G1POL
: 1;
23160 unsigned LC1G2POL
: 1;
23161 unsigned LC1G3POL
: 1;
23162 unsigned LC1G4POL
: 1;
23166 unsigned LC1POL
: 1;
23171 unsigned G1POL
: 1;
23172 unsigned G2POL
: 1;
23173 unsigned G3POL
: 1;
23174 unsigned G4POL
: 1;
23182 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits
;
23184 #define _LC1G1POL 0x01
23185 #define _G1POL 0x01
23186 #define _LC1G2POL 0x02
23187 #define _G2POL 0x02
23188 #define _LC1G3POL 0x04
23189 #define _G3POL 0x04
23190 #define _LC1G4POL 0x08
23191 #define _G4POL 0x08
23192 #define _LC1POL 0x80
23195 //==============================================================================
23198 //==============================================================================
23201 extern __at(0x0F12) __sfr CLC1SEL0
;
23207 unsigned LC1D1S0
: 1;
23208 unsigned LC1D1S1
: 1;
23209 unsigned LC1D1S2
: 1;
23210 unsigned LC1D1S3
: 1;
23211 unsigned LC1D1S4
: 1;
23212 unsigned LC1D1S5
: 1;
23231 unsigned LC1D1S
: 6;
23240 } __CLC1SEL0bits_t
;
23242 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits
;
23244 #define _LC1D1S0 0x01
23246 #define _LC1D1S1 0x02
23248 #define _LC1D1S2 0x04
23250 #define _LC1D1S3 0x08
23252 #define _LC1D1S4 0x10
23254 #define _LC1D1S5 0x20
23257 //==============================================================================
23260 //==============================================================================
23263 extern __at(0x0F13) __sfr CLC1SEL1
;
23269 unsigned LC1D2S0
: 1;
23270 unsigned LC1D2S1
: 1;
23271 unsigned LC1D2S2
: 1;
23272 unsigned LC1D2S3
: 1;
23273 unsigned LC1D2S4
: 1;
23274 unsigned LC1D2S5
: 1;
23293 unsigned LC1D2S
: 6;
23302 } __CLC1SEL1bits_t
;
23304 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits
;
23306 #define _LC1D2S0 0x01
23308 #define _LC1D2S1 0x02
23310 #define _LC1D2S2 0x04
23312 #define _LC1D2S3 0x08
23314 #define _LC1D2S4 0x10
23316 #define _LC1D2S5 0x20
23319 //==============================================================================
23322 //==============================================================================
23325 extern __at(0x0F14) __sfr CLC1SEL2
;
23331 unsigned LC1D3S0
: 1;
23332 unsigned LC1D3S1
: 1;
23333 unsigned LC1D3S2
: 1;
23334 unsigned LC1D3S3
: 1;
23335 unsigned LC1D3S4
: 1;
23336 unsigned LC1D3S5
: 1;
23361 unsigned LC1D3S
: 6;
23364 } __CLC1SEL2bits_t
;
23366 extern __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits
;
23368 #define _LC1D3S0 0x01
23370 #define _LC1D3S1 0x02
23372 #define _LC1D3S2 0x04
23374 #define _LC1D3S3 0x08
23376 #define _LC1D3S4 0x10
23378 #define _LC1D3S5 0x20
23381 //==============================================================================
23384 //==============================================================================
23387 extern __at(0x0F15) __sfr CLC1SEL3
;
23393 unsigned LC1D4S0
: 1;
23394 unsigned LC1D4S1
: 1;
23395 unsigned LC1D4S2
: 1;
23396 unsigned LC1D4S3
: 1;
23397 unsigned LC1D4S4
: 1;
23398 unsigned LC1D4S5
: 1;
23423 unsigned LC1D4S
: 6;
23426 } __CLC1SEL3bits_t
;
23428 extern __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits
;
23430 #define _LC1D4S0 0x01
23432 #define _LC1D4S1 0x02
23434 #define _LC1D4S2 0x04
23436 #define _LC1D4S3 0x08
23438 #define _LC1D4S4 0x10
23440 #define _LC1D4S5 0x20
23443 //==============================================================================
23446 //==============================================================================
23449 extern __at(0x0F16) __sfr CLC1GLS0
;
23455 unsigned LC1G1D1N
: 1;
23456 unsigned LC1G1D1T
: 1;
23457 unsigned LC1G1D2N
: 1;
23458 unsigned LC1G1D2T
: 1;
23459 unsigned LC1G1D3N
: 1;
23460 unsigned LC1G1D3T
: 1;
23461 unsigned LC1G1D4N
: 1;
23462 unsigned LC1G1D4T
: 1;
23476 } __CLC1GLS0bits_t
;
23478 extern __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits
;
23480 #define _LC1G1D1N 0x01
23482 #define _LC1G1D1T 0x02
23484 #define _LC1G1D2N 0x04
23486 #define _LC1G1D2T 0x08
23488 #define _LC1G1D3N 0x10
23490 #define _LC1G1D3T 0x20
23492 #define _LC1G1D4N 0x40
23494 #define _LC1G1D4T 0x80
23497 //==============================================================================
23500 //==============================================================================
23503 extern __at(0x0F17) __sfr CLC1GLS1
;
23509 unsigned LC1G2D1N
: 1;
23510 unsigned LC1G2D1T
: 1;
23511 unsigned LC1G2D2N
: 1;
23512 unsigned LC1G2D2T
: 1;
23513 unsigned LC1G2D3N
: 1;
23514 unsigned LC1G2D3T
: 1;
23515 unsigned LC1G2D4N
: 1;
23516 unsigned LC1G2D4T
: 1;
23530 } __CLC1GLS1bits_t
;
23532 extern __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits
;
23534 #define _CLC1GLS1_LC1G2D1N 0x01
23535 #define _CLC1GLS1_D1N 0x01
23536 #define _CLC1GLS1_LC1G2D1T 0x02
23537 #define _CLC1GLS1_D1T 0x02
23538 #define _CLC1GLS1_LC1G2D2N 0x04
23539 #define _CLC1GLS1_D2N 0x04
23540 #define _CLC1GLS1_LC1G2D2T 0x08
23541 #define _CLC1GLS1_D2T 0x08
23542 #define _CLC1GLS1_LC1G2D3N 0x10
23543 #define _CLC1GLS1_D3N 0x10
23544 #define _CLC1GLS1_LC1G2D3T 0x20
23545 #define _CLC1GLS1_D3T 0x20
23546 #define _CLC1GLS1_LC1G2D4N 0x40
23547 #define _CLC1GLS1_D4N 0x40
23548 #define _CLC1GLS1_LC1G2D4T 0x80
23549 #define _CLC1GLS1_D4T 0x80
23551 //==============================================================================
23554 //==============================================================================
23557 extern __at(0x0F18) __sfr CLC1GLS2
;
23563 unsigned LC1G3D1N
: 1;
23564 unsigned LC1G3D1T
: 1;
23565 unsigned LC1G3D2N
: 1;
23566 unsigned LC1G3D2T
: 1;
23567 unsigned LC1G3D3N
: 1;
23568 unsigned LC1G3D3T
: 1;
23569 unsigned LC1G3D4N
: 1;
23570 unsigned LC1G3D4T
: 1;
23584 } __CLC1GLS2bits_t
;
23586 extern __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits
;
23588 #define _CLC1GLS2_LC1G3D1N 0x01
23589 #define _CLC1GLS2_D1N 0x01
23590 #define _CLC1GLS2_LC1G3D1T 0x02
23591 #define _CLC1GLS2_D1T 0x02
23592 #define _CLC1GLS2_LC1G3D2N 0x04
23593 #define _CLC1GLS2_D2N 0x04
23594 #define _CLC1GLS2_LC1G3D2T 0x08
23595 #define _CLC1GLS2_D2T 0x08
23596 #define _CLC1GLS2_LC1G3D3N 0x10
23597 #define _CLC1GLS2_D3N 0x10
23598 #define _CLC1GLS2_LC1G3D3T 0x20
23599 #define _CLC1GLS2_D3T 0x20
23600 #define _CLC1GLS2_LC1G3D4N 0x40
23601 #define _CLC1GLS2_D4N 0x40
23602 #define _CLC1GLS2_LC1G3D4T 0x80
23603 #define _CLC1GLS2_D4T 0x80
23605 //==============================================================================
23608 //==============================================================================
23611 extern __at(0x0F19) __sfr CLC1GLS3
;
23617 unsigned LC1G4D1N
: 1;
23618 unsigned LC1G4D1T
: 1;
23619 unsigned LC1G4D2N
: 1;
23620 unsigned LC1G4D2T
: 1;
23621 unsigned LC1G4D3N
: 1;
23622 unsigned LC1G4D3T
: 1;
23623 unsigned LC1G4D4N
: 1;
23624 unsigned LC1G4D4T
: 1;
23629 unsigned G4D1N
: 1;
23630 unsigned G4D1T
: 1;
23631 unsigned G4D2N
: 1;
23632 unsigned G4D2T
: 1;
23633 unsigned G4D3N
: 1;
23634 unsigned G4D3T
: 1;
23635 unsigned G4D4N
: 1;
23636 unsigned G4D4T
: 1;
23638 } __CLC1GLS3bits_t
;
23640 extern __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits
;
23642 #define _LC1G4D1N 0x01
23643 #define _G4D1N 0x01
23644 #define _LC1G4D1T 0x02
23645 #define _G4D1T 0x02
23646 #define _LC1G4D2N 0x04
23647 #define _G4D2N 0x04
23648 #define _LC1G4D2T 0x08
23649 #define _G4D2T 0x08
23650 #define _LC1G4D3N 0x10
23651 #define _G4D3N 0x10
23652 #define _LC1G4D3T 0x20
23653 #define _G4D3T 0x20
23654 #define _LC1G4D4N 0x40
23655 #define _G4D4N 0x40
23656 #define _LC1G4D4T 0x80
23657 #define _G4D4T 0x80
23659 //==============================================================================
23662 //==============================================================================
23665 extern __at(0x0F1A) __sfr CLC2CON
;
23671 unsigned LC2MODE0
: 1;
23672 unsigned LC2MODE1
: 1;
23673 unsigned LC2MODE2
: 1;
23674 unsigned LC2INTN
: 1;
23675 unsigned LC2INTP
: 1;
23676 unsigned LC2OUT
: 1;
23678 unsigned LC2EN
: 1;
23683 unsigned MODE0
: 1;
23684 unsigned MODE1
: 1;
23685 unsigned MODE2
: 1;
23695 unsigned LC2MODE
: 3;
23706 extern __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits
;
23708 #define _CLC2CON_LC2MODE0 0x01
23709 #define _CLC2CON_MODE0 0x01
23710 #define _CLC2CON_LC2MODE1 0x02
23711 #define _CLC2CON_MODE1 0x02
23712 #define _CLC2CON_LC2MODE2 0x04
23713 #define _CLC2CON_MODE2 0x04
23714 #define _CLC2CON_LC2INTN 0x08
23715 #define _CLC2CON_INTN 0x08
23716 #define _CLC2CON_LC2INTP 0x10
23717 #define _CLC2CON_INTP 0x10
23718 #define _CLC2CON_LC2OUT 0x20
23719 #define _CLC2CON_OUT 0x20
23720 #define _CLC2CON_LC2EN 0x80
23721 #define _CLC2CON_EN 0x80
23723 //==============================================================================
23726 //==============================================================================
23729 extern __at(0x0F1B) __sfr CLC2POL
;
23735 unsigned LC2G1POL
: 1;
23736 unsigned LC2G2POL
: 1;
23737 unsigned LC2G3POL
: 1;
23738 unsigned LC2G4POL
: 1;
23742 unsigned LC2POL
: 1;
23747 unsigned G1POL
: 1;
23748 unsigned G2POL
: 1;
23749 unsigned G3POL
: 1;
23750 unsigned G4POL
: 1;
23758 extern __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits
;
23760 #define _CLC2POL_LC2G1POL 0x01
23761 #define _CLC2POL_G1POL 0x01
23762 #define _CLC2POL_LC2G2POL 0x02
23763 #define _CLC2POL_G2POL 0x02
23764 #define _CLC2POL_LC2G3POL 0x04
23765 #define _CLC2POL_G3POL 0x04
23766 #define _CLC2POL_LC2G4POL 0x08
23767 #define _CLC2POL_G4POL 0x08
23768 #define _CLC2POL_LC2POL 0x80
23769 #define _CLC2POL_POL 0x80
23771 //==============================================================================
23774 //==============================================================================
23777 extern __at(0x0F1C) __sfr CLC2SEL0
;
23783 unsigned LC2D1S0
: 1;
23784 unsigned LC2D1S1
: 1;
23785 unsigned LC2D1S2
: 1;
23786 unsigned LC2D1S3
: 1;
23787 unsigned LC2D1S4
: 1;
23788 unsigned LC2D1S5
: 1;
23807 unsigned LC2D1S
: 6;
23816 } __CLC2SEL0bits_t
;
23818 extern __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits
;
23820 #define _CLC2SEL0_LC2D1S0 0x01
23821 #define _CLC2SEL0_D1S0 0x01
23822 #define _CLC2SEL0_LC2D1S1 0x02
23823 #define _CLC2SEL0_D1S1 0x02
23824 #define _CLC2SEL0_LC2D1S2 0x04
23825 #define _CLC2SEL0_D1S2 0x04
23826 #define _CLC2SEL0_LC2D1S3 0x08
23827 #define _CLC2SEL0_D1S3 0x08
23828 #define _CLC2SEL0_LC2D1S4 0x10
23829 #define _CLC2SEL0_D1S4 0x10
23830 #define _CLC2SEL0_LC2D1S5 0x20
23831 #define _CLC2SEL0_D1S5 0x20
23833 //==============================================================================
23836 //==============================================================================
23839 extern __at(0x0F1D) __sfr CLC2SEL1
;
23845 unsigned LC2D2S0
: 1;
23846 unsigned LC2D2S1
: 1;
23847 unsigned LC2D2S2
: 1;
23848 unsigned LC2D2S3
: 1;
23849 unsigned LC2D2S4
: 1;
23850 unsigned LC2D2S5
: 1;
23869 unsigned LC2D2S
: 6;
23878 } __CLC2SEL1bits_t
;
23880 extern __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits
;
23882 #define _CLC2SEL1_LC2D2S0 0x01
23883 #define _CLC2SEL1_D2S0 0x01
23884 #define _CLC2SEL1_LC2D2S1 0x02
23885 #define _CLC2SEL1_D2S1 0x02
23886 #define _CLC2SEL1_LC2D2S2 0x04
23887 #define _CLC2SEL1_D2S2 0x04
23888 #define _CLC2SEL1_LC2D2S3 0x08
23889 #define _CLC2SEL1_D2S3 0x08
23890 #define _CLC2SEL1_LC2D2S4 0x10
23891 #define _CLC2SEL1_D2S4 0x10
23892 #define _CLC2SEL1_LC2D2S5 0x20
23893 #define _CLC2SEL1_D2S5 0x20
23895 //==============================================================================
23898 //==============================================================================
23901 extern __at(0x0F1E) __sfr CLC2SEL2
;
23907 unsigned LC2D3S0
: 1;
23908 unsigned LC2D3S1
: 1;
23909 unsigned LC2D3S2
: 1;
23910 unsigned LC2D3S3
: 1;
23911 unsigned LC2D3S4
: 1;
23912 unsigned LC2D3S5
: 1;
23937 unsigned LC2D3S
: 6;
23940 } __CLC2SEL2bits_t
;
23942 extern __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits
;
23944 #define _CLC2SEL2_LC2D3S0 0x01
23945 #define _CLC2SEL2_D3S0 0x01
23946 #define _CLC2SEL2_LC2D3S1 0x02
23947 #define _CLC2SEL2_D3S1 0x02
23948 #define _CLC2SEL2_LC2D3S2 0x04
23949 #define _CLC2SEL2_D3S2 0x04
23950 #define _CLC2SEL2_LC2D3S3 0x08
23951 #define _CLC2SEL2_D3S3 0x08
23952 #define _CLC2SEL2_LC2D3S4 0x10
23953 #define _CLC2SEL2_D3S4 0x10
23954 #define _CLC2SEL2_LC2D3S5 0x20
23955 #define _CLC2SEL2_D3S5 0x20
23957 //==============================================================================
23960 //==============================================================================
23963 extern __at(0x0F1F) __sfr CLC2SEL3
;
23969 unsigned LC2D4S0
: 1;
23970 unsigned LC2D4S1
: 1;
23971 unsigned LC2D4S2
: 1;
23972 unsigned LC2D4S3
: 1;
23973 unsigned LC2D4S4
: 1;
23974 unsigned LC2D4S5
: 1;
23993 unsigned LC2D4S
: 6;
24002 } __CLC2SEL3bits_t
;
24004 extern __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits
;
24006 #define _CLC2SEL3_LC2D4S0 0x01
24007 #define _CLC2SEL3_D4S0 0x01
24008 #define _CLC2SEL3_LC2D4S1 0x02
24009 #define _CLC2SEL3_D4S1 0x02
24010 #define _CLC2SEL3_LC2D4S2 0x04
24011 #define _CLC2SEL3_D4S2 0x04
24012 #define _CLC2SEL3_LC2D4S3 0x08
24013 #define _CLC2SEL3_D4S3 0x08
24014 #define _CLC2SEL3_LC2D4S4 0x10
24015 #define _CLC2SEL3_D4S4 0x10
24016 #define _CLC2SEL3_LC2D4S5 0x20
24017 #define _CLC2SEL3_D4S5 0x20
24019 //==============================================================================
24022 //==============================================================================
24025 extern __at(0x0F20) __sfr CLC2GLS0
;
24031 unsigned LC2G1D1N
: 1;
24032 unsigned LC2G1D1T
: 1;
24033 unsigned LC2G1D2N
: 1;
24034 unsigned LC2G1D2T
: 1;
24035 unsigned LC2G1D3N
: 1;
24036 unsigned LC2G1D3T
: 1;
24037 unsigned LC2G1D4N
: 1;
24038 unsigned LC2G1D4T
: 1;
24052 } __CLC2GLS0bits_t
;
24054 extern __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits
;
24056 #define _CLC2GLS0_LC2G1D1N 0x01
24057 #define _CLC2GLS0_D1N 0x01
24058 #define _CLC2GLS0_LC2G1D1T 0x02
24059 #define _CLC2GLS0_D1T 0x02
24060 #define _CLC2GLS0_LC2G1D2N 0x04
24061 #define _CLC2GLS0_D2N 0x04
24062 #define _CLC2GLS0_LC2G1D2T 0x08
24063 #define _CLC2GLS0_D2T 0x08
24064 #define _CLC2GLS0_LC2G1D3N 0x10
24065 #define _CLC2GLS0_D3N 0x10
24066 #define _CLC2GLS0_LC2G1D3T 0x20
24067 #define _CLC2GLS0_D3T 0x20
24068 #define _CLC2GLS0_LC2G1D4N 0x40
24069 #define _CLC2GLS0_D4N 0x40
24070 #define _CLC2GLS0_LC2G1D4T 0x80
24071 #define _CLC2GLS0_D4T 0x80
24073 //==============================================================================
24076 //==============================================================================
24079 extern __at(0x0F21) __sfr CLC2GLS1
;
24085 unsigned LC2G2D1N
: 1;
24086 unsigned LC2G2D1T
: 1;
24087 unsigned LC2G2D2N
: 1;
24088 unsigned LC2G2D2T
: 1;
24089 unsigned LC2G2D3N
: 1;
24090 unsigned LC2G2D3T
: 1;
24091 unsigned LC2G2D4N
: 1;
24092 unsigned LC2G2D4T
: 1;
24106 } __CLC2GLS1bits_t
;
24108 extern __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits
;
24110 #define _CLC2GLS1_LC2G2D1N 0x01
24111 #define _CLC2GLS1_D1N 0x01
24112 #define _CLC2GLS1_LC2G2D1T 0x02
24113 #define _CLC2GLS1_D1T 0x02
24114 #define _CLC2GLS1_LC2G2D2N 0x04
24115 #define _CLC2GLS1_D2N 0x04
24116 #define _CLC2GLS1_LC2G2D2T 0x08
24117 #define _CLC2GLS1_D2T 0x08
24118 #define _CLC2GLS1_LC2G2D3N 0x10
24119 #define _CLC2GLS1_D3N 0x10
24120 #define _CLC2GLS1_LC2G2D3T 0x20
24121 #define _CLC2GLS1_D3T 0x20
24122 #define _CLC2GLS1_LC2G2D4N 0x40
24123 #define _CLC2GLS1_D4N 0x40
24124 #define _CLC2GLS1_LC2G2D4T 0x80
24125 #define _CLC2GLS1_D4T 0x80
24127 //==============================================================================
24130 //==============================================================================
24133 extern __at(0x0F22) __sfr CLC2GLS2
;
24139 unsigned LC2G3D1N
: 1;
24140 unsigned LC2G3D1T
: 1;
24141 unsigned LC2G3D2N
: 1;
24142 unsigned LC2G3D2T
: 1;
24143 unsigned LC2G3D3N
: 1;
24144 unsigned LC2G3D3T
: 1;
24145 unsigned LC2G3D4N
: 1;
24146 unsigned LC2G3D4T
: 1;
24160 } __CLC2GLS2bits_t
;
24162 extern __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits
;
24164 #define _CLC2GLS2_LC2G3D1N 0x01
24165 #define _CLC2GLS2_D1N 0x01
24166 #define _CLC2GLS2_LC2G3D1T 0x02
24167 #define _CLC2GLS2_D1T 0x02
24168 #define _CLC2GLS2_LC2G3D2N 0x04
24169 #define _CLC2GLS2_D2N 0x04
24170 #define _CLC2GLS2_LC2G3D2T 0x08
24171 #define _CLC2GLS2_D2T 0x08
24172 #define _CLC2GLS2_LC2G3D3N 0x10
24173 #define _CLC2GLS2_D3N 0x10
24174 #define _CLC2GLS2_LC2G3D3T 0x20
24175 #define _CLC2GLS2_D3T 0x20
24176 #define _CLC2GLS2_LC2G3D4N 0x40
24177 #define _CLC2GLS2_D4N 0x40
24178 #define _CLC2GLS2_LC2G3D4T 0x80
24179 #define _CLC2GLS2_D4T 0x80
24181 //==============================================================================
24184 //==============================================================================
24187 extern __at(0x0F23) __sfr CLC2GLS3
;
24193 unsigned LC2G4D1N
: 1;
24194 unsigned LC2G4D1T
: 1;
24195 unsigned LC2G4D2N
: 1;
24196 unsigned LC2G4D2T
: 1;
24197 unsigned LC2G4D3N
: 1;
24198 unsigned LC2G4D3T
: 1;
24199 unsigned LC2G4D4N
: 1;
24200 unsigned LC2G4D4T
: 1;
24205 unsigned G4D1N
: 1;
24206 unsigned G4D1T
: 1;
24207 unsigned G4D2N
: 1;
24208 unsigned G4D2T
: 1;
24209 unsigned G4D3N
: 1;
24210 unsigned G4D3T
: 1;
24211 unsigned G4D4N
: 1;
24212 unsigned G4D4T
: 1;
24214 } __CLC2GLS3bits_t
;
24216 extern __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits
;
24218 #define _CLC2GLS3_LC2G4D1N 0x01
24219 #define _CLC2GLS3_G4D1N 0x01
24220 #define _CLC2GLS3_LC2G4D1T 0x02
24221 #define _CLC2GLS3_G4D1T 0x02
24222 #define _CLC2GLS3_LC2G4D2N 0x04
24223 #define _CLC2GLS3_G4D2N 0x04
24224 #define _CLC2GLS3_LC2G4D2T 0x08
24225 #define _CLC2GLS3_G4D2T 0x08
24226 #define _CLC2GLS3_LC2G4D3N 0x10
24227 #define _CLC2GLS3_G4D3N 0x10
24228 #define _CLC2GLS3_LC2G4D3T 0x20
24229 #define _CLC2GLS3_G4D3T 0x20
24230 #define _CLC2GLS3_LC2G4D4N 0x40
24231 #define _CLC2GLS3_G4D4N 0x40
24232 #define _CLC2GLS3_LC2G4D4T 0x80
24233 #define _CLC2GLS3_G4D4T 0x80
24235 //==============================================================================
24238 //==============================================================================
24241 extern __at(0x0F24) __sfr CLC3CON
;
24247 unsigned LC3MODE0
: 1;
24248 unsigned LC3MODE1
: 1;
24249 unsigned LC3MODE2
: 1;
24250 unsigned LC3INTN
: 1;
24251 unsigned LC3INTP
: 1;
24252 unsigned LC3OUT
: 1;
24254 unsigned LC3EN
: 1;
24259 unsigned MODE0
: 1;
24260 unsigned MODE1
: 1;
24261 unsigned MODE2
: 1;
24271 unsigned LC3MODE
: 3;
24282 extern __at(0x0F24) volatile __CLC3CONbits_t CLC3CONbits
;
24284 #define _CLC3CON_LC3MODE0 0x01
24285 #define _CLC3CON_MODE0 0x01
24286 #define _CLC3CON_LC3MODE1 0x02
24287 #define _CLC3CON_MODE1 0x02
24288 #define _CLC3CON_LC3MODE2 0x04
24289 #define _CLC3CON_MODE2 0x04
24290 #define _CLC3CON_LC3INTN 0x08
24291 #define _CLC3CON_INTN 0x08
24292 #define _CLC3CON_LC3INTP 0x10
24293 #define _CLC3CON_INTP 0x10
24294 #define _CLC3CON_LC3OUT 0x20
24295 #define _CLC3CON_OUT 0x20
24296 #define _CLC3CON_LC3EN 0x80
24297 #define _CLC3CON_EN 0x80
24299 //==============================================================================
24302 //==============================================================================
24305 extern __at(0x0F25) __sfr CLC3POL
;
24311 unsigned LC3G1POL
: 1;
24312 unsigned LC3G2POL
: 1;
24313 unsigned LC3G3POL
: 1;
24314 unsigned LC3G4POL
: 1;
24318 unsigned LC3POL
: 1;
24323 unsigned G1POL
: 1;
24324 unsigned G2POL
: 1;
24325 unsigned G3POL
: 1;
24326 unsigned G4POL
: 1;
24334 extern __at(0x0F25) volatile __CLC3POLbits_t CLC3POLbits
;
24336 #define _CLC3POL_LC3G1POL 0x01
24337 #define _CLC3POL_G1POL 0x01
24338 #define _CLC3POL_LC3G2POL 0x02
24339 #define _CLC3POL_G2POL 0x02
24340 #define _CLC3POL_LC3G3POL 0x04
24341 #define _CLC3POL_G3POL 0x04
24342 #define _CLC3POL_LC3G4POL 0x08
24343 #define _CLC3POL_G4POL 0x08
24344 #define _CLC3POL_LC3POL 0x80
24345 #define _CLC3POL_POL 0x80
24347 //==============================================================================
24350 //==============================================================================
24353 extern __at(0x0F26) __sfr CLC3SEL0
;
24359 unsigned LC3D1S0
: 1;
24360 unsigned LC3D1S1
: 1;
24361 unsigned LC3D1S2
: 1;
24362 unsigned LC3D1S3
: 1;
24363 unsigned LC3D1S4
: 1;
24364 unsigned LC3D1S5
: 1;
24383 unsigned LC3D1S
: 6;
24392 } __CLC3SEL0bits_t
;
24394 extern __at(0x0F26) volatile __CLC3SEL0bits_t CLC3SEL0bits
;
24396 #define _CLC3SEL0_LC3D1S0 0x01
24397 #define _CLC3SEL0_D1S0 0x01
24398 #define _CLC3SEL0_LC3D1S1 0x02
24399 #define _CLC3SEL0_D1S1 0x02
24400 #define _CLC3SEL0_LC3D1S2 0x04
24401 #define _CLC3SEL0_D1S2 0x04
24402 #define _CLC3SEL0_LC3D1S3 0x08
24403 #define _CLC3SEL0_D1S3 0x08
24404 #define _CLC3SEL0_LC3D1S4 0x10
24405 #define _CLC3SEL0_D1S4 0x10
24406 #define _CLC3SEL0_LC3D1S5 0x20
24407 #define _CLC3SEL0_D1S5 0x20
24409 //==============================================================================
24412 //==============================================================================
24415 extern __at(0x0F27) __sfr CLC3SEL1
;
24421 unsigned LC3D2S0
: 1;
24422 unsigned LC3D2S1
: 1;
24423 unsigned LC3D2S2
: 1;
24424 unsigned LC3D2S3
: 1;
24425 unsigned LC3D2S4
: 1;
24426 unsigned LC3D2S5
: 1;
24451 unsigned LC3D2S
: 6;
24454 } __CLC3SEL1bits_t
;
24456 extern __at(0x0F27) volatile __CLC3SEL1bits_t CLC3SEL1bits
;
24458 #define _CLC3SEL1_LC3D2S0 0x01
24459 #define _CLC3SEL1_D2S0 0x01
24460 #define _CLC3SEL1_LC3D2S1 0x02
24461 #define _CLC3SEL1_D2S1 0x02
24462 #define _CLC3SEL1_LC3D2S2 0x04
24463 #define _CLC3SEL1_D2S2 0x04
24464 #define _CLC3SEL1_LC3D2S3 0x08
24465 #define _CLC3SEL1_D2S3 0x08
24466 #define _CLC3SEL1_LC3D2S4 0x10
24467 #define _CLC3SEL1_D2S4 0x10
24468 #define _CLC3SEL1_LC3D2S5 0x20
24469 #define _CLC3SEL1_D2S5 0x20
24471 //==============================================================================
24474 //==============================================================================
24477 extern __at(0x0F28) __sfr CLC3SEL2
;
24483 unsigned LC3D3S0
: 1;
24484 unsigned LC3D3S1
: 1;
24485 unsigned LC3D3S2
: 1;
24486 unsigned LC3D3S3
: 1;
24487 unsigned LC3D3S4
: 1;
24488 unsigned LC3D3S5
: 1;
24507 unsigned LC3D3S
: 6;
24516 } __CLC3SEL2bits_t
;
24518 extern __at(0x0F28) volatile __CLC3SEL2bits_t CLC3SEL2bits
;
24520 #define _CLC3SEL2_LC3D3S0 0x01
24521 #define _CLC3SEL2_D3S0 0x01
24522 #define _CLC3SEL2_LC3D3S1 0x02
24523 #define _CLC3SEL2_D3S1 0x02
24524 #define _CLC3SEL2_LC3D3S2 0x04
24525 #define _CLC3SEL2_D3S2 0x04
24526 #define _CLC3SEL2_LC3D3S3 0x08
24527 #define _CLC3SEL2_D3S3 0x08
24528 #define _CLC3SEL2_LC3D3S4 0x10
24529 #define _CLC3SEL2_D3S4 0x10
24530 #define _CLC3SEL2_LC3D3S5 0x20
24531 #define _CLC3SEL2_D3S5 0x20
24533 //==============================================================================
24536 //==============================================================================
24539 extern __at(0x0F29) __sfr CLC3SEL3
;
24545 unsigned LC3D4S0
: 1;
24546 unsigned LC3D4S1
: 1;
24547 unsigned LC3D4S2
: 1;
24548 unsigned LC3D4S3
: 1;
24549 unsigned LC3D4S4
: 1;
24550 unsigned LC3D4S5
: 1;
24569 unsigned LC3D4S
: 6;
24578 } __CLC3SEL3bits_t
;
24580 extern __at(0x0F29) volatile __CLC3SEL3bits_t CLC3SEL3bits
;
24582 #define _CLC3SEL3_LC3D4S0 0x01
24583 #define _CLC3SEL3_D4S0 0x01
24584 #define _CLC3SEL3_LC3D4S1 0x02
24585 #define _CLC3SEL3_D4S1 0x02
24586 #define _CLC3SEL3_LC3D4S2 0x04
24587 #define _CLC3SEL3_D4S2 0x04
24588 #define _CLC3SEL3_LC3D4S3 0x08
24589 #define _CLC3SEL3_D4S3 0x08
24590 #define _CLC3SEL3_LC3D4S4 0x10
24591 #define _CLC3SEL3_D4S4 0x10
24592 #define _CLC3SEL3_LC3D4S5 0x20
24593 #define _CLC3SEL3_D4S5 0x20
24595 //==============================================================================
24598 //==============================================================================
24601 extern __at(0x0F2A) __sfr CLC3GLS0
;
24607 unsigned LC3G1D1N
: 1;
24608 unsigned LC3G1D1T
: 1;
24609 unsigned LC3G1D2N
: 1;
24610 unsigned LC3G1D2T
: 1;
24611 unsigned LC3G1D3N
: 1;
24612 unsigned LC3G1D3T
: 1;
24613 unsigned LC3G1D4N
: 1;
24614 unsigned LC3G1D4T
: 1;
24628 } __CLC3GLS0bits_t
;
24630 extern __at(0x0F2A) volatile __CLC3GLS0bits_t CLC3GLS0bits
;
24632 #define _CLC3GLS0_LC3G1D1N 0x01
24633 #define _CLC3GLS0_D1N 0x01
24634 #define _CLC3GLS0_LC3G1D1T 0x02
24635 #define _CLC3GLS0_D1T 0x02
24636 #define _CLC3GLS0_LC3G1D2N 0x04
24637 #define _CLC3GLS0_D2N 0x04
24638 #define _CLC3GLS0_LC3G1D2T 0x08
24639 #define _CLC3GLS0_D2T 0x08
24640 #define _CLC3GLS0_LC3G1D3N 0x10
24641 #define _CLC3GLS0_D3N 0x10
24642 #define _CLC3GLS0_LC3G1D3T 0x20
24643 #define _CLC3GLS0_D3T 0x20
24644 #define _CLC3GLS0_LC3G1D4N 0x40
24645 #define _CLC3GLS0_D4N 0x40
24646 #define _CLC3GLS0_LC3G1D4T 0x80
24647 #define _CLC3GLS0_D4T 0x80
24649 //==============================================================================
24652 //==============================================================================
24655 extern __at(0x0F2B) __sfr CLC3GLS1
;
24661 unsigned LC3G2D1N
: 1;
24662 unsigned LC3G2D1T
: 1;
24663 unsigned LC3G2D2N
: 1;
24664 unsigned LC3G2D2T
: 1;
24665 unsigned LC3G2D3N
: 1;
24666 unsigned LC3G2D3T
: 1;
24667 unsigned LC3G2D4N
: 1;
24668 unsigned LC3G2D4T
: 1;
24682 } __CLC3GLS1bits_t
;
24684 extern __at(0x0F2B) volatile __CLC3GLS1bits_t CLC3GLS1bits
;
24686 #define _CLC3GLS1_LC3G2D1N 0x01
24687 #define _CLC3GLS1_D1N 0x01
24688 #define _CLC3GLS1_LC3G2D1T 0x02
24689 #define _CLC3GLS1_D1T 0x02
24690 #define _CLC3GLS1_LC3G2D2N 0x04
24691 #define _CLC3GLS1_D2N 0x04
24692 #define _CLC3GLS1_LC3G2D2T 0x08
24693 #define _CLC3GLS1_D2T 0x08
24694 #define _CLC3GLS1_LC3G2D3N 0x10
24695 #define _CLC3GLS1_D3N 0x10
24696 #define _CLC3GLS1_LC3G2D3T 0x20
24697 #define _CLC3GLS1_D3T 0x20
24698 #define _CLC3GLS1_LC3G2D4N 0x40
24699 #define _CLC3GLS1_D4N 0x40
24700 #define _CLC3GLS1_LC3G2D4T 0x80
24701 #define _CLC3GLS1_D4T 0x80
24703 //==============================================================================
24706 //==============================================================================
24709 extern __at(0x0F2C) __sfr CLC3GLS2
;
24715 unsigned LC3G3D1N
: 1;
24716 unsigned LC3G3D1T
: 1;
24717 unsigned LC3G3D2N
: 1;
24718 unsigned LC3G3D2T
: 1;
24719 unsigned LC3G3D3N
: 1;
24720 unsigned LC3G3D3T
: 1;
24721 unsigned LC3G3D4N
: 1;
24722 unsigned LC3G3D4T
: 1;
24736 } __CLC3GLS2bits_t
;
24738 extern __at(0x0F2C) volatile __CLC3GLS2bits_t CLC3GLS2bits
;
24740 #define _CLC3GLS2_LC3G3D1N 0x01
24741 #define _CLC3GLS2_D1N 0x01
24742 #define _CLC3GLS2_LC3G3D1T 0x02
24743 #define _CLC3GLS2_D1T 0x02
24744 #define _CLC3GLS2_LC3G3D2N 0x04
24745 #define _CLC3GLS2_D2N 0x04
24746 #define _CLC3GLS2_LC3G3D2T 0x08
24747 #define _CLC3GLS2_D2T 0x08
24748 #define _CLC3GLS2_LC3G3D3N 0x10
24749 #define _CLC3GLS2_D3N 0x10
24750 #define _CLC3GLS2_LC3G3D3T 0x20
24751 #define _CLC3GLS2_D3T 0x20
24752 #define _CLC3GLS2_LC3G3D4N 0x40
24753 #define _CLC3GLS2_D4N 0x40
24754 #define _CLC3GLS2_LC3G3D4T 0x80
24755 #define _CLC3GLS2_D4T 0x80
24757 //==============================================================================
24760 //==============================================================================
24763 extern __at(0x0F2D) __sfr CLC3GLS3
;
24769 unsigned LC3G4D1N
: 1;
24770 unsigned LC3G4D1T
: 1;
24771 unsigned LC3G4D2N
: 1;
24772 unsigned LC3G4D2T
: 1;
24773 unsigned LC3G4D3N
: 1;
24774 unsigned LC3G4D3T
: 1;
24775 unsigned LC3G4D4N
: 1;
24776 unsigned LC3G4D4T
: 1;
24781 unsigned G4D1N
: 1;
24782 unsigned G4D1T
: 1;
24783 unsigned G4D2N
: 1;
24784 unsigned G4D2T
: 1;
24785 unsigned G4D3N
: 1;
24786 unsigned G4D3T
: 1;
24787 unsigned G4D4N
: 1;
24788 unsigned G4D4T
: 1;
24790 } __CLC3GLS3bits_t
;
24792 extern __at(0x0F2D) volatile __CLC3GLS3bits_t CLC3GLS3bits
;
24794 #define _CLC3GLS3_LC3G4D1N 0x01
24795 #define _CLC3GLS3_G4D1N 0x01
24796 #define _CLC3GLS3_LC3G4D1T 0x02
24797 #define _CLC3GLS3_G4D1T 0x02
24798 #define _CLC3GLS3_LC3G4D2N 0x04
24799 #define _CLC3GLS3_G4D2N 0x04
24800 #define _CLC3GLS3_LC3G4D2T 0x08
24801 #define _CLC3GLS3_G4D2T 0x08
24802 #define _CLC3GLS3_LC3G4D3N 0x10
24803 #define _CLC3GLS3_G4D3N 0x10
24804 #define _CLC3GLS3_LC3G4D3T 0x20
24805 #define _CLC3GLS3_G4D3T 0x20
24806 #define _CLC3GLS3_LC3G4D4N 0x40
24807 #define _CLC3GLS3_G4D4N 0x40
24808 #define _CLC3GLS3_LC3G4D4T 0x80
24809 #define _CLC3GLS3_G4D4T 0x80
24811 //==============================================================================
24814 //==============================================================================
24817 extern __at(0x0F2E) __sfr CLC4CON
;
24823 unsigned LC4MODE0
: 1;
24824 unsigned LC4MODE1
: 1;
24825 unsigned LC4MODE2
: 1;
24826 unsigned LC4INTN
: 1;
24827 unsigned LC4INTP
: 1;
24828 unsigned LC4OUT
: 1;
24830 unsigned LC4EN
: 1;
24835 unsigned MODE0
: 1;
24836 unsigned MODE1
: 1;
24837 unsigned MODE2
: 1;
24847 unsigned LC4MODE
: 3;
24858 extern __at(0x0F2E) volatile __CLC4CONbits_t CLC4CONbits
;
24860 #define _CLC4CON_LC4MODE0 0x01
24861 #define _CLC4CON_MODE0 0x01
24862 #define _CLC4CON_LC4MODE1 0x02
24863 #define _CLC4CON_MODE1 0x02
24864 #define _CLC4CON_LC4MODE2 0x04
24865 #define _CLC4CON_MODE2 0x04
24866 #define _CLC4CON_LC4INTN 0x08
24867 #define _CLC4CON_INTN 0x08
24868 #define _CLC4CON_LC4INTP 0x10
24869 #define _CLC4CON_INTP 0x10
24870 #define _CLC4CON_LC4OUT 0x20
24871 #define _CLC4CON_OUT 0x20
24872 #define _CLC4CON_LC4EN 0x80
24873 #define _CLC4CON_EN 0x80
24875 //==============================================================================
24878 //==============================================================================
24881 extern __at(0x0F2F) __sfr CLC4POL
;
24887 unsigned LC4G1POL
: 1;
24888 unsigned LC4G2POL
: 1;
24889 unsigned LC4G3POL
: 1;
24890 unsigned LC4G4POL
: 1;
24894 unsigned LC4POL
: 1;
24899 unsigned G1POL
: 1;
24900 unsigned G2POL
: 1;
24901 unsigned G3POL
: 1;
24902 unsigned G4POL
: 1;
24910 extern __at(0x0F2F) volatile __CLC4POLbits_t CLC4POLbits
;
24912 #define _CLC4POL_LC4G1POL 0x01
24913 #define _CLC4POL_G1POL 0x01
24914 #define _CLC4POL_LC4G2POL 0x02
24915 #define _CLC4POL_G2POL 0x02
24916 #define _CLC4POL_LC4G3POL 0x04
24917 #define _CLC4POL_G3POL 0x04
24918 #define _CLC4POL_LC4G4POL 0x08
24919 #define _CLC4POL_G4POL 0x08
24920 #define _CLC4POL_LC4POL 0x80
24921 #define _CLC4POL_POL 0x80
24923 //==============================================================================
24926 //==============================================================================
24929 extern __at(0x0F30) __sfr CLC4SEL0
;
24935 unsigned LC4D1S0
: 1;
24936 unsigned LC4D1S1
: 1;
24937 unsigned LC4D1S2
: 1;
24938 unsigned LC4D1S3
: 1;
24939 unsigned LC4D1S4
: 1;
24940 unsigned LC4D1S5
: 1;
24965 unsigned LC4D1S
: 6;
24968 } __CLC4SEL0bits_t
;
24970 extern __at(0x0F30) volatile __CLC4SEL0bits_t CLC4SEL0bits
;
24972 #define _CLC4SEL0_LC4D1S0 0x01
24973 #define _CLC4SEL0_D1S0 0x01
24974 #define _CLC4SEL0_LC4D1S1 0x02
24975 #define _CLC4SEL0_D1S1 0x02
24976 #define _CLC4SEL0_LC4D1S2 0x04
24977 #define _CLC4SEL0_D1S2 0x04
24978 #define _CLC4SEL0_LC4D1S3 0x08
24979 #define _CLC4SEL0_D1S3 0x08
24980 #define _CLC4SEL0_LC4D1S4 0x10
24981 #define _CLC4SEL0_D1S4 0x10
24982 #define _CLC4SEL0_LC4D1S5 0x20
24983 #define _CLC4SEL0_D1S5 0x20
24985 //==============================================================================
24988 //==============================================================================
24991 extern __at(0x0F31) __sfr CLC4SEL1
;
24997 unsigned LC4D2S0
: 1;
24998 unsigned LC4D2S1
: 1;
24999 unsigned LC4D2S2
: 1;
25000 unsigned LC4D2S3
: 1;
25001 unsigned LC4D2S4
: 1;
25002 unsigned LC4D2S5
: 1;
25027 unsigned LC4D2S
: 6;
25030 } __CLC4SEL1bits_t
;
25032 extern __at(0x0F31) volatile __CLC4SEL1bits_t CLC4SEL1bits
;
25034 #define _CLC4SEL1_LC4D2S0 0x01
25035 #define _CLC4SEL1_D2S0 0x01
25036 #define _CLC4SEL1_LC4D2S1 0x02
25037 #define _CLC4SEL1_D2S1 0x02
25038 #define _CLC4SEL1_LC4D2S2 0x04
25039 #define _CLC4SEL1_D2S2 0x04
25040 #define _CLC4SEL1_LC4D2S3 0x08
25041 #define _CLC4SEL1_D2S3 0x08
25042 #define _CLC4SEL1_LC4D2S4 0x10
25043 #define _CLC4SEL1_D2S4 0x10
25044 #define _CLC4SEL1_LC4D2S5 0x20
25045 #define _CLC4SEL1_D2S5 0x20
25047 //==============================================================================
25050 //==============================================================================
25053 extern __at(0x0F32) __sfr CLC4SEL2
;
25059 unsigned LC4D3S0
: 1;
25060 unsigned LC4D3S1
: 1;
25061 unsigned LC4D3S2
: 1;
25062 unsigned LC4D3S3
: 1;
25063 unsigned LC4D3S4
: 1;
25064 unsigned LC4D3S5
: 1;
25083 unsigned LC4D3S
: 6;
25092 } __CLC4SEL2bits_t
;
25094 extern __at(0x0F32) volatile __CLC4SEL2bits_t CLC4SEL2bits
;
25096 #define _CLC4SEL2_LC4D3S0 0x01
25097 #define _CLC4SEL2_D3S0 0x01
25098 #define _CLC4SEL2_LC4D3S1 0x02
25099 #define _CLC4SEL2_D3S1 0x02
25100 #define _CLC4SEL2_LC4D3S2 0x04
25101 #define _CLC4SEL2_D3S2 0x04
25102 #define _CLC4SEL2_LC4D3S3 0x08
25103 #define _CLC4SEL2_D3S3 0x08
25104 #define _CLC4SEL2_LC4D3S4 0x10
25105 #define _CLC4SEL2_D3S4 0x10
25106 #define _CLC4SEL2_LC4D3S5 0x20
25107 #define _CLC4SEL2_D3S5 0x20
25109 //==============================================================================
25112 //==============================================================================
25115 extern __at(0x0F33) __sfr CLC4SEL3
;
25121 unsigned LC4D4S0
: 1;
25122 unsigned LC4D4S1
: 1;
25123 unsigned LC4D4S2
: 1;
25124 unsigned LC4D4S3
: 1;
25125 unsigned LC4D4S4
: 1;
25126 unsigned LC4D4S5
: 1;
25145 unsigned LC4D4S
: 6;
25154 } __CLC4SEL3bits_t
;
25156 extern __at(0x0F33) volatile __CLC4SEL3bits_t CLC4SEL3bits
;
25158 #define _CLC4SEL3_LC4D4S0 0x01
25159 #define _CLC4SEL3_D4S0 0x01
25160 #define _CLC4SEL3_LC4D4S1 0x02
25161 #define _CLC4SEL3_D4S1 0x02
25162 #define _CLC4SEL3_LC4D4S2 0x04
25163 #define _CLC4SEL3_D4S2 0x04
25164 #define _CLC4SEL3_LC4D4S3 0x08
25165 #define _CLC4SEL3_D4S3 0x08
25166 #define _CLC4SEL3_LC4D4S4 0x10
25167 #define _CLC4SEL3_D4S4 0x10
25168 #define _CLC4SEL3_LC4D4S5 0x20
25169 #define _CLC4SEL3_D4S5 0x20
25171 //==============================================================================
25174 //==============================================================================
25177 extern __at(0x0F34) __sfr CLC4GLS0
;
25183 unsigned LC4G1D1N
: 1;
25184 unsigned LC4G1D1T
: 1;
25185 unsigned LC4G1D2N
: 1;
25186 unsigned LC4G1D2T
: 1;
25187 unsigned LC4G1D3N
: 1;
25188 unsigned LC4G1D3T
: 1;
25189 unsigned LC4G1D4N
: 1;
25190 unsigned LC4G1D4T
: 1;
25204 } __CLC4GLS0bits_t
;
25206 extern __at(0x0F34) volatile __CLC4GLS0bits_t CLC4GLS0bits
;
25208 #define _CLC4GLS0_LC4G1D1N 0x01
25209 #define _CLC4GLS0_D1N 0x01
25210 #define _CLC4GLS0_LC4G1D1T 0x02
25211 #define _CLC4GLS0_D1T 0x02
25212 #define _CLC4GLS0_LC4G1D2N 0x04
25213 #define _CLC4GLS0_D2N 0x04
25214 #define _CLC4GLS0_LC4G1D2T 0x08
25215 #define _CLC4GLS0_D2T 0x08
25216 #define _CLC4GLS0_LC4G1D3N 0x10
25217 #define _CLC4GLS0_D3N 0x10
25218 #define _CLC4GLS0_LC4G1D3T 0x20
25219 #define _CLC4GLS0_D3T 0x20
25220 #define _CLC4GLS0_LC4G1D4N 0x40
25221 #define _CLC4GLS0_D4N 0x40
25222 #define _CLC4GLS0_LC4G1D4T 0x80
25223 #define _CLC4GLS0_D4T 0x80
25225 //==============================================================================
25228 //==============================================================================
25231 extern __at(0x0F35) __sfr CLC4GLS1
;
25237 unsigned LC4G2D1N
: 1;
25238 unsigned LC4G2D1T
: 1;
25239 unsigned LC4G2D2N
: 1;
25240 unsigned LC4G2D2T
: 1;
25241 unsigned LC4G2D3N
: 1;
25242 unsigned LC4G2D3T
: 1;
25243 unsigned LC4G2D4N
: 1;
25244 unsigned LC4G2D4T
: 1;
25258 } __CLC4GLS1bits_t
;
25260 extern __at(0x0F35) volatile __CLC4GLS1bits_t CLC4GLS1bits
;
25262 #define _CLC4GLS1_LC4G2D1N 0x01
25263 #define _CLC4GLS1_D1N 0x01
25264 #define _CLC4GLS1_LC4G2D1T 0x02
25265 #define _CLC4GLS1_D1T 0x02
25266 #define _CLC4GLS1_LC4G2D2N 0x04
25267 #define _CLC4GLS1_D2N 0x04
25268 #define _CLC4GLS1_LC4G2D2T 0x08
25269 #define _CLC4GLS1_D2T 0x08
25270 #define _CLC4GLS1_LC4G2D3N 0x10
25271 #define _CLC4GLS1_D3N 0x10
25272 #define _CLC4GLS1_LC4G2D3T 0x20
25273 #define _CLC4GLS1_D3T 0x20
25274 #define _CLC4GLS1_LC4G2D4N 0x40
25275 #define _CLC4GLS1_D4N 0x40
25276 #define _CLC4GLS1_LC4G2D4T 0x80
25277 #define _CLC4GLS1_D4T 0x80
25279 //==============================================================================
25282 //==============================================================================
25285 extern __at(0x0F36) __sfr CLC4GLS2
;
25291 unsigned LC4G3D1N
: 1;
25292 unsigned LC4G3D1T
: 1;
25293 unsigned LC4G3D2N
: 1;
25294 unsigned LC4G3D2T
: 1;
25295 unsigned LC4G3D3N
: 1;
25296 unsigned LC4G3D3T
: 1;
25297 unsigned LC4G3D4N
: 1;
25298 unsigned LC4G3D4T
: 1;
25312 } __CLC4GLS2bits_t
;
25314 extern __at(0x0F36) volatile __CLC4GLS2bits_t CLC4GLS2bits
;
25316 #define _CLC4GLS2_LC4G3D1N 0x01
25317 #define _CLC4GLS2_D1N 0x01
25318 #define _CLC4GLS2_LC4G3D1T 0x02
25319 #define _CLC4GLS2_D1T 0x02
25320 #define _CLC4GLS2_LC4G3D2N 0x04
25321 #define _CLC4GLS2_D2N 0x04
25322 #define _CLC4GLS2_LC4G3D2T 0x08
25323 #define _CLC4GLS2_D2T 0x08
25324 #define _CLC4GLS2_LC4G3D3N 0x10
25325 #define _CLC4GLS2_D3N 0x10
25326 #define _CLC4GLS2_LC4G3D3T 0x20
25327 #define _CLC4GLS2_D3T 0x20
25328 #define _CLC4GLS2_LC4G3D4N 0x40
25329 #define _CLC4GLS2_D4N 0x40
25330 #define _CLC4GLS2_LC4G3D4T 0x80
25331 #define _CLC4GLS2_D4T 0x80
25333 //==============================================================================
25336 //==============================================================================
25339 extern __at(0x0F37) __sfr CLC4GLS3
;
25345 unsigned LC4G4D1N
: 1;
25346 unsigned LC4G4D1T
: 1;
25347 unsigned LC4G4D2N
: 1;
25348 unsigned LC4G4D2T
: 1;
25349 unsigned LC4G4D3N
: 1;
25350 unsigned LC4G4D3T
: 1;
25351 unsigned LC4G4D4N
: 1;
25352 unsigned LC4G4D4T
: 1;
25357 unsigned G4D1N
: 1;
25358 unsigned G4D1T
: 1;
25359 unsigned G4D2N
: 1;
25360 unsigned G4D2T
: 1;
25361 unsigned G4D3N
: 1;
25362 unsigned G4D3T
: 1;
25363 unsigned G4D4N
: 1;
25364 unsigned G4D4T
: 1;
25366 } __CLC4GLS3bits_t
;
25368 extern __at(0x0F37) volatile __CLC4GLS3bits_t CLC4GLS3bits
;
25370 #define _CLC4GLS3_LC4G4D1N 0x01
25371 #define _CLC4GLS3_G4D1N 0x01
25372 #define _CLC4GLS3_LC4G4D1T 0x02
25373 #define _CLC4GLS3_G4D1T 0x02
25374 #define _CLC4GLS3_LC4G4D2N 0x04
25375 #define _CLC4GLS3_G4D2N 0x04
25376 #define _CLC4GLS3_LC4G4D2T 0x08
25377 #define _CLC4GLS3_G4D2T 0x08
25378 #define _CLC4GLS3_LC4G4D3N 0x10
25379 #define _CLC4GLS3_G4D3N 0x10
25380 #define _CLC4GLS3_LC4G4D3T 0x20
25381 #define _CLC4GLS3_G4D3T 0x20
25382 #define _CLC4GLS3_LC4G4D4N 0x40
25383 #define _CLC4GLS3_G4D4N 0x40
25384 #define _CLC4GLS3_LC4G4D4T 0x80
25385 #define _CLC4GLS3_G4D4T 0x80
25387 //==============================================================================
25390 //==============================================================================
25391 // STATUS_SHAD Bits
25393 extern __at(0x0FE4) __sfr STATUS_SHAD
;
25397 unsigned C_SHAD
: 1;
25398 unsigned DC_SHAD
: 1;
25399 unsigned Z_SHAD
: 1;
25405 } __STATUS_SHADbits_t
;
25407 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
25409 #define _C_SHAD 0x01
25410 #define _DC_SHAD 0x02
25411 #define _Z_SHAD 0x04
25413 //==============================================================================
25415 extern __at(0x0FE5) __sfr WREG_SHAD
;
25416 extern __at(0x0FE6) __sfr BSR_SHAD
;
25417 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
25418 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
25419 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
25420 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
25421 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
25422 extern __at(0x0FED) __sfr STKPTR
;
25423 extern __at(0x0FEE) __sfr TOSL
;
25424 extern __at(0x0FEF) __sfr TOSH
;
25426 //==============================================================================
25428 // Configuration Bits
25430 //==============================================================================
25432 #define _CONFIG1 0x8007
25433 #define _CONFIG2 0x8008
25435 //----------------------------- CONFIG1 Options -------------------------------
25437 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
25438 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
25439 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
25440 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
25441 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
25442 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
25443 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
25444 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
25445 #define _WDTE_OFF 0x3FE7 // WDT disabled.
25446 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
25447 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
25448 #define _WDTE_ON 0x3FFF // WDT enabled.
25449 #define _PWRTE_ON 0x3FDF // PWRT enabled.
25450 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
25451 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
25452 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
25453 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
25454 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
25455 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
25456 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
25457 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
25458 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
25459 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
25460 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
25461 #define _IESO_OFF 0x2FFF // Internal/External Switchover Mode is disabled.
25462 #define _IESO_ON 0x3FFF // Internal/External Switchover Mode is enabled.
25463 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
25464 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
25466 //----------------------------- CONFIG2 Options -------------------------------
25468 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control.
25469 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
25470 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control.
25471 #define _WRT_OFF 0x3FFF // Write protection off.
25472 #define _PPS1WAY_OFF 0x3FFB // The PPSLOCK bit can be set and cleared repeatedly by software.
25473 #define _PPS1WAY_ON 0x3FFF // The PPSLOCK bit cannot be cleared once it is set by software.
25474 #define _ZCD_ON 0x3F7F // Zero-cross detect circuit is enabled at POR.
25475 #define _ZCD_OFF 0x3FFF // Zero-cross detect circuit is disabled at POR.
25476 #define _PLLEN_OFF 0x3EFF // 4x PLL is enabled when software sets the SPLLEN bit.
25477 #define _PLLEN_ON 0x3FFF // 4x PLL is always enabled.
25478 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
25479 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
25480 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
25481 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
25482 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
25483 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
25484 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
25485 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
25486 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
25487 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
25489 //==============================================================================
25491 #define _DEVID1 0x8006
25493 #define _IDLOC0 0x8000
25494 #define _IDLOC1 0x8001
25495 #define _IDLOC2 0x8002
25496 #define _IDLOC3 0x8003
25498 //==============================================================================
25500 #ifndef NO_BIT_DEFINES
25502 #define ADON ADCON0bits.ADON // bit 0
25503 #define GO ADCON0bits.GO // bit 1
25505 #define ADNREF ADCON1bits.ADNREF // bit 2
25506 #define ADFM ADCON1bits.ADFM // bit 7
25508 #define ANSA0 ANSELAbits.ANSA0 // bit 0
25509 #define ANSA1 ANSELAbits.ANSA1 // bit 1
25510 #define ANSA2 ANSELAbits.ANSA2 // bit 2
25511 #define ANSA3 ANSELAbits.ANSA3 // bit 3
25512 #define ANSA4 ANSELAbits.ANSA4 // bit 4
25513 #define ANSA5 ANSELAbits.ANSA5 // bit 5
25515 #define ANSB0 ANSELBbits.ANSB0 // bit 0
25516 #define ANSB1 ANSELBbits.ANSB1 // bit 1
25517 #define ANSB2 ANSELBbits.ANSB2 // bit 2
25518 #define ANSB3 ANSELBbits.ANSB3 // bit 3
25519 #define ANSB4 ANSELBbits.ANSB4 // bit 4
25520 #define ANSB5 ANSELBbits.ANSB5 // bit 5
25522 #define ANSC2 ANSELCbits.ANSC2 // bit 2
25523 #define ANSC3 ANSELCbits.ANSC3 // bit 3
25524 #define ANSC4 ANSELCbits.ANSC4 // bit 4
25525 #define ANSC5 ANSELCbits.ANSC5 // bit 5
25526 #define ANSC6 ANSELCbits.ANSC6 // bit 6
25527 #define ANSC7 ANSELCbits.ANSC7 // bit 7
25529 #define ANSD0 ANSELDbits.ANSD0 // bit 0
25530 #define ANSD1 ANSELDbits.ANSD1 // bit 1
25531 #define ANSD2 ANSELDbits.ANSD2 // bit 2
25532 #define ANSD3 ANSELDbits.ANSD3 // bit 3
25533 #define ANSD4 ANSELDbits.ANSD4 // bit 4
25534 #define ANSD5 ANSELDbits.ANSD5 // bit 5
25535 #define ANSD6 ANSELDbits.ANSD6 // bit 6
25536 #define ANSD7 ANSELDbits.ANSD7 // bit 7
25538 #define ANSE0 ANSELEbits.ANSE0 // bit 0
25539 #define ANSE1 ANSELEbits.ANSE1 // bit 1
25540 #define ANSE2 ANSELEbits.ANSE2 // bit 2
25542 #define ABDEN BAUD1CONbits.ABDEN // bit 0
25543 #define WUE BAUD1CONbits.WUE // bit 1
25544 #define BRG16 BAUD1CONbits.BRG16 // bit 3
25545 #define SCKP BAUD1CONbits.SCKP // bit 4
25546 #define RCIDL BAUD1CONbits.RCIDL // bit 6
25547 #define ABDOVF BAUD1CONbits.ABDOVF // bit 7
25549 #define BORRDY BORCONbits.BORRDY // bit 0
25550 #define BORFS BORCONbits.BORFS // bit 6
25551 #define SBOREN BORCONbits.SBOREN // bit 7
25553 #define BSR0 BSRbits.BSR0 // bit 0
25554 #define BSR1 BSRbits.BSR1 // bit 1
25555 #define BSR2 BSRbits.BSR2 // bit 2
25556 #define BSR3 BSRbits.BSR3 // bit 3
25557 #define BSR4 BSRbits.BSR4 // bit 4
25559 #define CTS0 CCP1CAPbits.CTS0 // bit 0, shadows bit in CCP1CAPbits
25560 #define CCP1CTS0 CCP1CAPbits.CCP1CTS0 // bit 0, shadows bit in CCP1CAPbits
25561 #define CTS1 CCP1CAPbits.CTS1 // bit 1, shadows bit in CCP1CAPbits
25562 #define CCP1CTS1 CCP1CAPbits.CCP1CTS1 // bit 1, shadows bit in CCP1CAPbits
25563 #define CTS2 CCP1CAPbits.CTS2 // bit 2, shadows bit in CCP1CAPbits
25564 #define CCP1CTS2 CCP1CAPbits.CCP1CTS2 // bit 2, shadows bit in CCP1CAPbits
25565 #define CTS3 CCP1CAPbits.CTS3 // bit 3, shadows bit in CCP1CAPbits
25566 #define CCP1CTS3 CCP1CAPbits.CCP1CTS3 // bit 3, shadows bit in CCP1CAPbits
25568 #define MODE0 CCP1CONbits.MODE0 // bit 0, shadows bit in CCP1CONbits
25569 #define CCP1MODE0 CCP1CONbits.CCP1MODE0 // bit 0, shadows bit in CCP1CONbits
25570 #define MODE1 CCP1CONbits.MODE1 // bit 1, shadows bit in CCP1CONbits
25571 #define CCP1MODE1 CCP1CONbits.CCP1MODE1 // bit 1, shadows bit in CCP1CONbits
25572 #define MODE2 CCP1CONbits.MODE2 // bit 2, shadows bit in CCP1CONbits
25573 #define CCP1MODE2 CCP1CONbits.CCP1MODE2 // bit 2, shadows bit in CCP1CONbits
25574 #define MODE3 CCP1CONbits.MODE3 // bit 3, shadows bit in CCP1CONbits
25575 #define CCP1MODE3 CCP1CONbits.CCP1MODE3 // bit 3, shadows bit in CCP1CONbits
25576 #define FMT CCP1CONbits.FMT // bit 4, shadows bit in CCP1CONbits
25577 #define CCP1FMT CCP1CONbits.CCP1FMT // bit 4, shadows bit in CCP1CONbits
25578 #define OUT CCP1CONbits.OUT // bit 5, shadows bit in CCP1CONbits
25579 #define CCP1OUT CCP1CONbits.CCP1OUT // bit 5, shadows bit in CCP1CONbits
25580 #define EN CCP1CONbits.EN // bit 7, shadows bit in CCP1CONbits
25581 #define CCP1EN CCP1CONbits.CCP1EN // bit 7, shadows bit in CCP1CONbits
25583 #define C1TSEL0 CCPTMRS1bits.C1TSEL0 // bit 0
25584 #define C1TSEL1 CCPTMRS1bits.C1TSEL1 // bit 1
25585 #define C2TSEL0 CCPTMRS1bits.C2TSEL0 // bit 2
25586 #define C2TSEL1 CCPTMRS1bits.C2TSEL1 // bit 3
25587 #define C7TSEL0 CCPTMRS1bits.C7TSEL0 // bit 4
25588 #define C7TSEL1 CCPTMRS1bits.C7TSEL1 // bit 5
25590 #define P3TSEL0 CCPTMRS2bits.P3TSEL0 // bit 0
25591 #define P3TSEL1 CCPTMRS2bits.P3TSEL1 // bit 1
25592 #define P4TSEL0 CCPTMRS2bits.P4TSEL0 // bit 2
25593 #define P4TSEL1 CCPTMRS2bits.P4TSEL1 // bit 3
25594 #define P9TSEL0 CCPTMRS2bits.P9TSEL0 // bit 4
25595 #define P9TSEL1 CCPTMRS2bits.P9TSEL1 // bit 5
25597 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
25598 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
25599 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
25600 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
25601 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
25602 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
25603 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
25604 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
25605 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
25606 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
25607 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
25608 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
25609 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
25610 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
25611 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
25612 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
25614 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
25615 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
25616 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
25617 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
25618 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
25619 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
25620 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
25621 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
25622 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
25623 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
25624 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
25625 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
25626 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
25627 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
25628 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
25629 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
25631 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
25632 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
25633 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
25634 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
25635 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
25636 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
25637 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
25638 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
25639 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
25640 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
25642 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
25643 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
25644 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
25645 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
25646 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
25647 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
25648 #define LC1D1S3 CLC1SEL0bits.LC1D1S3 // bit 3, shadows bit in CLC1SEL0bits
25649 #define D1S3 CLC1SEL0bits.D1S3 // bit 3, shadows bit in CLC1SEL0bits
25650 #define LC1D1S4 CLC1SEL0bits.LC1D1S4 // bit 4, shadows bit in CLC1SEL0bits
25651 #define D1S4 CLC1SEL0bits.D1S4 // bit 4, shadows bit in CLC1SEL0bits
25652 #define LC1D1S5 CLC1SEL0bits.LC1D1S5 // bit 5, shadows bit in CLC1SEL0bits
25653 #define D1S5 CLC1SEL0bits.D1S5 // bit 5, shadows bit in CLC1SEL0bits
25655 #define LC1D2S0 CLC1SEL1bits.LC1D2S0 // bit 0, shadows bit in CLC1SEL1bits
25656 #define D2S0 CLC1SEL1bits.D2S0 // bit 0, shadows bit in CLC1SEL1bits
25657 #define LC1D2S1 CLC1SEL1bits.LC1D2S1 // bit 1, shadows bit in CLC1SEL1bits
25658 #define D2S1 CLC1SEL1bits.D2S1 // bit 1, shadows bit in CLC1SEL1bits
25659 #define LC1D2S2 CLC1SEL1bits.LC1D2S2 // bit 2, shadows bit in CLC1SEL1bits
25660 #define D2S2 CLC1SEL1bits.D2S2 // bit 2, shadows bit in CLC1SEL1bits
25661 #define LC1D2S3 CLC1SEL1bits.LC1D2S3 // bit 3, shadows bit in CLC1SEL1bits
25662 #define D2S3 CLC1SEL1bits.D2S3 // bit 3, shadows bit in CLC1SEL1bits
25663 #define LC1D2S4 CLC1SEL1bits.LC1D2S4 // bit 4, shadows bit in CLC1SEL1bits
25664 #define D2S4 CLC1SEL1bits.D2S4 // bit 4, shadows bit in CLC1SEL1bits
25665 #define LC1D2S5 CLC1SEL1bits.LC1D2S5 // bit 5, shadows bit in CLC1SEL1bits
25666 #define D2S5 CLC1SEL1bits.D2S5 // bit 5, shadows bit in CLC1SEL1bits
25668 #define LC1D3S0 CLC1SEL2bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL2bits
25669 #define D3S0 CLC1SEL2bits.D3S0 // bit 0, shadows bit in CLC1SEL2bits
25670 #define LC1D3S1 CLC1SEL2bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL2bits
25671 #define D3S1 CLC1SEL2bits.D3S1 // bit 1, shadows bit in CLC1SEL2bits
25672 #define LC1D3S2 CLC1SEL2bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL2bits
25673 #define D3S2 CLC1SEL2bits.D3S2 // bit 2, shadows bit in CLC1SEL2bits
25674 #define LC1D3S3 CLC1SEL2bits.LC1D3S3 // bit 3, shadows bit in CLC1SEL2bits
25675 #define D3S3 CLC1SEL2bits.D3S3 // bit 3, shadows bit in CLC1SEL2bits
25676 #define LC1D3S4 CLC1SEL2bits.LC1D3S4 // bit 4, shadows bit in CLC1SEL2bits
25677 #define D3S4 CLC1SEL2bits.D3S4 // bit 4, shadows bit in CLC1SEL2bits
25678 #define LC1D3S5 CLC1SEL2bits.LC1D3S5 // bit 5, shadows bit in CLC1SEL2bits
25679 #define D3S5 CLC1SEL2bits.D3S5 // bit 5, shadows bit in CLC1SEL2bits
25681 #define LC1D4S0 CLC1SEL3bits.LC1D4S0 // bit 0, shadows bit in CLC1SEL3bits
25682 #define D4S0 CLC1SEL3bits.D4S0 // bit 0, shadows bit in CLC1SEL3bits
25683 #define LC1D4S1 CLC1SEL3bits.LC1D4S1 // bit 1, shadows bit in CLC1SEL3bits
25684 #define D4S1 CLC1SEL3bits.D4S1 // bit 1, shadows bit in CLC1SEL3bits
25685 #define LC1D4S2 CLC1SEL3bits.LC1D4S2 // bit 2, shadows bit in CLC1SEL3bits
25686 #define D4S2 CLC1SEL3bits.D4S2 // bit 2, shadows bit in CLC1SEL3bits
25687 #define LC1D4S3 CLC1SEL3bits.LC1D4S3 // bit 3, shadows bit in CLC1SEL3bits
25688 #define D4S3 CLC1SEL3bits.D4S3 // bit 3, shadows bit in CLC1SEL3bits
25689 #define LC1D4S4 CLC1SEL3bits.LC1D4S4 // bit 4, shadows bit in CLC1SEL3bits
25690 #define D4S4 CLC1SEL3bits.D4S4 // bit 4, shadows bit in CLC1SEL3bits
25691 #define LC1D4S5 CLC1SEL3bits.LC1D4S5 // bit 5, shadows bit in CLC1SEL3bits
25692 #define D4S5 CLC1SEL3bits.D4S5 // bit 5, shadows bit in CLC1SEL3bits
25694 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0
25695 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1
25696 #define MCLC3OUT CLCDATAbits.MCLC3OUT // bit 2
25697 #define MLC4OUT CLCDATAbits.MLC4OUT // bit 3
25699 #define C1NCH0 CM1NSELbits.C1NCH0 // bit 0
25700 #define C1NCH1 CM1NSELbits.C1NCH1 // bit 1
25701 #define C1NCH2 CM1NSELbits.C1NCH2 // bit 2
25702 #define C1NCH3 CM1NSELbits.C1NCH3 // bit 3
25704 #define PCH0 CM1PSELbits.PCH0 // bit 0, shadows bit in CM1PSELbits
25705 #define C1PCH0 CM1PSELbits.C1PCH0 // bit 0, shadows bit in CM1PSELbits
25706 #define PCH1 CM1PSELbits.PCH1 // bit 1, shadows bit in CM1PSELbits
25707 #define C1PCH1 CM1PSELbits.C1PCH1 // bit 1, shadows bit in CM1PSELbits
25708 #define PCH2 CM1PSELbits.PCH2 // bit 2, shadows bit in CM1PSELbits
25709 #define C1PCH2 CM1PSELbits.C1PCH2 // bit 2, shadows bit in CM1PSELbits
25710 #define PCH3 CM1PSELbits.PCH3 // bit 3, shadows bit in CM1PSELbits
25711 #define C1PCH3 CM1PSELbits.C1PCH3 // bit 3, shadows bit in CM1PSELbits
25713 #define C2NCH0 CM2NSELbits.C2NCH0 // bit 0
25714 #define C2NCH1 CM2NSELbits.C2NCH1 // bit 1
25715 #define C2NCH2 CM2NSELbits.C2NCH2 // bit 2
25716 #define C2NCH3 CM2NSELbits.C2NCH3 // bit 3
25718 #define C3NCH0 CM3NSELbits.C3NCH0 // bit 0
25719 #define C3NCH1 CM3NSELbits.C3NCH1 // bit 1
25720 #define C3NCH2 CM3NSELbits.C3NCH2 // bit 2
25721 #define C3NCH3 CM3NSELbits.C3NCH3 // bit 3
25723 #define C4NCH0 CM4NSELbits.C4NCH0 // bit 0
25724 #define C4NCH1 CM4NSELbits.C4NCH1 // bit 1
25725 #define C4NCH2 CM4NSELbits.C4NCH2 // bit 2
25726 #define C4NCH3 CM4NSELbits.C4NCH3 // bit 3
25728 #define C5NCH0 CM5NSELbits.C5NCH0 // bit 0
25729 #define C5NCH1 CM5NSELbits.C5NCH1 // bit 1
25730 #define C5NCH2 CM5NSELbits.C5NCH2 // bit 2
25731 #define C5NCH3 CM5NSELbits.C5NCH3 // bit 3
25733 #define C6NCH0 CM6NSELbits.C6NCH0 // bit 0
25734 #define C6NCH1 CM6NSELbits.C6NCH1 // bit 1
25735 #define C6NCH2 CM6NSELbits.C6NCH2 // bit 2
25736 #define C6NCH3 CM6NSELbits.C6NCH3 // bit 3
25738 #define C7NCH0 CM7NSELbits.C7NCH0 // bit 0
25739 #define C7NCH1 CM7NSELbits.C7NCH1 // bit 1
25740 #define C7NCH2 CM7NSELbits.C7NCH2 // bit 2
25741 #define C7NCH3 CM7NSELbits.C7NCH3 // bit 3
25743 #define C8NCH0 CM8NSELbits.C8NCH0 // bit 0
25744 #define C8NCH1 CM8NSELbits.C8NCH1 // bit 1
25745 #define C8NCH2 CM8NSELbits.C8NCH2 // bit 2
25746 #define C8NCH3 CM8NSELbits.C8NCH3 // bit 3
25748 #define MC1OUT CMOUTbits.MC1OUT // bit 0
25749 #define MC2OUT CMOUTbits.MC2OUT // bit 1
25750 #define MC3OUT CMOUTbits.MC3OUT // bit 2
25751 #define MC4OUT CMOUTbits.MC4OUT // bit 3
25752 #define MC5OUT CMOUTbits.MC5OUT // bit 4
25753 #define MC6OUT CMOUTbits.MC6OUT // bit 5
25754 #define MC7OUT CMOUTbits.MC7OUT // bit 6
25755 #define MC80UT CMOUTbits.MC80UT // bit 7
25757 #define ASDAC0 COG1ASD0bits.ASDAC0 // bit 2, shadows bit in COG1ASD0bits
25758 #define G1ASDAC0 COG1ASD0bits.G1ASDAC0 // bit 2, shadows bit in COG1ASD0bits
25759 #define ASDAC1 COG1ASD0bits.ASDAC1 // bit 3, shadows bit in COG1ASD0bits
25760 #define G1ASDAC1 COG1ASD0bits.G1ASDAC1 // bit 3, shadows bit in COG1ASD0bits
25761 #define ASDBD0 COG1ASD0bits.ASDBD0 // bit 4, shadows bit in COG1ASD0bits
25762 #define G1ASDBD0 COG1ASD0bits.G1ASDBD0 // bit 4, shadows bit in COG1ASD0bits
25763 #define ASDBD1 COG1ASD0bits.ASDBD1 // bit 5, shadows bit in COG1ASD0bits
25764 #define G1ASDBD1 COG1ASD0bits.G1ASDBD1 // bit 5, shadows bit in COG1ASD0bits
25765 #define ASREN COG1ASD0bits.ASREN // bit 6, shadows bit in COG1ASD0bits
25766 #define ARSEN COG1ASD0bits.ARSEN // bit 6, shadows bit in COG1ASD0bits
25767 #define G1ARSEN COG1ASD0bits.G1ARSEN // bit 6, shadows bit in COG1ASD0bits
25768 #define G1ASREN COG1ASD0bits.G1ASREN // bit 6, shadows bit in COG1ASD0bits
25769 #define ASE COG1ASD0bits.ASE // bit 7, shadows bit in COG1ASD0bits
25770 #define G1ASE COG1ASD0bits.G1ASE // bit 7, shadows bit in COG1ASD0bits
25772 #define AS0E COG1ASD1bits.AS0E // bit 0, shadows bit in COG1ASD1bits
25773 #define G1AS0E COG1ASD1bits.G1AS0E // bit 0, shadows bit in COG1ASD1bits
25774 #define AS1E COG1ASD1bits.AS1E // bit 1, shadows bit in COG1ASD1bits
25775 #define G1AS1E COG1ASD1bits.G1AS1E // bit 1, shadows bit in COG1ASD1bits
25776 #define AS2E COG1ASD1bits.AS2E // bit 2, shadows bit in COG1ASD1bits
25777 #define G1AS2E COG1ASD1bits.G1AS2E // bit 2, shadows bit in COG1ASD1bits
25778 #define AS3E COG1ASD1bits.AS3E // bit 3, shadows bit in COG1ASD1bits
25779 #define G1AS3E COG1ASD1bits.G1AS3E // bit 3, shadows bit in COG1ASD1bits
25780 #define AS4E COG1ASD1bits.AS4E // bit 4, shadows bit in COG1ASD1bits
25781 #define G1AS4E COG1ASD1bits.G1AS4E // bit 4, shadows bit in COG1ASD1bits
25782 #define AS5E COG1ASD1bits.AS5E // bit 5, shadows bit in COG1ASD1bits
25783 #define G1AS5E COG1ASD1bits.G1AS5E // bit 5, shadows bit in COG1ASD1bits
25784 #define AS6E COG1ASD1bits.AS6E // bit 6, shadows bit in COG1ASD1bits
25785 #define G1AS6E COG1ASD1bits.G1AS6E // bit 6, shadows bit in COG1ASD1bits
25786 #define AS7E COG1ASD1bits.AS7E // bit 7, shadows bit in COG1ASD1bits
25787 #define G1AS7E COG1ASD1bits.G1AS7E // bit 7, shadows bit in COG1ASD1bits
25789 #define BLKF0 COG1BLKFbits.BLKF0 // bit 0, shadows bit in COG1BLKFbits
25790 #define G1BLKF0 COG1BLKFbits.G1BLKF0 // bit 0, shadows bit in COG1BLKFbits
25791 #define BLKF1 COG1BLKFbits.BLKF1 // bit 1, shadows bit in COG1BLKFbits
25792 #define G1BLKF1 COG1BLKFbits.G1BLKF1 // bit 1, shadows bit in COG1BLKFbits
25793 #define BLKF2 COG1BLKFbits.BLKF2 // bit 2, shadows bit in COG1BLKFbits
25794 #define G1BLKF2 COG1BLKFbits.G1BLKF2 // bit 2, shadows bit in COG1BLKFbits
25795 #define BLKF3 COG1BLKFbits.BLKF3 // bit 3, shadows bit in COG1BLKFbits
25796 #define G1BLKF3 COG1BLKFbits.G1BLKF3 // bit 3, shadows bit in COG1BLKFbits
25797 #define BLKF4 COG1BLKFbits.BLKF4 // bit 4, shadows bit in COG1BLKFbits
25798 #define G1BLKF4 COG1BLKFbits.G1BLKF4 // bit 4, shadows bit in COG1BLKFbits
25799 #define BLKF5 COG1BLKFbits.BLKF5 // bit 5, shadows bit in COG1BLKFbits
25800 #define G1BLKF5 COG1BLKFbits.G1BLKF5 // bit 5, shadows bit in COG1BLKFbits
25802 #define BLKR0 COG1BLKRbits.BLKR0 // bit 0, shadows bit in COG1BLKRbits
25803 #define G1BLKR0 COG1BLKRbits.G1BLKR0 // bit 0, shadows bit in COG1BLKRbits
25804 #define BLKR1 COG1BLKRbits.BLKR1 // bit 1, shadows bit in COG1BLKRbits
25805 #define G1BLKR1 COG1BLKRbits.G1BLKR1 // bit 1, shadows bit in COG1BLKRbits
25806 #define BLKR2 COG1BLKRbits.BLKR2 // bit 2, shadows bit in COG1BLKRbits
25807 #define G1BLKR2 COG1BLKRbits.G1BLKR2 // bit 2, shadows bit in COG1BLKRbits
25808 #define BLKR3 COG1BLKRbits.BLKR3 // bit 3, shadows bit in COG1BLKRbits
25809 #define G1BLKR3 COG1BLKRbits.G1BLKR3 // bit 3, shadows bit in COG1BLKRbits
25810 #define BLKR4 COG1BLKRbits.BLKR4 // bit 4, shadows bit in COG1BLKRbits
25811 #define G1BLKR4 COG1BLKRbits.G1BLKR4 // bit 4, shadows bit in COG1BLKRbits
25812 #define BLKR5 COG1BLKRbits.BLKR5 // bit 5, shadows bit in COG1BLKRbits
25813 #define G1BLKR5 COG1BLKRbits.G1BLKR5 // bit 5, shadows bit in COG1BLKRbits
25815 #define POLA COG1CON1bits.POLA // bit 0, shadows bit in COG1CON1bits
25816 #define G1POLA COG1CON1bits.G1POLA // bit 0, shadows bit in COG1CON1bits
25817 #define POLB COG1CON1bits.POLB // bit 1, shadows bit in COG1CON1bits
25818 #define G1POLB COG1CON1bits.G1POLB // bit 1, shadows bit in COG1CON1bits
25819 #define POLC COG1CON1bits.POLC // bit 2, shadows bit in COG1CON1bits
25820 #define G1POLC COG1CON1bits.G1POLC // bit 2, shadows bit in COG1CON1bits
25821 #define POLD COG1CON1bits.POLD // bit 3, shadows bit in COG1CON1bits
25822 #define G1POLD COG1CON1bits.G1POLD // bit 3, shadows bit in COG1CON1bits
25823 #define FDBS COG1CON1bits.FDBS // bit 6, shadows bit in COG1CON1bits
25824 #define G1FDBS COG1CON1bits.G1FDBS // bit 6, shadows bit in COG1CON1bits
25825 #define RDBS COG1CON1bits.RDBS // bit 7, shadows bit in COG1CON1bits
25826 #define G1RDBS COG1CON1bits.G1RDBS // bit 7, shadows bit in COG1CON1bits
25828 #define DBF0 COG1DBFbits.DBF0 // bit 0, shadows bit in COG1DBFbits
25829 #define G1DBF0 COG1DBFbits.G1DBF0 // bit 0, shadows bit in COG1DBFbits
25830 #define DBF1 COG1DBFbits.DBF1 // bit 1, shadows bit in COG1DBFbits
25831 #define G1DBF1 COG1DBFbits.G1DBF1 // bit 1, shadows bit in COG1DBFbits
25832 #define DBF2 COG1DBFbits.DBF2 // bit 2, shadows bit in COG1DBFbits
25833 #define G1DBF2 COG1DBFbits.G1DBF2 // bit 2, shadows bit in COG1DBFbits
25834 #define DBF3 COG1DBFbits.DBF3 // bit 3, shadows bit in COG1DBFbits
25835 #define G1DBF3 COG1DBFbits.G1DBF3 // bit 3, shadows bit in COG1DBFbits
25836 #define DBF4 COG1DBFbits.DBF4 // bit 4, shadows bit in COG1DBFbits
25837 #define G1DBF4 COG1DBFbits.G1DBF4 // bit 4, shadows bit in COG1DBFbits
25838 #define DBF5 COG1DBFbits.DBF5 // bit 5, shadows bit in COG1DBFbits
25839 #define G1DBF5 COG1DBFbits.G1DBF5 // bit 5, shadows bit in COG1DBFbits
25841 #define DBR0 COG1DBRbits.DBR0 // bit 0, shadows bit in COG1DBRbits
25842 #define G1DBR0 COG1DBRbits.G1DBR0 // bit 0, shadows bit in COG1DBRbits
25843 #define DBR1 COG1DBRbits.DBR1 // bit 1, shadows bit in COG1DBRbits
25844 #define G1DBR1 COG1DBRbits.G1DBR1 // bit 1, shadows bit in COG1DBRbits
25845 #define DBR2 COG1DBRbits.DBR2 // bit 2, shadows bit in COG1DBRbits
25846 #define G1DBR2 COG1DBRbits.G1DBR2 // bit 2, shadows bit in COG1DBRbits
25847 #define DBR3 COG1DBRbits.DBR3 // bit 3, shadows bit in COG1DBRbits
25848 #define G1DBR3 COG1DBRbits.G1DBR3 // bit 3, shadows bit in COG1DBRbits
25849 #define DBR4 COG1DBRbits.DBR4 // bit 4, shadows bit in COG1DBRbits
25850 #define G1DBR4 COG1DBRbits.G1DBR4 // bit 4, shadows bit in COG1DBRbits
25851 #define DBR5 COG1DBRbits.DBR5 // bit 5, shadows bit in COG1DBRbits
25852 #define G1DBR5 COG1DBRbits.G1DBR5 // bit 5, shadows bit in COG1DBRbits
25854 #define FIS0 COG1FIS0bits.FIS0 // bit 0, shadows bit in COG1FIS0bits
25855 #define G1FIS0 COG1FIS0bits.G1FIS0 // bit 0, shadows bit in COG1FIS0bits
25856 #define FIS1 COG1FIS0bits.FIS1 // bit 1, shadows bit in COG1FIS0bits
25857 #define G1FIS1 COG1FIS0bits.G1FIS1 // bit 1, shadows bit in COG1FIS0bits
25858 #define FIS2 COG1FIS0bits.FIS2 // bit 2, shadows bit in COG1FIS0bits
25859 #define G1FIS2 COG1FIS0bits.G1FIS2 // bit 2, shadows bit in COG1FIS0bits
25860 #define FIS3 COG1FIS0bits.FIS3 // bit 3, shadows bit in COG1FIS0bits
25861 #define G1FIS3 COG1FIS0bits.G1FIS3 // bit 3, shadows bit in COG1FIS0bits
25862 #define FIS4 COG1FIS0bits.FIS4 // bit 4, shadows bit in COG1FIS0bits
25863 #define G1FIS4 COG1FIS0bits.G1FIS4 // bit 4, shadows bit in COG1FIS0bits
25864 #define FIS5 COG1FIS0bits.FIS5 // bit 5, shadows bit in COG1FIS0bits
25865 #define G1FIS5 COG1FIS0bits.G1FIS5 // bit 5, shadows bit in COG1FIS0bits
25866 #define FIS6 COG1FIS0bits.FIS6 // bit 6, shadows bit in COG1FIS0bits
25867 #define G1FIS6 COG1FIS0bits.G1FIS6 // bit 6, shadows bit in COG1FIS0bits
25868 #define FIS7 COG1FIS0bits.FIS7 // bit 7, shadows bit in COG1FIS0bits
25869 #define G1FIS7 COG1FIS0bits.G1FIS7 // bit 7, shadows bit in COG1FIS0bits
25871 #define FIS8 COG1FIS1bits.FIS8 // bit 0, shadows bit in COG1FIS1bits
25872 #define G1FIS8 COG1FIS1bits.G1FIS8 // bit 0, shadows bit in COG1FIS1bits
25873 #define FIS9 COG1FIS1bits.FIS9 // bit 1, shadows bit in COG1FIS1bits
25874 #define G1FIS9 COG1FIS1bits.G1FIS9 // bit 1, shadows bit in COG1FIS1bits
25875 #define FIS10 COG1FIS1bits.FIS10 // bit 2, shadows bit in COG1FIS1bits
25876 #define G1FIS10 COG1FIS1bits.G1FIS10 // bit 2, shadows bit in COG1FIS1bits
25877 #define FIS11 COG1FIS1bits.FIS11 // bit 3, shadows bit in COG1FIS1bits
25878 #define G1FIS11 COG1FIS1bits.G1FIS11 // bit 3, shadows bit in COG1FIS1bits
25879 #define FIS12 COG1FIS1bits.FIS12 // bit 4, shadows bit in COG1FIS1bits
25880 #define G1FIS12 COG1FIS1bits.G1FIS12 // bit 4, shadows bit in COG1FIS1bits
25881 #define FIS13 COG1FIS1bits.FIS13 // bit 5, shadows bit in COG1FIS1bits
25882 #define G1FIS13 COG1FIS1bits.G1FIS13 // bit 5, shadows bit in COG1FIS1bits
25883 #define FIS14 COG1FIS1bits.FIS14 // bit 6, shadows bit in COG1FIS1bits
25884 #define G1FIS14 COG1FIS1bits.G1FIS14 // bit 6, shadows bit in COG1FIS1bits
25885 #define FIS15 COG1FIS1bits.FIS15 // bit 7, shadows bit in COG1FIS1bits
25886 #define G1FIS15 COG1FIS1bits.G1FIS15 // bit 7, shadows bit in COG1FIS1bits
25888 #define FSIM0 COG1FSIM0bits.FSIM0 // bit 0, shadows bit in COG1FSIM0bits
25889 #define G1FSIM0 COG1FSIM0bits.G1FSIM0 // bit 0, shadows bit in COG1FSIM0bits
25890 #define FSIM1 COG1FSIM0bits.FSIM1 // bit 1, shadows bit in COG1FSIM0bits
25891 #define G1FSIM1 COG1FSIM0bits.G1FSIM1 // bit 1, shadows bit in COG1FSIM0bits
25892 #define FSIM2 COG1FSIM0bits.FSIM2 // bit 2, shadows bit in COG1FSIM0bits
25893 #define G1FSIM2 COG1FSIM0bits.G1FSIM2 // bit 2, shadows bit in COG1FSIM0bits
25894 #define FSIM3 COG1FSIM0bits.FSIM3 // bit 3, shadows bit in COG1FSIM0bits
25895 #define G1FSIM3 COG1FSIM0bits.G1FSIM3 // bit 3, shadows bit in COG1FSIM0bits
25896 #define FSIM4 COG1FSIM0bits.FSIM4 // bit 4, shadows bit in COG1FSIM0bits
25897 #define G1FSIM4 COG1FSIM0bits.G1FSIM4 // bit 4, shadows bit in COG1FSIM0bits
25898 #define FSIM5 COG1FSIM0bits.FSIM5 // bit 5, shadows bit in COG1FSIM0bits
25899 #define G1FSIM5 COG1FSIM0bits.G1FSIM5 // bit 5, shadows bit in COG1FSIM0bits
25900 #define FSIM6 COG1FSIM0bits.FSIM6 // bit 6, shadows bit in COG1FSIM0bits
25901 #define G1FSIM6 COG1FSIM0bits.G1FSIM6 // bit 6, shadows bit in COG1FSIM0bits
25902 #define FSIM7 COG1FSIM0bits.FSIM7 // bit 7, shadows bit in COG1FSIM0bits
25903 #define G1FSIM7 COG1FSIM0bits.G1FSIM7 // bit 7, shadows bit in COG1FSIM0bits
25905 #define FSIM8 COG1FSIM1bits.FSIM8 // bit 0, shadows bit in COG1FSIM1bits
25906 #define G1FSIM8 COG1FSIM1bits.G1FSIM8 // bit 0, shadows bit in COG1FSIM1bits
25907 #define FSIM9 COG1FSIM1bits.FSIM9 // bit 1, shadows bit in COG1FSIM1bits
25908 #define G1FSIM9 COG1FSIM1bits.G1FSIM9 // bit 1, shadows bit in COG1FSIM1bits
25909 #define FSIM10 COG1FSIM1bits.FSIM10 // bit 2, shadows bit in COG1FSIM1bits
25910 #define G1FSIM10 COG1FSIM1bits.G1FSIM10 // bit 2, shadows bit in COG1FSIM1bits
25911 #define FSIM11 COG1FSIM1bits.FSIM11 // bit 3, shadows bit in COG1FSIM1bits
25912 #define G1FSIM11 COG1FSIM1bits.G1FSIM11 // bit 3, shadows bit in COG1FSIM1bits
25913 #define FSIM12 COG1FSIM1bits.FSIM12 // bit 4, shadows bit in COG1FSIM1bits
25914 #define G1FSIM12 COG1FSIM1bits.G1FSIM12 // bit 4, shadows bit in COG1FSIM1bits
25915 #define FSIM13 COG1FSIM1bits.FSIM13 // bit 5, shadows bit in COG1FSIM1bits
25916 #define G1FSIM13 COG1FSIM1bits.G1FSIM13 // bit 5, shadows bit in COG1FSIM1bits
25917 #define FSIM14 COG1FSIM1bits.FSIM14 // bit 6, shadows bit in COG1FSIM1bits
25918 #define G1FSIM14 COG1FSIM1bits.G1FSIM14 // bit 6, shadows bit in COG1FSIM1bits
25919 #define FSIM15 COG1FSIM1bits.FSIM15 // bit 7, shadows bit in COG1FSIM1bits
25920 #define G1FSIM15 COG1FSIM1bits.G1FSIM15 // bit 7, shadows bit in COG1FSIM1bits
25922 #define PHF0 COG1PHFbits.PHF0 // bit 0, shadows bit in COG1PHFbits
25923 #define G1PHF0 COG1PHFbits.G1PHF0 // bit 0, shadows bit in COG1PHFbits
25924 #define PHF1 COG1PHFbits.PHF1 // bit 1, shadows bit in COG1PHFbits
25925 #define G1PHF1 COG1PHFbits.G1PHF1 // bit 1, shadows bit in COG1PHFbits
25926 #define PHF2 COG1PHFbits.PHF2 // bit 2, shadows bit in COG1PHFbits
25927 #define G1PHF2 COG1PHFbits.G1PHF2 // bit 2, shadows bit in COG1PHFbits
25928 #define PHF3 COG1PHFbits.PHF3 // bit 3, shadows bit in COG1PHFbits
25929 #define G1PHF3 COG1PHFbits.G1PHF3 // bit 3, shadows bit in COG1PHFbits
25930 #define PHF4 COG1PHFbits.PHF4 // bit 4, shadows bit in COG1PHFbits
25931 #define G1PHF4 COG1PHFbits.G1PHF4 // bit 4, shadows bit in COG1PHFbits
25932 #define PHF5 COG1PHFbits.PHF5 // bit 5, shadows bit in COG1PHFbits
25933 #define G1PHF5 COG1PHFbits.G1PHF5 // bit 5, shadows bit in COG1PHFbits
25935 #define PHR0 COG1PHRbits.PHR0 // bit 0, shadows bit in COG1PHRbits
25936 #define G1PHR0 COG1PHRbits.G1PHR0 // bit 0, shadows bit in COG1PHRbits
25937 #define PHR1 COG1PHRbits.PHR1 // bit 1, shadows bit in COG1PHRbits
25938 #define G1PHR1 COG1PHRbits.G1PHR1 // bit 1, shadows bit in COG1PHRbits
25939 #define PHR2 COG1PHRbits.PHR2 // bit 2, shadows bit in COG1PHRbits
25940 #define G1PHR2 COG1PHRbits.G1PHR2 // bit 2, shadows bit in COG1PHRbits
25941 #define PHR3 COG1PHRbits.PHR3 // bit 3, shadows bit in COG1PHRbits
25942 #define G1PHR3 COG1PHRbits.G1PHR3 // bit 3, shadows bit in COG1PHRbits
25943 #define PHR4 COG1PHRbits.PHR4 // bit 4, shadows bit in COG1PHRbits
25944 #define G1PHR4 COG1PHRbits.G1PHR4 // bit 4, shadows bit in COG1PHRbits
25945 #define PHR5 COG1PHRbits.PHR5 // bit 5, shadows bit in COG1PHRbits
25946 #define G1PHR5 COG1PHRbits.G1PHR5 // bit 5, shadows bit in COG1PHRbits
25948 #define RIS0 COG1RIS0bits.RIS0 // bit 0, shadows bit in COG1RIS0bits
25949 #define G1RIS0 COG1RIS0bits.G1RIS0 // bit 0, shadows bit in COG1RIS0bits
25950 #define RIS1 COG1RIS0bits.RIS1 // bit 1, shadows bit in COG1RIS0bits
25951 #define G1RIS1 COG1RIS0bits.G1RIS1 // bit 1, shadows bit in COG1RIS0bits
25952 #define RIS2 COG1RIS0bits.RIS2 // bit 2, shadows bit in COG1RIS0bits
25953 #define G1RIS2 COG1RIS0bits.G1RIS2 // bit 2, shadows bit in COG1RIS0bits
25954 #define RIS3 COG1RIS0bits.RIS3 // bit 3, shadows bit in COG1RIS0bits
25955 #define G1RIS3 COG1RIS0bits.G1RIS3 // bit 3, shadows bit in COG1RIS0bits
25956 #define RIS4 COG1RIS0bits.RIS4 // bit 4, shadows bit in COG1RIS0bits
25957 #define G1RIS4 COG1RIS0bits.G1RIS4 // bit 4, shadows bit in COG1RIS0bits
25958 #define RIS5 COG1RIS0bits.RIS5 // bit 5, shadows bit in COG1RIS0bits
25959 #define G1RIS5 COG1RIS0bits.G1RIS5 // bit 5, shadows bit in COG1RIS0bits
25960 #define RIS6 COG1RIS0bits.RIS6 // bit 6, shadows bit in COG1RIS0bits
25961 #define G1RIS6 COG1RIS0bits.G1RIS6 // bit 6, shadows bit in COG1RIS0bits
25962 #define RIS7 COG1RIS0bits.RIS7 // bit 7, shadows bit in COG1RIS0bits
25963 #define G1RIS7 COG1RIS0bits.G1RIS7 // bit 7, shadows bit in COG1RIS0bits
25965 #define RIS8 COG1RIS1bits.RIS8 // bit 0, shadows bit in COG1RIS1bits
25966 #define G1RIS8 COG1RIS1bits.G1RIS8 // bit 0, shadows bit in COG1RIS1bits
25967 #define RIS9 COG1RIS1bits.RIS9 // bit 1, shadows bit in COG1RIS1bits
25968 #define G1RIS9 COG1RIS1bits.G1RIS9 // bit 1, shadows bit in COG1RIS1bits
25969 #define RIS10 COG1RIS1bits.RIS10 // bit 2, shadows bit in COG1RIS1bits
25970 #define G1RIS10 COG1RIS1bits.G1RIS10 // bit 2, shadows bit in COG1RIS1bits
25971 #define RIS11 COG1RIS1bits.RIS11 // bit 3, shadows bit in COG1RIS1bits
25972 #define G1RIS11 COG1RIS1bits.G1RIS11 // bit 3, shadows bit in COG1RIS1bits
25973 #define RIS12 COG1RIS1bits.RIS12 // bit 4, shadows bit in COG1RIS1bits
25974 #define G1RIS12 COG1RIS1bits.G1RIS12 // bit 4, shadows bit in COG1RIS1bits
25975 #define RIS13 COG1RIS1bits.RIS13 // bit 5, shadows bit in COG1RIS1bits
25976 #define G1RIS13 COG1RIS1bits.G1RIS13 // bit 5, shadows bit in COG1RIS1bits
25977 #define RIS14 COG1RIS1bits.RIS14 // bit 6, shadows bit in COG1RIS1bits
25978 #define G1RIS14 COG1RIS1bits.G1RIS14 // bit 6, shadows bit in COG1RIS1bits
25979 #define RIS15 COG1RIS1bits.RIS15 // bit 7, shadows bit in COG1RIS1bits
25980 #define G1RIS15 COG1RIS1bits.G1RIS15 // bit 7, shadows bit in COG1RIS1bits
25982 #define RSIM0 COG1RSIM0bits.RSIM0 // bit 0, shadows bit in COG1RSIM0bits
25983 #define G1RSIM0 COG1RSIM0bits.G1RSIM0 // bit 0, shadows bit in COG1RSIM0bits
25984 #define RSIM1 COG1RSIM0bits.RSIM1 // bit 1, shadows bit in COG1RSIM0bits
25985 #define G1RSIM1 COG1RSIM0bits.G1RSIM1 // bit 1, shadows bit in COG1RSIM0bits
25986 #define RSIM2 COG1RSIM0bits.RSIM2 // bit 2, shadows bit in COG1RSIM0bits
25987 #define G1RSIM2 COG1RSIM0bits.G1RSIM2 // bit 2, shadows bit in COG1RSIM0bits
25988 #define RSIM3 COG1RSIM0bits.RSIM3 // bit 3, shadows bit in COG1RSIM0bits
25989 #define G1RSIM3 COG1RSIM0bits.G1RSIM3 // bit 3, shadows bit in COG1RSIM0bits
25990 #define RSIM4 COG1RSIM0bits.RSIM4 // bit 4, shadows bit in COG1RSIM0bits
25991 #define G1RSIM4 COG1RSIM0bits.G1RSIM4 // bit 4, shadows bit in COG1RSIM0bits
25992 #define RSIM5 COG1RSIM0bits.RSIM5 // bit 5, shadows bit in COG1RSIM0bits
25993 #define G1RSIM5 COG1RSIM0bits.G1RSIM5 // bit 5, shadows bit in COG1RSIM0bits
25994 #define RSIM6 COG1RSIM0bits.RSIM6 // bit 6, shadows bit in COG1RSIM0bits
25995 #define G1RSIM6 COG1RSIM0bits.G1RSIM6 // bit 6, shadows bit in COG1RSIM0bits
25996 #define RSIM7 COG1RSIM0bits.RSIM7 // bit 7, shadows bit in COG1RSIM0bits
25997 #define G1RSIM7 COG1RSIM0bits.G1RSIM7 // bit 7, shadows bit in COG1RSIM0bits
25999 #define RSIM8 COG1RSIM1bits.RSIM8 // bit 0, shadows bit in COG1RSIM1bits
26000 #define G1RSIM8 COG1RSIM1bits.G1RSIM8 // bit 0, shadows bit in COG1RSIM1bits
26001 #define RSIM9 COG1RSIM1bits.RSIM9 // bit 1, shadows bit in COG1RSIM1bits
26002 #define G1RSIM9 COG1RSIM1bits.G1RSIM9 // bit 1, shadows bit in COG1RSIM1bits
26003 #define RSIM10 COG1RSIM1bits.RSIM10 // bit 2, shadows bit in COG1RSIM1bits
26004 #define G1RSIM10 COG1RSIM1bits.G1RSIM10 // bit 2, shadows bit in COG1RSIM1bits
26005 #define RSIM11 COG1RSIM1bits.RSIM11 // bit 3, shadows bit in COG1RSIM1bits
26006 #define G1RSIM11 COG1RSIM1bits.G1RSIM11 // bit 3, shadows bit in COG1RSIM1bits
26007 #define RSIM12 COG1RSIM1bits.RSIM12 // bit 4, shadows bit in COG1RSIM1bits
26008 #define G1RSIM12 COG1RSIM1bits.G1RSIM12 // bit 4, shadows bit in COG1RSIM1bits
26009 #define RSIM13 COG1RSIM1bits.RSIM13 // bit 5, shadows bit in COG1RSIM1bits
26010 #define G1RSIM13 COG1RSIM1bits.G1RSIM13 // bit 5, shadows bit in COG1RSIM1bits
26011 #define RSIM14 COG1RSIM1bits.RSIM14 // bit 6, shadows bit in COG1RSIM1bits
26012 #define G1RSIM14 COG1RSIM1bits.G1RSIM14 // bit 6, shadows bit in COG1RSIM1bits
26013 #define RSIM15 COG1RSIM1bits.RSIM15 // bit 7, shadows bit in COG1RSIM1bits
26014 #define G1RSIM15 COG1RSIM1bits.G1RSIM15 // bit 7, shadows bit in COG1RSIM1bits
26016 #define STRA COG1STRbits.STRA // bit 0, shadows bit in COG1STRbits
26017 #define G1STRA COG1STRbits.G1STRA // bit 0, shadows bit in COG1STRbits
26018 #define STRB COG1STRbits.STRB // bit 1, shadows bit in COG1STRbits
26019 #define G1STRB COG1STRbits.G1STRB // bit 1, shadows bit in COG1STRbits
26020 #define STRC COG1STRbits.STRC // bit 2, shadows bit in COG1STRbits
26021 #define G1STRC COG1STRbits.G1STRC // bit 2, shadows bit in COG1STRbits
26022 #define STRD COG1STRbits.STRD // bit 3, shadows bit in COG1STRbits
26023 #define G1STRD COG1STRbits.G1STRD // bit 3, shadows bit in COG1STRbits
26024 #define SDATA COG1STRbits.SDATA // bit 4, shadows bit in COG1STRbits
26025 #define G1SDATA COG1STRbits.G1SDATA // bit 4, shadows bit in COG1STRbits
26026 #define SDATB COG1STRbits.SDATB // bit 5, shadows bit in COG1STRbits
26027 #define G1SDATB COG1STRbits.G1SDATB // bit 5, shadows bit in COG1STRbits
26028 #define SDATC COG1STRbits.SDATC // bit 6, shadows bit in COG1STRbits
26029 #define G1SDATC COG1STRbits.G1SDATC // bit 6, shadows bit in COG1STRbits
26030 #define SDATD COG1STRbits.SDATD // bit 7, shadows bit in COG1STRbits
26031 #define G1SDATD COG1STRbits.G1SDATD // bit 7, shadows bit in COG1STRbits
26033 #define REF0 DAC1CON1bits.REF0 // bit 0, shadows bit in DAC1CON1bits
26034 #define DAC1REF0 DAC1CON1bits.DAC1REF0 // bit 0, shadows bit in DAC1CON1bits
26035 #define R0 DAC1CON1bits.R0 // bit 0, shadows bit in DAC1CON1bits
26036 #define DAC1R0 DAC1CON1bits.DAC1R0 // bit 0, shadows bit in DAC1CON1bits
26037 #define REF1 DAC1CON1bits.REF1 // bit 1, shadows bit in DAC1CON1bits
26038 #define DAC1REF1 DAC1CON1bits.DAC1REF1 // bit 1, shadows bit in DAC1CON1bits
26039 #define R1 DAC1CON1bits.R1 // bit 1, shadows bit in DAC1CON1bits
26040 #define DAC1R1 DAC1CON1bits.DAC1R1 // bit 1, shadows bit in DAC1CON1bits
26041 #define REF2 DAC1CON1bits.REF2 // bit 2, shadows bit in DAC1CON1bits
26042 #define DAC1REF2 DAC1CON1bits.DAC1REF2 // bit 2, shadows bit in DAC1CON1bits
26043 #define R2 DAC1CON1bits.R2 // bit 2, shadows bit in DAC1CON1bits
26044 #define DAC1R2 DAC1CON1bits.DAC1R2 // bit 2, shadows bit in DAC1CON1bits
26045 #define REF3 DAC1CON1bits.REF3 // bit 3, shadows bit in DAC1CON1bits
26046 #define DAC1REF3 DAC1CON1bits.DAC1REF3 // bit 3, shadows bit in DAC1CON1bits
26047 #define R3 DAC1CON1bits.R3 // bit 3, shadows bit in DAC1CON1bits
26048 #define DAC1R3 DAC1CON1bits.DAC1R3 // bit 3, shadows bit in DAC1CON1bits
26049 #define REF4 DAC1CON1bits.REF4 // bit 4, shadows bit in DAC1CON1bits
26050 #define DAC1REF4 DAC1CON1bits.DAC1REF4 // bit 4, shadows bit in DAC1CON1bits
26051 #define R4 DAC1CON1bits.R4 // bit 4, shadows bit in DAC1CON1bits
26052 #define DAC1R4 DAC1CON1bits.DAC1R4 // bit 4, shadows bit in DAC1CON1bits
26053 #define REF5 DAC1CON1bits.REF5 // bit 5, shadows bit in DAC1CON1bits
26054 #define DAC1REF5 DAC1CON1bits.DAC1REF5 // bit 5, shadows bit in DAC1CON1bits
26055 #define R5 DAC1CON1bits.R5 // bit 5, shadows bit in DAC1CON1bits
26056 #define DAC1R5 DAC1CON1bits.DAC1R5 // bit 5, shadows bit in DAC1CON1bits
26057 #define REF6 DAC1CON1bits.REF6 // bit 6, shadows bit in DAC1CON1bits
26058 #define DAC1REF6 DAC1CON1bits.DAC1REF6 // bit 6, shadows bit in DAC1CON1bits
26059 #define R6 DAC1CON1bits.R6 // bit 6, shadows bit in DAC1CON1bits
26060 #define DAC1R6 DAC1CON1bits.DAC1R6 // bit 6, shadows bit in DAC1CON1bits
26061 #define REF7 DAC1CON1bits.REF7 // bit 7, shadows bit in DAC1CON1bits
26062 #define DAC1REF7 DAC1CON1bits.DAC1REF7 // bit 7, shadows bit in DAC1CON1bits
26063 #define R7 DAC1CON1bits.R7 // bit 7, shadows bit in DAC1CON1bits
26064 #define DAC1R7 DAC1CON1bits.DAC1R7 // bit 7, shadows bit in DAC1CON1bits
26066 #define REF8 DAC1CON2bits.REF8 // bit 0, shadows bit in DAC1CON2bits
26067 #define DAC1REF8 DAC1CON2bits.DAC1REF8 // bit 0, shadows bit in DAC1CON2bits
26068 #define R8 DAC1CON2bits.R8 // bit 0, shadows bit in DAC1CON2bits
26069 #define DAC1R8 DAC1CON2bits.DAC1R8 // bit 0, shadows bit in DAC1CON2bits
26070 #define REF9 DAC1CON2bits.REF9 // bit 1, shadows bit in DAC1CON2bits
26071 #define DAC1REF9 DAC1CON2bits.DAC1REF9 // bit 1, shadows bit in DAC1CON2bits
26072 #define R9 DAC1CON2bits.R9 // bit 1, shadows bit in DAC1CON2bits
26073 #define DAC1R9 DAC1CON2bits.DAC1R9 // bit 1, shadows bit in DAC1CON2bits
26074 #define REF10 DAC1CON2bits.REF10 // bit 2, shadows bit in DAC1CON2bits
26075 #define DAC1REF10 DAC1CON2bits.DAC1REF10 // bit 2, shadows bit in DAC1CON2bits
26076 #define R10 DAC1CON2bits.R10 // bit 2, shadows bit in DAC1CON2bits
26077 #define DAC1R10 DAC1CON2bits.DAC1R10 // bit 2, shadows bit in DAC1CON2bits
26078 #define REF11 DAC1CON2bits.REF11 // bit 3, shadows bit in DAC1CON2bits
26079 #define DAC1REF11 DAC1CON2bits.DAC1REF11 // bit 3, shadows bit in DAC1CON2bits
26080 #define R11 DAC1CON2bits.R11 // bit 3, shadows bit in DAC1CON2bits
26081 #define DAC1R11 DAC1CON2bits.DAC1R11 // bit 3, shadows bit in DAC1CON2bits
26082 #define REF12 DAC1CON2bits.REF12 // bit 4, shadows bit in DAC1CON2bits
26083 #define DAC1REF12 DAC1CON2bits.DAC1REF12 // bit 4, shadows bit in DAC1CON2bits
26084 #define R12 DAC1CON2bits.R12 // bit 4, shadows bit in DAC1CON2bits
26085 #define DAC1R12 DAC1CON2bits.DAC1R12 // bit 4, shadows bit in DAC1CON2bits
26086 #define REF13 DAC1CON2bits.REF13 // bit 5, shadows bit in DAC1CON2bits
26087 #define DAC1REF13 DAC1CON2bits.DAC1REF13 // bit 5, shadows bit in DAC1CON2bits
26088 #define R13 DAC1CON2bits.R13 // bit 5, shadows bit in DAC1CON2bits
26089 #define DAC1R13 DAC1CON2bits.DAC1R13 // bit 5, shadows bit in DAC1CON2bits
26090 #define REF14 DAC1CON2bits.REF14 // bit 6, shadows bit in DAC1CON2bits
26091 #define DAC1REF14 DAC1CON2bits.DAC1REF14 // bit 6, shadows bit in DAC1CON2bits
26092 #define R14 DAC1CON2bits.R14 // bit 6, shadows bit in DAC1CON2bits
26093 #define DAC1R14 DAC1CON2bits.DAC1R14 // bit 6, shadows bit in DAC1CON2bits
26094 #define REF15 DAC1CON2bits.REF15 // bit 7, shadows bit in DAC1CON2bits
26095 #define DAC1REF15 DAC1CON2bits.DAC1REF15 // bit 7, shadows bit in DAC1CON2bits
26096 #define R15 DAC1CON2bits.R15 // bit 7, shadows bit in DAC1CON2bits
26097 #define DAC1R15 DAC1CON2bits.DAC1R15 // bit 7, shadows bit in DAC1CON2bits
26099 #define DAC1LD DACLDbits.DAC1LD // bit 0
26100 #define DAC2LD DACLDbits.DAC2LD // bit 1
26101 #define DAC5LD DACLDbits.DAC5LD // bit 4
26102 #define DAC6LD DACLDbits.DAC6LD // bit 5
26104 #define TSRNG FVRCONbits.TSRNG // bit 4
26105 #define TSEN FVRCONbits.TSEN // bit 5
26106 #define FVRRDY FVRCONbits.FVRRDY // bit 6
26107 #define FVREN FVRCONbits.FVREN // bit 7
26109 #define HIDB0 HIDRVBbits.HIDB0 // bit 0
26110 #define HIDB1 HIDRVBbits.HIDB1 // bit 1
26112 #define INLVE0 INLVEbits.INLVE0 // bit 0
26113 #define INLVE1 INLVEbits.INLVE1 // bit 1
26114 #define INLVE2 INLVEbits.INLVE2 // bit 2
26115 #define INLVE3 INLVEbits.INLVE3 // bit 3
26117 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
26118 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
26119 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
26120 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
26121 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
26122 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
26123 #define INLVA6 INLVLAbits.INLVA6 // bit 6
26124 #define INLVA7 INLVLAbits.INLVA7 // bit 7
26126 #define INLVB0 INLVLBbits.INLVB0 // bit 0
26127 #define INLVB1 INLVLBbits.INLVB1 // bit 1
26128 #define INLVB2 INLVLBbits.INLVB2 // bit 2
26129 #define INLVB3 INLVLBbits.INLVB3 // bit 3
26130 #define INLVLB4 INLVLBbits.INLVLB4 // bit 4
26131 #define INLVLB5 INLVLBbits.INLVLB5 // bit 5
26132 #define INLVLB6 INLVLBbits.INLVLB6 // bit 6
26133 #define INLVLB7 INLVLBbits.INLVLB7 // bit 7
26135 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0
26136 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1
26137 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2
26138 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3
26139 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4
26140 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5
26141 #define INLVLC6 INLVLCbits.INLVLC6 // bit 6
26142 #define INLVLC7 INLVLCbits.INLVLC7 // bit 7
26144 #define INLVLD0 INLVLDbits.INLVLD0 // bit 0
26145 #define INLVLD1 INLVLDbits.INLVLD1 // bit 1
26146 #define INLVLD2 INLVLDbits.INLVLD2 // bit 2
26147 #define INLVLD3 INLVLDbits.INLVLD3 // bit 3
26148 #define INLVLD4 INLVLDbits.INLVLD4 // bit 4
26149 #define INLVLD5 INLVLDbits.INLVLD5 // bit 5
26150 #define INLVLD6 INLVLDbits.INLVLD6 // bit 6
26151 #define INLVLD7 INLVLDbits.INLVLD7 // bit 7
26153 #define IOCIF INTCONbits.IOCIF // bit 0
26154 #define INTF INTCONbits.INTF // bit 1
26155 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
26156 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
26157 #define IOCIE INTCONbits.IOCIE // bit 3
26158 #define INTE INTCONbits.INTE // bit 4
26159 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
26160 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
26161 #define PEIE INTCONbits.PEIE // bit 6
26162 #define GIE INTCONbits.GIE // bit 7
26164 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
26165 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
26166 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
26167 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
26168 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
26169 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
26170 #define IOCAF6 IOCAFbits.IOCAF6 // bit 6
26171 #define IOCAF7 IOCAFbits.IOCAF7 // bit 7
26173 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
26174 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
26175 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
26176 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
26177 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
26178 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
26179 #define IOCAN6 IOCANbits.IOCAN6 // bit 6
26180 #define IOCAN7 IOCANbits.IOCAN7 // bit 7
26182 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
26183 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
26184 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
26185 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
26186 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
26187 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
26188 #define IOCAP6 IOCAPbits.IOCAP6 // bit 6
26189 #define IOCAP7 IOCAPbits.IOCAP7 // bit 7
26191 #define IOCBF0 IOCBFbits.IOCBF0 // bit 0
26192 #define IOCBF1 IOCBFbits.IOCBF1 // bit 1
26193 #define IOCBF2 IOCBFbits.IOCBF2 // bit 2
26194 #define IOCBF3 IOCBFbits.IOCBF3 // bit 3
26195 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
26196 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
26197 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
26198 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
26200 #define IOCBN0 IOCBNbits.IOCBN0 // bit 0
26201 #define IOCBN1 IOCBNbits.IOCBN1 // bit 1
26202 #define IOCBN2 IOCBNbits.IOCBN2 // bit 2
26203 #define IOCBN3 IOCBNbits.IOCBN3 // bit 3
26204 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
26205 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
26206 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
26207 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
26209 #define IOCBP0 IOCBPbits.IOCBP0 // bit 0
26210 #define IOCBP1 IOCBPbits.IOCBP1 // bit 1
26211 #define IOCBP2 IOCBPbits.IOCBP2 // bit 2
26212 #define IOCBP3 IOCBPbits.IOCBP3 // bit 3
26213 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
26214 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
26215 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
26216 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
26218 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
26219 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
26220 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
26221 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
26222 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
26223 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
26224 #define IOCCF6 IOCCFbits.IOCCF6 // bit 6
26225 #define IOCCF7 IOCCFbits.IOCCF7 // bit 7
26227 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
26228 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
26229 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
26230 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
26231 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
26232 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
26233 #define IOCCN6 IOCCNbits.IOCCN6 // bit 6
26234 #define IOCCN7 IOCCNbits.IOCCN7 // bit 7
26236 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
26237 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
26238 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
26239 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
26240 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
26241 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
26242 #define IOCCP6 IOCCPbits.IOCCP6 // bit 6
26243 #define IOCCP7 IOCCPbits.IOCCP7 // bit 7
26245 #define IOCEF3 IOCEFbits.IOCEF3 // bit 3
26247 #define IOCEN3 IOCENbits.IOCEN3 // bit 3
26249 #define IOCEP3 IOCEPbits.IOCEP3 // bit 3
26251 #define LATA0 LATAbits.LATA0 // bit 0
26252 #define LATA1 LATAbits.LATA1 // bit 1
26253 #define LATA2 LATAbits.LATA2 // bit 2
26254 #define LATA3 LATAbits.LATA3 // bit 3
26255 #define LATA4 LATAbits.LATA4 // bit 4
26256 #define LATA5 LATAbits.LATA5 // bit 5
26257 #define LATA6 LATAbits.LATA6 // bit 6
26258 #define LATA7 LATAbits.LATA7 // bit 7
26260 #define LATB0 LATBbits.LATB0 // bit 0
26261 #define LATB1 LATBbits.LATB1 // bit 1
26262 #define LATB2 LATBbits.LATB2 // bit 2
26263 #define LATB3 LATBbits.LATB3 // bit 3
26264 #define LATB4 LATBbits.LATB4 // bit 4
26265 #define LATB5 LATBbits.LATB5 // bit 5
26266 #define LATB6 LATBbits.LATB6 // bit 6
26267 #define LATB7 LATBbits.LATB7 // bit 7
26269 #define LATC0 LATCbits.LATC0 // bit 0
26270 #define LATC1 LATCbits.LATC1 // bit 1
26271 #define LATC2 LATCbits.LATC2 // bit 2
26272 #define LATC3 LATCbits.LATC3 // bit 3
26273 #define LATC4 LATCbits.LATC4 // bit 4
26274 #define LATC5 LATCbits.LATC5 // bit 5
26275 #define LATC6 LATCbits.LATC6 // bit 6
26276 #define LATC7 LATCbits.LATC7 // bit 7
26278 #define LATD0 LATDbits.LATD0 // bit 0
26279 #define LATD1 LATDbits.LATD1 // bit 1
26280 #define LATD2 LATDbits.LATD2 // bit 2
26281 #define LATD3 LATDbits.LATD3 // bit 3
26282 #define LATD4 LATDbits.LATD4 // bit 4
26283 #define LATD5 LATDbits.LATD5 // bit 5
26284 #define LATD6 LATDbits.LATD6 // bit 6
26285 #define LATD7 LATDbits.LATD7 // bit 7
26287 #define LATE0 LATEbits.LATE0 // bit 0
26288 #define LATE1 LATEbits.LATE1 // bit 1
26289 #define LATE2 LATEbits.LATE2 // bit 2
26291 #define CH0 MD1CARHbits.CH0 // bit 0, shadows bit in MD1CARHbits
26292 #define MD1CH0 MD1CARHbits.MD1CH0 // bit 0, shadows bit in MD1CARHbits
26293 #define CH1 MD1CARHbits.CH1 // bit 1, shadows bit in MD1CARHbits
26294 #define MD1CH1 MD1CARHbits.MD1CH1 // bit 1, shadows bit in MD1CARHbits
26295 #define CH2 MD1CARHbits.CH2 // bit 2, shadows bit in MD1CARHbits
26296 #define MD1CH2 MD1CARHbits.MD1CH2 // bit 2, shadows bit in MD1CARHbits
26297 #define CH3 MD1CARHbits.CH3 // bit 3, shadows bit in MD1CARHbits
26298 #define MD1CH3 MD1CARHbits.MD1CH3 // bit 3, shadows bit in MD1CARHbits
26299 #define CH4 MD1CARHbits.CH4 // bit 4
26301 #define CL0 MD1CARLbits.CL0 // bit 0, shadows bit in MD1CARLbits
26302 #define MD1CL0 MD1CARLbits.MD1CL0 // bit 0, shadows bit in MD1CARLbits
26303 #define CL1 MD1CARLbits.CL1 // bit 1, shadows bit in MD1CARLbits
26304 #define MD1CL1 MD1CARLbits.MD1CL1 // bit 1, shadows bit in MD1CARLbits
26305 #define CL2 MD1CARLbits.CL2 // bit 2, shadows bit in MD1CARLbits
26306 #define MD1CL2 MD1CARLbits.MD1CL2 // bit 2, shadows bit in MD1CARLbits
26307 #define CL3 MD1CARLbits.CL3 // bit 3, shadows bit in MD1CARLbits
26308 #define MD1CL3 MD1CARLbits.MD1CL3 // bit 3, shadows bit in MD1CARLbits
26309 #define CL4 MD1CARLbits.CL4 // bit 4
26311 #define CLSYNC MD1CON1bits.CLSYNC // bit 0, shadows bit in MD1CON1bits
26312 #define MD1CLSYNC MD1CON1bits.MD1CLSYNC // bit 0, shadows bit in MD1CON1bits
26313 #define CLPOL MD1CON1bits.CLPOL // bit 1, shadows bit in MD1CON1bits
26314 #define MD1CLPOL MD1CON1bits.MD1CLPOL // bit 1, shadows bit in MD1CON1bits
26315 #define CHSYNC MD1CON1bits.CHSYNC // bit 4, shadows bit in MD1CON1bits
26316 #define MD1CHSYNC MD1CON1bits.MD1CHSYNC // bit 4, shadows bit in MD1CON1bits
26317 #define CHPOL MD1CON1bits.CHPOL // bit 5, shadows bit in MD1CON1bits
26318 #define MD1CHPOL MD1CON1bits.MD1CHPOL // bit 5, shadows bit in MD1CON1bits
26320 #define MS0 MD1SRCbits.MS0 // bit 0, shadows bit in MD1SRCbits
26321 #define MD1MS0 MD1SRCbits.MD1MS0 // bit 0, shadows bit in MD1SRCbits
26322 #define MS1 MD1SRCbits.MS1 // bit 1, shadows bit in MD1SRCbits
26323 #define MD1MS1 MD1SRCbits.MD1MS1 // bit 1, shadows bit in MD1SRCbits
26324 #define MS2 MD1SRCbits.MS2 // bit 2, shadows bit in MD1SRCbits
26325 #define MD1MS2 MD1SRCbits.MD1MS2 // bit 2, shadows bit in MD1SRCbits
26326 #define MS3 MD1SRCbits.MS3 // bit 3, shadows bit in MD1SRCbits
26327 #define MD1MS3 MD1SRCbits.MD1MS3 // bit 3, shadows bit in MD1SRCbits
26328 #define MS4 MD1SRCbits.MS4 // bit 4, shadows bit in MD1SRCbits
26329 #define MD1MS4 MD1SRCbits.MD1MS4 // bit 4, shadows bit in MD1SRCbits
26331 #define ODA0 ODCONAbits.ODA0 // bit 0
26332 #define ODA1 ODCONAbits.ODA1 // bit 1
26333 #define ODA2 ODCONAbits.ODA2 // bit 2
26334 #define ODA3 ODCONAbits.ODA3 // bit 3
26335 #define ODA4 ODCONAbits.ODA4 // bit 4
26336 #define ODA5 ODCONAbits.ODA5 // bit 5
26337 #define ODA6 ODCONAbits.ODA6 // bit 6
26338 #define ODA7 ODCONAbits.ODA7 // bit 7
26340 #define ODB0 ODCONBbits.ODB0 // bit 0
26341 #define ODB1 ODCONBbits.ODB1 // bit 1
26342 #define ODB2 ODCONBbits.ODB2 // bit 2
26343 #define ODB3 ODCONBbits.ODB3 // bit 3
26344 #define ODB4 ODCONBbits.ODB4 // bit 4
26345 #define ODB5 ODCONBbits.ODB5 // bit 5
26346 #define ODB6 ODCONBbits.ODB6 // bit 6
26347 #define ODB7 ODCONBbits.ODB7 // bit 7
26349 #define ODC0 ODCONCbits.ODC0 // bit 0
26350 #define ODC1 ODCONCbits.ODC1 // bit 1
26351 #define ODC2 ODCONCbits.ODC2 // bit 2
26352 #define ODC3 ODCONCbits.ODC3 // bit 3
26353 #define ODC4 ODCONCbits.ODC4 // bit 4
26354 #define ODC5 ODCONCbits.ODC5 // bit 5
26355 #define ODC6 ODCONCbits.ODC6 // bit 6
26356 #define ODC7 ODCONCbits.ODC7 // bit 7
26358 #define ODD0 ODCONDbits.ODD0 // bit 0
26359 #define ODD1 ODCONDbits.ODD1 // bit 1
26360 #define ODD2 ODCONDbits.ODD2 // bit 2
26361 #define ODD3 ODCONDbits.ODD3 // bit 3
26362 #define ODD4 ODCONDbits.ODD4 // bit 4
26363 #define ODD5 ODCONDbits.ODD5 // bit 5
26364 #define ODD6 ODCONDbits.ODD6 // bit 6
26365 #define ODD7 ODCONDbits.ODD7 // bit 7
26367 #define ODE0 ODCONEbits.ODE0 // bit 0
26368 #define ODE1 ODCONEbits.ODE1 // bit 1
26369 #define ODE2 ODCONEbits.ODE2 // bit 2
26371 #define PS0 OPTION_REGbits.PS0 // bit 0
26372 #define PS1 OPTION_REGbits.PS1 // bit 1
26373 #define PS2 OPTION_REGbits.PS2 // bit 2
26374 #define PSA OPTION_REGbits.PSA // bit 3
26375 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
26376 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
26377 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
26378 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
26379 #define INTEDG OPTION_REGbits.INTEDG // bit 6
26380 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
26382 #define SCS0 OSCCONbits.SCS0 // bit 0
26383 #define SCS1 OSCCONbits.SCS1 // bit 1
26384 #define IRCF0 OSCCONbits.IRCF0 // bit 3
26385 #define IRCF1 OSCCONbits.IRCF1 // bit 4
26386 #define IRCF2 OSCCONbits.IRCF2 // bit 5
26387 #define IRCF3 OSCCONbits.IRCF3 // bit 6
26388 #define SPLLEN OSCCONbits.SPLLEN // bit 7
26390 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
26391 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
26392 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
26393 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
26394 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
26395 #define OSTS OSCSTATbits.OSTS // bit 5
26396 #define PLLR OSCSTATbits.PLLR // bit 6
26397 #define SOSCR OSCSTATbits.SOSCR // bit 7
26399 #define TUN0 OSCTUNEbits.TUN0 // bit 0
26400 #define TUN1 OSCTUNEbits.TUN1 // bit 1
26401 #define TUN2 OSCTUNEbits.TUN2 // bit 2
26402 #define TUN3 OSCTUNEbits.TUN3 // bit 3
26403 #define TUN4 OSCTUNEbits.TUN4 // bit 4
26404 #define TUN5 OSCTUNEbits.TUN5 // bit 5
26406 #define NOT_BOR PCONbits.NOT_BOR // bit 0
26407 #define NOT_POR PCONbits.NOT_POR // bit 1
26408 #define NOT_RI PCONbits.NOT_RI // bit 2
26409 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
26410 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
26411 #define STKUNF PCONbits.STKUNF // bit 6
26412 #define STKOVF PCONbits.STKOVF // bit 7
26414 #define TMR1IE PIE1bits.TMR1IE // bit 0
26415 #define TMR2IE PIE1bits.TMR2IE // bit 1
26416 #define CCP1IE PIE1bits.CCP1IE // bit 2, shadows bit in PIE1bits
26417 #define CCPIE PIE1bits.CCPIE // bit 2, shadows bit in PIE1bits
26418 #define SSP1IE PIE1bits.SSP1IE // bit 3
26419 #define TXIE PIE1bits.TXIE // bit 4
26420 #define RCIE PIE1bits.RCIE // bit 5
26421 #define ADIE PIE1bits.ADIE // bit 6
26422 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
26424 #define CCP2IE PIE2bits.CCP2IE // bit 0
26425 #define C3IE PIE2bits.C3IE // bit 1
26426 #define C4IE PIE2bits.C4IE // bit 2
26427 #define BCL1IE PIE2bits.BCL1IE // bit 3
26428 #define COGIE PIE2bits.COGIE // bit 4
26429 #define C1IE PIE2bits.C1IE // bit 5
26430 #define C2IE PIE2bits.C2IE // bit 6
26431 #define OSFIE PIE2bits.OSFIE // bit 7
26433 #define CLC1IE PIE3bits.CLC1IE // bit 0
26434 #define CLC2IE PIE3bits.CLC2IE // bit 1
26435 #define CLC3IE PIE3bits.CLC3IE // bit 2
26436 #define CLC4IE PIE3bits.CLC4IE // bit 3
26437 #define ZCDIE PIE3bits.ZCDIE // bit 4
26438 #define COG2IE PIE3bits.COG2IE // bit 5
26440 #define TMR4IE PIE4bits.TMR4IE // bit 0
26441 #define TMR6IE PIE4bits.TMR6IE // bit 1
26442 #define TMR3IE PIE4bits.TMR3IE // bit 2
26443 #define TMR3GIE PIE4bits.TMR3GIE // bit 3
26444 #define TMR5IE PIE4bits.TMR5IE // bit 4
26445 #define TMR5GIE PIE4bits.TMR5GIE // bit 5
26446 #define TMR8IE PIE4bits.TMR8IE // bit 6
26448 #define C5IE PIE5bits.C5IE // bit 0
26449 #define C6IE PIE5bits.C6IE // bit 1
26450 #define C7IE PIE5bits.C7IE // bit 2
26451 #define C8IE PIE5bits.C8IE // bit 3
26452 #define COG3IE PIE5bits.COG3IE // bit 4
26453 #define COG4IE PIE5bits.COG4IE // bit 5
26454 #define CCP7IE PIE5bits.CCP7IE // bit 6
26455 #define CCP8IE PIE5bits.CCP8IE // bit 7
26457 #define PWM5IE PIE6bits.PWM5IE // bit 0
26458 #define PWM6IE PIE6bits.PWM6IE // bit 1
26459 #define PWM11IE PIE6bits.PWM11IE // bit 2
26460 #define PWM12IE PIE6bits.PWM12IE // bit 3
26462 #define TMR1IF PIR1bits.TMR1IF // bit 0
26463 #define TMR2IF PIR1bits.TMR2IF // bit 1
26464 #define CCP1IF PIR1bits.CCP1IF // bit 2, shadows bit in PIR1bits
26465 #define CCPIF PIR1bits.CCPIF // bit 2, shadows bit in PIR1bits
26466 #define SSP1IF PIR1bits.SSP1IF // bit 3
26467 #define TXIF PIR1bits.TXIF // bit 4
26468 #define RCIF PIR1bits.RCIF // bit 5
26469 #define ADIF PIR1bits.ADIF // bit 6
26470 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
26472 #define CCP2IF PIR2bits.CCP2IF // bit 0
26473 #define C3IF PIR2bits.C3IF // bit 1
26474 #define C4IF PIR2bits.C4IF // bit 2
26475 #define BCL1IF PIR2bits.BCL1IF // bit 3
26476 #define COG1IF PIR2bits.COG1IF // bit 4
26477 #define C1IF PIR2bits.C1IF // bit 5
26478 #define C2IF PIR2bits.C2IF // bit 6
26479 #define OSFIF PIR2bits.OSFIF // bit 7
26481 #define CLC1IF PIR3bits.CLC1IF // bit 0
26482 #define CLC2IF PIR3bits.CLC2IF // bit 1
26483 #define CLC3IF PIR3bits.CLC3IF // bit 2
26484 #define CLC4IF PIR3bits.CLC4IF // bit 3
26485 #define ZCDIF PIR3bits.ZCDIF // bit 4
26486 #define COG2IF PIR3bits.COG2IF // bit 5
26488 #define TMR4IF PIR4bits.TMR4IF // bit 0
26489 #define TMR6IF PIR4bits.TMR6IF // bit 1
26490 #define TMR3IF PIR4bits.TMR3IF // bit 2
26491 #define TMR3GIF PIR4bits.TMR3GIF // bit 3
26492 #define TMR5IF PIR4bits.TMR5IF // bit 4
26493 #define TMR5GIF PIR4bits.TMR5GIF // bit 5
26494 #define TMR8IF PIR4bits.TMR8IF // bit 6
26496 #define C5IF PIR5bits.C5IF // bit 0
26497 #define C6IF PIR5bits.C6IF // bit 1
26498 #define C7IF PIR5bits.C7IF // bit 2
26499 #define C8IF PIR5bits.C8IF // bit 3
26500 #define COG3IF PIR5bits.COG3IF // bit 4
26501 #define COG4IF PIR5bits.COG4IF // bit 5
26502 #define CCP7IF PIR5bits.CCP7IF // bit 6
26503 #define CCP8IF PIR5bits.CCP8IF // bit 7
26505 #define PWM5IF PIR6bits.PWM5IF // bit 0
26506 #define PWM6IF PIR6bits.PWM6IF // bit 1
26507 #define PWM11IF PIR6bits.PWM11IF // bit 2
26508 #define PWM12IF PIR6bits.PWM12IF // bit 3
26510 #define RD PMCON1bits.RD // bit 0
26511 #define WR PMCON1bits.WR // bit 1
26512 #define WREN PMCON1bits.WREN // bit 2
26513 #define WRERR PMCON1bits.WRERR // bit 3
26514 #define FREE PMCON1bits.FREE // bit 4
26515 #define LWLO PMCON1bits.LWLO // bit 5
26516 #define CFGS PMCON1bits.CFGS // bit 6
26518 #define RA0 PORTAbits.RA0 // bit 0
26519 #define RA1 PORTAbits.RA1 // bit 1
26520 #define RA2 PORTAbits.RA2 // bit 2
26521 #define RA3 PORTAbits.RA3 // bit 3
26522 #define RA4 PORTAbits.RA4 // bit 4
26523 #define RA5 PORTAbits.RA5 // bit 5
26524 #define RA6 PORTAbits.RA6 // bit 6
26525 #define RA7 PORTAbits.RA7 // bit 7
26527 #define RB0 PORTBbits.RB0 // bit 0
26528 #define RB1 PORTBbits.RB1 // bit 1
26529 #define RB2 PORTBbits.RB2 // bit 2
26530 #define RB3 PORTBbits.RB3 // bit 3
26531 #define RB4 PORTBbits.RB4 // bit 4
26532 #define RB5 PORTBbits.RB5 // bit 5
26533 #define RB6 PORTBbits.RB6 // bit 6
26534 #define RB7 PORTBbits.RB7 // bit 7
26536 #define RC0 PORTCbits.RC0 // bit 0
26537 #define RC1 PORTCbits.RC1 // bit 1
26538 #define RC2 PORTCbits.RC2 // bit 2
26539 #define RC3 PORTCbits.RC3 // bit 3
26540 #define RC4 PORTCbits.RC4 // bit 4
26541 #define RC5 PORTCbits.RC5 // bit 5
26542 #define RC6 PORTCbits.RC6 // bit 6
26543 #define RC7 PORTCbits.RC7 // bit 7
26545 #define RD0 PORTDbits.RD0 // bit 0
26546 #define RD1 PORTDbits.RD1 // bit 1
26547 #define RD2 PORTDbits.RD2 // bit 2
26548 #define RD3 PORTDbits.RD3 // bit 3
26549 #define RD4 PORTDbits.RD4 // bit 4
26550 #define RD5 PORTDbits.RD5 // bit 5
26551 #define RD6 PORTDbits.RD6 // bit 6
26552 #define RD7 PORTDbits.RD7 // bit 7
26554 #define RE0 PORTEbits.RE0 // bit 0
26555 #define RE1 PORTEbits.RE1 // bit 1
26556 #define RE2 PORTEbits.RE2 // bit 2
26557 #define RE3 PORTEbits.RE3 // bit 3
26559 #define PPSLOCKED PPSLOCKbits.PPSLOCKED // bit 0
26561 #define RPOL PRG1CON1bits.RPOL // bit 0, shadows bit in PRG1CON1bits
26562 #define RG1RPOL PRG1CON1bits.RG1RPOL // bit 0, shadows bit in PRG1CON1bits
26563 #define FPOL PRG1CON1bits.FPOL // bit 1, shadows bit in PRG1CON1bits
26564 #define RG1FPOL PRG1CON1bits.RG1FPOL // bit 1, shadows bit in PRG1CON1bits
26565 #define RDY PRG1CON1bits.RDY // bit 2, shadows bit in PRG1CON1bits
26566 #define RG1RDY PRG1CON1bits.RG1RDY // bit 2, shadows bit in PRG1CON1bits
26568 #define ISET0 PRG1CON2bits.ISET0 // bit 0, shadows bit in PRG1CON2bits
26569 #define RG1ISET0 PRG1CON2bits.RG1ISET0 // bit 0, shadows bit in PRG1CON2bits
26570 #define ISET1 PRG1CON2bits.ISET1 // bit 1, shadows bit in PRG1CON2bits
26571 #define RG1ISET1 PRG1CON2bits.RG1ISET1 // bit 1, shadows bit in PRG1CON2bits
26572 #define ISET2 PRG1CON2bits.ISET2 // bit 2, shadows bit in PRG1CON2bits
26573 #define RG1ISET2 PRG1CON2bits.RG1ISET2 // bit 2, shadows bit in PRG1CON2bits
26574 #define ISET3 PRG1CON2bits.ISET3 // bit 3, shadows bit in PRG1CON2bits
26575 #define RG1ISET3 PRG1CON2bits.RG1ISET3 // bit 3, shadows bit in PRG1CON2bits
26576 #define ISET4 PRG1CON2bits.ISET4 // bit 4, shadows bit in PRG1CON2bits
26577 #define RG1ISET4 PRG1CON2bits.RG1ISET4 // bit 4, shadows bit in PRG1CON2bits
26579 #define FTSS0 PRG1FTSSbits.FTSS0 // bit 0, shadows bit in PRG1FTSSbits
26580 #define RG1FTSS0 PRG1FTSSbits.RG1FTSS0 // bit 0, shadows bit in PRG1FTSSbits
26581 #define FTSS1 PRG1FTSSbits.FTSS1 // bit 1, shadows bit in PRG1FTSSbits
26582 #define RG1FTSS1 PRG1FTSSbits.RG1FTSS1 // bit 1, shadows bit in PRG1FTSSbits
26583 #define FTSS2 PRG1FTSSbits.FTSS2 // bit 2, shadows bit in PRG1FTSSbits
26584 #define RG1FTSS2 PRG1FTSSbits.RG1FTSS2 // bit 2, shadows bit in PRG1FTSSbits
26585 #define FTSS3 PRG1FTSSbits.FTSS3 // bit 3, shadows bit in PRG1FTSSbits
26586 #define RG1FTSS3 PRG1FTSSbits.RG1FTSS3 // bit 3, shadows bit in PRG1FTSSbits
26588 #define INS0 PRG1INSbits.INS0 // bit 0, shadows bit in PRG1INSbits
26589 #define RG1INS0 PRG1INSbits.RG1INS0 // bit 0, shadows bit in PRG1INSbits
26590 #define INS1 PRG1INSbits.INS1 // bit 1, shadows bit in PRG1INSbits
26591 #define RG1INS1 PRG1INSbits.RG1INS1 // bit 1, shadows bit in PRG1INSbits
26592 #define INS2 PRG1INSbits.INS2 // bit 2, shadows bit in PRG1INSbits
26593 #define RG1INS2 PRG1INSbits.RG1INS2 // bit 2, shadows bit in PRG1INSbits
26594 #define INS3 PRG1INSbits.INS3 // bit 3, shadows bit in PRG1INSbits
26595 #define RG1INS3 PRG1INSbits.RG1INS3 // bit 3, shadows bit in PRG1INSbits
26597 #define RTSS0 PRG1RTSSbits.RTSS0 // bit 0, shadows bit in PRG1RTSSbits
26598 #define RG1RTSS0 PRG1RTSSbits.RG1RTSS0 // bit 0, shadows bit in PRG1RTSSbits
26599 #define RTSS1 PRG1RTSSbits.RTSS1 // bit 1, shadows bit in PRG1RTSSbits
26600 #define RG1RTSS1 PRG1RTSSbits.RG1RTSS1 // bit 1, shadows bit in PRG1RTSSbits
26601 #define RTSS2 PRG1RTSSbits.RTSS2 // bit 2, shadows bit in PRG1RTSSbits
26602 #define RG1RTSS2 PRG1RTSSbits.RG1RTSS2 // bit 2, shadows bit in PRG1RTSSbits
26603 #define RTSS3 PRG1RTSSbits.RTSS3 // bit 3, shadows bit in PRG1RTSSbits
26604 #define RG1RTSS3 PRG1RTSSbits.RG1RTSS3 // bit 3, shadows bit in PRG1RTSSbits
26606 #define DC2 PWM3DCHbits.DC2 // bit 0, shadows bit in PWM3DCHbits
26607 #define PWM3DC2 PWM3DCHbits.PWM3DC2 // bit 0, shadows bit in PWM3DCHbits
26608 #define PWMPW2 PWM3DCHbits.PWMPW2 // bit 0, shadows bit in PWM3DCHbits
26609 #define DC3 PWM3DCHbits.DC3 // bit 1, shadows bit in PWM3DCHbits
26610 #define PWM3DC3 PWM3DCHbits.PWM3DC3 // bit 1, shadows bit in PWM3DCHbits
26611 #define PWMPW3 PWM3DCHbits.PWMPW3 // bit 1, shadows bit in PWM3DCHbits
26612 #define DC4 PWM3DCHbits.DC4 // bit 2, shadows bit in PWM3DCHbits
26613 #define PWM3DC4 PWM3DCHbits.PWM3DC4 // bit 2, shadows bit in PWM3DCHbits
26614 #define PWMPW4 PWM3DCHbits.PWMPW4 // bit 2, shadows bit in PWM3DCHbits
26615 #define DC5 PWM3DCHbits.DC5 // bit 3, shadows bit in PWM3DCHbits
26616 #define PWM3DC5 PWM3DCHbits.PWM3DC5 // bit 3, shadows bit in PWM3DCHbits
26617 #define PWMPW5 PWM3DCHbits.PWMPW5 // bit 3, shadows bit in PWM3DCHbits
26618 #define DC6 PWM3DCHbits.DC6 // bit 4, shadows bit in PWM3DCHbits
26619 #define PWM3DC6 PWM3DCHbits.PWM3DC6 // bit 4, shadows bit in PWM3DCHbits
26620 #define PWMPW6 PWM3DCHbits.PWMPW6 // bit 4, shadows bit in PWM3DCHbits
26621 #define DC7 PWM3DCHbits.DC7 // bit 5, shadows bit in PWM3DCHbits
26622 #define PWM3DC7 PWM3DCHbits.PWM3DC7 // bit 5, shadows bit in PWM3DCHbits
26623 #define PWMPW7 PWM3DCHbits.PWMPW7 // bit 5, shadows bit in PWM3DCHbits
26624 #define DC8 PWM3DCHbits.DC8 // bit 6, shadows bit in PWM3DCHbits
26625 #define PWM3DC8 PWM3DCHbits.PWM3DC8 // bit 6, shadows bit in PWM3DCHbits
26626 #define PWMPW8 PWM3DCHbits.PWMPW8 // bit 6, shadows bit in PWM3DCHbits
26627 #define DC9 PWM3DCHbits.DC9 // bit 7, shadows bit in PWM3DCHbits
26628 #define PWM3DC9 PWM3DCHbits.PWM3DC9 // bit 7, shadows bit in PWM3DCHbits
26629 #define PWMPW9 PWM3DCHbits.PWMPW9 // bit 7, shadows bit in PWM3DCHbits
26631 #define DC0 PWM3DCLbits.DC0 // bit 6, shadows bit in PWM3DCLbits
26632 #define PWM3DC0 PWM3DCLbits.PWM3DC0 // bit 6, shadows bit in PWM3DCLbits
26633 #define PWMPW0 PWM3DCLbits.PWMPW0 // bit 6, shadows bit in PWM3DCLbits
26634 #define DC1 PWM3DCLbits.DC1 // bit 7, shadows bit in PWM3DCLbits
26635 #define PWM3DC1 PWM3DCLbits.PWM3DC1 // bit 7, shadows bit in PWM3DCLbits
26636 #define PWMPW1 PWM3DCLbits.PWMPW1 // bit 7, shadows bit in PWM3DCLbits
26638 #define PWM5DCH0 PWM5DCHbits.PWM5DCH0 // bit 0
26639 #define PWM5DCH1 PWM5DCHbits.PWM5DCH1 // bit 1
26640 #define PWM5DCH2 PWM5DCHbits.PWM5DCH2 // bit 2
26641 #define PWM5DCH3 PWM5DCHbits.PWM5DCH3 // bit 3
26642 #define PWM5DCH4 PWM5DCHbits.PWM5DCH4 // bit 4
26643 #define PWM5DCH5 PWM5DCHbits.PWM5DCH5 // bit 5
26644 #define PWM5DCH6 PWM5DCHbits.PWM5DCH6 // bit 6
26645 #define PWM5DCH7 PWM5DCHbits.PWM5DCH7 // bit 7
26647 #define PWM5DCL0 PWM5DCLbits.PWM5DCL0 // bit 0
26648 #define PWM5DCL1 PWM5DCLbits.PWM5DCL1 // bit 1
26649 #define PWM5DCL2 PWM5DCLbits.PWM5DCL2 // bit 2
26650 #define PWM5DCL3 PWM5DCLbits.PWM5DCL3 // bit 3
26651 #define PWM5DCL4 PWM5DCLbits.PWM5DCL4 // bit 4
26652 #define PWM5DCL5 PWM5DCLbits.PWM5DCL5 // bit 5
26653 #define PWM5DCL6 PWM5DCLbits.PWM5DCL6 // bit 6
26654 #define PWM5DCL7 PWM5DCLbits.PWM5DCL7 // bit 7
26656 #define PRIE PWM5INTCONbits.PRIE // bit 0, shadows bit in PWM5INTCONbits
26657 #define PWM5PRIE PWM5INTCONbits.PWM5PRIE // bit 0, shadows bit in PWM5INTCONbits
26658 #define DCIE PWM5INTCONbits.DCIE // bit 1, shadows bit in PWM5INTCONbits
26659 #define PWM5DCIE PWM5INTCONbits.PWM5DCIE // bit 1, shadows bit in PWM5INTCONbits
26660 #define PHIE PWM5INTCONbits.PHIE // bit 2, shadows bit in PWM5INTCONbits
26661 #define PWM5PHIE PWM5INTCONbits.PWM5PHIE // bit 2, shadows bit in PWM5INTCONbits
26662 #define OFIE PWM5INTCONbits.OFIE // bit 3, shadows bit in PWM5INTCONbits
26663 #define PWM5OFIE PWM5INTCONbits.PWM5OFIE // bit 3, shadows bit in PWM5INTCONbits
26665 #define PRIF PWM5INTFbits.PRIF // bit 0, shadows bit in PWM5INTFbits
26666 #define PWM5PRIF PWM5INTFbits.PWM5PRIF // bit 0, shadows bit in PWM5INTFbits
26667 #define DCIF PWM5INTFbits.DCIF // bit 1, shadows bit in PWM5INTFbits
26668 #define PWM5DCIF PWM5INTFbits.PWM5DCIF // bit 1, shadows bit in PWM5INTFbits
26669 #define PHIF PWM5INTFbits.PHIF // bit 2, shadows bit in PWM5INTFbits
26670 #define PWM5PHIF PWM5INTFbits.PWM5PHIF // bit 2, shadows bit in PWM5INTFbits
26671 #define OFIF PWM5INTFbits.OFIF // bit 3, shadows bit in PWM5INTFbits
26672 #define PWM5OFIF PWM5INTFbits.PWM5OFIF // bit 3, shadows bit in PWM5INTFbits
26674 #define PWM5LDS0 PWM5LDCONbits.PWM5LDS0 // bit 0, shadows bit in PWM5LDCONbits
26675 #define LDS0 PWM5LDCONbits.LDS0 // bit 0, shadows bit in PWM5LDCONbits
26676 #define PWM5LDS1 PWM5LDCONbits.PWM5LDS1 // bit 1, shadows bit in PWM5LDCONbits
26677 #define LDS1 PWM5LDCONbits.LDS1 // bit 1, shadows bit in PWM5LDCONbits
26678 #define LDT PWM5LDCONbits.LDT // bit 6, shadows bit in PWM5LDCONbits
26679 #define PWM5LDM PWM5LDCONbits.PWM5LDM // bit 6, shadows bit in PWM5LDCONbits
26680 #define LDA PWM5LDCONbits.LDA // bit 7, shadows bit in PWM5LDCONbits
26681 #define PWM5LD PWM5LDCONbits.PWM5LD // bit 7, shadows bit in PWM5LDCONbits
26683 #define PWM5OFS0 PWM5OFCONbits.PWM5OFS0 // bit 0, shadows bit in PWM5OFCONbits
26684 #define OFS0 PWM5OFCONbits.OFS0 // bit 0, shadows bit in PWM5OFCONbits
26685 #define PWM5OFS1 PWM5OFCONbits.PWM5OFS1 // bit 1, shadows bit in PWM5OFCONbits
26686 #define OFS1 PWM5OFCONbits.OFS1 // bit 1, shadows bit in PWM5OFCONbits
26687 #define OFO PWM5OFCONbits.OFO // bit 4, shadows bit in PWM5OFCONbits
26688 #define PWM5OFMC PWM5OFCONbits.PWM5OFMC // bit 4, shadows bit in PWM5OFCONbits
26689 #define PWM5OFM0 PWM5OFCONbits.PWM5OFM0 // bit 5, shadows bit in PWM5OFCONbits
26690 #define OFM0 PWM5OFCONbits.OFM0 // bit 5, shadows bit in PWM5OFCONbits
26691 #define PWM5OFM1 PWM5OFCONbits.PWM5OFM1 // bit 6, shadows bit in PWM5OFCONbits
26692 #define OFM1 PWM5OFCONbits.OFM1 // bit 6, shadows bit in PWM5OFCONbits
26694 #define PWM5OFH0 PWM5OFHbits.PWM5OFH0 // bit 0
26695 #define PWM5OFH1 PWM5OFHbits.PWM5OFH1 // bit 1
26696 #define PWM5OFH2 PWM5OFHbits.PWM5OFH2 // bit 2
26697 #define PWM5OFH3 PWM5OFHbits.PWM5OFH3 // bit 3
26698 #define PWM5OFH4 PWM5OFHbits.PWM5OFH4 // bit 4
26699 #define PWM5OFH5 PWM5OFHbits.PWM5OFH5 // bit 5
26700 #define PWM5OFH6 PWM5OFHbits.PWM5OFH6 // bit 6
26701 #define PWM5OFH7 PWM5OFHbits.PWM5OFH7 // bit 7
26703 #define PWM5OFL0 PWM5OFLbits.PWM5OFL0 // bit 0
26704 #define PWM5OFL1 PWM5OFLbits.PWM5OFL1 // bit 1
26705 #define PWM5OFL2 PWM5OFLbits.PWM5OFL2 // bit 2
26706 #define PWM5OFL3 PWM5OFLbits.PWM5OFL3 // bit 3
26707 #define PWM5OFL4 PWM5OFLbits.PWM5OFL4 // bit 4
26708 #define PWM5OFL5 PWM5OFLbits.PWM5OFL5 // bit 5
26709 #define PWM5OFL6 PWM5OFLbits.PWM5OFL6 // bit 6
26710 #define PWM5OFL7 PWM5OFLbits.PWM5OFL7 // bit 7
26712 #define PWM5PHH0 PWM5PHHbits.PWM5PHH0 // bit 0
26713 #define PWM5PHH1 PWM5PHHbits.PWM5PHH1 // bit 1
26714 #define PWM5PHH2 PWM5PHHbits.PWM5PHH2 // bit 2
26715 #define PWM5PHH3 PWM5PHHbits.PWM5PHH3 // bit 3
26716 #define PWM5PHH4 PWM5PHHbits.PWM5PHH4 // bit 4
26717 #define PWM5PHH5 PWM5PHHbits.PWM5PHH5 // bit 5
26718 #define PWM5PHH6 PWM5PHHbits.PWM5PHH6 // bit 6
26719 #define PWM5PHH7 PWM5PHHbits.PWM5PHH7 // bit 7
26721 #define PWM5PHL0 PWM5PHLbits.PWM5PHL0 // bit 0
26722 #define PWM5PHL1 PWM5PHLbits.PWM5PHL1 // bit 1
26723 #define PWM5PHL2 PWM5PHLbits.PWM5PHL2 // bit 2
26724 #define PWM5PHL3 PWM5PHLbits.PWM5PHL3 // bit 3
26725 #define PWM5PHL4 PWM5PHLbits.PWM5PHL4 // bit 4
26726 #define PWM5PHL5 PWM5PHLbits.PWM5PHL5 // bit 5
26727 #define PWM5PHL6 PWM5PHLbits.PWM5PHL6 // bit 6
26728 #define PWM5PHL7 PWM5PHLbits.PWM5PHL7 // bit 7
26730 #define PWM5PRH0 PWM5PRHbits.PWM5PRH0 // bit 0
26731 #define PWM5PRH1 PWM5PRHbits.PWM5PRH1 // bit 1
26732 #define PWM5PRH2 PWM5PRHbits.PWM5PRH2 // bit 2
26733 #define PWM5PRH3 PWM5PRHbits.PWM5PRH3 // bit 3
26734 #define PWM5PRH4 PWM5PRHbits.PWM5PRH4 // bit 4
26735 #define PWM5PRH5 PWM5PRHbits.PWM5PRH5 // bit 5
26736 #define PWM5PRH6 PWM5PRHbits.PWM5PRH6 // bit 6
26737 #define PWM5PRH7 PWM5PRHbits.PWM5PRH7 // bit 7
26739 #define PWM5PRL0 PWM5PRLbits.PWM5PRL0 // bit 0
26740 #define PWM5PRL1 PWM5PRLbits.PWM5PRL1 // bit 1
26741 #define PWM5PRL2 PWM5PRLbits.PWM5PRL2 // bit 2
26742 #define PWM5PRL3 PWM5PRLbits.PWM5PRL3 // bit 3
26743 #define PWM5PRL4 PWM5PRLbits.PWM5PRL4 // bit 4
26744 #define PWM5PRL5 PWM5PRLbits.PWM5PRL5 // bit 5
26745 #define PWM5PRL6 PWM5PRLbits.PWM5PRL6 // bit 6
26746 #define PWM5PRL7 PWM5PRLbits.PWM5PRL7 // bit 7
26748 #define PWM5TMRH0 PWM5TMRHbits.PWM5TMRH0 // bit 0
26749 #define PWM5TMRH1 PWM5TMRHbits.PWM5TMRH1 // bit 1
26750 #define PWM5TMRH2 PWM5TMRHbits.PWM5TMRH2 // bit 2
26751 #define PWM5TMRH3 PWM5TMRHbits.PWM5TMRH3 // bit 3
26752 #define PWM5TMRH4 PWM5TMRHbits.PWM5TMRH4 // bit 4
26753 #define PWM5TMRH5 PWM5TMRHbits.PWM5TMRH5 // bit 5
26754 #define PWM5TMRH6 PWM5TMRHbits.PWM5TMRH6 // bit 6
26755 #define PWM5TMRH7 PWM5TMRHbits.PWM5TMRH7 // bit 7
26757 #define PWM5TMRL0 PWM5TMRLbits.PWM5TMRL0 // bit 0
26758 #define PWM5TMRL1 PWM5TMRLbits.PWM5TMRL1 // bit 1
26759 #define PWM5TMRL2 PWM5TMRLbits.PWM5TMRL2 // bit 2
26760 #define PWM5TMRL3 PWM5TMRLbits.PWM5TMRL3 // bit 3
26761 #define PWM5TMRL4 PWM5TMRLbits.PWM5TMRL4 // bit 4
26762 #define PWM5TMRL5 PWM5TMRLbits.PWM5TMRL5 // bit 5
26763 #define PWM5TMRL6 PWM5TMRLbits.PWM5TMRL6 // bit 6
26764 #define PWM5TMRL7 PWM5TMRLbits.PWM5TMRL7 // bit 7
26766 #define PWM6DCH0 PWM6DCHbits.PWM6DCH0 // bit 0
26767 #define PWM6DCH1 PWM6DCHbits.PWM6DCH1 // bit 1
26768 #define PWM6DCH2 PWM6DCHbits.PWM6DCH2 // bit 2
26769 #define PWM6DCH3 PWM6DCHbits.PWM6DCH3 // bit 3
26770 #define PWM6DCH4 PWM6DCHbits.PWM6DCH4 // bit 4
26771 #define PWM6DCH5 PWM6DCHbits.PWM6DCH5 // bit 5
26772 #define PWM6DCH6 PWM6DCHbits.PWM6DCH6 // bit 6
26773 #define PWM6DCH7 PWM6DCHbits.PWM6DCH7 // bit 7
26775 #define PWM6DCL0 PWM6DCLbits.PWM6DCL0 // bit 0
26776 #define PWM6DCL1 PWM6DCLbits.PWM6DCL1 // bit 1
26777 #define PWM6DCL2 PWM6DCLbits.PWM6DCL2 // bit 2
26778 #define PWM6DCL3 PWM6DCLbits.PWM6DCL3 // bit 3
26779 #define PWM6DCL4 PWM6DCLbits.PWM6DCL4 // bit 4
26780 #define PWM6DCL5 PWM6DCLbits.PWM6DCL5 // bit 5
26781 #define PWM6DCL6 PWM6DCLbits.PWM6DCL6 // bit 6
26782 #define PWM6DCL7 PWM6DCLbits.PWM6DCL7 // bit 7
26784 #define PWM6OFH0 PWM6OFHbits.PWM6OFH0 // bit 0
26785 #define PWM6OFH1 PWM6OFHbits.PWM6OFH1 // bit 1
26786 #define PWM6OFH2 PWM6OFHbits.PWM6OFH2 // bit 2
26787 #define PWM6OFH3 PWM6OFHbits.PWM6OFH3 // bit 3
26788 #define PWM6OFH4 PWM6OFHbits.PWM6OFH4 // bit 4
26789 #define PWM6OFH5 PWM6OFHbits.PWM6OFH5 // bit 5
26790 #define PWM6OFH6 PWM6OFHbits.PWM6OFH6 // bit 6
26791 #define PWM6OFH7 PWM6OFHbits.PWM6OFH7 // bit 7
26793 #define PWM6OFL0 PWM6OFLbits.PWM6OFL0 // bit 0
26794 #define PWM6OFL1 PWM6OFLbits.PWM6OFL1 // bit 1
26795 #define PWM6OFL2 PWM6OFLbits.PWM6OFL2 // bit 2
26796 #define PWM6OFL3 PWM6OFLbits.PWM6OFL3 // bit 3
26797 #define PWM6OFL4 PWM6OFLbits.PWM6OFL4 // bit 4
26798 #define PWM6OFL5 PWM6OFLbits.PWM6OFL5 // bit 5
26799 #define PWM6OFL6 PWM6OFLbits.PWM6OFL6 // bit 6
26800 #define PWM6OFL7 PWM6OFLbits.PWM6OFL7 // bit 7
26802 #define PWM6PHH0 PWM6PHHbits.PWM6PHH0 // bit 0
26803 #define PWM6PHH1 PWM6PHHbits.PWM6PHH1 // bit 1
26804 #define PWM6PHH2 PWM6PHHbits.PWM6PHH2 // bit 2
26805 #define PWM6PHH3 PWM6PHHbits.PWM6PHH3 // bit 3
26806 #define PWM6PHH4 PWM6PHHbits.PWM6PHH4 // bit 4
26807 #define PWM6PHH5 PWM6PHHbits.PWM6PHH5 // bit 5
26808 #define PWM6PHH6 PWM6PHHbits.PWM6PHH6 // bit 6
26809 #define PWM6PHH7 PWM6PHHbits.PWM6PHH7 // bit 7
26811 #define PWM6PHL0 PWM6PHLbits.PWM6PHL0 // bit 0
26812 #define PWM6PHL1 PWM6PHLbits.PWM6PHL1 // bit 1
26813 #define PWM6PHL2 PWM6PHLbits.PWM6PHL2 // bit 2
26814 #define PWM6PHL3 PWM6PHLbits.PWM6PHL3 // bit 3
26815 #define PWM6PHL4 PWM6PHLbits.PWM6PHL4 // bit 4
26816 #define PWM6PHL5 PWM6PHLbits.PWM6PHL5 // bit 5
26817 #define PWM6PHL6 PWM6PHLbits.PWM6PHL6 // bit 6
26818 #define PWM6PHL7 PWM6PHLbits.PWM6PHL7 // bit 7
26820 #define PWM6PRH0 PWM6PRHbits.PWM6PRH0 // bit 0
26821 #define PWM6PRH1 PWM6PRHbits.PWM6PRH1 // bit 1
26822 #define PWM6PRH2 PWM6PRHbits.PWM6PRH2 // bit 2
26823 #define PWM6PRH3 PWM6PRHbits.PWM6PRH3 // bit 3
26824 #define PWM6PRH4 PWM6PRHbits.PWM6PRH4 // bit 4
26825 #define PWM6PRH5 PWM6PRHbits.PWM6PRH5 // bit 5
26826 #define PWM6PRH6 PWM6PRHbits.PWM6PRH6 // bit 6
26827 #define PWM6PRH7 PWM6PRHbits.PWM6PRH7 // bit 7
26829 #define PWM6PRL0 PWM6PRLbits.PWM6PRL0 // bit 0
26830 #define PWM6PRL1 PWM6PRLbits.PWM6PRL1 // bit 1
26831 #define PWM6PRL2 PWM6PRLbits.PWM6PRL2 // bit 2
26832 #define PWM6PRL3 PWM6PRLbits.PWM6PRL3 // bit 3
26833 #define PWM6PRL4 PWM6PRLbits.PWM6PRL4 // bit 4
26834 #define PWM6PRL5 PWM6PRLbits.PWM6PRL5 // bit 5
26835 #define PWM6PRL6 PWM6PRLbits.PWM6PRL6 // bit 6
26836 #define PWM6PRL7 PWM6PRLbits.PWM6PRL7 // bit 7
26838 #define PWM6TMRH0 PWM6TMRHbits.PWM6TMRH0 // bit 0
26839 #define PWM6TMRH1 PWM6TMRHbits.PWM6TMRH1 // bit 1
26840 #define PWM6TMRH2 PWM6TMRHbits.PWM6TMRH2 // bit 2
26841 #define PWM6TMRH3 PWM6TMRHbits.PWM6TMRH3 // bit 3
26842 #define PWM6TMRH4 PWM6TMRHbits.PWM6TMRH4 // bit 4
26843 #define PWM6TMRH5 PWM6TMRHbits.PWM6TMRH5 // bit 5
26844 #define PWM6TMRH6 PWM6TMRHbits.PWM6TMRH6 // bit 6
26845 #define PWM6TMRH7 PWM6TMRHbits.PWM6TMRH7 // bit 7
26847 #define PWM6TMRL0 PWM6TMRLbits.PWM6TMRL0 // bit 0
26848 #define PWM6TMRL1 PWM6TMRLbits.PWM6TMRL1 // bit 1
26849 #define PWM6TMRL2 PWM6TMRLbits.PWM6TMRL2 // bit 2
26850 #define PWM6TMRL3 PWM6TMRLbits.PWM6TMRL3 // bit 3
26851 #define PWM6TMRL4 PWM6TMRLbits.PWM6TMRL4 // bit 4
26852 #define PWM6TMRL5 PWM6TMRLbits.PWM6TMRL5 // bit 5
26853 #define PWM6TMRL6 PWM6TMRLbits.PWM6TMRL6 // bit 6
26854 #define PWM6TMRL7 PWM6TMRLbits.PWM6TMRL7 // bit 7
26856 #define PWM11DCH0 PWM11DCHbits.PWM11DCH0 // bit 0
26857 #define PWM11DCH1 PWM11DCHbits.PWM11DCH1 // bit 1
26858 #define PWM11DCH2 PWM11DCHbits.PWM11DCH2 // bit 2
26859 #define PWM11DCH3 PWM11DCHbits.PWM11DCH3 // bit 3
26860 #define PWM11DCH4 PWM11DCHbits.PWM11DCH4 // bit 4
26861 #define PWM11DCH5 PWM11DCHbits.PWM11DCH5 // bit 5
26862 #define PWM11DCH6 PWM11DCHbits.PWM11DCH6 // bit 6
26863 #define PWM11DCH7 PWM11DCHbits.PWM11DCH7 // bit 7
26865 #define PWM11DCL0 PWM11DCLbits.PWM11DCL0 // bit 0
26866 #define PWM11DCL1 PWM11DCLbits.PWM11DCL1 // bit 1
26867 #define PWM11DCL2 PWM11DCLbits.PWM11DCL2 // bit 2
26868 #define PWM11DCL3 PWM11DCLbits.PWM11DCL3 // bit 3
26869 #define PWM11DCL4 PWM11DCLbits.PWM11DCL4 // bit 4
26870 #define PWM11DCL5 PWM11DCLbits.PWM11DCL5 // bit 5
26871 #define PWM11DCL6 PWM11DCLbits.PWM11DCL6 // bit 6
26872 #define PWM11DCL7 PWM11DCLbits.PWM11DCL7 // bit 7
26874 #define PWM11OFH0 PWM11OFHbits.PWM11OFH0 // bit 0
26875 #define PWM11OFH1 PWM11OFHbits.PWM11OFH1 // bit 1
26876 #define PWM11OFH2 PWM11OFHbits.PWM11OFH2 // bit 2
26877 #define PWM11OFH3 PWM11OFHbits.PWM11OFH3 // bit 3
26878 #define PWM11OFH4 PWM11OFHbits.PWM11OFH4 // bit 4
26879 #define PWM11OFH5 PWM11OFHbits.PWM11OFH5 // bit 5
26880 #define PWM11OFH6 PWM11OFHbits.PWM11OFH6 // bit 6
26881 #define PWM11OFH7 PWM11OFHbits.PWM11OFH7 // bit 7
26883 #define PWM11OFL0 PWM11OFLbits.PWM11OFL0 // bit 0
26884 #define PWM11OFL1 PWM11OFLbits.PWM11OFL1 // bit 1
26885 #define PWM11OFL2 PWM11OFLbits.PWM11OFL2 // bit 2
26886 #define PWM11OFL3 PWM11OFLbits.PWM11OFL3 // bit 3
26887 #define PWM11OFL4 PWM11OFLbits.PWM11OFL4 // bit 4
26888 #define PWM11OFL5 PWM11OFLbits.PWM11OFL5 // bit 5
26889 #define PWM11OFL6 PWM11OFLbits.PWM11OFL6 // bit 6
26890 #define PWM11OFL7 PWM11OFLbits.PWM11OFL7 // bit 7
26892 #define PWM11PHH0 PWM11PHHbits.PWM11PHH0 // bit 0
26893 #define PWM11PHH1 PWM11PHHbits.PWM11PHH1 // bit 1
26894 #define PWM11PHH2 PWM11PHHbits.PWM11PHH2 // bit 2
26895 #define PWM11PHH3 PWM11PHHbits.PWM11PHH3 // bit 3
26896 #define PWM11PHH4 PWM11PHHbits.PWM11PHH4 // bit 4
26897 #define PWM11PHH5 PWM11PHHbits.PWM11PHH5 // bit 5
26898 #define PWM11PHH6 PWM11PHHbits.PWM11PHH6 // bit 6
26899 #define PWM11PHH7 PWM11PHHbits.PWM11PHH7 // bit 7
26901 #define PWM11PHL0 PWM11PHLbits.PWM11PHL0 // bit 0
26902 #define PWM11PHL1 PWM11PHLbits.PWM11PHL1 // bit 1
26903 #define PWM11PHL2 PWM11PHLbits.PWM11PHL2 // bit 2
26904 #define PWM11PHL3 PWM11PHLbits.PWM11PHL3 // bit 3
26905 #define PWM11PHL4 PWM11PHLbits.PWM11PHL4 // bit 4
26906 #define PWM11PHL5 PWM11PHLbits.PWM11PHL5 // bit 5
26907 #define PWM11PHL6 PWM11PHLbits.PWM11PHL6 // bit 6
26908 #define PWM11PHL7 PWM11PHLbits.PWM11PHL7 // bit 7
26910 #define PWM11PRH0 PWM11PRHbits.PWM11PRH0 // bit 0
26911 #define PWM11PRH1 PWM11PRHbits.PWM11PRH1 // bit 1
26912 #define PWM11PRH2 PWM11PRHbits.PWM11PRH2 // bit 2
26913 #define PWM11PRH3 PWM11PRHbits.PWM11PRH3 // bit 3
26914 #define PWM11PRH4 PWM11PRHbits.PWM11PRH4 // bit 4
26915 #define PWM11PRH5 PWM11PRHbits.PWM11PRH5 // bit 5
26916 #define PWM11PRH6 PWM11PRHbits.PWM11PRH6 // bit 6
26917 #define PWM11PRH7 PWM11PRHbits.PWM11PRH7 // bit 7
26919 #define PWM11PRL0 PWM11PRLbits.PWM11PRL0 // bit 0
26920 #define PWM11PRL1 PWM11PRLbits.PWM11PRL1 // bit 1
26921 #define PWM11PRL2 PWM11PRLbits.PWM11PRL2 // bit 2
26922 #define PWM11PRL3 PWM11PRLbits.PWM11PRL3 // bit 3
26923 #define PWM11PRL4 PWM11PRLbits.PWM11PRL4 // bit 4
26924 #define PWM11PRL5 PWM11PRLbits.PWM11PRL5 // bit 5
26925 #define PWM11PRL6 PWM11PRLbits.PWM11PRL6 // bit 6
26926 #define PWM11PRL7 PWM11PRLbits.PWM11PRL7 // bit 7
26928 #define PWM11TMRH0 PWM11TMRHbits.PWM11TMRH0 // bit 0
26929 #define PWM11TMRH1 PWM11TMRHbits.PWM11TMRH1 // bit 1
26930 #define PWM11TMRH2 PWM11TMRHbits.PWM11TMRH2 // bit 2
26931 #define PWM11TMRH3 PWM11TMRHbits.PWM11TMRH3 // bit 3
26932 #define PWM11TMRH4 PWM11TMRHbits.PWM11TMRH4 // bit 4
26933 #define PWM11TMRH5 PWM11TMRHbits.PWM11TMRH5 // bit 5
26934 #define PWM11TMRH6 PWM11TMRHbits.PWM11TMRH6 // bit 6
26935 #define PWM11TMRH7 PWM11TMRHbits.PWM11TMRH7 // bit 7
26937 #define PWM11TMRL0 PWM11TMRLbits.PWM11TMRL0 // bit 0
26938 #define PWM11TMRL1 PWM11TMRLbits.PWM11TMRL1 // bit 1
26939 #define PWM11TMRL2 PWM11TMRLbits.PWM11TMRL2 // bit 2
26940 #define PWM11TMRL3 PWM11TMRLbits.PWM11TMRL3 // bit 3
26941 #define PWM11TMRL4 PWM11TMRLbits.PWM11TMRL4 // bit 4
26942 #define PWM11TMRL5 PWM11TMRLbits.PWM11TMRL5 // bit 5
26943 #define PWM11TMRL6 PWM11TMRLbits.PWM11TMRL6 // bit 6
26944 #define PWM11TMRL7 PWM11TMRLbits.PWM11TMRL7 // bit 7
26946 #define PWM12DCH0 PWM12DCHbits.PWM12DCH0 // bit 0
26947 #define PWM12DCH1 PWM12DCHbits.PWM12DCH1 // bit 1
26948 #define PWM12DCH2 PWM12DCHbits.PWM12DCH2 // bit 2
26949 #define PWM12DCH3 PWM12DCHbits.PWM12DCH3 // bit 3
26950 #define PWM12DCH4 PWM12DCHbits.PWM12DCH4 // bit 4
26951 #define PWM12DCH5 PWM12DCHbits.PWM12DCH5 // bit 5
26952 #define PWM12DCH6 PWM12DCHbits.PWM12DCH6 // bit 6
26953 #define PWM12DCH7 PWM12DCHbits.PWM12DCH7 // bit 7
26955 #define PWM12DCL0 PWM12DCLbits.PWM12DCL0 // bit 0
26956 #define PWM12DCL1 PWM12DCLbits.PWM12DCL1 // bit 1
26957 #define PWM12DCL2 PWM12DCLbits.PWM12DCL2 // bit 2
26958 #define PWM12DCL3 PWM12DCLbits.PWM12DCL3 // bit 3
26959 #define PWM12DCL4 PWM12DCLbits.PWM12DCL4 // bit 4
26960 #define PWM12DCL5 PWM12DCLbits.PWM12DCL5 // bit 5
26961 #define PWM12DCL6 PWM12DCLbits.PWM12DCL6 // bit 6
26962 #define PWM12DCL7 PWM12DCLbits.PWM12DCL7 // bit 7
26964 #define PWM12OFH0 PWM12OFHbits.PWM12OFH0 // bit 0
26965 #define PWM12OFH1 PWM12OFHbits.PWM12OFH1 // bit 1
26966 #define PWM12OFH2 PWM12OFHbits.PWM12OFH2 // bit 2
26967 #define PWM12OFH3 PWM12OFHbits.PWM12OFH3 // bit 3
26968 #define PWM12OFH4 PWM12OFHbits.PWM12OFH4 // bit 4
26969 #define PWM12OFH5 PWM12OFHbits.PWM12OFH5 // bit 5
26970 #define PWM12OFH6 PWM12OFHbits.PWM12OFH6 // bit 6
26971 #define PWM12OFH7 PWM12OFHbits.PWM12OFH7 // bit 7
26973 #define PWM12OFL0 PWM12OFLbits.PWM12OFL0 // bit 0
26974 #define PWM12OFL1 PWM12OFLbits.PWM12OFL1 // bit 1
26975 #define PWM12OFL2 PWM12OFLbits.PWM12OFL2 // bit 2
26976 #define PWM12OFL3 PWM12OFLbits.PWM12OFL3 // bit 3
26977 #define PWM12OFL4 PWM12OFLbits.PWM12OFL4 // bit 4
26978 #define PWM12OFL5 PWM12OFLbits.PWM12OFL5 // bit 5
26979 #define PWM12OFL6 PWM12OFLbits.PWM12OFL6 // bit 6
26980 #define PWM12OFL7 PWM12OFLbits.PWM12OFL7 // bit 7
26982 #define PWM12PHH0 PWM12PHHbits.PWM12PHH0 // bit 0
26983 #define PWM12PHH1 PWM12PHHbits.PWM12PHH1 // bit 1
26984 #define PWM12PHH2 PWM12PHHbits.PWM12PHH2 // bit 2
26985 #define PWM12PHH3 PWM12PHHbits.PWM12PHH3 // bit 3
26986 #define PWM12PHH4 PWM12PHHbits.PWM12PHH4 // bit 4
26987 #define PWM12PHH5 PWM12PHHbits.PWM12PHH5 // bit 5
26988 #define PWM12PHH6 PWM12PHHbits.PWM12PHH6 // bit 6
26989 #define PWM12PHH7 PWM12PHHbits.PWM12PHH7 // bit 7
26991 #define PWM12PHL0 PWM12PHLbits.PWM12PHL0 // bit 0
26992 #define PWM12PHL1 PWM12PHLbits.PWM12PHL1 // bit 1
26993 #define PWM12PHL2 PWM12PHLbits.PWM12PHL2 // bit 2
26994 #define PWM12PHL3 PWM12PHLbits.PWM12PHL3 // bit 3
26995 #define PWM12PHL4 PWM12PHLbits.PWM12PHL4 // bit 4
26996 #define PWM12PHL5 PWM12PHLbits.PWM12PHL5 // bit 5
26997 #define PWM12PHL6 PWM12PHLbits.PWM12PHL6 // bit 6
26998 #define PWM12PHL7 PWM12PHLbits.PWM12PHL7 // bit 7
27000 #define PWM12PRH0 PWM12PRHbits.PWM12PRH0 // bit 0
27001 #define PWM12PRH1 PWM12PRHbits.PWM12PRH1 // bit 1
27002 #define PWM12PRH2 PWM12PRHbits.PWM12PRH2 // bit 2
27003 #define PWM12PRH3 PWM12PRHbits.PWM12PRH3 // bit 3
27004 #define PWM12PRH4 PWM12PRHbits.PWM12PRH4 // bit 4
27005 #define PWM12PRH5 PWM12PRHbits.PWM12PRH5 // bit 5
27006 #define PWM12PRH6 PWM12PRHbits.PWM12PRH6 // bit 6
27007 #define PWM12PRH7 PWM12PRHbits.PWM12PRH7 // bit 7
27009 #define PWM12PRL0 PWM12PRLbits.PWM12PRL0 // bit 0
27010 #define PWM12PRL1 PWM12PRLbits.PWM12PRL1 // bit 1
27011 #define PWM12PRL2 PWM12PRLbits.PWM12PRL2 // bit 2
27012 #define PWM12PRL3 PWM12PRLbits.PWM12PRL3 // bit 3
27013 #define PWM12PRL4 PWM12PRLbits.PWM12PRL4 // bit 4
27014 #define PWM12PRL5 PWM12PRLbits.PWM12PRL5 // bit 5
27015 #define PWM12PRL6 PWM12PRLbits.PWM12PRL6 // bit 6
27016 #define PWM12PRL7 PWM12PRLbits.PWM12PRL7 // bit 7
27018 #define PWM12TMRH0 PWM12TMRHbits.PWM12TMRH0 // bit 0
27019 #define PWM12TMRH1 PWM12TMRHbits.PWM12TMRH1 // bit 1
27020 #define PWM12TMRH2 PWM12TMRHbits.PWM12TMRH2 // bit 2
27021 #define PWM12TMRH3 PWM12TMRHbits.PWM12TMRH3 // bit 3
27022 #define PWM12TMRH4 PWM12TMRHbits.PWM12TMRH4 // bit 4
27023 #define PWM12TMRH5 PWM12TMRHbits.PWM12TMRH5 // bit 5
27024 #define PWM12TMRH6 PWM12TMRHbits.PWM12TMRH6 // bit 6
27025 #define PWM12TMRH7 PWM12TMRHbits.PWM12TMRH7 // bit 7
27027 #define PWM12TMRL0 PWM12TMRLbits.PWM12TMRL0 // bit 0
27028 #define PWM12TMRL1 PWM12TMRLbits.PWM12TMRL1 // bit 1
27029 #define PWM12TMRL2 PWM12TMRLbits.PWM12TMRL2 // bit 2
27030 #define PWM12TMRL3 PWM12TMRLbits.PWM12TMRL3 // bit 3
27031 #define PWM12TMRL4 PWM12TMRLbits.PWM12TMRL4 // bit 4
27032 #define PWM12TMRL5 PWM12TMRLbits.PWM12TMRL5 // bit 5
27033 #define PWM12TMRL6 PWM12TMRLbits.PWM12TMRL6 // bit 6
27034 #define PWM12TMRL7 PWM12TMRLbits.PWM12TMRL7 // bit 7
27036 #define MPWM5EN PWMENbits.MPWM5EN // bit 0
27037 #define MPWM6EN PWMENbits.MPWM6EN // bit 1
27038 #define MPWM11EN PWMENbits.MPWM11EN // bit 2
27039 #define MPWM12EN PWMENbits.MPWM12EN // bit 3
27041 #define MPWM5LD PWMLDbits.MPWM5LD // bit 0
27042 #define MPWM6LD PWMLDbits.MPWM6LD // bit 1
27043 #define MPWM11LD PWMLDbits.MPWM11LD // bit 2
27044 #define MPWM12LD PWMLDbits.MPWM12LD // bit 3
27046 #define MPWM5OUT PWMOUTbits.MPWM5OUT // bit 0
27047 #define MPWM6OUT PWMOUTbits.MPWM6OUT // bit 1
27048 #define MPWM11OUT PWMOUTbits.MPWM11OUT // bit 2
27049 #define MPWM12OUT PWMOUTbits.MPWM12OUT // bit 3
27051 #define RX9D RC1STAbits.RX9D // bit 0
27052 #define OERR RC1STAbits.OERR // bit 1
27053 #define FERR RC1STAbits.FERR // bit 2
27054 #define ADDEN RC1STAbits.ADDEN // bit 3
27055 #define CREN RC1STAbits.CREN // bit 4
27056 #define SREN RC1STAbits.SREN // bit 5
27057 #define RX9 RC1STAbits.RX9 // bit 6
27058 #define SPEN RC1STAbits.SPEN // bit 7
27060 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
27061 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
27062 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
27063 #define SLRA3 SLRCONAbits.SLRA3 // bit 3
27064 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
27065 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
27066 #define SLRA6 SLRCONAbits.SLRA6 // bit 6
27067 #define SLRA7 SLRCONAbits.SLRA7 // bit 7
27069 #define SLRB0 SLRCONBbits.SLRB0 // bit 0
27070 #define SLRB1 SLRCONBbits.SLRB1 // bit 1
27071 #define SLRB2 SLRCONBbits.SLRB2 // bit 2
27072 #define SLRB3 SLRCONBbits.SLRB3 // bit 3
27073 #define SLRB4 SLRCONBbits.SLRB4 // bit 4
27074 #define SLRB5 SLRCONBbits.SLRB5 // bit 5
27075 #define SLRB6 SLRCONBbits.SLRB6 // bit 6
27076 #define SLRB7 SLRCONBbits.SLRB7 // bit 7
27078 #define SLRC0 SLRCONCbits.SLRC0 // bit 0
27079 #define SLRC1 SLRCONCbits.SLRC1 // bit 1
27080 #define SLRC2 SLRCONCbits.SLRC2 // bit 2
27081 #define SLRC3 SLRCONCbits.SLRC3 // bit 3
27082 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
27083 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
27084 #define SLRC6 SLRCONCbits.SLRC6 // bit 6
27085 #define SLRC7 SLRCONCbits.SLRC7 // bit 7
27087 #define SLRD0 SLRCONDbits.SLRD0 // bit 0
27088 #define SLRD1 SLRCONDbits.SLRD1 // bit 1
27089 #define SLRD2 SLRCONDbits.SLRD2 // bit 2
27090 #define SLRD3 SLRCONDbits.SLRD3 // bit 3
27091 #define SLRD4 SLRCONDbits.SLRD4 // bit 4
27092 #define SLRD5 SLRCONDbits.SLRD5 // bit 5
27093 #define SLRD6 SLRCONDbits.SLRD6 // bit 6
27094 #define SLRD7 SLRCONDbits.SLRD7 // bit 7
27096 #define SLRE0 SLRCONEbits.SLRE0 // bit 0
27097 #define SLRE1 SLRCONEbits.SLRE1 // bit 1
27098 #define SLRE2 SLRCONEbits.SLRE2 // bit 2
27100 #define SSP1ADD0 SSP1ADDbits.SSP1ADD0 // bit 0, shadows bit in SSP1ADDbits
27101 #define ADD0 SSP1ADDbits.ADD0 // bit 0, shadows bit in SSP1ADDbits
27102 #define SSP1ADD1 SSP1ADDbits.SSP1ADD1 // bit 1, shadows bit in SSP1ADDbits
27103 #define ADD1 SSP1ADDbits.ADD1 // bit 1, shadows bit in SSP1ADDbits
27104 #define SSP1ADD2 SSP1ADDbits.SSP1ADD2 // bit 2, shadows bit in SSP1ADDbits
27105 #define ADD2 SSP1ADDbits.ADD2 // bit 2, shadows bit in SSP1ADDbits
27106 #define SSP1ADD3 SSP1ADDbits.SSP1ADD3 // bit 3, shadows bit in SSP1ADDbits
27107 #define ADD3 SSP1ADDbits.ADD3 // bit 3, shadows bit in SSP1ADDbits
27108 #define SSP1ADD4 SSP1ADDbits.SSP1ADD4 // bit 4, shadows bit in SSP1ADDbits
27109 #define ADD4 SSP1ADDbits.ADD4 // bit 4, shadows bit in SSP1ADDbits
27110 #define SSP1ADD5 SSP1ADDbits.SSP1ADD5 // bit 5, shadows bit in SSP1ADDbits
27111 #define ADD5 SSP1ADDbits.ADD5 // bit 5, shadows bit in SSP1ADDbits
27112 #define SSP1ADD6 SSP1ADDbits.SSP1ADD6 // bit 6, shadows bit in SSP1ADDbits
27113 #define ADD6 SSP1ADDbits.ADD6 // bit 6, shadows bit in SSP1ADDbits
27114 #define SSP1ADD7 SSP1ADDbits.SSP1ADD7 // bit 7, shadows bit in SSP1ADDbits
27115 #define ADD7 SSP1ADDbits.ADD7 // bit 7, shadows bit in SSP1ADDbits
27117 #define SSP1BUF0 SSP1BUFbits.SSP1BUF0 // bit 0, shadows bit in SSP1BUFbits
27118 #define BUF0 SSP1BUFbits.BUF0 // bit 0, shadows bit in SSP1BUFbits
27119 #define SSP1BUF1 SSP1BUFbits.SSP1BUF1 // bit 1, shadows bit in SSP1BUFbits
27120 #define BUF1 SSP1BUFbits.BUF1 // bit 1, shadows bit in SSP1BUFbits
27121 #define SSP1BUF2 SSP1BUFbits.SSP1BUF2 // bit 2, shadows bit in SSP1BUFbits
27122 #define BUF2 SSP1BUFbits.BUF2 // bit 2, shadows bit in SSP1BUFbits
27123 #define SSP1BUF3 SSP1BUFbits.SSP1BUF3 // bit 3, shadows bit in SSP1BUFbits
27124 #define BUF3 SSP1BUFbits.BUF3 // bit 3, shadows bit in SSP1BUFbits
27125 #define SSP1BUF4 SSP1BUFbits.SSP1BUF4 // bit 4, shadows bit in SSP1BUFbits
27126 #define BUF4 SSP1BUFbits.BUF4 // bit 4, shadows bit in SSP1BUFbits
27127 #define SSP1BUF5 SSP1BUFbits.SSP1BUF5 // bit 5, shadows bit in SSP1BUFbits
27128 #define BUF5 SSP1BUFbits.BUF5 // bit 5, shadows bit in SSP1BUFbits
27129 #define SSP1BUF6 SSP1BUFbits.SSP1BUF6 // bit 6, shadows bit in SSP1BUFbits
27130 #define BUF6 SSP1BUFbits.BUF6 // bit 6, shadows bit in SSP1BUFbits
27131 #define SSP1BUF7 SSP1BUFbits.SSP1BUF7 // bit 7, shadows bit in SSP1BUFbits
27132 #define BUF7 SSP1BUFbits.BUF7 // bit 7, shadows bit in SSP1BUFbits
27134 #define SSPM0 SSP1CONbits.SSPM0 // bit 0
27135 #define SSPM1 SSP1CONbits.SSPM1 // bit 1
27136 #define SSPM2 SSP1CONbits.SSPM2 // bit 2
27137 #define SSPM3 SSP1CONbits.SSPM3 // bit 3
27138 #define CKP SSP1CONbits.CKP // bit 4
27139 #define SSPEN SSP1CONbits.SSPEN // bit 5
27140 #define SSPOV SSP1CONbits.SSPOV // bit 6
27141 #define WCOL SSP1CONbits.WCOL // bit 7
27143 #define SEN SSP1CON2bits.SEN // bit 0
27144 #define RSEN SSP1CON2bits.RSEN // bit 1
27145 #define PEN SSP1CON2bits.PEN // bit 2
27146 #define RCEN SSP1CON2bits.RCEN // bit 3
27147 #define ACKEN SSP1CON2bits.ACKEN // bit 4
27148 #define ACKDT SSP1CON2bits.ACKDT // bit 5
27149 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
27150 #define GCEN SSP1CON2bits.GCEN // bit 7
27152 #define DHEN SSP1CON3bits.DHEN // bit 0
27153 #define AHEN SSP1CON3bits.AHEN // bit 1
27154 #define SBCDE SSP1CON3bits.SBCDE // bit 2
27155 #define SDAHT SSP1CON3bits.SDAHT // bit 3
27156 #define BOEN SSP1CON3bits.BOEN // bit 4
27157 #define SCIE SSP1CON3bits.SCIE // bit 5
27158 #define PCIE SSP1CON3bits.PCIE // bit 6
27159 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
27161 #define SSP1MSK0 SSP1MSKbits.SSP1MSK0 // bit 0, shadows bit in SSP1MSKbits
27162 #define MSK0 SSP1MSKbits.MSK0 // bit 0, shadows bit in SSP1MSKbits
27163 #define SSP1MSK1 SSP1MSKbits.SSP1MSK1 // bit 1, shadows bit in SSP1MSKbits
27164 #define MSK1 SSP1MSKbits.MSK1 // bit 1, shadows bit in SSP1MSKbits
27165 #define SSP1MSK2 SSP1MSKbits.SSP1MSK2 // bit 2, shadows bit in SSP1MSKbits
27166 #define MSK2 SSP1MSKbits.MSK2 // bit 2, shadows bit in SSP1MSKbits
27167 #define SSP1MSK3 SSP1MSKbits.SSP1MSK3 // bit 3, shadows bit in SSP1MSKbits
27168 #define MSK3 SSP1MSKbits.MSK3 // bit 3, shadows bit in SSP1MSKbits
27169 #define SSP1MSK4 SSP1MSKbits.SSP1MSK4 // bit 4, shadows bit in SSP1MSKbits
27170 #define MSK4 SSP1MSKbits.MSK4 // bit 4, shadows bit in SSP1MSKbits
27171 #define SSP1MSK5 SSP1MSKbits.SSP1MSK5 // bit 5, shadows bit in SSP1MSKbits
27172 #define MSK5 SSP1MSKbits.MSK5 // bit 5, shadows bit in SSP1MSKbits
27173 #define SSP1MSK6 SSP1MSKbits.SSP1MSK6 // bit 6, shadows bit in SSP1MSKbits
27174 #define MSK6 SSP1MSKbits.MSK6 // bit 6, shadows bit in SSP1MSKbits
27175 #define SSP1MSK7 SSP1MSKbits.SSP1MSK7 // bit 7, shadows bit in SSP1MSKbits
27176 #define MSK7 SSP1MSKbits.MSK7 // bit 7, shadows bit in SSP1MSKbits
27178 #define BF SSP1STATbits.BF // bit 0
27179 #define UA SSP1STATbits.UA // bit 1
27180 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
27181 #define S SSP1STATbits.S // bit 3
27182 #define P SSP1STATbits.P // bit 4
27183 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
27184 #define CKE SSP1STATbits.CKE // bit 6
27185 #define SMP SSP1STATbits.SMP // bit 7
27187 #define C STATUSbits.C // bit 0
27188 #define DC STATUSbits.DC // bit 1
27189 #define Z STATUSbits.Z // bit 2
27190 #define NOT_PD STATUSbits.NOT_PD // bit 3
27191 #define NOT_TO STATUSbits.NOT_TO // bit 4
27193 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
27194 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
27195 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
27197 #define GSS0 T1GCONbits.GSS0 // bit 0, shadows bit in T1GCONbits
27198 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0, shadows bit in T1GCONbits
27199 #define GSS1 T1GCONbits.GSS1 // bit 1, shadows bit in T1GCONbits
27200 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1, shadows bit in T1GCONbits
27201 #define GVAL T1GCONbits.GVAL // bit 2, shadows bit in T1GCONbits
27202 #define T1GVAL T1GCONbits.T1GVAL // bit 2, shadows bit in T1GCONbits
27203 #define GGO_NOT_DONE T1GCONbits.GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
27204 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
27205 #define GSPM T1GCONbits.GSPM // bit 4, shadows bit in T1GCONbits
27206 #define T1GSPM T1GCONbits.T1GSPM // bit 4, shadows bit in T1GCONbits
27207 #define GTM T1GCONbits.GTM // bit 5, shadows bit in T1GCONbits
27208 #define T1GTM T1GCONbits.T1GTM // bit 5, shadows bit in T1GCONbits
27209 #define GPOL T1GCONbits.GPOL // bit 6, shadows bit in T1GCONbits
27210 #define T1GPOL T1GCONbits.T1GPOL // bit 6, shadows bit in T1GCONbits
27211 #define GE T1GCONbits.GE // bit 7, shadows bit in T1GCONbits
27212 #define T1GE T1GCONbits.T1GE // bit 7, shadows bit in T1GCONbits
27213 #define TMR1GE T1GCONbits.TMR1GE // bit 7, shadows bit in T1GCONbits
27215 #define RSEL0 T2RSTbits.RSEL0 // bit 0, shadows bit in T2RSTbits
27216 #define T2RSEL0 T2RSTbits.T2RSEL0 // bit 0, shadows bit in T2RSTbits
27217 #define RSEL1 T2RSTbits.RSEL1 // bit 1, shadows bit in T2RSTbits
27218 #define T2RSEL1 T2RSTbits.T2RSEL1 // bit 1, shadows bit in T2RSTbits
27219 #define RSEL2 T2RSTbits.RSEL2 // bit 2, shadows bit in T2RSTbits
27220 #define T2RSEL2 T2RSTbits.T2RSEL2 // bit 2, shadows bit in T2RSTbits
27221 #define RSEL3 T2RSTbits.RSEL3 // bit 3, shadows bit in T2RSTbits
27222 #define T2RSEL3 T2RSTbits.T2RSEL3 // bit 3, shadows bit in T2RSTbits
27223 #define RSEL4 T2RSTbits.RSEL4 // bit 4, shadows bit in T2RSTbits
27224 #define T2RSEL4 T2RSTbits.T2RSEL4 // bit 4, shadows bit in T2RSTbits
27226 #define TRISA0 TRISAbits.TRISA0 // bit 0
27227 #define TRISA1 TRISAbits.TRISA1 // bit 1
27228 #define TRISA2 TRISAbits.TRISA2 // bit 2
27229 #define TRISA3 TRISAbits.TRISA3 // bit 3
27230 #define TRISA4 TRISAbits.TRISA4 // bit 4
27231 #define TRISA5 TRISAbits.TRISA5 // bit 5
27232 #define TRISA6 TRISAbits.TRISA6 // bit 6
27233 #define TRISA7 TRISAbits.TRISA7 // bit 7
27235 #define TRISB0 TRISBbits.TRISB0 // bit 0
27236 #define TRISB1 TRISBbits.TRISB1 // bit 1
27237 #define TRISB2 TRISBbits.TRISB2 // bit 2
27238 #define TRISB3 TRISBbits.TRISB3 // bit 3
27239 #define TRISB4 TRISBbits.TRISB4 // bit 4
27240 #define TRISB5 TRISBbits.TRISB5 // bit 5
27241 #define TRISB6 TRISBbits.TRISB6 // bit 6
27242 #define TRISB7 TRISBbits.TRISB7 // bit 7
27244 #define TRISC0 TRISCbits.TRISC0 // bit 0
27245 #define TRISC1 TRISCbits.TRISC1 // bit 1
27246 #define TRISC2 TRISCbits.TRISC2 // bit 2
27247 #define TRISC3 TRISCbits.TRISC3 // bit 3
27248 #define TRISC4 TRISCbits.TRISC4 // bit 4
27249 #define TRISC5 TRISCbits.TRISC5 // bit 5
27250 #define TRISC6 TRISCbits.TRISC6 // bit 6
27251 #define TRISC7 TRISCbits.TRISC7 // bit 7
27253 #define TRISD0 TRISDbits.TRISD0 // bit 0
27254 #define TRISD1 TRISDbits.TRISD1 // bit 1
27255 #define TRISD2 TRISDbits.TRISD2 // bit 2
27256 #define TRISD3 TRISDbits.TRISD3 // bit 3
27257 #define TRISD4 TRISDbits.TRISD4 // bit 4
27258 #define TRISD5 TRISDbits.TRISD5 // bit 5
27259 #define TRISD6 TRISDbits.TRISD6 // bit 6
27260 #define TRISD7 TRISDbits.TRISD7 // bit 7
27262 #define TRISE0 TRISEbits.TRISE0 // bit 0
27263 #define TRISE1 TRISEbits.TRISE1 // bit 1
27264 #define TRISE2 TRISEbits.TRISE2 // bit 2
27265 #define TRISE3 TRISEbits.TRISE3 // bit 3
27267 #define SWDTEN WDTCONbits.SWDTEN // bit 0
27268 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
27269 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
27270 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
27271 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
27272 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
27274 #define WPUA0 WPUAbits.WPUA0 // bit 0
27275 #define WPUA1 WPUAbits.WPUA1 // bit 1
27276 #define WPUA2 WPUAbits.WPUA2 // bit 2
27277 #define WPUA3 WPUAbits.WPUA3 // bit 3
27278 #define WPUA4 WPUAbits.WPUA4 // bit 4
27279 #define WPUA5 WPUAbits.WPUA5 // bit 5
27280 #define WPUA6 WPUAbits.WPUA6 // bit 6
27281 #define WPUA7 WPUAbits.WPUA7 // bit 7
27283 #define WPUB0 WPUBbits.WPUB0 // bit 0
27284 #define WPUB1 WPUBbits.WPUB1 // bit 1
27285 #define WPUB2 WPUBbits.WPUB2 // bit 2
27286 #define WPUB3 WPUBbits.WPUB3 // bit 3
27287 #define WPUB4 WPUBbits.WPUB4 // bit 4
27288 #define WPUB5 WPUBbits.WPUB5 // bit 5
27289 #define WPUB6 WPUBbits.WPUB6 // bit 6
27290 #define WPUB7 WPUBbits.WPUB7 // bit 7
27292 #define WPUC0 WPUCbits.WPUC0 // bit 0
27293 #define WPUC1 WPUCbits.WPUC1 // bit 1
27294 #define WPUC2 WPUCbits.WPUC2 // bit 2
27295 #define WPUC3 WPUCbits.WPUC3 // bit 3
27296 #define WPUC4 WPUCbits.WPUC4 // bit 4
27297 #define WPUC5 WPUCbits.WPUC5 // bit 5
27298 #define WPUC6 WPUCbits.WPUC6 // bit 6
27299 #define WPUC7 WPUCbits.WPUC7 // bit 7
27301 #define WPUD0 WPUDbits.WPUD0 // bit 0
27302 #define WPUD1 WPUDbits.WPUD1 // bit 1
27303 #define WPUD2 WPUDbits.WPUD2 // bit 2
27304 #define WPUD3 WPUDbits.WPUD3 // bit 3
27305 #define WPUD4 WPUDbits.WPUD4 // bit 4
27306 #define WPUD5 WPUDbits.WPUD5 // bit 5
27307 #define WPUD6 WPUDbits.WPUD6 // bit 6
27308 #define WPUD7 WPUDbits.WPUD7 // bit 7
27310 #define WPUE0 WPUEbits.WPUE0 // bit 0
27311 #define WPUE1 WPUEbits.WPUE1 // bit 1
27312 #define WPUE2 WPUEbits.WPUE2 // bit 2
27313 #define WPUE3 WPUEbits.WPUE3 // bit 3
27315 #define ZCD1INTN ZCD1CONbits.ZCD1INTN // bit 0
27316 #define ZCD1INTP ZCD1CONbits.ZCD1INTP // bit 1
27317 #define ZCD1POL ZCD1CONbits.ZCD1POL // bit 4
27318 #define ZCD1OUT ZCD1CONbits.ZCD1OUT // bit 5
27319 #define ZCD1EN ZCD1CONbits.ZCD1EN // bit 7
27321 #endif // #ifndef NO_BIT_DEFINES
27323 #endif // #ifndef __PIC16LF1777_H__