2 * This declarations of the PIC16LF18875 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:25 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16LF18875_H__
26 #define __PIC16LF18875_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PORTD_ADDR 0x000F
54 #define PORTE_ADDR 0x0010
55 #define TRISA_ADDR 0x0011
56 #define TRISB_ADDR 0x0012
57 #define TRISC_ADDR 0x0013
58 #define TRISD_ADDR 0x0014
59 #define TRISE_ADDR 0x0015
60 #define LATA_ADDR 0x0016
61 #define LATB_ADDR 0x0017
62 #define LATC_ADDR 0x0018
63 #define LATD_ADDR 0x0019
64 #define LATE_ADDR 0x001A
65 #define TMR0_ADDR 0x001C
66 #define TMR0L_ADDR 0x001C
67 #define PR0_ADDR 0x001D
68 #define TMR0H_ADDR 0x001D
69 #define T0CON0_ADDR 0x001E
70 #define T0CON1_ADDR 0x001F
71 #define ADRES_ADDR 0x008C
72 #define ADRESL_ADDR 0x008C
73 #define ADRESH_ADDR 0x008D
74 #define ADPREV_ADDR 0x008E
75 #define ADPREVL_ADDR 0x008E
76 #define ADPREVH_ADDR 0x008F
77 #define ADACC_ADDR 0x0090
78 #define ADACCL_ADDR 0x0090
79 #define ADACCH_ADDR 0x0091
80 #define ADCON0_ADDR 0x0093
81 #define ADCON1_ADDR 0x0094
82 #define ADCON2_ADDR 0x0095
83 #define ADCON3_ADDR 0x0096
84 #define ADSTAT_ADDR 0x0097
85 #define ADCLK_ADDR 0x0098
86 #define ADACT_ADDR 0x0099
87 #define ADREF_ADDR 0x009A
88 #define ADCAP_ADDR 0x009B
89 #define ADPRE_ADDR 0x009C
90 #define ADACQ_ADDR 0x009D
91 #define ADPCH_ADDR 0x009E
92 #define ADCNT_ADDR 0x010C
93 #define ADRPT_ADDR 0x010D
94 #define ADLTH_ADDR 0x010E
95 #define ADLTHL_ADDR 0x010E
96 #define ADLTHH_ADDR 0x010F
97 #define ADUTH_ADDR 0x0110
98 #define ADUTHL_ADDR 0x0110
99 #define ADUTHH_ADDR 0x0111
100 #define ADSTPT_ADDR 0x0112
101 #define ADSTPTL_ADDR 0x0112
102 #define ADSTPTH_ADDR 0x0113
103 #define ADFLTR_ADDR 0x0114
104 #define ADFLTRL_ADDR 0x0114
105 #define ADFLTRH_ADDR 0x0115
106 #define ADERR_ADDR 0x0116
107 #define ADERRL_ADDR 0x0116
108 #define ADERRH_ADDR 0x0117
109 #define RC1REG_ADDR 0x0119
110 #define RCREG_ADDR 0x0119
111 #define RCREG1_ADDR 0x0119
112 #define TX1REG_ADDR 0x011A
113 #define TXREG_ADDR 0x011A
114 #define TXREG1_ADDR 0x011A
115 #define SP1BRG_ADDR 0x011B
116 #define SP1BRGL_ADDR 0x011B
117 #define SPBRG_ADDR 0x011B
118 #define SPBRG1_ADDR 0x011B
119 #define SPBRGL_ADDR 0x011B
120 #define SP1BRGH_ADDR 0x011C
121 #define SPBRGH_ADDR 0x011C
122 #define SPBRGH1_ADDR 0x011C
123 #define RC1STA_ADDR 0x011D
124 #define RCSTA_ADDR 0x011D
125 #define RCSTA1_ADDR 0x011D
126 #define TX1STA_ADDR 0x011E
127 #define TXSTA_ADDR 0x011E
128 #define TXSTA1_ADDR 0x011E
129 #define BAUD1CON_ADDR 0x011F
130 #define BAUDCON_ADDR 0x011F
131 #define BAUDCON1_ADDR 0x011F
132 #define BAUDCTL_ADDR 0x011F
133 #define BAUDCTL1_ADDR 0x011F
134 #define SSP1BUF_ADDR 0x018C
135 #define SSP1ADD_ADDR 0x018D
136 #define SSP1MSK_ADDR 0x018E
137 #define SSP1STAT_ADDR 0x018F
138 #define SSP1CON1_ADDR 0x0190
139 #define SSP1CON2_ADDR 0x0191
140 #define SSP1CON3_ADDR 0x0192
141 #define SSP2BUF_ADDR 0x0196
142 #define SSP2ADD_ADDR 0x0197
143 #define SSP2MSK_ADDR 0x0198
144 #define SSP2STAT_ADDR 0x0199
145 #define SSP2CON1_ADDR 0x019A
146 #define SSP2CON2_ADDR 0x019B
147 #define SSP2CON3_ADDR 0x019C
148 #define TMR1L_ADDR 0x020C
149 #define TMR1H_ADDR 0x020D
150 #define T1CON_ADDR 0x020E
151 #define PR1_ADDR 0x020F
152 #define T1GCON_ADDR 0x020F
153 #define T1GATE_ADDR 0x0210
154 #define TMR1GATE_ADDR 0x0210
155 #define T1CLK_ADDR 0x0211
156 #define TMR1CLK_ADDR 0x0211
157 #define TMR3L_ADDR 0x0212
158 #define TMR3H_ADDR 0x0213
159 #define T3CON_ADDR 0x0214
160 #define PR3_ADDR 0x0215
161 #define T3GCON_ADDR 0x0215
162 #define T3GATE_ADDR 0x0216
163 #define TMR3GATE_ADDR 0x0216
164 #define T3CLK_ADDR 0x0217
165 #define TMR3CLK_ADDR 0x0217
166 #define TMR5L_ADDR 0x0218
167 #define TMR5H_ADDR 0x0219
168 #define T5CON_ADDR 0x021A
169 #define PR5_ADDR 0x021B
170 #define T5GCON_ADDR 0x021B
171 #define T5GATE_ADDR 0x021C
172 #define TMR5GATE_ADDR 0x021C
173 #define T5CLK_ADDR 0x021D
174 #define TMR5CLK_ADDR 0x021D
175 #define CCPTMRS0_ADDR 0x021E
176 #define CCPTMRS1_ADDR 0x021F
177 #define T2TMR_ADDR 0x028C
178 #define TMR2_ADDR 0x028C
179 #define PR2_ADDR 0x028D
180 #define T2PR_ADDR 0x028D
181 #define T2CON_ADDR 0x028E
182 #define T2HLT_ADDR 0x028F
183 #define T2CLKCON_ADDR 0x0290
184 #define T2RST_ADDR 0x0291
185 #define T4TMR_ADDR 0x0292
186 #define TMR4_ADDR 0x0292
187 #define PR4_ADDR 0x0293
188 #define T4PR_ADDR 0x0293
189 #define T4CON_ADDR 0x0294
190 #define T4HLT_ADDR 0x0295
191 #define T4CLKCON_ADDR 0x0296
192 #define T4RST_ADDR 0x0297
193 #define T6TMR_ADDR 0x0298
194 #define TMR6_ADDR 0x0298
195 #define PR6_ADDR 0x0299
196 #define T6PR_ADDR 0x0299
197 #define T6CON_ADDR 0x029A
198 #define T6HLT_ADDR 0x029B
199 #define T6CLKCON_ADDR 0x029C
200 #define T6RST_ADDR 0x029D
201 #define CCPR1_ADDR 0x030C
202 #define CCPR1L_ADDR 0x030C
203 #define CCPR1H_ADDR 0x030D
204 #define CCP1CON_ADDR 0x030E
205 #define CCP1CAP_ADDR 0x030F
206 #define CCPR2_ADDR 0x0310
207 #define CCPR2L_ADDR 0x0310
208 #define CCPR2H_ADDR 0x0311
209 #define CCP2CON_ADDR 0x0312
210 #define CCP2CAP_ADDR 0x0313
211 #define CCPR3_ADDR 0x0314
212 #define CCPR3L_ADDR 0x0314
213 #define CCPR3H_ADDR 0x0315
214 #define CCP3CON_ADDR 0x0316
215 #define CCP3CAP_ADDR 0x0317
216 #define CCPR4_ADDR 0x0318
217 #define CCPR4L_ADDR 0x0318
218 #define CCPR4H_ADDR 0x0319
219 #define CCP4CON_ADDR 0x031A
220 #define CCP4CAP_ADDR 0x031B
221 #define CCPR5_ADDR 0x031C
222 #define CCPR5L_ADDR 0x031C
223 #define CCPR5H_ADDR 0x031D
224 #define CCP5CON_ADDR 0x031E
225 #define CCP5CAP_ADDR 0x031F
226 #define PWM6DCL_ADDR 0x038C
227 #define PWM6DCH_ADDR 0x038D
228 #define PWM6CON_ADDR 0x038E
229 #define PWM7DCL_ADDR 0x0390
230 #define PWM7DCH_ADDR 0x0391
231 #define PWM7CON_ADDR 0x0392
232 #define SCANLADRL_ADDR 0x040C
233 #define SCANLADRH_ADDR 0x040D
234 #define SCANHADRL_ADDR 0x040E
235 #define SCANHADRH_ADDR 0x040F
236 #define SCANCON0_ADDR 0x0410
237 #define SCANTRIG_ADDR 0x0411
238 #define CRCDATA_ADDR 0x0416
239 #define CRCDATL_ADDR 0x0416
240 #define CRCDATH_ADDR 0x0417
241 #define CRCACC_ADDR 0x0418
242 #define CRCACCL_ADDR 0x0418
243 #define CRCACCH_ADDR 0x0419
244 #define CRCSHFT_ADDR 0x041A
245 #define CRCSHIFTL_ADDR 0x041A
246 #define CRCSHIFTH_ADDR 0x041B
247 #define CRCXOR_ADDR 0x041C
248 #define CRCXORL_ADDR 0x041C
249 #define CRCXORH_ADDR 0x041D
250 #define CRCCON0_ADDR 0x041E
251 #define CRCCON1_ADDR 0x041F
252 #define SMT1TMR_ADDR 0x048C
253 #define SMT1TMRL_ADDR 0x048C
254 #define SMT1TMRH_ADDR 0x048D
255 #define SMT1TMRU_ADDR 0x048E
256 #define SMT1CPR_ADDR 0x048F
257 #define SMT1CPRL_ADDR 0x048F
258 #define SMT1CPRH_ADDR 0x0490
259 #define SMT1CPRU_ADDR 0x0491
260 #define SMT1CPW_ADDR 0x0492
261 #define SMT1CPWL_ADDR 0x0492
262 #define SMT1CPWH_ADDR 0x0493
263 #define SMT1CPWU_ADDR 0x0494
264 #define SMT1PR_ADDR 0x0495
265 #define SMT1PRL_ADDR 0x0495
266 #define SMT1PRH_ADDR 0x0496
267 #define SMT1PRU_ADDR 0x0497
268 #define SMT1CON0_ADDR 0x0498
269 #define SMT1CON1_ADDR 0x0499
270 #define SMT1STAT_ADDR 0x049A
271 #define SMT1CLK_ADDR 0x049B
272 #define SMT1SIG_ADDR 0x049C
273 #define SMT1WIN_ADDR 0x049D
274 #define SMT2TMR_ADDR 0x050C
275 #define SMT2TMRL_ADDR 0x050C
276 #define SMT2TMRH_ADDR 0x050D
277 #define SMT2TMRU_ADDR 0x050E
278 #define SMT2CPR_ADDR 0x050F
279 #define SMT2CPRL_ADDR 0x050F
280 #define SMT2CPRH_ADDR 0x0510
281 #define SMT2CPRU_ADDR 0x0511
282 #define SMT2CPW_ADDR 0x0512
283 #define SMT2CPWL_ADDR 0x0512
284 #define SMT2CPWH_ADDR 0x0513
285 #define SMT2CPWU_ADDR 0x0514
286 #define SMT2PR_ADDR 0x0515
287 #define SMT2PRL_ADDR 0x0515
288 #define SMT2PRH_ADDR 0x0516
289 #define SMT2PRU_ADDR 0x0517
290 #define SMT2CON0_ADDR 0x0518
291 #define SMT2CON1_ADDR 0x0519
292 #define SMT2STAT_ADDR 0x051A
293 #define SMT2CLK_ADDR 0x051B
294 #define SMT2SIG_ADDR 0x051C
295 #define SMT2WIN_ADDR 0x051D
296 #define NCO1ACC_ADDR 0x058C
297 #define NCO1ACCL_ADDR 0x058C
298 #define NCO1ACCH_ADDR 0x058D
299 #define NCO1ACCU_ADDR 0x058E
300 #define NCO1INC_ADDR 0x058F
301 #define NCO1INCL_ADDR 0x058F
302 #define NCO1INCH_ADDR 0x0590
303 #define NCO1INCU_ADDR 0x0591
304 #define NCO1CON_ADDR 0x0592
305 #define NCO1CLK_ADDR 0x0593
306 #define CWG1CLKCON_ADDR 0x060C
307 #define CWG1ISM_ADDR 0x060D
308 #define CWG1DBR_ADDR 0x060E
309 #define CWG1DBF_ADDR 0x060F
310 #define CWG1CON0_ADDR 0x0610
311 #define CWG1CON1_ADDR 0x0611
312 #define CWG1AS0_ADDR 0x0612
313 #define CWG1AS1_ADDR 0x0613
314 #define CWG1STR_ADDR 0x0614
315 #define CWG2CLKCON_ADDR 0x0616
316 #define CWG2ISM_ADDR 0x0617
317 #define CWG2DBR_ADDR 0x0618
318 #define CWG2DBF_ADDR 0x0619
319 #define CWG2CON0_ADDR 0x061A
320 #define CWG2CON1_ADDR 0x061B
321 #define CWG2AS0_ADDR 0x061C
322 #define CWG2AS1_ADDR 0x061D
323 #define CWG2STR_ADDR 0x061E
324 #define CWG3CLKCON_ADDR 0x068C
325 #define CWG3ISM_ADDR 0x068D
326 #define CWG3DBR_ADDR 0x068E
327 #define CWG3DBF_ADDR 0x068F
328 #define CWG3CON0_ADDR 0x0690
329 #define CWG3CON1_ADDR 0x0691
330 #define CWG3AS0_ADDR 0x0692
331 #define CWG3AS1_ADDR 0x0693
332 #define CWG3STR_ADDR 0x0694
333 #define PIR0_ADDR 0x070C
334 #define PIR1_ADDR 0x070D
335 #define PIR2_ADDR 0x070E
336 #define PIR3_ADDR 0x070F
337 #define PIR4_ADDR 0x0710
338 #define PIR5_ADDR 0x0711
339 #define PIR6_ADDR 0x0712
340 #define PIR7_ADDR 0x0713
341 #define PIR8_ADDR 0x0714
342 #define PIE0_ADDR 0x0716
343 #define PIE1_ADDR 0x0717
344 #define PIE2_ADDR 0x0718
345 #define PIE3_ADDR 0x0719
346 #define PIE4_ADDR 0x071A
347 #define PIE5_ADDR 0x071B
348 #define PIE6_ADDR 0x071C
349 #define PIE7_ADDR 0x071D
350 #define PIE8_ADDR 0x071E
351 #define PMD0_ADDR 0x0796
352 #define PMD1_ADDR 0x0797
353 #define PMD2_ADDR 0x0798
354 #define PMD3_ADDR 0x0799
355 #define PMD4_ADDR 0x079A
356 #define PMD5_ADDR 0x079B
357 #define WDTCON0_ADDR 0x080C
358 #define WDTCON1_ADDR 0x080D
359 #define WDTPSL_ADDR 0x080E
360 #define WDTPSH_ADDR 0x080F
361 #define WDTTMR_ADDR 0x0810
362 #define BORCON_ADDR 0x0811
363 #define PCON0_ADDR 0x0813
364 #define CCDCON_ADDR 0x0814
365 #define NVMADRL_ADDR 0x081A
366 #define NVMADRH_ADDR 0x081B
367 #define NVMDATL_ADDR 0x081C
368 #define NVMDATH_ADDR 0x081D
369 #define NVMCON1_ADDR 0x081E
370 #define NVMCON2_ADDR 0x081F
371 #define CPUDOZE_ADDR 0x088C
372 #define OSCCON1_ADDR 0x088D
373 #define OSCCON2_ADDR 0x088E
374 #define OSCCON3_ADDR 0x088F
375 #define OSCSTAT_ADDR 0x0890
376 #define OSCEN_ADDR 0x0891
377 #define OSCTUNE_ADDR 0x0892
378 #define OSCFRQ_ADDR 0x0893
379 #define CLKRCON_ADDR 0x0895
380 #define CLKRCLK_ADDR 0x0896
381 #define MDCON0_ADDR 0x0897
382 #define MDCON1_ADDR 0x0898
383 #define MDSRC_ADDR 0x0899
384 #define MDCARL_ADDR 0x089A
385 #define MDCARH_ADDR 0x089B
386 #define FVRCON_ADDR 0x090C
387 #define DAC1CON0_ADDR 0x090E
388 #define DAC1CON1_ADDR 0x090F
389 #define ZCD1CON_ADDR 0x091F
390 #define ZCDCON_ADDR 0x091F
391 #define CMOUT_ADDR 0x098F
392 #define CMSTAT_ADDR 0x098F
393 #define CM1CON0_ADDR 0x0990
394 #define CM1CON1_ADDR 0x0991
395 #define CM1NSEL_ADDR 0x0992
396 #define CM1PSEL_ADDR 0x0993
397 #define CM2CON0_ADDR 0x0994
398 #define CM2CON1_ADDR 0x0995
399 #define CM2NSEL_ADDR 0x0996
400 #define CM2PSEL_ADDR 0x0997
401 #define CLCDATA_ADDR 0x0E0F
402 #define CLC1CON_ADDR 0x0E10
403 #define CLC1POL_ADDR 0x0E11
404 #define CLC1SEL0_ADDR 0x0E12
405 #define CLC1SEL1_ADDR 0x0E13
406 #define CLC1SEL2_ADDR 0x0E14
407 #define CLC1SEL3_ADDR 0x0E15
408 #define CLC1GLS0_ADDR 0x0E16
409 #define CLC1GLS1_ADDR 0x0E17
410 #define CLC1GLS2_ADDR 0x0E18
411 #define CLC1GLS3_ADDR 0x0E19
412 #define CLC2CON_ADDR 0x0E1A
413 #define CLC2POL_ADDR 0x0E1B
414 #define CLC2SEL0_ADDR 0x0E1C
415 #define CLC2SEL1_ADDR 0x0E1D
416 #define CLC2SEL2_ADDR 0x0E1E
417 #define CLC2SEL3_ADDR 0x0E1F
418 #define CLC2GLS0_ADDR 0x0E20
419 #define CLC2GLS1_ADDR 0x0E21
420 #define CLC2GLS2_ADDR 0x0E22
421 #define CLC2GLS3_ADDR 0x0E23
422 #define CLC3CON_ADDR 0x0E24
423 #define CLC3POL_ADDR 0x0E25
424 #define CLC3SEL0_ADDR 0x0E26
425 #define CLC3SEL1_ADDR 0x0E27
426 #define CLC3SEL2_ADDR 0x0E28
427 #define CLC3SEL3_ADDR 0x0E29
428 #define CLC3GLS0_ADDR 0x0E2A
429 #define CLC3GLS1_ADDR 0x0E2B
430 #define CLC3GLS2_ADDR 0x0E2C
431 #define CLC3GLS3_ADDR 0x0E2D
432 #define CLC4CON_ADDR 0x0E2E
433 #define CLC4POL_ADDR 0x0E2F
434 #define CLC4SEL0_ADDR 0x0E30
435 #define CLC4SEL1_ADDR 0x0E31
436 #define CLC4SEL2_ADDR 0x0E32
437 #define CLC4SEL3_ADDR 0x0E33
438 #define CLC4GLS0_ADDR 0x0E34
439 #define CLC4GLS1_ADDR 0x0E35
440 #define CLC4GLS2_ADDR 0x0E36
441 #define CLC4GLS3_ADDR 0x0E37
442 #define PPSLOCK_ADDR 0x0E8F
443 #define INTPPS_ADDR 0x0E90
444 #define T0CKIPPS_ADDR 0x0E91
445 #define T1CKIPPS_ADDR 0x0E92
446 #define T1GPPS_ADDR 0x0E93
447 #define T3CKIPPS_ADDR 0x0E94
448 #define T3GPPS_ADDR 0x0E95
449 #define T5CKIPPS_ADDR 0x0E96
450 #define T5GPPS_ADDR 0x0E97
451 #define T2AINPPS_ADDR 0x0E9C
452 #define T4AINPPS_ADDR 0x0E9D
453 #define T6AINPPS_ADDR 0x0E9E
454 #define CCP1PPS_ADDR 0x0EA1
455 #define CCP2PPS_ADDR 0x0EA2
456 #define CCP3PPS_ADDR 0x0EA3
457 #define CCP4PPS_ADDR 0x0EA4
458 #define CCP5PPS_ADDR 0x0EA5
459 #define SMT1WINPPS_ADDR 0x0EA9
460 #define SMT1SIGPPS_ADDR 0x0EAA
461 #define SMT2WINPPS_ADDR 0x0EAB
462 #define SMT2SIGPPS_ADDR 0x0EAC
463 #define CWG1PPS_ADDR 0x0EB1
464 #define CWG2PPS_ADDR 0x0EB2
465 #define CWG3PPS_ADDR 0x0EB3
466 #define MDCARLPPS_ADDR 0x0EB8
467 #define MDCARHPPS_ADDR 0x0EB9
468 #define MDSRCPPS_ADDR 0x0EBA
469 #define CLCIN0PPS_ADDR 0x0EBB
470 #define CLCIN1PPS_ADDR 0x0EBC
471 #define CLCIN2PPS_ADDR 0x0EBD
472 #define CLCIN3PPS_ADDR 0x0EBE
473 #define ADCACTPPS_ADDR 0x0EC3
474 #define SSP1CLKPPS_ADDR 0x0EC5
475 #define SSP1DATPPS_ADDR 0x0EC6
476 #define SSP1SSPPS_ADDR 0x0EC7
477 #define SSP2CLKPPS_ADDR 0x0EC8
478 #define SSP2DATPPS_ADDR 0x0EC9
479 #define SSP2SSPPS_ADDR 0x0ECA
480 #define RXPPS_ADDR 0x0ECB
481 #define TXPPS_ADDR 0x0ECC
482 #define RA0PPS_ADDR 0x0F10
483 #define RA1PPS_ADDR 0x0F11
484 #define RA2PPS_ADDR 0x0F12
485 #define RA3PPS_ADDR 0x0F13
486 #define RA4PPS_ADDR 0x0F14
487 #define RA5PPS_ADDR 0x0F15
488 #define RA6PPS_ADDR 0x0F16
489 #define RA7PPS_ADDR 0x0F17
490 #define RB0PPS_ADDR 0x0F18
491 #define RB1PPS_ADDR 0x0F19
492 #define RB2PPS_ADDR 0x0F1A
493 #define RB3PPS_ADDR 0x0F1B
494 #define RB4PPS_ADDR 0x0F1C
495 #define RB5PPS_ADDR 0x0F1D
496 #define RB6PPS_ADDR 0x0F1E
497 #define RB7PPS_ADDR 0x0F1F
498 #define RC0PPS_ADDR 0x0F20
499 #define RC1PPS_ADDR 0x0F21
500 #define RC2PPS_ADDR 0x0F22
501 #define RC3PPS_ADDR 0x0F23
502 #define RC4PPS_ADDR 0x0F24
503 #define RC5PPS_ADDR 0x0F25
504 #define RC6PPS_ADDR 0x0F26
505 #define RC7PPS_ADDR 0x0F27
506 #define RD0PPS_ADDR 0x0F28
507 #define RD1PPS_ADDR 0x0F29
508 #define RD2PPS_ADDR 0x0F2A
509 #define RD3PPS_ADDR 0x0F2B
510 #define RD4PPS_ADDR 0x0F2C
511 #define RD5PPS_ADDR 0x0F2D
512 #define RD6PPS_ADDR 0x0F2E
513 #define RD7PPS_ADDR 0x0F2F
514 #define RE0PPS_ADDR 0x0F30
515 #define RE1PPS_ADDR 0x0F31
516 #define RE2PPS_ADDR 0x0F32
517 #define ANSELA_ADDR 0x0F38
518 #define WPUA_ADDR 0x0F39
519 #define ODCONA_ADDR 0x0F3A
520 #define SLRCONA_ADDR 0x0F3B
521 #define INLVLA_ADDR 0x0F3C
522 #define IOCAP_ADDR 0x0F3D
523 #define IOCAN_ADDR 0x0F3E
524 #define IOCAF_ADDR 0x0F3F
525 #define CCDNA_ADDR 0x0F40
526 #define CCDPA_ADDR 0x0F41
527 #define ANSELB_ADDR 0x0F43
528 #define WPUB_ADDR 0x0F44
529 #define ODCONB_ADDR 0x0F45
530 #define SLRCONB_ADDR 0x0F46
531 #define INLVLB_ADDR 0x0F47
532 #define IOCBP_ADDR 0x0F48
533 #define IOCBN_ADDR 0x0F49
534 #define IOCBF_ADDR 0x0F4A
535 #define CCDNB_ADDR 0x0F4B
536 #define CCDPB_ADDR 0x0F4C
537 #define ANSELC_ADDR 0x0F4E
538 #define WPUC_ADDR 0x0F4F
539 #define ODCONC_ADDR 0x0F50
540 #define SLRCONC_ADDR 0x0F51
541 #define INLVLC_ADDR 0x0F52
542 #define IOCCP_ADDR 0x0F53
543 #define IOCCN_ADDR 0x0F54
544 #define IOCCF_ADDR 0x0F55
545 #define CCDNC_ADDR 0x0F56
546 #define CCDPC_ADDR 0x0F57
547 #define ANSELD_ADDR 0x0F59
548 #define WPUD_ADDR 0x0F5A
549 #define ODCOND_ADDR 0x0F5B
550 #define SLRCOND_ADDR 0x0F5C
551 #define INLVLD_ADDR 0x0F5D
552 #define CCDND_ADDR 0x0F61
553 #define CCDPD_ADDR 0x0F62
554 #define ANSELE_ADDR 0x0F64
555 #define WPUE_ADDR 0x0F65
556 #define ODCONE_ADDR 0x0F66
557 #define SLRCONE_ADDR 0x0F67
558 #define INLVLE_ADDR 0x0F68
559 #define IOCEP_ADDR 0x0F69
560 #define IOCEN_ADDR 0x0F6A
561 #define IOCEF_ADDR 0x0F6B
562 #define CCDNE_ADDR 0x0F6C
563 #define CCDPE_ADDR 0x0F6D
564 #define STATUS_SHAD_ADDR 0x0FE4
565 #define WREG_SHAD_ADDR 0x0FE5
566 #define BSR_SHAD_ADDR 0x0FE6
567 #define PCLATH_SHAD_ADDR 0x0FE7
568 #define FSR0L_SHAD_ADDR 0x0FE8
569 #define FSR0H_SHAD_ADDR 0x0FE9
570 #define FSR1L_SHAD_ADDR 0x0FEA
571 #define FSR1H_SHAD_ADDR 0x0FEB
572 #define STKPTR_ADDR 0x0FED
573 #define TOSL_ADDR 0x0FEE
574 #define TOSH_ADDR 0x0FEF
576 #endif // #ifndef NO_ADDR_DEFINES
578 //==============================================================================
580 // Register Definitions
582 //==============================================================================
584 extern __at(0x0000) __sfr INDF0
;
585 extern __at(0x0001) __sfr INDF1
;
586 extern __at(0x0002) __sfr PCL
;
588 //==============================================================================
591 extern __at(0x0003) __sfr STATUS
;
605 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
613 //==============================================================================
615 extern __at(0x0004) __sfr FSR0
;
616 extern __at(0x0004) __sfr FSR0L
;
617 extern __at(0x0005) __sfr FSR0H
;
618 extern __at(0x0006) __sfr FSR1
;
619 extern __at(0x0006) __sfr FSR1L
;
620 extern __at(0x0007) __sfr FSR1H
;
622 //==============================================================================
625 extern __at(0x0008) __sfr BSR
;
648 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
656 //==============================================================================
658 extern __at(0x0009) __sfr WREG
;
659 extern __at(0x000A) __sfr PCLATH
;
661 //==============================================================================
664 extern __at(0x000B) __sfr INTCON
;
678 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
684 //==============================================================================
687 //==============================================================================
690 extern __at(0x000C) __sfr PORTA
;
704 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
715 //==============================================================================
718 //==============================================================================
721 extern __at(0x000D) __sfr PORTB
;
735 extern __at(0x000D) volatile __PORTBbits_t PORTBbits
;
746 //==============================================================================
749 //==============================================================================
752 extern __at(0x000E) __sfr PORTC
;
766 extern __at(0x000E) volatile __PORTCbits_t PORTCbits
;
777 //==============================================================================
780 //==============================================================================
783 extern __at(0x000F) __sfr PORTD
;
797 extern __at(0x000F) volatile __PORTDbits_t PORTDbits
;
808 //==============================================================================
811 //==============================================================================
814 extern __at(0x0010) __sfr PORTE
;
837 extern __at(0x0010) volatile __PORTEbits_t PORTEbits
;
844 //==============================================================================
847 //==============================================================================
850 extern __at(0x0011) __sfr TRISA
;
864 extern __at(0x0011) volatile __TRISAbits_t TRISAbits
;
875 //==============================================================================
878 //==============================================================================
881 extern __at(0x0012) __sfr TRISB
;
895 extern __at(0x0012) volatile __TRISBbits_t TRISBbits
;
906 //==============================================================================
909 //==============================================================================
912 extern __at(0x0013) __sfr TRISC
;
926 extern __at(0x0013) volatile __TRISCbits_t TRISCbits
;
937 //==============================================================================
940 //==============================================================================
943 extern __at(0x0014) __sfr TRISD
;
957 extern __at(0x0014) volatile __TRISDbits_t TRISDbits
;
968 //==============================================================================
971 //==============================================================================
974 extern __at(0x0015) __sfr TRISE
;
997 extern __at(0x0015) volatile __TRISEbits_t TRISEbits
;
1000 #define _TRISE1 0x02
1001 #define _TRISE2 0x04
1003 //==============================================================================
1006 //==============================================================================
1009 extern __at(0x0016) __sfr LATA
;
1023 extern __at(0x0016) volatile __LATAbits_t LATAbits
;
1034 //==============================================================================
1037 //==============================================================================
1040 extern __at(0x0017) __sfr LATB
;
1054 extern __at(0x0017) volatile __LATBbits_t LATBbits
;
1065 //==============================================================================
1068 //==============================================================================
1071 extern __at(0x0018) __sfr LATC
;
1085 extern __at(0x0018) volatile __LATCbits_t LATCbits
;
1096 //==============================================================================
1099 //==============================================================================
1102 extern __at(0x0019) __sfr LATD
;
1116 extern __at(0x0019) volatile __LATDbits_t LATDbits
;
1127 //==============================================================================
1130 //==============================================================================
1133 extern __at(0x001A) __sfr LATE
;
1156 extern __at(0x001A) volatile __LATEbits_t LATEbits
;
1162 //==============================================================================
1165 //==============================================================================
1168 extern __at(0x001C) __sfr TMR0
;
1172 unsigned TMR0L0
: 1;
1173 unsigned TMR0L1
: 1;
1174 unsigned TMR0L2
: 1;
1175 unsigned TMR0L3
: 1;
1176 unsigned TMR0L4
: 1;
1177 unsigned TMR0L5
: 1;
1178 unsigned TMR0L6
: 1;
1179 unsigned TMR0L7
: 1;
1182 extern __at(0x001C) volatile __TMR0bits_t TMR0bits
;
1184 #define _TMR0L0 0x01
1185 #define _TMR0L1 0x02
1186 #define _TMR0L2 0x04
1187 #define _TMR0L3 0x08
1188 #define _TMR0L4 0x10
1189 #define _TMR0L5 0x20
1190 #define _TMR0L6 0x40
1191 #define _TMR0L7 0x80
1193 //==============================================================================
1196 //==============================================================================
1199 extern __at(0x001C) __sfr TMR0L
;
1203 unsigned TMR0L0
: 1;
1204 unsigned TMR0L1
: 1;
1205 unsigned TMR0L2
: 1;
1206 unsigned TMR0L3
: 1;
1207 unsigned TMR0L4
: 1;
1208 unsigned TMR0L5
: 1;
1209 unsigned TMR0L6
: 1;
1210 unsigned TMR0L7
: 1;
1213 extern __at(0x001C) volatile __TMR0Lbits_t TMR0Lbits
;
1215 #define _TMR0L_TMR0L0 0x01
1216 #define _TMR0L_TMR0L1 0x02
1217 #define _TMR0L_TMR0L2 0x04
1218 #define _TMR0L_TMR0L3 0x08
1219 #define _TMR0L_TMR0L4 0x10
1220 #define _TMR0L_TMR0L5 0x20
1221 #define _TMR0L_TMR0L6 0x40
1222 #define _TMR0L_TMR0L7 0x80
1224 //==============================================================================
1227 //==============================================================================
1230 extern __at(0x001D) __sfr PR0
;
1236 unsigned TMR0H0
: 1;
1237 unsigned TMR0H1
: 1;
1238 unsigned TMR0H2
: 1;
1239 unsigned TMR0H3
: 1;
1240 unsigned TMR0H4
: 1;
1241 unsigned TMR0H5
: 1;
1242 unsigned TMR0H6
: 1;
1243 unsigned TMR0H7
: 1;
1259 extern __at(0x001D) volatile __PR0bits_t PR0bits
;
1261 #define _TMR0H0 0x01
1263 #define _TMR0H1 0x02
1265 #define _TMR0H2 0x04
1267 #define _TMR0H3 0x08
1269 #define _TMR0H4 0x10
1271 #define _TMR0H5 0x20
1273 #define _TMR0H6 0x40
1275 #define _TMR0H7 0x80
1278 //==============================================================================
1281 //==============================================================================
1284 extern __at(0x001D) __sfr TMR0H
;
1290 unsigned TMR0H0
: 1;
1291 unsigned TMR0H1
: 1;
1292 unsigned TMR0H2
: 1;
1293 unsigned TMR0H3
: 1;
1294 unsigned TMR0H4
: 1;
1295 unsigned TMR0H5
: 1;
1296 unsigned TMR0H6
: 1;
1297 unsigned TMR0H7
: 1;
1313 extern __at(0x001D) volatile __TMR0Hbits_t TMR0Hbits
;
1315 #define _TMR0H_TMR0H0 0x01
1316 #define _TMR0H_T0PR0 0x01
1317 #define _TMR0H_TMR0H1 0x02
1318 #define _TMR0H_T0PR1 0x02
1319 #define _TMR0H_TMR0H2 0x04
1320 #define _TMR0H_T0PR2 0x04
1321 #define _TMR0H_TMR0H3 0x08
1322 #define _TMR0H_T0PR3 0x08
1323 #define _TMR0H_TMR0H4 0x10
1324 #define _TMR0H_T0PR4 0x10
1325 #define _TMR0H_TMR0H5 0x20
1326 #define _TMR0H_T0PR5 0x20
1327 #define _TMR0H_TMR0H6 0x40
1328 #define _TMR0H_T0PR6 0x40
1329 #define _TMR0H_TMR0H7 0x80
1330 #define _TMR0H_T0PR7 0x80
1332 //==============================================================================
1335 //==============================================================================
1338 extern __at(0x001E) __sfr T0CON0
;
1344 unsigned T0OUTPS0
: 1;
1345 unsigned T0OUTPS1
: 1;
1346 unsigned T0OUTPS2
: 1;
1347 unsigned T0OUTPS3
: 1;
1348 unsigned T016BIT
: 1;
1356 unsigned T0OUTPS
: 4;
1361 extern __at(0x001E) volatile __T0CON0bits_t T0CON0bits
;
1363 #define _T0OUTPS0 0x01
1364 #define _T0OUTPS1 0x02
1365 #define _T0OUTPS2 0x04
1366 #define _T0OUTPS3 0x08
1367 #define _T016BIT 0x10
1371 //==============================================================================
1374 //==============================================================================
1377 extern __at(0x001F) __sfr T0CON1
;
1383 unsigned T0CKPS0
: 1;
1384 unsigned T0CKPS1
: 1;
1385 unsigned T0CKPS2
: 1;
1386 unsigned T0CKPS3
: 1;
1387 unsigned T0ASYNC
: 1;
1413 unsigned T0CKPS
: 4;
1424 extern __at(0x001F) volatile __T0CON1bits_t T0CON1bits
;
1426 #define _T0CKPS0 0x01
1428 #define _T0CKPS1 0x02
1430 #define _T0CKPS2 0x04
1432 #define _T0CKPS3 0x08
1434 #define _T0ASYNC 0x10
1439 //==============================================================================
1441 extern __at(0x008C) __sfr ADRES
;
1442 extern __at(0x008C) __sfr ADRESL
;
1443 extern __at(0x008D) __sfr ADRESH
;
1444 extern __at(0x008E) __sfr ADPREV
;
1446 //==============================================================================
1449 extern __at(0x008E) __sfr ADPREVL
;
1453 unsigned ADPREV0
: 1;
1454 unsigned ADPREV1
: 1;
1455 unsigned ADPREV2
: 1;
1456 unsigned ADPREV3
: 1;
1457 unsigned ADPREV4
: 1;
1458 unsigned ADPREV5
: 1;
1459 unsigned ADPREV6
: 1;
1460 unsigned ADPREV7
: 1;
1463 extern __at(0x008E) volatile __ADPREVLbits_t ADPREVLbits
;
1465 #define _ADPREV0 0x01
1466 #define _ADPREV1 0x02
1467 #define _ADPREV2 0x04
1468 #define _ADPREV3 0x08
1469 #define _ADPREV4 0x10
1470 #define _ADPREV5 0x20
1471 #define _ADPREV6 0x40
1472 #define _ADPREV7 0x80
1474 //==============================================================================
1477 //==============================================================================
1480 extern __at(0x008F) __sfr ADPREVH
;
1484 unsigned ADPREV8
: 1;
1485 unsigned ADPREV9
: 1;
1486 unsigned ADPREV10
: 1;
1487 unsigned ADPREV11
: 1;
1488 unsigned ADPREV12
: 1;
1489 unsigned ADPREV13
: 1;
1490 unsigned ADPREV14
: 1;
1491 unsigned ADPREV15
: 1;
1494 extern __at(0x008F) volatile __ADPREVHbits_t ADPREVHbits
;
1496 #define _ADPREV8 0x01
1497 #define _ADPREV9 0x02
1498 #define _ADPREV10 0x04
1499 #define _ADPREV11 0x08
1500 #define _ADPREV12 0x10
1501 #define _ADPREV13 0x20
1502 #define _ADPREV14 0x40
1503 #define _ADPREV15 0x80
1505 //==============================================================================
1507 extern __at(0x0090) __sfr ADACC
;
1509 //==============================================================================
1512 extern __at(0x0090) __sfr ADACCL
;
1516 unsigned ADACC0
: 1;
1517 unsigned ADACC1
: 1;
1518 unsigned ADACC2
: 1;
1519 unsigned ADACC3
: 1;
1520 unsigned ADACC4
: 1;
1521 unsigned ADACC5
: 1;
1522 unsigned ADACC6
: 1;
1523 unsigned ADACC7
: 1;
1526 extern __at(0x0090) volatile __ADACCLbits_t ADACCLbits
;
1528 #define _ADACC0 0x01
1529 #define _ADACC1 0x02
1530 #define _ADACC2 0x04
1531 #define _ADACC3 0x08
1532 #define _ADACC4 0x10
1533 #define _ADACC5 0x20
1534 #define _ADACC6 0x40
1535 #define _ADACC7 0x80
1537 //==============================================================================
1540 //==============================================================================
1543 extern __at(0x0091) __sfr ADACCH
;
1547 unsigned ADACC8
: 1;
1548 unsigned ADACC9
: 1;
1549 unsigned ADACC10
: 1;
1550 unsigned ADACC11
: 1;
1551 unsigned ADACC12
: 1;
1552 unsigned ADACC13
: 1;
1553 unsigned ADACC14
: 1;
1554 unsigned ADACC15
: 1;
1557 extern __at(0x0091) volatile __ADACCHbits_t ADACCHbits
;
1559 #define _ADACC8 0x01
1560 #define _ADACC9 0x02
1561 #define _ADACC10 0x04
1562 #define _ADACC11 0x08
1563 #define _ADACC12 0x10
1564 #define _ADACC13 0x20
1565 #define _ADACC14 0x40
1566 #define _ADACC15 0x80
1568 //==============================================================================
1571 //==============================================================================
1574 extern __at(0x0093) __sfr ADCON0
;
1586 unsigned ADCONT
: 1;
1604 unsigned NOT_DONE
: 1;
1628 unsigned GO_NOT_DONE
: 1;
1646 extern __at(0x0093) volatile __ADCON0bits_t ADCON0bits
;
1650 #define _NOT_DONE 0x01
1652 #define _GO_NOT_DONE 0x01
1656 #define _ADCONT 0x40
1659 //==============================================================================
1662 //==============================================================================
1665 extern __at(0x0094) __sfr ADCON1
;
1669 unsigned ADDSEN
: 1;
1674 unsigned ADGPOL
: 1;
1675 unsigned ADIPEN
: 1;
1676 unsigned ADPPOL
: 1;
1679 extern __at(0x0094) volatile __ADCON1bits_t ADCON1bits
;
1681 #define _ADDSEN 0x01
1682 #define _ADGPOL 0x20
1683 #define _ADIPEN 0x40
1684 #define _ADPPOL 0x80
1686 //==============================================================================
1689 //==============================================================================
1692 extern __at(0x0095) __sfr ADCON2
;
1701 unsigned ADACLR
: 1;
1702 unsigned ADCRS0
: 1;
1703 unsigned ADCRS1
: 1;
1704 unsigned ADCRS2
: 1;
1705 unsigned ADPSIS
: 1;
1722 extern __at(0x0095) volatile __ADCON2bits_t ADCON2bits
;
1727 #define _ADACLR 0x08
1728 #define _ADCRS0 0x10
1729 #define _ADCRS1 0x20
1730 #define _ADCRS2 0x40
1731 #define _ADPSIS 0x80
1733 //==============================================================================
1736 //==============================================================================
1739 extern __at(0x0096) __sfr ADCON3
;
1745 unsigned ADTMD0
: 1;
1746 unsigned ADTMD1
: 1;
1747 unsigned ADTMD2
: 1;
1749 unsigned ADCALC0
: 1;
1750 unsigned ADCALC1
: 1;
1751 unsigned ADCALC2
: 1;
1764 unsigned ADCALC
: 3;
1769 extern __at(0x0096) volatile __ADCON3bits_t ADCON3bits
;
1771 #define _ADTMD0 0x01
1772 #define _ADTMD1 0x02
1773 #define _ADTMD2 0x04
1775 #define _ADCALC0 0x10
1776 #define _ADCALC1 0x20
1777 #define _ADCALC2 0x40
1779 //==============================================================================
1782 //==============================================================================
1785 extern __at(0x0097) __sfr ADSTAT
;
1791 unsigned ADSTAT0
: 1;
1792 unsigned ADSTAT1
: 1;
1793 unsigned ADSTAT2
: 1;
1794 unsigned ADMACT
: 1;
1795 unsigned ADMATH
: 1;
1796 unsigned ADLTHR
: 1;
1797 unsigned ADUTHR
: 1;
1803 unsigned ADSTAT
: 3;
1808 extern __at(0x0097) volatile __ADSTATbits_t ADSTATbits
;
1810 #define _ADSTAT0 0x01
1811 #define _ADSTAT1 0x02
1812 #define _ADSTAT2 0x04
1813 #define _ADMACT 0x08
1814 #define _ADMATH 0x10
1815 #define _ADLTHR 0x20
1816 #define _ADUTHR 0x40
1819 //==============================================================================
1822 //==============================================================================
1825 extern __at(0x0098) __sfr ADCLK
;
1831 unsigned ADCCS0
: 1;
1832 unsigned ADCCS1
: 1;
1833 unsigned ADCCS2
: 1;
1834 unsigned ADCCS3
: 1;
1835 unsigned ADCCS4
: 1;
1836 unsigned ADCCS5
: 1;
1848 extern __at(0x0098) volatile __ADCLKbits_t ADCLKbits
;
1850 #define _ADCCS0 0x01
1851 #define _ADCCS1 0x02
1852 #define _ADCCS2 0x04
1853 #define _ADCCS3 0x08
1854 #define _ADCCS4 0x10
1855 #define _ADCCS5 0x20
1857 //==============================================================================
1860 //==============================================================================
1863 extern __at(0x0099) __sfr ADACT
;
1869 unsigned ADACT0
: 1;
1870 unsigned ADACT1
: 1;
1871 unsigned ADACT2
: 1;
1872 unsigned ADACT3
: 1;
1873 unsigned ADACT4
: 1;
1886 extern __at(0x0099) volatile __ADACTbits_t ADACTbits
;
1888 #define _ADACT0 0x01
1889 #define _ADACT1 0x02
1890 #define _ADACT2 0x04
1891 #define _ADACT3 0x08
1892 #define _ADACT4 0x10
1894 //==============================================================================
1897 //==============================================================================
1900 extern __at(0x009A) __sfr ADREF
;
1906 unsigned ADPREF0
: 1;
1907 unsigned ADPREF1
: 1;
1910 unsigned ADNREF
: 1;
1918 unsigned ADPREF
: 2;
1923 extern __at(0x009A) volatile __ADREFbits_t ADREFbits
;
1925 #define _ADPREF0 0x01
1926 #define _ADPREF1 0x02
1927 #define _ADNREF 0x10
1929 //==============================================================================
1932 //==============================================================================
1935 extern __at(0x009B) __sfr ADCAP
;
1941 unsigned ADCAP0
: 1;
1942 unsigned ADCAP1
: 1;
1943 unsigned ADCAP2
: 1;
1944 unsigned ADCAP3
: 1;
1945 unsigned ADCAP4
: 1;
1958 extern __at(0x009B) volatile __ADCAPbits_t ADCAPbits
;
1960 #define _ADCAP0 0x01
1961 #define _ADCAP1 0x02
1962 #define _ADCAP2 0x04
1963 #define _ADCAP3 0x08
1964 #define _ADCAP4 0x10
1966 //==============================================================================
1969 //==============================================================================
1972 extern __at(0x009C) __sfr ADPRE
;
1976 unsigned ADPRE0
: 1;
1977 unsigned ADPRE1
: 1;
1978 unsigned ADPRE2
: 1;
1979 unsigned ADPRE3
: 1;
1980 unsigned ADPRE4
: 1;
1981 unsigned ADPRE5
: 1;
1982 unsigned ADPRE6
: 1;
1983 unsigned ADPRE7
: 1;
1986 extern __at(0x009C) volatile __ADPREbits_t ADPREbits
;
1988 #define _ADPRE0 0x01
1989 #define _ADPRE1 0x02
1990 #define _ADPRE2 0x04
1991 #define _ADPRE3 0x08
1992 #define _ADPRE4 0x10
1993 #define _ADPRE5 0x20
1994 #define _ADPRE6 0x40
1995 #define _ADPRE7 0x80
1997 //==============================================================================
2000 //==============================================================================
2003 extern __at(0x009D) __sfr ADACQ
;
2007 unsigned ADACQ0
: 1;
2008 unsigned ADACQ1
: 1;
2009 unsigned ADACQ2
: 1;
2010 unsigned ADACQ3
: 1;
2011 unsigned ADACQ4
: 1;
2012 unsigned ADACQ5
: 1;
2013 unsigned ADACQ6
: 1;
2014 unsigned ADACQ7
: 1;
2017 extern __at(0x009D) volatile __ADACQbits_t ADACQbits
;
2019 #define _ADACQ0 0x01
2020 #define _ADACQ1 0x02
2021 #define _ADACQ2 0x04
2022 #define _ADACQ3 0x08
2023 #define _ADACQ4 0x10
2024 #define _ADACQ5 0x20
2025 #define _ADACQ6 0x40
2026 #define _ADACQ7 0x80
2028 //==============================================================================
2031 //==============================================================================
2034 extern __at(0x009E) __sfr ADPCH
;
2040 unsigned ADPCH0
: 1;
2041 unsigned ADPCH1
: 1;
2042 unsigned ADPCH2
: 1;
2043 unsigned ADPCH3
: 1;
2044 unsigned ADPCH4
: 1;
2045 unsigned ADPCH5
: 1;
2057 extern __at(0x009E) volatile __ADPCHbits_t ADPCHbits
;
2059 #define _ADPCH0 0x01
2060 #define _ADPCH1 0x02
2061 #define _ADPCH2 0x04
2062 #define _ADPCH3 0x08
2063 #define _ADPCH4 0x10
2064 #define _ADPCH5 0x20
2066 //==============================================================================
2069 //==============================================================================
2072 extern __at(0x010C) __sfr ADCNT
;
2076 unsigned ADCNT0
: 1;
2077 unsigned ADCNT1
: 1;
2078 unsigned ADCNT2
: 1;
2079 unsigned ADCNT3
: 1;
2080 unsigned ADCNT4
: 1;
2081 unsigned ADCNT5
: 1;
2082 unsigned ADCNT6
: 1;
2083 unsigned ADCNT7
: 1;
2086 extern __at(0x010C) volatile __ADCNTbits_t ADCNTbits
;
2088 #define _ADCNT0 0x01
2089 #define _ADCNT1 0x02
2090 #define _ADCNT2 0x04
2091 #define _ADCNT3 0x08
2092 #define _ADCNT4 0x10
2093 #define _ADCNT5 0x20
2094 #define _ADCNT6 0x40
2095 #define _ADCNT7 0x80
2097 //==============================================================================
2100 //==============================================================================
2103 extern __at(0x010D) __sfr ADRPT
;
2107 unsigned ADRPT0
: 1;
2108 unsigned ADRPT1
: 1;
2109 unsigned ADRPT2
: 1;
2110 unsigned ADRPT3
: 1;
2111 unsigned ADRPT4
: 1;
2112 unsigned ADRPT5
: 1;
2113 unsigned ADRPT6
: 1;
2114 unsigned ADRPT7
: 1;
2117 extern __at(0x010D) volatile __ADRPTbits_t ADRPTbits
;
2119 #define _ADRPT0 0x01
2120 #define _ADRPT1 0x02
2121 #define _ADRPT2 0x04
2122 #define _ADRPT3 0x08
2123 #define _ADRPT4 0x10
2124 #define _ADRPT5 0x20
2125 #define _ADRPT6 0x40
2126 #define _ADRPT7 0x80
2128 //==============================================================================
2130 extern __at(0x010E) __sfr ADLTH
;
2132 //==============================================================================
2135 extern __at(0x010E) __sfr ADLTHL
;
2139 unsigned ADLTH0
: 1;
2140 unsigned ADLTH1
: 1;
2141 unsigned ADLTH2
: 1;
2142 unsigned ADLTH3
: 1;
2143 unsigned ADLTH4
: 1;
2144 unsigned ADLTH5
: 1;
2145 unsigned ADLTH6
: 1;
2146 unsigned ADLTH7
: 1;
2149 extern __at(0x010E) volatile __ADLTHLbits_t ADLTHLbits
;
2151 #define _ADLTH0 0x01
2152 #define _ADLTH1 0x02
2153 #define _ADLTH2 0x04
2154 #define _ADLTH3 0x08
2155 #define _ADLTH4 0x10
2156 #define _ADLTH5 0x20
2157 #define _ADLTH6 0x40
2158 #define _ADLTH7 0x80
2160 //==============================================================================
2163 //==============================================================================
2166 extern __at(0x010F) __sfr ADLTHH
;
2170 unsigned ADLTH8
: 1;
2171 unsigned ADLTH9
: 1;
2172 unsigned ADLTH10
: 1;
2173 unsigned ADLTH11
: 1;
2174 unsigned ADLTH12
: 1;
2175 unsigned ADLTH13
: 1;
2176 unsigned ADLTH14
: 1;
2177 unsigned ADLTH15
: 1;
2180 extern __at(0x010F) volatile __ADLTHHbits_t ADLTHHbits
;
2182 #define _ADLTH8 0x01
2183 #define _ADLTH9 0x02
2184 #define _ADLTH10 0x04
2185 #define _ADLTH11 0x08
2186 #define _ADLTH12 0x10
2187 #define _ADLTH13 0x20
2188 #define _ADLTH14 0x40
2189 #define _ADLTH15 0x80
2191 //==============================================================================
2193 extern __at(0x0110) __sfr ADUTH
;
2195 //==============================================================================
2198 extern __at(0x0110) __sfr ADUTHL
;
2202 unsigned ADUTH0
: 1;
2203 unsigned ADUTH1
: 1;
2204 unsigned ADUTH2
: 1;
2205 unsigned ADUTH3
: 1;
2206 unsigned ADUTH4
: 1;
2207 unsigned ADUTH5
: 1;
2208 unsigned ADUTH6
: 1;
2209 unsigned ADUTH7
: 1;
2212 extern __at(0x0110) volatile __ADUTHLbits_t ADUTHLbits
;
2214 #define _ADUTH0 0x01
2215 #define _ADUTH1 0x02
2216 #define _ADUTH2 0x04
2217 #define _ADUTH3 0x08
2218 #define _ADUTH4 0x10
2219 #define _ADUTH5 0x20
2220 #define _ADUTH6 0x40
2221 #define _ADUTH7 0x80
2223 //==============================================================================
2226 //==============================================================================
2229 extern __at(0x0111) __sfr ADUTHH
;
2233 unsigned ADUTH8
: 1;
2234 unsigned ADUTH9
: 1;
2235 unsigned ADUTH10
: 1;
2236 unsigned ADUTH11
: 1;
2237 unsigned ADUTH12
: 1;
2238 unsigned ADUTH13
: 1;
2239 unsigned ADUTH14
: 1;
2240 unsigned ADUTH15
: 1;
2243 extern __at(0x0111) volatile __ADUTHHbits_t ADUTHHbits
;
2245 #define _ADUTH8 0x01
2246 #define _ADUTH9 0x02
2247 #define _ADUTH10 0x04
2248 #define _ADUTH11 0x08
2249 #define _ADUTH12 0x10
2250 #define _ADUTH13 0x20
2251 #define _ADUTH14 0x40
2252 #define _ADUTH15 0x80
2254 //==============================================================================
2256 extern __at(0x0112) __sfr ADSTPT
;
2258 //==============================================================================
2261 extern __at(0x0112) __sfr ADSTPTL
;
2265 unsigned ADSTPT0
: 1;
2266 unsigned ADSTPT1
: 1;
2267 unsigned ADSTPT2
: 1;
2268 unsigned ADSTPT3
: 1;
2269 unsigned ADSTPT4
: 1;
2270 unsigned ADSTPT5
: 1;
2271 unsigned ADSTPT6
: 1;
2272 unsigned ADSTPT7
: 1;
2275 extern __at(0x0112) volatile __ADSTPTLbits_t ADSTPTLbits
;
2277 #define _ADSTPT0 0x01
2278 #define _ADSTPT1 0x02
2279 #define _ADSTPT2 0x04
2280 #define _ADSTPT3 0x08
2281 #define _ADSTPT4 0x10
2282 #define _ADSTPT5 0x20
2283 #define _ADSTPT6 0x40
2284 #define _ADSTPT7 0x80
2286 //==============================================================================
2289 //==============================================================================
2292 extern __at(0x0113) __sfr ADSTPTH
;
2296 unsigned ADSTPT8
: 1;
2297 unsigned ADSTPT9
: 1;
2298 unsigned ADSTPT10
: 1;
2299 unsigned ADSTPT11
: 1;
2300 unsigned ADSTPT12
: 1;
2301 unsigned ADSTPT13
: 1;
2302 unsigned ADSTPT14
: 1;
2303 unsigned ADSTPT15
: 1;
2306 extern __at(0x0113) volatile __ADSTPTHbits_t ADSTPTHbits
;
2308 #define _ADSTPT8 0x01
2309 #define _ADSTPT9 0x02
2310 #define _ADSTPT10 0x04
2311 #define _ADSTPT11 0x08
2312 #define _ADSTPT12 0x10
2313 #define _ADSTPT13 0x20
2314 #define _ADSTPT14 0x40
2315 #define _ADSTPT15 0x80
2317 //==============================================================================
2319 extern __at(0x0114) __sfr ADFLTR
;
2321 //==============================================================================
2324 extern __at(0x0114) __sfr ADFLTRL
;
2328 unsigned ADFLTR0
: 1;
2329 unsigned ADFLTR1
: 1;
2330 unsigned ADFLTR2
: 1;
2331 unsigned ADFLTR3
: 1;
2332 unsigned ADFLTR4
: 1;
2333 unsigned ADFLTR5
: 1;
2334 unsigned ADFLTR6
: 1;
2335 unsigned ADFLTR7
: 1;
2338 extern __at(0x0114) volatile __ADFLTRLbits_t ADFLTRLbits
;
2340 #define _ADFLTR0 0x01
2341 #define _ADFLTR1 0x02
2342 #define _ADFLTR2 0x04
2343 #define _ADFLTR3 0x08
2344 #define _ADFLTR4 0x10
2345 #define _ADFLTR5 0x20
2346 #define _ADFLTR6 0x40
2347 #define _ADFLTR7 0x80
2349 //==============================================================================
2352 //==============================================================================
2355 extern __at(0x0115) __sfr ADFLTRH
;
2359 unsigned ADFLTR8
: 1;
2360 unsigned ADFLTR9
: 1;
2361 unsigned ADFLTR10
: 1;
2362 unsigned ADFLTR11
: 1;
2363 unsigned ADFLTR12
: 1;
2364 unsigned ADFLTR13
: 1;
2365 unsigned ADFLTR14
: 1;
2366 unsigned ADFLTR15
: 1;
2369 extern __at(0x0115) volatile __ADFLTRHbits_t ADFLTRHbits
;
2371 #define _ADFLTR8 0x01
2372 #define _ADFLTR9 0x02
2373 #define _ADFLTR10 0x04
2374 #define _ADFLTR11 0x08
2375 #define _ADFLTR12 0x10
2376 #define _ADFLTR13 0x20
2377 #define _ADFLTR14 0x40
2378 #define _ADFLTR15 0x80
2380 //==============================================================================
2382 extern __at(0x0116) __sfr ADERR
;
2384 //==============================================================================
2387 extern __at(0x0116) __sfr ADERRL
;
2391 unsigned ADERR0
: 1;
2392 unsigned ADERR1
: 1;
2393 unsigned ADERR2
: 1;
2394 unsigned ADERR3
: 1;
2395 unsigned ADERR4
: 1;
2396 unsigned ADERR5
: 1;
2397 unsigned ADERR6
: 1;
2398 unsigned ADERR7
: 1;
2401 extern __at(0x0116) volatile __ADERRLbits_t ADERRLbits
;
2403 #define _ADERR0 0x01
2404 #define _ADERR1 0x02
2405 #define _ADERR2 0x04
2406 #define _ADERR3 0x08
2407 #define _ADERR4 0x10
2408 #define _ADERR5 0x20
2409 #define _ADERR6 0x40
2410 #define _ADERR7 0x80
2412 //==============================================================================
2415 //==============================================================================
2418 extern __at(0x0117) __sfr ADERRH
;
2422 unsigned ADERR8
: 1;
2423 unsigned ADERR9
: 1;
2424 unsigned ADERR10
: 1;
2425 unsigned ADERR11
: 1;
2426 unsigned ADERR12
: 1;
2427 unsigned ADERR13
: 1;
2428 unsigned ADERR14
: 1;
2429 unsigned ADERR15
: 1;
2432 extern __at(0x0117) volatile __ADERRHbits_t ADERRHbits
;
2434 #define _ADERR8 0x01
2435 #define _ADERR9 0x02
2436 #define _ADERR10 0x04
2437 #define _ADERR11 0x08
2438 #define _ADERR12 0x10
2439 #define _ADERR13 0x20
2440 #define _ADERR14 0x40
2441 #define _ADERR15 0x80
2443 //==============================================================================
2445 extern __at(0x0119) __sfr RC1REG
;
2446 extern __at(0x0119) __sfr RCREG
;
2447 extern __at(0x0119) __sfr RCREG1
;
2448 extern __at(0x011A) __sfr TX1REG
;
2449 extern __at(0x011A) __sfr TXREG
;
2450 extern __at(0x011A) __sfr TXREG1
;
2451 extern __at(0x011B) __sfr SP1BRG
;
2452 extern __at(0x011B) __sfr SP1BRGL
;
2453 extern __at(0x011B) __sfr SPBRG
;
2454 extern __at(0x011B) __sfr SPBRG1
;
2455 extern __at(0x011B) __sfr SPBRGL
;
2456 extern __at(0x011C) __sfr SP1BRGH
;
2457 extern __at(0x011C) __sfr SPBRGH
;
2458 extern __at(0x011C) __sfr SPBRGH1
;
2460 //==============================================================================
2463 extern __at(0x011D) __sfr RC1STA
;
2477 extern __at(0x011D) volatile __RC1STAbits_t RC1STAbits
;
2488 //==============================================================================
2491 //==============================================================================
2494 extern __at(0x011D) __sfr RCSTA
;
2508 extern __at(0x011D) volatile __RCSTAbits_t RCSTAbits
;
2510 #define _RCSTA_RX9D 0x01
2511 #define _RCSTA_OERR 0x02
2512 #define _RCSTA_FERR 0x04
2513 #define _RCSTA_ADDEN 0x08
2514 #define _RCSTA_CREN 0x10
2515 #define _RCSTA_SREN 0x20
2516 #define _RCSTA_RX9 0x40
2517 #define _RCSTA_SPEN 0x80
2519 //==============================================================================
2522 //==============================================================================
2525 extern __at(0x011D) __sfr RCSTA1
;
2539 extern __at(0x011D) volatile __RCSTA1bits_t RCSTA1bits
;
2541 #define _RCSTA1_RX9D 0x01
2542 #define _RCSTA1_OERR 0x02
2543 #define _RCSTA1_FERR 0x04
2544 #define _RCSTA1_ADDEN 0x08
2545 #define _RCSTA1_CREN 0x10
2546 #define _RCSTA1_SREN 0x20
2547 #define _RCSTA1_RX9 0x40
2548 #define _RCSTA1_SPEN 0x80
2550 //==============================================================================
2553 //==============================================================================
2556 extern __at(0x011E) __sfr TX1STA
;
2570 extern __at(0x011E) volatile __TX1STAbits_t TX1STAbits
;
2572 #define _TX1STA_TX9D 0x01
2573 #define _TX1STA_TRMT 0x02
2574 #define _TX1STA_BRGH 0x04
2575 #define _TX1STA_SENDB 0x08
2576 #define _TX1STA_SYNC 0x10
2577 #define _TX1STA_TXEN 0x20
2578 #define _TX1STA_TX9 0x40
2579 #define _TX1STA_CSRC 0x80
2581 //==============================================================================
2584 //==============================================================================
2587 extern __at(0x011E) __sfr TXSTA
;
2601 extern __at(0x011E) volatile __TXSTAbits_t TXSTAbits
;
2603 #define _TXSTA_TX9D 0x01
2604 #define _TXSTA_TRMT 0x02
2605 #define _TXSTA_BRGH 0x04
2606 #define _TXSTA_SENDB 0x08
2607 #define _TXSTA_SYNC 0x10
2608 #define _TXSTA_TXEN 0x20
2609 #define _TXSTA_TX9 0x40
2610 #define _TXSTA_CSRC 0x80
2612 //==============================================================================
2615 //==============================================================================
2618 extern __at(0x011E) __sfr TXSTA1
;
2632 extern __at(0x011E) volatile __TXSTA1bits_t TXSTA1bits
;
2634 #define _TXSTA1_TX9D 0x01
2635 #define _TXSTA1_TRMT 0x02
2636 #define _TXSTA1_BRGH 0x04
2637 #define _TXSTA1_SENDB 0x08
2638 #define _TXSTA1_SYNC 0x10
2639 #define _TXSTA1_TXEN 0x20
2640 #define _TXSTA1_TX9 0x40
2641 #define _TXSTA1_CSRC 0x80
2643 //==============================================================================
2646 //==============================================================================
2649 extern __at(0x011F) __sfr BAUD1CON
;
2660 unsigned ABDOVF
: 1;
2663 extern __at(0x011F) volatile __BAUD1CONbits_t BAUD1CONbits
;
2670 #define _ABDOVF 0x80
2672 //==============================================================================
2675 //==============================================================================
2678 extern __at(0x011F) __sfr BAUDCON
;
2689 unsigned ABDOVF
: 1;
2692 extern __at(0x011F) volatile __BAUDCONbits_t BAUDCONbits
;
2694 #define _BAUDCON_ABDEN 0x01
2695 #define _BAUDCON_WUE 0x02
2696 #define _BAUDCON_BRG16 0x08
2697 #define _BAUDCON_SCKP 0x10
2698 #define _BAUDCON_RCIDL 0x40
2699 #define _BAUDCON_ABDOVF 0x80
2701 //==============================================================================
2704 //==============================================================================
2707 extern __at(0x011F) __sfr BAUDCON1
;
2718 unsigned ABDOVF
: 1;
2721 extern __at(0x011F) volatile __BAUDCON1bits_t BAUDCON1bits
;
2723 #define _BAUDCON1_ABDEN 0x01
2724 #define _BAUDCON1_WUE 0x02
2725 #define _BAUDCON1_BRG16 0x08
2726 #define _BAUDCON1_SCKP 0x10
2727 #define _BAUDCON1_RCIDL 0x40
2728 #define _BAUDCON1_ABDOVF 0x80
2730 //==============================================================================
2733 //==============================================================================
2736 extern __at(0x011F) __sfr BAUDCTL
;
2747 unsigned ABDOVF
: 1;
2750 extern __at(0x011F) volatile __BAUDCTLbits_t BAUDCTLbits
;
2752 #define _BAUDCTL_ABDEN 0x01
2753 #define _BAUDCTL_WUE 0x02
2754 #define _BAUDCTL_BRG16 0x08
2755 #define _BAUDCTL_SCKP 0x10
2756 #define _BAUDCTL_RCIDL 0x40
2757 #define _BAUDCTL_ABDOVF 0x80
2759 //==============================================================================
2762 //==============================================================================
2765 extern __at(0x011F) __sfr BAUDCTL1
;
2776 unsigned ABDOVF
: 1;
2779 extern __at(0x011F) volatile __BAUDCTL1bits_t BAUDCTL1bits
;
2781 #define _BAUDCTL1_ABDEN 0x01
2782 #define _BAUDCTL1_WUE 0x02
2783 #define _BAUDCTL1_BRG16 0x08
2784 #define _BAUDCTL1_SCKP 0x10
2785 #define _BAUDCTL1_RCIDL 0x40
2786 #define _BAUDCTL1_ABDOVF 0x80
2788 //==============================================================================
2790 extern __at(0x018C) __sfr SSP1BUF
;
2791 extern __at(0x018D) __sfr SSP1ADD
;
2793 //==============================================================================
2796 extern __at(0x018E) __sfr SSP1MSK
;
2810 extern __at(0x018E) volatile __SSP1MSKbits_t SSP1MSKbits
;
2821 //==============================================================================
2824 //==============================================================================
2827 extern __at(0x018F) __sfr SSP1STAT
;
2835 unsigned R_NOT_W
: 1;
2838 unsigned D_NOT_A
: 1;
2848 unsigned I2C_START
: 1;
2849 unsigned I2C_STOP
: 1;
2871 unsigned NOT_WRITE
: 1;
2874 unsigned NOT_ADDRESS
: 1;
2883 unsigned READ_WRITE
: 1;
2886 unsigned DATA_ADDRESS
: 1;
2895 unsigned I2C_READ
: 1;
2898 unsigned I2C_DAT
: 1;
2904 extern __at(0x018F) volatile __SSP1STATbits_t SSP1STATbits
;
2908 #define _R_NOT_W 0x04
2911 #define _NOT_WRITE 0x04
2912 #define _READ_WRITE 0x04
2913 #define _I2C_READ 0x04
2915 #define _I2C_START 0x08
2917 #define _I2C_STOP 0x10
2918 #define _D_NOT_A 0x20
2921 #define _NOT_ADDRESS 0x20
2922 #define _DATA_ADDRESS 0x20
2923 #define _I2C_DAT 0x20
2927 //==============================================================================
2930 //==============================================================================
2933 extern __at(0x0190) __sfr SSP1CON1
;
2956 extern __at(0x0190) volatile __SSP1CON1bits_t SSP1CON1bits
;
2967 //==============================================================================
2970 //==============================================================================
2973 extern __at(0x0191) __sfr SSP1CON2
;
2985 unsigned ACKSTAT
: 1;
2992 unsigned ADMSK1
: 1;
2993 unsigned ADMSK2
: 1;
2994 unsigned ADMSK3
: 1;
2995 unsigned ADMSK4
: 1;
2996 unsigned ADMSK5
: 1;
3002 extern __at(0x0191) volatile __SSP1CON2bits_t SSP1CON2bits
;
3006 #define _ADMSK1 0x02
3008 #define _ADMSK2 0x04
3010 #define _ADMSK3 0x08
3012 #define _ADMSK4 0x10
3014 #define _ADMSK5 0x20
3015 #define _ACKSTAT 0x40
3018 //==============================================================================
3021 //==============================================================================
3024 extern __at(0x0192) __sfr SSP1CON3
;
3035 unsigned ACKTIM
: 1;
3038 extern __at(0x0192) volatile __SSP1CON3bits_t SSP1CON3bits
;
3047 #define _ACKTIM 0x80
3049 //==============================================================================
3051 extern __at(0x0196) __sfr SSP2BUF
;
3052 extern __at(0x0197) __sfr SSP2ADD
;
3054 //==============================================================================
3057 extern __at(0x0198) __sfr SSP2MSK
;
3071 extern __at(0x0198) volatile __SSP2MSKbits_t SSP2MSKbits
;
3073 #define _SSP2MSK_MSK0 0x01
3074 #define _SSP2MSK_MSK1 0x02
3075 #define _SSP2MSK_MSK2 0x04
3076 #define _SSP2MSK_MSK3 0x08
3077 #define _SSP2MSK_MSK4 0x10
3078 #define _SSP2MSK_MSK5 0x20
3079 #define _SSP2MSK_MSK6 0x40
3080 #define _SSP2MSK_MSK7 0x80
3082 //==============================================================================
3085 //==============================================================================
3088 extern __at(0x0199) __sfr SSP2STAT
;
3096 unsigned R_NOT_W
: 1;
3099 unsigned D_NOT_A
: 1;
3109 unsigned I2C_START
: 1;
3110 unsigned I2C_STOP
: 1;
3132 unsigned NOT_WRITE
: 1;
3135 unsigned NOT_ADDRESS
: 1;
3144 unsigned READ_WRITE
: 1;
3147 unsigned DATA_ADDRESS
: 1;
3156 unsigned I2C_READ
: 1;
3159 unsigned I2C_DAT
: 1;
3165 extern __at(0x0199) volatile __SSP2STATbits_t SSP2STATbits
;
3167 #define _SSP2STAT_BF 0x01
3168 #define _SSP2STAT_UA 0x02
3169 #define _SSP2STAT_R_NOT_W 0x04
3170 #define _SSP2STAT_R_W 0x04
3171 #define _SSP2STAT_NOT_W 0x04
3172 #define _SSP2STAT_NOT_WRITE 0x04
3173 #define _SSP2STAT_READ_WRITE 0x04
3174 #define _SSP2STAT_I2C_READ 0x04
3175 #define _SSP2STAT_S 0x08
3176 #define _SSP2STAT_I2C_START 0x08
3177 #define _SSP2STAT_P 0x10
3178 #define _SSP2STAT_I2C_STOP 0x10
3179 #define _SSP2STAT_D_NOT_A 0x20
3180 #define _SSP2STAT_D_A 0x20
3181 #define _SSP2STAT_NOT_A 0x20
3182 #define _SSP2STAT_NOT_ADDRESS 0x20
3183 #define _SSP2STAT_DATA_ADDRESS 0x20
3184 #define _SSP2STAT_I2C_DAT 0x20
3185 #define _SSP2STAT_CKE 0x40
3186 #define _SSP2STAT_SMP 0x80
3188 //==============================================================================
3191 //==============================================================================
3194 extern __at(0x019A) __sfr SSP2CON1
;
3217 extern __at(0x019A) volatile __SSP2CON1bits_t SSP2CON1bits
;
3219 #define _SSP2CON1_SSPM0 0x01
3220 #define _SSP2CON1_SSPM1 0x02
3221 #define _SSP2CON1_SSPM2 0x04
3222 #define _SSP2CON1_SSPM3 0x08
3223 #define _SSP2CON1_CKP 0x10
3224 #define _SSP2CON1_SSPEN 0x20
3225 #define _SSP2CON1_SSPOV 0x40
3226 #define _SSP2CON1_WCOL 0x80
3228 //==============================================================================
3231 //==============================================================================
3234 extern __at(0x019B) __sfr SSP2CON2
;
3246 unsigned ACKSTAT
: 1;
3253 unsigned ADMSK1
: 1;
3254 unsigned ADMSK2
: 1;
3255 unsigned ADMSK3
: 1;
3256 unsigned ADMSK4
: 1;
3257 unsigned ADMSK5
: 1;
3263 extern __at(0x019B) volatile __SSP2CON2bits_t SSP2CON2bits
;
3265 #define _SSP2CON2_SEN 0x01
3266 #define _SSP2CON2_RSEN 0x02
3267 #define _SSP2CON2_ADMSK1 0x02
3268 #define _SSP2CON2_PEN 0x04
3269 #define _SSP2CON2_ADMSK2 0x04
3270 #define _SSP2CON2_RCEN 0x08
3271 #define _SSP2CON2_ADMSK3 0x08
3272 #define _SSP2CON2_ACKEN 0x10
3273 #define _SSP2CON2_ADMSK4 0x10
3274 #define _SSP2CON2_ACKDT 0x20
3275 #define _SSP2CON2_ADMSK5 0x20
3276 #define _SSP2CON2_ACKSTAT 0x40
3277 #define _SSP2CON2_GCEN 0x80
3279 //==============================================================================
3282 //==============================================================================
3285 extern __at(0x019C) __sfr SSP2CON3
;
3296 unsigned ACKTIM
: 1;
3299 extern __at(0x019C) volatile __SSP2CON3bits_t SSP2CON3bits
;
3301 #define _SSP2CON3_DHEN 0x01
3302 #define _SSP2CON3_AHEN 0x02
3303 #define _SSP2CON3_SBCDE 0x04
3304 #define _SSP2CON3_SDAHT 0x08
3305 #define _SSP2CON3_BOEN 0x10
3306 #define _SSP2CON3_SCIE 0x20
3307 #define _SSP2CON3_PCIE 0x40
3308 #define _SSP2CON3_ACKTIM 0x80
3310 //==============================================================================
3313 //==============================================================================
3316 extern __at(0x020C) __sfr TMR1L
;
3320 unsigned TMR1L0
: 1;
3321 unsigned TMR1L1
: 1;
3322 unsigned TMR1L2
: 1;
3323 unsigned TMR1L3
: 1;
3324 unsigned TMR1L4
: 1;
3325 unsigned TMR1L5
: 1;
3326 unsigned TMR1L6
: 1;
3327 unsigned TMR1L7
: 1;
3330 extern __at(0x020C) volatile __TMR1Lbits_t TMR1Lbits
;
3332 #define _TMR1L0 0x01
3333 #define _TMR1L1 0x02
3334 #define _TMR1L2 0x04
3335 #define _TMR1L3 0x08
3336 #define _TMR1L4 0x10
3337 #define _TMR1L5 0x20
3338 #define _TMR1L6 0x40
3339 #define _TMR1L7 0x80
3341 //==============================================================================
3344 //==============================================================================
3347 extern __at(0x020D) __sfr TMR1H
;
3351 unsigned TMR1H0
: 1;
3352 unsigned TMR1H1
: 1;
3353 unsigned TMR1H2
: 1;
3354 unsigned TMR1H3
: 1;
3355 unsigned TMR1H4
: 1;
3356 unsigned TMR1H5
: 1;
3357 unsigned TMR1H6
: 1;
3358 unsigned TMR1H7
: 1;
3361 extern __at(0x020D) volatile __TMR1Hbits_t TMR1Hbits
;
3363 #define _TMR1H0 0x01
3364 #define _TMR1H1 0x02
3365 #define _TMR1H2 0x04
3366 #define _TMR1H3 0x08
3367 #define _TMR1H4 0x10
3368 #define _TMR1H5 0x20
3369 #define _TMR1H6 0x40
3370 #define _TMR1H7 0x80
3372 //==============================================================================
3375 //==============================================================================
3378 extern __at(0x020E) __sfr T1CON
;
3386 unsigned NOT_SYNC
: 1;
3388 unsigned T1CKPS0
: 1;
3389 unsigned T1CKPS1
: 1;
3396 unsigned TMR1ON
: 1;
3397 unsigned T1RD16
: 1;
3398 unsigned NOT_T1SYNC
: 1;
3416 unsigned T1CKPS
: 2;
3421 extern __at(0x020E) volatile __T1CONbits_t T1CONbits
;
3423 #define _T1CON_ON 0x01
3424 #define _T1CON_TMR1ON 0x01
3425 #define _T1CON_RD16 0x02
3426 #define _T1CON_T1RD16 0x02
3427 #define _T1CON_NOT_SYNC 0x04
3428 #define _T1CON_NOT_T1SYNC 0x04
3429 #define _T1CON_T1CKPS0 0x10
3430 #define _T1CON_CKPS0 0x10
3431 #define _T1CON_T1CKPS1 0x20
3432 #define _T1CON_CKPS1 0x20
3434 //==============================================================================
3437 //==============================================================================
3440 extern __at(0x020F) __sfr PR1
;
3449 unsigned GGO_NOT_DONE
: 1;
3460 unsigned T1GVAL
: 1;
3461 unsigned T1GGO_NOT_DONE
: 1;
3462 unsigned T1GSPM
: 1;
3464 unsigned T1GPOL
: 1;
3481 extern __at(0x020F) volatile __PR1bits_t PR1bits
;
3484 #define _T1GVAL 0x04
3485 #define _GGO_NOT_DONE 0x08
3486 #define _T1GGO_NOT_DONE 0x08
3489 #define _T1GSPM 0x10
3493 #define _T1GPOL 0x40
3497 //==============================================================================
3500 //==============================================================================
3503 extern __at(0x020F) __sfr T1GCON
;
3512 unsigned GGO_NOT_DONE
: 1;
3523 unsigned T1GVAL
: 1;
3524 unsigned T1GGO_NOT_DONE
: 1;
3525 unsigned T1GSPM
: 1;
3527 unsigned T1GPOL
: 1;
3544 extern __at(0x020F) volatile __T1GCONbits_t T1GCONbits
;
3546 #define _T1GCON_GVAL 0x04
3547 #define _T1GCON_T1GVAL 0x04
3548 #define _T1GCON_GGO_NOT_DONE 0x08
3549 #define _T1GCON_T1GGO_NOT_DONE 0x08
3550 #define _T1GCON_T1GGO 0x08
3551 #define _T1GCON_GSPM 0x10
3552 #define _T1GCON_T1GSPM 0x10
3553 #define _T1GCON_GTM 0x20
3554 #define _T1GCON_T1GTM 0x20
3555 #define _T1GCON_GPOL 0x40
3556 #define _T1GCON_T1GPOL 0x40
3557 #define _T1GCON_GE 0x80
3558 #define _T1GCON_T1GE 0x80
3560 //==============================================================================
3563 //==============================================================================
3566 extern __at(0x0210) __sfr T1GATE
;
3584 unsigned T1GSS0
: 1;
3585 unsigned T1GSS1
: 1;
3586 unsigned T1GSS2
: 1;
3587 unsigned T1GSS3
: 1;
3588 unsigned T1GSS4
: 1;
3607 extern __at(0x0210) volatile __T1GATEbits_t T1GATEbits
;
3610 #define _T1GSS0 0x01
3612 #define _T1GSS1 0x02
3614 #define _T1GSS2 0x04
3616 #define _T1GSS3 0x08
3618 #define _T1GSS4 0x10
3620 //==============================================================================
3623 //==============================================================================
3626 extern __at(0x0210) __sfr TMR1GATE
;
3644 unsigned T1GSS0
: 1;
3645 unsigned T1GSS1
: 1;
3646 unsigned T1GSS2
: 1;
3647 unsigned T1GSS3
: 1;
3648 unsigned T1GSS4
: 1;
3667 extern __at(0x0210) volatile __TMR1GATEbits_t TMR1GATEbits
;
3669 #define _TMR1GATE_GSS0 0x01
3670 #define _TMR1GATE_T1GSS0 0x01
3671 #define _TMR1GATE_GSS1 0x02
3672 #define _TMR1GATE_T1GSS1 0x02
3673 #define _TMR1GATE_GSS2 0x04
3674 #define _TMR1GATE_T1GSS2 0x04
3675 #define _TMR1GATE_GSS3 0x08
3676 #define _TMR1GATE_T1GSS3 0x08
3677 #define _TMR1GATE_GSS4 0x10
3678 #define _TMR1GATE_T1GSS4 0x10
3680 //==============================================================================
3683 //==============================================================================
3686 extern __at(0x0211) __sfr T1CLK
;
3727 extern __at(0x0211) volatile __T1CLKbits_t T1CLKbits
;
3738 //==============================================================================
3741 //==============================================================================
3744 extern __at(0x0211) __sfr TMR1CLK
;
3785 extern __at(0x0211) volatile __TMR1CLKbits_t TMR1CLKbits
;
3787 #define _TMR1CLK_T1CS0 0x01
3788 #define _TMR1CLK_CS0 0x01
3789 #define _TMR1CLK_T1CS1 0x02
3790 #define _TMR1CLK_CS1 0x02
3791 #define _TMR1CLK_T1CS2 0x04
3792 #define _TMR1CLK_CS2 0x04
3793 #define _TMR1CLK_T1CS3 0x08
3794 #define _TMR1CLK_CS3 0x08
3796 //==============================================================================
3799 //==============================================================================
3802 extern __at(0x0212) __sfr TMR3L
;
3806 unsigned TMR3L0
: 1;
3807 unsigned TMR3L1
: 1;
3808 unsigned TMR3L2
: 1;
3809 unsigned TMR3L3
: 1;
3810 unsigned TMR3L4
: 1;
3811 unsigned TMR3L5
: 1;
3812 unsigned TMR3L6
: 1;
3813 unsigned TMR3L7
: 1;
3816 extern __at(0x0212) volatile __TMR3Lbits_t TMR3Lbits
;
3818 #define _TMR3L0 0x01
3819 #define _TMR3L1 0x02
3820 #define _TMR3L2 0x04
3821 #define _TMR3L3 0x08
3822 #define _TMR3L4 0x10
3823 #define _TMR3L5 0x20
3824 #define _TMR3L6 0x40
3825 #define _TMR3L7 0x80
3827 //==============================================================================
3830 //==============================================================================
3833 extern __at(0x0213) __sfr TMR3H
;
3837 unsigned TMR3H0
: 1;
3838 unsigned TMR3H1
: 1;
3839 unsigned TMR3H2
: 1;
3840 unsigned TMR3H3
: 1;
3841 unsigned TMR3H4
: 1;
3842 unsigned TMR3H5
: 1;
3843 unsigned TMR3H6
: 1;
3844 unsigned TMR3H7
: 1;
3847 extern __at(0x0213) volatile __TMR3Hbits_t TMR3Hbits
;
3849 #define _TMR3H0 0x01
3850 #define _TMR3H1 0x02
3851 #define _TMR3H2 0x04
3852 #define _TMR3H3 0x08
3853 #define _TMR3H4 0x10
3854 #define _TMR3H5 0x20
3855 #define _TMR3H6 0x40
3856 #define _TMR3H7 0x80
3858 //==============================================================================
3861 //==============================================================================
3864 extern __at(0x0214) __sfr T3CON
;
3872 unsigned NOT_SYNC
: 1;
3874 unsigned T3CKPS0
: 1;
3875 unsigned T3CKPS1
: 1;
3882 unsigned TMR3ON
: 1;
3883 unsigned T3RD16
: 1;
3884 unsigned NOT_T3SYNC
: 1;
3902 unsigned T3CKPS
: 2;
3907 extern __at(0x0214) volatile __T3CONbits_t T3CONbits
;
3909 #define _T3CON_ON 0x01
3910 #define _T3CON_TMR3ON 0x01
3911 #define _T3CON_RD16 0x02
3912 #define _T3CON_T3RD16 0x02
3913 #define _T3CON_NOT_SYNC 0x04
3914 #define _T3CON_NOT_T3SYNC 0x04
3915 #define _T3CON_T3CKPS0 0x10
3916 #define _T3CON_CKPS0 0x10
3917 #define _T3CON_T3CKPS1 0x20
3918 #define _T3CON_CKPS1 0x20
3920 //==============================================================================
3923 //==============================================================================
3926 extern __at(0x0215) __sfr PR3
;
3935 unsigned GGO_NOT_DONE
: 1;
3946 unsigned T3GVAL
: 1;
3947 unsigned T3GGO_NOT_DONE
: 1;
3948 unsigned T3GSPM
: 1;
3950 unsigned T3GPOL
: 1;
3967 extern __at(0x0215) volatile __PR3bits_t PR3bits
;
3969 #define _PR3_GVAL 0x04
3970 #define _PR3_T3GVAL 0x04
3971 #define _PR3_GGO_NOT_DONE 0x08
3972 #define _PR3_T3GGO_NOT_DONE 0x08
3973 #define _PR3_T3GGO 0x08
3974 #define _PR3_GSPM 0x10
3975 #define _PR3_T3GSPM 0x10
3976 #define _PR3_GTM 0x20
3977 #define _PR3_T3GTM 0x20
3978 #define _PR3_GPOL 0x40
3979 #define _PR3_T3GPOL 0x40
3980 #define _PR3_GE 0x80
3981 #define _PR3_T3GE 0x80
3983 //==============================================================================
3986 //==============================================================================
3989 extern __at(0x0215) __sfr T3GCON
;
3998 unsigned GGO_NOT_DONE
: 1;
4009 unsigned T3GVAL
: 1;
4010 unsigned T3GGO_NOT_DONE
: 1;
4011 unsigned T3GSPM
: 1;
4013 unsigned T3GPOL
: 1;
4030 extern __at(0x0215) volatile __T3GCONbits_t T3GCONbits
;
4032 #define _T3GCON_GVAL 0x04
4033 #define _T3GCON_T3GVAL 0x04
4034 #define _T3GCON_GGO_NOT_DONE 0x08
4035 #define _T3GCON_T3GGO_NOT_DONE 0x08
4036 #define _T3GCON_T3GGO 0x08
4037 #define _T3GCON_GSPM 0x10
4038 #define _T3GCON_T3GSPM 0x10
4039 #define _T3GCON_GTM 0x20
4040 #define _T3GCON_T3GTM 0x20
4041 #define _T3GCON_GPOL 0x40
4042 #define _T3GCON_T3GPOL 0x40
4043 #define _T3GCON_GE 0x80
4044 #define _T3GCON_T3GE 0x80
4046 //==============================================================================
4049 //==============================================================================
4052 extern __at(0x0216) __sfr T3GATE
;
4070 unsigned T3GSS0
: 1;
4071 unsigned T3GSS1
: 1;
4072 unsigned T3GSS2
: 1;
4073 unsigned T3GSS3
: 1;
4074 unsigned T3GSS4
: 1;
4093 extern __at(0x0216) volatile __T3GATEbits_t T3GATEbits
;
4095 #define _T3GATE_GSS0 0x01
4096 #define _T3GATE_T3GSS0 0x01
4097 #define _T3GATE_GSS1 0x02
4098 #define _T3GATE_T3GSS1 0x02
4099 #define _T3GATE_GSS2 0x04
4100 #define _T3GATE_T3GSS2 0x04
4101 #define _T3GATE_GSS3 0x08
4102 #define _T3GATE_T3GSS3 0x08
4103 #define _T3GATE_GSS4 0x10
4104 #define _T3GATE_T3GSS4 0x10
4106 //==============================================================================
4109 //==============================================================================
4112 extern __at(0x0216) __sfr TMR3GATE
;
4130 unsigned T3GSS0
: 1;
4131 unsigned T3GSS1
: 1;
4132 unsigned T3GSS2
: 1;
4133 unsigned T3GSS3
: 1;
4134 unsigned T3GSS4
: 1;
4153 extern __at(0x0216) volatile __TMR3GATEbits_t TMR3GATEbits
;
4155 #define _TMR3GATE_GSS0 0x01
4156 #define _TMR3GATE_T3GSS0 0x01
4157 #define _TMR3GATE_GSS1 0x02
4158 #define _TMR3GATE_T3GSS1 0x02
4159 #define _TMR3GATE_GSS2 0x04
4160 #define _TMR3GATE_T3GSS2 0x04
4161 #define _TMR3GATE_GSS3 0x08
4162 #define _TMR3GATE_T3GSS3 0x08
4163 #define _TMR3GATE_GSS4 0x10
4164 #define _TMR3GATE_T3GSS4 0x10
4166 //==============================================================================
4169 //==============================================================================
4172 extern __at(0x0217) __sfr T3CLK
;
4213 extern __at(0x0217) volatile __T3CLKbits_t T3CLKbits
;
4215 #define _T3CLK_T3CS0 0x01
4216 #define _T3CLK_CS0 0x01
4217 #define _T3CLK_T3CS1 0x02
4218 #define _T3CLK_CS1 0x02
4219 #define _T3CLK_T3CS2 0x04
4220 #define _T3CLK_CS2 0x04
4221 #define _T3CLK_T3CS3 0x08
4222 #define _T3CLK_CS3 0x08
4224 //==============================================================================
4227 //==============================================================================
4230 extern __at(0x0217) __sfr TMR3CLK
;
4271 extern __at(0x0217) volatile __TMR3CLKbits_t TMR3CLKbits
;
4273 #define _TMR3CLK_T3CS0 0x01
4274 #define _TMR3CLK_CS0 0x01
4275 #define _TMR3CLK_T3CS1 0x02
4276 #define _TMR3CLK_CS1 0x02
4277 #define _TMR3CLK_T3CS2 0x04
4278 #define _TMR3CLK_CS2 0x04
4279 #define _TMR3CLK_T3CS3 0x08
4280 #define _TMR3CLK_CS3 0x08
4282 //==============================================================================
4285 //==============================================================================
4288 extern __at(0x0218) __sfr TMR5L
;
4292 unsigned TMR5L0
: 1;
4293 unsigned TMR5L1
: 1;
4294 unsigned TMR5L2
: 1;
4295 unsigned TMR5L3
: 1;
4296 unsigned TMR5L4
: 1;
4297 unsigned TMR5L5
: 1;
4298 unsigned TMR5L6
: 1;
4299 unsigned TMR5L7
: 1;
4302 extern __at(0x0218) volatile __TMR5Lbits_t TMR5Lbits
;
4304 #define _TMR5L0 0x01
4305 #define _TMR5L1 0x02
4306 #define _TMR5L2 0x04
4307 #define _TMR5L3 0x08
4308 #define _TMR5L4 0x10
4309 #define _TMR5L5 0x20
4310 #define _TMR5L6 0x40
4311 #define _TMR5L7 0x80
4313 //==============================================================================
4316 //==============================================================================
4319 extern __at(0x0219) __sfr TMR5H
;
4323 unsigned TMR5H0
: 1;
4324 unsigned TMR5H1
: 1;
4325 unsigned TMR5H2
: 1;
4326 unsigned TMR5H3
: 1;
4327 unsigned TMR5H4
: 1;
4328 unsigned TMR5H5
: 1;
4329 unsigned TMR5H6
: 1;
4330 unsigned TMR5H7
: 1;
4333 extern __at(0x0219) volatile __TMR5Hbits_t TMR5Hbits
;
4335 #define _TMR5H0 0x01
4336 #define _TMR5H1 0x02
4337 #define _TMR5H2 0x04
4338 #define _TMR5H3 0x08
4339 #define _TMR5H4 0x10
4340 #define _TMR5H5 0x20
4341 #define _TMR5H6 0x40
4342 #define _TMR5H7 0x80
4344 //==============================================================================
4347 //==============================================================================
4350 extern __at(0x021A) __sfr T5CON
;
4358 unsigned NOT_SYNC
: 1;
4360 unsigned T5CKPS0
: 1;
4361 unsigned T5CKPS1
: 1;
4368 unsigned TMR5ON
: 1;
4369 unsigned T5RD16
: 1;
4370 unsigned NOT_T5SYNC
: 1;
4388 unsigned T5CKPS
: 2;
4393 extern __at(0x021A) volatile __T5CONbits_t T5CONbits
;
4395 #define _T5CON_ON 0x01
4396 #define _T5CON_TMR5ON 0x01
4397 #define _T5CON_RD16 0x02
4398 #define _T5CON_T5RD16 0x02
4399 #define _T5CON_NOT_SYNC 0x04
4400 #define _T5CON_NOT_T5SYNC 0x04
4401 #define _T5CON_T5CKPS0 0x10
4402 #define _T5CON_CKPS0 0x10
4403 #define _T5CON_T5CKPS1 0x20
4404 #define _T5CON_CKPS1 0x20
4406 //==============================================================================
4409 //==============================================================================
4412 extern __at(0x021B) __sfr PR5
;
4421 unsigned GGO_NOT_DONE
: 1;
4432 unsigned T5GVAL
: 1;
4433 unsigned T5GGO_NOT_DONE
: 1;
4434 unsigned T5GSPM
: 1;
4436 unsigned T5GPOL
: 1;
4453 extern __at(0x021B) volatile __PR5bits_t PR5bits
;
4455 #define _PR5_GVAL 0x04
4456 #define _PR5_T5GVAL 0x04
4457 #define _PR5_GGO_NOT_DONE 0x08
4458 #define _PR5_T5GGO_NOT_DONE 0x08
4459 #define _PR5_T5GGO 0x08
4460 #define _PR5_GSPM 0x10
4461 #define _PR5_T5GSPM 0x10
4462 #define _PR5_GTM 0x20
4463 #define _PR5_T5GTM 0x20
4464 #define _PR5_GPOL 0x40
4465 #define _PR5_T5GPOL 0x40
4466 #define _PR5_GE 0x80
4467 #define _PR5_T5GE 0x80
4469 //==============================================================================
4472 //==============================================================================
4475 extern __at(0x021B) __sfr T5GCON
;
4484 unsigned GGO_NOT_DONE
: 1;
4495 unsigned T5GVAL
: 1;
4496 unsigned T5GGO_NOT_DONE
: 1;
4497 unsigned T5GSPM
: 1;
4499 unsigned T5GPOL
: 1;
4516 extern __at(0x021B) volatile __T5GCONbits_t T5GCONbits
;
4518 #define _T5GCON_GVAL 0x04
4519 #define _T5GCON_T5GVAL 0x04
4520 #define _T5GCON_GGO_NOT_DONE 0x08
4521 #define _T5GCON_T5GGO_NOT_DONE 0x08
4522 #define _T5GCON_T5GGO 0x08
4523 #define _T5GCON_GSPM 0x10
4524 #define _T5GCON_T5GSPM 0x10
4525 #define _T5GCON_GTM 0x20
4526 #define _T5GCON_T5GTM 0x20
4527 #define _T5GCON_GPOL 0x40
4528 #define _T5GCON_T5GPOL 0x40
4529 #define _T5GCON_GE 0x80
4530 #define _T5GCON_T5GE 0x80
4532 //==============================================================================
4535 //==============================================================================
4538 extern __at(0x021C) __sfr T5GATE
;
4556 unsigned T5GSS0
: 1;
4557 unsigned T5GSS1
: 1;
4558 unsigned T5GSS2
: 1;
4559 unsigned T5GSS3
: 1;
4560 unsigned T5GSS4
: 1;
4579 extern __at(0x021C) volatile __T5GATEbits_t T5GATEbits
;
4581 #define _T5GATE_GSS0 0x01
4582 #define _T5GATE_T5GSS0 0x01
4583 #define _T5GATE_GSS1 0x02
4584 #define _T5GATE_T5GSS1 0x02
4585 #define _T5GATE_GSS2 0x04
4586 #define _T5GATE_T5GSS2 0x04
4587 #define _T5GATE_GSS3 0x08
4588 #define _T5GATE_T5GSS3 0x08
4589 #define _T5GATE_GSS4 0x10
4590 #define _T5GATE_T5GSS4 0x10
4592 //==============================================================================
4595 //==============================================================================
4598 extern __at(0x021C) __sfr TMR5GATE
;
4616 unsigned T5GSS0
: 1;
4617 unsigned T5GSS1
: 1;
4618 unsigned T5GSS2
: 1;
4619 unsigned T5GSS3
: 1;
4620 unsigned T5GSS4
: 1;
4639 extern __at(0x021C) volatile __TMR5GATEbits_t TMR5GATEbits
;
4641 #define _TMR5GATE_GSS0 0x01
4642 #define _TMR5GATE_T5GSS0 0x01
4643 #define _TMR5GATE_GSS1 0x02
4644 #define _TMR5GATE_T5GSS1 0x02
4645 #define _TMR5GATE_GSS2 0x04
4646 #define _TMR5GATE_T5GSS2 0x04
4647 #define _TMR5GATE_GSS3 0x08
4648 #define _TMR5GATE_T5GSS3 0x08
4649 #define _TMR5GATE_GSS4 0x10
4650 #define _TMR5GATE_T5GSS4 0x10
4652 //==============================================================================
4655 //==============================================================================
4658 extern __at(0x021D) __sfr T5CLK
;
4699 extern __at(0x021D) volatile __T5CLKbits_t T5CLKbits
;
4701 #define _T5CLK_T5CS0 0x01
4702 #define _T5CLK_CS0 0x01
4703 #define _T5CLK_T5CS1 0x02
4704 #define _T5CLK_CS1 0x02
4705 #define _T5CLK_T5CS2 0x04
4706 #define _T5CLK_CS2 0x04
4707 #define _T5CLK_T5CS3 0x08
4708 #define _T5CLK_CS3 0x08
4710 //==============================================================================
4713 //==============================================================================
4716 extern __at(0x021D) __sfr TMR5CLK
;
4757 extern __at(0x021D) volatile __TMR5CLKbits_t TMR5CLKbits
;
4759 #define _TMR5CLK_T5CS0 0x01
4760 #define _TMR5CLK_CS0 0x01
4761 #define _TMR5CLK_T5CS1 0x02
4762 #define _TMR5CLK_CS1 0x02
4763 #define _TMR5CLK_T5CS2 0x04
4764 #define _TMR5CLK_CS2 0x04
4765 #define _TMR5CLK_T5CS3 0x08
4766 #define _TMR5CLK_CS3 0x08
4768 //==============================================================================
4771 //==============================================================================
4774 extern __at(0x021E) __sfr CCPTMRS0
;
4780 unsigned C1TSEL0
: 1;
4781 unsigned C1TSEL1
: 1;
4782 unsigned C2TSEL0
: 1;
4783 unsigned C2TSEL1
: 1;
4784 unsigned C3TSEL0
: 1;
4785 unsigned C3TSEL1
: 1;
4786 unsigned C4TSEL0
: 1;
4787 unsigned C4TSEL1
: 1;
4792 unsigned C1TSEL
: 2;
4799 unsigned C2TSEL
: 2;
4806 unsigned C3TSEL
: 2;
4813 unsigned C4TSEL
: 2;
4817 extern __at(0x021E) volatile __CCPTMRS0bits_t CCPTMRS0bits
;
4819 #define _C1TSEL0 0x01
4820 #define _C1TSEL1 0x02
4821 #define _C2TSEL0 0x04
4822 #define _C2TSEL1 0x08
4823 #define _C3TSEL0 0x10
4824 #define _C3TSEL1 0x20
4825 #define _C4TSEL0 0x40
4826 #define _C4TSEL1 0x80
4828 //==============================================================================
4831 //==============================================================================
4834 extern __at(0x021F) __sfr CCPTMRS1
;
4840 unsigned C5TSEL0
: 1;
4841 unsigned C5TSEL1
: 1;
4842 unsigned P6TSEL0
: 1;
4843 unsigned P6TSEL1
: 1;
4844 unsigned P7TSEL0
: 1;
4845 unsigned P7TSEL1
: 1;
4852 unsigned C5TSEL
: 2;
4859 unsigned P6TSEL
: 2;
4866 unsigned P7TSEL
: 2;
4871 extern __at(0x021F) volatile __CCPTMRS1bits_t CCPTMRS1bits
;
4873 #define _C5TSEL0 0x01
4874 #define _C5TSEL1 0x02
4875 #define _P6TSEL0 0x04
4876 #define _P6TSEL1 0x08
4877 #define _P7TSEL0 0x10
4878 #define _P7TSEL1 0x20
4880 //==============================================================================
4882 extern __at(0x028C) __sfr T2TMR
;
4883 extern __at(0x028C) __sfr TMR2
;
4884 extern __at(0x028D) __sfr PR2
;
4885 extern __at(0x028D) __sfr T2PR
;
4887 //==============================================================================
4890 extern __at(0x028E) __sfr T2CON
;
4896 unsigned T2OUTPS0
: 1;
4897 unsigned T2OUTPS1
: 1;
4898 unsigned T2OUTPS2
: 1;
4899 unsigned T2OUTPS3
: 1;
4900 unsigned T2CKPS0
: 1;
4901 unsigned T2CKPS1
: 1;
4902 unsigned T2CKPS2
: 1;
4908 unsigned OUTPS0
: 1;
4909 unsigned OUTPS1
: 1;
4910 unsigned OUTPS2
: 1;
4911 unsigned OUTPS3
: 1;
4927 unsigned TMR2ON
: 1;
4938 unsigned T2OUTPS
: 4;
4952 unsigned T2CKPS
: 3;
4957 extern __at(0x028E) volatile __T2CONbits_t T2CONbits
;
4959 #define _T2CON_T2OUTPS0 0x01
4960 #define _T2CON_OUTPS0 0x01
4961 #define _T2CON_T2OUTPS1 0x02
4962 #define _T2CON_OUTPS1 0x02
4963 #define _T2CON_T2OUTPS2 0x04
4964 #define _T2CON_OUTPS2 0x04
4965 #define _T2CON_T2OUTPS3 0x08
4966 #define _T2CON_OUTPS3 0x08
4967 #define _T2CON_T2CKPS0 0x10
4968 #define _T2CON_CKPS0 0x10
4969 #define _T2CON_T2CKPS1 0x20
4970 #define _T2CON_CKPS1 0x20
4971 #define _T2CON_T2CKPS2 0x40
4972 #define _T2CON_CKPS2 0x40
4973 #define _T2CON_ON 0x80
4974 #define _T2CON_T2ON 0x80
4975 #define _T2CON_TMR2ON 0x80
4977 //==============================================================================
4980 //==============================================================================
4983 extern __at(0x028F) __sfr T2HLT
;
4994 unsigned CKSYNC
: 1;
5001 unsigned T2MODE0
: 1;
5002 unsigned T2MODE1
: 1;
5003 unsigned T2MODE2
: 1;
5004 unsigned T2MODE3
: 1;
5005 unsigned T2MODE4
: 1;
5006 unsigned T2CKSYNC
: 1;
5007 unsigned T2CKPOL
: 1;
5008 unsigned T2PSYNC
: 1;
5013 unsigned T2MODE
: 5;
5024 extern __at(0x028F) volatile __T2HLTbits_t T2HLTbits
;
5026 #define _T2HLT_MODE0 0x01
5027 #define _T2HLT_T2MODE0 0x01
5028 #define _T2HLT_MODE1 0x02
5029 #define _T2HLT_T2MODE1 0x02
5030 #define _T2HLT_MODE2 0x04
5031 #define _T2HLT_T2MODE2 0x04
5032 #define _T2HLT_MODE3 0x08
5033 #define _T2HLT_T2MODE3 0x08
5034 #define _T2HLT_MODE4 0x10
5035 #define _T2HLT_T2MODE4 0x10
5036 #define _T2HLT_CKSYNC 0x20
5037 #define _T2HLT_T2CKSYNC 0x20
5038 #define _T2HLT_CKPOL 0x40
5039 #define _T2HLT_T2CKPOL 0x40
5040 #define _T2HLT_PSYNC 0x80
5041 #define _T2HLT_T2PSYNC 0x80
5043 //==============================================================================
5046 //==============================================================================
5049 extern __at(0x0290) __sfr T2CLKCON
;
5072 extern __at(0x0290) volatile __T2CLKCONbits_t T2CLKCONbits
;
5079 //==============================================================================
5082 //==============================================================================
5085 extern __at(0x0291) __sfr T2RST
;
5103 unsigned T2RSEL0
: 1;
5104 unsigned T2RSEL1
: 1;
5105 unsigned T2RSEL2
: 1;
5106 unsigned T2RSEL3
: 1;
5107 unsigned T2RSEL4
: 1;
5121 unsigned T2RSEL
: 5;
5126 extern __at(0x0291) volatile __T2RSTbits_t T2RSTbits
;
5129 #define _T2RSEL0 0x01
5131 #define _T2RSEL1 0x02
5133 #define _T2RSEL2 0x04
5135 #define _T2RSEL3 0x08
5137 #define _T2RSEL4 0x10
5139 //==============================================================================
5141 extern __at(0x0292) __sfr T4TMR
;
5142 extern __at(0x0292) __sfr TMR4
;
5143 extern __at(0x0293) __sfr PR4
;
5144 extern __at(0x0293) __sfr T4PR
;
5146 //==============================================================================
5149 extern __at(0x0294) __sfr T4CON
;
5155 unsigned T4OUTPS0
: 1;
5156 unsigned T4OUTPS1
: 1;
5157 unsigned T4OUTPS2
: 1;
5158 unsigned T4OUTPS3
: 1;
5159 unsigned T4CKPS0
: 1;
5160 unsigned T4CKPS1
: 1;
5161 unsigned T4CKPS2
: 1;
5167 unsigned OUTPS0
: 1;
5168 unsigned OUTPS1
: 1;
5169 unsigned OUTPS2
: 1;
5170 unsigned OUTPS3
: 1;
5186 unsigned TMR4ON
: 1;
5191 unsigned T4OUTPS
: 4;
5204 unsigned T4CKPS
: 3;
5216 extern __at(0x0294) volatile __T4CONbits_t T4CONbits
;
5218 #define _T4CON_T4OUTPS0 0x01
5219 #define _T4CON_OUTPS0 0x01
5220 #define _T4CON_T4OUTPS1 0x02
5221 #define _T4CON_OUTPS1 0x02
5222 #define _T4CON_T4OUTPS2 0x04
5223 #define _T4CON_OUTPS2 0x04
5224 #define _T4CON_T4OUTPS3 0x08
5225 #define _T4CON_OUTPS3 0x08
5226 #define _T4CON_T4CKPS0 0x10
5227 #define _T4CON_CKPS0 0x10
5228 #define _T4CON_T4CKPS1 0x20
5229 #define _T4CON_CKPS1 0x20
5230 #define _T4CON_T4CKPS2 0x40
5231 #define _T4CON_CKPS2 0x40
5232 #define _T4CON_ON 0x80
5233 #define _T4CON_T4ON 0x80
5234 #define _T4CON_TMR4ON 0x80
5236 //==============================================================================
5239 //==============================================================================
5242 extern __at(0x0295) __sfr T4HLT
;
5253 unsigned CKSYNC
: 1;
5260 unsigned T4MODE0
: 1;
5261 unsigned T4MODE1
: 1;
5262 unsigned T4MODE2
: 1;
5263 unsigned T4MODE3
: 1;
5264 unsigned T4MODE4
: 1;
5265 unsigned T4CKSYNC
: 1;
5266 unsigned T4CKPOL
: 1;
5267 unsigned T4PSYNC
: 1;
5278 unsigned T4MODE
: 5;
5283 extern __at(0x0295) volatile __T4HLTbits_t T4HLTbits
;
5285 #define _T4HLT_MODE0 0x01
5286 #define _T4HLT_T4MODE0 0x01
5287 #define _T4HLT_MODE1 0x02
5288 #define _T4HLT_T4MODE1 0x02
5289 #define _T4HLT_MODE2 0x04
5290 #define _T4HLT_T4MODE2 0x04
5291 #define _T4HLT_MODE3 0x08
5292 #define _T4HLT_T4MODE3 0x08
5293 #define _T4HLT_MODE4 0x10
5294 #define _T4HLT_T4MODE4 0x10
5295 #define _T4HLT_CKSYNC 0x20
5296 #define _T4HLT_T4CKSYNC 0x20
5297 #define _T4HLT_CKPOL 0x40
5298 #define _T4HLT_T4CKPOL 0x40
5299 #define _T4HLT_PSYNC 0x80
5300 #define _T4HLT_T4PSYNC 0x80
5302 //==============================================================================
5305 //==============================================================================
5308 extern __at(0x0296) __sfr T4CLKCON
;
5331 extern __at(0x0296) volatile __T4CLKCONbits_t T4CLKCONbits
;
5338 //==============================================================================
5341 //==============================================================================
5344 extern __at(0x0297) __sfr T4RST
;
5362 unsigned T4RSEL0
: 1;
5363 unsigned T4RSEL1
: 1;
5364 unsigned T4RSEL2
: 1;
5365 unsigned T4RSEL3
: 1;
5366 unsigned T4RSEL4
: 1;
5380 unsigned T4RSEL
: 5;
5385 extern __at(0x0297) volatile __T4RSTbits_t T4RSTbits
;
5387 #define _T4RST_RSEL0 0x01
5388 #define _T4RST_T4RSEL0 0x01
5389 #define _T4RST_RSEL1 0x02
5390 #define _T4RST_T4RSEL1 0x02
5391 #define _T4RST_RSEL2 0x04
5392 #define _T4RST_T4RSEL2 0x04
5393 #define _T4RST_RSEL3 0x08
5394 #define _T4RST_T4RSEL3 0x08
5395 #define _T4RST_RSEL4 0x10
5396 #define _T4RST_T4RSEL4 0x10
5398 //==============================================================================
5400 extern __at(0x0298) __sfr T6TMR
;
5401 extern __at(0x0298) __sfr TMR6
;
5402 extern __at(0x0299) __sfr PR6
;
5403 extern __at(0x0299) __sfr T6PR
;
5405 //==============================================================================
5408 extern __at(0x029A) __sfr T6CON
;
5414 unsigned T6OUTPS0
: 1;
5415 unsigned T6OUTPS1
: 1;
5416 unsigned T6OUTPS2
: 1;
5417 unsigned T6OUTPS3
: 1;
5418 unsigned T6CKPS0
: 1;
5419 unsigned T6CKPS1
: 1;
5420 unsigned T6CKPS2
: 1;
5426 unsigned OUTPS0
: 1;
5427 unsigned OUTPS1
: 1;
5428 unsigned OUTPS2
: 1;
5429 unsigned OUTPS3
: 1;
5445 unsigned TMR6ON
: 1;
5456 unsigned T6OUTPS
: 4;
5470 unsigned T6CKPS
: 3;
5475 extern __at(0x029A) volatile __T6CONbits_t T6CONbits
;
5477 #define _T6CON_T6OUTPS0 0x01
5478 #define _T6CON_OUTPS0 0x01
5479 #define _T6CON_T6OUTPS1 0x02
5480 #define _T6CON_OUTPS1 0x02
5481 #define _T6CON_T6OUTPS2 0x04
5482 #define _T6CON_OUTPS2 0x04
5483 #define _T6CON_T6OUTPS3 0x08
5484 #define _T6CON_OUTPS3 0x08
5485 #define _T6CON_T6CKPS0 0x10
5486 #define _T6CON_CKPS0 0x10
5487 #define _T6CON_T6CKPS1 0x20
5488 #define _T6CON_CKPS1 0x20
5489 #define _T6CON_T6CKPS2 0x40
5490 #define _T6CON_CKPS2 0x40
5491 #define _T6CON_ON 0x80
5492 #define _T6CON_T6ON 0x80
5493 #define _T6CON_TMR6ON 0x80
5495 //==============================================================================
5498 //==============================================================================
5501 extern __at(0x029B) __sfr T6HLT
;
5512 unsigned CKSYNC
: 1;
5519 unsigned T6MODE0
: 1;
5520 unsigned T6MODE1
: 1;
5521 unsigned T6MODE2
: 1;
5522 unsigned T6MODE3
: 1;
5523 unsigned T6MODE4
: 1;
5524 unsigned T6CKSYNC
: 1;
5525 unsigned T6CKPOL
: 1;
5526 unsigned T6PSYNC
: 1;
5531 unsigned T6MODE
: 5;
5542 extern __at(0x029B) volatile __T6HLTbits_t T6HLTbits
;
5544 #define _T6HLT_MODE0 0x01
5545 #define _T6HLT_T6MODE0 0x01
5546 #define _T6HLT_MODE1 0x02
5547 #define _T6HLT_T6MODE1 0x02
5548 #define _T6HLT_MODE2 0x04
5549 #define _T6HLT_T6MODE2 0x04
5550 #define _T6HLT_MODE3 0x08
5551 #define _T6HLT_T6MODE3 0x08
5552 #define _T6HLT_MODE4 0x10
5553 #define _T6HLT_T6MODE4 0x10
5554 #define _T6HLT_CKSYNC 0x20
5555 #define _T6HLT_T6CKSYNC 0x20
5556 #define _T6HLT_CKPOL 0x40
5557 #define _T6HLT_T6CKPOL 0x40
5558 #define _T6HLT_PSYNC 0x80
5559 #define _T6HLT_T6PSYNC 0x80
5561 //==============================================================================
5564 //==============================================================================
5567 extern __at(0x029C) __sfr T6CLKCON
;
5590 extern __at(0x029C) volatile __T6CLKCONbits_t T6CLKCONbits
;
5597 //==============================================================================
5600 //==============================================================================
5603 extern __at(0x029D) __sfr T6RST
;
5621 unsigned T6RSEL0
: 1;
5622 unsigned T6RSEL1
: 1;
5623 unsigned T6RSEL2
: 1;
5624 unsigned T6RSEL3
: 1;
5625 unsigned T6RSEL4
: 1;
5633 unsigned T6RSEL
: 5;
5644 extern __at(0x029D) volatile __T6RSTbits_t T6RSTbits
;
5646 #define _T6RST_RSEL0 0x01
5647 #define _T6RST_T6RSEL0 0x01
5648 #define _T6RST_RSEL1 0x02
5649 #define _T6RST_T6RSEL1 0x02
5650 #define _T6RST_RSEL2 0x04
5651 #define _T6RST_T6RSEL2 0x04
5652 #define _T6RST_RSEL3 0x08
5653 #define _T6RST_T6RSEL3 0x08
5654 #define _T6RST_RSEL4 0x10
5655 #define _T6RST_T6RSEL4 0x10
5657 //==============================================================================
5659 extern __at(0x030C) __sfr CCPR1
;
5660 extern __at(0x030C) __sfr CCPR1L
;
5661 extern __at(0x030D) __sfr CCPR1H
;
5663 //==============================================================================
5666 extern __at(0x030E) __sfr CCP1CON
;
5684 unsigned CCP1MODE0
: 1;
5685 unsigned CCP1MODE1
: 1;
5686 unsigned CCP1MODE2
: 1;
5687 unsigned CCP1MODE3
: 1;
5688 unsigned CCP1FMT
: 1;
5689 unsigned CCP1OUT
: 1;
5690 unsigned CCP1OE
: 1;
5691 unsigned CCP1EN
: 1;
5702 unsigned CCP1MODE
: 4;
5707 extern __at(0x030E) volatile __CCP1CONbits_t CCP1CONbits
;
5710 #define _CCP1MODE0 0x01
5712 #define _CCP1MODE1 0x02
5714 #define _CCP1MODE2 0x04
5716 #define _CCP1MODE3 0x08
5718 #define _CCP1FMT 0x10
5720 #define _CCP1OUT 0x20
5722 #define _CCP1OE 0x40
5724 #define _CCP1EN 0x80
5726 //==============================================================================
5729 //==============================================================================
5732 extern __at(0x030F) __sfr CCP1CAP
;
5750 unsigned CCP1CTS0
: 1;
5751 unsigned CCP1CTS1
: 1;
5752 unsigned CCP1CTS2
: 1;
5768 unsigned CCP1CTS
: 3;
5773 extern __at(0x030F) volatile __CCP1CAPbits_t CCP1CAPbits
;
5776 #define _CCP1CTS0 0x01
5778 #define _CCP1CTS1 0x02
5780 #define _CCP1CTS2 0x04
5782 //==============================================================================
5784 extern __at(0x0310) __sfr CCPR2
;
5785 extern __at(0x0310) __sfr CCPR2L
;
5786 extern __at(0x0311) __sfr CCPR2H
;
5788 //==============================================================================
5791 extern __at(0x0312) __sfr CCP2CON
;
5809 unsigned CCP2MODE0
: 1;
5810 unsigned CCP2MODE1
: 1;
5811 unsigned CCP2MODE2
: 1;
5812 unsigned CCP2MODE3
: 1;
5813 unsigned CCP2FMT
: 1;
5814 unsigned CCP2OUT
: 1;
5815 unsigned CCP2OE
: 1;
5816 unsigned CCP2EN
: 1;
5821 unsigned CCP2MODE
: 4;
5832 extern __at(0x0312) volatile __CCP2CONbits_t CCP2CONbits
;
5834 #define _CCP2CON_MODE0 0x01
5835 #define _CCP2CON_CCP2MODE0 0x01
5836 #define _CCP2CON_MODE1 0x02
5837 #define _CCP2CON_CCP2MODE1 0x02
5838 #define _CCP2CON_MODE2 0x04
5839 #define _CCP2CON_CCP2MODE2 0x04
5840 #define _CCP2CON_MODE3 0x08
5841 #define _CCP2CON_CCP2MODE3 0x08
5842 #define _CCP2CON_FMT 0x10
5843 #define _CCP2CON_CCP2FMT 0x10
5844 #define _CCP2CON_OUT 0x20
5845 #define _CCP2CON_CCP2OUT 0x20
5846 #define _CCP2CON_OE 0x40
5847 #define _CCP2CON_CCP2OE 0x40
5848 #define _CCP2CON_EN 0x80
5849 #define _CCP2CON_CCP2EN 0x80
5851 //==============================================================================
5854 //==============================================================================
5857 extern __at(0x0313) __sfr CCP2CAP
;
5875 unsigned CCP2CTS0
: 1;
5876 unsigned CCP2CTS1
: 1;
5877 unsigned CCP2CTS2
: 1;
5887 unsigned CCP2CTS
: 3;
5898 extern __at(0x0313) volatile __CCP2CAPbits_t CCP2CAPbits
;
5900 #define _CCP2CAP_CTS0 0x01
5901 #define _CCP2CAP_CCP2CTS0 0x01
5902 #define _CCP2CAP_CTS1 0x02
5903 #define _CCP2CAP_CCP2CTS1 0x02
5904 #define _CCP2CAP_CTS2 0x04
5905 #define _CCP2CAP_CCP2CTS2 0x04
5907 //==============================================================================
5909 extern __at(0x0314) __sfr CCPR3
;
5910 extern __at(0x0314) __sfr CCPR3L
;
5911 extern __at(0x0315) __sfr CCPR3H
;
5913 //==============================================================================
5916 extern __at(0x0316) __sfr CCP3CON
;
5934 unsigned CCP3MODE0
: 1;
5935 unsigned CCP3MODE1
: 1;
5936 unsigned CCP3MODE2
: 1;
5937 unsigned CCP3MODE3
: 1;
5938 unsigned CCP3FMT
: 1;
5939 unsigned CCP3OUT
: 1;
5940 unsigned CCP3OE
: 1;
5941 unsigned CCP3EN
: 1;
5952 unsigned CCP3MODE
: 4;
5957 extern __at(0x0316) volatile __CCP3CONbits_t CCP3CONbits
;
5959 #define _CCP3CON_MODE0 0x01
5960 #define _CCP3CON_CCP3MODE0 0x01
5961 #define _CCP3CON_MODE1 0x02
5962 #define _CCP3CON_CCP3MODE1 0x02
5963 #define _CCP3CON_MODE2 0x04
5964 #define _CCP3CON_CCP3MODE2 0x04
5965 #define _CCP3CON_MODE3 0x08
5966 #define _CCP3CON_CCP3MODE3 0x08
5967 #define _CCP3CON_FMT 0x10
5968 #define _CCP3CON_CCP3FMT 0x10
5969 #define _CCP3CON_OUT 0x20
5970 #define _CCP3CON_CCP3OUT 0x20
5971 #define _CCP3CON_OE 0x40
5972 #define _CCP3CON_CCP3OE 0x40
5973 #define _CCP3CON_EN 0x80
5974 #define _CCP3CON_CCP3EN 0x80
5976 //==============================================================================
5979 //==============================================================================
5982 extern __at(0x0317) __sfr CCP3CAP
;
6000 unsigned CCP3CTS0
: 1;
6001 unsigned CCP3CTS1
: 1;
6002 unsigned CCP3CTS2
: 1;
6012 unsigned CCP3CTS
: 3;
6023 extern __at(0x0317) volatile __CCP3CAPbits_t CCP3CAPbits
;
6025 #define _CCP3CAP_CTS0 0x01
6026 #define _CCP3CAP_CCP3CTS0 0x01
6027 #define _CCP3CAP_CTS1 0x02
6028 #define _CCP3CAP_CCP3CTS1 0x02
6029 #define _CCP3CAP_CTS2 0x04
6030 #define _CCP3CAP_CCP3CTS2 0x04
6032 //==============================================================================
6034 extern __at(0x0318) __sfr CCPR4
;
6035 extern __at(0x0318) __sfr CCPR4L
;
6036 extern __at(0x0319) __sfr CCPR4H
;
6038 //==============================================================================
6041 extern __at(0x031A) __sfr CCP4CON
;
6059 unsigned CCP4MODE0
: 1;
6060 unsigned CCP4MODE1
: 1;
6061 unsigned CCP4MODE2
: 1;
6062 unsigned CCP4MODE3
: 1;
6063 unsigned CCP4FMT
: 1;
6064 unsigned CCP4OUT
: 1;
6065 unsigned CCP4OE
: 1;
6066 unsigned CCP4EN
: 1;
6077 unsigned CCP4MODE
: 4;
6082 extern __at(0x031A) volatile __CCP4CONbits_t CCP4CONbits
;
6084 #define _CCP4CON_MODE0 0x01
6085 #define _CCP4CON_CCP4MODE0 0x01
6086 #define _CCP4CON_MODE1 0x02
6087 #define _CCP4CON_CCP4MODE1 0x02
6088 #define _CCP4CON_MODE2 0x04
6089 #define _CCP4CON_CCP4MODE2 0x04
6090 #define _CCP4CON_MODE3 0x08
6091 #define _CCP4CON_CCP4MODE3 0x08
6092 #define _CCP4CON_FMT 0x10
6093 #define _CCP4CON_CCP4FMT 0x10
6094 #define _CCP4CON_OUT 0x20
6095 #define _CCP4CON_CCP4OUT 0x20
6096 #define _CCP4CON_OE 0x40
6097 #define _CCP4CON_CCP4OE 0x40
6098 #define _CCP4CON_EN 0x80
6099 #define _CCP4CON_CCP4EN 0x80
6101 //==============================================================================
6104 //==============================================================================
6107 extern __at(0x031B) __sfr CCP4CAP
;
6125 unsigned CCP4CTS0
: 1;
6126 unsigned CCP4CTS1
: 1;
6127 unsigned CCP4CTS2
: 1;
6137 unsigned CCP4CTS
: 3;
6148 extern __at(0x031B) volatile __CCP4CAPbits_t CCP4CAPbits
;
6150 #define _CCP4CAP_CTS0 0x01
6151 #define _CCP4CAP_CCP4CTS0 0x01
6152 #define _CCP4CAP_CTS1 0x02
6153 #define _CCP4CAP_CCP4CTS1 0x02
6154 #define _CCP4CAP_CTS2 0x04
6155 #define _CCP4CAP_CCP4CTS2 0x04
6157 //==============================================================================
6159 extern __at(0x031C) __sfr CCPR5
;
6160 extern __at(0x031C) __sfr CCPR5L
;
6161 extern __at(0x031D) __sfr CCPR5H
;
6163 //==============================================================================
6166 extern __at(0x031E) __sfr CCP5CON
;
6184 unsigned CCP5MODE0
: 1;
6185 unsigned CCP5MODE1
: 1;
6186 unsigned CCP5MODE2
: 1;
6187 unsigned CCP5MODE3
: 1;
6188 unsigned CCP5FMT
: 1;
6189 unsigned CCP5OUT
: 1;
6190 unsigned CCP5OE
: 1;
6191 unsigned CCP5EN
: 1;
6196 unsigned CCP5MODE
: 4;
6207 extern __at(0x031E) volatile __CCP5CONbits_t CCP5CONbits
;
6209 #define _CCP5CON_MODE0 0x01
6210 #define _CCP5CON_CCP5MODE0 0x01
6211 #define _CCP5CON_MODE1 0x02
6212 #define _CCP5CON_CCP5MODE1 0x02
6213 #define _CCP5CON_MODE2 0x04
6214 #define _CCP5CON_CCP5MODE2 0x04
6215 #define _CCP5CON_MODE3 0x08
6216 #define _CCP5CON_CCP5MODE3 0x08
6217 #define _CCP5CON_FMT 0x10
6218 #define _CCP5CON_CCP5FMT 0x10
6219 #define _CCP5CON_OUT 0x20
6220 #define _CCP5CON_CCP5OUT 0x20
6221 #define _CCP5CON_OE 0x40
6222 #define _CCP5CON_CCP5OE 0x40
6223 #define _CCP5CON_EN 0x80
6224 #define _CCP5CON_CCP5EN 0x80
6226 //==============================================================================
6229 //==============================================================================
6232 extern __at(0x031F) __sfr CCP5CAP
;
6250 unsigned CCP5CTS0
: 1;
6251 unsigned CCP5CTS1
: 1;
6252 unsigned CCP5CTS2
: 1;
6268 unsigned CCP5CTS
: 3;
6273 extern __at(0x031F) volatile __CCP5CAPbits_t CCP5CAPbits
;
6275 #define _CCP5CAP_CTS0 0x01
6276 #define _CCP5CAP_CCP5CTS0 0x01
6277 #define _CCP5CAP_CTS1 0x02
6278 #define _CCP5CAP_CCP5CTS1 0x02
6279 #define _CCP5CAP_CTS2 0x04
6280 #define _CCP5CAP_CCP5CTS2 0x04
6282 //==============================================================================
6285 //==============================================================================
6288 extern __at(0x038C) __sfr PWM6DCL
;
6312 unsigned PWM6DC0
: 1;
6313 unsigned PWM6DC1
: 1;
6324 unsigned PWMPW0
: 1;
6325 unsigned PWMPW1
: 1;
6343 unsigned PWM6DC
: 2;
6347 extern __at(0x038C) volatile __PWM6DCLbits_t PWM6DCLbits
;
6350 #define _PWM6DC0 0x40
6351 #define _PWMPW0 0x40
6353 #define _PWM6DC1 0x80
6354 #define _PWMPW1 0x80
6356 //==============================================================================
6359 //==============================================================================
6362 extern __at(0x038D) __sfr PWM6DCH
;
6380 unsigned PWM6DC2
: 1;
6381 unsigned PWM6DC3
: 1;
6382 unsigned PWM6DC4
: 1;
6383 unsigned PWM6DC5
: 1;
6384 unsigned PWM6DC6
: 1;
6385 unsigned PWM6DC7
: 1;
6386 unsigned PWM6DC8
: 1;
6387 unsigned PWM6DC9
: 1;
6392 unsigned PWMPW2
: 1;
6393 unsigned PWMPW3
: 1;
6394 unsigned PWMPW4
: 1;
6395 unsigned PWMPW5
: 1;
6396 unsigned PWMPW6
: 1;
6397 unsigned PWMPW7
: 1;
6398 unsigned PWMPW8
: 1;
6399 unsigned PWMPW9
: 1;
6403 extern __at(0x038D) volatile __PWM6DCHbits_t PWM6DCHbits
;
6406 #define _PWM6DC2 0x01
6407 #define _PWMPW2 0x01
6409 #define _PWM6DC3 0x02
6410 #define _PWMPW3 0x02
6412 #define _PWM6DC4 0x04
6413 #define _PWMPW4 0x04
6415 #define _PWM6DC5 0x08
6416 #define _PWMPW5 0x08
6418 #define _PWM6DC6 0x10
6419 #define _PWMPW6 0x10
6421 #define _PWM6DC7 0x20
6422 #define _PWMPW7 0x20
6424 #define _PWM6DC8 0x40
6425 #define _PWMPW8 0x40
6427 #define _PWM6DC9 0x80
6428 #define _PWMPW9 0x80
6430 //==============================================================================
6433 //==============================================================================
6436 extern __at(0x038E) __sfr PWM6CON
;
6458 unsigned PWM6POL
: 1;
6459 unsigned PWM6OUT
: 1;
6460 unsigned PWM6OE
: 1;
6461 unsigned PWM6EN
: 1;
6465 extern __at(0x038E) volatile __PWM6CONbits_t PWM6CONbits
;
6467 #define _PWM6CON_POL 0x10
6468 #define _PWM6CON_PWM6POL 0x10
6469 #define _PWM6CON_OUT 0x20
6470 #define _PWM6CON_PWM6OUT 0x20
6471 #define _PWM6CON_OE 0x40
6472 #define _PWM6CON_PWM6OE 0x40
6473 #define _PWM6CON_EN 0x80
6474 #define _PWM6CON_PWM6EN 0x80
6476 //==============================================================================
6479 //==============================================================================
6482 extern __at(0x0390) __sfr PWM7DCL
;
6506 unsigned PWM7DC0
: 1;
6507 unsigned PWM7DC1
: 1;
6518 unsigned PWMPW0
: 1;
6519 unsigned PWMPW1
: 1;
6531 unsigned PWM7DC
: 2;
6541 extern __at(0x0390) volatile __PWM7DCLbits_t PWM7DCLbits
;
6543 #define _PWM7DCL_DC0 0x40
6544 #define _PWM7DCL_PWM7DC0 0x40
6545 #define _PWM7DCL_PWMPW0 0x40
6546 #define _PWM7DCL_DC1 0x80
6547 #define _PWM7DCL_PWM7DC1 0x80
6548 #define _PWM7DCL_PWMPW1 0x80
6550 //==============================================================================
6553 //==============================================================================
6556 extern __at(0x0391) __sfr PWM7DCH
;
6574 unsigned PWM7DC2
: 1;
6575 unsigned PWM7DC3
: 1;
6576 unsigned PWM7DC4
: 1;
6577 unsigned PWM7DC5
: 1;
6578 unsigned PWM7DC6
: 1;
6579 unsigned PWM7DC7
: 1;
6580 unsigned PWM7DC8
: 1;
6581 unsigned PWM7DC9
: 1;
6586 unsigned PWMPW2
: 1;
6587 unsigned PWMPW3
: 1;
6588 unsigned PWMPW4
: 1;
6589 unsigned PWMPW5
: 1;
6590 unsigned PWMPW6
: 1;
6591 unsigned PWMPW7
: 1;
6592 unsigned PWMPW8
: 1;
6593 unsigned PWMPW9
: 1;
6597 extern __at(0x0391) volatile __PWM7DCHbits_t PWM7DCHbits
;
6599 #define _PWM7DCH_DC2 0x01
6600 #define _PWM7DCH_PWM7DC2 0x01
6601 #define _PWM7DCH_PWMPW2 0x01
6602 #define _PWM7DCH_DC3 0x02
6603 #define _PWM7DCH_PWM7DC3 0x02
6604 #define _PWM7DCH_PWMPW3 0x02
6605 #define _PWM7DCH_DC4 0x04
6606 #define _PWM7DCH_PWM7DC4 0x04
6607 #define _PWM7DCH_PWMPW4 0x04
6608 #define _PWM7DCH_DC5 0x08
6609 #define _PWM7DCH_PWM7DC5 0x08
6610 #define _PWM7DCH_PWMPW5 0x08
6611 #define _PWM7DCH_DC6 0x10
6612 #define _PWM7DCH_PWM7DC6 0x10
6613 #define _PWM7DCH_PWMPW6 0x10
6614 #define _PWM7DCH_DC7 0x20
6615 #define _PWM7DCH_PWM7DC7 0x20
6616 #define _PWM7DCH_PWMPW7 0x20
6617 #define _PWM7DCH_DC8 0x40
6618 #define _PWM7DCH_PWM7DC8 0x40
6619 #define _PWM7DCH_PWMPW8 0x40
6620 #define _PWM7DCH_DC9 0x80
6621 #define _PWM7DCH_PWM7DC9 0x80
6622 #define _PWM7DCH_PWMPW9 0x80
6624 //==============================================================================
6627 //==============================================================================
6630 extern __at(0x0392) __sfr PWM7CON
;
6652 unsigned PWM7POL
: 1;
6653 unsigned PWM7OUT
: 1;
6654 unsigned PWM7OE
: 1;
6655 unsigned PWM7EN
: 1;
6659 extern __at(0x0392) volatile __PWM7CONbits_t PWM7CONbits
;
6661 #define _PWM7CON_POL 0x10
6662 #define _PWM7CON_PWM7POL 0x10
6663 #define _PWM7CON_OUT 0x20
6664 #define _PWM7CON_PWM7OUT 0x20
6665 #define _PWM7CON_OE 0x40
6666 #define _PWM7CON_PWM7OE 0x40
6667 #define _PWM7CON_EN 0x80
6668 #define _PWM7CON_PWM7EN 0x80
6670 //==============================================================================
6673 //==============================================================================
6676 extern __at(0x040C) __sfr SCANLADRL
;
6694 unsigned SCANLADR0
: 1;
6695 unsigned SCANLADR1
: 1;
6696 unsigned SCANLADR2
: 1;
6697 unsigned SCANLADR3
: 1;
6698 unsigned SCANLADR4
: 1;
6699 unsigned SCANLADR5
: 1;
6700 unsigned SCANLADR6
: 1;
6701 unsigned SCANLADR7
: 1;
6703 } __SCANLADRLbits_t
;
6705 extern __at(0x040C) volatile __SCANLADRLbits_t SCANLADRLbits
;
6708 #define _SCANLADR0 0x01
6710 #define _SCANLADR1 0x02
6712 #define _SCANLADR2 0x04
6714 #define _SCANLADR3 0x08
6716 #define _SCANLADR4 0x10
6718 #define _SCANLADR5 0x20
6720 #define _SCANLADR6 0x40
6722 #define _SCANLADR7 0x80
6724 //==============================================================================
6727 //==============================================================================
6730 extern __at(0x040D) __sfr SCANLADRH
;
6738 unsigned LADR10
: 1;
6739 unsigned LADR11
: 1;
6740 unsigned LADR12
: 1;
6741 unsigned LADR13
: 1;
6742 unsigned LADR14
: 1;
6743 unsigned LADR15
: 1;
6748 unsigned SCANLADR8
: 1;
6749 unsigned SCANLADR9
: 1;
6750 unsigned SCANLADR10
: 1;
6751 unsigned SCANLADR11
: 1;
6752 unsigned SCANLADR12
: 1;
6753 unsigned SCANLADR13
: 1;
6754 unsigned SCANLADR14
: 1;
6755 unsigned SCANLADR15
: 1;
6757 } __SCANLADRHbits_t
;
6759 extern __at(0x040D) volatile __SCANLADRHbits_t SCANLADRHbits
;
6762 #define _SCANLADR8 0x01
6764 #define _SCANLADR9 0x02
6765 #define _LADR10 0x04
6766 #define _SCANLADR10 0x04
6767 #define _LADR11 0x08
6768 #define _SCANLADR11 0x08
6769 #define _LADR12 0x10
6770 #define _SCANLADR12 0x10
6771 #define _LADR13 0x20
6772 #define _SCANLADR13 0x20
6773 #define _LADR14 0x40
6774 #define _SCANLADR14 0x40
6775 #define _LADR15 0x80
6776 #define _SCANLADR15 0x80
6778 //==============================================================================
6781 //==============================================================================
6784 extern __at(0x040E) __sfr SCANHADRL
;
6802 unsigned SCANHADR0
: 1;
6803 unsigned SCANHADR1
: 1;
6804 unsigned SCANHADR2
: 1;
6805 unsigned SCANHADR3
: 1;
6806 unsigned SCANHADR4
: 1;
6807 unsigned SCANHADR5
: 1;
6808 unsigned SCANHADR6
: 1;
6809 unsigned SCANHADR7
: 1;
6811 } __SCANHADRLbits_t
;
6813 extern __at(0x040E) volatile __SCANHADRLbits_t SCANHADRLbits
;
6816 #define _SCANHADR0 0x01
6818 #define _SCANHADR1 0x02
6820 #define _SCANHADR2 0x04
6822 #define _SCANHADR3 0x08
6824 #define _SCANHADR4 0x10
6826 #define _SCANHADR5 0x20
6828 #define _SCANHADR6 0x40
6830 #define _SCANHADR7 0x80
6832 //==============================================================================
6835 //==============================================================================
6838 extern __at(0x040F) __sfr SCANHADRH
;
6846 unsigned HADR10
: 1;
6847 unsigned HADR11
: 1;
6848 unsigned HADR12
: 1;
6849 unsigned HADR13
: 1;
6850 unsigned HADR14
: 1;
6851 unsigned HADR15
: 1;
6856 unsigned SCANHADR8
: 1;
6857 unsigned SCANHADR9
: 1;
6858 unsigned SCANHADR10
: 1;
6859 unsigned SCANHADR11
: 1;
6860 unsigned SCANHADR12
: 1;
6861 unsigned SCANHADR13
: 1;
6862 unsigned SCANHADR14
: 1;
6863 unsigned SCANHADR15
: 1;
6865 } __SCANHADRHbits_t
;
6867 extern __at(0x040F) volatile __SCANHADRHbits_t SCANHADRHbits
;
6870 #define _SCANHADR8 0x01
6872 #define _SCANHADR9 0x02
6873 #define _HADR10 0x04
6874 #define _SCANHADR10 0x04
6875 #define _HADR11 0x08
6876 #define _SCANHADR11 0x08
6877 #define _HADR12 0x10
6878 #define _SCANHADR12 0x10
6879 #define _HADR13 0x20
6880 #define _SCANHADR13 0x20
6881 #define _HADR14 0x40
6882 #define _SCANHADR14 0x40
6883 #define _HADR15 0x80
6884 #define _SCANHADR15 0x80
6886 //==============================================================================
6889 //==============================================================================
6892 extern __at(0x0410) __sfr SCANCON0
;
6902 unsigned INVALID
: 1;
6904 unsigned SCANGO
: 1;
6910 unsigned SCANMODE0
: 1;
6911 unsigned SCANMODE1
: 1;
6913 unsigned SCANINTM
: 1;
6914 unsigned SCANINVALID
: 1;
6915 unsigned SCANBUSY
: 1;
6917 unsigned SCANEN
: 1;
6926 unsigned DABORT
: 1;
6934 unsigned SCANMODE
: 2;
6945 extern __at(0x0410) volatile __SCANCON0bits_t SCANCON0bits
;
6947 #define _SCANCON0_MODE0 0x01
6948 #define _SCANCON0_SCANMODE0 0x01
6949 #define _SCANCON0_MODE1 0x02
6950 #define _SCANCON0_SCANMODE1 0x02
6951 #define _SCANCON0_INTM 0x08
6952 #define _SCANCON0_SCANINTM 0x08
6953 #define _SCANCON0_INVALID 0x10
6954 #define _SCANCON0_SCANINVALID 0x10
6955 #define _SCANCON0_DABORT 0x10
6956 #define _SCANCON0_BUSY 0x20
6957 #define _SCANCON0_SCANBUSY 0x20
6958 #define _SCANCON0_SCANGO 0x40
6959 #define _SCANCON0_EN 0x80
6960 #define _SCANCON0_SCANEN 0x80
6962 //==============================================================================
6965 //==============================================================================
6968 extern __at(0x0411) __sfr SCANTRIG
;
6986 unsigned SCANTSEL0
: 1;
6987 unsigned SCANTSEL1
: 1;
6988 unsigned SCANTSEL2
: 1;
6989 unsigned SCANTSEL3
: 1;
6998 unsigned SCANTSEL
: 4;
7009 extern __at(0x0411) volatile __SCANTRIGbits_t SCANTRIGbits
;
7012 #define _SCANTSEL0 0x01
7014 #define _SCANTSEL1 0x02
7016 #define _SCANTSEL2 0x04
7018 #define _SCANTSEL3 0x08
7020 //==============================================================================
7022 extern __at(0x0416) __sfr CRCDATA
;
7024 //==============================================================================
7027 extern __at(0x0416) __sfr CRCDATL
;
7041 extern __at(0x0416) volatile __CRCDATLbits_t CRCDATLbits
;
7052 //==============================================================================
7055 //==============================================================================
7058 extern __at(0x0417) __sfr CRCDATH
;
7064 unsigned DATA10
: 1;
7065 unsigned DATA11
: 1;
7066 unsigned DATA12
: 1;
7067 unsigned DATA13
: 1;
7068 unsigned DATA14
: 1;
7069 unsigned DATA15
: 1;
7072 extern __at(0x0417) volatile __CRCDATHbits_t CRCDATHbits
;
7076 #define _DATA10 0x04
7077 #define _DATA11 0x08
7078 #define _DATA12 0x10
7079 #define _DATA13 0x20
7080 #define _DATA14 0x40
7081 #define _DATA15 0x80
7083 //==============================================================================
7085 extern __at(0x0418) __sfr CRCACC
;
7087 //==============================================================================
7090 extern __at(0x0418) __sfr CRCACCL
;
7104 extern __at(0x0418) volatile __CRCACCLbits_t CRCACCLbits
;
7115 //==============================================================================
7118 //==============================================================================
7121 extern __at(0x0419) __sfr CRCACCH
;
7135 extern __at(0x0419) volatile __CRCACCHbits_t CRCACCHbits
;
7146 //==============================================================================
7148 extern __at(0x041A) __sfr CRCSHFT
;
7150 //==============================================================================
7153 extern __at(0x041A) __sfr CRCSHIFTL
;
7165 } __CRCSHIFTLbits_t
;
7167 extern __at(0x041A) volatile __CRCSHIFTLbits_t CRCSHIFTLbits
;
7178 //==============================================================================
7181 //==============================================================================
7184 extern __at(0x041B) __sfr CRCSHIFTH
;
7190 unsigned SHFT10
: 1;
7191 unsigned SHFT11
: 1;
7192 unsigned SHFT12
: 1;
7193 unsigned SHFT13
: 1;
7194 unsigned SHFT14
: 1;
7195 unsigned SHFT15
: 1;
7196 } __CRCSHIFTHbits_t
;
7198 extern __at(0x041B) volatile __CRCSHIFTHbits_t CRCSHIFTHbits
;
7202 #define _SHFT10 0x04
7203 #define _SHFT11 0x08
7204 #define _SHFT12 0x10
7205 #define _SHFT13 0x20
7206 #define _SHFT14 0x40
7207 #define _SHFT15 0x80
7209 //==============================================================================
7211 extern __at(0x041C) __sfr CRCXOR
;
7213 //==============================================================================
7216 extern __at(0x041C) __sfr CRCXORL
;
7230 extern __at(0x041C) volatile __CRCXORLbits_t CRCXORLbits
;
7240 //==============================================================================
7243 //==============================================================================
7246 extern __at(0x041D) __sfr CRCXORH
;
7260 extern __at(0x041D) volatile __CRCXORHbits_t CRCXORHbits
;
7271 //==============================================================================
7274 //==============================================================================
7277 extern __at(0x041E) __sfr CRCCON0
;
7284 unsigned SHIFTM
: 1;
7306 extern __at(0x041E) volatile __CRCCON0bits_t CRCCON0bits
;
7308 #define _CRCCON0_FULL 0x01
7309 #define _CRCCON0_SHIFTM 0x02
7310 #define _CRCCON0_ACCM 0x10
7311 #define _CRCCON0_BUSY 0x20
7312 #define _CRCCON0_CRCGO 0x40
7313 #define _CRCCON0_EN 0x80
7314 #define _CRCCON0_CRCEN 0x80
7316 //==============================================================================
7319 //==============================================================================
7322 extern __at(0x041F) __sfr CRCCON1
;
7351 extern __at(0x041F) volatile __CRCCON1bits_t CRCCON1bits
;
7362 //==============================================================================
7364 extern __at(0x048C) __sfr SMT1TMR
;
7366 //==============================================================================
7369 extern __at(0x048C) __sfr SMT1TMRL
;
7373 unsigned SMT1TMR0
: 1;
7374 unsigned SMT1TMR1
: 1;
7375 unsigned SMT1TMR2
: 1;
7376 unsigned SMT1TMR3
: 1;
7377 unsigned SMT1TMR4
: 1;
7378 unsigned SMT1TMR5
: 1;
7379 unsigned SMT1TMR6
: 1;
7380 unsigned SMT1TMR7
: 1;
7383 extern __at(0x048C) volatile __SMT1TMRLbits_t SMT1TMRLbits
;
7385 #define _SMT1TMR0 0x01
7386 #define _SMT1TMR1 0x02
7387 #define _SMT1TMR2 0x04
7388 #define _SMT1TMR3 0x08
7389 #define _SMT1TMR4 0x10
7390 #define _SMT1TMR5 0x20
7391 #define _SMT1TMR6 0x40
7392 #define _SMT1TMR7 0x80
7394 //==============================================================================
7397 //==============================================================================
7400 extern __at(0x048D) __sfr SMT1TMRH
;
7404 unsigned SMT1TMR8
: 1;
7405 unsigned SMT1TMR9
: 1;
7406 unsigned SMT1TMR10
: 1;
7407 unsigned SMT1TMR11
: 1;
7408 unsigned SMT1TMR12
: 1;
7409 unsigned SMT1TMR13
: 1;
7410 unsigned SMT1TMR14
: 1;
7411 unsigned SMT1TMR15
: 1;
7414 extern __at(0x048D) volatile __SMT1TMRHbits_t SMT1TMRHbits
;
7416 #define _SMT1TMR8 0x01
7417 #define _SMT1TMR9 0x02
7418 #define _SMT1TMR10 0x04
7419 #define _SMT1TMR11 0x08
7420 #define _SMT1TMR12 0x10
7421 #define _SMT1TMR13 0x20
7422 #define _SMT1TMR14 0x40
7423 #define _SMT1TMR15 0x80
7425 //==============================================================================
7428 //==============================================================================
7431 extern __at(0x048E) __sfr SMT1TMRU
;
7435 unsigned SMT1TMR16
: 1;
7436 unsigned SMT1TMR17
: 1;
7437 unsigned SMT1TMR18
: 1;
7438 unsigned SMT1TMR19
: 1;
7439 unsigned SMT1TMR20
: 1;
7440 unsigned SMT1TMR21
: 1;
7441 unsigned SMT1TMR22
: 1;
7442 unsigned SMT1TMR23
: 1;
7445 extern __at(0x048E) volatile __SMT1TMRUbits_t SMT1TMRUbits
;
7447 #define _SMT1TMR16 0x01
7448 #define _SMT1TMR17 0x02
7449 #define _SMT1TMR18 0x04
7450 #define _SMT1TMR19 0x08
7451 #define _SMT1TMR20 0x10
7452 #define _SMT1TMR21 0x20
7453 #define _SMT1TMR22 0x40
7454 #define _SMT1TMR23 0x80
7456 //==============================================================================
7458 extern __at(0x048F) __sfr SMT1CPR
;
7460 //==============================================================================
7463 extern __at(0x048F) __sfr SMT1CPRL
;
7477 extern __at(0x048F) volatile __SMT1CPRLbits_t SMT1CPRLbits
;
7488 //==============================================================================
7491 //==============================================================================
7494 extern __at(0x0490) __sfr SMT1CPRH
;
7512 unsigned SMT1CPR8
: 1;
7513 unsigned SMT1CPR9
: 1;
7514 unsigned SMT1CPR10
: 1;
7515 unsigned SMT1CPR11
: 1;
7516 unsigned SMT1CPR12
: 1;
7517 unsigned SMT1CPR13
: 1;
7518 unsigned SMT1CPR14
: 1;
7519 unsigned SMT1CPR15
: 1;
7523 extern __at(0x0490) volatile __SMT1CPRHbits_t SMT1CPRHbits
;
7526 #define _SMT1CPR8 0x01
7528 #define _SMT1CPR9 0x02
7530 #define _SMT1CPR10 0x04
7532 #define _SMT1CPR11 0x08
7534 #define _SMT1CPR12 0x10
7536 #define _SMT1CPR13 0x20
7538 #define _SMT1CPR14 0x40
7540 #define _SMT1CPR15 0x80
7542 //==============================================================================
7545 //==============================================================================
7548 extern __at(0x0491) __sfr SMT1CPRU
;
7566 unsigned SMT1CPR16
: 1;
7567 unsigned SMT1CPR17
: 1;
7568 unsigned SMT1CPR18
: 1;
7569 unsigned SMT1CPR19
: 1;
7570 unsigned SMT1CPR20
: 1;
7571 unsigned SMT1CPR21
: 1;
7572 unsigned SMT1CPR22
: 1;
7573 unsigned SMT1CPR23
: 1;
7577 extern __at(0x0491) volatile __SMT1CPRUbits_t SMT1CPRUbits
;
7580 #define _SMT1CPR16 0x01
7582 #define _SMT1CPR17 0x02
7584 #define _SMT1CPR18 0x04
7586 #define _SMT1CPR19 0x08
7588 #define _SMT1CPR20 0x10
7590 #define _SMT1CPR21 0x20
7592 #define _SMT1CPR22 0x40
7594 #define _SMT1CPR23 0x80
7596 //==============================================================================
7598 extern __at(0x0492) __sfr SMT1CPW
;
7600 //==============================================================================
7603 extern __at(0x0492) __sfr SMT1CPWL
;
7621 unsigned SMT1CPW0
: 1;
7622 unsigned SMT1CPW1
: 1;
7623 unsigned SMT1CPW2
: 1;
7624 unsigned SMT1CPW3
: 1;
7625 unsigned SMT1CPW4
: 1;
7626 unsigned SMT1CPW5
: 1;
7627 unsigned SMT1CPW6
: 1;
7628 unsigned SMT1CPW7
: 1;
7632 extern __at(0x0492) volatile __SMT1CPWLbits_t SMT1CPWLbits
;
7635 #define _SMT1CPW0 0x01
7637 #define _SMT1CPW1 0x02
7639 #define _SMT1CPW2 0x04
7641 #define _SMT1CPW3 0x08
7643 #define _SMT1CPW4 0x10
7645 #define _SMT1CPW5 0x20
7647 #define _SMT1CPW6 0x40
7649 #define _SMT1CPW7 0x80
7651 //==============================================================================
7654 //==============================================================================
7657 extern __at(0x0493) __sfr SMT1CPWH
;
7675 unsigned SMT1CPW8
: 1;
7676 unsigned SMT1CPW9
: 1;
7677 unsigned SMT1CPW10
: 1;
7678 unsigned SMT1CPW11
: 1;
7679 unsigned SMT1CPW12
: 1;
7680 unsigned SMT1CPW13
: 1;
7681 unsigned SMT1CPW14
: 1;
7682 unsigned SMT1CPW15
: 1;
7686 extern __at(0x0493) volatile __SMT1CPWHbits_t SMT1CPWHbits
;
7689 #define _SMT1CPW8 0x01
7691 #define _SMT1CPW9 0x02
7693 #define _SMT1CPW10 0x04
7695 #define _SMT1CPW11 0x08
7697 #define _SMT1CPW12 0x10
7699 #define _SMT1CPW13 0x20
7701 #define _SMT1CPW14 0x40
7703 #define _SMT1CPW15 0x80
7705 //==============================================================================
7708 //==============================================================================
7711 extern __at(0x0494) __sfr SMT1CPWU
;
7729 unsigned SMT1CPW16
: 1;
7730 unsigned SMT1CPW17
: 1;
7731 unsigned SMT1CPW18
: 1;
7732 unsigned SMT1CPW19
: 1;
7733 unsigned SMT1CPW20
: 1;
7734 unsigned SMT1CPW21
: 1;
7735 unsigned SMT1CPW22
: 1;
7736 unsigned SMT1CPW23
: 1;
7740 extern __at(0x0494) volatile __SMT1CPWUbits_t SMT1CPWUbits
;
7743 #define _SMT1CPW16 0x01
7745 #define _SMT1CPW17 0x02
7747 #define _SMT1CPW18 0x04
7749 #define _SMT1CPW19 0x08
7751 #define _SMT1CPW20 0x10
7753 #define _SMT1CPW21 0x20
7755 #define _SMT1CPW22 0x40
7757 #define _SMT1CPW23 0x80
7759 //==============================================================================
7761 extern __at(0x0495) __sfr SMT1PR
;
7763 //==============================================================================
7766 extern __at(0x0495) __sfr SMT1PRL
;
7770 unsigned SMT1PR0
: 1;
7771 unsigned SMT1PR1
: 1;
7772 unsigned SMT1PR2
: 1;
7773 unsigned SMT1PR3
: 1;
7774 unsigned SMT1PR4
: 1;
7775 unsigned SMT1PR5
: 1;
7776 unsigned SMT1PR6
: 1;
7777 unsigned SMT1PR7
: 1;
7780 extern __at(0x0495) volatile __SMT1PRLbits_t SMT1PRLbits
;
7782 #define _SMT1PR0 0x01
7783 #define _SMT1PR1 0x02
7784 #define _SMT1PR2 0x04
7785 #define _SMT1PR3 0x08
7786 #define _SMT1PR4 0x10
7787 #define _SMT1PR5 0x20
7788 #define _SMT1PR6 0x40
7789 #define _SMT1PR7 0x80
7791 //==============================================================================
7794 //==============================================================================
7797 extern __at(0x0496) __sfr SMT1PRH
;
7801 unsigned SMT1PR8
: 1;
7802 unsigned SMT1PR9
: 1;
7803 unsigned SMT1PR10
: 1;
7804 unsigned SMT1PR11
: 1;
7805 unsigned SMT1PR12
: 1;
7806 unsigned SMT1PR13
: 1;
7807 unsigned SMT1PR14
: 1;
7808 unsigned SMT1PR15
: 1;
7811 extern __at(0x0496) volatile __SMT1PRHbits_t SMT1PRHbits
;
7813 #define _SMT1PR8 0x01
7814 #define _SMT1PR9 0x02
7815 #define _SMT1PR10 0x04
7816 #define _SMT1PR11 0x08
7817 #define _SMT1PR12 0x10
7818 #define _SMT1PR13 0x20
7819 #define _SMT1PR14 0x40
7820 #define _SMT1PR15 0x80
7822 //==============================================================================
7825 //==============================================================================
7828 extern __at(0x0497) __sfr SMT1PRU
;
7832 unsigned SMT1PR16
: 1;
7833 unsigned SMT1PR17
: 1;
7834 unsigned SMT1PR18
: 1;
7835 unsigned SMT1PR19
: 1;
7836 unsigned SMT1PR20
: 1;
7837 unsigned SMT1PR21
: 1;
7838 unsigned SMT1PR22
: 1;
7839 unsigned SMT1PR23
: 1;
7842 extern __at(0x0497) volatile __SMT1PRUbits_t SMT1PRUbits
;
7844 #define _SMT1PR16 0x01
7845 #define _SMT1PR17 0x02
7846 #define _SMT1PR18 0x04
7847 #define _SMT1PR19 0x08
7848 #define _SMT1PR20 0x10
7849 #define _SMT1PR21 0x20
7850 #define _SMT1PR22 0x40
7851 #define _SMT1PR23 0x80
7853 //==============================================================================
7856 //==============================================================================
7859 extern __at(0x0498) __sfr SMT1CON0
;
7865 unsigned SMT1PS0
: 1;
7866 unsigned SMT1PS1
: 1;
7884 unsigned SMT1EN
: 1;
7889 unsigned SMT1PS
: 2;
7894 extern __at(0x0498) volatile __SMT1CON0bits_t SMT1CON0bits
;
7896 #define _SMT1CON0_SMT1PS0 0x01
7897 #define _SMT1CON0_SMT1PS1 0x02
7898 #define _SMT1CON0_CPOL 0x04
7899 #define _SMT1CON0_SPOL 0x08
7900 #define _SMT1CON0_WPOL 0x10
7901 #define _SMT1CON0_STP 0x20
7902 #define _SMT1CON0_EN 0x80
7903 #define _SMT1CON0_SMT1EN 0x80
7905 //==============================================================================
7908 //==============================================================================
7911 extern __at(0x0499) __sfr SMT1CON1
;
7923 unsigned REPEAT
: 1;
7924 unsigned SMT1GO
: 1;
7934 extern __at(0x0499) volatile __SMT1CON1bits_t SMT1CON1bits
;
7936 #define _SMT1CON1_MODE0 0x01
7937 #define _SMT1CON1_MODE1 0x02
7938 #define _SMT1CON1_MODE2 0x04
7939 #define _SMT1CON1_MODE3 0x08
7940 #define _SMT1CON1_REPEAT 0x40
7941 #define _SMT1CON1_SMT1GO 0x80
7943 //==============================================================================
7946 //==============================================================================
7949 extern __at(0x049A) __sfr SMT1STAT
;
7967 unsigned SMT1AS
: 1;
7968 unsigned SMT1WS
: 1;
7969 unsigned SMT1TS
: 1;
7972 unsigned SMT1RESET
: 1;
7973 unsigned SMT1CPWUP
: 1;
7974 unsigned SMT1CPRUP
: 1;
7978 extern __at(0x049A) volatile __SMT1STATbits_t SMT1STATbits
;
7981 #define _SMT1AS 0x01
7983 #define _SMT1WS 0x02
7985 #define _SMT1TS 0x04
7987 #define _SMT1RESET 0x20
7989 #define _SMT1CPWUP 0x40
7991 #define _SMT1CPRUP 0x80
7993 //==============================================================================
7996 //==============================================================================
7999 extern __at(0x049B) __sfr SMT1CLK
;
8017 unsigned SMT1CSEL0
: 1;
8018 unsigned SMT1CSEL1
: 1;
8019 unsigned SMT1CSEL2
: 1;
8029 unsigned SMT1CSEL
: 3;
8040 extern __at(0x049B) volatile __SMT1CLKbits_t SMT1CLKbits
;
8043 #define _SMT1CSEL0 0x01
8045 #define _SMT1CSEL1 0x02
8047 #define _SMT1CSEL2 0x04
8049 //==============================================================================
8052 //==============================================================================
8055 extern __at(0x049C) __sfr SMT1SIG
;
8073 unsigned SMT1SSEL0
: 1;
8074 unsigned SMT1SSEL1
: 1;
8075 unsigned SMT1SSEL2
: 1;
8076 unsigned SMT1SSEL3
: 1;
8077 unsigned SMT1SSEL4
: 1;
8091 unsigned SMT1SSEL
: 5;
8096 extern __at(0x049C) volatile __SMT1SIGbits_t SMT1SIGbits
;
8099 #define _SMT1SSEL0 0x01
8101 #define _SMT1SSEL1 0x02
8103 #define _SMT1SSEL2 0x04
8105 #define _SMT1SSEL3 0x08
8107 #define _SMT1SSEL4 0x10
8109 //==============================================================================
8112 //==============================================================================
8115 extern __at(0x049D) __sfr SMT1WIN
;
8133 unsigned SMT1WSEL0
: 1;
8134 unsigned SMT1WSEL1
: 1;
8135 unsigned SMT1WSEL2
: 1;
8136 unsigned SMT1WSEL3
: 1;
8137 unsigned SMT1WSEL4
: 1;
8145 unsigned SMT1WSEL
: 5;
8156 extern __at(0x049D) volatile __SMT1WINbits_t SMT1WINbits
;
8159 #define _SMT1WSEL0 0x01
8161 #define _SMT1WSEL1 0x02
8163 #define _SMT1WSEL2 0x04
8165 #define _SMT1WSEL3 0x08
8167 #define _SMT1WSEL4 0x10
8169 //==============================================================================
8171 extern __at(0x050C) __sfr SMT2TMR
;
8173 //==============================================================================
8176 extern __at(0x050C) __sfr SMT2TMRL
;
8180 unsigned SMT2TMR0
: 1;
8181 unsigned SMT2TMR1
: 1;
8182 unsigned SMT2TMR2
: 1;
8183 unsigned SMT2TMR3
: 1;
8184 unsigned SMT2TMR4
: 1;
8185 unsigned SMT2TMR5
: 1;
8186 unsigned SMT2TMR6
: 1;
8187 unsigned SMT2TMR7
: 1;
8190 extern __at(0x050C) volatile __SMT2TMRLbits_t SMT2TMRLbits
;
8192 #define _SMT2TMR0 0x01
8193 #define _SMT2TMR1 0x02
8194 #define _SMT2TMR2 0x04
8195 #define _SMT2TMR3 0x08
8196 #define _SMT2TMR4 0x10
8197 #define _SMT2TMR5 0x20
8198 #define _SMT2TMR6 0x40
8199 #define _SMT2TMR7 0x80
8201 //==============================================================================
8204 //==============================================================================
8207 extern __at(0x050D) __sfr SMT2TMRH
;
8211 unsigned SMT2TMR8
: 1;
8212 unsigned SMT2TMR9
: 1;
8213 unsigned SMT2TMR10
: 1;
8214 unsigned SMT2TMR11
: 1;
8215 unsigned SMT2TMR12
: 1;
8216 unsigned SMT2TMR13
: 1;
8217 unsigned SMT2TMR14
: 1;
8218 unsigned SMT2TMR15
: 1;
8221 extern __at(0x050D) volatile __SMT2TMRHbits_t SMT2TMRHbits
;
8223 #define _SMT2TMR8 0x01
8224 #define _SMT2TMR9 0x02
8225 #define _SMT2TMR10 0x04
8226 #define _SMT2TMR11 0x08
8227 #define _SMT2TMR12 0x10
8228 #define _SMT2TMR13 0x20
8229 #define _SMT2TMR14 0x40
8230 #define _SMT2TMR15 0x80
8232 //==============================================================================
8235 //==============================================================================
8238 extern __at(0x050E) __sfr SMT2TMRU
;
8242 unsigned SMT2TMR16
: 1;
8243 unsigned SMT2TMR17
: 1;
8244 unsigned SMT2TMR18
: 1;
8245 unsigned SMT2TMR19
: 1;
8246 unsigned SMT2TMR20
: 1;
8247 unsigned SMT2TMR21
: 1;
8248 unsigned SMT2TMR22
: 1;
8249 unsigned SMT2TMR23
: 1;
8252 extern __at(0x050E) volatile __SMT2TMRUbits_t SMT2TMRUbits
;
8254 #define _SMT2TMR16 0x01
8255 #define _SMT2TMR17 0x02
8256 #define _SMT2TMR18 0x04
8257 #define _SMT2TMR19 0x08
8258 #define _SMT2TMR20 0x10
8259 #define _SMT2TMR21 0x20
8260 #define _SMT2TMR22 0x40
8261 #define _SMT2TMR23 0x80
8263 //==============================================================================
8265 extern __at(0x050F) __sfr SMT2CPR
;
8267 //==============================================================================
8270 extern __at(0x050F) __sfr SMT2CPRL
;
8284 extern __at(0x050F) volatile __SMT2CPRLbits_t SMT2CPRLbits
;
8286 #define _SMT2CPRL_CPR0 0x01
8287 #define _SMT2CPRL_CPR1 0x02
8288 #define _SMT2CPRL_CPR2 0x04
8289 #define _SMT2CPRL_CPR3 0x08
8290 #define _SMT2CPRL_CPR4 0x10
8291 #define _SMT2CPRL_CPR5 0x20
8292 #define _SMT2CPRL_CPR6 0x40
8293 #define _SMT2CPRL_CPR7 0x80
8295 //==============================================================================
8298 //==============================================================================
8301 extern __at(0x0510) __sfr SMT2CPRH
;
8319 unsigned SMT2CPR8
: 1;
8320 unsigned SMT2CPR9
: 1;
8321 unsigned SMT2CPR10
: 1;
8322 unsigned SMT2CPR11
: 1;
8323 unsigned SMT2CPR12
: 1;
8324 unsigned SMT2CPR13
: 1;
8325 unsigned SMT2CPR14
: 1;
8326 unsigned SMT2CPR15
: 1;
8330 extern __at(0x0510) volatile __SMT2CPRHbits_t SMT2CPRHbits
;
8332 #define _SMT2CPRH_CPR8 0x01
8333 #define _SMT2CPRH_SMT2CPR8 0x01
8334 #define _SMT2CPRH_CPR9 0x02
8335 #define _SMT2CPRH_SMT2CPR9 0x02
8336 #define _SMT2CPRH_CPR10 0x04
8337 #define _SMT2CPRH_SMT2CPR10 0x04
8338 #define _SMT2CPRH_CPR11 0x08
8339 #define _SMT2CPRH_SMT2CPR11 0x08
8340 #define _SMT2CPRH_CPR12 0x10
8341 #define _SMT2CPRH_SMT2CPR12 0x10
8342 #define _SMT2CPRH_CPR13 0x20
8343 #define _SMT2CPRH_SMT2CPR13 0x20
8344 #define _SMT2CPRH_CPR14 0x40
8345 #define _SMT2CPRH_SMT2CPR14 0x40
8346 #define _SMT2CPRH_CPR15 0x80
8347 #define _SMT2CPRH_SMT2CPR15 0x80
8349 //==============================================================================
8352 //==============================================================================
8355 extern __at(0x0511) __sfr SMT2CPRU
;
8373 unsigned SMT2CPR16
: 1;
8374 unsigned SMT2CPR17
: 1;
8375 unsigned SMT2CPR18
: 1;
8376 unsigned SMT2CPR19
: 1;
8377 unsigned SMT2CPR20
: 1;
8378 unsigned SMT2CPR21
: 1;
8379 unsigned SMT2CPR22
: 1;
8380 unsigned SMT2CPR23
: 1;
8384 extern __at(0x0511) volatile __SMT2CPRUbits_t SMT2CPRUbits
;
8386 #define _SMT2CPRU_CPR16 0x01
8387 #define _SMT2CPRU_SMT2CPR16 0x01
8388 #define _SMT2CPRU_CPR17 0x02
8389 #define _SMT2CPRU_SMT2CPR17 0x02
8390 #define _SMT2CPRU_CPR18 0x04
8391 #define _SMT2CPRU_SMT2CPR18 0x04
8392 #define _SMT2CPRU_CPR19 0x08
8393 #define _SMT2CPRU_SMT2CPR19 0x08
8394 #define _SMT2CPRU_CPR20 0x10
8395 #define _SMT2CPRU_SMT2CPR20 0x10
8396 #define _SMT2CPRU_CPR21 0x20
8397 #define _SMT2CPRU_SMT2CPR21 0x20
8398 #define _SMT2CPRU_CPR22 0x40
8399 #define _SMT2CPRU_SMT2CPR22 0x40
8400 #define _SMT2CPRU_CPR23 0x80
8401 #define _SMT2CPRU_SMT2CPR23 0x80
8403 //==============================================================================
8405 extern __at(0x0512) __sfr SMT2CPW
;
8407 //==============================================================================
8410 extern __at(0x0512) __sfr SMT2CPWL
;
8428 unsigned SMT2CPW0
: 1;
8429 unsigned SMT2CPW1
: 1;
8430 unsigned SMT2CPW2
: 1;
8431 unsigned SMT2CPW3
: 1;
8432 unsigned SMT2CPW4
: 1;
8433 unsigned SMT2CPW5
: 1;
8434 unsigned SMT2CPW6
: 1;
8435 unsigned SMT2CPW7
: 1;
8439 extern __at(0x0512) volatile __SMT2CPWLbits_t SMT2CPWLbits
;
8441 #define _SMT2CPWL_CPW0 0x01
8442 #define _SMT2CPWL_SMT2CPW0 0x01
8443 #define _SMT2CPWL_CPW1 0x02
8444 #define _SMT2CPWL_SMT2CPW1 0x02
8445 #define _SMT2CPWL_CPW2 0x04
8446 #define _SMT2CPWL_SMT2CPW2 0x04
8447 #define _SMT2CPWL_CPW3 0x08
8448 #define _SMT2CPWL_SMT2CPW3 0x08
8449 #define _SMT2CPWL_CPW4 0x10
8450 #define _SMT2CPWL_SMT2CPW4 0x10
8451 #define _SMT2CPWL_CPW5 0x20
8452 #define _SMT2CPWL_SMT2CPW5 0x20
8453 #define _SMT2CPWL_CPW6 0x40
8454 #define _SMT2CPWL_SMT2CPW6 0x40
8455 #define _SMT2CPWL_CPW7 0x80
8456 #define _SMT2CPWL_SMT2CPW7 0x80
8458 //==============================================================================
8461 //==============================================================================
8464 extern __at(0x0513) __sfr SMT2CPWH
;
8482 unsigned SMT2CPW8
: 1;
8483 unsigned SMT2CPW9
: 1;
8484 unsigned SMT2CPW10
: 1;
8485 unsigned SMT2CPW11
: 1;
8486 unsigned SMT2CPW12
: 1;
8487 unsigned SMT2CPW13
: 1;
8488 unsigned SMT2CPW14
: 1;
8489 unsigned SMT2CPW15
: 1;
8493 extern __at(0x0513) volatile __SMT2CPWHbits_t SMT2CPWHbits
;
8495 #define _SMT2CPWH_CPW8 0x01
8496 #define _SMT2CPWH_SMT2CPW8 0x01
8497 #define _SMT2CPWH_CPW9 0x02
8498 #define _SMT2CPWH_SMT2CPW9 0x02
8499 #define _SMT2CPWH_CPW10 0x04
8500 #define _SMT2CPWH_SMT2CPW10 0x04
8501 #define _SMT2CPWH_CPW11 0x08
8502 #define _SMT2CPWH_SMT2CPW11 0x08
8503 #define _SMT2CPWH_CPW12 0x10
8504 #define _SMT2CPWH_SMT2CPW12 0x10
8505 #define _SMT2CPWH_CPW13 0x20
8506 #define _SMT2CPWH_SMT2CPW13 0x20
8507 #define _SMT2CPWH_CPW14 0x40
8508 #define _SMT2CPWH_SMT2CPW14 0x40
8509 #define _SMT2CPWH_CPW15 0x80
8510 #define _SMT2CPWH_SMT2CPW15 0x80
8512 //==============================================================================
8515 //==============================================================================
8518 extern __at(0x0514) __sfr SMT2CPWU
;
8536 unsigned SMT2CPW16
: 1;
8537 unsigned SMT2CPW17
: 1;
8538 unsigned SMT2CPW18
: 1;
8539 unsigned SMT2CPW19
: 1;
8540 unsigned SMT2CPW20
: 1;
8541 unsigned SMT2CPW21
: 1;
8542 unsigned SMT2CPW22
: 1;
8543 unsigned SMT2CPW23
: 1;
8547 extern __at(0x0514) volatile __SMT2CPWUbits_t SMT2CPWUbits
;
8549 #define _SMT2CPWU_CPW16 0x01
8550 #define _SMT2CPWU_SMT2CPW16 0x01
8551 #define _SMT2CPWU_CPW17 0x02
8552 #define _SMT2CPWU_SMT2CPW17 0x02
8553 #define _SMT2CPWU_CPW18 0x04
8554 #define _SMT2CPWU_SMT2CPW18 0x04
8555 #define _SMT2CPWU_CPW19 0x08
8556 #define _SMT2CPWU_SMT2CPW19 0x08
8557 #define _SMT2CPWU_CPW20 0x10
8558 #define _SMT2CPWU_SMT2CPW20 0x10
8559 #define _SMT2CPWU_CPW21 0x20
8560 #define _SMT2CPWU_SMT2CPW21 0x20
8561 #define _SMT2CPWU_CPW22 0x40
8562 #define _SMT2CPWU_SMT2CPW22 0x40
8563 #define _SMT2CPWU_CPW23 0x80
8564 #define _SMT2CPWU_SMT2CPW23 0x80
8566 //==============================================================================
8568 extern __at(0x0515) __sfr SMT2PR
;
8570 //==============================================================================
8573 extern __at(0x0515) __sfr SMT2PRL
;
8577 unsigned SMT2PR0
: 1;
8578 unsigned SMT2PR1
: 1;
8579 unsigned SMT2PR2
: 1;
8580 unsigned SMT2PR3
: 1;
8581 unsigned SMT2PR4
: 1;
8582 unsigned SMT2PR5
: 1;
8583 unsigned SMT2PR6
: 1;
8584 unsigned SMT2PR7
: 1;
8587 extern __at(0x0515) volatile __SMT2PRLbits_t SMT2PRLbits
;
8589 #define _SMT2PR0 0x01
8590 #define _SMT2PR1 0x02
8591 #define _SMT2PR2 0x04
8592 #define _SMT2PR3 0x08
8593 #define _SMT2PR4 0x10
8594 #define _SMT2PR5 0x20
8595 #define _SMT2PR6 0x40
8596 #define _SMT2PR7 0x80
8598 //==============================================================================
8601 //==============================================================================
8604 extern __at(0x0516) __sfr SMT2PRH
;
8608 unsigned SMT2PR8
: 1;
8609 unsigned SMT2PR9
: 1;
8610 unsigned SMT2PR10
: 1;
8611 unsigned SMT2PR11
: 1;
8612 unsigned SMT2PR12
: 1;
8613 unsigned SMT2PR13
: 1;
8614 unsigned SMT2PR14
: 1;
8615 unsigned SMT2PR15
: 1;
8618 extern __at(0x0516) volatile __SMT2PRHbits_t SMT2PRHbits
;
8620 #define _SMT2PR8 0x01
8621 #define _SMT2PR9 0x02
8622 #define _SMT2PR10 0x04
8623 #define _SMT2PR11 0x08
8624 #define _SMT2PR12 0x10
8625 #define _SMT2PR13 0x20
8626 #define _SMT2PR14 0x40
8627 #define _SMT2PR15 0x80
8629 //==============================================================================
8632 //==============================================================================
8635 extern __at(0x0517) __sfr SMT2PRU
;
8639 unsigned SMT2PR16
: 1;
8640 unsigned SMT2PR17
: 1;
8641 unsigned SMT2PR18
: 1;
8642 unsigned SMT2PR19
: 1;
8643 unsigned SMT2PR20
: 1;
8644 unsigned SMT2PR21
: 1;
8645 unsigned SMT2PR22
: 1;
8646 unsigned SMT2PR23
: 1;
8649 extern __at(0x0517) volatile __SMT2PRUbits_t SMT2PRUbits
;
8651 #define _SMT2PR16 0x01
8652 #define _SMT2PR17 0x02
8653 #define _SMT2PR18 0x04
8654 #define _SMT2PR19 0x08
8655 #define _SMT2PR20 0x10
8656 #define _SMT2PR21 0x20
8657 #define _SMT2PR22 0x40
8658 #define _SMT2PR23 0x80
8660 //==============================================================================
8663 //==============================================================================
8666 extern __at(0x0518) __sfr SMT2CON0
;
8672 unsigned SMT2PS0
: 1;
8673 unsigned SMT2PS1
: 1;
8691 unsigned SMT2EN
: 1;
8696 unsigned SMT2PS
: 2;
8701 extern __at(0x0518) volatile __SMT2CON0bits_t SMT2CON0bits
;
8703 #define _SMT2CON0_SMT2PS0 0x01
8704 #define _SMT2CON0_SMT2PS1 0x02
8705 #define _SMT2CON0_CPOL 0x04
8706 #define _SMT2CON0_SPOL 0x08
8707 #define _SMT2CON0_WPOL 0x10
8708 #define _SMT2CON0_STP 0x20
8709 #define _SMT2CON0_EN 0x80
8710 #define _SMT2CON0_SMT2EN 0x80
8712 //==============================================================================
8715 //==============================================================================
8718 extern __at(0x0519) __sfr SMT2CON1
;
8730 unsigned REPEAT
: 1;
8731 unsigned SMT2GO
: 1;
8741 extern __at(0x0519) volatile __SMT2CON1bits_t SMT2CON1bits
;
8743 #define _SMT2CON1_MODE0 0x01
8744 #define _SMT2CON1_MODE1 0x02
8745 #define _SMT2CON1_MODE2 0x04
8746 #define _SMT2CON1_MODE3 0x08
8747 #define _SMT2CON1_REPEAT 0x40
8748 #define _SMT2CON1_SMT2GO 0x80
8750 //==============================================================================
8753 //==============================================================================
8756 extern __at(0x051A) __sfr SMT2STAT
;
8774 unsigned SMT2AS
: 1;
8775 unsigned SMT2WS
: 1;
8776 unsigned SMT2TS
: 1;
8779 unsigned SMT2RESET
: 1;
8780 unsigned SMT2CPWUP
: 1;
8781 unsigned SMT2CPRUP
: 1;
8785 extern __at(0x051A) volatile __SMT2STATbits_t SMT2STATbits
;
8787 #define _SMT2STAT_AS 0x01
8788 #define _SMT2STAT_SMT2AS 0x01
8789 #define _SMT2STAT_WS 0x02
8790 #define _SMT2STAT_SMT2WS 0x02
8791 #define _SMT2STAT_TS 0x04
8792 #define _SMT2STAT_SMT2TS 0x04
8793 #define _SMT2STAT_RST 0x20
8794 #define _SMT2STAT_SMT2RESET 0x20
8795 #define _SMT2STAT_CPWUP 0x40
8796 #define _SMT2STAT_SMT2CPWUP 0x40
8797 #define _SMT2STAT_CPRUP 0x80
8798 #define _SMT2STAT_SMT2CPRUP 0x80
8800 //==============================================================================
8803 //==============================================================================
8806 extern __at(0x051B) __sfr SMT2CLK
;
8824 unsigned SMT2CSEL0
: 1;
8825 unsigned SMT2CSEL1
: 1;
8826 unsigned SMT2CSEL2
: 1;
8842 unsigned SMT2CSEL
: 3;
8847 extern __at(0x051B) volatile __SMT2CLKbits_t SMT2CLKbits
;
8849 #define _SMT2CLK_CSEL0 0x01
8850 #define _SMT2CLK_SMT2CSEL0 0x01
8851 #define _SMT2CLK_CSEL1 0x02
8852 #define _SMT2CLK_SMT2CSEL1 0x02
8853 #define _SMT2CLK_CSEL2 0x04
8854 #define _SMT2CLK_SMT2CSEL2 0x04
8856 //==============================================================================
8859 //==============================================================================
8862 extern __at(0x051C) __sfr SMT2SIG
;
8880 unsigned SMT2SSEL0
: 1;
8881 unsigned SMT2SSEL1
: 1;
8882 unsigned SMT2SSEL2
: 1;
8883 unsigned SMT2SSEL3
: 1;
8884 unsigned SMT2SSEL4
: 1;
8892 unsigned SMT2SSEL
: 5;
8903 extern __at(0x051C) volatile __SMT2SIGbits_t SMT2SIGbits
;
8905 #define _SMT2SIG_SSEL0 0x01
8906 #define _SMT2SIG_SMT2SSEL0 0x01
8907 #define _SMT2SIG_SSEL1 0x02
8908 #define _SMT2SIG_SMT2SSEL1 0x02
8909 #define _SMT2SIG_SSEL2 0x04
8910 #define _SMT2SIG_SMT2SSEL2 0x04
8911 #define _SMT2SIG_SSEL3 0x08
8912 #define _SMT2SIG_SMT2SSEL3 0x08
8913 #define _SMT2SIG_SSEL4 0x10
8914 #define _SMT2SIG_SMT2SSEL4 0x10
8916 //==============================================================================
8919 //==============================================================================
8922 extern __at(0x051D) __sfr SMT2WIN
;
8940 unsigned SMT2WSEL0
: 1;
8941 unsigned SMT2WSEL1
: 1;
8942 unsigned SMT2WSEL2
: 1;
8943 unsigned SMT2WSEL3
: 1;
8944 unsigned SMT2WSEL4
: 1;
8952 unsigned SMT2WSEL
: 5;
8963 extern __at(0x051D) volatile __SMT2WINbits_t SMT2WINbits
;
8965 #define _SMT2WIN_WSEL0 0x01
8966 #define _SMT2WIN_SMT2WSEL0 0x01
8967 #define _SMT2WIN_WSEL1 0x02
8968 #define _SMT2WIN_SMT2WSEL1 0x02
8969 #define _SMT2WIN_WSEL2 0x04
8970 #define _SMT2WIN_SMT2WSEL2 0x04
8971 #define _SMT2WIN_WSEL3 0x08
8972 #define _SMT2WIN_SMT2WSEL3 0x08
8973 #define _SMT2WIN_WSEL4 0x10
8974 #define _SMT2WIN_SMT2WSEL4 0x10
8976 //==============================================================================
8978 extern __at(0x058C) __sfr NCO1ACC
;
8980 //==============================================================================
8983 extern __at(0x058C) __sfr NCO1ACCL
;
8987 unsigned NCO1ACC0
: 1;
8988 unsigned NCO1ACC1
: 1;
8989 unsigned NCO1ACC2
: 1;
8990 unsigned NCO1ACC3
: 1;
8991 unsigned NCO1ACC4
: 1;
8992 unsigned NCO1ACC5
: 1;
8993 unsigned NCO1ACC6
: 1;
8994 unsigned NCO1ACC7
: 1;
8997 extern __at(0x058C) volatile __NCO1ACCLbits_t NCO1ACCLbits
;
8999 #define _NCO1ACC0 0x01
9000 #define _NCO1ACC1 0x02
9001 #define _NCO1ACC2 0x04
9002 #define _NCO1ACC3 0x08
9003 #define _NCO1ACC4 0x10
9004 #define _NCO1ACC5 0x20
9005 #define _NCO1ACC6 0x40
9006 #define _NCO1ACC7 0x80
9008 //==============================================================================
9011 //==============================================================================
9014 extern __at(0x058D) __sfr NCO1ACCH
;
9018 unsigned NCO1ACC8
: 1;
9019 unsigned NCO1ACC9
: 1;
9020 unsigned NCO1ACC10
: 1;
9021 unsigned NCO1ACC11
: 1;
9022 unsigned NCO1ACC12
: 1;
9023 unsigned NCO1ACC13
: 1;
9024 unsigned NCO1ACC14
: 1;
9025 unsigned NCO1ACC15
: 1;
9028 extern __at(0x058D) volatile __NCO1ACCHbits_t NCO1ACCHbits
;
9030 #define _NCO1ACC8 0x01
9031 #define _NCO1ACC9 0x02
9032 #define _NCO1ACC10 0x04
9033 #define _NCO1ACC11 0x08
9034 #define _NCO1ACC12 0x10
9035 #define _NCO1ACC13 0x20
9036 #define _NCO1ACC14 0x40
9037 #define _NCO1ACC15 0x80
9039 //==============================================================================
9042 //==============================================================================
9045 extern __at(0x058E) __sfr NCO1ACCU
;
9049 unsigned NCO1ACC16
: 1;
9050 unsigned NCO1ACC17
: 1;
9051 unsigned NCO1ACC18
: 1;
9052 unsigned NCO1ACC19
: 1;
9059 extern __at(0x058E) volatile __NCO1ACCUbits_t NCO1ACCUbits
;
9061 #define _NCO1ACC16 0x01
9062 #define _NCO1ACC17 0x02
9063 #define _NCO1ACC18 0x04
9064 #define _NCO1ACC19 0x08
9066 //==============================================================================
9068 extern __at(0x058F) __sfr NCO1INC
;
9070 //==============================================================================
9073 extern __at(0x058F) __sfr NCO1INCL
;
9077 unsigned NCO1INC0
: 1;
9078 unsigned NCO1INC1
: 1;
9079 unsigned NCO1INC2
: 1;
9080 unsigned NCO1INC3
: 1;
9081 unsigned NCO1INC4
: 1;
9082 unsigned NCO1INC5
: 1;
9083 unsigned NCO1INC6
: 1;
9084 unsigned NCO1INC7
: 1;
9087 extern __at(0x058F) volatile __NCO1INCLbits_t NCO1INCLbits
;
9089 #define _NCO1INC0 0x01
9090 #define _NCO1INC1 0x02
9091 #define _NCO1INC2 0x04
9092 #define _NCO1INC3 0x08
9093 #define _NCO1INC4 0x10
9094 #define _NCO1INC5 0x20
9095 #define _NCO1INC6 0x40
9096 #define _NCO1INC7 0x80
9098 //==============================================================================
9101 //==============================================================================
9104 extern __at(0x0590) __sfr NCO1INCH
;
9108 unsigned NCO1INC8
: 1;
9109 unsigned NCO1INC9
: 1;
9110 unsigned NCO1INC10
: 1;
9111 unsigned NCO1INC11
: 1;
9112 unsigned NCO1INC12
: 1;
9113 unsigned NCO1INC13
: 1;
9114 unsigned NCO1INC14
: 1;
9115 unsigned NCO1INC15
: 1;
9118 extern __at(0x0590) volatile __NCO1INCHbits_t NCO1INCHbits
;
9120 #define _NCO1INC8 0x01
9121 #define _NCO1INC9 0x02
9122 #define _NCO1INC10 0x04
9123 #define _NCO1INC11 0x08
9124 #define _NCO1INC12 0x10
9125 #define _NCO1INC13 0x20
9126 #define _NCO1INC14 0x40
9127 #define _NCO1INC15 0x80
9129 //==============================================================================
9132 //==============================================================================
9135 extern __at(0x0591) __sfr NCO1INCU
;
9139 unsigned NCO1INC16
: 1;
9140 unsigned NCO1INC17
: 1;
9141 unsigned NCO1INC18
: 1;
9142 unsigned NCO1INC19
: 1;
9149 extern __at(0x0591) volatile __NCO1INCUbits_t NCO1INCUbits
;
9151 #define _NCO1INC16 0x01
9152 #define _NCO1INC17 0x02
9153 #define _NCO1INC18 0x04
9154 #define _NCO1INC19 0x08
9156 //==============================================================================
9159 //==============================================================================
9162 extern __at(0x0592) __sfr NCO1CON
;
9176 extern __at(0x0592) volatile __NCO1CONbits_t NCO1CONbits
;
9183 //==============================================================================
9186 //==============================================================================
9189 extern __at(0x0593) __sfr NCO1CLK
;
9195 unsigned N1CKS0
: 1;
9196 unsigned N1CKS1
: 1;
9197 unsigned N1CKS2
: 1;
9200 unsigned N1PWS0
: 1;
9201 unsigned N1PWS1
: 1;
9202 unsigned N1PWS2
: 1;
9218 extern __at(0x0593) volatile __NCO1CLKbits_t NCO1CLKbits
;
9220 #define _N1CKS0 0x01
9221 #define _N1CKS1 0x02
9222 #define _N1CKS2 0x04
9223 #define _N1PWS0 0x20
9224 #define _N1PWS1 0x40
9225 #define _N1PWS2 0x80
9227 //==============================================================================
9230 //==============================================================================
9233 extern __at(0x060C) __sfr CWG1CLKCON
;
9251 unsigned CWG1CS
: 1;
9260 } __CWG1CLKCONbits_t
;
9262 extern __at(0x060C) volatile __CWG1CLKCONbits_t CWG1CLKCONbits
;
9265 #define _CWG1CS 0x01
9267 //==============================================================================
9270 //==============================================================================
9273 extern __at(0x060D) __sfr CWG1ISM
;
9279 unsigned CWG1ISM0
: 1;
9280 unsigned CWG1ISM1
: 1;
9281 unsigned CWG1ISM2
: 1;
9282 unsigned CWG1ISM3
: 1;
9291 unsigned CWG1ISM
: 4;
9296 extern __at(0x060D) volatile __CWG1ISMbits_t CWG1ISMbits
;
9298 #define _CWG1ISM0 0x01
9299 #define _CWG1ISM1 0x02
9300 #define _CWG1ISM2 0x04
9301 #define _CWG1ISM3 0x08
9303 //==============================================================================
9306 //==============================================================================
9309 extern __at(0x060E) __sfr CWG1DBR
;
9327 unsigned CWG1DBR0
: 1;
9328 unsigned CWG1DBR1
: 1;
9329 unsigned CWG1DBR2
: 1;
9330 unsigned CWG1DBR3
: 1;
9331 unsigned CWG1DBR4
: 1;
9332 unsigned CWG1DBR5
: 1;
9339 unsigned CWG1DBR
: 6;
9350 extern __at(0x060E) volatile __CWG1DBRbits_t CWG1DBRbits
;
9353 #define _CWG1DBR0 0x01
9355 #define _CWG1DBR1 0x02
9357 #define _CWG1DBR2 0x04
9359 #define _CWG1DBR3 0x08
9361 #define _CWG1DBR4 0x10
9363 #define _CWG1DBR5 0x20
9365 //==============================================================================
9368 //==============================================================================
9371 extern __at(0x060F) __sfr CWG1DBF
;
9389 unsigned CWG1DBF0
: 1;
9390 unsigned CWG1DBF1
: 1;
9391 unsigned CWG1DBF2
: 1;
9392 unsigned CWG1DBF3
: 1;
9393 unsigned CWG1DBF4
: 1;
9394 unsigned CWG1DBF5
: 1;
9407 unsigned CWG1DBF
: 6;
9412 extern __at(0x060F) volatile __CWG1DBFbits_t CWG1DBFbits
;
9415 #define _CWG1DBF0 0x01
9417 #define _CWG1DBF1 0x02
9419 #define _CWG1DBF2 0x04
9421 #define _CWG1DBF3 0x08
9423 #define _CWG1DBF4 0x10
9425 #define _CWG1DBF5 0x20
9427 //==============================================================================
9430 //==============================================================================
9433 extern __at(0x0610) __sfr CWG1CON0
;
9451 unsigned CWG1MODE0
: 1;
9452 unsigned CWG1MODE1
: 1;
9453 unsigned CWG1MODE2
: 1;
9457 unsigned CWG1LD
: 1;
9470 unsigned CWG1EN
: 1;
9475 unsigned CWG1MODE
: 3;
9486 extern __at(0x0610) volatile __CWG1CON0bits_t CWG1CON0bits
;
9488 #define _CWG1CON0_MODE0 0x01
9489 #define _CWG1CON0_CWG1MODE0 0x01
9490 #define _CWG1CON0_MODE1 0x02
9491 #define _CWG1CON0_CWG1MODE1 0x02
9492 #define _CWG1CON0_MODE2 0x04
9493 #define _CWG1CON0_CWG1MODE2 0x04
9494 #define _CWG1CON0_LD 0x40
9495 #define _CWG1CON0_CWG1LD 0x40
9496 #define _CWG1CON0_EN 0x80
9497 #define _CWG1CON0_G1EN 0x80
9498 #define _CWG1CON0_CWG1EN 0x80
9500 //==============================================================================
9503 //==============================================================================
9506 extern __at(0x0611) __sfr CWG1CON1
;
9524 unsigned CWG1POLA
: 1;
9525 unsigned CWG1POLB
: 1;
9526 unsigned CWG1POLC
: 1;
9527 unsigned CWG1POLD
: 1;
9529 unsigned CWG1IN
: 1;
9535 extern __at(0x0611) volatile __CWG1CON1bits_t CWG1CON1bits
;
9538 #define _CWG1POLA 0x01
9540 #define _CWG1POLB 0x02
9542 #define _CWG1POLC 0x04
9544 #define _CWG1POLD 0x08
9546 #define _CWG1IN 0x20
9548 //==============================================================================
9551 //==============================================================================
9554 extern __at(0x0612) __sfr CWG1AS0
;
9567 unsigned SHUTDOWN
: 1;
9574 unsigned CWG1LSAC0
: 1;
9575 unsigned CWG1LSAC1
: 1;
9576 unsigned CWG1LSBD0
: 1;
9577 unsigned CWG1LSBD1
: 1;
9578 unsigned CWG1REN
: 1;
9579 unsigned CWG1SHUTDOWN
: 1;
9585 unsigned CWG1LSAC
: 2;
9599 unsigned CWG1LSBD
: 2;
9611 extern __at(0x0612) volatile __CWG1AS0bits_t CWG1AS0bits
;
9614 #define _CWG1LSAC0 0x04
9616 #define _CWG1LSAC1 0x08
9618 #define _CWG1LSBD0 0x10
9620 #define _CWG1LSBD1 0x20
9622 #define _CWG1REN 0x40
9623 #define _SHUTDOWN 0x80
9624 #define _CWG1SHUTDOWN 0x80
9626 //==============================================================================
9629 //==============================================================================
9632 extern __at(0x0613) __sfr CWG1AS1
;
9646 extern __at(0x0613) volatile __CWG1AS1bits_t CWG1AS1bits
;
9656 //==============================================================================
9659 //==============================================================================
9662 extern __at(0x0614) __sfr CWG1STR
;
9680 unsigned CWG1STRA
: 1;
9681 unsigned CWG1STRB
: 1;
9682 unsigned CWG1STRC
: 1;
9683 unsigned CWG1STRD
: 1;
9684 unsigned CWG1OVRA
: 1;
9685 unsigned CWG1OVRB
: 1;
9686 unsigned CWG1OVRC
: 1;
9687 unsigned CWG1OVRD
: 1;
9691 extern __at(0x0614) volatile __CWG1STRbits_t CWG1STRbits
;
9694 #define _CWG1STRA 0x01
9696 #define _CWG1STRB 0x02
9698 #define _CWG1STRC 0x04
9700 #define _CWG1STRD 0x08
9702 #define _CWG1OVRA 0x10
9704 #define _CWG1OVRB 0x20
9706 #define _CWG1OVRC 0x40
9708 #define _CWG1OVRD 0x80
9710 //==============================================================================
9713 //==============================================================================
9716 extern __at(0x0616) __sfr CWG2CLKCON
;
9734 unsigned CWG2CS
: 1;
9743 } __CWG2CLKCONbits_t
;
9745 extern __at(0x0616) volatile __CWG2CLKCONbits_t CWG2CLKCONbits
;
9747 #define _CWG2CLKCON_CS 0x01
9748 #define _CWG2CLKCON_CWG2CS 0x01
9750 //==============================================================================
9753 //==============================================================================
9756 extern __at(0x0617) __sfr CWG2ISM
;
9762 unsigned CWG2ISM0
: 1;
9763 unsigned CWG2ISM1
: 1;
9764 unsigned CWG2ISM2
: 1;
9765 unsigned CWG2ISM3
: 1;
9774 unsigned CWG2ISM
: 4;
9779 extern __at(0x0617) volatile __CWG2ISMbits_t CWG2ISMbits
;
9781 #define _CWG2ISM0 0x01
9782 #define _CWG2ISM1 0x02
9783 #define _CWG2ISM2 0x04
9784 #define _CWG2ISM3 0x08
9786 //==============================================================================
9789 //==============================================================================
9792 extern __at(0x0618) __sfr CWG2DBR
;
9810 unsigned CWG2DBR0
: 1;
9811 unsigned CWG2DBR1
: 1;
9812 unsigned CWG2DBR2
: 1;
9813 unsigned CWG2DBR3
: 1;
9814 unsigned CWG2DBR4
: 1;
9815 unsigned CWG2DBR5
: 1;
9822 unsigned CWG2DBR
: 6;
9833 extern __at(0x0618) volatile __CWG2DBRbits_t CWG2DBRbits
;
9835 #define _CWG2DBR_DBR0 0x01
9836 #define _CWG2DBR_CWG2DBR0 0x01
9837 #define _CWG2DBR_DBR1 0x02
9838 #define _CWG2DBR_CWG2DBR1 0x02
9839 #define _CWG2DBR_DBR2 0x04
9840 #define _CWG2DBR_CWG2DBR2 0x04
9841 #define _CWG2DBR_DBR3 0x08
9842 #define _CWG2DBR_CWG2DBR3 0x08
9843 #define _CWG2DBR_DBR4 0x10
9844 #define _CWG2DBR_CWG2DBR4 0x10
9845 #define _CWG2DBR_DBR5 0x20
9846 #define _CWG2DBR_CWG2DBR5 0x20
9848 //==============================================================================
9851 //==============================================================================
9854 extern __at(0x0619) __sfr CWG2DBF
;
9872 unsigned CWG2DBF0
: 1;
9873 unsigned CWG2DBF1
: 1;
9874 unsigned CWG2DBF2
: 1;
9875 unsigned CWG2DBF3
: 1;
9876 unsigned CWG2DBF4
: 1;
9877 unsigned CWG2DBF5
: 1;
9884 unsigned CWG2DBF
: 6;
9895 extern __at(0x0619) volatile __CWG2DBFbits_t CWG2DBFbits
;
9897 #define _CWG2DBF_DBF0 0x01
9898 #define _CWG2DBF_CWG2DBF0 0x01
9899 #define _CWG2DBF_DBF1 0x02
9900 #define _CWG2DBF_CWG2DBF1 0x02
9901 #define _CWG2DBF_DBF2 0x04
9902 #define _CWG2DBF_CWG2DBF2 0x04
9903 #define _CWG2DBF_DBF3 0x08
9904 #define _CWG2DBF_CWG2DBF3 0x08
9905 #define _CWG2DBF_DBF4 0x10
9906 #define _CWG2DBF_CWG2DBF4 0x10
9907 #define _CWG2DBF_DBF5 0x20
9908 #define _CWG2DBF_CWG2DBF5 0x20
9910 //==============================================================================
9913 //==============================================================================
9916 extern __at(0x061A) __sfr CWG2CON0
;
9934 unsigned CWG2MODE0
: 1;
9935 unsigned CWG2MODE1
: 1;
9936 unsigned CWG2MODE2
: 1;
9940 unsigned CWG2LD
: 1;
9953 unsigned CWG2EN
: 1;
9958 unsigned CWG2MODE
: 3;
9969 extern __at(0x061A) volatile __CWG2CON0bits_t CWG2CON0bits
;
9971 #define _CWG2CON0_MODE0 0x01
9972 #define _CWG2CON0_CWG2MODE0 0x01
9973 #define _CWG2CON0_MODE1 0x02
9974 #define _CWG2CON0_CWG2MODE1 0x02
9975 #define _CWG2CON0_MODE2 0x04
9976 #define _CWG2CON0_CWG2MODE2 0x04
9977 #define _CWG2CON0_LD 0x40
9978 #define _CWG2CON0_CWG2LD 0x40
9979 #define _CWG2CON0_EN 0x80
9980 #define _CWG2CON0_G2EN 0x80
9981 #define _CWG2CON0_CWG2EN 0x80
9983 //==============================================================================
9986 //==============================================================================
9989 extern __at(0x061B) __sfr CWG2CON1
;
10007 unsigned CWG2POLA
: 1;
10008 unsigned CWG2POLB
: 1;
10009 unsigned CWG2POLC
: 1;
10010 unsigned CWG2POLD
: 1;
10012 unsigned CWG2IN
: 1;
10016 } __CWG2CON1bits_t
;
10018 extern __at(0x061B) volatile __CWG2CON1bits_t CWG2CON1bits
;
10020 #define _CWG2CON1_POLA 0x01
10021 #define _CWG2CON1_CWG2POLA 0x01
10022 #define _CWG2CON1_POLB 0x02
10023 #define _CWG2CON1_CWG2POLB 0x02
10024 #define _CWG2CON1_POLC 0x04
10025 #define _CWG2CON1_CWG2POLC 0x04
10026 #define _CWG2CON1_POLD 0x08
10027 #define _CWG2CON1_CWG2POLD 0x08
10028 #define _CWG2CON1_IN 0x20
10029 #define _CWG2CON1_CWG2IN 0x20
10031 //==============================================================================
10034 //==============================================================================
10037 extern __at(0x061C) __sfr CWG2AS0
;
10045 unsigned LSAC0
: 1;
10046 unsigned LSAC1
: 1;
10047 unsigned LSBD0
: 1;
10048 unsigned LSBD1
: 1;
10050 unsigned SHUTDOWN
: 1;
10057 unsigned CWG2LSAC0
: 1;
10058 unsigned CWG2LSAC1
: 1;
10059 unsigned CWG2LSBD0
: 1;
10060 unsigned CWG2LSBD1
: 1;
10061 unsigned CWG2REN
: 1;
10062 unsigned CWG2SHUTDOWN
: 1;
10068 unsigned CWG2LSAC
: 2;
10089 unsigned CWG2LSBD
: 2;
10094 extern __at(0x061C) volatile __CWG2AS0bits_t CWG2AS0bits
;
10096 #define _CWG2AS0_LSAC0 0x04
10097 #define _CWG2AS0_CWG2LSAC0 0x04
10098 #define _CWG2AS0_LSAC1 0x08
10099 #define _CWG2AS0_CWG2LSAC1 0x08
10100 #define _CWG2AS0_LSBD0 0x10
10101 #define _CWG2AS0_CWG2LSBD0 0x10
10102 #define _CWG2AS0_LSBD1 0x20
10103 #define _CWG2AS0_CWG2LSBD1 0x20
10104 #define _CWG2AS0_REN 0x40
10105 #define _CWG2AS0_CWG2REN 0x40
10106 #define _CWG2AS0_SHUTDOWN 0x80
10107 #define _CWG2AS0_CWG2SHUTDOWN 0x80
10109 //==============================================================================
10112 //==============================================================================
10115 extern __at(0x061D) __sfr CWG2AS1
;
10129 extern __at(0x061D) volatile __CWG2AS1bits_t CWG2AS1bits
;
10131 #define _CWG2AS1_AS0E 0x01
10132 #define _CWG2AS1_AS1E 0x02
10133 #define _CWG2AS1_AS2E 0x04
10134 #define _CWG2AS1_AS3E 0x08
10135 #define _CWG2AS1_AS4E 0x10
10136 #define _CWG2AS1_AS5E 0x20
10137 #define _CWG2AS1_AS6E 0x40
10139 //==============================================================================
10142 //==============================================================================
10145 extern __at(0x061E) __sfr CWG2STR
;
10163 unsigned CWG2STRA
: 1;
10164 unsigned CWG2STRB
: 1;
10165 unsigned CWG2STRC
: 1;
10166 unsigned CWG2STRD
: 1;
10167 unsigned CWG2OVRA
: 1;
10168 unsigned CWG2OVRB
: 1;
10169 unsigned CWG2OVRC
: 1;
10170 unsigned CWG2OVRD
: 1;
10174 extern __at(0x061E) volatile __CWG2STRbits_t CWG2STRbits
;
10176 #define _CWG2STR_STRA 0x01
10177 #define _CWG2STR_CWG2STRA 0x01
10178 #define _CWG2STR_STRB 0x02
10179 #define _CWG2STR_CWG2STRB 0x02
10180 #define _CWG2STR_STRC 0x04
10181 #define _CWG2STR_CWG2STRC 0x04
10182 #define _CWG2STR_STRD 0x08
10183 #define _CWG2STR_CWG2STRD 0x08
10184 #define _CWG2STR_OVRA 0x10
10185 #define _CWG2STR_CWG2OVRA 0x10
10186 #define _CWG2STR_OVRB 0x20
10187 #define _CWG2STR_CWG2OVRB 0x20
10188 #define _CWG2STR_OVRC 0x40
10189 #define _CWG2STR_CWG2OVRC 0x40
10190 #define _CWG2STR_OVRD 0x80
10191 #define _CWG2STR_CWG2OVRD 0x80
10193 //==============================================================================
10196 //==============================================================================
10199 extern __at(0x068C) __sfr CWG3CLKCON
;
10217 unsigned CWG3CS
: 1;
10226 } __CWG3CLKCONbits_t
;
10228 extern __at(0x068C) volatile __CWG3CLKCONbits_t CWG3CLKCONbits
;
10230 #define _CWG3CLKCON_CS 0x01
10231 #define _CWG3CLKCON_CWG3CS 0x01
10233 //==============================================================================
10236 //==============================================================================
10239 extern __at(0x068D) __sfr CWG3ISM
;
10245 unsigned CWG3ISM0
: 1;
10246 unsigned CWG3ISM1
: 1;
10247 unsigned CWG3ISM2
: 1;
10248 unsigned CWG3ISM3
: 1;
10257 unsigned CWG3ISM
: 4;
10262 extern __at(0x068D) volatile __CWG3ISMbits_t CWG3ISMbits
;
10264 #define _CWG3ISM0 0x01
10265 #define _CWG3ISM1 0x02
10266 #define _CWG3ISM2 0x04
10267 #define _CWG3ISM3 0x08
10269 //==============================================================================
10272 //==============================================================================
10275 extern __at(0x068E) __sfr CWG3DBR
;
10293 unsigned CWG3DBR0
: 1;
10294 unsigned CWG3DBR1
: 1;
10295 unsigned CWG3DBR2
: 1;
10296 unsigned CWG3DBR3
: 1;
10297 unsigned CWG3DBR4
: 1;
10298 unsigned CWG3DBR5
: 1;
10305 unsigned CWG3DBR
: 6;
10316 extern __at(0x068E) volatile __CWG3DBRbits_t CWG3DBRbits
;
10318 #define _CWG3DBR_DBR0 0x01
10319 #define _CWG3DBR_CWG3DBR0 0x01
10320 #define _CWG3DBR_DBR1 0x02
10321 #define _CWG3DBR_CWG3DBR1 0x02
10322 #define _CWG3DBR_DBR2 0x04
10323 #define _CWG3DBR_CWG3DBR2 0x04
10324 #define _CWG3DBR_DBR3 0x08
10325 #define _CWG3DBR_CWG3DBR3 0x08
10326 #define _CWG3DBR_DBR4 0x10
10327 #define _CWG3DBR_CWG3DBR4 0x10
10328 #define _CWG3DBR_DBR5 0x20
10329 #define _CWG3DBR_CWG3DBR5 0x20
10331 //==============================================================================
10334 //==============================================================================
10337 extern __at(0x068F) __sfr CWG3DBF
;
10355 unsigned CWG3DBF0
: 1;
10356 unsigned CWG3DBF1
: 1;
10357 unsigned CWG3DBF2
: 1;
10358 unsigned CWG3DBF3
: 1;
10359 unsigned CWG3DBF4
: 1;
10360 unsigned CWG3DBF5
: 1;
10367 unsigned CWG3DBF
: 6;
10378 extern __at(0x068F) volatile __CWG3DBFbits_t CWG3DBFbits
;
10380 #define _CWG3DBF_DBF0 0x01
10381 #define _CWG3DBF_CWG3DBF0 0x01
10382 #define _CWG3DBF_DBF1 0x02
10383 #define _CWG3DBF_CWG3DBF1 0x02
10384 #define _CWG3DBF_DBF2 0x04
10385 #define _CWG3DBF_CWG3DBF2 0x04
10386 #define _CWG3DBF_DBF3 0x08
10387 #define _CWG3DBF_CWG3DBF3 0x08
10388 #define _CWG3DBF_DBF4 0x10
10389 #define _CWG3DBF_CWG3DBF4 0x10
10390 #define _CWG3DBF_DBF5 0x20
10391 #define _CWG3DBF_CWG3DBF5 0x20
10393 //==============================================================================
10396 //==============================================================================
10399 extern __at(0x0690) __sfr CWG3CON0
;
10405 unsigned MODE0
: 1;
10406 unsigned MODE1
: 1;
10407 unsigned MODE2
: 1;
10417 unsigned CWG3MODE0
: 1;
10418 unsigned CWG3MODE1
: 1;
10419 unsigned CWG3MODE2
: 1;
10423 unsigned CWG3LD
: 1;
10436 unsigned CWG3EN
: 1;
10441 unsigned CWG3MODE
: 3;
10450 } __CWG3CON0bits_t
;
10452 extern __at(0x0690) volatile __CWG3CON0bits_t CWG3CON0bits
;
10454 #define _CWG3CON0_MODE0 0x01
10455 #define _CWG3CON0_CWG3MODE0 0x01
10456 #define _CWG3CON0_MODE1 0x02
10457 #define _CWG3CON0_CWG3MODE1 0x02
10458 #define _CWG3CON0_MODE2 0x04
10459 #define _CWG3CON0_CWG3MODE2 0x04
10460 #define _CWG3CON0_LD 0x40
10461 #define _CWG3CON0_CWG3LD 0x40
10462 #define _CWG3CON0_EN 0x80
10463 #define _CWG3CON0_G3EN 0x80
10464 #define _CWG3CON0_CWG3EN 0x80
10466 //==============================================================================
10469 //==============================================================================
10472 extern __at(0x0691) __sfr CWG3CON1
;
10490 unsigned CWG3POLA
: 1;
10491 unsigned CWG3POLB
: 1;
10492 unsigned CWG3POLC
: 1;
10493 unsigned CWG3POLD
: 1;
10495 unsigned CWG3IN
: 1;
10499 } __CWG3CON1bits_t
;
10501 extern __at(0x0691) volatile __CWG3CON1bits_t CWG3CON1bits
;
10503 #define _CWG3CON1_POLA 0x01
10504 #define _CWG3CON1_CWG3POLA 0x01
10505 #define _CWG3CON1_POLB 0x02
10506 #define _CWG3CON1_CWG3POLB 0x02
10507 #define _CWG3CON1_POLC 0x04
10508 #define _CWG3CON1_CWG3POLC 0x04
10509 #define _CWG3CON1_POLD 0x08
10510 #define _CWG3CON1_CWG3POLD 0x08
10511 #define _CWG3CON1_IN 0x20
10512 #define _CWG3CON1_CWG3IN 0x20
10514 //==============================================================================
10517 //==============================================================================
10520 extern __at(0x0692) __sfr CWG3AS0
;
10528 unsigned LSAC0
: 1;
10529 unsigned LSAC1
: 1;
10530 unsigned LSBD0
: 1;
10531 unsigned LSBD1
: 1;
10533 unsigned SHUTDOWN
: 1;
10540 unsigned CWG3LSAC0
: 1;
10541 unsigned CWG3LSAC1
: 1;
10542 unsigned CWG3LSBD0
: 1;
10543 unsigned CWG3LSBD1
: 1;
10544 unsigned CWG3REN
: 1;
10545 unsigned CWG3SHUTDOWN
: 1;
10551 unsigned CWG3LSAC
: 2;
10572 unsigned CWG3LSBD
: 2;
10577 extern __at(0x0692) volatile __CWG3AS0bits_t CWG3AS0bits
;
10579 #define _CWG3AS0_LSAC0 0x04
10580 #define _CWG3AS0_CWG3LSAC0 0x04
10581 #define _CWG3AS0_LSAC1 0x08
10582 #define _CWG3AS0_CWG3LSAC1 0x08
10583 #define _CWG3AS0_LSBD0 0x10
10584 #define _CWG3AS0_CWG3LSBD0 0x10
10585 #define _CWG3AS0_LSBD1 0x20
10586 #define _CWG3AS0_CWG3LSBD1 0x20
10587 #define _CWG3AS0_REN 0x40
10588 #define _CWG3AS0_CWG3REN 0x40
10589 #define _CWG3AS0_SHUTDOWN 0x80
10590 #define _CWG3AS0_CWG3SHUTDOWN 0x80
10592 //==============================================================================
10595 //==============================================================================
10598 extern __at(0x0693) __sfr CWG3AS1
;
10612 extern __at(0x0693) volatile __CWG3AS1bits_t CWG3AS1bits
;
10614 #define _CWG3AS1_AS0E 0x01
10615 #define _CWG3AS1_AS1E 0x02
10616 #define _CWG3AS1_AS2E 0x04
10617 #define _CWG3AS1_AS3E 0x08
10618 #define _CWG3AS1_AS4E 0x10
10619 #define _CWG3AS1_AS5E 0x20
10620 #define _CWG3AS1_AS6E 0x40
10622 //==============================================================================
10625 //==============================================================================
10628 extern __at(0x0694) __sfr CWG3STR
;
10646 unsigned CWG3STRA
: 1;
10647 unsigned CWG3STRB
: 1;
10648 unsigned CWG3STRC
: 1;
10649 unsigned CWG3STRD
: 1;
10650 unsigned CWG3OVRA
: 1;
10651 unsigned CWG3OVRB
: 1;
10652 unsigned CWG3OVRC
: 1;
10653 unsigned CWG3OVRD
: 1;
10657 extern __at(0x0694) volatile __CWG3STRbits_t CWG3STRbits
;
10659 #define _CWG3STR_STRA 0x01
10660 #define _CWG3STR_CWG3STRA 0x01
10661 #define _CWG3STR_STRB 0x02
10662 #define _CWG3STR_CWG3STRB 0x02
10663 #define _CWG3STR_STRC 0x04
10664 #define _CWG3STR_CWG3STRC 0x04
10665 #define _CWG3STR_STRD 0x08
10666 #define _CWG3STR_CWG3STRD 0x08
10667 #define _CWG3STR_OVRA 0x10
10668 #define _CWG3STR_CWG3OVRA 0x10
10669 #define _CWG3STR_OVRB 0x20
10670 #define _CWG3STR_CWG3OVRB 0x20
10671 #define _CWG3STR_OVRC 0x40
10672 #define _CWG3STR_CWG3OVRC 0x40
10673 #define _CWG3STR_OVRD 0x80
10674 #define _CWG3STR_CWG3OVRD 0x80
10676 //==============================================================================
10679 //==============================================================================
10682 extern __at(0x070C) __sfr PIR0
;
10690 unsigned IOCIF
: 1;
10691 unsigned TMR0IF
: 1;
10696 extern __at(0x070C) volatile __PIR0bits_t PIR0bits
;
10699 #define _IOCIF 0x10
10700 #define _TMR0IF 0x20
10702 //==============================================================================
10705 //==============================================================================
10708 extern __at(0x070D) __sfr PIR1
;
10713 unsigned ADTIF
: 1;
10718 unsigned CSWIF
: 1;
10719 unsigned OSFIF
: 1;
10722 extern __at(0x070D) volatile __PIR1bits_t PIR1bits
;
10725 #define _ADTIF 0x02
10726 #define _CSWIF 0x40
10727 #define _OSFIF 0x80
10729 //==============================================================================
10732 //==============================================================================
10735 extern __at(0x070E) __sfr PIR2
;
10745 unsigned ZCDIF
: 1;
10749 extern __at(0x070E) volatile __PIR2bits_t PIR2bits
;
10753 #define _ZCDIF 0x40
10755 //==============================================================================
10758 //==============================================================================
10761 extern __at(0x070F) __sfr PIR3
;
10765 unsigned SSP1IF
: 1;
10766 unsigned BCL1IF
: 1;
10767 unsigned SSP2IF
: 1;
10768 unsigned BCL2IF
: 1;
10775 extern __at(0x070F) volatile __PIR3bits_t PIR3bits
;
10777 #define _SSP1IF 0x01
10778 #define _BCL1IF 0x02
10779 #define _SSP2IF 0x04
10780 #define _BCL2IF 0x08
10784 //==============================================================================
10787 //==============================================================================
10790 extern __at(0x0710) __sfr PIR4
;
10794 unsigned TMR1IF
: 1;
10795 unsigned TMR2IF
: 1;
10796 unsigned TMR3IF
: 1;
10797 unsigned TMR4IF
: 1;
10798 unsigned TMR5IF
: 1;
10799 unsigned TMR6IF
: 1;
10804 extern __at(0x0710) volatile __PIR4bits_t PIR4bits
;
10806 #define _TMR1IF 0x01
10807 #define _TMR2IF 0x02
10808 #define _TMR3IF 0x04
10809 #define _TMR4IF 0x08
10810 #define _TMR5IF 0x10
10811 #define _TMR6IF 0x20
10813 //==============================================================================
10816 //==============================================================================
10819 extern __at(0x0711) __sfr PIR5
;
10823 unsigned TMR1GIF
: 1;
10824 unsigned TMR3GIF
: 1;
10825 unsigned TMR5GIF
: 1;
10827 unsigned CLC1IF
: 1;
10828 unsigned CLC2IF
: 1;
10829 unsigned CLC3IF
: 1;
10830 unsigned CLC4IF
: 1;
10833 extern __at(0x0711) volatile __PIR5bits_t PIR5bits
;
10835 #define _TMR1GIF 0x01
10836 #define _TMR3GIF 0x02
10837 #define _TMR5GIF 0x04
10838 #define _CLC1IF 0x10
10839 #define _CLC2IF 0x20
10840 #define _CLC3IF 0x40
10841 #define _CLC4IF 0x80
10843 //==============================================================================
10846 //==============================================================================
10849 extern __at(0x0712) __sfr PIR6
;
10853 unsigned CCP1IF
: 1;
10854 unsigned CCP2IF
: 1;
10855 unsigned CCP3IF
: 1;
10856 unsigned CCP4IF
: 1;
10857 unsigned CCP5IF
: 1;
10863 extern __at(0x0712) volatile __PIR6bits_t PIR6bits
;
10865 #define _CCP1IF 0x01
10866 #define _CCP2IF 0x02
10867 #define _CCP3IF 0x04
10868 #define _CCP4IF 0x08
10869 #define _CCP5IF 0x10
10871 //==============================================================================
10874 //==============================================================================
10877 extern __at(0x0713) __sfr PIR7
;
10883 unsigned CWG1IF
: 1;
10884 unsigned CWG2IF
: 1;
10885 unsigned CWG3IF
: 1;
10887 unsigned NCO1IF
: 1;
10888 unsigned NVMIF
: 1;
10889 unsigned CRCIF
: 1;
10890 unsigned SCANIF
: 1;
10899 unsigned NCOIF
: 1;
10906 extern __at(0x0713) volatile __PIR7bits_t PIR7bits
;
10908 #define _CWG1IF 0x01
10909 #define _CWG2IF 0x02
10910 #define _CWG3IF 0x04
10911 #define _NCO1IF 0x10
10912 #define _NCOIF 0x10
10913 #define _NVMIF 0x20
10914 #define _CRCIF 0x40
10915 #define _SCANIF 0x80
10917 //==============================================================================
10920 //==============================================================================
10923 extern __at(0x0714) __sfr PIR8
;
10927 unsigned SMT1IF
: 1;
10928 unsigned SMT1PRAIF
: 1;
10929 unsigned SMT1PWAIF
: 1;
10930 unsigned SMT2IF
: 1;
10931 unsigned SMT2PRAIF
: 1;
10932 unsigned SMT2PWAIF
: 1;
10937 extern __at(0x0714) volatile __PIR8bits_t PIR8bits
;
10939 #define _SMT1IF 0x01
10940 #define _SMT1PRAIF 0x02
10941 #define _SMT1PWAIF 0x04
10942 #define _SMT2IF 0x08
10943 #define _SMT2PRAIF 0x10
10944 #define _SMT2PWAIF 0x20
10946 //==============================================================================
10949 //==============================================================================
10952 extern __at(0x0716) __sfr PIE0
;
10960 unsigned IOCIE
: 1;
10961 unsigned TMR0IE
: 1;
10966 extern __at(0x0716) volatile __PIE0bits_t PIE0bits
;
10969 #define _IOCIE 0x10
10970 #define _TMR0IE 0x20
10972 //==============================================================================
10975 //==============================================================================
10978 extern __at(0x0717) __sfr PIE1
;
10983 unsigned ADTIE
: 1;
10988 unsigned CSWIE
: 1;
10989 unsigned OSFIE
: 1;
10992 extern __at(0x0717) volatile __PIE1bits_t PIE1bits
;
10995 #define _ADTIE 0x02
10996 #define _CSWIE 0x40
10997 #define _OSFIE 0x80
10999 //==============================================================================
11002 //==============================================================================
11005 extern __at(0x0718) __sfr PIE2
;
11015 unsigned ZCDIE
: 1;
11019 extern __at(0x0718) volatile __PIE2bits_t PIE2bits
;
11023 #define _ZCDIE 0x40
11025 //==============================================================================
11028 //==============================================================================
11031 extern __at(0x0719) __sfr PIE3
;
11035 unsigned SSP1IE
: 1;
11036 unsigned BCL1IE
: 1;
11037 unsigned SSP2IE
: 1;
11038 unsigned BCL2IE
: 1;
11045 extern __at(0x0719) volatile __PIE3bits_t PIE3bits
;
11047 #define _SSP1IE 0x01
11048 #define _BCL1IE 0x02
11049 #define _SSP2IE 0x04
11050 #define _BCL2IE 0x08
11054 //==============================================================================
11057 //==============================================================================
11060 extern __at(0x071A) __sfr PIE4
;
11064 unsigned TMR1IE
: 1;
11065 unsigned TMR2IE
: 1;
11066 unsigned TMR3IE
: 1;
11067 unsigned TMR4IE
: 1;
11068 unsigned TMR5IE
: 1;
11069 unsigned TMR6IE
: 1;
11074 extern __at(0x071A) volatile __PIE4bits_t PIE4bits
;
11076 #define _TMR1IE 0x01
11077 #define _TMR2IE 0x02
11078 #define _TMR3IE 0x04
11079 #define _TMR4IE 0x08
11080 #define _TMR5IE 0x10
11081 #define _TMR6IE 0x20
11083 //==============================================================================
11086 //==============================================================================
11089 extern __at(0x071B) __sfr PIE5
;
11093 unsigned TMR1GIE
: 1;
11094 unsigned TMR3GIE
: 1;
11095 unsigned TMR5GIE
: 1;
11097 unsigned CLC1IE
: 1;
11098 unsigned CLC2IE
: 1;
11099 unsigned CLC3IE
: 1;
11100 unsigned CLC4IE
: 1;
11103 extern __at(0x071B) volatile __PIE5bits_t PIE5bits
;
11105 #define _TMR1GIE 0x01
11106 #define _TMR3GIE 0x02
11107 #define _TMR5GIE 0x04
11108 #define _CLC1IE 0x10
11109 #define _CLC2IE 0x20
11110 #define _CLC3IE 0x40
11111 #define _CLC4IE 0x80
11113 //==============================================================================
11116 //==============================================================================
11119 extern __at(0x071C) __sfr PIE6
;
11123 unsigned CCP1IE
: 1;
11124 unsigned CCP2IE
: 1;
11125 unsigned CCP3IE
: 1;
11126 unsigned CCP4IE
: 1;
11127 unsigned CCP5IE
: 1;
11133 extern __at(0x071C) volatile __PIE6bits_t PIE6bits
;
11135 #define _CCP1IE 0x01
11136 #define _CCP2IE 0x02
11137 #define _CCP3IE 0x04
11138 #define _CCP4IE 0x08
11139 #define _CCP5IE 0x10
11141 //==============================================================================
11144 //==============================================================================
11147 extern __at(0x071D) __sfr PIE7
;
11153 unsigned CWG1IE
: 1;
11154 unsigned CWG2IE
: 1;
11155 unsigned CWG3IE
: 1;
11157 unsigned NCO1IE
: 1;
11158 unsigned NVMIE
: 1;
11159 unsigned CRCIE
: 1;
11160 unsigned SCANIE
: 1;
11169 unsigned NCOIE
: 1;
11176 extern __at(0x071D) volatile __PIE7bits_t PIE7bits
;
11178 #define _CWG1IE 0x01
11179 #define _CWG2IE 0x02
11180 #define _CWG3IE 0x04
11181 #define _NCO1IE 0x10
11182 #define _NCOIE 0x10
11183 #define _NVMIE 0x20
11184 #define _CRCIE 0x40
11185 #define _SCANIE 0x80
11187 //==============================================================================
11190 //==============================================================================
11193 extern __at(0x071E) __sfr PIE8
;
11197 unsigned SMT1IE
: 1;
11198 unsigned SMT1PRAIE
: 1;
11199 unsigned SMT1PWAIE
: 1;
11200 unsigned SMT2IE
: 1;
11201 unsigned SMT2PRAIE
: 1;
11202 unsigned SMT2PWAIE
: 1;
11207 extern __at(0x071E) volatile __PIE8bits_t PIE8bits
;
11209 #define _SMT1IE 0x01
11210 #define _SMT1PRAIE 0x02
11211 #define _SMT1PWAIE 0x04
11212 #define _SMT2IE 0x08
11213 #define _SMT2PRAIE 0x10
11214 #define _SMT2PWAIE 0x20
11216 //==============================================================================
11219 //==============================================================================
11222 extern __at(0x0796) __sfr PMD0
;
11226 unsigned IOCMD
: 1;
11227 unsigned CLKRMD
: 1;
11228 unsigned NVMMD
: 1;
11229 unsigned SCANMD
: 1;
11230 unsigned CRCMD
: 1;
11232 unsigned FVRMD
: 1;
11233 unsigned SYSCMD
: 1;
11236 extern __at(0x0796) volatile __PMD0bits_t PMD0bits
;
11238 #define _IOCMD 0x01
11239 #define _CLKRMD 0x02
11240 #define _NVMMD 0x04
11241 #define _SCANMD 0x08
11242 #define _CRCMD 0x10
11243 #define _FVRMD 0x40
11244 #define _SYSCMD 0x80
11246 //==============================================================================
11249 //==============================================================================
11252 extern __at(0x0797) __sfr PMD1
;
11258 unsigned TMR0MD
: 1;
11259 unsigned TMR1MD
: 1;
11260 unsigned TMR2MD
: 1;
11261 unsigned TMR3MD
: 1;
11262 unsigned TMR4MD
: 1;
11263 unsigned TMR5MD
: 1;
11264 unsigned TMR6MD
: 1;
11265 unsigned NCOMD
: 1;
11277 unsigned NCO1MD
: 1;
11281 extern __at(0x0797) volatile __PMD1bits_t PMD1bits
;
11283 #define _TMR0MD 0x01
11284 #define _TMR1MD 0x02
11285 #define _TMR2MD 0x04
11286 #define _TMR3MD 0x08
11287 #define _TMR4MD 0x10
11288 #define _TMR5MD 0x20
11289 #define _TMR6MD 0x40
11290 #define _NCOMD 0x80
11291 #define _NCO1MD 0x80
11293 //==============================================================================
11296 //==============================================================================
11299 extern __at(0x0798) __sfr PMD2
;
11303 unsigned ZCDMD
: 1;
11304 unsigned CMP1MD
: 1;
11305 unsigned CMP2MD
: 1;
11308 unsigned ADCMD
: 1;
11309 unsigned DACMD
: 1;
11313 extern __at(0x0798) volatile __PMD2bits_t PMD2bits
;
11315 #define _ZCDMD 0x01
11316 #define _CMP1MD 0x02
11317 #define _CMP2MD 0x04
11318 #define _ADCMD 0x20
11319 #define _DACMD 0x40
11321 //==============================================================================
11324 //==============================================================================
11327 extern __at(0x0799) __sfr PMD3
;
11331 unsigned CCP1MD
: 1;
11332 unsigned CCP2MD
: 1;
11333 unsigned CCP3MD
: 1;
11334 unsigned CCP4MD
: 1;
11335 unsigned CCP5MD
: 1;
11336 unsigned PWM6MD
: 1;
11337 unsigned PWM7MD
: 1;
11341 extern __at(0x0799) volatile __PMD3bits_t PMD3bits
;
11343 #define _CCP1MD 0x01
11344 #define _CCP2MD 0x02
11345 #define _CCP3MD 0x04
11346 #define _CCP4MD 0x08
11347 #define _CCP5MD 0x10
11348 #define _PWM6MD 0x20
11349 #define _PWM7MD 0x40
11351 //==============================================================================
11354 //==============================================================================
11357 extern __at(0x079A) __sfr PMD4
;
11361 unsigned CWG1MD
: 1;
11362 unsigned CWG2MD
: 1;
11363 unsigned CWG3MD
: 1;
11365 unsigned MSSP1MD
: 1;
11366 unsigned MSSP2MD
: 1;
11367 unsigned UART1MD
: 1;
11371 extern __at(0x079A) volatile __PMD4bits_t PMD4bits
;
11373 #define _CWG1MD 0x01
11374 #define _CWG2MD 0x02
11375 #define _CWG3MD 0x04
11376 #define _MSSP1MD 0x10
11377 #define _MSSP2MD 0x20
11378 #define _UART1MD 0x40
11380 //==============================================================================
11383 //==============================================================================
11386 extern __at(0x079B) __sfr PMD5
;
11390 unsigned DSMMD
: 1;
11391 unsigned CLC1MD
: 1;
11392 unsigned CLC2MD
: 1;
11393 unsigned CLC3MD
: 1;
11394 unsigned CLC4MD
: 1;
11396 unsigned SMT1MD
: 1;
11397 unsigned SMT2MD
: 1;
11400 extern __at(0x079B) volatile __PMD5bits_t PMD5bits
;
11402 #define _DSMMD 0x01
11403 #define _CLC1MD 0x02
11404 #define _CLC2MD 0x04
11405 #define _CLC3MD 0x08
11406 #define _CLC4MD 0x10
11407 #define _SMT1MD 0x40
11408 #define _SMT2MD 0x80
11410 //==============================================================================
11413 //==============================================================================
11416 extern __at(0x080C) __sfr WDTCON0
;
11423 unsigned WDTPS0
: 1;
11424 unsigned WDTPS1
: 1;
11425 unsigned WDTPS2
: 1;
11426 unsigned WDTPS3
: 1;
11427 unsigned WDTPS4
: 1;
11434 unsigned SWDTEN
: 1;
11446 unsigned WDTSEN
: 1;
11459 unsigned WDTPS
: 5;
11464 extern __at(0x080C) volatile __WDTCON0bits_t WDTCON0bits
;
11466 #define _WDTCON0_SEN 0x01
11467 #define _WDTCON0_SWDTEN 0x01
11468 #define _WDTCON0_WDTSEN 0x01
11469 #define _WDTCON0_WDTPS0 0x02
11470 #define _WDTCON0_WDTPS1 0x04
11471 #define _WDTCON0_WDTPS2 0x08
11472 #define _WDTCON0_WDTPS3 0x10
11473 #define _WDTCON0_WDTPS4 0x20
11475 //==============================================================================
11478 //==============================================================================
11481 extern __at(0x080D) __sfr WDTCON1
;
11487 unsigned WINDOW0
: 1;
11488 unsigned WINDOW1
: 1;
11489 unsigned WINDOW2
: 1;
11491 unsigned WDTCS0
: 1;
11492 unsigned WDTCS1
: 1;
11493 unsigned WDTCS2
: 1;
11499 unsigned WDTWINDOW0
: 1;
11500 unsigned WDTWINDOW1
: 1;
11501 unsigned WDTWINDOW2
: 1;
11511 unsigned WDTWINDOW
: 3;
11517 unsigned WINDOW
: 3;
11524 unsigned WDTCS
: 3;
11529 extern __at(0x080D) volatile __WDTCON1bits_t WDTCON1bits
;
11531 #define _WINDOW0 0x01
11532 #define _WDTWINDOW0 0x01
11533 #define _WINDOW1 0x02
11534 #define _WDTWINDOW1 0x02
11535 #define _WINDOW2 0x04
11536 #define _WDTWINDOW2 0x04
11537 #define _WDTCS0 0x10
11538 #define _WDTCS1 0x20
11539 #define _WDTCS2 0x40
11541 //==============================================================================
11544 //==============================================================================
11547 extern __at(0x080E) __sfr WDTPSL
;
11553 unsigned PSCNT0
: 1;
11554 unsigned PSCNT1
: 1;
11555 unsigned PSCNT2
: 1;
11556 unsigned PSCNT3
: 1;
11557 unsigned PSCNT4
: 1;
11558 unsigned PSCNT5
: 1;
11559 unsigned PSCNT6
: 1;
11560 unsigned PSCNT7
: 1;
11565 unsigned WDTPSCNT0
: 1;
11566 unsigned WDTPSCNT1
: 1;
11567 unsigned WDTPSCNT2
: 1;
11568 unsigned WDTPSCNT3
: 1;
11569 unsigned WDTPSCNT4
: 1;
11570 unsigned WDTPSCNT5
: 1;
11571 unsigned WDTPSCNT6
: 1;
11572 unsigned WDTPSCNT7
: 1;
11576 extern __at(0x080E) volatile __WDTPSLbits_t WDTPSLbits
;
11578 #define _PSCNT0 0x01
11579 #define _WDTPSCNT0 0x01
11580 #define _PSCNT1 0x02
11581 #define _WDTPSCNT1 0x02
11582 #define _PSCNT2 0x04
11583 #define _WDTPSCNT2 0x04
11584 #define _PSCNT3 0x08
11585 #define _WDTPSCNT3 0x08
11586 #define _PSCNT4 0x10
11587 #define _WDTPSCNT4 0x10
11588 #define _PSCNT5 0x20
11589 #define _WDTPSCNT5 0x20
11590 #define _PSCNT6 0x40
11591 #define _WDTPSCNT6 0x40
11592 #define _PSCNT7 0x80
11593 #define _WDTPSCNT7 0x80
11595 //==============================================================================
11598 //==============================================================================
11601 extern __at(0x080F) __sfr WDTPSH
;
11607 unsigned PSCNT8
: 1;
11608 unsigned PSCNT9
: 1;
11609 unsigned PSCNT10
: 1;
11610 unsigned PSCNT11
: 1;
11611 unsigned PSCNT12
: 1;
11612 unsigned PSCNT13
: 1;
11613 unsigned PSCNT14
: 1;
11614 unsigned PSCNT15
: 1;
11619 unsigned WDTPSCNT8
: 1;
11620 unsigned WDTPSCNT9
: 1;
11621 unsigned WDTPSCNT10
: 1;
11622 unsigned WDTPSCNT11
: 1;
11623 unsigned WDTPSCNT12
: 1;
11624 unsigned WDTPSCNT13
: 1;
11625 unsigned WDTPSCNT14
: 1;
11626 unsigned WDTPSCNT15
: 1;
11630 extern __at(0x080F) volatile __WDTPSHbits_t WDTPSHbits
;
11632 #define _PSCNT8 0x01
11633 #define _WDTPSCNT8 0x01
11634 #define _PSCNT9 0x02
11635 #define _WDTPSCNT9 0x02
11636 #define _PSCNT10 0x04
11637 #define _WDTPSCNT10 0x04
11638 #define _PSCNT11 0x08
11639 #define _WDTPSCNT11 0x08
11640 #define _PSCNT12 0x10
11641 #define _WDTPSCNT12 0x10
11642 #define _PSCNT13 0x20
11643 #define _WDTPSCNT13 0x20
11644 #define _PSCNT14 0x40
11645 #define _WDTPSCNT14 0x40
11646 #define _PSCNT15 0x80
11647 #define _WDTPSCNT15 0x80
11649 //==============================================================================
11652 //==============================================================================
11655 extern __at(0x0810) __sfr WDTTMR
;
11661 unsigned PSCNT16
: 1;
11662 unsigned PSCNT17
: 1;
11663 unsigned STATE
: 1;
11664 unsigned WDTTMR0
: 1;
11665 unsigned WDTTMR1
: 1;
11666 unsigned WDTTMR2
: 1;
11667 unsigned WDTTMR3
: 1;
11673 unsigned WDTPSCNT16
: 1;
11674 unsigned WDTPSCNT17
: 1;
11675 unsigned WDTSTATE
: 1;
11686 unsigned WDTTMR
: 4;
11691 extern __at(0x0810) volatile __WDTTMRbits_t WDTTMRbits
;
11693 #define _PSCNT16 0x01
11694 #define _WDTPSCNT16 0x01
11695 #define _PSCNT17 0x02
11696 #define _WDTPSCNT17 0x02
11697 #define _STATE 0x04
11698 #define _WDTSTATE 0x04
11699 #define _WDTTMR0 0x08
11700 #define _WDTTMR1 0x10
11701 #define _WDTTMR2 0x20
11702 #define _WDTTMR3 0x40
11704 //==============================================================================
11707 //==============================================================================
11710 extern __at(0x0811) __sfr BORCON
;
11714 unsigned BORRDY
: 1;
11721 unsigned SBOREN
: 1;
11724 extern __at(0x0811) volatile __BORCONbits_t BORCONbits
;
11726 #define _BORRDY 0x01
11727 #define _SBOREN 0x80
11729 //==============================================================================
11732 //==============================================================================
11735 extern __at(0x0813) __sfr PCON0
;
11739 unsigned NOT_BOR
: 1;
11740 unsigned NOT_POR
: 1;
11741 unsigned NOT_RI
: 1;
11742 unsigned NOT_RMCLR
: 1;
11743 unsigned NOT_RWDT
: 1;
11744 unsigned NOT_WDTWV
: 1;
11745 unsigned STKUNF
: 1;
11746 unsigned STKOVF
: 1;
11749 extern __at(0x0813) volatile __PCON0bits_t PCON0bits
;
11751 #define _NOT_BOR 0x01
11752 #define _NOT_POR 0x02
11753 #define _NOT_RI 0x04
11754 #define _NOT_RMCLR 0x08
11755 #define _NOT_RWDT 0x10
11756 #define _NOT_WDTWV 0x20
11757 #define _STKUNF 0x40
11758 #define _STKOVF 0x80
11760 //==============================================================================
11763 //==============================================================================
11766 extern __at(0x0814) __sfr CCDCON
;
11772 unsigned CCDS0
: 1;
11773 unsigned CCDS1
: 1;
11779 unsigned CCDEN
: 1;
11789 extern __at(0x0814) volatile __CCDCONbits_t CCDCONbits
;
11791 #define _CCDS0 0x01
11792 #define _CCDS1 0x02
11793 #define _CCDEN 0x80
11795 //==============================================================================
11798 //==============================================================================
11801 extern __at(0x081A) __sfr NVMADRL
;
11805 unsigned NVMADR0
: 1;
11806 unsigned NVMADR1
: 1;
11807 unsigned NVMADR2
: 1;
11808 unsigned NVMADR3
: 1;
11809 unsigned NVMADR4
: 1;
11810 unsigned NVMADR5
: 1;
11811 unsigned NVMADR6
: 1;
11812 unsigned NVMADR7
: 1;
11815 extern __at(0x081A) volatile __NVMADRLbits_t NVMADRLbits
;
11817 #define _NVMADR0 0x01
11818 #define _NVMADR1 0x02
11819 #define _NVMADR2 0x04
11820 #define _NVMADR3 0x08
11821 #define _NVMADR4 0x10
11822 #define _NVMADR5 0x20
11823 #define _NVMADR6 0x40
11824 #define _NVMADR7 0x80
11826 //==============================================================================
11829 //==============================================================================
11832 extern __at(0x081B) __sfr NVMADRH
;
11836 unsigned NVMADR8
: 1;
11837 unsigned NVMADR9
: 1;
11838 unsigned NVMADR10
: 1;
11839 unsigned NVMADR11
: 1;
11840 unsigned NVMADR12
: 1;
11841 unsigned NVMADR13
: 1;
11842 unsigned NVMADR14
: 1;
11846 extern __at(0x081B) volatile __NVMADRHbits_t NVMADRHbits
;
11848 #define _NVMADR8 0x01
11849 #define _NVMADR9 0x02
11850 #define _NVMADR10 0x04
11851 #define _NVMADR11 0x08
11852 #define _NVMADR12 0x10
11853 #define _NVMADR13 0x20
11854 #define _NVMADR14 0x40
11856 //==============================================================================
11859 //==============================================================================
11862 extern __at(0x081C) __sfr NVMDATL
;
11866 unsigned NVMDAT0
: 1;
11867 unsigned NVMDAT1
: 1;
11868 unsigned NVMDAT2
: 1;
11869 unsigned NVMDAT3
: 1;
11870 unsigned NVMDAT4
: 1;
11871 unsigned NVMDAT5
: 1;
11872 unsigned NVMDAT6
: 1;
11873 unsigned NVMDAT7
: 1;
11876 extern __at(0x081C) volatile __NVMDATLbits_t NVMDATLbits
;
11878 #define _NVMDAT0 0x01
11879 #define _NVMDAT1 0x02
11880 #define _NVMDAT2 0x04
11881 #define _NVMDAT3 0x08
11882 #define _NVMDAT4 0x10
11883 #define _NVMDAT5 0x20
11884 #define _NVMDAT6 0x40
11885 #define _NVMDAT7 0x80
11887 //==============================================================================
11890 //==============================================================================
11893 extern __at(0x081D) __sfr NVMDATH
;
11897 unsigned NVMDAT8
: 1;
11898 unsigned NVMDAT9
: 1;
11899 unsigned NVMDAT10
: 1;
11900 unsigned NVMDAT11
: 1;
11901 unsigned NVMDAT12
: 1;
11902 unsigned NVMDAT13
: 1;
11907 extern __at(0x081D) volatile __NVMDATHbits_t NVMDATHbits
;
11909 #define _NVMDAT8 0x01
11910 #define _NVMDAT9 0x02
11911 #define _NVMDAT10 0x04
11912 #define _NVMDAT11 0x08
11913 #define _NVMDAT12 0x10
11914 #define _NVMDAT13 0x20
11916 //==============================================================================
11919 //==============================================================================
11922 extern __at(0x081E) __sfr NVMCON1
;
11929 unsigned WRERR
: 1;
11932 unsigned NVMREGS
: 1;
11936 extern __at(0x081E) volatile __NVMCON1bits_t NVMCON1bits
;
11941 #define _WRERR 0x08
11944 #define _NVMREGS 0x40
11946 //==============================================================================
11948 extern __at(0x081F) __sfr NVMCON2
;
11950 //==============================================================================
11953 extern __at(0x088C) __sfr CPUDOZE
;
11959 unsigned DOZE0
: 1;
11960 unsigned DOZE1
: 1;
11961 unsigned DOZE2
: 1;
11965 unsigned DOZEN
: 1;
11966 unsigned IDLEN
: 1;
11976 extern __at(0x088C) volatile __CPUDOZEbits_t CPUDOZEbits
;
11978 #define _DOZE0 0x01
11979 #define _DOZE1 0x02
11980 #define _DOZE2 0x04
11983 #define _DOZEN 0x40
11984 #define _IDLEN 0x80
11986 //==============================================================================
11989 //==============================================================================
11992 extern __at(0x088D) __sfr OSCCON1
;
11998 unsigned NDIV0
: 1;
11999 unsigned NDIV1
: 1;
12000 unsigned NDIV2
: 1;
12001 unsigned NDIV3
: 1;
12002 unsigned NOSC0
: 1;
12003 unsigned NOSC1
: 1;
12004 unsigned NOSC2
: 1;
12022 extern __at(0x088D) volatile __OSCCON1bits_t OSCCON1bits
;
12024 #define _NDIV0 0x01
12025 #define _NDIV1 0x02
12026 #define _NDIV2 0x04
12027 #define _NDIV3 0x08
12028 #define _NOSC0 0x10
12029 #define _NOSC1 0x20
12030 #define _NOSC2 0x40
12032 //==============================================================================
12035 //==============================================================================
12038 extern __at(0x088E) __sfr OSCCON2
;
12044 unsigned CDIV0
: 1;
12045 unsigned CDIV1
: 1;
12046 unsigned CDIV2
: 1;
12047 unsigned CDIV3
: 1;
12048 unsigned COSC0
: 1;
12049 unsigned COSC1
: 1;
12050 unsigned COSC2
: 1;
12068 extern __at(0x088E) volatile __OSCCON2bits_t OSCCON2bits
;
12070 #define _CDIV0 0x01
12071 #define _CDIV1 0x02
12072 #define _CDIV2 0x04
12073 #define _CDIV3 0x08
12074 #define _COSC0 0x10
12075 #define _COSC1 0x20
12076 #define _COSC2 0x40
12078 //==============================================================================
12081 //==============================================================================
12084 extern __at(0x088F) __sfr OSCCON3
;
12091 unsigned NOSCR
: 1;
12094 unsigned SOSCPWR
: 1;
12095 unsigned CSWHOLD
: 1;
12098 extern __at(0x088F) volatile __OSCCON3bits_t OSCCON3bits
;
12100 #define _NOSCR 0x08
12102 #define _SOSCPWR 0x40
12103 #define _CSWHOLD 0x80
12105 //==============================================================================
12108 //==============================================================================
12111 extern __at(0x0890) __sfr OSCSTAT
;
12122 unsigned EXTOR
: 1;
12125 extern __at(0x0890) volatile __OSCSTATbits_t OSCSTATbits
;
12133 #define _EXTOR 0x80
12135 //==============================================================================
12138 //==============================================================================
12141 extern __at(0x0891) __sfr OSCEN
;
12147 unsigned ADOEN
: 1;
12148 unsigned SOSCEN
: 1;
12149 unsigned LFOEN
: 1;
12150 unsigned MFOEN
: 1;
12151 unsigned HFOEN
: 1;
12152 unsigned EXTOEN
: 1;
12155 extern __at(0x0891) volatile __OSCENbits_t OSCENbits
;
12157 #define _ADOEN 0x04
12158 #define _SOSCEN 0x08
12159 #define _LFOEN 0x10
12160 #define _MFOEN 0x20
12161 #define _HFOEN 0x40
12162 #define _EXTOEN 0x80
12164 //==============================================================================
12167 //==============================================================================
12170 extern __at(0x0892) __sfr OSCTUNE
;
12176 unsigned HFTUN0
: 1;
12177 unsigned HFTUN1
: 1;
12178 unsigned HFTUN2
: 1;
12179 unsigned HFTUN3
: 1;
12180 unsigned HFTUN4
: 1;
12181 unsigned HFTUN5
: 1;
12188 unsigned HFTUN
: 6;
12193 extern __at(0x0892) volatile __OSCTUNEbits_t OSCTUNEbits
;
12195 #define _HFTUN0 0x01
12196 #define _HFTUN1 0x02
12197 #define _HFTUN2 0x04
12198 #define _HFTUN3 0x08
12199 #define _HFTUN4 0x10
12200 #define _HFTUN5 0x20
12202 //==============================================================================
12205 //==============================================================================
12208 extern __at(0x0893) __sfr OSCFRQ
;
12214 unsigned HFFRQ0
: 1;
12215 unsigned HFFRQ1
: 1;
12216 unsigned HFFRQ2
: 1;
12226 unsigned HFFRQ
: 3;
12231 extern __at(0x0893) volatile __OSCFRQbits_t OSCFRQbits
;
12233 #define _HFFRQ0 0x01
12234 #define _HFFRQ1 0x02
12235 #define _HFFRQ2 0x04
12237 //==============================================================================
12240 //==============================================================================
12243 extern __at(0x0895) __sfr CLKRCON
;
12249 unsigned CLKRDIV0
: 1;
12250 unsigned CLKRDIV1
: 1;
12251 unsigned CLKRDIV2
: 1;
12252 unsigned CLKRDC0
: 1;
12253 unsigned CLKRDC1
: 1;
12256 unsigned CLKREN
: 1;
12261 unsigned CLKRDIV
: 3;
12268 unsigned CLKRDC
: 2;
12273 extern __at(0x0895) volatile __CLKRCONbits_t CLKRCONbits
;
12275 #define _CLKRDIV0 0x01
12276 #define _CLKRDIV1 0x02
12277 #define _CLKRDIV2 0x04
12278 #define _CLKRDC0 0x08
12279 #define _CLKRDC1 0x10
12280 #define _CLKREN 0x80
12282 //==============================================================================
12285 //==============================================================================
12288 extern __at(0x0896) __sfr CLKRCLK
;
12294 unsigned CLKRCLK0
: 1;
12295 unsigned CLKRCLK1
: 1;
12296 unsigned CLKRCLK2
: 1;
12297 unsigned CLKRCLK3
: 1;
12306 unsigned CLKRCLK
: 4;
12311 extern __at(0x0896) volatile __CLKRCLKbits_t CLKRCLKbits
;
12313 #define _CLKRCLK0 0x01
12314 #define _CLKRCLK1 0x02
12315 #define _CLKRCLK2 0x04
12316 #define _CLKRCLK3 0x08
12318 //==============================================================================
12321 //==============================================================================
12324 extern __at(0x0897) __sfr MDCON0
;
12328 unsigned MDBIT
: 1;
12332 unsigned MDOPOL
: 1;
12333 unsigned MDOUT
: 1;
12338 extern __at(0x0897) volatile __MDCON0bits_t MDCON0bits
;
12340 #define _MDBIT 0x01
12341 #define _MDOPOL 0x10
12342 #define _MDOUT 0x20
12345 //==============================================================================
12348 //==============================================================================
12351 extern __at(0x0898) __sfr MDCON1
;
12355 unsigned MDCLSYNC
: 1;
12356 unsigned MDCLPOL
: 1;
12359 unsigned MDCHSYNC
: 1;
12360 unsigned MDCHPOL
: 1;
12365 extern __at(0x0898) volatile __MDCON1bits_t MDCON1bits
;
12367 #define _MDCLSYNC 0x01
12368 #define _MDCLPOL 0x02
12369 #define _MDCHSYNC 0x10
12370 #define _MDCHPOL 0x20
12372 //==============================================================================
12375 //==============================================================================
12378 extern __at(0x0899) __sfr MDSRC
;
12384 unsigned MDMS0
: 1;
12385 unsigned MDMS1
: 1;
12386 unsigned MDMS2
: 1;
12387 unsigned MDMS3
: 1;
12388 unsigned MDMS4
: 1;
12401 extern __at(0x0899) volatile __MDSRCbits_t MDSRCbits
;
12403 #define _MDMS0 0x01
12404 #define _MDMS1 0x02
12405 #define _MDMS2 0x04
12406 #define _MDMS3 0x08
12407 #define _MDMS4 0x10
12409 //==============================================================================
12412 //==============================================================================
12415 extern __at(0x089A) __sfr MDCARL
;
12421 unsigned MDCL0
: 1;
12422 unsigned MDCL1
: 1;
12423 unsigned MDCL2
: 1;
12424 unsigned MDCL3
: 1;
12438 extern __at(0x089A) volatile __MDCARLbits_t MDCARLbits
;
12440 #define _MDCL0 0x01
12441 #define _MDCL1 0x02
12442 #define _MDCL2 0x04
12443 #define _MDCL3 0x08
12445 //==============================================================================
12448 //==============================================================================
12451 extern __at(0x089B) __sfr MDCARH
;
12457 unsigned MDCH0
: 1;
12458 unsigned MDCH1
: 1;
12459 unsigned MDCH2
: 1;
12460 unsigned MDCH3
: 1;
12474 extern __at(0x089B) volatile __MDCARHbits_t MDCARHbits
;
12476 #define _MDCH0 0x01
12477 #define _MDCH1 0x02
12478 #define _MDCH2 0x04
12479 #define _MDCH3 0x08
12481 //==============================================================================
12484 //==============================================================================
12487 extern __at(0x090C) __sfr FVRCON
;
12493 unsigned ADFVR0
: 1;
12494 unsigned ADFVR1
: 1;
12495 unsigned CDAFVR0
: 1;
12496 unsigned CDAFVR1
: 1;
12497 unsigned TSRNG
: 1;
12499 unsigned FVRRDY
: 1;
12500 unsigned FVREN
: 1;
12505 unsigned ADFVR
: 2;
12512 unsigned CDAFVR
: 2;
12517 extern __at(0x090C) volatile __FVRCONbits_t FVRCONbits
;
12519 #define _ADFVR0 0x01
12520 #define _ADFVR1 0x02
12521 #define _CDAFVR0 0x04
12522 #define _CDAFVR1 0x08
12523 #define _TSRNG 0x10
12525 #define _FVRRDY 0x40
12526 #define _FVREN 0x80
12528 //==============================================================================
12531 //==============================================================================
12534 extern __at(0x090E) __sfr DAC1CON0
;
12542 unsigned DAC1PSS0
: 1;
12543 unsigned DAC1PSS1
: 1;
12552 unsigned DAC1NSS
: 1;
12556 unsigned DAC1OE2
: 1;
12557 unsigned DAC1OE1
: 1;
12559 unsigned DAC1EN
: 1;
12572 unsigned DAC1PSS
: 2;
12575 } __DAC1CON0bits_t
;
12577 extern __at(0x090E) volatile __DAC1CON0bits_t DAC1CON0bits
;
12579 #define _DAC1CON0_NSS 0x01
12580 #define _DAC1CON0_DAC1NSS 0x01
12581 #define _DAC1CON0_DAC1PSS0 0x04
12582 #define _DAC1CON0_PSS0 0x04
12583 #define _DAC1CON0_DAC1PSS1 0x08
12584 #define _DAC1CON0_PSS1 0x08
12585 #define _DAC1CON0_OE2 0x10
12586 #define _DAC1CON0_DAC1OE2 0x10
12587 #define _DAC1CON0_OE1 0x20
12588 #define _DAC1CON0_DAC1OE1 0x20
12589 #define _DAC1CON0_EN 0x80
12590 #define _DAC1CON0_DAC1EN 0x80
12592 //==============================================================================
12595 //==============================================================================
12598 extern __at(0x090F) __sfr DAC1CON1
;
12604 unsigned DAC1R0
: 1;
12605 unsigned DAC1R1
: 1;
12606 unsigned DAC1R2
: 1;
12607 unsigned DAC1R3
: 1;
12608 unsigned DAC1R4
: 1;
12616 unsigned DAC1R
: 5;
12619 } __DAC1CON1bits_t
;
12621 extern __at(0x090F) volatile __DAC1CON1bits_t DAC1CON1bits
;
12623 #define _DAC1R0 0x01
12624 #define _DAC1R1 0x02
12625 #define _DAC1R2 0x04
12626 #define _DAC1R3 0x08
12627 #define _DAC1R4 0x10
12629 //==============================================================================
12632 //==============================================================================
12635 extern __at(0x091F) __sfr ZCD1CON
;
12653 unsigned ZCD1INTN
: 1;
12654 unsigned ZCD1INTP
: 1;
12657 unsigned ZCD1POL
: 1;
12658 unsigned ZCD1OUT
: 1;
12660 unsigned ZCD1EN
: 1;
12665 unsigned ZCDINTN
: 1;
12666 unsigned ZCDINTP
: 1;
12669 unsigned ZCDPOL
: 1;
12670 unsigned ZCDOUT
: 1;
12672 unsigned ZCDEN
: 1;
12676 extern __at(0x091F) volatile __ZCD1CONbits_t ZCD1CONbits
;
12678 #define _ZCD1CON_INTN 0x01
12679 #define _ZCD1CON_ZCD1INTN 0x01
12680 #define _ZCD1CON_ZCDINTN 0x01
12681 #define _ZCD1CON_INTP 0x02
12682 #define _ZCD1CON_ZCD1INTP 0x02
12683 #define _ZCD1CON_ZCDINTP 0x02
12684 #define _ZCD1CON_POL 0x10
12685 #define _ZCD1CON_ZCD1POL 0x10
12686 #define _ZCD1CON_ZCDPOL 0x10
12687 #define _ZCD1CON_OUT 0x20
12688 #define _ZCD1CON_ZCD1OUT 0x20
12689 #define _ZCD1CON_ZCDOUT 0x20
12690 #define _ZCD1CON_EN 0x80
12691 #define _ZCD1CON_ZCD1EN 0x80
12692 #define _ZCD1CON_ZCDEN 0x80
12694 //==============================================================================
12697 //==============================================================================
12700 extern __at(0x091F) __sfr ZCDCON
;
12718 unsigned ZCD1INTN
: 1;
12719 unsigned ZCD1INTP
: 1;
12722 unsigned ZCD1POL
: 1;
12723 unsigned ZCD1OUT
: 1;
12725 unsigned ZCD1EN
: 1;
12730 unsigned ZCDINTN
: 1;
12731 unsigned ZCDINTP
: 1;
12734 unsigned ZCDPOL
: 1;
12735 unsigned ZCDOUT
: 1;
12737 unsigned ZCDEN
: 1;
12741 extern __at(0x091F) volatile __ZCDCONbits_t ZCDCONbits
;
12743 #define _ZCDCON_INTN 0x01
12744 #define _ZCDCON_ZCD1INTN 0x01
12745 #define _ZCDCON_ZCDINTN 0x01
12746 #define _ZCDCON_INTP 0x02
12747 #define _ZCDCON_ZCD1INTP 0x02
12748 #define _ZCDCON_ZCDINTP 0x02
12749 #define _ZCDCON_POL 0x10
12750 #define _ZCDCON_ZCD1POL 0x10
12751 #define _ZCDCON_ZCDPOL 0x10
12752 #define _ZCDCON_OUT 0x20
12753 #define _ZCDCON_ZCD1OUT 0x20
12754 #define _ZCDCON_ZCDOUT 0x20
12755 #define _ZCDCON_EN 0x80
12756 #define _ZCDCON_ZCD1EN 0x80
12757 #define _ZCDCON_ZCDEN 0x80
12759 //==============================================================================
12762 //==============================================================================
12765 extern __at(0x098F) __sfr CMOUT
;
12771 unsigned MC1OUT
: 1;
12772 unsigned MC2OUT
: 1;
12783 unsigned C1OUT
: 1;
12784 unsigned C2OUT
: 1;
12794 extern __at(0x098F) volatile __CMOUTbits_t CMOUTbits
;
12796 #define _CMOUT_MC1OUT 0x01
12797 #define _CMOUT_C1OUT 0x01
12798 #define _CMOUT_MC2OUT 0x02
12799 #define _CMOUT_C2OUT 0x02
12801 //==============================================================================
12804 //==============================================================================
12807 extern __at(0x098F) __sfr CMSTAT
;
12813 unsigned MC1OUT
: 1;
12814 unsigned MC2OUT
: 1;
12825 unsigned C1OUT
: 1;
12826 unsigned C2OUT
: 1;
12836 extern __at(0x098F) volatile __CMSTATbits_t CMSTATbits
;
12838 #define _CMSTAT_MC1OUT 0x01
12839 #define _CMSTAT_C1OUT 0x01
12840 #define _CMSTAT_MC2OUT 0x02
12841 #define _CMSTAT_C2OUT 0x02
12843 //==============================================================================
12846 //==============================================================================
12849 extern __at(0x0990) __sfr CM1CON0
;
12857 unsigned Reserved
: 1;
12867 unsigned C1SYNC
: 1;
12868 unsigned C1HYS
: 1;
12871 unsigned C1POL
: 1;
12873 unsigned C1OUT
: 1;
12878 extern __at(0x0990) volatile __CM1CON0bits_t CM1CON0bits
;
12880 #define _CM1CON0_SYNC 0x01
12881 #define _CM1CON0_C1SYNC 0x01
12882 #define _CM1CON0_HYS 0x02
12883 #define _CM1CON0_C1HYS 0x02
12884 #define _CM1CON0_Reserved 0x04
12885 #define _CM1CON0_C1SP 0x04
12886 #define _CM1CON0_POL 0x10
12887 #define _CM1CON0_C1POL 0x10
12888 #define _CM1CON0_OUT 0x40
12889 #define _CM1CON0_C1OUT 0x40
12890 #define _CM1CON0_ON 0x80
12891 #define _CM1CON0_C1ON 0x80
12893 //==============================================================================
12896 //==============================================================================
12899 extern __at(0x0991) __sfr CM1CON1
;
12917 unsigned C1INTN
: 1;
12918 unsigned C1INTP
: 1;
12928 extern __at(0x0991) volatile __CM1CON1bits_t CM1CON1bits
;
12930 #define _CM1CON1_INTN 0x01
12931 #define _CM1CON1_C1INTN 0x01
12932 #define _CM1CON1_INTP 0x02
12933 #define _CM1CON1_C1INTP 0x02
12935 //==============================================================================
12938 //==============================================================================
12941 extern __at(0x0992) __sfr CM1NSEL
;
12959 unsigned C1NCH0
: 1;
12960 unsigned C1NCH1
: 1;
12961 unsigned C1NCH2
: 1;
12977 unsigned C1NCH
: 3;
12982 extern __at(0x0992) volatile __CM1NSELbits_t CM1NSELbits
;
12985 #define _C1NCH0 0x01
12987 #define _C1NCH1 0x02
12989 #define _C1NCH2 0x04
12991 //==============================================================================
12994 //==============================================================================
12997 extern __at(0x0993) __sfr CM1PSEL
;
13015 unsigned C1PCH0
: 1;
13016 unsigned C1PCH1
: 1;
13017 unsigned C1PCH2
: 1;
13033 unsigned C1PCH
: 3;
13038 extern __at(0x0993) volatile __CM1PSELbits_t CM1PSELbits
;
13041 #define _C1PCH0 0x01
13043 #define _C1PCH1 0x02
13045 #define _C1PCH2 0x04
13047 //==============================================================================
13050 //==============================================================================
13053 extern __at(0x0994) __sfr CM2CON0
;
13061 unsigned Reserved
: 1;
13071 unsigned C2SYNC
: 1;
13072 unsigned C2HYS
: 1;
13075 unsigned C2POL
: 1;
13077 unsigned C2OUT
: 1;
13082 extern __at(0x0994) volatile __CM2CON0bits_t CM2CON0bits
;
13084 #define _CM2CON0_SYNC 0x01
13085 #define _CM2CON0_C2SYNC 0x01
13086 #define _CM2CON0_HYS 0x02
13087 #define _CM2CON0_C2HYS 0x02
13088 #define _CM2CON0_Reserved 0x04
13089 #define _CM2CON0_C2SP 0x04
13090 #define _CM2CON0_POL 0x10
13091 #define _CM2CON0_C2POL 0x10
13092 #define _CM2CON0_OUT 0x40
13093 #define _CM2CON0_C2OUT 0x40
13094 #define _CM2CON0_ON 0x80
13095 #define _CM2CON0_C2ON 0x80
13097 //==============================================================================
13100 //==============================================================================
13103 extern __at(0x0995) __sfr CM2CON1
;
13121 unsigned C2INTN
: 1;
13122 unsigned C2INTP
: 1;
13132 extern __at(0x0995) volatile __CM2CON1bits_t CM2CON1bits
;
13134 #define _CM2CON1_INTN 0x01
13135 #define _CM2CON1_C2INTN 0x01
13136 #define _CM2CON1_INTP 0x02
13137 #define _CM2CON1_C2INTP 0x02
13139 //==============================================================================
13142 //==============================================================================
13145 extern __at(0x0996) __sfr CM2NSEL
;
13163 unsigned C2NCH0
: 1;
13164 unsigned C2NCH1
: 1;
13165 unsigned C2NCH2
: 1;
13181 unsigned C2NCH
: 3;
13186 extern __at(0x0996) volatile __CM2NSELbits_t CM2NSELbits
;
13188 #define _CM2NSEL_NCH0 0x01
13189 #define _CM2NSEL_C2NCH0 0x01
13190 #define _CM2NSEL_NCH1 0x02
13191 #define _CM2NSEL_C2NCH1 0x02
13192 #define _CM2NSEL_NCH2 0x04
13193 #define _CM2NSEL_C2NCH2 0x04
13195 //==============================================================================
13198 //==============================================================================
13201 extern __at(0x0997) __sfr CM2PSEL
;
13219 unsigned C2PCH0
: 1;
13220 unsigned C2PCH1
: 1;
13221 unsigned C2PCH2
: 1;
13231 unsigned C2PCH
: 3;
13242 extern __at(0x0997) volatile __CM2PSELbits_t CM2PSELbits
;
13244 #define _CM2PSEL_PCH0 0x01
13245 #define _CM2PSEL_C2PCH0 0x01
13246 #define _CM2PSEL_PCH1 0x02
13247 #define _CM2PSEL_C2PCH1 0x02
13248 #define _CM2PSEL_PCH2 0x04
13249 #define _CM2PSEL_C2PCH2 0x04
13251 //==============================================================================
13254 //==============================================================================
13257 extern __at(0x0E0F) __sfr CLCDATA
;
13261 unsigned MLC1OUT
: 1;
13262 unsigned MLC2OUT
: 1;
13263 unsigned MLC3OUT
: 1;
13264 unsigned MLC4OUT
: 1;
13271 extern __at(0x0E0F) volatile __CLCDATAbits_t CLCDATAbits
;
13273 #define _MLC1OUT 0x01
13274 #define _MLC2OUT 0x02
13275 #define _MLC3OUT 0x04
13276 #define _MLC4OUT 0x08
13278 //==============================================================================
13281 //==============================================================================
13284 extern __at(0x0E10) __sfr CLC1CON
;
13290 unsigned LC1MODE0
: 1;
13291 unsigned LC1MODE1
: 1;
13292 unsigned LC1MODE2
: 1;
13293 unsigned LC1INTN
: 1;
13294 unsigned LC1INTP
: 1;
13295 unsigned LC1OUT
: 1;
13297 unsigned LC1EN
: 1;
13302 unsigned MODE0
: 1;
13303 unsigned MODE1
: 1;
13304 unsigned MODE2
: 1;
13314 unsigned LC1MODE
: 3;
13325 extern __at(0x0E10) volatile __CLC1CONbits_t CLC1CONbits
;
13327 #define _CLC1CON_LC1MODE0 0x01
13328 #define _CLC1CON_MODE0 0x01
13329 #define _CLC1CON_LC1MODE1 0x02
13330 #define _CLC1CON_MODE1 0x02
13331 #define _CLC1CON_LC1MODE2 0x04
13332 #define _CLC1CON_MODE2 0x04
13333 #define _CLC1CON_LC1INTN 0x08
13334 #define _CLC1CON_INTN 0x08
13335 #define _CLC1CON_LC1INTP 0x10
13336 #define _CLC1CON_INTP 0x10
13337 #define _CLC1CON_LC1OUT 0x20
13338 #define _CLC1CON_OUT 0x20
13339 #define _CLC1CON_LC1EN 0x80
13340 #define _CLC1CON_EN 0x80
13342 //==============================================================================
13345 //==============================================================================
13348 extern __at(0x0E11) __sfr CLC1POL
;
13354 unsigned LC1G1POL
: 1;
13355 unsigned LC1G2POL
: 1;
13356 unsigned LC1G3POL
: 1;
13357 unsigned LC1G4POL
: 1;
13361 unsigned LC1POL
: 1;
13366 unsigned G1POL
: 1;
13367 unsigned G2POL
: 1;
13368 unsigned G3POL
: 1;
13369 unsigned G4POL
: 1;
13377 extern __at(0x0E11) volatile __CLC1POLbits_t CLC1POLbits
;
13379 #define _LC1G1POL 0x01
13380 #define _G1POL 0x01
13381 #define _LC1G2POL 0x02
13382 #define _G2POL 0x02
13383 #define _LC1G3POL 0x04
13384 #define _G3POL 0x04
13385 #define _LC1G4POL 0x08
13386 #define _G4POL 0x08
13387 #define _LC1POL 0x80
13390 //==============================================================================
13393 //==============================================================================
13396 extern __at(0x0E12) __sfr CLC1SEL0
;
13402 unsigned LC1D1S0
: 1;
13403 unsigned LC1D1S1
: 1;
13404 unsigned LC1D1S2
: 1;
13405 unsigned LC1D1S3
: 1;
13406 unsigned LC1D1S4
: 1;
13407 unsigned LC1D1S5
: 1;
13408 unsigned LC1D1S6
: 1;
13409 unsigned LC1D1S7
: 1;
13423 } __CLC1SEL0bits_t
;
13425 extern __at(0x0E12) volatile __CLC1SEL0bits_t CLC1SEL0bits
;
13427 #define _LC1D1S0 0x01
13429 #define _LC1D1S1 0x02
13431 #define _LC1D1S2 0x04
13433 #define _LC1D1S3 0x08
13435 #define _LC1D1S4 0x10
13437 #define _LC1D1S5 0x20
13439 #define _LC1D1S6 0x40
13441 #define _LC1D1S7 0x80
13444 //==============================================================================
13447 //==============================================================================
13450 extern __at(0x0E13) __sfr CLC1SEL1
;
13456 unsigned LC1D2S0
: 1;
13457 unsigned LC1D2S1
: 1;
13458 unsigned LC1D2S2
: 1;
13459 unsigned LC1D2S3
: 1;
13460 unsigned LC1D2S4
: 1;
13461 unsigned LC1D2S5
: 1;
13462 unsigned LC1D2S6
: 1;
13463 unsigned LC1D2S7
: 1;
13477 } __CLC1SEL1bits_t
;
13479 extern __at(0x0E13) volatile __CLC1SEL1bits_t CLC1SEL1bits
;
13481 #define _LC1D2S0 0x01
13483 #define _LC1D2S1 0x02
13485 #define _LC1D2S2 0x04
13487 #define _LC1D2S3 0x08
13489 #define _LC1D2S4 0x10
13491 #define _LC1D2S5 0x20
13493 #define _LC1D2S6 0x40
13495 #define _LC1D2S7 0x80
13498 //==============================================================================
13501 //==============================================================================
13504 extern __at(0x0E14) __sfr CLC1SEL2
;
13510 unsigned LC1D3S0
: 1;
13511 unsigned LC1D3S1
: 1;
13512 unsigned LC1D3S2
: 1;
13513 unsigned LC1D3S3
: 1;
13514 unsigned LC1D3S4
: 1;
13515 unsigned LC1D3S5
: 1;
13516 unsigned LC1D3S6
: 1;
13517 unsigned LC1D3S7
: 1;
13531 } __CLC1SEL2bits_t
;
13533 extern __at(0x0E14) volatile __CLC1SEL2bits_t CLC1SEL2bits
;
13535 #define _LC1D3S0 0x01
13537 #define _LC1D3S1 0x02
13539 #define _LC1D3S2 0x04
13541 #define _LC1D3S3 0x08
13543 #define _LC1D3S4 0x10
13545 #define _LC1D3S5 0x20
13547 #define _LC1D3S6 0x40
13549 #define _LC1D3S7 0x80
13552 //==============================================================================
13555 //==============================================================================
13558 extern __at(0x0E15) __sfr CLC1SEL3
;
13564 unsigned LC1D4S0
: 1;
13565 unsigned LC1D4S1
: 1;
13566 unsigned LC1D4S2
: 1;
13567 unsigned LC1D4S3
: 1;
13568 unsigned LC1D4S4
: 1;
13569 unsigned LC1D4S5
: 1;
13570 unsigned LC1D4S6
: 1;
13571 unsigned LC1D4S7
: 1;
13585 } __CLC1SEL3bits_t
;
13587 extern __at(0x0E15) volatile __CLC1SEL3bits_t CLC1SEL3bits
;
13589 #define _LC1D4S0 0x01
13591 #define _LC1D4S1 0x02
13593 #define _LC1D4S2 0x04
13595 #define _LC1D4S3 0x08
13597 #define _LC1D4S4 0x10
13599 #define _LC1D4S5 0x20
13601 #define _LC1D4S6 0x40
13603 #define _LC1D4S7 0x80
13606 //==============================================================================
13609 //==============================================================================
13612 extern __at(0x0E16) __sfr CLC1GLS0
;
13618 unsigned LC1G1D1N
: 1;
13619 unsigned LC1G1D1T
: 1;
13620 unsigned LC1G1D2N
: 1;
13621 unsigned LC1G1D2T
: 1;
13622 unsigned LC1G1D3N
: 1;
13623 unsigned LC1G1D3T
: 1;
13624 unsigned LC1G1D4N
: 1;
13625 unsigned LC1G1D4T
: 1;
13639 } __CLC1GLS0bits_t
;
13641 extern __at(0x0E16) volatile __CLC1GLS0bits_t CLC1GLS0bits
;
13643 #define _LC1G1D1N 0x01
13645 #define _LC1G1D1T 0x02
13647 #define _LC1G1D2N 0x04
13649 #define _LC1G1D2T 0x08
13651 #define _LC1G1D3N 0x10
13653 #define _LC1G1D3T 0x20
13655 #define _LC1G1D4N 0x40
13657 #define _LC1G1D4T 0x80
13660 //==============================================================================
13663 //==============================================================================
13666 extern __at(0x0E17) __sfr CLC1GLS1
;
13672 unsigned LC1G2D1N
: 1;
13673 unsigned LC1G2D1T
: 1;
13674 unsigned LC1G2D2N
: 1;
13675 unsigned LC1G2D2T
: 1;
13676 unsigned LC1G2D3N
: 1;
13677 unsigned LC1G2D3T
: 1;
13678 unsigned LC1G2D4N
: 1;
13679 unsigned LC1G2D4T
: 1;
13693 } __CLC1GLS1bits_t
;
13695 extern __at(0x0E17) volatile __CLC1GLS1bits_t CLC1GLS1bits
;
13697 #define _CLC1GLS1_LC1G2D1N 0x01
13698 #define _CLC1GLS1_D1N 0x01
13699 #define _CLC1GLS1_LC1G2D1T 0x02
13700 #define _CLC1GLS1_D1T 0x02
13701 #define _CLC1GLS1_LC1G2D2N 0x04
13702 #define _CLC1GLS1_D2N 0x04
13703 #define _CLC1GLS1_LC1G2D2T 0x08
13704 #define _CLC1GLS1_D2T 0x08
13705 #define _CLC1GLS1_LC1G2D3N 0x10
13706 #define _CLC1GLS1_D3N 0x10
13707 #define _CLC1GLS1_LC1G2D3T 0x20
13708 #define _CLC1GLS1_D3T 0x20
13709 #define _CLC1GLS1_LC1G2D4N 0x40
13710 #define _CLC1GLS1_D4N 0x40
13711 #define _CLC1GLS1_LC1G2D4T 0x80
13712 #define _CLC1GLS1_D4T 0x80
13714 //==============================================================================
13717 //==============================================================================
13720 extern __at(0x0E18) __sfr CLC1GLS2
;
13726 unsigned LC1G3D1N
: 1;
13727 unsigned LC1G3D1T
: 1;
13728 unsigned LC1G3D2N
: 1;
13729 unsigned LC1G3D2T
: 1;
13730 unsigned LC1G3D3N
: 1;
13731 unsigned LC1G3D3T
: 1;
13732 unsigned LC1G3D4N
: 1;
13733 unsigned LC1G3D4T
: 1;
13747 } __CLC1GLS2bits_t
;
13749 extern __at(0x0E18) volatile __CLC1GLS2bits_t CLC1GLS2bits
;
13751 #define _CLC1GLS2_LC1G3D1N 0x01
13752 #define _CLC1GLS2_D1N 0x01
13753 #define _CLC1GLS2_LC1G3D1T 0x02
13754 #define _CLC1GLS2_D1T 0x02
13755 #define _CLC1GLS2_LC1G3D2N 0x04
13756 #define _CLC1GLS2_D2N 0x04
13757 #define _CLC1GLS2_LC1G3D2T 0x08
13758 #define _CLC1GLS2_D2T 0x08
13759 #define _CLC1GLS2_LC1G3D3N 0x10
13760 #define _CLC1GLS2_D3N 0x10
13761 #define _CLC1GLS2_LC1G3D3T 0x20
13762 #define _CLC1GLS2_D3T 0x20
13763 #define _CLC1GLS2_LC1G3D4N 0x40
13764 #define _CLC1GLS2_D4N 0x40
13765 #define _CLC1GLS2_LC1G3D4T 0x80
13766 #define _CLC1GLS2_D4T 0x80
13768 //==============================================================================
13771 //==============================================================================
13774 extern __at(0x0E19) __sfr CLC1GLS3
;
13780 unsigned LC1G4D1N
: 1;
13781 unsigned LC1G4D1T
: 1;
13782 unsigned LC1G4D2N
: 1;
13783 unsigned LC1G4D2T
: 1;
13784 unsigned LC1G4D3N
: 1;
13785 unsigned LC1G4D3T
: 1;
13786 unsigned LC1G4D4N
: 1;
13787 unsigned LC1G4D4T
: 1;
13792 unsigned G4D1N
: 1;
13793 unsigned G4D1T
: 1;
13794 unsigned G4D2N
: 1;
13795 unsigned G4D2T
: 1;
13796 unsigned G4D3N
: 1;
13797 unsigned G4D3T
: 1;
13798 unsigned G4D4N
: 1;
13799 unsigned G4D4T
: 1;
13801 } __CLC1GLS3bits_t
;
13803 extern __at(0x0E19) volatile __CLC1GLS3bits_t CLC1GLS3bits
;
13805 #define _LC1G4D1N 0x01
13806 #define _G4D1N 0x01
13807 #define _LC1G4D1T 0x02
13808 #define _G4D1T 0x02
13809 #define _LC1G4D2N 0x04
13810 #define _G4D2N 0x04
13811 #define _LC1G4D2T 0x08
13812 #define _G4D2T 0x08
13813 #define _LC1G4D3N 0x10
13814 #define _G4D3N 0x10
13815 #define _LC1G4D3T 0x20
13816 #define _G4D3T 0x20
13817 #define _LC1G4D4N 0x40
13818 #define _G4D4N 0x40
13819 #define _LC1G4D4T 0x80
13820 #define _G4D4T 0x80
13822 //==============================================================================
13825 //==============================================================================
13828 extern __at(0x0E1A) __sfr CLC2CON
;
13834 unsigned LC2MODE0
: 1;
13835 unsigned LC2MODE1
: 1;
13836 unsigned LC2MODE2
: 1;
13837 unsigned LC2INTN
: 1;
13838 unsigned LC2INTP
: 1;
13839 unsigned LC2OUT
: 1;
13841 unsigned LC2EN
: 1;
13846 unsigned MODE0
: 1;
13847 unsigned MODE1
: 1;
13848 unsigned MODE2
: 1;
13864 unsigned LC2MODE
: 3;
13869 extern __at(0x0E1A) volatile __CLC2CONbits_t CLC2CONbits
;
13871 #define _CLC2CON_LC2MODE0 0x01
13872 #define _CLC2CON_MODE0 0x01
13873 #define _CLC2CON_LC2MODE1 0x02
13874 #define _CLC2CON_MODE1 0x02
13875 #define _CLC2CON_LC2MODE2 0x04
13876 #define _CLC2CON_MODE2 0x04
13877 #define _CLC2CON_LC2INTN 0x08
13878 #define _CLC2CON_INTN 0x08
13879 #define _CLC2CON_LC2INTP 0x10
13880 #define _CLC2CON_INTP 0x10
13881 #define _CLC2CON_LC2OUT 0x20
13882 #define _CLC2CON_OUT 0x20
13883 #define _CLC2CON_LC2EN 0x80
13884 #define _CLC2CON_EN 0x80
13886 //==============================================================================
13889 //==============================================================================
13892 extern __at(0x0E1B) __sfr CLC2POL
;
13898 unsigned LC2G1POL
: 1;
13899 unsigned LC2G2POL
: 1;
13900 unsigned LC2G3POL
: 1;
13901 unsigned LC2G4POL
: 1;
13905 unsigned LC2POL
: 1;
13910 unsigned G1POL
: 1;
13911 unsigned G2POL
: 1;
13912 unsigned G3POL
: 1;
13913 unsigned G4POL
: 1;
13921 extern __at(0x0E1B) volatile __CLC2POLbits_t CLC2POLbits
;
13923 #define _CLC2POL_LC2G1POL 0x01
13924 #define _CLC2POL_G1POL 0x01
13925 #define _CLC2POL_LC2G2POL 0x02
13926 #define _CLC2POL_G2POL 0x02
13927 #define _CLC2POL_LC2G3POL 0x04
13928 #define _CLC2POL_G3POL 0x04
13929 #define _CLC2POL_LC2G4POL 0x08
13930 #define _CLC2POL_G4POL 0x08
13931 #define _CLC2POL_LC2POL 0x80
13932 #define _CLC2POL_POL 0x80
13934 //==============================================================================
13937 //==============================================================================
13940 extern __at(0x0E1C) __sfr CLC2SEL0
;
13946 unsigned LC2D1S0
: 1;
13947 unsigned LC2D1S1
: 1;
13948 unsigned LC2D1S2
: 1;
13949 unsigned LC2D1S3
: 1;
13950 unsigned LC2D1S4
: 1;
13951 unsigned LC2D1S5
: 1;
13952 unsigned LC2D1S6
: 1;
13953 unsigned LC2D1S7
: 1;
13967 } __CLC2SEL0bits_t
;
13969 extern __at(0x0E1C) volatile __CLC2SEL0bits_t CLC2SEL0bits
;
13971 #define _CLC2SEL0_LC2D1S0 0x01
13972 #define _CLC2SEL0_D1S0 0x01
13973 #define _CLC2SEL0_LC2D1S1 0x02
13974 #define _CLC2SEL0_D1S1 0x02
13975 #define _CLC2SEL0_LC2D1S2 0x04
13976 #define _CLC2SEL0_D1S2 0x04
13977 #define _CLC2SEL0_LC2D1S3 0x08
13978 #define _CLC2SEL0_D1S3 0x08
13979 #define _CLC2SEL0_LC2D1S4 0x10
13980 #define _CLC2SEL0_D1S4 0x10
13981 #define _CLC2SEL0_LC2D1S5 0x20
13982 #define _CLC2SEL0_D1S5 0x20
13983 #define _CLC2SEL0_LC2D1S6 0x40
13984 #define _CLC2SEL0_D1S6 0x40
13985 #define _CLC2SEL0_LC2D1S7 0x80
13986 #define _CLC2SEL0_D1S7 0x80
13988 //==============================================================================
13991 //==============================================================================
13994 extern __at(0x0E1D) __sfr CLC2SEL1
;
14000 unsigned LC2D2S0
: 1;
14001 unsigned LC2D2S1
: 1;
14002 unsigned LC2D2S2
: 1;
14003 unsigned LC2D2S3
: 1;
14004 unsigned LC2D2S4
: 1;
14005 unsigned LC2D2S5
: 1;
14006 unsigned LC2D2S6
: 1;
14007 unsigned LC2D2S7
: 1;
14021 } __CLC2SEL1bits_t
;
14023 extern __at(0x0E1D) volatile __CLC2SEL1bits_t CLC2SEL1bits
;
14025 #define _CLC2SEL1_LC2D2S0 0x01
14026 #define _CLC2SEL1_D2S0 0x01
14027 #define _CLC2SEL1_LC2D2S1 0x02
14028 #define _CLC2SEL1_D2S1 0x02
14029 #define _CLC2SEL1_LC2D2S2 0x04
14030 #define _CLC2SEL1_D2S2 0x04
14031 #define _CLC2SEL1_LC2D2S3 0x08
14032 #define _CLC2SEL1_D2S3 0x08
14033 #define _CLC2SEL1_LC2D2S4 0x10
14034 #define _CLC2SEL1_D2S4 0x10
14035 #define _CLC2SEL1_LC2D2S5 0x20
14036 #define _CLC2SEL1_D2S5 0x20
14037 #define _CLC2SEL1_LC2D2S6 0x40
14038 #define _CLC2SEL1_D2S6 0x40
14039 #define _CLC2SEL1_LC2D2S7 0x80
14040 #define _CLC2SEL1_D2S7 0x80
14042 //==============================================================================
14045 //==============================================================================
14048 extern __at(0x0E1E) __sfr CLC2SEL2
;
14054 unsigned LC2D3S0
: 1;
14055 unsigned LC2D3S1
: 1;
14056 unsigned LC2D3S2
: 1;
14057 unsigned LC2D3S3
: 1;
14058 unsigned LC2D3S4
: 1;
14059 unsigned LC2D3S5
: 1;
14060 unsigned LC2D3S6
: 1;
14061 unsigned LC2D3S7
: 1;
14075 } __CLC2SEL2bits_t
;
14077 extern __at(0x0E1E) volatile __CLC2SEL2bits_t CLC2SEL2bits
;
14079 #define _CLC2SEL2_LC2D3S0 0x01
14080 #define _CLC2SEL2_D3S0 0x01
14081 #define _CLC2SEL2_LC2D3S1 0x02
14082 #define _CLC2SEL2_D3S1 0x02
14083 #define _CLC2SEL2_LC2D3S2 0x04
14084 #define _CLC2SEL2_D3S2 0x04
14085 #define _CLC2SEL2_LC2D3S3 0x08
14086 #define _CLC2SEL2_D3S3 0x08
14087 #define _CLC2SEL2_LC2D3S4 0x10
14088 #define _CLC2SEL2_D3S4 0x10
14089 #define _CLC2SEL2_LC2D3S5 0x20
14090 #define _CLC2SEL2_D3S5 0x20
14091 #define _CLC2SEL2_LC2D3S6 0x40
14092 #define _CLC2SEL2_D3S6 0x40
14093 #define _CLC2SEL2_LC2D3S7 0x80
14094 #define _CLC2SEL2_D3S7 0x80
14096 //==============================================================================
14099 //==============================================================================
14102 extern __at(0x0E1F) __sfr CLC2SEL3
;
14108 unsigned LC2D4S0
: 1;
14109 unsigned LC2D4S1
: 1;
14110 unsigned LC2D4S2
: 1;
14111 unsigned LC2D4S3
: 1;
14112 unsigned LC2D4S4
: 1;
14113 unsigned LC2D4S5
: 1;
14114 unsigned LC2D4S6
: 1;
14115 unsigned LC2D4S7
: 1;
14129 } __CLC2SEL3bits_t
;
14131 extern __at(0x0E1F) volatile __CLC2SEL3bits_t CLC2SEL3bits
;
14133 #define _CLC2SEL3_LC2D4S0 0x01
14134 #define _CLC2SEL3_D4S0 0x01
14135 #define _CLC2SEL3_LC2D4S1 0x02
14136 #define _CLC2SEL3_D4S1 0x02
14137 #define _CLC2SEL3_LC2D4S2 0x04
14138 #define _CLC2SEL3_D4S2 0x04
14139 #define _CLC2SEL3_LC2D4S3 0x08
14140 #define _CLC2SEL3_D4S3 0x08
14141 #define _CLC2SEL3_LC2D4S4 0x10
14142 #define _CLC2SEL3_D4S4 0x10
14143 #define _CLC2SEL3_LC2D4S5 0x20
14144 #define _CLC2SEL3_D4S5 0x20
14145 #define _CLC2SEL3_LC2D4S6 0x40
14146 #define _CLC2SEL3_D4S6 0x40
14147 #define _CLC2SEL3_LC2D4S7 0x80
14148 #define _CLC2SEL3_D4S7 0x80
14150 //==============================================================================
14153 //==============================================================================
14156 extern __at(0x0E20) __sfr CLC2GLS0
;
14162 unsigned LC2G1D1N
: 1;
14163 unsigned LC2G1D1T
: 1;
14164 unsigned LC2G1D2N
: 1;
14165 unsigned LC2G1D2T
: 1;
14166 unsigned LC2G1D3N
: 1;
14167 unsigned LC2G1D3T
: 1;
14168 unsigned LC2G1D4N
: 1;
14169 unsigned LC2G1D4T
: 1;
14183 } __CLC2GLS0bits_t
;
14185 extern __at(0x0E20) volatile __CLC2GLS0bits_t CLC2GLS0bits
;
14187 #define _CLC2GLS0_LC2G1D1N 0x01
14188 #define _CLC2GLS0_D1N 0x01
14189 #define _CLC2GLS0_LC2G1D1T 0x02
14190 #define _CLC2GLS0_D1T 0x02
14191 #define _CLC2GLS0_LC2G1D2N 0x04
14192 #define _CLC2GLS0_D2N 0x04
14193 #define _CLC2GLS0_LC2G1D2T 0x08
14194 #define _CLC2GLS0_D2T 0x08
14195 #define _CLC2GLS0_LC2G1D3N 0x10
14196 #define _CLC2GLS0_D3N 0x10
14197 #define _CLC2GLS0_LC2G1D3T 0x20
14198 #define _CLC2GLS0_D3T 0x20
14199 #define _CLC2GLS0_LC2G1D4N 0x40
14200 #define _CLC2GLS0_D4N 0x40
14201 #define _CLC2GLS0_LC2G1D4T 0x80
14202 #define _CLC2GLS0_D4T 0x80
14204 //==============================================================================
14207 //==============================================================================
14210 extern __at(0x0E21) __sfr CLC2GLS1
;
14216 unsigned LC2G2D1N
: 1;
14217 unsigned LC2G2D1T
: 1;
14218 unsigned LC2G2D2N
: 1;
14219 unsigned LC2G2D2T
: 1;
14220 unsigned LC2G2D3N
: 1;
14221 unsigned LC2G2D3T
: 1;
14222 unsigned LC2G2D4N
: 1;
14223 unsigned LC2G2D4T
: 1;
14237 } __CLC2GLS1bits_t
;
14239 extern __at(0x0E21) volatile __CLC2GLS1bits_t CLC2GLS1bits
;
14241 #define _CLC2GLS1_LC2G2D1N 0x01
14242 #define _CLC2GLS1_D1N 0x01
14243 #define _CLC2GLS1_LC2G2D1T 0x02
14244 #define _CLC2GLS1_D1T 0x02
14245 #define _CLC2GLS1_LC2G2D2N 0x04
14246 #define _CLC2GLS1_D2N 0x04
14247 #define _CLC2GLS1_LC2G2D2T 0x08
14248 #define _CLC2GLS1_D2T 0x08
14249 #define _CLC2GLS1_LC2G2D3N 0x10
14250 #define _CLC2GLS1_D3N 0x10
14251 #define _CLC2GLS1_LC2G2D3T 0x20
14252 #define _CLC2GLS1_D3T 0x20
14253 #define _CLC2GLS1_LC2G2D4N 0x40
14254 #define _CLC2GLS1_D4N 0x40
14255 #define _CLC2GLS1_LC2G2D4T 0x80
14256 #define _CLC2GLS1_D4T 0x80
14258 //==============================================================================
14261 //==============================================================================
14264 extern __at(0x0E22) __sfr CLC2GLS2
;
14270 unsigned LC2G3D1N
: 1;
14271 unsigned LC2G3D1T
: 1;
14272 unsigned LC2G3D2N
: 1;
14273 unsigned LC2G3D2T
: 1;
14274 unsigned LC2G3D3N
: 1;
14275 unsigned LC2G3D3T
: 1;
14276 unsigned LC2G3D4N
: 1;
14277 unsigned LC2G3D4T
: 1;
14291 } __CLC2GLS2bits_t
;
14293 extern __at(0x0E22) volatile __CLC2GLS2bits_t CLC2GLS2bits
;
14295 #define _CLC2GLS2_LC2G3D1N 0x01
14296 #define _CLC2GLS2_D1N 0x01
14297 #define _CLC2GLS2_LC2G3D1T 0x02
14298 #define _CLC2GLS2_D1T 0x02
14299 #define _CLC2GLS2_LC2G3D2N 0x04
14300 #define _CLC2GLS2_D2N 0x04
14301 #define _CLC2GLS2_LC2G3D2T 0x08
14302 #define _CLC2GLS2_D2T 0x08
14303 #define _CLC2GLS2_LC2G3D3N 0x10
14304 #define _CLC2GLS2_D3N 0x10
14305 #define _CLC2GLS2_LC2G3D3T 0x20
14306 #define _CLC2GLS2_D3T 0x20
14307 #define _CLC2GLS2_LC2G3D4N 0x40
14308 #define _CLC2GLS2_D4N 0x40
14309 #define _CLC2GLS2_LC2G3D4T 0x80
14310 #define _CLC2GLS2_D4T 0x80
14312 //==============================================================================
14315 //==============================================================================
14318 extern __at(0x0E23) __sfr CLC2GLS3
;
14324 unsigned LC2G4D1N
: 1;
14325 unsigned LC2G4D1T
: 1;
14326 unsigned LC2G4D2N
: 1;
14327 unsigned LC2G4D2T
: 1;
14328 unsigned LC2G4D3N
: 1;
14329 unsigned LC2G4D3T
: 1;
14330 unsigned LC2G4D4N
: 1;
14331 unsigned LC2G4D4T
: 1;
14336 unsigned G4D1N
: 1;
14337 unsigned G4D1T
: 1;
14338 unsigned G4D2N
: 1;
14339 unsigned G4D2T
: 1;
14340 unsigned G4D3N
: 1;
14341 unsigned G4D3T
: 1;
14342 unsigned G4D4N
: 1;
14343 unsigned G4D4T
: 1;
14345 } __CLC2GLS3bits_t
;
14347 extern __at(0x0E23) volatile __CLC2GLS3bits_t CLC2GLS3bits
;
14349 #define _CLC2GLS3_LC2G4D1N 0x01
14350 #define _CLC2GLS3_G4D1N 0x01
14351 #define _CLC2GLS3_LC2G4D1T 0x02
14352 #define _CLC2GLS3_G4D1T 0x02
14353 #define _CLC2GLS3_LC2G4D2N 0x04
14354 #define _CLC2GLS3_G4D2N 0x04
14355 #define _CLC2GLS3_LC2G4D2T 0x08
14356 #define _CLC2GLS3_G4D2T 0x08
14357 #define _CLC2GLS3_LC2G4D3N 0x10
14358 #define _CLC2GLS3_G4D3N 0x10
14359 #define _CLC2GLS3_LC2G4D3T 0x20
14360 #define _CLC2GLS3_G4D3T 0x20
14361 #define _CLC2GLS3_LC2G4D4N 0x40
14362 #define _CLC2GLS3_G4D4N 0x40
14363 #define _CLC2GLS3_LC2G4D4T 0x80
14364 #define _CLC2GLS3_G4D4T 0x80
14366 //==============================================================================
14369 //==============================================================================
14372 extern __at(0x0E24) __sfr CLC3CON
;
14378 unsigned LC3MODE0
: 1;
14379 unsigned LC3MODE1
: 1;
14380 unsigned LC3MODE2
: 1;
14381 unsigned LC3INTN
: 1;
14382 unsigned LC3INTP
: 1;
14383 unsigned LC3OUT
: 1;
14385 unsigned LC3EN
: 1;
14390 unsigned MODE0
: 1;
14391 unsigned MODE1
: 1;
14392 unsigned MODE2
: 1;
14402 unsigned LC3MODE
: 3;
14413 extern __at(0x0E24) volatile __CLC3CONbits_t CLC3CONbits
;
14415 #define _CLC3CON_LC3MODE0 0x01
14416 #define _CLC3CON_MODE0 0x01
14417 #define _CLC3CON_LC3MODE1 0x02
14418 #define _CLC3CON_MODE1 0x02
14419 #define _CLC3CON_LC3MODE2 0x04
14420 #define _CLC3CON_MODE2 0x04
14421 #define _CLC3CON_LC3INTN 0x08
14422 #define _CLC3CON_INTN 0x08
14423 #define _CLC3CON_LC3INTP 0x10
14424 #define _CLC3CON_INTP 0x10
14425 #define _CLC3CON_LC3OUT 0x20
14426 #define _CLC3CON_OUT 0x20
14427 #define _CLC3CON_LC3EN 0x80
14428 #define _CLC3CON_EN 0x80
14430 //==============================================================================
14433 //==============================================================================
14436 extern __at(0x0E25) __sfr CLC3POL
;
14442 unsigned LC3G1POL
: 1;
14443 unsigned LC3G2POL
: 1;
14444 unsigned LC3G3POL
: 1;
14445 unsigned LC3G4POL
: 1;
14449 unsigned LC3POL
: 1;
14454 unsigned G1POL
: 1;
14455 unsigned G2POL
: 1;
14456 unsigned G3POL
: 1;
14457 unsigned G4POL
: 1;
14465 extern __at(0x0E25) volatile __CLC3POLbits_t CLC3POLbits
;
14467 #define _CLC3POL_LC3G1POL 0x01
14468 #define _CLC3POL_G1POL 0x01
14469 #define _CLC3POL_LC3G2POL 0x02
14470 #define _CLC3POL_G2POL 0x02
14471 #define _CLC3POL_LC3G3POL 0x04
14472 #define _CLC3POL_G3POL 0x04
14473 #define _CLC3POL_LC3G4POL 0x08
14474 #define _CLC3POL_G4POL 0x08
14475 #define _CLC3POL_LC3POL 0x80
14476 #define _CLC3POL_POL 0x80
14478 //==============================================================================
14481 //==============================================================================
14484 extern __at(0x0E26) __sfr CLC3SEL0
;
14490 unsigned LC3D1S0
: 1;
14491 unsigned LC3D1S1
: 1;
14492 unsigned LC3D1S2
: 1;
14493 unsigned LC3D1S3
: 1;
14494 unsigned LC3D1S4
: 1;
14495 unsigned LC3D1S5
: 1;
14496 unsigned LC3D1S6
: 1;
14497 unsigned LC3D1S7
: 1;
14511 } __CLC3SEL0bits_t
;
14513 extern __at(0x0E26) volatile __CLC3SEL0bits_t CLC3SEL0bits
;
14515 #define _CLC3SEL0_LC3D1S0 0x01
14516 #define _CLC3SEL0_D1S0 0x01
14517 #define _CLC3SEL0_LC3D1S1 0x02
14518 #define _CLC3SEL0_D1S1 0x02
14519 #define _CLC3SEL0_LC3D1S2 0x04
14520 #define _CLC3SEL0_D1S2 0x04
14521 #define _CLC3SEL0_LC3D1S3 0x08
14522 #define _CLC3SEL0_D1S3 0x08
14523 #define _CLC3SEL0_LC3D1S4 0x10
14524 #define _CLC3SEL0_D1S4 0x10
14525 #define _CLC3SEL0_LC3D1S5 0x20
14526 #define _CLC3SEL0_D1S5 0x20
14527 #define _CLC3SEL0_LC3D1S6 0x40
14528 #define _CLC3SEL0_D1S6 0x40
14529 #define _CLC3SEL0_LC3D1S7 0x80
14530 #define _CLC3SEL0_D1S7 0x80
14532 //==============================================================================
14535 //==============================================================================
14538 extern __at(0x0E27) __sfr CLC3SEL1
;
14544 unsigned LC3D2S0
: 1;
14545 unsigned LC3D2S1
: 1;
14546 unsigned LC3D2S2
: 1;
14547 unsigned LC3D2S3
: 1;
14548 unsigned LC3D2S4
: 1;
14549 unsigned LC3D2S5
: 1;
14550 unsigned LC3D2S6
: 1;
14551 unsigned LC3D2S7
: 1;
14565 } __CLC3SEL1bits_t
;
14567 extern __at(0x0E27) volatile __CLC3SEL1bits_t CLC3SEL1bits
;
14569 #define _CLC3SEL1_LC3D2S0 0x01
14570 #define _CLC3SEL1_D2S0 0x01
14571 #define _CLC3SEL1_LC3D2S1 0x02
14572 #define _CLC3SEL1_D2S1 0x02
14573 #define _CLC3SEL1_LC3D2S2 0x04
14574 #define _CLC3SEL1_D2S2 0x04
14575 #define _CLC3SEL1_LC3D2S3 0x08
14576 #define _CLC3SEL1_D2S3 0x08
14577 #define _CLC3SEL1_LC3D2S4 0x10
14578 #define _CLC3SEL1_D2S4 0x10
14579 #define _CLC3SEL1_LC3D2S5 0x20
14580 #define _CLC3SEL1_D2S5 0x20
14581 #define _CLC3SEL1_LC3D2S6 0x40
14582 #define _CLC3SEL1_D2S6 0x40
14583 #define _CLC3SEL1_LC3D2S7 0x80
14584 #define _CLC3SEL1_D2S7 0x80
14586 //==============================================================================
14589 //==============================================================================
14592 extern __at(0x0E28) __sfr CLC3SEL2
;
14598 unsigned LC3D3S0
: 1;
14599 unsigned LC3D3S1
: 1;
14600 unsigned LC3D3S2
: 1;
14601 unsigned LC3D3S3
: 1;
14602 unsigned LC3D3S4
: 1;
14603 unsigned LC3D3S5
: 1;
14604 unsigned LC3D3S6
: 1;
14605 unsigned LC3D3S7
: 1;
14619 } __CLC3SEL2bits_t
;
14621 extern __at(0x0E28) volatile __CLC3SEL2bits_t CLC3SEL2bits
;
14623 #define _CLC3SEL2_LC3D3S0 0x01
14624 #define _CLC3SEL2_D3S0 0x01
14625 #define _CLC3SEL2_LC3D3S1 0x02
14626 #define _CLC3SEL2_D3S1 0x02
14627 #define _CLC3SEL2_LC3D3S2 0x04
14628 #define _CLC3SEL2_D3S2 0x04
14629 #define _CLC3SEL2_LC3D3S3 0x08
14630 #define _CLC3SEL2_D3S3 0x08
14631 #define _CLC3SEL2_LC3D3S4 0x10
14632 #define _CLC3SEL2_D3S4 0x10
14633 #define _CLC3SEL2_LC3D3S5 0x20
14634 #define _CLC3SEL2_D3S5 0x20
14635 #define _CLC3SEL2_LC3D3S6 0x40
14636 #define _CLC3SEL2_D3S6 0x40
14637 #define _CLC3SEL2_LC3D3S7 0x80
14638 #define _CLC3SEL2_D3S7 0x80
14640 //==============================================================================
14643 //==============================================================================
14646 extern __at(0x0E29) __sfr CLC3SEL3
;
14652 unsigned LC3D4S0
: 1;
14653 unsigned LC3D4S1
: 1;
14654 unsigned LC3D4S2
: 1;
14655 unsigned LC3D4S3
: 1;
14656 unsigned LC3D4S4
: 1;
14657 unsigned LC3D4S5
: 1;
14658 unsigned LC3D4S6
: 1;
14659 unsigned LC3D4S7
: 1;
14673 } __CLC3SEL3bits_t
;
14675 extern __at(0x0E29) volatile __CLC3SEL3bits_t CLC3SEL3bits
;
14677 #define _CLC3SEL3_LC3D4S0 0x01
14678 #define _CLC3SEL3_D4S0 0x01
14679 #define _CLC3SEL3_LC3D4S1 0x02
14680 #define _CLC3SEL3_D4S1 0x02
14681 #define _CLC3SEL3_LC3D4S2 0x04
14682 #define _CLC3SEL3_D4S2 0x04
14683 #define _CLC3SEL3_LC3D4S3 0x08
14684 #define _CLC3SEL3_D4S3 0x08
14685 #define _CLC3SEL3_LC3D4S4 0x10
14686 #define _CLC3SEL3_D4S4 0x10
14687 #define _CLC3SEL3_LC3D4S5 0x20
14688 #define _CLC3SEL3_D4S5 0x20
14689 #define _CLC3SEL3_LC3D4S6 0x40
14690 #define _CLC3SEL3_D4S6 0x40
14691 #define _CLC3SEL3_LC3D4S7 0x80
14692 #define _CLC3SEL3_D4S7 0x80
14694 //==============================================================================
14697 //==============================================================================
14700 extern __at(0x0E2A) __sfr CLC3GLS0
;
14706 unsigned LC3G1D1N
: 1;
14707 unsigned LC3G1D1T
: 1;
14708 unsigned LC3G1D2N
: 1;
14709 unsigned LC3G1D2T
: 1;
14710 unsigned LC3G1D3N
: 1;
14711 unsigned LC3G1D3T
: 1;
14712 unsigned LC3G1D4N
: 1;
14713 unsigned LC3G1D4T
: 1;
14727 } __CLC3GLS0bits_t
;
14729 extern __at(0x0E2A) volatile __CLC3GLS0bits_t CLC3GLS0bits
;
14731 #define _CLC3GLS0_LC3G1D1N 0x01
14732 #define _CLC3GLS0_D1N 0x01
14733 #define _CLC3GLS0_LC3G1D1T 0x02
14734 #define _CLC3GLS0_D1T 0x02
14735 #define _CLC3GLS0_LC3G1D2N 0x04
14736 #define _CLC3GLS0_D2N 0x04
14737 #define _CLC3GLS0_LC3G1D2T 0x08
14738 #define _CLC3GLS0_D2T 0x08
14739 #define _CLC3GLS0_LC3G1D3N 0x10
14740 #define _CLC3GLS0_D3N 0x10
14741 #define _CLC3GLS0_LC3G1D3T 0x20
14742 #define _CLC3GLS0_D3T 0x20
14743 #define _CLC3GLS0_LC3G1D4N 0x40
14744 #define _CLC3GLS0_D4N 0x40
14745 #define _CLC3GLS0_LC3G1D4T 0x80
14746 #define _CLC3GLS0_D4T 0x80
14748 //==============================================================================
14751 //==============================================================================
14754 extern __at(0x0E2B) __sfr CLC3GLS1
;
14760 unsigned LC3G2D1N
: 1;
14761 unsigned LC3G2D1T
: 1;
14762 unsigned LC3G2D2N
: 1;
14763 unsigned LC3G2D2T
: 1;
14764 unsigned LC3G2D3N
: 1;
14765 unsigned LC3G2D3T
: 1;
14766 unsigned LC3G2D4N
: 1;
14767 unsigned LC3G2D4T
: 1;
14781 } __CLC3GLS1bits_t
;
14783 extern __at(0x0E2B) volatile __CLC3GLS1bits_t CLC3GLS1bits
;
14785 #define _CLC3GLS1_LC3G2D1N 0x01
14786 #define _CLC3GLS1_D1N 0x01
14787 #define _CLC3GLS1_LC3G2D1T 0x02
14788 #define _CLC3GLS1_D1T 0x02
14789 #define _CLC3GLS1_LC3G2D2N 0x04
14790 #define _CLC3GLS1_D2N 0x04
14791 #define _CLC3GLS1_LC3G2D2T 0x08
14792 #define _CLC3GLS1_D2T 0x08
14793 #define _CLC3GLS1_LC3G2D3N 0x10
14794 #define _CLC3GLS1_D3N 0x10
14795 #define _CLC3GLS1_LC3G2D3T 0x20
14796 #define _CLC3GLS1_D3T 0x20
14797 #define _CLC3GLS1_LC3G2D4N 0x40
14798 #define _CLC3GLS1_D4N 0x40
14799 #define _CLC3GLS1_LC3G2D4T 0x80
14800 #define _CLC3GLS1_D4T 0x80
14802 //==============================================================================
14805 //==============================================================================
14808 extern __at(0x0E2C) __sfr CLC3GLS2
;
14814 unsigned LC3G3D1N
: 1;
14815 unsigned LC3G3D1T
: 1;
14816 unsigned LC3G3D2N
: 1;
14817 unsigned LC3G3D2T
: 1;
14818 unsigned LC3G3D3N
: 1;
14819 unsigned LC3G3D3T
: 1;
14820 unsigned LC3G3D4N
: 1;
14821 unsigned LC3G3D4T
: 1;
14835 } __CLC3GLS2bits_t
;
14837 extern __at(0x0E2C) volatile __CLC3GLS2bits_t CLC3GLS2bits
;
14839 #define _CLC3GLS2_LC3G3D1N 0x01
14840 #define _CLC3GLS2_D1N 0x01
14841 #define _CLC3GLS2_LC3G3D1T 0x02
14842 #define _CLC3GLS2_D1T 0x02
14843 #define _CLC3GLS2_LC3G3D2N 0x04
14844 #define _CLC3GLS2_D2N 0x04
14845 #define _CLC3GLS2_LC3G3D2T 0x08
14846 #define _CLC3GLS2_D2T 0x08
14847 #define _CLC3GLS2_LC3G3D3N 0x10
14848 #define _CLC3GLS2_D3N 0x10
14849 #define _CLC3GLS2_LC3G3D3T 0x20
14850 #define _CLC3GLS2_D3T 0x20
14851 #define _CLC3GLS2_LC3G3D4N 0x40
14852 #define _CLC3GLS2_D4N 0x40
14853 #define _CLC3GLS2_LC3G3D4T 0x80
14854 #define _CLC3GLS2_D4T 0x80
14856 //==============================================================================
14859 //==============================================================================
14862 extern __at(0x0E2D) __sfr CLC3GLS3
;
14868 unsigned LC3G4D1N
: 1;
14869 unsigned LC3G4D1T
: 1;
14870 unsigned LC3G4D2N
: 1;
14871 unsigned LC3G4D2T
: 1;
14872 unsigned LC3G4D3N
: 1;
14873 unsigned LC3G4D3T
: 1;
14874 unsigned LC3G4D4N
: 1;
14875 unsigned LC3G4D4T
: 1;
14880 unsigned G4D1N
: 1;
14881 unsigned G4D1T
: 1;
14882 unsigned G4D2N
: 1;
14883 unsigned G4D2T
: 1;
14884 unsigned G4D3N
: 1;
14885 unsigned G4D3T
: 1;
14886 unsigned G4D4N
: 1;
14887 unsigned G4D4T
: 1;
14889 } __CLC3GLS3bits_t
;
14891 extern __at(0x0E2D) volatile __CLC3GLS3bits_t CLC3GLS3bits
;
14893 #define _CLC3GLS3_LC3G4D1N 0x01
14894 #define _CLC3GLS3_G4D1N 0x01
14895 #define _CLC3GLS3_LC3G4D1T 0x02
14896 #define _CLC3GLS3_G4D1T 0x02
14897 #define _CLC3GLS3_LC3G4D2N 0x04
14898 #define _CLC3GLS3_G4D2N 0x04
14899 #define _CLC3GLS3_LC3G4D2T 0x08
14900 #define _CLC3GLS3_G4D2T 0x08
14901 #define _CLC3GLS3_LC3G4D3N 0x10
14902 #define _CLC3GLS3_G4D3N 0x10
14903 #define _CLC3GLS3_LC3G4D3T 0x20
14904 #define _CLC3GLS3_G4D3T 0x20
14905 #define _CLC3GLS3_LC3G4D4N 0x40
14906 #define _CLC3GLS3_G4D4N 0x40
14907 #define _CLC3GLS3_LC3G4D4T 0x80
14908 #define _CLC3GLS3_G4D4T 0x80
14910 //==============================================================================
14913 //==============================================================================
14916 extern __at(0x0E2E) __sfr CLC4CON
;
14922 unsigned LC4MODE0
: 1;
14923 unsigned LC4MODE1
: 1;
14924 unsigned LC4MODE2
: 1;
14925 unsigned LC4INTN
: 1;
14926 unsigned LC4INTP
: 1;
14927 unsigned LC4OUT
: 1;
14929 unsigned LC4EN
: 1;
14934 unsigned MODE0
: 1;
14935 unsigned MODE1
: 1;
14936 unsigned MODE2
: 1;
14946 unsigned LC4MODE
: 3;
14957 extern __at(0x0E2E) volatile __CLC4CONbits_t CLC4CONbits
;
14959 #define _CLC4CON_LC4MODE0 0x01
14960 #define _CLC4CON_MODE0 0x01
14961 #define _CLC4CON_LC4MODE1 0x02
14962 #define _CLC4CON_MODE1 0x02
14963 #define _CLC4CON_LC4MODE2 0x04
14964 #define _CLC4CON_MODE2 0x04
14965 #define _CLC4CON_LC4INTN 0x08
14966 #define _CLC4CON_INTN 0x08
14967 #define _CLC4CON_LC4INTP 0x10
14968 #define _CLC4CON_INTP 0x10
14969 #define _CLC4CON_LC4OUT 0x20
14970 #define _CLC4CON_OUT 0x20
14971 #define _CLC4CON_LC4EN 0x80
14972 #define _CLC4CON_EN 0x80
14974 //==============================================================================
14977 //==============================================================================
14980 extern __at(0x0E2F) __sfr CLC4POL
;
14986 unsigned LC4G1POL
: 1;
14987 unsigned LC4G2POL
: 1;
14988 unsigned LC4G3POL
: 1;
14989 unsigned LC4G4POL
: 1;
14993 unsigned LC4POL
: 1;
14998 unsigned G1POL
: 1;
14999 unsigned G2POL
: 1;
15000 unsigned G3POL
: 1;
15001 unsigned G4POL
: 1;
15009 extern __at(0x0E2F) volatile __CLC4POLbits_t CLC4POLbits
;
15011 #define _CLC4POL_LC4G1POL 0x01
15012 #define _CLC4POL_G1POL 0x01
15013 #define _CLC4POL_LC4G2POL 0x02
15014 #define _CLC4POL_G2POL 0x02
15015 #define _CLC4POL_LC4G3POL 0x04
15016 #define _CLC4POL_G3POL 0x04
15017 #define _CLC4POL_LC4G4POL 0x08
15018 #define _CLC4POL_G4POL 0x08
15019 #define _CLC4POL_LC4POL 0x80
15020 #define _CLC4POL_POL 0x80
15022 //==============================================================================
15025 //==============================================================================
15028 extern __at(0x0E30) __sfr CLC4SEL0
;
15034 unsigned LC4D1S0
: 1;
15035 unsigned LC4D1S1
: 1;
15036 unsigned LC4D1S2
: 1;
15037 unsigned LC4D1S3
: 1;
15038 unsigned LC4D1S4
: 1;
15039 unsigned LC4D1S5
: 1;
15040 unsigned LC4D1S6
: 1;
15041 unsigned LC4D1S7
: 1;
15055 } __CLC4SEL0bits_t
;
15057 extern __at(0x0E30) volatile __CLC4SEL0bits_t CLC4SEL0bits
;
15059 #define _CLC4SEL0_LC4D1S0 0x01
15060 #define _CLC4SEL0_D1S0 0x01
15061 #define _CLC4SEL0_LC4D1S1 0x02
15062 #define _CLC4SEL0_D1S1 0x02
15063 #define _CLC4SEL0_LC4D1S2 0x04
15064 #define _CLC4SEL0_D1S2 0x04
15065 #define _CLC4SEL0_LC4D1S3 0x08
15066 #define _CLC4SEL0_D1S3 0x08
15067 #define _CLC4SEL0_LC4D1S4 0x10
15068 #define _CLC4SEL0_D1S4 0x10
15069 #define _CLC4SEL0_LC4D1S5 0x20
15070 #define _CLC4SEL0_D1S5 0x20
15071 #define _CLC4SEL0_LC4D1S6 0x40
15072 #define _CLC4SEL0_D1S6 0x40
15073 #define _CLC4SEL0_LC4D1S7 0x80
15074 #define _CLC4SEL0_D1S7 0x80
15076 //==============================================================================
15079 //==============================================================================
15082 extern __at(0x0E31) __sfr CLC4SEL1
;
15088 unsigned LC4D2S0
: 1;
15089 unsigned LC4D2S1
: 1;
15090 unsigned LC4D2S2
: 1;
15091 unsigned LC4D2S3
: 1;
15092 unsigned LC4D2S4
: 1;
15093 unsigned LC4D2S5
: 1;
15094 unsigned LC4D2S6
: 1;
15095 unsigned LC4D2S7
: 1;
15109 } __CLC4SEL1bits_t
;
15111 extern __at(0x0E31) volatile __CLC4SEL1bits_t CLC4SEL1bits
;
15113 #define _CLC4SEL1_LC4D2S0 0x01
15114 #define _CLC4SEL1_D2S0 0x01
15115 #define _CLC4SEL1_LC4D2S1 0x02
15116 #define _CLC4SEL1_D2S1 0x02
15117 #define _CLC4SEL1_LC4D2S2 0x04
15118 #define _CLC4SEL1_D2S2 0x04
15119 #define _CLC4SEL1_LC4D2S3 0x08
15120 #define _CLC4SEL1_D2S3 0x08
15121 #define _CLC4SEL1_LC4D2S4 0x10
15122 #define _CLC4SEL1_D2S4 0x10
15123 #define _CLC4SEL1_LC4D2S5 0x20
15124 #define _CLC4SEL1_D2S5 0x20
15125 #define _CLC4SEL1_LC4D2S6 0x40
15126 #define _CLC4SEL1_D2S6 0x40
15127 #define _CLC4SEL1_LC4D2S7 0x80
15128 #define _CLC4SEL1_D2S7 0x80
15130 //==============================================================================
15133 //==============================================================================
15136 extern __at(0x0E32) __sfr CLC4SEL2
;
15142 unsigned LC4D3S0
: 1;
15143 unsigned LC4D3S1
: 1;
15144 unsigned LC4D3S2
: 1;
15145 unsigned LC4D3S3
: 1;
15146 unsigned LC4D3S4
: 1;
15147 unsigned LC4D3S5
: 1;
15148 unsigned LC4D3S6
: 1;
15149 unsigned LC4D3S7
: 1;
15163 } __CLC4SEL2bits_t
;
15165 extern __at(0x0E32) volatile __CLC4SEL2bits_t CLC4SEL2bits
;
15167 #define _CLC4SEL2_LC4D3S0 0x01
15168 #define _CLC4SEL2_D3S0 0x01
15169 #define _CLC4SEL2_LC4D3S1 0x02
15170 #define _CLC4SEL2_D3S1 0x02
15171 #define _CLC4SEL2_LC4D3S2 0x04
15172 #define _CLC4SEL2_D3S2 0x04
15173 #define _CLC4SEL2_LC4D3S3 0x08
15174 #define _CLC4SEL2_D3S3 0x08
15175 #define _CLC4SEL2_LC4D3S4 0x10
15176 #define _CLC4SEL2_D3S4 0x10
15177 #define _CLC4SEL2_LC4D3S5 0x20
15178 #define _CLC4SEL2_D3S5 0x20
15179 #define _CLC4SEL2_LC4D3S6 0x40
15180 #define _CLC4SEL2_D3S6 0x40
15181 #define _CLC4SEL2_LC4D3S7 0x80
15182 #define _CLC4SEL2_D3S7 0x80
15184 //==============================================================================
15187 //==============================================================================
15190 extern __at(0x0E33) __sfr CLC4SEL3
;
15196 unsigned LC4D4S0
: 1;
15197 unsigned LC4D4S1
: 1;
15198 unsigned LC4D4S2
: 1;
15199 unsigned LC4D4S3
: 1;
15200 unsigned LC4D4S4
: 1;
15201 unsigned LC4D4S5
: 1;
15202 unsigned LC4D4S6
: 1;
15203 unsigned LC4D4S7
: 1;
15217 } __CLC4SEL3bits_t
;
15219 extern __at(0x0E33) volatile __CLC4SEL3bits_t CLC4SEL3bits
;
15221 #define _CLC4SEL3_LC4D4S0 0x01
15222 #define _CLC4SEL3_D4S0 0x01
15223 #define _CLC4SEL3_LC4D4S1 0x02
15224 #define _CLC4SEL3_D4S1 0x02
15225 #define _CLC4SEL3_LC4D4S2 0x04
15226 #define _CLC4SEL3_D4S2 0x04
15227 #define _CLC4SEL3_LC4D4S3 0x08
15228 #define _CLC4SEL3_D4S3 0x08
15229 #define _CLC4SEL3_LC4D4S4 0x10
15230 #define _CLC4SEL3_D4S4 0x10
15231 #define _CLC4SEL3_LC4D4S5 0x20
15232 #define _CLC4SEL3_D4S5 0x20
15233 #define _CLC4SEL3_LC4D4S6 0x40
15234 #define _CLC4SEL3_D4S6 0x40
15235 #define _CLC4SEL3_LC4D4S7 0x80
15236 #define _CLC4SEL3_D4S7 0x80
15238 //==============================================================================
15241 //==============================================================================
15244 extern __at(0x0E34) __sfr CLC4GLS0
;
15250 unsigned LC4G1D1N
: 1;
15251 unsigned LC4G1D1T
: 1;
15252 unsigned LC4G1D2N
: 1;
15253 unsigned LC4G1D2T
: 1;
15254 unsigned LC4G1D3N
: 1;
15255 unsigned LC4G1D3T
: 1;
15256 unsigned LC4G1D4N
: 1;
15257 unsigned LC4G1D4T
: 1;
15271 } __CLC4GLS0bits_t
;
15273 extern __at(0x0E34) volatile __CLC4GLS0bits_t CLC4GLS0bits
;
15275 #define _CLC4GLS0_LC4G1D1N 0x01
15276 #define _CLC4GLS0_D1N 0x01
15277 #define _CLC4GLS0_LC4G1D1T 0x02
15278 #define _CLC4GLS0_D1T 0x02
15279 #define _CLC4GLS0_LC4G1D2N 0x04
15280 #define _CLC4GLS0_D2N 0x04
15281 #define _CLC4GLS0_LC4G1D2T 0x08
15282 #define _CLC4GLS0_D2T 0x08
15283 #define _CLC4GLS0_LC4G1D3N 0x10
15284 #define _CLC4GLS0_D3N 0x10
15285 #define _CLC4GLS0_LC4G1D3T 0x20
15286 #define _CLC4GLS0_D3T 0x20
15287 #define _CLC4GLS0_LC4G1D4N 0x40
15288 #define _CLC4GLS0_D4N 0x40
15289 #define _CLC4GLS0_LC4G1D4T 0x80
15290 #define _CLC4GLS0_D4T 0x80
15292 //==============================================================================
15295 //==============================================================================
15298 extern __at(0x0E35) __sfr CLC4GLS1
;
15304 unsigned LC4G2D1N
: 1;
15305 unsigned LC4G2D1T
: 1;
15306 unsigned LC4G2D2N
: 1;
15307 unsigned LC4G2D2T
: 1;
15308 unsigned LC4G2D3N
: 1;
15309 unsigned LC4G2D3T
: 1;
15310 unsigned LC4G2D4N
: 1;
15311 unsigned LC4G2D4T
: 1;
15325 } __CLC4GLS1bits_t
;
15327 extern __at(0x0E35) volatile __CLC4GLS1bits_t CLC4GLS1bits
;
15329 #define _CLC4GLS1_LC4G2D1N 0x01
15330 #define _CLC4GLS1_D1N 0x01
15331 #define _CLC4GLS1_LC4G2D1T 0x02
15332 #define _CLC4GLS1_D1T 0x02
15333 #define _CLC4GLS1_LC4G2D2N 0x04
15334 #define _CLC4GLS1_D2N 0x04
15335 #define _CLC4GLS1_LC4G2D2T 0x08
15336 #define _CLC4GLS1_D2T 0x08
15337 #define _CLC4GLS1_LC4G2D3N 0x10
15338 #define _CLC4GLS1_D3N 0x10
15339 #define _CLC4GLS1_LC4G2D3T 0x20
15340 #define _CLC4GLS1_D3T 0x20
15341 #define _CLC4GLS1_LC4G2D4N 0x40
15342 #define _CLC4GLS1_D4N 0x40
15343 #define _CLC4GLS1_LC4G2D4T 0x80
15344 #define _CLC4GLS1_D4T 0x80
15346 //==============================================================================
15349 //==============================================================================
15352 extern __at(0x0E36) __sfr CLC4GLS2
;
15358 unsigned LC4G3D1N
: 1;
15359 unsigned LC4G3D1T
: 1;
15360 unsigned LC4G3D2N
: 1;
15361 unsigned LC4G3D2T
: 1;
15362 unsigned LC4G3D3N
: 1;
15363 unsigned LC4G3D3T
: 1;
15364 unsigned LC4G3D4N
: 1;
15365 unsigned LC4G3D4T
: 1;
15379 } __CLC4GLS2bits_t
;
15381 extern __at(0x0E36) volatile __CLC4GLS2bits_t CLC4GLS2bits
;
15383 #define _CLC4GLS2_LC4G3D1N 0x01
15384 #define _CLC4GLS2_D1N 0x01
15385 #define _CLC4GLS2_LC4G3D1T 0x02
15386 #define _CLC4GLS2_D1T 0x02
15387 #define _CLC4GLS2_LC4G3D2N 0x04
15388 #define _CLC4GLS2_D2N 0x04
15389 #define _CLC4GLS2_LC4G3D2T 0x08
15390 #define _CLC4GLS2_D2T 0x08
15391 #define _CLC4GLS2_LC4G3D3N 0x10
15392 #define _CLC4GLS2_D3N 0x10
15393 #define _CLC4GLS2_LC4G3D3T 0x20
15394 #define _CLC4GLS2_D3T 0x20
15395 #define _CLC4GLS2_LC4G3D4N 0x40
15396 #define _CLC4GLS2_D4N 0x40
15397 #define _CLC4GLS2_LC4G3D4T 0x80
15398 #define _CLC4GLS2_D4T 0x80
15400 //==============================================================================
15403 //==============================================================================
15406 extern __at(0x0E37) __sfr CLC4GLS3
;
15412 unsigned LC4G4D1N
: 1;
15413 unsigned LC4G4D1T
: 1;
15414 unsigned LC4G4D2N
: 1;
15415 unsigned LC4G4D2T
: 1;
15416 unsigned LC4G4D3N
: 1;
15417 unsigned LC4G4D3T
: 1;
15418 unsigned LC4G4D4N
: 1;
15419 unsigned LC4G4D4T
: 1;
15424 unsigned G4D1N
: 1;
15425 unsigned G4D1T
: 1;
15426 unsigned G4D2N
: 1;
15427 unsigned G4D2T
: 1;
15428 unsigned G4D3N
: 1;
15429 unsigned G4D3T
: 1;
15430 unsigned G4D4N
: 1;
15431 unsigned G4D4T
: 1;
15433 } __CLC4GLS3bits_t
;
15435 extern __at(0x0E37) volatile __CLC4GLS3bits_t CLC4GLS3bits
;
15437 #define _CLC4GLS3_LC4G4D1N 0x01
15438 #define _CLC4GLS3_G4D1N 0x01
15439 #define _CLC4GLS3_LC4G4D1T 0x02
15440 #define _CLC4GLS3_G4D1T 0x02
15441 #define _CLC4GLS3_LC4G4D2N 0x04
15442 #define _CLC4GLS3_G4D2N 0x04
15443 #define _CLC4GLS3_LC4G4D2T 0x08
15444 #define _CLC4GLS3_G4D2T 0x08
15445 #define _CLC4GLS3_LC4G4D3N 0x10
15446 #define _CLC4GLS3_G4D3N 0x10
15447 #define _CLC4GLS3_LC4G4D3T 0x20
15448 #define _CLC4GLS3_G4D3T 0x20
15449 #define _CLC4GLS3_LC4G4D4N 0x40
15450 #define _CLC4GLS3_G4D4N 0x40
15451 #define _CLC4GLS3_LC4G4D4T 0x80
15452 #define _CLC4GLS3_G4D4T 0x80
15454 //==============================================================================
15457 //==============================================================================
15460 extern __at(0x0E8F) __sfr PPSLOCK
;
15464 unsigned PPSLOCKED
: 1;
15474 extern __at(0x0E8F) volatile __PPSLOCKbits_t PPSLOCKbits
;
15476 #define _PPSLOCKED 0x01
15478 //==============================================================================
15481 //==============================================================================
15484 extern __at(0x0E90) __sfr INTPPS
;
15490 unsigned INTPPS0
: 1;
15491 unsigned INTPPS1
: 1;
15492 unsigned INTPPS2
: 1;
15493 unsigned INTPPS3
: 1;
15502 unsigned INTPPS
: 4;
15507 extern __at(0x0E90) volatile __INTPPSbits_t INTPPSbits
;
15509 #define _INTPPS0 0x01
15510 #define _INTPPS1 0x02
15511 #define _INTPPS2 0x04
15512 #define _INTPPS3 0x08
15514 //==============================================================================
15517 //==============================================================================
15520 extern __at(0x0E91) __sfr T0CKIPPS
;
15526 unsigned T0CKIPPS0
: 1;
15527 unsigned T0CKIPPS1
: 1;
15528 unsigned T0CKIPPS2
: 1;
15529 unsigned T0CKIPPS3
: 1;
15538 unsigned T0CKIPPS
: 4;
15541 } __T0CKIPPSbits_t
;
15543 extern __at(0x0E91) volatile __T0CKIPPSbits_t T0CKIPPSbits
;
15545 #define _T0CKIPPS0 0x01
15546 #define _T0CKIPPS1 0x02
15547 #define _T0CKIPPS2 0x04
15548 #define _T0CKIPPS3 0x08
15550 //==============================================================================
15553 //==============================================================================
15556 extern __at(0x0E92) __sfr T1CKIPPS
;
15562 unsigned T1CKIPPS0
: 1;
15563 unsigned T1CKIPPS1
: 1;
15564 unsigned T1CKIPPS2
: 1;
15565 unsigned T1CKIPPS3
: 1;
15566 unsigned T1CKIPPS4
: 1;
15574 unsigned T1CKIPPS
: 5;
15577 } __T1CKIPPSbits_t
;
15579 extern __at(0x0E92) volatile __T1CKIPPSbits_t T1CKIPPSbits
;
15581 #define _T1CKIPPS0 0x01
15582 #define _T1CKIPPS1 0x02
15583 #define _T1CKIPPS2 0x04
15584 #define _T1CKIPPS3 0x08
15585 #define _T1CKIPPS4 0x10
15587 //==============================================================================
15590 //==============================================================================
15593 extern __at(0x0E93) __sfr T1GPPS
;
15599 unsigned T1GPPS0
: 1;
15600 unsigned T1GPPS1
: 1;
15601 unsigned T1GPPS2
: 1;
15602 unsigned T1GPPS3
: 1;
15603 unsigned T1GPPS4
: 1;
15611 unsigned T1GPPS
: 5;
15616 extern __at(0x0E93) volatile __T1GPPSbits_t T1GPPSbits
;
15618 #define _T1GPPS0 0x01
15619 #define _T1GPPS1 0x02
15620 #define _T1GPPS2 0x04
15621 #define _T1GPPS3 0x08
15622 #define _T1GPPS4 0x10
15624 //==============================================================================
15627 //==============================================================================
15630 extern __at(0x0E94) __sfr T3CKIPPS
;
15636 unsigned T3CKIPPS0
: 1;
15637 unsigned T3CKIPPS1
: 1;
15638 unsigned T3CKIPPS2
: 1;
15639 unsigned T3CKIPPS3
: 1;
15640 unsigned T3CKIPPS4
: 1;
15648 unsigned T3CKIPPS
: 5;
15651 } __T3CKIPPSbits_t
;
15653 extern __at(0x0E94) volatile __T3CKIPPSbits_t T3CKIPPSbits
;
15655 #define _T3CKIPPS0 0x01
15656 #define _T3CKIPPS1 0x02
15657 #define _T3CKIPPS2 0x04
15658 #define _T3CKIPPS3 0x08
15659 #define _T3CKIPPS4 0x10
15661 //==============================================================================
15664 //==============================================================================
15667 extern __at(0x0E95) __sfr T3GPPS
;
15673 unsigned T3GPPS0
: 1;
15674 unsigned T3GPPS1
: 1;
15675 unsigned T3GPPS2
: 1;
15676 unsigned T3GPPS3
: 1;
15677 unsigned T3GPPS4
: 1;
15685 unsigned T3GPPS
: 5;
15690 extern __at(0x0E95) volatile __T3GPPSbits_t T3GPPSbits
;
15692 #define _T3GPPS0 0x01
15693 #define _T3GPPS1 0x02
15694 #define _T3GPPS2 0x04
15695 #define _T3GPPS3 0x08
15696 #define _T3GPPS4 0x10
15698 //==============================================================================
15701 //==============================================================================
15704 extern __at(0x0E96) __sfr T5CKIPPS
;
15710 unsigned T5CKIPPS0
: 1;
15711 unsigned T5CKIPPS1
: 1;
15712 unsigned T5CKIPPS2
: 1;
15713 unsigned T5CKIPPS3
: 1;
15714 unsigned T5CKIPPS4
: 1;
15722 unsigned T5CKIPPS
: 5;
15725 } __T5CKIPPSbits_t
;
15727 extern __at(0x0E96) volatile __T5CKIPPSbits_t T5CKIPPSbits
;
15729 #define _T5CKIPPS0 0x01
15730 #define _T5CKIPPS1 0x02
15731 #define _T5CKIPPS2 0x04
15732 #define _T5CKIPPS3 0x08
15733 #define _T5CKIPPS4 0x10
15735 //==============================================================================
15738 //==============================================================================
15741 extern __at(0x0E97) __sfr T5GPPS
;
15747 unsigned T5GPPS0
: 1;
15748 unsigned T5GPPS1
: 1;
15749 unsigned T5GPPS2
: 1;
15750 unsigned T5GPPS3
: 1;
15751 unsigned T5GPPS4
: 1;
15759 unsigned T5GPPS
: 5;
15764 extern __at(0x0E97) volatile __T5GPPSbits_t T5GPPSbits
;
15766 #define _T5GPPS0 0x01
15767 #define _T5GPPS1 0x02
15768 #define _T5GPPS2 0x04
15769 #define _T5GPPS3 0x08
15770 #define _T5GPPS4 0x10
15772 //==============================================================================
15775 //==============================================================================
15778 extern __at(0x0E9C) __sfr T2AINPPS
;
15784 unsigned T2AINPPS0
: 1;
15785 unsigned T2AINPPS1
: 1;
15786 unsigned T2AINPPS2
: 1;
15787 unsigned T2AINPPS3
: 1;
15788 unsigned T2AINPPS4
: 1;
15796 unsigned T2AINPPS
: 5;
15799 } __T2AINPPSbits_t
;
15801 extern __at(0x0E9C) volatile __T2AINPPSbits_t T2AINPPSbits
;
15803 #define _T2AINPPS0 0x01
15804 #define _T2AINPPS1 0x02
15805 #define _T2AINPPS2 0x04
15806 #define _T2AINPPS3 0x08
15807 #define _T2AINPPS4 0x10
15809 //==============================================================================
15812 //==============================================================================
15815 extern __at(0x0E9D) __sfr T4AINPPS
;
15821 unsigned T4AINPPS0
: 1;
15822 unsigned T4AINPPS1
: 1;
15823 unsigned T4AINPPS2
: 1;
15824 unsigned T4AINPPS3
: 1;
15825 unsigned T4AINPPS4
: 1;
15833 unsigned T4AINPPS
: 5;
15836 } __T4AINPPSbits_t
;
15838 extern __at(0x0E9D) volatile __T4AINPPSbits_t T4AINPPSbits
;
15840 #define _T4AINPPS0 0x01
15841 #define _T4AINPPS1 0x02
15842 #define _T4AINPPS2 0x04
15843 #define _T4AINPPS3 0x08
15844 #define _T4AINPPS4 0x10
15846 //==============================================================================
15849 //==============================================================================
15852 extern __at(0x0E9E) __sfr T6AINPPS
;
15858 unsigned T6AINPPS0
: 1;
15859 unsigned T6AINPPS1
: 1;
15860 unsigned T6AINPPS2
: 1;
15861 unsigned T6AINPPS3
: 1;
15862 unsigned T6AINPPS4
: 1;
15870 unsigned T6AINPPS
: 5;
15873 } __T6AINPPSbits_t
;
15875 extern __at(0x0E9E) volatile __T6AINPPSbits_t T6AINPPSbits
;
15877 #define _T6AINPPS0 0x01
15878 #define _T6AINPPS1 0x02
15879 #define _T6AINPPS2 0x04
15880 #define _T6AINPPS3 0x08
15881 #define _T6AINPPS4 0x10
15883 //==============================================================================
15886 //==============================================================================
15889 extern __at(0x0EA1) __sfr CCP1PPS
;
15895 unsigned CCP1PPS0
: 1;
15896 unsigned CCP1PPS1
: 1;
15897 unsigned CCP1PPS2
: 1;
15898 unsigned CCP1PPS3
: 1;
15899 unsigned CCP1PPS4
: 1;
15907 unsigned CCP1PPS
: 5;
15912 extern __at(0x0EA1) volatile __CCP1PPSbits_t CCP1PPSbits
;
15914 #define _CCP1PPS0 0x01
15915 #define _CCP1PPS1 0x02
15916 #define _CCP1PPS2 0x04
15917 #define _CCP1PPS3 0x08
15918 #define _CCP1PPS4 0x10
15920 //==============================================================================
15923 //==============================================================================
15926 extern __at(0x0EA2) __sfr CCP2PPS
;
15932 unsigned CCP2PPS0
: 1;
15933 unsigned CCP2PPS1
: 1;
15934 unsigned CCP2PPS2
: 1;
15935 unsigned CCP2PPS3
: 1;
15936 unsigned CCP2PPS4
: 1;
15944 unsigned CCP2PPS
: 5;
15949 extern __at(0x0EA2) volatile __CCP2PPSbits_t CCP2PPSbits
;
15951 #define _CCP2PPS0 0x01
15952 #define _CCP2PPS1 0x02
15953 #define _CCP2PPS2 0x04
15954 #define _CCP2PPS3 0x08
15955 #define _CCP2PPS4 0x10
15957 //==============================================================================
15960 //==============================================================================
15963 extern __at(0x0EA3) __sfr CCP3PPS
;
15969 unsigned CCP3PPS0
: 1;
15970 unsigned CCP3PPS1
: 1;
15971 unsigned CCP3PPS2
: 1;
15972 unsigned CCP3PPS3
: 1;
15973 unsigned CCP3PPS4
: 1;
15981 unsigned CCP3PPS
: 5;
15986 extern __at(0x0EA3) volatile __CCP3PPSbits_t CCP3PPSbits
;
15988 #define _CCP3PPS0 0x01
15989 #define _CCP3PPS1 0x02
15990 #define _CCP3PPS2 0x04
15991 #define _CCP3PPS3 0x08
15992 #define _CCP3PPS4 0x10
15994 //==============================================================================
15997 //==============================================================================
16000 extern __at(0x0EA4) __sfr CCP4PPS
;
16006 unsigned CCP4PPS0
: 1;
16007 unsigned CCP4PPS1
: 1;
16008 unsigned CCP4PPS2
: 1;
16009 unsigned CCP4PPS3
: 1;
16010 unsigned CCP4PPS4
: 1;
16018 unsigned CCP4PPS
: 5;
16023 extern __at(0x0EA4) volatile __CCP4PPSbits_t CCP4PPSbits
;
16025 #define _CCP4PPS0 0x01
16026 #define _CCP4PPS1 0x02
16027 #define _CCP4PPS2 0x04
16028 #define _CCP4PPS3 0x08
16029 #define _CCP4PPS4 0x10
16031 //==============================================================================
16034 //==============================================================================
16037 extern __at(0x0EA5) __sfr CCP5PPS
;
16043 unsigned CCP5PPS0
: 1;
16044 unsigned CCP5PPS1
: 1;
16045 unsigned CCP5PPS2
: 1;
16046 unsigned CCP5PPS3
: 1;
16047 unsigned CCP5PPS4
: 1;
16048 unsigned CCP6PPS
: 1;
16055 unsigned CCP5PPS
: 5;
16060 extern __at(0x0EA5) volatile __CCP5PPSbits_t CCP5PPSbits
;
16062 #define _CCP5PPS0 0x01
16063 #define _CCP5PPS1 0x02
16064 #define _CCP5PPS2 0x04
16065 #define _CCP5PPS3 0x08
16066 #define _CCP5PPS4 0x10
16067 #define _CCP6PPS 0x20
16069 //==============================================================================
16072 //==============================================================================
16075 extern __at(0x0EA9) __sfr SMT1WINPPS
;
16081 unsigned SMU1WINPPS0
: 1;
16082 unsigned SMU1WINPPS1
: 1;
16083 unsigned SMU1WINPPS2
: 1;
16084 unsigned SMU1WINPPS3
: 1;
16085 unsigned SMU1WINPPS4
: 1;
16093 unsigned SMU1WINPPS
: 5;
16096 } __SMT1WINPPSbits_t
;
16098 extern __at(0x0EA9) volatile __SMT1WINPPSbits_t SMT1WINPPSbits
;
16100 #define _SMU1WINPPS0 0x01
16101 #define _SMU1WINPPS1 0x02
16102 #define _SMU1WINPPS2 0x04
16103 #define _SMU1WINPPS3 0x08
16104 #define _SMU1WINPPS4 0x10
16106 //==============================================================================
16109 //==============================================================================
16112 extern __at(0x0EAA) __sfr SMT1SIGPPS
;
16118 unsigned SMU1SIGPPS0
: 1;
16119 unsigned SMU1SIGPPS1
: 1;
16120 unsigned SMU1SIGPPS2
: 1;
16121 unsigned SMU1SIGPPS3
: 1;
16122 unsigned SMU1SIGPPS4
: 1;
16130 unsigned SMU1SIGPPS
: 5;
16133 } __SMT1SIGPPSbits_t
;
16135 extern __at(0x0EAA) volatile __SMT1SIGPPSbits_t SMT1SIGPPSbits
;
16137 #define _SMU1SIGPPS0 0x01
16138 #define _SMU1SIGPPS1 0x02
16139 #define _SMU1SIGPPS2 0x04
16140 #define _SMU1SIGPPS3 0x08
16141 #define _SMU1SIGPPS4 0x10
16143 //==============================================================================
16146 //==============================================================================
16149 extern __at(0x0EAB) __sfr SMT2WINPPS
;
16155 unsigned SMU2WINPPS0
: 1;
16156 unsigned SMU2WINPPS1
: 1;
16157 unsigned SMU2WINPPS2
: 1;
16158 unsigned SMU2WINPPS3
: 1;
16159 unsigned SMU2WINPPS4
: 1;
16167 unsigned SMU2WINPPS
: 5;
16170 } __SMT2WINPPSbits_t
;
16172 extern __at(0x0EAB) volatile __SMT2WINPPSbits_t SMT2WINPPSbits
;
16174 #define _SMU2WINPPS0 0x01
16175 #define _SMU2WINPPS1 0x02
16176 #define _SMU2WINPPS2 0x04
16177 #define _SMU2WINPPS3 0x08
16178 #define _SMU2WINPPS4 0x10
16180 //==============================================================================
16183 //==============================================================================
16186 extern __at(0x0EAC) __sfr SMT2SIGPPS
;
16192 unsigned SMU2SIGPPS0
: 1;
16193 unsigned SMU2SIGPPS1
: 1;
16194 unsigned SMU2SIGPPS2
: 1;
16195 unsigned SMU2SIGPPS3
: 1;
16196 unsigned SMU2SIGPPS4
: 1;
16204 unsigned SMU2SIGPPS
: 5;
16207 } __SMT2SIGPPSbits_t
;
16209 extern __at(0x0EAC) volatile __SMT2SIGPPSbits_t SMT2SIGPPSbits
;
16211 #define _SMU2SIGPPS0 0x01
16212 #define _SMU2SIGPPS1 0x02
16213 #define _SMU2SIGPPS2 0x04
16214 #define _SMU2SIGPPS3 0x08
16215 #define _SMU2SIGPPS4 0x10
16217 //==============================================================================
16220 //==============================================================================
16223 extern __at(0x0EB1) __sfr CWG1PPS
;
16229 unsigned CWG1PPS0
: 1;
16230 unsigned CWG1PPS1
: 1;
16231 unsigned CWG1PPS2
: 1;
16232 unsigned CWG1PPS3
: 1;
16233 unsigned CWG1PPS4
: 1;
16241 unsigned CWG1PPS
: 5;
16246 extern __at(0x0EB1) volatile __CWG1PPSbits_t CWG1PPSbits
;
16248 #define _CWG1PPS0 0x01
16249 #define _CWG1PPS1 0x02
16250 #define _CWG1PPS2 0x04
16251 #define _CWG1PPS3 0x08
16252 #define _CWG1PPS4 0x10
16254 //==============================================================================
16257 //==============================================================================
16260 extern __at(0x0EB2) __sfr CWG2PPS
;
16266 unsigned CWG2PPS0
: 1;
16267 unsigned CWG2PPS1
: 1;
16268 unsigned CWG2PPS2
: 1;
16269 unsigned CWG2PPS3
: 1;
16270 unsigned CWG2PPS4
: 1;
16278 unsigned CWG2PPS
: 5;
16283 extern __at(0x0EB2) volatile __CWG2PPSbits_t CWG2PPSbits
;
16285 #define _CWG2PPS0 0x01
16286 #define _CWG2PPS1 0x02
16287 #define _CWG2PPS2 0x04
16288 #define _CWG2PPS3 0x08
16289 #define _CWG2PPS4 0x10
16291 //==============================================================================
16294 //==============================================================================
16297 extern __at(0x0EB3) __sfr CWG3PPS
;
16303 unsigned CWG3PPS0
: 1;
16304 unsigned CWG3PPS1
: 1;
16305 unsigned CWG3PPS2
: 1;
16306 unsigned CWG3PPS3
: 1;
16307 unsigned CWG3PPS4
: 1;
16315 unsigned CWG3PPS
: 5;
16320 extern __at(0x0EB3) volatile __CWG3PPSbits_t CWG3PPSbits
;
16322 #define _CWG3PPS0 0x01
16323 #define _CWG3PPS1 0x02
16324 #define _CWG3PPS2 0x04
16325 #define _CWG3PPS3 0x08
16326 #define _CWG3PPS4 0x10
16328 //==============================================================================
16331 //==============================================================================
16334 extern __at(0x0EB8) __sfr MDCARLPPS
;
16340 unsigned MDCARLPPS0
: 1;
16341 unsigned MDCARLPPS1
: 1;
16342 unsigned MDCARLPPS2
: 1;
16343 unsigned MDCARLPPS3
: 1;
16344 unsigned MDCARLPPS4
: 1;
16352 unsigned MDCARLPPS
: 5;
16355 } __MDCARLPPSbits_t
;
16357 extern __at(0x0EB8) volatile __MDCARLPPSbits_t MDCARLPPSbits
;
16359 #define _MDCARLPPS0 0x01
16360 #define _MDCARLPPS1 0x02
16361 #define _MDCARLPPS2 0x04
16362 #define _MDCARLPPS3 0x08
16363 #define _MDCARLPPS4 0x10
16365 //==============================================================================
16368 //==============================================================================
16371 extern __at(0x0EB9) __sfr MDCARHPPS
;
16377 unsigned MDCARHPPS0
: 1;
16378 unsigned MDCARHPPS1
: 1;
16379 unsigned MDCARHPPS2
: 1;
16380 unsigned MDCARHPPS3
: 1;
16381 unsigned MDCARHPPS4
: 1;
16389 unsigned MDCARHPPS
: 5;
16392 } __MDCARHPPSbits_t
;
16394 extern __at(0x0EB9) volatile __MDCARHPPSbits_t MDCARHPPSbits
;
16396 #define _MDCARHPPS0 0x01
16397 #define _MDCARHPPS1 0x02
16398 #define _MDCARHPPS2 0x04
16399 #define _MDCARHPPS3 0x08
16400 #define _MDCARHPPS4 0x10
16402 //==============================================================================
16405 //==============================================================================
16408 extern __at(0x0EBA) __sfr MDSRCPPS
;
16414 unsigned MDSRCPPS0
: 1;
16415 unsigned MDSRCPPS1
: 1;
16416 unsigned MDSRCPPS2
: 1;
16417 unsigned MDSRCPPS3
: 1;
16418 unsigned MDSRCPPS4
: 1;
16426 unsigned MDSRCPPS
: 5;
16429 } __MDSRCPPSbits_t
;
16431 extern __at(0x0EBA) volatile __MDSRCPPSbits_t MDSRCPPSbits
;
16433 #define _MDSRCPPS0 0x01
16434 #define _MDSRCPPS1 0x02
16435 #define _MDSRCPPS2 0x04
16436 #define _MDSRCPPS3 0x08
16437 #define _MDSRCPPS4 0x10
16439 //==============================================================================
16442 //==============================================================================
16445 extern __at(0x0EBB) __sfr CLCIN0PPS
;
16451 unsigned CLCIN0PPS0
: 1;
16452 unsigned CLCIN0PPS1
: 1;
16453 unsigned CLCIN0PPS2
: 1;
16454 unsigned CLCIN0PPS3
: 1;
16455 unsigned CLCIN0PPS4
: 1;
16463 unsigned CLCIN0PPS
: 5;
16466 } __CLCIN0PPSbits_t
;
16468 extern __at(0x0EBB) volatile __CLCIN0PPSbits_t CLCIN0PPSbits
;
16470 #define _CLCIN0PPS0 0x01
16471 #define _CLCIN0PPS1 0x02
16472 #define _CLCIN0PPS2 0x04
16473 #define _CLCIN0PPS3 0x08
16474 #define _CLCIN0PPS4 0x10
16476 //==============================================================================
16479 //==============================================================================
16482 extern __at(0x0EBC) __sfr CLCIN1PPS
;
16488 unsigned CLCIN1PPS0
: 1;
16489 unsigned CLCIN1PPS1
: 1;
16490 unsigned CLCIN1PPS2
: 1;
16491 unsigned CLCIN1PPS3
: 1;
16492 unsigned CLCIN1PPS4
: 1;
16500 unsigned CLCIN1PPS
: 5;
16503 } __CLCIN1PPSbits_t
;
16505 extern __at(0x0EBC) volatile __CLCIN1PPSbits_t CLCIN1PPSbits
;
16507 #define _CLCIN1PPS0 0x01
16508 #define _CLCIN1PPS1 0x02
16509 #define _CLCIN1PPS2 0x04
16510 #define _CLCIN1PPS3 0x08
16511 #define _CLCIN1PPS4 0x10
16513 //==============================================================================
16516 //==============================================================================
16519 extern __at(0x0EBD) __sfr CLCIN2PPS
;
16525 unsigned CLCIN2PPS0
: 1;
16526 unsigned CLCIN2PPS1
: 1;
16527 unsigned CLCIN2PPS2
: 1;
16528 unsigned CLCIN2PPS3
: 1;
16529 unsigned CLCIN2PPS4
: 1;
16537 unsigned CLCIN2PPS
: 5;
16540 } __CLCIN2PPSbits_t
;
16542 extern __at(0x0EBD) volatile __CLCIN2PPSbits_t CLCIN2PPSbits
;
16544 #define _CLCIN2PPS0 0x01
16545 #define _CLCIN2PPS1 0x02
16546 #define _CLCIN2PPS2 0x04
16547 #define _CLCIN2PPS3 0x08
16548 #define _CLCIN2PPS4 0x10
16550 //==============================================================================
16553 //==============================================================================
16556 extern __at(0x0EBE) __sfr CLCIN3PPS
;
16562 unsigned CLCIN3PPS0
: 1;
16563 unsigned CLCIN3PPS1
: 1;
16564 unsigned CLCIN3PPS2
: 1;
16565 unsigned CLCIN3PPS3
: 1;
16566 unsigned CLCIN3PPS4
: 1;
16574 unsigned CLCIN3PPS
: 5;
16577 } __CLCIN3PPSbits_t
;
16579 extern __at(0x0EBE) volatile __CLCIN3PPSbits_t CLCIN3PPSbits
;
16581 #define _CLCIN3PPS0 0x01
16582 #define _CLCIN3PPS1 0x02
16583 #define _CLCIN3PPS2 0x04
16584 #define _CLCIN3PPS3 0x08
16585 #define _CLCIN3PPS4 0x10
16587 //==============================================================================
16590 //==============================================================================
16593 extern __at(0x0EC3) __sfr ADCACTPPS
;
16599 unsigned ADCACTPPS0
: 1;
16600 unsigned ADCACTPPS1
: 1;
16601 unsigned ADCACTPPS2
: 1;
16602 unsigned ADCACTPPS3
: 1;
16603 unsigned ADCACTPPS4
: 1;
16611 unsigned ADCACTPPS
: 5;
16614 } __ADCACTPPSbits_t
;
16616 extern __at(0x0EC3) volatile __ADCACTPPSbits_t ADCACTPPSbits
;
16618 #define _ADCACTPPS0 0x01
16619 #define _ADCACTPPS1 0x02
16620 #define _ADCACTPPS2 0x04
16621 #define _ADCACTPPS3 0x08
16622 #define _ADCACTPPS4 0x10
16624 //==============================================================================
16627 //==============================================================================
16630 extern __at(0x0EC5) __sfr SSP1CLKPPS
;
16636 unsigned SSP1CLKPPS0
: 1;
16637 unsigned SSP1CLKPPS1
: 1;
16638 unsigned SSP1CLKPPS2
: 1;
16639 unsigned SSP1CLKPPS3
: 1;
16640 unsigned SSP1CLKPPS4
: 1;
16648 unsigned SSP1CLKPPS
: 5;
16651 } __SSP1CLKPPSbits_t
;
16653 extern __at(0x0EC5) volatile __SSP1CLKPPSbits_t SSP1CLKPPSbits
;
16655 #define _SSP1CLKPPS0 0x01
16656 #define _SSP1CLKPPS1 0x02
16657 #define _SSP1CLKPPS2 0x04
16658 #define _SSP1CLKPPS3 0x08
16659 #define _SSP1CLKPPS4 0x10
16661 //==============================================================================
16664 //==============================================================================
16667 extern __at(0x0EC6) __sfr SSP1DATPPS
;
16673 unsigned SSP1DATPPS0
: 1;
16674 unsigned SSP1DATPPS1
: 1;
16675 unsigned SSP1DATPPS2
: 1;
16676 unsigned SSP1DATPPS3
: 1;
16677 unsigned SSP1DATPPS4
: 1;
16685 unsigned SSP1DATPPS
: 5;
16688 } __SSP1DATPPSbits_t
;
16690 extern __at(0x0EC6) volatile __SSP1DATPPSbits_t SSP1DATPPSbits
;
16692 #define _SSP1DATPPS0 0x01
16693 #define _SSP1DATPPS1 0x02
16694 #define _SSP1DATPPS2 0x04
16695 #define _SSP1DATPPS3 0x08
16696 #define _SSP1DATPPS4 0x10
16698 //==============================================================================
16701 //==============================================================================
16704 extern __at(0x0EC7) __sfr SSP1SSPPS
;
16710 unsigned SSP1SSPPS0
: 1;
16711 unsigned SSP1SSPPS1
: 1;
16712 unsigned SSP1SSPPS2
: 1;
16713 unsigned SSP1SSPPS3
: 1;
16714 unsigned SSP1SSPPS4
: 1;
16722 unsigned SSP1SSPPS
: 5;
16725 } __SSP1SSPPSbits_t
;
16727 extern __at(0x0EC7) volatile __SSP1SSPPSbits_t SSP1SSPPSbits
;
16729 #define _SSP1SSPPS0 0x01
16730 #define _SSP1SSPPS1 0x02
16731 #define _SSP1SSPPS2 0x04
16732 #define _SSP1SSPPS3 0x08
16733 #define _SSP1SSPPS4 0x10
16735 //==============================================================================
16738 //==============================================================================
16741 extern __at(0x0EC8) __sfr SSP2CLKPPS
;
16747 unsigned SSP2CLKPPS0
: 1;
16748 unsigned SSP2CLKPPS1
: 1;
16749 unsigned SSP2CLKPPS2
: 1;
16750 unsigned SSP2CLKPPS3
: 1;
16751 unsigned SSP2CLKPPS4
: 1;
16759 unsigned SSP2CLKPPS
: 5;
16762 } __SSP2CLKPPSbits_t
;
16764 extern __at(0x0EC8) volatile __SSP2CLKPPSbits_t SSP2CLKPPSbits
;
16766 #define _SSP2CLKPPS0 0x01
16767 #define _SSP2CLKPPS1 0x02
16768 #define _SSP2CLKPPS2 0x04
16769 #define _SSP2CLKPPS3 0x08
16770 #define _SSP2CLKPPS4 0x10
16772 //==============================================================================
16775 //==============================================================================
16778 extern __at(0x0EC9) __sfr SSP2DATPPS
;
16784 unsigned SSP2DATPPS0
: 1;
16785 unsigned SSP2DATPPS1
: 1;
16786 unsigned SSP2DATPPS2
: 1;
16787 unsigned SSP2DATPPS3
: 1;
16788 unsigned SSP2DATPPS4
: 1;
16796 unsigned SSP2DATPPS
: 5;
16799 } __SSP2DATPPSbits_t
;
16801 extern __at(0x0EC9) volatile __SSP2DATPPSbits_t SSP2DATPPSbits
;
16803 #define _SSP2DATPPS0 0x01
16804 #define _SSP2DATPPS1 0x02
16805 #define _SSP2DATPPS2 0x04
16806 #define _SSP2DATPPS3 0x08
16807 #define _SSP2DATPPS4 0x10
16809 //==============================================================================
16812 //==============================================================================
16815 extern __at(0x0ECA) __sfr SSP2SSPPS
;
16821 unsigned SSP2SSPPS0
: 1;
16822 unsigned SSP2SSPPS1
: 1;
16823 unsigned SSP2SSPPS2
: 1;
16824 unsigned SSP2SSPPS3
: 1;
16825 unsigned SSP2SSPPS4
: 1;
16833 unsigned SSP2SSPPS
: 5;
16836 } __SSP2SSPPSbits_t
;
16838 extern __at(0x0ECA) volatile __SSP2SSPPSbits_t SSP2SSPPSbits
;
16840 #define _SSP2SSPPS0 0x01
16841 #define _SSP2SSPPS1 0x02
16842 #define _SSP2SSPPS2 0x04
16843 #define _SSP2SSPPS3 0x08
16844 #define _SSP2SSPPS4 0x10
16846 //==============================================================================
16849 //==============================================================================
16852 extern __at(0x0ECB) __sfr RXPPS
;
16858 unsigned RXPPS0
: 1;
16859 unsigned RXPPS1
: 1;
16860 unsigned RXPPS2
: 1;
16861 unsigned RXPPS3
: 1;
16862 unsigned RXPPS4
: 1;
16870 unsigned RXPPS
: 5;
16875 extern __at(0x0ECB) volatile __RXPPSbits_t RXPPSbits
;
16877 #define _RXPPS0 0x01
16878 #define _RXPPS1 0x02
16879 #define _RXPPS2 0x04
16880 #define _RXPPS3 0x08
16881 #define _RXPPS4 0x10
16883 //==============================================================================
16886 //==============================================================================
16889 extern __at(0x0ECC) __sfr TXPPS
;
16895 unsigned TXPPS0
: 1;
16896 unsigned TXPPS1
: 1;
16897 unsigned TXPPS2
: 1;
16898 unsigned TXPPS3
: 1;
16899 unsigned TXPPS4
: 1;
16907 unsigned TXPPS
: 5;
16912 extern __at(0x0ECC) volatile __TXPPSbits_t TXPPSbits
;
16914 #define _TXPPS0 0x01
16915 #define _TXPPS1 0x02
16916 #define _TXPPS2 0x04
16917 #define _TXPPS3 0x08
16918 #define _TXPPS4 0x10
16920 //==============================================================================
16923 //==============================================================================
16926 extern __at(0x0F10) __sfr RA0PPS
;
16932 unsigned RA0PPS0
: 1;
16933 unsigned RA0PPS1
: 1;
16934 unsigned RA0PPS2
: 1;
16935 unsigned RA0PPS3
: 1;
16936 unsigned RA0PPS4
: 1;
16937 unsigned RA0PPS5
: 1;
16944 unsigned RA0PPS
: 6;
16949 extern __at(0x0F10) volatile __RA0PPSbits_t RA0PPSbits
;
16951 #define _RA0PPS0 0x01
16952 #define _RA0PPS1 0x02
16953 #define _RA0PPS2 0x04
16954 #define _RA0PPS3 0x08
16955 #define _RA0PPS4 0x10
16956 #define _RA0PPS5 0x20
16958 //==============================================================================
16961 //==============================================================================
16964 extern __at(0x0F11) __sfr RA1PPS
;
16970 unsigned RA1PPS0
: 1;
16971 unsigned RA1PPS1
: 1;
16972 unsigned RA1PPS2
: 1;
16973 unsigned RA1PPS3
: 1;
16974 unsigned RA1PPS4
: 1;
16975 unsigned RA1PPS5
: 1;
16982 unsigned RA1PPS
: 6;
16987 extern __at(0x0F11) volatile __RA1PPSbits_t RA1PPSbits
;
16989 #define _RA1PPS0 0x01
16990 #define _RA1PPS1 0x02
16991 #define _RA1PPS2 0x04
16992 #define _RA1PPS3 0x08
16993 #define _RA1PPS4 0x10
16994 #define _RA1PPS5 0x20
16996 //==============================================================================
16999 //==============================================================================
17002 extern __at(0x0F12) __sfr RA2PPS
;
17008 unsigned RA2PPS0
: 1;
17009 unsigned RA2PPS1
: 1;
17010 unsigned RA2PPS2
: 1;
17011 unsigned RA2PPS3
: 1;
17012 unsigned RA2PPS4
: 1;
17013 unsigned RA2PPS5
: 1;
17020 unsigned RA2PPS
: 6;
17025 extern __at(0x0F12) volatile __RA2PPSbits_t RA2PPSbits
;
17027 #define _RA2PPS0 0x01
17028 #define _RA2PPS1 0x02
17029 #define _RA2PPS2 0x04
17030 #define _RA2PPS3 0x08
17031 #define _RA2PPS4 0x10
17032 #define _RA2PPS5 0x20
17034 //==============================================================================
17037 //==============================================================================
17040 extern __at(0x0F13) __sfr RA3PPS
;
17046 unsigned RA3PPS0
: 1;
17047 unsigned RA3PPS1
: 1;
17048 unsigned RA3PPS2
: 1;
17049 unsigned RA3PPS3
: 1;
17050 unsigned RA3PPS4
: 1;
17051 unsigned RA3PPS5
: 1;
17058 unsigned RA3PPS
: 6;
17063 extern __at(0x0F13) volatile __RA3PPSbits_t RA3PPSbits
;
17065 #define _RA3PPS0 0x01
17066 #define _RA3PPS1 0x02
17067 #define _RA3PPS2 0x04
17068 #define _RA3PPS3 0x08
17069 #define _RA3PPS4 0x10
17070 #define _RA3PPS5 0x20
17072 //==============================================================================
17075 //==============================================================================
17078 extern __at(0x0F14) __sfr RA4PPS
;
17084 unsigned RA4PPS0
: 1;
17085 unsigned RA4PPS1
: 1;
17086 unsigned RA4PPS2
: 1;
17087 unsigned RA4PPS3
: 1;
17088 unsigned RA4PPS4
: 1;
17089 unsigned RA4PPS5
: 1;
17096 unsigned RA4PPS
: 6;
17101 extern __at(0x0F14) volatile __RA4PPSbits_t RA4PPSbits
;
17103 #define _RA4PPS0 0x01
17104 #define _RA4PPS1 0x02
17105 #define _RA4PPS2 0x04
17106 #define _RA4PPS3 0x08
17107 #define _RA4PPS4 0x10
17108 #define _RA4PPS5 0x20
17110 //==============================================================================
17113 //==============================================================================
17116 extern __at(0x0F15) __sfr RA5PPS
;
17122 unsigned RA5PPS0
: 1;
17123 unsigned RA5PPS1
: 1;
17124 unsigned RA5PPS2
: 1;
17125 unsigned RA5PPS3
: 1;
17126 unsigned RA5PPS4
: 1;
17127 unsigned RA5PPS5
: 1;
17134 unsigned RA5PPS
: 6;
17139 extern __at(0x0F15) volatile __RA5PPSbits_t RA5PPSbits
;
17141 #define _RA5PPS0 0x01
17142 #define _RA5PPS1 0x02
17143 #define _RA5PPS2 0x04
17144 #define _RA5PPS3 0x08
17145 #define _RA5PPS4 0x10
17146 #define _RA5PPS5 0x20
17148 //==============================================================================
17151 //==============================================================================
17154 extern __at(0x0F16) __sfr RA6PPS
;
17160 unsigned RA6PPS0
: 1;
17161 unsigned RA6PPS1
: 1;
17162 unsigned RA6PPS2
: 1;
17163 unsigned RA6PPS3
: 1;
17164 unsigned RA6PPS4
: 1;
17165 unsigned RA6PPS5
: 1;
17172 unsigned RA6PPS
: 6;
17177 extern __at(0x0F16) volatile __RA6PPSbits_t RA6PPSbits
;
17179 #define _RA6PPS0 0x01
17180 #define _RA6PPS1 0x02
17181 #define _RA6PPS2 0x04
17182 #define _RA6PPS3 0x08
17183 #define _RA6PPS4 0x10
17184 #define _RA6PPS5 0x20
17186 //==============================================================================
17189 //==============================================================================
17192 extern __at(0x0F17) __sfr RA7PPS
;
17198 unsigned RA7PPS0
: 1;
17199 unsigned RA7PPS1
: 1;
17200 unsigned RA7PPS2
: 1;
17201 unsigned RA7PPS3
: 1;
17202 unsigned RA7PPS4
: 1;
17203 unsigned RA7PPS5
: 1;
17210 unsigned RA7PPS
: 6;
17215 extern __at(0x0F17) volatile __RA7PPSbits_t RA7PPSbits
;
17217 #define _RA7PPS0 0x01
17218 #define _RA7PPS1 0x02
17219 #define _RA7PPS2 0x04
17220 #define _RA7PPS3 0x08
17221 #define _RA7PPS4 0x10
17222 #define _RA7PPS5 0x20
17224 //==============================================================================
17227 //==============================================================================
17230 extern __at(0x0F18) __sfr RB0PPS
;
17236 unsigned RB0PPS0
: 1;
17237 unsigned RB0PPS1
: 1;
17238 unsigned RB0PPS2
: 1;
17239 unsigned RB0PPS3
: 1;
17240 unsigned RB0PPS4
: 1;
17241 unsigned RB0PPS5
: 1;
17248 unsigned RB0PPS
: 6;
17253 extern __at(0x0F18) volatile __RB0PPSbits_t RB0PPSbits
;
17255 #define _RB0PPS0 0x01
17256 #define _RB0PPS1 0x02
17257 #define _RB0PPS2 0x04
17258 #define _RB0PPS3 0x08
17259 #define _RB0PPS4 0x10
17260 #define _RB0PPS5 0x20
17262 //==============================================================================
17265 //==============================================================================
17268 extern __at(0x0F19) __sfr RB1PPS
;
17274 unsigned RB1PPS0
: 1;
17275 unsigned RB1PPS1
: 1;
17276 unsigned RB1PPS2
: 1;
17277 unsigned RB1PPS3
: 1;
17278 unsigned RB1PPS4
: 1;
17279 unsigned RB1PPS5
: 1;
17286 unsigned RB1PPS
: 6;
17291 extern __at(0x0F19) volatile __RB1PPSbits_t RB1PPSbits
;
17293 #define _RB1PPS0 0x01
17294 #define _RB1PPS1 0x02
17295 #define _RB1PPS2 0x04
17296 #define _RB1PPS3 0x08
17297 #define _RB1PPS4 0x10
17298 #define _RB1PPS5 0x20
17300 //==============================================================================
17303 //==============================================================================
17306 extern __at(0x0F1A) __sfr RB2PPS
;
17312 unsigned RB2PPS0
: 1;
17313 unsigned RB2PPS1
: 1;
17314 unsigned RB2PPS2
: 1;
17315 unsigned RB2PPS3
: 1;
17316 unsigned RB2PPS4
: 1;
17317 unsigned RB2PPS5
: 1;
17324 unsigned RB2PPS
: 6;
17329 extern __at(0x0F1A) volatile __RB2PPSbits_t RB2PPSbits
;
17331 #define _RB2PPS0 0x01
17332 #define _RB2PPS1 0x02
17333 #define _RB2PPS2 0x04
17334 #define _RB2PPS3 0x08
17335 #define _RB2PPS4 0x10
17336 #define _RB2PPS5 0x20
17338 //==============================================================================
17341 //==============================================================================
17344 extern __at(0x0F1B) __sfr RB3PPS
;
17350 unsigned RB3PPS0
: 1;
17351 unsigned RB3PPS1
: 1;
17352 unsigned RB3PPS2
: 1;
17353 unsigned RB3PPS3
: 1;
17354 unsigned RB3PPS4
: 1;
17355 unsigned RB3PPS5
: 1;
17362 unsigned RB3PPS
: 6;
17367 extern __at(0x0F1B) volatile __RB3PPSbits_t RB3PPSbits
;
17369 #define _RB3PPS0 0x01
17370 #define _RB3PPS1 0x02
17371 #define _RB3PPS2 0x04
17372 #define _RB3PPS3 0x08
17373 #define _RB3PPS4 0x10
17374 #define _RB3PPS5 0x20
17376 //==============================================================================
17379 //==============================================================================
17382 extern __at(0x0F1C) __sfr RB4PPS
;
17388 unsigned RB4PPS0
: 1;
17389 unsigned RB4PPS1
: 1;
17390 unsigned RB4PPS2
: 1;
17391 unsigned RB4PPS3
: 1;
17392 unsigned RB4PPS4
: 1;
17393 unsigned RB4PPS5
: 1;
17400 unsigned RB4PPS
: 6;
17405 extern __at(0x0F1C) volatile __RB4PPSbits_t RB4PPSbits
;
17407 #define _RB4PPS0 0x01
17408 #define _RB4PPS1 0x02
17409 #define _RB4PPS2 0x04
17410 #define _RB4PPS3 0x08
17411 #define _RB4PPS4 0x10
17412 #define _RB4PPS5 0x20
17414 //==============================================================================
17417 //==============================================================================
17420 extern __at(0x0F1D) __sfr RB5PPS
;
17426 unsigned RB5PPS0
: 1;
17427 unsigned RB5PPS1
: 1;
17428 unsigned RB5PPS2
: 1;
17429 unsigned RB5PPS3
: 1;
17430 unsigned RB5PPS4
: 1;
17431 unsigned RB5PPS5
: 1;
17438 unsigned RB5PPS
: 6;
17443 extern __at(0x0F1D) volatile __RB5PPSbits_t RB5PPSbits
;
17445 #define _RB5PPS0 0x01
17446 #define _RB5PPS1 0x02
17447 #define _RB5PPS2 0x04
17448 #define _RB5PPS3 0x08
17449 #define _RB5PPS4 0x10
17450 #define _RB5PPS5 0x20
17452 //==============================================================================
17455 //==============================================================================
17458 extern __at(0x0F1E) __sfr RB6PPS
;
17464 unsigned RB6PPS0
: 1;
17465 unsigned RB6PPS1
: 1;
17466 unsigned RB6PPS2
: 1;
17467 unsigned RB6PPS3
: 1;
17468 unsigned RB6PPS4
: 1;
17469 unsigned RB6PPS5
: 1;
17476 unsigned RB6PPS
: 6;
17481 extern __at(0x0F1E) volatile __RB6PPSbits_t RB6PPSbits
;
17483 #define _RB6PPS0 0x01
17484 #define _RB6PPS1 0x02
17485 #define _RB6PPS2 0x04
17486 #define _RB6PPS3 0x08
17487 #define _RB6PPS4 0x10
17488 #define _RB6PPS5 0x20
17490 //==============================================================================
17493 //==============================================================================
17496 extern __at(0x0F1F) __sfr RB7PPS
;
17502 unsigned RB7PPS0
: 1;
17503 unsigned RB7PPS1
: 1;
17504 unsigned RB7PPS2
: 1;
17505 unsigned RB7PPS3
: 1;
17506 unsigned RB7PPS4
: 1;
17507 unsigned RB7PPS5
: 1;
17514 unsigned RB7PPS
: 6;
17519 extern __at(0x0F1F) volatile __RB7PPSbits_t RB7PPSbits
;
17521 #define _RB7PPS0 0x01
17522 #define _RB7PPS1 0x02
17523 #define _RB7PPS2 0x04
17524 #define _RB7PPS3 0x08
17525 #define _RB7PPS4 0x10
17526 #define _RB7PPS5 0x20
17528 //==============================================================================
17531 //==============================================================================
17534 extern __at(0x0F20) __sfr RC0PPS
;
17540 unsigned RC0PPS0
: 1;
17541 unsigned RC0PPS1
: 1;
17542 unsigned RC0PPS2
: 1;
17543 unsigned RC0PPS3
: 1;
17544 unsigned RC0PPS4
: 1;
17545 unsigned RC0PPS5
: 1;
17552 unsigned RC0PPS
: 6;
17557 extern __at(0x0F20) volatile __RC0PPSbits_t RC0PPSbits
;
17559 #define _RC0PPS0 0x01
17560 #define _RC0PPS1 0x02
17561 #define _RC0PPS2 0x04
17562 #define _RC0PPS3 0x08
17563 #define _RC0PPS4 0x10
17564 #define _RC0PPS5 0x20
17566 //==============================================================================
17569 //==============================================================================
17572 extern __at(0x0F21) __sfr RC1PPS
;
17578 unsigned RC1PPS0
: 1;
17579 unsigned RC1PPS1
: 1;
17580 unsigned RC1PPS2
: 1;
17581 unsigned RC1PPS3
: 1;
17582 unsigned RC1PPS4
: 1;
17583 unsigned RC1PPS5
: 1;
17590 unsigned RC1PPS
: 6;
17595 extern __at(0x0F21) volatile __RC1PPSbits_t RC1PPSbits
;
17597 #define _RC1PPS0 0x01
17598 #define _RC1PPS1 0x02
17599 #define _RC1PPS2 0x04
17600 #define _RC1PPS3 0x08
17601 #define _RC1PPS4 0x10
17602 #define _RC1PPS5 0x20
17604 //==============================================================================
17607 //==============================================================================
17610 extern __at(0x0F22) __sfr RC2PPS
;
17616 unsigned RC2PPS0
: 1;
17617 unsigned RC2PPS1
: 1;
17618 unsigned RC2PPS2
: 1;
17619 unsigned RC2PPS3
: 1;
17620 unsigned RC2PPS4
: 1;
17621 unsigned RC2PPS5
: 1;
17628 unsigned RC2PPS
: 6;
17633 extern __at(0x0F22) volatile __RC2PPSbits_t RC2PPSbits
;
17635 #define _RC2PPS0 0x01
17636 #define _RC2PPS1 0x02
17637 #define _RC2PPS2 0x04
17638 #define _RC2PPS3 0x08
17639 #define _RC2PPS4 0x10
17640 #define _RC2PPS5 0x20
17642 //==============================================================================
17645 //==============================================================================
17648 extern __at(0x0F23) __sfr RC3PPS
;
17654 unsigned RC3PPS0
: 1;
17655 unsigned RC3PPS1
: 1;
17656 unsigned RC3PPS2
: 1;
17657 unsigned RC3PPS3
: 1;
17658 unsigned RC3PPS4
: 1;
17659 unsigned RC3PPS5
: 1;
17666 unsigned RC3PPS
: 6;
17671 extern __at(0x0F23) volatile __RC3PPSbits_t RC3PPSbits
;
17673 #define _RC3PPS0 0x01
17674 #define _RC3PPS1 0x02
17675 #define _RC3PPS2 0x04
17676 #define _RC3PPS3 0x08
17677 #define _RC3PPS4 0x10
17678 #define _RC3PPS5 0x20
17680 //==============================================================================
17683 //==============================================================================
17686 extern __at(0x0F24) __sfr RC4PPS
;
17692 unsigned RC4PPS0
: 1;
17693 unsigned RC4PPS1
: 1;
17694 unsigned RC4PPS2
: 1;
17695 unsigned RC4PPS3
: 1;
17696 unsigned RC4PPS4
: 1;
17697 unsigned RC4PPS5
: 1;
17704 unsigned RC4PPS
: 6;
17709 extern __at(0x0F24) volatile __RC4PPSbits_t RC4PPSbits
;
17711 #define _RC4PPS0 0x01
17712 #define _RC4PPS1 0x02
17713 #define _RC4PPS2 0x04
17714 #define _RC4PPS3 0x08
17715 #define _RC4PPS4 0x10
17716 #define _RC4PPS5 0x20
17718 //==============================================================================
17721 //==============================================================================
17724 extern __at(0x0F25) __sfr RC5PPS
;
17730 unsigned RC5PPS0
: 1;
17731 unsigned RC5PPS1
: 1;
17732 unsigned RC5PPS2
: 1;
17733 unsigned RC5PPS3
: 1;
17734 unsigned RC5PPS4
: 1;
17735 unsigned RC5PPS5
: 1;
17742 unsigned RC5PPS
: 6;
17747 extern __at(0x0F25) volatile __RC5PPSbits_t RC5PPSbits
;
17749 #define _RC5PPS0 0x01
17750 #define _RC5PPS1 0x02
17751 #define _RC5PPS2 0x04
17752 #define _RC5PPS3 0x08
17753 #define _RC5PPS4 0x10
17754 #define _RC5PPS5 0x20
17756 //==============================================================================
17759 //==============================================================================
17762 extern __at(0x0F26) __sfr RC6PPS
;
17768 unsigned RC6PPS0
: 1;
17769 unsigned RC6PPS1
: 1;
17770 unsigned RC6PPS2
: 1;
17771 unsigned RC6PPS3
: 1;
17772 unsigned RC6PPS4
: 1;
17773 unsigned RC6PPS5
: 1;
17780 unsigned RC6PPS
: 6;
17785 extern __at(0x0F26) volatile __RC6PPSbits_t RC6PPSbits
;
17787 #define _RC6PPS0 0x01
17788 #define _RC6PPS1 0x02
17789 #define _RC6PPS2 0x04
17790 #define _RC6PPS3 0x08
17791 #define _RC6PPS4 0x10
17792 #define _RC6PPS5 0x20
17794 //==============================================================================
17797 //==============================================================================
17800 extern __at(0x0F27) __sfr RC7PPS
;
17806 unsigned RC7PPS0
: 1;
17807 unsigned RC7PPS1
: 1;
17808 unsigned RC7PPS2
: 1;
17809 unsigned RC7PPS3
: 1;
17810 unsigned RC7PPS4
: 1;
17811 unsigned RC7PPS5
: 1;
17818 unsigned RC7PPS
: 6;
17823 extern __at(0x0F27) volatile __RC7PPSbits_t RC7PPSbits
;
17825 #define _RC7PPS0 0x01
17826 #define _RC7PPS1 0x02
17827 #define _RC7PPS2 0x04
17828 #define _RC7PPS3 0x08
17829 #define _RC7PPS4 0x10
17830 #define _RC7PPS5 0x20
17832 //==============================================================================
17835 //==============================================================================
17838 extern __at(0x0F28) __sfr RD0PPS
;
17844 unsigned RD0PPS0
: 1;
17845 unsigned RD0PPS1
: 1;
17846 unsigned RD0PPS2
: 1;
17847 unsigned RD0PPS3
: 1;
17848 unsigned RD0PPS4
: 1;
17849 unsigned RD0PPS5
: 1;
17856 unsigned RD0PPS
: 6;
17861 extern __at(0x0F28) volatile __RD0PPSbits_t RD0PPSbits
;
17863 #define _RD0PPS0 0x01
17864 #define _RD0PPS1 0x02
17865 #define _RD0PPS2 0x04
17866 #define _RD0PPS3 0x08
17867 #define _RD0PPS4 0x10
17868 #define _RD0PPS5 0x20
17870 //==============================================================================
17873 //==============================================================================
17876 extern __at(0x0F29) __sfr RD1PPS
;
17882 unsigned RD1PPS0
: 1;
17883 unsigned RD1PPS1
: 1;
17884 unsigned RD1PPS2
: 1;
17885 unsigned RD1PPS3
: 1;
17886 unsigned RD1PPS4
: 1;
17887 unsigned RD1PPS5
: 1;
17894 unsigned RD1PPS
: 6;
17899 extern __at(0x0F29) volatile __RD1PPSbits_t RD1PPSbits
;
17901 #define _RD1PPS0 0x01
17902 #define _RD1PPS1 0x02
17903 #define _RD1PPS2 0x04
17904 #define _RD1PPS3 0x08
17905 #define _RD1PPS4 0x10
17906 #define _RD1PPS5 0x20
17908 //==============================================================================
17911 //==============================================================================
17914 extern __at(0x0F2A) __sfr RD2PPS
;
17920 unsigned RD2PPS0
: 1;
17921 unsigned RD2PPS1
: 1;
17922 unsigned RD2PPS2
: 1;
17923 unsigned RD2PPS3
: 1;
17924 unsigned RD2PPS4
: 1;
17925 unsigned RD2PPS5
: 1;
17932 unsigned RD2PPS
: 6;
17937 extern __at(0x0F2A) volatile __RD2PPSbits_t RD2PPSbits
;
17939 #define _RD2PPS0 0x01
17940 #define _RD2PPS1 0x02
17941 #define _RD2PPS2 0x04
17942 #define _RD2PPS3 0x08
17943 #define _RD2PPS4 0x10
17944 #define _RD2PPS5 0x20
17946 //==============================================================================
17949 //==============================================================================
17952 extern __at(0x0F2B) __sfr RD3PPS
;
17958 unsigned RD3PPS0
: 1;
17959 unsigned RD3PPS1
: 1;
17960 unsigned RD3PPS2
: 1;
17961 unsigned RD3PPS3
: 1;
17962 unsigned RD3PPS4
: 1;
17963 unsigned RD3PPS5
: 1;
17970 unsigned RD3PPS
: 6;
17975 extern __at(0x0F2B) volatile __RD3PPSbits_t RD3PPSbits
;
17977 #define _RD3PPS0 0x01
17978 #define _RD3PPS1 0x02
17979 #define _RD3PPS2 0x04
17980 #define _RD3PPS3 0x08
17981 #define _RD3PPS4 0x10
17982 #define _RD3PPS5 0x20
17984 //==============================================================================
17987 //==============================================================================
17990 extern __at(0x0F2C) __sfr RD4PPS
;
17996 unsigned RD4PPS0
: 1;
17997 unsigned RD4PPS1
: 1;
17998 unsigned RD4PPS2
: 1;
17999 unsigned RD4PPS3
: 1;
18000 unsigned RD4PPS4
: 1;
18001 unsigned RD4PPS5
: 1;
18008 unsigned RD4PPS
: 6;
18013 extern __at(0x0F2C) volatile __RD4PPSbits_t RD4PPSbits
;
18015 #define _RD4PPS0 0x01
18016 #define _RD4PPS1 0x02
18017 #define _RD4PPS2 0x04
18018 #define _RD4PPS3 0x08
18019 #define _RD4PPS4 0x10
18020 #define _RD4PPS5 0x20
18022 //==============================================================================
18025 //==============================================================================
18028 extern __at(0x0F2D) __sfr RD5PPS
;
18034 unsigned RD5PPS0
: 1;
18035 unsigned RD5PPS1
: 1;
18036 unsigned RD5PPS2
: 1;
18037 unsigned RD5PPS3
: 1;
18038 unsigned RD5PPS4
: 1;
18039 unsigned RD5PPS5
: 1;
18046 unsigned RD5PPS
: 6;
18051 extern __at(0x0F2D) volatile __RD5PPSbits_t RD5PPSbits
;
18053 #define _RD5PPS0 0x01
18054 #define _RD5PPS1 0x02
18055 #define _RD5PPS2 0x04
18056 #define _RD5PPS3 0x08
18057 #define _RD5PPS4 0x10
18058 #define _RD5PPS5 0x20
18060 //==============================================================================
18063 //==============================================================================
18066 extern __at(0x0F2E) __sfr RD6PPS
;
18072 unsigned RD6PPS0
: 1;
18073 unsigned RD6PPS1
: 1;
18074 unsigned RD6PPS2
: 1;
18075 unsigned RD6PPS3
: 1;
18076 unsigned RD6PPS4
: 1;
18077 unsigned RD6PPS5
: 1;
18084 unsigned RD6PPS
: 6;
18089 extern __at(0x0F2E) volatile __RD6PPSbits_t RD6PPSbits
;
18091 #define _RD6PPS0 0x01
18092 #define _RD6PPS1 0x02
18093 #define _RD6PPS2 0x04
18094 #define _RD6PPS3 0x08
18095 #define _RD6PPS4 0x10
18096 #define _RD6PPS5 0x20
18098 //==============================================================================
18101 //==============================================================================
18104 extern __at(0x0F2F) __sfr RD7PPS
;
18110 unsigned RD7PPS0
: 1;
18111 unsigned RD7PPS1
: 1;
18112 unsigned RD7PPS2
: 1;
18113 unsigned RD7PPS3
: 1;
18114 unsigned RD7PPS4
: 1;
18115 unsigned RD7PPS5
: 1;
18122 unsigned RD7PPS
: 6;
18127 extern __at(0x0F2F) volatile __RD7PPSbits_t RD7PPSbits
;
18129 #define _RD7PPS0 0x01
18130 #define _RD7PPS1 0x02
18131 #define _RD7PPS2 0x04
18132 #define _RD7PPS3 0x08
18133 #define _RD7PPS4 0x10
18134 #define _RD7PPS5 0x20
18136 //==============================================================================
18139 //==============================================================================
18142 extern __at(0x0F30) __sfr RE0PPS
;
18148 unsigned RE0PPS0
: 1;
18149 unsigned RE0PPS1
: 1;
18150 unsigned RE0PPS2
: 1;
18151 unsigned RE0PPS3
: 1;
18152 unsigned RE0PPS4
: 1;
18153 unsigned RE0PPS5
: 1;
18160 unsigned RE0PPS
: 6;
18165 extern __at(0x0F30) volatile __RE0PPSbits_t RE0PPSbits
;
18167 #define _RE0PPS0 0x01
18168 #define _RE0PPS1 0x02
18169 #define _RE0PPS2 0x04
18170 #define _RE0PPS3 0x08
18171 #define _RE0PPS4 0x10
18172 #define _RE0PPS5 0x20
18174 //==============================================================================
18177 //==============================================================================
18180 extern __at(0x0F31) __sfr RE1PPS
;
18186 unsigned RE1PPS0
: 1;
18187 unsigned RE1PPS1
: 1;
18188 unsigned RE1PPS2
: 1;
18189 unsigned RE1PPS3
: 1;
18190 unsigned RE1PPS4
: 1;
18191 unsigned RE1PPS5
: 1;
18198 unsigned RE1PPS
: 6;
18203 extern __at(0x0F31) volatile __RE1PPSbits_t RE1PPSbits
;
18205 #define _RE1PPS0 0x01
18206 #define _RE1PPS1 0x02
18207 #define _RE1PPS2 0x04
18208 #define _RE1PPS3 0x08
18209 #define _RE1PPS4 0x10
18210 #define _RE1PPS5 0x20
18212 //==============================================================================
18215 //==============================================================================
18218 extern __at(0x0F32) __sfr RE2PPS
;
18224 unsigned RE2PPS0
: 1;
18225 unsigned RE2PPS1
: 1;
18226 unsigned RE2PPS2
: 1;
18227 unsigned RE2PPS3
: 1;
18228 unsigned RE2PPS4
: 1;
18229 unsigned RE2PPS5
: 1;
18236 unsigned RE2PPS
: 6;
18241 extern __at(0x0F32) volatile __RE2PPSbits_t RE2PPSbits
;
18243 #define _RE2PPS0 0x01
18244 #define _RE2PPS1 0x02
18245 #define _RE2PPS2 0x04
18246 #define _RE2PPS3 0x08
18247 #define _RE2PPS4 0x10
18248 #define _RE2PPS5 0x20
18250 //==============================================================================
18253 //==============================================================================
18256 extern __at(0x0F38) __sfr ANSELA
;
18260 unsigned ANSA0
: 1;
18261 unsigned ANSA1
: 1;
18262 unsigned ANSA2
: 1;
18263 unsigned ANSA3
: 1;
18264 unsigned ANSA4
: 1;
18265 unsigned ANSA5
: 1;
18266 unsigned ANSA6
: 1;
18267 unsigned ANSA7
: 1;
18270 extern __at(0x0F38) volatile __ANSELAbits_t ANSELAbits
;
18272 #define _ANSA0 0x01
18273 #define _ANSA1 0x02
18274 #define _ANSA2 0x04
18275 #define _ANSA3 0x08
18276 #define _ANSA4 0x10
18277 #define _ANSA5 0x20
18278 #define _ANSA6 0x40
18279 #define _ANSA7 0x80
18281 //==============================================================================
18284 //==============================================================================
18287 extern __at(0x0F39) __sfr WPUA
;
18291 unsigned WPUA0
: 1;
18292 unsigned WPUA1
: 1;
18293 unsigned WPUA2
: 1;
18294 unsigned WPUA3
: 1;
18295 unsigned WPUA4
: 1;
18296 unsigned WPUA5
: 1;
18297 unsigned WPUA6
: 1;
18298 unsigned WPUA7
: 1;
18301 extern __at(0x0F39) volatile __WPUAbits_t WPUAbits
;
18303 #define _WPUA0 0x01
18304 #define _WPUA1 0x02
18305 #define _WPUA2 0x04
18306 #define _WPUA3 0x08
18307 #define _WPUA4 0x10
18308 #define _WPUA5 0x20
18309 #define _WPUA6 0x40
18310 #define _WPUA7 0x80
18312 //==============================================================================
18315 //==============================================================================
18318 extern __at(0x0F3A) __sfr ODCONA
;
18322 unsigned ODCA0
: 1;
18323 unsigned ODCA1
: 1;
18324 unsigned ODCA2
: 1;
18325 unsigned ODCA3
: 1;
18326 unsigned ODCA4
: 1;
18327 unsigned ODCA5
: 1;
18328 unsigned ODCA6
: 1;
18329 unsigned ODCA7
: 1;
18332 extern __at(0x0F3A) volatile __ODCONAbits_t ODCONAbits
;
18334 #define _ODCA0 0x01
18335 #define _ODCA1 0x02
18336 #define _ODCA2 0x04
18337 #define _ODCA3 0x08
18338 #define _ODCA4 0x10
18339 #define _ODCA5 0x20
18340 #define _ODCA6 0x40
18341 #define _ODCA7 0x80
18343 //==============================================================================
18346 //==============================================================================
18349 extern __at(0x0F3B) __sfr SLRCONA
;
18353 unsigned SLRA0
: 1;
18354 unsigned SLRA1
: 1;
18355 unsigned SLRA2
: 1;
18356 unsigned SLRA3
: 1;
18357 unsigned SLRA4
: 1;
18358 unsigned SLRA5
: 1;
18359 unsigned SLRA6
: 1;
18360 unsigned SLRA7
: 1;
18363 extern __at(0x0F3B) volatile __SLRCONAbits_t SLRCONAbits
;
18365 #define _SLRA0 0x01
18366 #define _SLRA1 0x02
18367 #define _SLRA2 0x04
18368 #define _SLRA3 0x08
18369 #define _SLRA4 0x10
18370 #define _SLRA5 0x20
18371 #define _SLRA6 0x40
18372 #define _SLRA7 0x80
18374 //==============================================================================
18377 //==============================================================================
18380 extern __at(0x0F3C) __sfr INLVLA
;
18384 unsigned INLVLA0
: 1;
18385 unsigned INLVLA1
: 1;
18386 unsigned INLVLA2
: 1;
18387 unsigned INLVLA3
: 1;
18388 unsigned INLVLA4
: 1;
18389 unsigned INLVLA5
: 1;
18390 unsigned INLVLA6
: 1;
18391 unsigned INLVLA7
: 1;
18394 extern __at(0x0F3C) volatile __INLVLAbits_t INLVLAbits
;
18396 #define _INLVLA0 0x01
18397 #define _INLVLA1 0x02
18398 #define _INLVLA2 0x04
18399 #define _INLVLA3 0x08
18400 #define _INLVLA4 0x10
18401 #define _INLVLA5 0x20
18402 #define _INLVLA6 0x40
18403 #define _INLVLA7 0x80
18405 //==============================================================================
18408 //==============================================================================
18411 extern __at(0x0F3D) __sfr IOCAP
;
18415 unsigned IOCAP0
: 1;
18416 unsigned IOCAP1
: 1;
18417 unsigned IOCAP2
: 1;
18418 unsigned IOCAP3
: 1;
18419 unsigned IOCAP4
: 1;
18420 unsigned IOCAP5
: 1;
18421 unsigned IOCAP6
: 1;
18422 unsigned IOCAP7
: 1;
18425 extern __at(0x0F3D) volatile __IOCAPbits_t IOCAPbits
;
18427 #define _IOCAP0 0x01
18428 #define _IOCAP1 0x02
18429 #define _IOCAP2 0x04
18430 #define _IOCAP3 0x08
18431 #define _IOCAP4 0x10
18432 #define _IOCAP5 0x20
18433 #define _IOCAP6 0x40
18434 #define _IOCAP7 0x80
18436 //==============================================================================
18439 //==============================================================================
18442 extern __at(0x0F3E) __sfr IOCAN
;
18446 unsigned IOCAN0
: 1;
18447 unsigned IOCAN1
: 1;
18448 unsigned IOCAN2
: 1;
18449 unsigned IOCAN3
: 1;
18450 unsigned IOCAN4
: 1;
18451 unsigned IOCAN5
: 1;
18452 unsigned IOCAN6
: 1;
18453 unsigned IOCAN7
: 1;
18456 extern __at(0x0F3E) volatile __IOCANbits_t IOCANbits
;
18458 #define _IOCAN0 0x01
18459 #define _IOCAN1 0x02
18460 #define _IOCAN2 0x04
18461 #define _IOCAN3 0x08
18462 #define _IOCAN4 0x10
18463 #define _IOCAN5 0x20
18464 #define _IOCAN6 0x40
18465 #define _IOCAN7 0x80
18467 //==============================================================================
18470 //==============================================================================
18473 extern __at(0x0F3F) __sfr IOCAF
;
18477 unsigned IOCAF0
: 1;
18478 unsigned IOCAF1
: 1;
18479 unsigned IOCAF2
: 1;
18480 unsigned IOCAF3
: 1;
18481 unsigned IOCAF4
: 1;
18482 unsigned IOCAF5
: 1;
18483 unsigned IOCAF6
: 1;
18484 unsigned IOCAF7
: 1;
18487 extern __at(0x0F3F) volatile __IOCAFbits_t IOCAFbits
;
18489 #define _IOCAF0 0x01
18490 #define _IOCAF1 0x02
18491 #define _IOCAF2 0x04
18492 #define _IOCAF3 0x08
18493 #define _IOCAF4 0x10
18494 #define _IOCAF5 0x20
18495 #define _IOCAF6 0x40
18496 #define _IOCAF7 0x80
18498 //==============================================================================
18501 //==============================================================================
18504 extern __at(0x0F40) __sfr CCDNA
;
18508 unsigned CCDNA0
: 1;
18509 unsigned CCDNA1
: 1;
18510 unsigned CCDNA2
: 1;
18511 unsigned CCDNA3
: 1;
18512 unsigned CCDNA4
: 1;
18513 unsigned CCDNA5
: 1;
18514 unsigned CCDNA6
: 1;
18515 unsigned CCDNA7
: 1;
18518 extern __at(0x0F40) volatile __CCDNAbits_t CCDNAbits
;
18520 #define _CCDNA0 0x01
18521 #define _CCDNA1 0x02
18522 #define _CCDNA2 0x04
18523 #define _CCDNA3 0x08
18524 #define _CCDNA4 0x10
18525 #define _CCDNA5 0x20
18526 #define _CCDNA6 0x40
18527 #define _CCDNA7 0x80
18529 //==============================================================================
18532 //==============================================================================
18535 extern __at(0x0F41) __sfr CCDPA
;
18539 unsigned CCDPA0
: 1;
18540 unsigned CCDPA1
: 1;
18541 unsigned CCDPA2
: 1;
18542 unsigned CCDPA3
: 1;
18543 unsigned CCDPA4
: 1;
18544 unsigned CCDPA5
: 1;
18545 unsigned CCDPA6
: 1;
18546 unsigned CCDPA7
: 1;
18549 extern __at(0x0F41) volatile __CCDPAbits_t CCDPAbits
;
18551 #define _CCDPA0 0x01
18552 #define _CCDPA1 0x02
18553 #define _CCDPA2 0x04
18554 #define _CCDPA3 0x08
18555 #define _CCDPA4 0x10
18556 #define _CCDPA5 0x20
18557 #define _CCDPA6 0x40
18558 #define _CCDPA7 0x80
18560 //==============================================================================
18563 //==============================================================================
18566 extern __at(0x0F43) __sfr ANSELB
;
18570 unsigned ANSB0
: 1;
18571 unsigned ANSB1
: 1;
18572 unsigned ANSB2
: 1;
18573 unsigned ANSB3
: 1;
18574 unsigned ANSB4
: 1;
18575 unsigned ANSB5
: 1;
18576 unsigned ANSB6
: 1;
18577 unsigned ANSB7
: 1;
18580 extern __at(0x0F43) volatile __ANSELBbits_t ANSELBbits
;
18582 #define _ANSB0 0x01
18583 #define _ANSB1 0x02
18584 #define _ANSB2 0x04
18585 #define _ANSB3 0x08
18586 #define _ANSB4 0x10
18587 #define _ANSB5 0x20
18588 #define _ANSB6 0x40
18589 #define _ANSB7 0x80
18591 //==============================================================================
18594 //==============================================================================
18597 extern __at(0x0F44) __sfr WPUB
;
18601 unsigned WPUB0
: 1;
18602 unsigned WPUB1
: 1;
18603 unsigned WPUB2
: 1;
18604 unsigned WPUB3
: 1;
18605 unsigned WPUB4
: 1;
18606 unsigned WPUB5
: 1;
18607 unsigned WPUB6
: 1;
18608 unsigned WPUB7
: 1;
18611 extern __at(0x0F44) volatile __WPUBbits_t WPUBbits
;
18613 #define _WPUB0 0x01
18614 #define _WPUB1 0x02
18615 #define _WPUB2 0x04
18616 #define _WPUB3 0x08
18617 #define _WPUB4 0x10
18618 #define _WPUB5 0x20
18619 #define _WPUB6 0x40
18620 #define _WPUB7 0x80
18622 //==============================================================================
18625 //==============================================================================
18628 extern __at(0x0F45) __sfr ODCONB
;
18632 unsigned ODCB0
: 1;
18633 unsigned ODCB1
: 1;
18634 unsigned ODCB2
: 1;
18635 unsigned ODCB3
: 1;
18636 unsigned ODCB4
: 1;
18637 unsigned ODCB5
: 1;
18638 unsigned ODCB6
: 1;
18639 unsigned ODCB7
: 1;
18642 extern __at(0x0F45) volatile __ODCONBbits_t ODCONBbits
;
18644 #define _ODCB0 0x01
18645 #define _ODCB1 0x02
18646 #define _ODCB2 0x04
18647 #define _ODCB3 0x08
18648 #define _ODCB4 0x10
18649 #define _ODCB5 0x20
18650 #define _ODCB6 0x40
18651 #define _ODCB7 0x80
18653 //==============================================================================
18656 //==============================================================================
18659 extern __at(0x0F46) __sfr SLRCONB
;
18663 unsigned SLRB0
: 1;
18664 unsigned SLRB1
: 1;
18665 unsigned SLRB2
: 1;
18666 unsigned SLRB3
: 1;
18667 unsigned SLRB4
: 1;
18668 unsigned SLRB5
: 1;
18669 unsigned SLRB6
: 1;
18670 unsigned SLRB7
: 1;
18673 extern __at(0x0F46) volatile __SLRCONBbits_t SLRCONBbits
;
18675 #define _SLRB0 0x01
18676 #define _SLRB1 0x02
18677 #define _SLRB2 0x04
18678 #define _SLRB3 0x08
18679 #define _SLRB4 0x10
18680 #define _SLRB5 0x20
18681 #define _SLRB6 0x40
18682 #define _SLRB7 0x80
18684 //==============================================================================
18687 //==============================================================================
18690 extern __at(0x0F47) __sfr INLVLB
;
18694 unsigned INLVLB0
: 1;
18695 unsigned INLVLB1
: 1;
18696 unsigned INLVLB2
: 1;
18697 unsigned INLVLB3
: 1;
18698 unsigned INLVLB4
: 1;
18699 unsigned INLVLB5
: 1;
18700 unsigned INLVLB6
: 1;
18701 unsigned INLVLB7
: 1;
18704 extern __at(0x0F47) volatile __INLVLBbits_t INLVLBbits
;
18706 #define _INLVLB0 0x01
18707 #define _INLVLB1 0x02
18708 #define _INLVLB2 0x04
18709 #define _INLVLB3 0x08
18710 #define _INLVLB4 0x10
18711 #define _INLVLB5 0x20
18712 #define _INLVLB6 0x40
18713 #define _INLVLB7 0x80
18715 //==============================================================================
18718 //==============================================================================
18721 extern __at(0x0F48) __sfr IOCBP
;
18725 unsigned IOCBP0
: 1;
18726 unsigned IOCBP1
: 1;
18727 unsigned IOCBP2
: 1;
18728 unsigned IOCBP3
: 1;
18729 unsigned IOCBP4
: 1;
18730 unsigned IOCBP5
: 1;
18731 unsigned IOCBP6
: 1;
18732 unsigned IOCBP7
: 1;
18735 extern __at(0x0F48) volatile __IOCBPbits_t IOCBPbits
;
18737 #define _IOCBP0 0x01
18738 #define _IOCBP1 0x02
18739 #define _IOCBP2 0x04
18740 #define _IOCBP3 0x08
18741 #define _IOCBP4 0x10
18742 #define _IOCBP5 0x20
18743 #define _IOCBP6 0x40
18744 #define _IOCBP7 0x80
18746 //==============================================================================
18749 //==============================================================================
18752 extern __at(0x0F49) __sfr IOCBN
;
18756 unsigned IOCBN0
: 1;
18757 unsigned IOCBN1
: 1;
18758 unsigned IOCBN2
: 1;
18759 unsigned IOCBN3
: 1;
18760 unsigned IOCBN4
: 1;
18761 unsigned IOCBN5
: 1;
18762 unsigned IOCBN6
: 1;
18763 unsigned IOCBN7
: 1;
18766 extern __at(0x0F49) volatile __IOCBNbits_t IOCBNbits
;
18768 #define _IOCBN0 0x01
18769 #define _IOCBN1 0x02
18770 #define _IOCBN2 0x04
18771 #define _IOCBN3 0x08
18772 #define _IOCBN4 0x10
18773 #define _IOCBN5 0x20
18774 #define _IOCBN6 0x40
18775 #define _IOCBN7 0x80
18777 //==============================================================================
18780 //==============================================================================
18783 extern __at(0x0F4A) __sfr IOCBF
;
18787 unsigned IOCBF0
: 1;
18788 unsigned IOCBF1
: 1;
18789 unsigned IOCBF2
: 1;
18790 unsigned IOCBF3
: 1;
18791 unsigned IOCBF4
: 1;
18792 unsigned IOCBF5
: 1;
18793 unsigned IOCBF6
: 1;
18794 unsigned IOCBF7
: 1;
18797 extern __at(0x0F4A) volatile __IOCBFbits_t IOCBFbits
;
18799 #define _IOCBF0 0x01
18800 #define _IOCBF1 0x02
18801 #define _IOCBF2 0x04
18802 #define _IOCBF3 0x08
18803 #define _IOCBF4 0x10
18804 #define _IOCBF5 0x20
18805 #define _IOCBF6 0x40
18806 #define _IOCBF7 0x80
18808 //==============================================================================
18811 //==============================================================================
18814 extern __at(0x0F4B) __sfr CCDNB
;
18818 unsigned CCDNB0
: 1;
18819 unsigned CCDNB1
: 1;
18820 unsigned CCDNB2
: 1;
18821 unsigned CCDNB3
: 1;
18822 unsigned CCDNB4
: 1;
18823 unsigned CCDNB5
: 1;
18824 unsigned CCDNB6
: 1;
18825 unsigned CCDNB7
: 1;
18828 extern __at(0x0F4B) volatile __CCDNBbits_t CCDNBbits
;
18830 #define _CCDNB0 0x01
18831 #define _CCDNB1 0x02
18832 #define _CCDNB2 0x04
18833 #define _CCDNB3 0x08
18834 #define _CCDNB4 0x10
18835 #define _CCDNB5 0x20
18836 #define _CCDNB6 0x40
18837 #define _CCDNB7 0x80
18839 //==============================================================================
18842 //==============================================================================
18845 extern __at(0x0F4C) __sfr CCDPB
;
18849 unsigned CCDPB0
: 1;
18850 unsigned CCDPB1
: 1;
18851 unsigned CCDPB2
: 1;
18852 unsigned CCDPB3
: 1;
18853 unsigned CCDPB4
: 1;
18854 unsigned CCDPB5
: 1;
18855 unsigned CCDPB6
: 1;
18856 unsigned CCDPB7
: 1;
18859 extern __at(0x0F4C) volatile __CCDPBbits_t CCDPBbits
;
18861 #define _CCDPB0 0x01
18862 #define _CCDPB1 0x02
18863 #define _CCDPB2 0x04
18864 #define _CCDPB3 0x08
18865 #define _CCDPB4 0x10
18866 #define _CCDPB5 0x20
18867 #define _CCDPB6 0x40
18868 #define _CCDPB7 0x80
18870 //==============================================================================
18873 //==============================================================================
18876 extern __at(0x0F4E) __sfr ANSELC
;
18880 unsigned ANSC0
: 1;
18881 unsigned ANSC1
: 1;
18882 unsigned ANSC2
: 1;
18883 unsigned ANSC3
: 1;
18884 unsigned ANSC4
: 1;
18885 unsigned ANSC5
: 1;
18886 unsigned ANSC6
: 1;
18887 unsigned ANSC7
: 1;
18890 extern __at(0x0F4E) volatile __ANSELCbits_t ANSELCbits
;
18892 #define _ANSC0 0x01
18893 #define _ANSC1 0x02
18894 #define _ANSC2 0x04
18895 #define _ANSC3 0x08
18896 #define _ANSC4 0x10
18897 #define _ANSC5 0x20
18898 #define _ANSC6 0x40
18899 #define _ANSC7 0x80
18901 //==============================================================================
18904 //==============================================================================
18907 extern __at(0x0F4F) __sfr WPUC
;
18911 unsigned WPUC0
: 1;
18912 unsigned WPUC1
: 1;
18913 unsigned WPUC2
: 1;
18914 unsigned WPUC3
: 1;
18915 unsigned WPUC4
: 1;
18916 unsigned WPUC5
: 1;
18917 unsigned WPUC6
: 1;
18918 unsigned WPUC7
: 1;
18921 extern __at(0x0F4F) volatile __WPUCbits_t WPUCbits
;
18923 #define _WPUC0 0x01
18924 #define _WPUC1 0x02
18925 #define _WPUC2 0x04
18926 #define _WPUC3 0x08
18927 #define _WPUC4 0x10
18928 #define _WPUC5 0x20
18929 #define _WPUC6 0x40
18930 #define _WPUC7 0x80
18932 //==============================================================================
18935 //==============================================================================
18938 extern __at(0x0F50) __sfr ODCONC
;
18942 unsigned ODCC0
: 1;
18943 unsigned ODCC1
: 1;
18944 unsigned ODCC2
: 1;
18945 unsigned ODCC3
: 1;
18946 unsigned ODCC4
: 1;
18947 unsigned ODCC5
: 1;
18948 unsigned ODCC6
: 1;
18949 unsigned ODCC7
: 1;
18952 extern __at(0x0F50) volatile __ODCONCbits_t ODCONCbits
;
18954 #define _ODCC0 0x01
18955 #define _ODCC1 0x02
18956 #define _ODCC2 0x04
18957 #define _ODCC3 0x08
18958 #define _ODCC4 0x10
18959 #define _ODCC5 0x20
18960 #define _ODCC6 0x40
18961 #define _ODCC7 0x80
18963 //==============================================================================
18966 //==============================================================================
18969 extern __at(0x0F51) __sfr SLRCONC
;
18973 unsigned SLRC0
: 1;
18974 unsigned SLRC1
: 1;
18975 unsigned SLRC2
: 1;
18976 unsigned SLRC3
: 1;
18977 unsigned SLRC4
: 1;
18978 unsigned SLRC5
: 1;
18979 unsigned SLRC6
: 1;
18980 unsigned SLRC7
: 1;
18983 extern __at(0x0F51) volatile __SLRCONCbits_t SLRCONCbits
;
18985 #define _SLRC0 0x01
18986 #define _SLRC1 0x02
18987 #define _SLRC2 0x04
18988 #define _SLRC3 0x08
18989 #define _SLRC4 0x10
18990 #define _SLRC5 0x20
18991 #define _SLRC6 0x40
18992 #define _SLRC7 0x80
18994 //==============================================================================
18997 //==============================================================================
19000 extern __at(0x0F52) __sfr INLVLC
;
19004 unsigned INLVLC0
: 1;
19005 unsigned INLVLC1
: 1;
19006 unsigned INLVLC2
: 1;
19007 unsigned INLVLC3
: 1;
19008 unsigned INLVLC4
: 1;
19009 unsigned INLVLC5
: 1;
19010 unsigned INLVLC6
: 1;
19011 unsigned INLVLC7
: 1;
19014 extern __at(0x0F52) volatile __INLVLCbits_t INLVLCbits
;
19016 #define _INLVLC0 0x01
19017 #define _INLVLC1 0x02
19018 #define _INLVLC2 0x04
19019 #define _INLVLC3 0x08
19020 #define _INLVLC4 0x10
19021 #define _INLVLC5 0x20
19022 #define _INLVLC6 0x40
19023 #define _INLVLC7 0x80
19025 //==============================================================================
19028 //==============================================================================
19031 extern __at(0x0F53) __sfr IOCCP
;
19035 unsigned IOCCP0
: 1;
19036 unsigned IOCCP1
: 1;
19037 unsigned IOCCP2
: 1;
19038 unsigned IOCCP3
: 1;
19039 unsigned IOCCP4
: 1;
19040 unsigned IOCCP5
: 1;
19041 unsigned IOCCP6
: 1;
19042 unsigned IOCCP7
: 1;
19045 extern __at(0x0F53) volatile __IOCCPbits_t IOCCPbits
;
19047 #define _IOCCP0 0x01
19048 #define _IOCCP1 0x02
19049 #define _IOCCP2 0x04
19050 #define _IOCCP3 0x08
19051 #define _IOCCP4 0x10
19052 #define _IOCCP5 0x20
19053 #define _IOCCP6 0x40
19054 #define _IOCCP7 0x80
19056 //==============================================================================
19059 //==============================================================================
19062 extern __at(0x0F54) __sfr IOCCN
;
19066 unsigned IOCCN0
: 1;
19067 unsigned IOCCN1
: 1;
19068 unsigned IOCCN2
: 1;
19069 unsigned IOCCN3
: 1;
19070 unsigned IOCCN4
: 1;
19071 unsigned IOCCN5
: 1;
19072 unsigned IOCCN6
: 1;
19073 unsigned IOCCN7
: 1;
19076 extern __at(0x0F54) volatile __IOCCNbits_t IOCCNbits
;
19078 #define _IOCCN0 0x01
19079 #define _IOCCN1 0x02
19080 #define _IOCCN2 0x04
19081 #define _IOCCN3 0x08
19082 #define _IOCCN4 0x10
19083 #define _IOCCN5 0x20
19084 #define _IOCCN6 0x40
19085 #define _IOCCN7 0x80
19087 //==============================================================================
19090 //==============================================================================
19093 extern __at(0x0F55) __sfr IOCCF
;
19097 unsigned IOCCF0
: 1;
19098 unsigned IOCCF1
: 1;
19099 unsigned IOCCF2
: 1;
19100 unsigned IOCCF3
: 1;
19101 unsigned IOCCF4
: 1;
19102 unsigned IOCCF5
: 1;
19103 unsigned IOCCF6
: 1;
19104 unsigned IOCCF7
: 1;
19107 extern __at(0x0F55) volatile __IOCCFbits_t IOCCFbits
;
19109 #define _IOCCF0 0x01
19110 #define _IOCCF1 0x02
19111 #define _IOCCF2 0x04
19112 #define _IOCCF3 0x08
19113 #define _IOCCF4 0x10
19114 #define _IOCCF5 0x20
19115 #define _IOCCF6 0x40
19116 #define _IOCCF7 0x80
19118 //==============================================================================
19121 //==============================================================================
19124 extern __at(0x0F56) __sfr CCDNC
;
19128 unsigned CCDNC0
: 1;
19129 unsigned CCDNC1
: 1;
19130 unsigned CCDNC2
: 1;
19131 unsigned CCDNC3
: 1;
19132 unsigned CCDNC4
: 1;
19133 unsigned CCDNC5
: 1;
19134 unsigned CCDNC6
: 1;
19135 unsigned CCDNC7
: 1;
19138 extern __at(0x0F56) volatile __CCDNCbits_t CCDNCbits
;
19140 #define _CCDNC0 0x01
19141 #define _CCDNC1 0x02
19142 #define _CCDNC2 0x04
19143 #define _CCDNC3 0x08
19144 #define _CCDNC4 0x10
19145 #define _CCDNC5 0x20
19146 #define _CCDNC6 0x40
19147 #define _CCDNC7 0x80
19149 //==============================================================================
19152 //==============================================================================
19155 extern __at(0x0F57) __sfr CCDPC
;
19159 unsigned CCDPC0
: 1;
19160 unsigned CCDPC1
: 1;
19161 unsigned CCDPC2
: 1;
19162 unsigned CCDPC3
: 1;
19163 unsigned CCDPC4
: 1;
19164 unsigned CCDPC5
: 1;
19165 unsigned CCDPC6
: 1;
19166 unsigned CCDPC7
: 1;
19169 extern __at(0x0F57) volatile __CCDPCbits_t CCDPCbits
;
19171 #define _CCDPC0 0x01
19172 #define _CCDPC1 0x02
19173 #define _CCDPC2 0x04
19174 #define _CCDPC3 0x08
19175 #define _CCDPC4 0x10
19176 #define _CCDPC5 0x20
19177 #define _CCDPC6 0x40
19178 #define _CCDPC7 0x80
19180 //==============================================================================
19183 //==============================================================================
19186 extern __at(0x0F59) __sfr ANSELD
;
19190 unsigned ANSD0
: 1;
19191 unsigned ANSD1
: 1;
19192 unsigned ANSD2
: 1;
19193 unsigned ANSD3
: 1;
19194 unsigned ANSD4
: 1;
19195 unsigned ANSD5
: 1;
19196 unsigned ANSD6
: 1;
19197 unsigned ANSD7
: 1;
19200 extern __at(0x0F59) volatile __ANSELDbits_t ANSELDbits
;
19202 #define _ANSD0 0x01
19203 #define _ANSD1 0x02
19204 #define _ANSD2 0x04
19205 #define _ANSD3 0x08
19206 #define _ANSD4 0x10
19207 #define _ANSD5 0x20
19208 #define _ANSD6 0x40
19209 #define _ANSD7 0x80
19211 //==============================================================================
19214 //==============================================================================
19217 extern __at(0x0F5A) __sfr WPUD
;
19221 unsigned WPUD0
: 1;
19222 unsigned WPUD1
: 1;
19223 unsigned WPUD2
: 1;
19224 unsigned WPUD3
: 1;
19225 unsigned WPUD4
: 1;
19226 unsigned WPUD5
: 1;
19227 unsigned WPUD6
: 1;
19228 unsigned WPUD7
: 1;
19231 extern __at(0x0F5A) volatile __WPUDbits_t WPUDbits
;
19233 #define _WPUD0 0x01
19234 #define _WPUD1 0x02
19235 #define _WPUD2 0x04
19236 #define _WPUD3 0x08
19237 #define _WPUD4 0x10
19238 #define _WPUD5 0x20
19239 #define _WPUD6 0x40
19240 #define _WPUD7 0x80
19242 //==============================================================================
19245 //==============================================================================
19248 extern __at(0x0F5B) __sfr ODCOND
;
19252 unsigned ODCD0
: 1;
19253 unsigned ODCD1
: 1;
19254 unsigned ODCD2
: 1;
19255 unsigned ODCD3
: 1;
19256 unsigned ODCD4
: 1;
19257 unsigned ODCD5
: 1;
19258 unsigned ODCD6
: 1;
19259 unsigned ODCD7
: 1;
19262 extern __at(0x0F5B) volatile __ODCONDbits_t ODCONDbits
;
19264 #define _ODCD0 0x01
19265 #define _ODCD1 0x02
19266 #define _ODCD2 0x04
19267 #define _ODCD3 0x08
19268 #define _ODCD4 0x10
19269 #define _ODCD5 0x20
19270 #define _ODCD6 0x40
19271 #define _ODCD7 0x80
19273 //==============================================================================
19276 //==============================================================================
19279 extern __at(0x0F5C) __sfr SLRCOND
;
19283 unsigned SLRD0
: 1;
19284 unsigned SLRD1
: 1;
19285 unsigned SLRD2
: 1;
19286 unsigned SLRD3
: 1;
19287 unsigned SLRD4
: 1;
19288 unsigned SLRD5
: 1;
19289 unsigned SLRD6
: 1;
19290 unsigned SLRD7
: 1;
19293 extern __at(0x0F5C) volatile __SLRCONDbits_t SLRCONDbits
;
19295 #define _SLRD0 0x01
19296 #define _SLRD1 0x02
19297 #define _SLRD2 0x04
19298 #define _SLRD3 0x08
19299 #define _SLRD4 0x10
19300 #define _SLRD5 0x20
19301 #define _SLRD6 0x40
19302 #define _SLRD7 0x80
19304 //==============================================================================
19307 //==============================================================================
19310 extern __at(0x0F5D) __sfr INLVLD
;
19314 unsigned INLVLD0
: 1;
19315 unsigned INLVLD1
: 1;
19316 unsigned INLVLD2
: 1;
19317 unsigned INLVLD3
: 1;
19318 unsigned INLVLD4
: 1;
19319 unsigned INLVLD5
: 1;
19320 unsigned INLVLD6
: 1;
19321 unsigned INLVLD7
: 1;
19324 extern __at(0x0F5D) volatile __INLVLDbits_t INLVLDbits
;
19326 #define _INLVLD0 0x01
19327 #define _INLVLD1 0x02
19328 #define _INLVLD2 0x04
19329 #define _INLVLD3 0x08
19330 #define _INLVLD4 0x10
19331 #define _INLVLD5 0x20
19332 #define _INLVLD6 0x40
19333 #define _INLVLD7 0x80
19335 //==============================================================================
19338 //==============================================================================
19341 extern __at(0x0F61) __sfr CCDND
;
19345 unsigned CCDND0
: 1;
19346 unsigned CCDND1
: 1;
19347 unsigned CCDND2
: 1;
19348 unsigned CCDND3
: 1;
19349 unsigned CCDND4
: 1;
19350 unsigned CCDND5
: 1;
19351 unsigned CCDND6
: 1;
19352 unsigned CCDND7
: 1;
19355 extern __at(0x0F61) volatile __CCDNDbits_t CCDNDbits
;
19357 #define _CCDND0 0x01
19358 #define _CCDND1 0x02
19359 #define _CCDND2 0x04
19360 #define _CCDND3 0x08
19361 #define _CCDND4 0x10
19362 #define _CCDND5 0x20
19363 #define _CCDND6 0x40
19364 #define _CCDND7 0x80
19366 //==============================================================================
19369 //==============================================================================
19372 extern __at(0x0F62) __sfr CCDPD
;
19376 unsigned CCDPD0
: 1;
19377 unsigned CCDPD1
: 1;
19378 unsigned CCDPD2
: 1;
19379 unsigned CCDPD3
: 1;
19380 unsigned CCDPD4
: 1;
19381 unsigned CCDPD5
: 1;
19382 unsigned CCDPD6
: 1;
19383 unsigned CCDPD7
: 1;
19386 extern __at(0x0F62) volatile __CCDPDbits_t CCDPDbits
;
19388 #define _CCDPD0 0x01
19389 #define _CCDPD1 0x02
19390 #define _CCDPD2 0x04
19391 #define _CCDPD3 0x08
19392 #define _CCDPD4 0x10
19393 #define _CCDPD5 0x20
19394 #define _CCDPD6 0x40
19395 #define _CCDPD7 0x80
19397 //==============================================================================
19400 //==============================================================================
19403 extern __at(0x0F64) __sfr ANSELE
;
19409 unsigned ANSE0
: 1;
19410 unsigned ANSE1
: 1;
19411 unsigned ANSE2
: 1;
19426 extern __at(0x0F64) volatile __ANSELEbits_t ANSELEbits
;
19428 #define _ANSE0 0x01
19429 #define _ANSE1 0x02
19430 #define _ANSE2 0x04
19432 //==============================================================================
19435 //==============================================================================
19438 extern __at(0x0F65) __sfr WPUE
;
19444 unsigned WPUE0
: 1;
19445 unsigned WPUE1
: 1;
19446 unsigned WPUE2
: 1;
19447 unsigned WPUE3
: 1;
19461 extern __at(0x0F65) volatile __WPUEbits_t WPUEbits
;
19463 #define _WPUE0 0x01
19464 #define _WPUE1 0x02
19465 #define _WPUE2 0x04
19466 #define _WPUE3 0x08
19468 //==============================================================================
19471 //==============================================================================
19474 extern __at(0x0F66) __sfr ODCONE
;
19480 unsigned ODCE0
: 1;
19481 unsigned ODCE1
: 1;
19482 unsigned ODCE2
: 1;
19497 extern __at(0x0F66) volatile __ODCONEbits_t ODCONEbits
;
19499 #define _ODCE0 0x01
19500 #define _ODCE1 0x02
19501 #define _ODCE2 0x04
19503 //==============================================================================
19506 //==============================================================================
19509 extern __at(0x0F67) __sfr SLRCONE
;
19515 unsigned SLRE0
: 1;
19516 unsigned SLRE1
: 1;
19517 unsigned SLRE2
: 1;
19532 extern __at(0x0F67) volatile __SLRCONEbits_t SLRCONEbits
;
19534 #define _SLRE0 0x01
19535 #define _SLRE1 0x02
19536 #define _SLRE2 0x04
19538 //==============================================================================
19541 //==============================================================================
19544 extern __at(0x0F68) __sfr INLVLE
;
19550 unsigned INLVLE0
: 1;
19551 unsigned INLVLE1
: 1;
19552 unsigned INLVLE2
: 1;
19553 unsigned INLVLE3
: 1;
19562 unsigned INLVLE
: 4;
19567 extern __at(0x0F68) volatile __INLVLEbits_t INLVLEbits
;
19569 #define _INLVLE0 0x01
19570 #define _INLVLE1 0x02
19571 #define _INLVLE2 0x04
19572 #define _INLVLE3 0x08
19574 //==============================================================================
19577 //==============================================================================
19580 extern __at(0x0F69) __sfr IOCEP
;
19587 unsigned IOCEP3
: 1;
19594 extern __at(0x0F69) volatile __IOCEPbits_t IOCEPbits
;
19596 #define _IOCEP3 0x08
19598 //==============================================================================
19601 //==============================================================================
19604 extern __at(0x0F6A) __sfr IOCEN
;
19611 unsigned IOCEN3
: 1;
19618 extern __at(0x0F6A) volatile __IOCENbits_t IOCENbits
;
19620 #define _IOCEN3 0x08
19622 //==============================================================================
19625 //==============================================================================
19628 extern __at(0x0F6B) __sfr IOCEF
;
19635 unsigned IOCEF3
: 1;
19642 extern __at(0x0F6B) volatile __IOCEFbits_t IOCEFbits
;
19644 #define _IOCEF3 0x08
19646 //==============================================================================
19649 //==============================================================================
19652 extern __at(0x0F6C) __sfr CCDNE
;
19658 unsigned CCDNE0
: 1;
19659 unsigned CCDNE1
: 1;
19660 unsigned CCDNE2
: 1;
19670 unsigned CCDNE
: 3;
19675 extern __at(0x0F6C) volatile __CCDNEbits_t CCDNEbits
;
19677 #define _CCDNE0 0x01
19678 #define _CCDNE1 0x02
19679 #define _CCDNE2 0x04
19681 //==============================================================================
19684 //==============================================================================
19687 extern __at(0x0F6D) __sfr CCDPE
;
19693 unsigned CCDPE0
: 1;
19694 unsigned CCDPE1
: 1;
19695 unsigned CCDPE2
: 1;
19705 unsigned CCDPE
: 3;
19710 extern __at(0x0F6D) volatile __CCDPEbits_t CCDPEbits
;
19712 #define _CCDPE0 0x01
19713 #define _CCDPE1 0x02
19714 #define _CCDPE2 0x04
19716 //==============================================================================
19719 //==============================================================================
19720 // STATUS_SHAD Bits
19722 extern __at(0x0FE4) __sfr STATUS_SHAD
;
19726 unsigned C_SHAD
: 1;
19727 unsigned DC_SHAD
: 1;
19728 unsigned Z_SHAD
: 1;
19734 } __STATUS_SHADbits_t
;
19736 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
19738 #define _C_SHAD 0x01
19739 #define _DC_SHAD 0x02
19740 #define _Z_SHAD 0x04
19742 //==============================================================================
19744 extern __at(0x0FE5) __sfr WREG_SHAD
;
19745 extern __at(0x0FE6) __sfr BSR_SHAD
;
19746 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
19747 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
19748 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
19749 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
19750 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
19751 extern __at(0x0FED) __sfr STKPTR
;
19752 extern __at(0x0FEE) __sfr TOSL
;
19753 extern __at(0x0FEF) __sfr TOSH
;
19755 //==============================================================================
19757 // Configuration Bits
19759 //==============================================================================
19761 #define _CONFIG1 0x8007
19762 #define _CONFIG2 0x8008
19763 #define _CONFIG3 0x8009
19764 #define _CONFIG4 0x800A
19765 #define _CONFIG5 0x800B
19767 //----------------------------- CONFIG1 Options -------------------------------
19769 #define _FEXTOSC_LP 0x3FF8 // LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power.
19770 #define _FEXTOSC_XT 0x3FF9 // XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power.
19771 #define _FEXTOSC_HS 0x3FFA // HS (crystal oscillator) above 4MHz; PFM set to high power.
19772 #define _FEXTOSC_Reserved 0x3FFB // Reserved.
19773 #define _FEXTOSC_OFF 0x3FFC // Oscillator not enabled.
19774 #define _FEXTOSC_ECL 0x3FFD // EC below 500kHz; PFM set to low power.
19775 #define _FEXTOSC_ECM 0x3FFE // EC for 500kHz to 8MHz; PFM set to medium power.
19776 #define _FEXTOSC_ECH 0x3FFF // EC above 8MHz; PFM set to high power.
19777 #define _RSTOSC_HFINT32 0x3F8F // HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1.
19778 #define _RSTOSC_HFINTPLL 0x3F9F // HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz).
19779 #define _RSTOSC_EXT4X 0x3FAF // EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits.
19780 #define _RSTOSC_Reserved 0x3FBF // Reserved.
19781 #define _RSTOSC_SOSC 0x3FCF // SOSC.
19782 #define _RSTOSC_LFINT 0x3FDF // LFINTOSC.
19783 #define _RSTOSC_HFINT1 0x3FEF // HFINTOSC (1MHz).
19784 #define _RSTOSC_EXT1X 0x3FFF // EXTOSC operating per FEXTOSC bits.
19785 #define _CLKOUTEN_ON 0x3EFF // CLKOUT function is enabled; FOSC/4 clock appears at OSC2.
19786 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled; i/o or oscillator function on OSC2.
19787 #define _CSWEN_OFF 0x37FF // The NOSC and NDIV bits cannot be changed by user software.
19788 #define _CSWEN_ON 0x3FFF // Writing to NOSC and NDIV is allowed.
19789 #define _FCMEN_OFF 0x1FFF // FSCM timer disabled.
19790 #define _FCMEN_ON 0x3FFF // FSCM timer enabled.
19792 //----------------------------- CONFIG2 Options -------------------------------
19794 #define _MCLRE_OFF 0x3FFE // MCLR pin function is port defined function.
19795 #define _MCLRE_ON 0x3FFF // MCLR pin is Master Clear function.
19796 #define _PWRTE_ON 0x3FFD // PWRT enabled.
19797 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
19798 #define _LPBOREN_ON 0x3FDF // ULPBOR enabled.
19799 #define _LPBOREN_OFF 0x3FFF // ULPBOR disabled.
19800 #define _BOREN_OFF 0x3F3F // Brown-out reset disabled.
19801 #define _BOREN_SBOREN 0x3F7F // Brown-out reset enabled according to SBOREN bit.
19802 #define _BOREN_NSLEEP 0x3FBF // Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored.
19803 #define _BOREN_ON 0x3FFF // Brown-out Reset Enabled, SBOREN bit is ignored.
19804 #define _BORV_HI 0x3DFF // Brown-out Reset Voltage (VBOR) is set to 2.7V.
19805 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices.
19806 #define _ZCD_OFF 0x3BFF // Zero-cross detect circuit is always enabled.
19807 #define _ZCD_ON 0x3FFF // Zero-cross detect circuit is disabled at POR.
19808 #define _ZCDDIS_OFF 0x3BFF // Zero-cross detect circuit is always enabled.
19809 #define _ZCDDIS_ON 0x3FFF // Zero-cross detect circuit is disabled at POR.
19810 #define _PPS1WAY_OFF 0x37FF // The PPSLOCK bit can be set and cleared repeatedly by software.
19811 #define _PPS1WAY_ON 0x3FFF // The PPSLOCK bit can be cleared and set only once in software.
19812 #define _STVREN_OFF 0x2FFF // Stack Overflow or Underflow will not cause a reset.
19813 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a reset.
19814 #define _DEBUG_ON 0x1FFF // Background debugger enabled; ICSPCLK and ICSPDAT are dedicated to the debugger.
19815 #define _DEBUG_OFF 0x3FFF // Background debugger disabled; ICSPCLK and ICSPDAT are general purpose I/O pins.
19817 //----------------------------- CONFIG3 Options -------------------------------
19819 #define _WDTCPS_WDTCPS_0 0x3FE0 // Divider ratio 1:32.
19820 #define _WDTCPS_WDTCPS_1 0x3FE1 // Divider ratio 1:64.
19821 #define _WDTCPS_WDTCPS_2 0x3FE2 // Divider ratio 1:128.
19822 #define _WDTCPS_WDTCPS_3 0x3FE3 // Divider ratio 1:256.
19823 #define _WDTCPS_WDTCPS_4 0x3FE4 // Divider ratio 1:512.
19824 #define _WDTCPS_WDTCPS_5 0x3FE5 // Divider ratio 1:1024.
19825 #define _WDTCPS_WDTCPS_6 0x3FE6 // Divider ratio 1:2048.
19826 #define _WDTCPS_WDTCPS_7 0x3FE7 // Divider ratio 1:4096.
19827 #define _WDTCPS_WDTCPS_8 0x3FE8 // Divider ratio 1:8192.
19828 #define _WDTCPS_WDTCPS_9 0x3FE9 // Divider ratio 1:16384.
19829 #define _WDTCPS_WDTCPS_10 0x3FEA // Divider ratio 1:32768.
19830 #define _WDTCPS_WDTCPS_11 0x3FEB // Divider ratio 1:65536.
19831 #define _WDTCPS_WDTCPS_12 0x3FEC // Divider ratio 1:131072.
19832 #define _WDTCPS_WDTCPS_13 0x3FED // Divider ratio 1:262144.
19833 #define _WDTCPS_WDTCPS_14 0x3FEE // Divider ratio 1:524299.
19834 #define _WDTCPS_WDTCPS_15 0x3FEF // Divider ratio 1:1048576.
19835 #define _WDTCPS_WDTCPS_16 0x3FF0 // Divider ratio 1:2097152.
19836 #define _WDTCPS_WDTCPS_17 0x3FF1 // Divider ratio 1:4194304.
19837 #define _WDTCPS_WDTCPS_18 0x3FF2 // Divider ratio 1:8388608.
19838 #define _WDTCPS_WDTCPS_19 0x3FF3 // Divider ratio 1:32.
19839 #define _WDTCPS_WDTCPS_20 0x3FF4 // Divider ratio 1:32.
19840 #define _WDTCPS_WDTCPS_21 0x3FF5 // Divider ratio 1:32.
19841 #define _WDTCPS_WDTCPS_22 0x3FF6 // Divider ratio 1:32.
19842 #define _WDTCPS_WDTCPS_23 0x3FF7 // Divider ratio 1:32.
19843 #define _WDTCPS_WDTCPS_24 0x3FF8 // Divider ratio 1:32.
19844 #define _WDTCPS_WDTCPS_25 0x3FF9 // Divider ratio 1:32.
19845 #define _WDTCPS_WDTCPS_26 0x3FFA // Divider ratio 1:32.
19846 #define _WDTCPS_WDTCPS_27 0x3FFB // Divider ratio 1:32.
19847 #define _WDTCPS_WDTCPS_28 0x3FFC // Divider ratio 1:32.
19848 #define _WDTCPS_WDTCPS_29 0x3FFD // Divider ratio 1:32.
19849 #define _WDTCPS_WDTCPS_30 0x3FFE // Divider ratio 1:32.
19850 #define _WDTCPS_WDTCPS_31 0x3FFF // Divider ratio 1:65536; software control of WDTPS.
19851 #define _WDTE_OFF 0x3F9F // WDT Disabled, SWDTEN is ignored.
19852 #define _WDTE_SWDTEN 0x3FBF // WDT enabled/disabled by SWDTEN bit in WDTCON0.
19853 #define _WDTE_NSLEEP 0x3FDF // WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored.
19854 #define _WDTE_ON 0x3FFF // WDT enabled regardless of sleep; SWDTEN ignored.
19855 #define _WDTCWS_WDTCWS_0 0x38FF // window delay = 87.5 percent of time; no software control; keyed access required.
19856 #define _WDTCWS_WDTCWS_1 0x39FF // window delay = 75 percent of time; no software control; keyed access required.
19857 #define _WDTCWS_WDTCWS_2 0x3AFF // window delay = 62.5 percent of time; no software control; keyed access required.
19858 #define _WDTCWS_WDTCWS_3 0x3BFF // window delay = 50 percent of time; no software control; keyed access required.
19859 #define _WDTCWS_WDTCWS_4 0x3CFF // window delay = 37.5 percent of time; no software control; keyed access required.
19860 #define _WDTCWS_WDTCWS_5 0x3DFF // window delay = 25 percent of time; no software control; keyed access required.
19861 #define _WDTCWS_WDTCWS_6 0x3EFF // window always open (100%); no software control; keyed access required.
19862 #define _WDTCWS_WDTCWS_7 0x3FFF // window always open (100%); software control; keyed access not required.
19863 #define _WDTCCS_LFINTOSC 0x07FF // WDT reference clock is the 31.0kHz LFINTOSC output.
19864 #define _WDTCCS_HFINTOSC 0x0FFF // WDT reference clock is the 31.25 kHz HFINTOSC.
19865 #define _WDTCCS_SC 0x3FFF // Software Control.
19867 //----------------------------- CONFIG4 Options -------------------------------
19869 #define _WRT_ON 0x3FFC // 0x0000 to 0x1FFF write protected.
19870 #define _WRT_WRT_lower 0x3FFD // 0x0000 to x0FFF write protected.
19871 #define _WRT_WRT_upper 0x3FFE // 0x0000 to 0x01FF write protected.
19872 #define _WRT_OFF 0x3FFF // Write protection off.
19873 #define _SCANE_not_available 0x2FFF // Scanner module is not available for use.
19874 #define _SCANE_available 0x3FFF // Scanner module is available for use.
19875 #define _LVP_OFF 0x1FFF // High Voltage on MCLR/Vpp must be used for programming.
19876 #define _LVP_ON 0x3FFF // Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.
19878 //----------------------------- CONFIG5 Options -------------------------------
19880 #define _CP_ON 0x3FFE // UserNVM code protection enabled.
19881 #define _CP_OFF 0x3FFF // UserNVM code protection disabled.
19882 #define _CPD_ON 0x3FFD // DataNVM code protection enabled.
19883 #define _CPD_OFF 0x3FFF // DataNVM code protection disabled.
19885 //==============================================================================
19887 #define _DEVID1 0x8006
19889 #define _IDLOC0 0x8000
19890 #define _IDLOC1 0x8001
19891 #define _IDLOC2 0x8002
19892 #define _IDLOC3 0x8003
19894 //==============================================================================
19896 #ifndef NO_BIT_DEFINES
19898 #define ADACC8 ADACCHbits.ADACC8 // bit 0
19899 #define ADACC9 ADACCHbits.ADACC9 // bit 1
19900 #define ADACC10 ADACCHbits.ADACC10 // bit 2
19901 #define ADACC11 ADACCHbits.ADACC11 // bit 3
19902 #define ADACC12 ADACCHbits.ADACC12 // bit 4
19903 #define ADACC13 ADACCHbits.ADACC13 // bit 5
19904 #define ADACC14 ADACCHbits.ADACC14 // bit 6
19905 #define ADACC15 ADACCHbits.ADACC15 // bit 7
19907 #define ADACC0 ADACCLbits.ADACC0 // bit 0
19908 #define ADACC1 ADACCLbits.ADACC1 // bit 1
19909 #define ADACC2 ADACCLbits.ADACC2 // bit 2
19910 #define ADACC3 ADACCLbits.ADACC3 // bit 3
19911 #define ADACC4 ADACCLbits.ADACC4 // bit 4
19912 #define ADACC5 ADACCLbits.ADACC5 // bit 5
19913 #define ADACC6 ADACCLbits.ADACC6 // bit 6
19914 #define ADACC7 ADACCLbits.ADACC7 // bit 7
19916 #define ADACQ0 ADACQbits.ADACQ0 // bit 0
19917 #define ADACQ1 ADACQbits.ADACQ1 // bit 1
19918 #define ADACQ2 ADACQbits.ADACQ2 // bit 2
19919 #define ADACQ3 ADACQbits.ADACQ3 // bit 3
19920 #define ADACQ4 ADACQbits.ADACQ4 // bit 4
19921 #define ADACQ5 ADACQbits.ADACQ5 // bit 5
19922 #define ADACQ6 ADACQbits.ADACQ6 // bit 6
19923 #define ADACQ7 ADACQbits.ADACQ7 // bit 7
19925 #define ADACT0 ADACTbits.ADACT0 // bit 0
19926 #define ADACT1 ADACTbits.ADACT1 // bit 1
19927 #define ADACT2 ADACTbits.ADACT2 // bit 2
19928 #define ADACT3 ADACTbits.ADACT3 // bit 3
19929 #define ADACT4 ADACTbits.ADACT4 // bit 4
19931 #define ADCACTPPS0 ADCACTPPSbits.ADCACTPPS0 // bit 0
19932 #define ADCACTPPS1 ADCACTPPSbits.ADCACTPPS1 // bit 1
19933 #define ADCACTPPS2 ADCACTPPSbits.ADCACTPPS2 // bit 2
19934 #define ADCACTPPS3 ADCACTPPSbits.ADCACTPPS3 // bit 3
19935 #define ADCACTPPS4 ADCACTPPSbits.ADCACTPPS4 // bit 4
19937 #define ADCAP0 ADCAPbits.ADCAP0 // bit 0
19938 #define ADCAP1 ADCAPbits.ADCAP1 // bit 1
19939 #define ADCAP2 ADCAPbits.ADCAP2 // bit 2
19940 #define ADCAP3 ADCAPbits.ADCAP3 // bit 3
19941 #define ADCAP4 ADCAPbits.ADCAP4 // bit 4
19943 #define ADCCS0 ADCLKbits.ADCCS0 // bit 0
19944 #define ADCCS1 ADCLKbits.ADCCS1 // bit 1
19945 #define ADCCS2 ADCLKbits.ADCCS2 // bit 2
19946 #define ADCCS3 ADCLKbits.ADCCS3 // bit 3
19947 #define ADCCS4 ADCLKbits.ADCCS4 // bit 4
19948 #define ADCCS5 ADCLKbits.ADCCS5 // bit 5
19950 #define ADCNT0 ADCNTbits.ADCNT0 // bit 0
19951 #define ADCNT1 ADCNTbits.ADCNT1 // bit 1
19952 #define ADCNT2 ADCNTbits.ADCNT2 // bit 2
19953 #define ADCNT3 ADCNTbits.ADCNT3 // bit 3
19954 #define ADCNT4 ADCNTbits.ADCNT4 // bit 4
19955 #define ADCNT5 ADCNTbits.ADCNT5 // bit 5
19956 #define ADCNT6 ADCNTbits.ADCNT6 // bit 6
19957 #define ADCNT7 ADCNTbits.ADCNT7 // bit 7
19959 #define ADGO ADCON0bits.ADGO // bit 0, shadows bit in ADCON0bits
19960 #define DONE ADCON0bits.DONE // bit 0, shadows bit in ADCON0bits
19961 #define NOT_DONE ADCON0bits.NOT_DONE // bit 0, shadows bit in ADCON0bits
19962 #define GO ADCON0bits.GO // bit 0, shadows bit in ADCON0bits
19963 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 0, shadows bit in ADCON0bits
19964 #define ADFM0 ADCON0bits.ADFM0 // bit 2
19965 #define ADFM1 ADCON0bits.ADFM1 // bit 3
19966 #define ADCS ADCON0bits.ADCS // bit 4
19967 #define ADCONT ADCON0bits.ADCONT // bit 6
19968 #define ADON ADCON0bits.ADON // bit 7
19970 #define ADDSEN ADCON1bits.ADDSEN // bit 0
19971 #define ADGPOL ADCON1bits.ADGPOL // bit 5
19972 #define ADIPEN ADCON1bits.ADIPEN // bit 6
19973 #define ADPPOL ADCON1bits.ADPPOL // bit 7
19975 #define ADMD0 ADCON2bits.ADMD0 // bit 0
19976 #define ADMD1 ADCON2bits.ADMD1 // bit 1
19977 #define ADMD2 ADCON2bits.ADMD2 // bit 2
19978 #define ADACLR ADCON2bits.ADACLR // bit 3
19979 #define ADCRS0 ADCON2bits.ADCRS0 // bit 4
19980 #define ADCRS1 ADCON2bits.ADCRS1 // bit 5
19981 #define ADCRS2 ADCON2bits.ADCRS2 // bit 6
19982 #define ADPSIS ADCON2bits.ADPSIS // bit 7
19984 #define ADTMD0 ADCON3bits.ADTMD0 // bit 0
19985 #define ADTMD1 ADCON3bits.ADTMD1 // bit 1
19986 #define ADTMD2 ADCON3bits.ADTMD2 // bit 2
19987 #define ADSOI ADCON3bits.ADSOI // bit 3
19988 #define ADCALC0 ADCON3bits.ADCALC0 // bit 4
19989 #define ADCALC1 ADCON3bits.ADCALC1 // bit 5
19990 #define ADCALC2 ADCON3bits.ADCALC2 // bit 6
19992 #define ADERR8 ADERRHbits.ADERR8 // bit 0
19993 #define ADERR9 ADERRHbits.ADERR9 // bit 1
19994 #define ADERR10 ADERRHbits.ADERR10 // bit 2
19995 #define ADERR11 ADERRHbits.ADERR11 // bit 3
19996 #define ADERR12 ADERRHbits.ADERR12 // bit 4
19997 #define ADERR13 ADERRHbits.ADERR13 // bit 5
19998 #define ADERR14 ADERRHbits.ADERR14 // bit 6
19999 #define ADERR15 ADERRHbits.ADERR15 // bit 7
20001 #define ADERR0 ADERRLbits.ADERR0 // bit 0
20002 #define ADERR1 ADERRLbits.ADERR1 // bit 1
20003 #define ADERR2 ADERRLbits.ADERR2 // bit 2
20004 #define ADERR3 ADERRLbits.ADERR3 // bit 3
20005 #define ADERR4 ADERRLbits.ADERR4 // bit 4
20006 #define ADERR5 ADERRLbits.ADERR5 // bit 5
20007 #define ADERR6 ADERRLbits.ADERR6 // bit 6
20008 #define ADERR7 ADERRLbits.ADERR7 // bit 7
20010 #define ADFLTR8 ADFLTRHbits.ADFLTR8 // bit 0
20011 #define ADFLTR9 ADFLTRHbits.ADFLTR9 // bit 1
20012 #define ADFLTR10 ADFLTRHbits.ADFLTR10 // bit 2
20013 #define ADFLTR11 ADFLTRHbits.ADFLTR11 // bit 3
20014 #define ADFLTR12 ADFLTRHbits.ADFLTR12 // bit 4
20015 #define ADFLTR13 ADFLTRHbits.ADFLTR13 // bit 5
20016 #define ADFLTR14 ADFLTRHbits.ADFLTR14 // bit 6
20017 #define ADFLTR15 ADFLTRHbits.ADFLTR15 // bit 7
20019 #define ADFLTR0 ADFLTRLbits.ADFLTR0 // bit 0
20020 #define ADFLTR1 ADFLTRLbits.ADFLTR1 // bit 1
20021 #define ADFLTR2 ADFLTRLbits.ADFLTR2 // bit 2
20022 #define ADFLTR3 ADFLTRLbits.ADFLTR3 // bit 3
20023 #define ADFLTR4 ADFLTRLbits.ADFLTR4 // bit 4
20024 #define ADFLTR5 ADFLTRLbits.ADFLTR5 // bit 5
20025 #define ADFLTR6 ADFLTRLbits.ADFLTR6 // bit 6
20026 #define ADFLTR7 ADFLTRLbits.ADFLTR7 // bit 7
20028 #define ADLTH8 ADLTHHbits.ADLTH8 // bit 0
20029 #define ADLTH9 ADLTHHbits.ADLTH9 // bit 1
20030 #define ADLTH10 ADLTHHbits.ADLTH10 // bit 2
20031 #define ADLTH11 ADLTHHbits.ADLTH11 // bit 3
20032 #define ADLTH12 ADLTHHbits.ADLTH12 // bit 4
20033 #define ADLTH13 ADLTHHbits.ADLTH13 // bit 5
20034 #define ADLTH14 ADLTHHbits.ADLTH14 // bit 6
20035 #define ADLTH15 ADLTHHbits.ADLTH15 // bit 7
20037 #define ADLTH0 ADLTHLbits.ADLTH0 // bit 0
20038 #define ADLTH1 ADLTHLbits.ADLTH1 // bit 1
20039 #define ADLTH2 ADLTHLbits.ADLTH2 // bit 2
20040 #define ADLTH3 ADLTHLbits.ADLTH3 // bit 3
20041 #define ADLTH4 ADLTHLbits.ADLTH4 // bit 4
20042 #define ADLTH5 ADLTHLbits.ADLTH5 // bit 5
20043 #define ADLTH6 ADLTHLbits.ADLTH6 // bit 6
20044 #define ADLTH7 ADLTHLbits.ADLTH7 // bit 7
20046 #define ADPCH0 ADPCHbits.ADPCH0 // bit 0
20047 #define ADPCH1 ADPCHbits.ADPCH1 // bit 1
20048 #define ADPCH2 ADPCHbits.ADPCH2 // bit 2
20049 #define ADPCH3 ADPCHbits.ADPCH3 // bit 3
20050 #define ADPCH4 ADPCHbits.ADPCH4 // bit 4
20051 #define ADPCH5 ADPCHbits.ADPCH5 // bit 5
20053 #define ADPRE0 ADPREbits.ADPRE0 // bit 0
20054 #define ADPRE1 ADPREbits.ADPRE1 // bit 1
20055 #define ADPRE2 ADPREbits.ADPRE2 // bit 2
20056 #define ADPRE3 ADPREbits.ADPRE3 // bit 3
20057 #define ADPRE4 ADPREbits.ADPRE4 // bit 4
20058 #define ADPRE5 ADPREbits.ADPRE5 // bit 5
20059 #define ADPRE6 ADPREbits.ADPRE6 // bit 6
20060 #define ADPRE7 ADPREbits.ADPRE7 // bit 7
20062 #define ADPREV8 ADPREVHbits.ADPREV8 // bit 0
20063 #define ADPREV9 ADPREVHbits.ADPREV9 // bit 1
20064 #define ADPREV10 ADPREVHbits.ADPREV10 // bit 2
20065 #define ADPREV11 ADPREVHbits.ADPREV11 // bit 3
20066 #define ADPREV12 ADPREVHbits.ADPREV12 // bit 4
20067 #define ADPREV13 ADPREVHbits.ADPREV13 // bit 5
20068 #define ADPREV14 ADPREVHbits.ADPREV14 // bit 6
20069 #define ADPREV15 ADPREVHbits.ADPREV15 // bit 7
20071 #define ADPREV0 ADPREVLbits.ADPREV0 // bit 0
20072 #define ADPREV1 ADPREVLbits.ADPREV1 // bit 1
20073 #define ADPREV2 ADPREVLbits.ADPREV2 // bit 2
20074 #define ADPREV3 ADPREVLbits.ADPREV3 // bit 3
20075 #define ADPREV4 ADPREVLbits.ADPREV4 // bit 4
20076 #define ADPREV5 ADPREVLbits.ADPREV5 // bit 5
20077 #define ADPREV6 ADPREVLbits.ADPREV6 // bit 6
20078 #define ADPREV7 ADPREVLbits.ADPREV7 // bit 7
20080 #define ADPREF0 ADREFbits.ADPREF0 // bit 0
20081 #define ADPREF1 ADREFbits.ADPREF1 // bit 1
20082 #define ADNREF ADREFbits.ADNREF // bit 4
20084 #define ADRPT0 ADRPTbits.ADRPT0 // bit 0
20085 #define ADRPT1 ADRPTbits.ADRPT1 // bit 1
20086 #define ADRPT2 ADRPTbits.ADRPT2 // bit 2
20087 #define ADRPT3 ADRPTbits.ADRPT3 // bit 3
20088 #define ADRPT4 ADRPTbits.ADRPT4 // bit 4
20089 #define ADRPT5 ADRPTbits.ADRPT5 // bit 5
20090 #define ADRPT6 ADRPTbits.ADRPT6 // bit 6
20091 #define ADRPT7 ADRPTbits.ADRPT7 // bit 7
20093 #define ADSTAT0 ADSTATbits.ADSTAT0 // bit 0
20094 #define ADSTAT1 ADSTATbits.ADSTAT1 // bit 1
20095 #define ADSTAT2 ADSTATbits.ADSTAT2 // bit 2
20096 #define ADMACT ADSTATbits.ADMACT // bit 3
20097 #define ADMATH ADSTATbits.ADMATH // bit 4
20098 #define ADLTHR ADSTATbits.ADLTHR // bit 5
20099 #define ADUTHR ADSTATbits.ADUTHR // bit 6
20100 #define ADAOV ADSTATbits.ADAOV // bit 7
20102 #define ADSTPT8 ADSTPTHbits.ADSTPT8 // bit 0
20103 #define ADSTPT9 ADSTPTHbits.ADSTPT9 // bit 1
20104 #define ADSTPT10 ADSTPTHbits.ADSTPT10 // bit 2
20105 #define ADSTPT11 ADSTPTHbits.ADSTPT11 // bit 3
20106 #define ADSTPT12 ADSTPTHbits.ADSTPT12 // bit 4
20107 #define ADSTPT13 ADSTPTHbits.ADSTPT13 // bit 5
20108 #define ADSTPT14 ADSTPTHbits.ADSTPT14 // bit 6
20109 #define ADSTPT15 ADSTPTHbits.ADSTPT15 // bit 7
20111 #define ADSTPT0 ADSTPTLbits.ADSTPT0 // bit 0
20112 #define ADSTPT1 ADSTPTLbits.ADSTPT1 // bit 1
20113 #define ADSTPT2 ADSTPTLbits.ADSTPT2 // bit 2
20114 #define ADSTPT3 ADSTPTLbits.ADSTPT3 // bit 3
20115 #define ADSTPT4 ADSTPTLbits.ADSTPT4 // bit 4
20116 #define ADSTPT5 ADSTPTLbits.ADSTPT5 // bit 5
20117 #define ADSTPT6 ADSTPTLbits.ADSTPT6 // bit 6
20118 #define ADSTPT7 ADSTPTLbits.ADSTPT7 // bit 7
20120 #define ADUTH8 ADUTHHbits.ADUTH8 // bit 0
20121 #define ADUTH9 ADUTHHbits.ADUTH9 // bit 1
20122 #define ADUTH10 ADUTHHbits.ADUTH10 // bit 2
20123 #define ADUTH11 ADUTHHbits.ADUTH11 // bit 3
20124 #define ADUTH12 ADUTHHbits.ADUTH12 // bit 4
20125 #define ADUTH13 ADUTHHbits.ADUTH13 // bit 5
20126 #define ADUTH14 ADUTHHbits.ADUTH14 // bit 6
20127 #define ADUTH15 ADUTHHbits.ADUTH15 // bit 7
20129 #define ADUTH0 ADUTHLbits.ADUTH0 // bit 0
20130 #define ADUTH1 ADUTHLbits.ADUTH1 // bit 1
20131 #define ADUTH2 ADUTHLbits.ADUTH2 // bit 2
20132 #define ADUTH3 ADUTHLbits.ADUTH3 // bit 3
20133 #define ADUTH4 ADUTHLbits.ADUTH4 // bit 4
20134 #define ADUTH5 ADUTHLbits.ADUTH5 // bit 5
20135 #define ADUTH6 ADUTHLbits.ADUTH6 // bit 6
20136 #define ADUTH7 ADUTHLbits.ADUTH7 // bit 7
20138 #define ANSA0 ANSELAbits.ANSA0 // bit 0
20139 #define ANSA1 ANSELAbits.ANSA1 // bit 1
20140 #define ANSA2 ANSELAbits.ANSA2 // bit 2
20141 #define ANSA3 ANSELAbits.ANSA3 // bit 3
20142 #define ANSA4 ANSELAbits.ANSA4 // bit 4
20143 #define ANSA5 ANSELAbits.ANSA5 // bit 5
20144 #define ANSA6 ANSELAbits.ANSA6 // bit 6
20145 #define ANSA7 ANSELAbits.ANSA7 // bit 7
20147 #define ANSB0 ANSELBbits.ANSB0 // bit 0
20148 #define ANSB1 ANSELBbits.ANSB1 // bit 1
20149 #define ANSB2 ANSELBbits.ANSB2 // bit 2
20150 #define ANSB3 ANSELBbits.ANSB3 // bit 3
20151 #define ANSB4 ANSELBbits.ANSB4 // bit 4
20152 #define ANSB5 ANSELBbits.ANSB5 // bit 5
20153 #define ANSB6 ANSELBbits.ANSB6 // bit 6
20154 #define ANSB7 ANSELBbits.ANSB7 // bit 7
20156 #define ANSC0 ANSELCbits.ANSC0 // bit 0
20157 #define ANSC1 ANSELCbits.ANSC1 // bit 1
20158 #define ANSC2 ANSELCbits.ANSC2 // bit 2
20159 #define ANSC3 ANSELCbits.ANSC3 // bit 3
20160 #define ANSC4 ANSELCbits.ANSC4 // bit 4
20161 #define ANSC5 ANSELCbits.ANSC5 // bit 5
20162 #define ANSC6 ANSELCbits.ANSC6 // bit 6
20163 #define ANSC7 ANSELCbits.ANSC7 // bit 7
20165 #define ANSD0 ANSELDbits.ANSD0 // bit 0
20166 #define ANSD1 ANSELDbits.ANSD1 // bit 1
20167 #define ANSD2 ANSELDbits.ANSD2 // bit 2
20168 #define ANSD3 ANSELDbits.ANSD3 // bit 3
20169 #define ANSD4 ANSELDbits.ANSD4 // bit 4
20170 #define ANSD5 ANSELDbits.ANSD5 // bit 5
20171 #define ANSD6 ANSELDbits.ANSD6 // bit 6
20172 #define ANSD7 ANSELDbits.ANSD7 // bit 7
20174 #define ANSE0 ANSELEbits.ANSE0 // bit 0
20175 #define ANSE1 ANSELEbits.ANSE1 // bit 1
20176 #define ANSE2 ANSELEbits.ANSE2 // bit 2
20178 #define ABDEN BAUD1CONbits.ABDEN // bit 0
20179 #define WUE BAUD1CONbits.WUE // bit 1
20180 #define BRG16 BAUD1CONbits.BRG16 // bit 3
20181 #define SCKP BAUD1CONbits.SCKP // bit 4
20182 #define RCIDL BAUD1CONbits.RCIDL // bit 6
20183 #define ABDOVF BAUD1CONbits.ABDOVF // bit 7
20185 #define BORRDY BORCONbits.BORRDY // bit 0
20186 #define SBOREN BORCONbits.SBOREN // bit 7
20188 #define BSR0 BSRbits.BSR0 // bit 0
20189 #define BSR1 BSRbits.BSR1 // bit 1
20190 #define BSR2 BSRbits.BSR2 // bit 2
20191 #define BSR3 BSRbits.BSR3 // bit 3
20192 #define BSR4 BSRbits.BSR4 // bit 4
20194 #define CCDS0 CCDCONbits.CCDS0 // bit 0
20195 #define CCDS1 CCDCONbits.CCDS1 // bit 1
20196 #define CCDEN CCDCONbits.CCDEN // bit 7
20198 #define CCDNA0 CCDNAbits.CCDNA0 // bit 0
20199 #define CCDNA1 CCDNAbits.CCDNA1 // bit 1
20200 #define CCDNA2 CCDNAbits.CCDNA2 // bit 2
20201 #define CCDNA3 CCDNAbits.CCDNA3 // bit 3
20202 #define CCDNA4 CCDNAbits.CCDNA4 // bit 4
20203 #define CCDNA5 CCDNAbits.CCDNA5 // bit 5
20204 #define CCDNA6 CCDNAbits.CCDNA6 // bit 6
20205 #define CCDNA7 CCDNAbits.CCDNA7 // bit 7
20207 #define CCDNB0 CCDNBbits.CCDNB0 // bit 0
20208 #define CCDNB1 CCDNBbits.CCDNB1 // bit 1
20209 #define CCDNB2 CCDNBbits.CCDNB2 // bit 2
20210 #define CCDNB3 CCDNBbits.CCDNB3 // bit 3
20211 #define CCDNB4 CCDNBbits.CCDNB4 // bit 4
20212 #define CCDNB5 CCDNBbits.CCDNB5 // bit 5
20213 #define CCDNB6 CCDNBbits.CCDNB6 // bit 6
20214 #define CCDNB7 CCDNBbits.CCDNB7 // bit 7
20216 #define CCDNC0 CCDNCbits.CCDNC0 // bit 0
20217 #define CCDNC1 CCDNCbits.CCDNC1 // bit 1
20218 #define CCDNC2 CCDNCbits.CCDNC2 // bit 2
20219 #define CCDNC3 CCDNCbits.CCDNC3 // bit 3
20220 #define CCDNC4 CCDNCbits.CCDNC4 // bit 4
20221 #define CCDNC5 CCDNCbits.CCDNC5 // bit 5
20222 #define CCDNC6 CCDNCbits.CCDNC6 // bit 6
20223 #define CCDNC7 CCDNCbits.CCDNC7 // bit 7
20225 #define CCDND0 CCDNDbits.CCDND0 // bit 0
20226 #define CCDND1 CCDNDbits.CCDND1 // bit 1
20227 #define CCDND2 CCDNDbits.CCDND2 // bit 2
20228 #define CCDND3 CCDNDbits.CCDND3 // bit 3
20229 #define CCDND4 CCDNDbits.CCDND4 // bit 4
20230 #define CCDND5 CCDNDbits.CCDND5 // bit 5
20231 #define CCDND6 CCDNDbits.CCDND6 // bit 6
20232 #define CCDND7 CCDNDbits.CCDND7 // bit 7
20234 #define CCDNE0 CCDNEbits.CCDNE0 // bit 0
20235 #define CCDNE1 CCDNEbits.CCDNE1 // bit 1
20236 #define CCDNE2 CCDNEbits.CCDNE2 // bit 2
20238 #define CCDPA0 CCDPAbits.CCDPA0 // bit 0
20239 #define CCDPA1 CCDPAbits.CCDPA1 // bit 1
20240 #define CCDPA2 CCDPAbits.CCDPA2 // bit 2
20241 #define CCDPA3 CCDPAbits.CCDPA3 // bit 3
20242 #define CCDPA4 CCDPAbits.CCDPA4 // bit 4
20243 #define CCDPA5 CCDPAbits.CCDPA5 // bit 5
20244 #define CCDPA6 CCDPAbits.CCDPA6 // bit 6
20245 #define CCDPA7 CCDPAbits.CCDPA7 // bit 7
20247 #define CCDPB0 CCDPBbits.CCDPB0 // bit 0
20248 #define CCDPB1 CCDPBbits.CCDPB1 // bit 1
20249 #define CCDPB2 CCDPBbits.CCDPB2 // bit 2
20250 #define CCDPB3 CCDPBbits.CCDPB3 // bit 3
20251 #define CCDPB4 CCDPBbits.CCDPB4 // bit 4
20252 #define CCDPB5 CCDPBbits.CCDPB5 // bit 5
20253 #define CCDPB6 CCDPBbits.CCDPB6 // bit 6
20254 #define CCDPB7 CCDPBbits.CCDPB7 // bit 7
20256 #define CCDPC0 CCDPCbits.CCDPC0 // bit 0
20257 #define CCDPC1 CCDPCbits.CCDPC1 // bit 1
20258 #define CCDPC2 CCDPCbits.CCDPC2 // bit 2
20259 #define CCDPC3 CCDPCbits.CCDPC3 // bit 3
20260 #define CCDPC4 CCDPCbits.CCDPC4 // bit 4
20261 #define CCDPC5 CCDPCbits.CCDPC5 // bit 5
20262 #define CCDPC6 CCDPCbits.CCDPC6 // bit 6
20263 #define CCDPC7 CCDPCbits.CCDPC7 // bit 7
20265 #define CCDPD0 CCDPDbits.CCDPD0 // bit 0
20266 #define CCDPD1 CCDPDbits.CCDPD1 // bit 1
20267 #define CCDPD2 CCDPDbits.CCDPD2 // bit 2
20268 #define CCDPD3 CCDPDbits.CCDPD3 // bit 3
20269 #define CCDPD4 CCDPDbits.CCDPD4 // bit 4
20270 #define CCDPD5 CCDPDbits.CCDPD5 // bit 5
20271 #define CCDPD6 CCDPDbits.CCDPD6 // bit 6
20272 #define CCDPD7 CCDPDbits.CCDPD7 // bit 7
20274 #define CCDPE0 CCDPEbits.CCDPE0 // bit 0
20275 #define CCDPE1 CCDPEbits.CCDPE1 // bit 1
20276 #define CCDPE2 CCDPEbits.CCDPE2 // bit 2
20278 #define CTS0 CCP1CAPbits.CTS0 // bit 0, shadows bit in CCP1CAPbits
20279 #define CCP1CTS0 CCP1CAPbits.CCP1CTS0 // bit 0, shadows bit in CCP1CAPbits
20280 #define CTS1 CCP1CAPbits.CTS1 // bit 1, shadows bit in CCP1CAPbits
20281 #define CCP1CTS1 CCP1CAPbits.CCP1CTS1 // bit 1, shadows bit in CCP1CAPbits
20282 #define CTS2 CCP1CAPbits.CTS2 // bit 2, shadows bit in CCP1CAPbits
20283 #define CCP1CTS2 CCP1CAPbits.CCP1CTS2 // bit 2, shadows bit in CCP1CAPbits
20285 #define MODE0 CCP1CONbits.MODE0 // bit 0, shadows bit in CCP1CONbits
20286 #define CCP1MODE0 CCP1CONbits.CCP1MODE0 // bit 0, shadows bit in CCP1CONbits
20287 #define MODE1 CCP1CONbits.MODE1 // bit 1, shadows bit in CCP1CONbits
20288 #define CCP1MODE1 CCP1CONbits.CCP1MODE1 // bit 1, shadows bit in CCP1CONbits
20289 #define MODE2 CCP1CONbits.MODE2 // bit 2, shadows bit in CCP1CONbits
20290 #define CCP1MODE2 CCP1CONbits.CCP1MODE2 // bit 2, shadows bit in CCP1CONbits
20291 #define MODE3 CCP1CONbits.MODE3 // bit 3, shadows bit in CCP1CONbits
20292 #define CCP1MODE3 CCP1CONbits.CCP1MODE3 // bit 3, shadows bit in CCP1CONbits
20293 #define FMT CCP1CONbits.FMT // bit 4, shadows bit in CCP1CONbits
20294 #define CCP1FMT CCP1CONbits.CCP1FMT // bit 4, shadows bit in CCP1CONbits
20295 #define OUT CCP1CONbits.OUT // bit 5, shadows bit in CCP1CONbits
20296 #define CCP1OUT CCP1CONbits.CCP1OUT // bit 5, shadows bit in CCP1CONbits
20297 #define OE CCP1CONbits.OE // bit 6, shadows bit in CCP1CONbits
20298 #define CCP1OE CCP1CONbits.CCP1OE // bit 6, shadows bit in CCP1CONbits
20299 #define EN CCP1CONbits.EN // bit 7, shadows bit in CCP1CONbits
20300 #define CCP1EN CCP1CONbits.CCP1EN // bit 7, shadows bit in CCP1CONbits
20302 #define CCP1PPS0 CCP1PPSbits.CCP1PPS0 // bit 0
20303 #define CCP1PPS1 CCP1PPSbits.CCP1PPS1 // bit 1
20304 #define CCP1PPS2 CCP1PPSbits.CCP1PPS2 // bit 2
20305 #define CCP1PPS3 CCP1PPSbits.CCP1PPS3 // bit 3
20306 #define CCP1PPS4 CCP1PPSbits.CCP1PPS4 // bit 4
20308 #define CCP2PPS0 CCP2PPSbits.CCP2PPS0 // bit 0
20309 #define CCP2PPS1 CCP2PPSbits.CCP2PPS1 // bit 1
20310 #define CCP2PPS2 CCP2PPSbits.CCP2PPS2 // bit 2
20311 #define CCP2PPS3 CCP2PPSbits.CCP2PPS3 // bit 3
20312 #define CCP2PPS4 CCP2PPSbits.CCP2PPS4 // bit 4
20314 #define CCP3PPS0 CCP3PPSbits.CCP3PPS0 // bit 0
20315 #define CCP3PPS1 CCP3PPSbits.CCP3PPS1 // bit 1
20316 #define CCP3PPS2 CCP3PPSbits.CCP3PPS2 // bit 2
20317 #define CCP3PPS3 CCP3PPSbits.CCP3PPS3 // bit 3
20318 #define CCP3PPS4 CCP3PPSbits.CCP3PPS4 // bit 4
20320 #define CCP4PPS0 CCP4PPSbits.CCP4PPS0 // bit 0
20321 #define CCP4PPS1 CCP4PPSbits.CCP4PPS1 // bit 1
20322 #define CCP4PPS2 CCP4PPSbits.CCP4PPS2 // bit 2
20323 #define CCP4PPS3 CCP4PPSbits.CCP4PPS3 // bit 3
20324 #define CCP4PPS4 CCP4PPSbits.CCP4PPS4 // bit 4
20326 #define CCP5PPS0 CCP5PPSbits.CCP5PPS0 // bit 0
20327 #define CCP5PPS1 CCP5PPSbits.CCP5PPS1 // bit 1
20328 #define CCP5PPS2 CCP5PPSbits.CCP5PPS2 // bit 2
20329 #define CCP5PPS3 CCP5PPSbits.CCP5PPS3 // bit 3
20330 #define CCP5PPS4 CCP5PPSbits.CCP5PPS4 // bit 4
20331 #define CCP6PPS CCP5PPSbits.CCP6PPS // bit 5
20333 #define C1TSEL0 CCPTMRS0bits.C1TSEL0 // bit 0
20334 #define C1TSEL1 CCPTMRS0bits.C1TSEL1 // bit 1
20335 #define C2TSEL0 CCPTMRS0bits.C2TSEL0 // bit 2
20336 #define C2TSEL1 CCPTMRS0bits.C2TSEL1 // bit 3
20337 #define C3TSEL0 CCPTMRS0bits.C3TSEL0 // bit 4
20338 #define C3TSEL1 CCPTMRS0bits.C3TSEL1 // bit 5
20339 #define C4TSEL0 CCPTMRS0bits.C4TSEL0 // bit 6
20340 #define C4TSEL1 CCPTMRS0bits.C4TSEL1 // bit 7
20342 #define C5TSEL0 CCPTMRS1bits.C5TSEL0 // bit 0
20343 #define C5TSEL1 CCPTMRS1bits.C5TSEL1 // bit 1
20344 #define P6TSEL0 CCPTMRS1bits.P6TSEL0 // bit 2
20345 #define P6TSEL1 CCPTMRS1bits.P6TSEL1 // bit 3
20346 #define P7TSEL0 CCPTMRS1bits.P7TSEL0 // bit 4
20347 #define P7TSEL1 CCPTMRS1bits.P7TSEL1 // bit 5
20349 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
20350 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
20351 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
20352 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
20353 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
20354 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
20355 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
20356 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
20357 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
20358 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
20359 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
20360 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
20361 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
20362 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
20363 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
20364 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
20366 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
20367 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
20368 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
20369 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
20370 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
20371 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
20372 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
20373 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
20374 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
20375 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
20376 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
20377 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
20378 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
20379 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
20380 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
20381 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
20383 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
20384 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
20385 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
20386 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
20387 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
20388 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
20389 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
20390 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
20391 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
20392 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
20394 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
20395 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
20396 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
20397 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
20398 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
20399 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
20400 #define LC1D1S3 CLC1SEL0bits.LC1D1S3 // bit 3, shadows bit in CLC1SEL0bits
20401 #define D1S3 CLC1SEL0bits.D1S3 // bit 3, shadows bit in CLC1SEL0bits
20402 #define LC1D1S4 CLC1SEL0bits.LC1D1S4 // bit 4, shadows bit in CLC1SEL0bits
20403 #define D1S4 CLC1SEL0bits.D1S4 // bit 4, shadows bit in CLC1SEL0bits
20404 #define LC1D1S5 CLC1SEL0bits.LC1D1S5 // bit 5, shadows bit in CLC1SEL0bits
20405 #define D1S5 CLC1SEL0bits.D1S5 // bit 5, shadows bit in CLC1SEL0bits
20406 #define LC1D1S6 CLC1SEL0bits.LC1D1S6 // bit 6, shadows bit in CLC1SEL0bits
20407 #define D1S6 CLC1SEL0bits.D1S6 // bit 6, shadows bit in CLC1SEL0bits
20408 #define LC1D1S7 CLC1SEL0bits.LC1D1S7 // bit 7, shadows bit in CLC1SEL0bits
20409 #define D1S7 CLC1SEL0bits.D1S7 // bit 7, shadows bit in CLC1SEL0bits
20411 #define LC1D2S0 CLC1SEL1bits.LC1D2S0 // bit 0, shadows bit in CLC1SEL1bits
20412 #define D2S0 CLC1SEL1bits.D2S0 // bit 0, shadows bit in CLC1SEL1bits
20413 #define LC1D2S1 CLC1SEL1bits.LC1D2S1 // bit 1, shadows bit in CLC1SEL1bits
20414 #define D2S1 CLC1SEL1bits.D2S1 // bit 1, shadows bit in CLC1SEL1bits
20415 #define LC1D2S2 CLC1SEL1bits.LC1D2S2 // bit 2, shadows bit in CLC1SEL1bits
20416 #define D2S2 CLC1SEL1bits.D2S2 // bit 2, shadows bit in CLC1SEL1bits
20417 #define LC1D2S3 CLC1SEL1bits.LC1D2S3 // bit 3, shadows bit in CLC1SEL1bits
20418 #define D2S3 CLC1SEL1bits.D2S3 // bit 3, shadows bit in CLC1SEL1bits
20419 #define LC1D2S4 CLC1SEL1bits.LC1D2S4 // bit 4, shadows bit in CLC1SEL1bits
20420 #define D2S4 CLC1SEL1bits.D2S4 // bit 4, shadows bit in CLC1SEL1bits
20421 #define LC1D2S5 CLC1SEL1bits.LC1D2S5 // bit 5, shadows bit in CLC1SEL1bits
20422 #define D2S5 CLC1SEL1bits.D2S5 // bit 5, shadows bit in CLC1SEL1bits
20423 #define LC1D2S6 CLC1SEL1bits.LC1D2S6 // bit 6, shadows bit in CLC1SEL1bits
20424 #define D2S6 CLC1SEL1bits.D2S6 // bit 6, shadows bit in CLC1SEL1bits
20425 #define LC1D2S7 CLC1SEL1bits.LC1D2S7 // bit 7, shadows bit in CLC1SEL1bits
20426 #define D2S7 CLC1SEL1bits.D2S7 // bit 7, shadows bit in CLC1SEL1bits
20428 #define LC1D3S0 CLC1SEL2bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL2bits
20429 #define D3S0 CLC1SEL2bits.D3S0 // bit 0, shadows bit in CLC1SEL2bits
20430 #define LC1D3S1 CLC1SEL2bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL2bits
20431 #define D3S1 CLC1SEL2bits.D3S1 // bit 1, shadows bit in CLC1SEL2bits
20432 #define LC1D3S2 CLC1SEL2bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL2bits
20433 #define D3S2 CLC1SEL2bits.D3S2 // bit 2, shadows bit in CLC1SEL2bits
20434 #define LC1D3S3 CLC1SEL2bits.LC1D3S3 // bit 3, shadows bit in CLC1SEL2bits
20435 #define D3S3 CLC1SEL2bits.D3S3 // bit 3, shadows bit in CLC1SEL2bits
20436 #define LC1D3S4 CLC1SEL2bits.LC1D3S4 // bit 4, shadows bit in CLC1SEL2bits
20437 #define D3S4 CLC1SEL2bits.D3S4 // bit 4, shadows bit in CLC1SEL2bits
20438 #define LC1D3S5 CLC1SEL2bits.LC1D3S5 // bit 5, shadows bit in CLC1SEL2bits
20439 #define D3S5 CLC1SEL2bits.D3S5 // bit 5, shadows bit in CLC1SEL2bits
20440 #define LC1D3S6 CLC1SEL2bits.LC1D3S6 // bit 6, shadows bit in CLC1SEL2bits
20441 #define D3S6 CLC1SEL2bits.D3S6 // bit 6, shadows bit in CLC1SEL2bits
20442 #define LC1D3S7 CLC1SEL2bits.LC1D3S7 // bit 7, shadows bit in CLC1SEL2bits
20443 #define D3S7 CLC1SEL2bits.D3S7 // bit 7, shadows bit in CLC1SEL2bits
20445 #define LC1D4S0 CLC1SEL3bits.LC1D4S0 // bit 0, shadows bit in CLC1SEL3bits
20446 #define D4S0 CLC1SEL3bits.D4S0 // bit 0, shadows bit in CLC1SEL3bits
20447 #define LC1D4S1 CLC1SEL3bits.LC1D4S1 // bit 1, shadows bit in CLC1SEL3bits
20448 #define D4S1 CLC1SEL3bits.D4S1 // bit 1, shadows bit in CLC1SEL3bits
20449 #define LC1D4S2 CLC1SEL3bits.LC1D4S2 // bit 2, shadows bit in CLC1SEL3bits
20450 #define D4S2 CLC1SEL3bits.D4S2 // bit 2, shadows bit in CLC1SEL3bits
20451 #define LC1D4S3 CLC1SEL3bits.LC1D4S3 // bit 3, shadows bit in CLC1SEL3bits
20452 #define D4S3 CLC1SEL3bits.D4S3 // bit 3, shadows bit in CLC1SEL3bits
20453 #define LC1D4S4 CLC1SEL3bits.LC1D4S4 // bit 4, shadows bit in CLC1SEL3bits
20454 #define D4S4 CLC1SEL3bits.D4S4 // bit 4, shadows bit in CLC1SEL3bits
20455 #define LC1D4S5 CLC1SEL3bits.LC1D4S5 // bit 5, shadows bit in CLC1SEL3bits
20456 #define D4S5 CLC1SEL3bits.D4S5 // bit 5, shadows bit in CLC1SEL3bits
20457 #define LC1D4S6 CLC1SEL3bits.LC1D4S6 // bit 6, shadows bit in CLC1SEL3bits
20458 #define D4S6 CLC1SEL3bits.D4S6 // bit 6, shadows bit in CLC1SEL3bits
20459 #define LC1D4S7 CLC1SEL3bits.LC1D4S7 // bit 7, shadows bit in CLC1SEL3bits
20460 #define D4S7 CLC1SEL3bits.D4S7 // bit 7, shadows bit in CLC1SEL3bits
20462 #define MLC1OUT CLCDATAbits.MLC1OUT // bit 0
20463 #define MLC2OUT CLCDATAbits.MLC2OUT // bit 1
20464 #define MLC3OUT CLCDATAbits.MLC3OUT // bit 2
20465 #define MLC4OUT CLCDATAbits.MLC4OUT // bit 3
20467 #define CLCIN0PPS0 CLCIN0PPSbits.CLCIN0PPS0 // bit 0
20468 #define CLCIN0PPS1 CLCIN0PPSbits.CLCIN0PPS1 // bit 1
20469 #define CLCIN0PPS2 CLCIN0PPSbits.CLCIN0PPS2 // bit 2
20470 #define CLCIN0PPS3 CLCIN0PPSbits.CLCIN0PPS3 // bit 3
20471 #define CLCIN0PPS4 CLCIN0PPSbits.CLCIN0PPS4 // bit 4
20473 #define CLCIN1PPS0 CLCIN1PPSbits.CLCIN1PPS0 // bit 0
20474 #define CLCIN1PPS1 CLCIN1PPSbits.CLCIN1PPS1 // bit 1
20475 #define CLCIN1PPS2 CLCIN1PPSbits.CLCIN1PPS2 // bit 2
20476 #define CLCIN1PPS3 CLCIN1PPSbits.CLCIN1PPS3 // bit 3
20477 #define CLCIN1PPS4 CLCIN1PPSbits.CLCIN1PPS4 // bit 4
20479 #define CLCIN2PPS0 CLCIN2PPSbits.CLCIN2PPS0 // bit 0
20480 #define CLCIN2PPS1 CLCIN2PPSbits.CLCIN2PPS1 // bit 1
20481 #define CLCIN2PPS2 CLCIN2PPSbits.CLCIN2PPS2 // bit 2
20482 #define CLCIN2PPS3 CLCIN2PPSbits.CLCIN2PPS3 // bit 3
20483 #define CLCIN2PPS4 CLCIN2PPSbits.CLCIN2PPS4 // bit 4
20485 #define CLCIN3PPS0 CLCIN3PPSbits.CLCIN3PPS0 // bit 0
20486 #define CLCIN3PPS1 CLCIN3PPSbits.CLCIN3PPS1 // bit 1
20487 #define CLCIN3PPS2 CLCIN3PPSbits.CLCIN3PPS2 // bit 2
20488 #define CLCIN3PPS3 CLCIN3PPSbits.CLCIN3PPS3 // bit 3
20489 #define CLCIN3PPS4 CLCIN3PPSbits.CLCIN3PPS4 // bit 4
20491 #define CLKRCLK0 CLKRCLKbits.CLKRCLK0 // bit 0
20492 #define CLKRCLK1 CLKRCLKbits.CLKRCLK1 // bit 1
20493 #define CLKRCLK2 CLKRCLKbits.CLKRCLK2 // bit 2
20494 #define CLKRCLK3 CLKRCLKbits.CLKRCLK3 // bit 3
20496 #define CLKRDIV0 CLKRCONbits.CLKRDIV0 // bit 0
20497 #define CLKRDIV1 CLKRCONbits.CLKRDIV1 // bit 1
20498 #define CLKRDIV2 CLKRCONbits.CLKRDIV2 // bit 2
20499 #define CLKRDC0 CLKRCONbits.CLKRDC0 // bit 3
20500 #define CLKRDC1 CLKRCONbits.CLKRDC1 // bit 4
20501 #define CLKREN CLKRCONbits.CLKREN // bit 7
20503 #define NCH0 CM1NSELbits.NCH0 // bit 0, shadows bit in CM1NSELbits
20504 #define C1NCH0 CM1NSELbits.C1NCH0 // bit 0, shadows bit in CM1NSELbits
20505 #define NCH1 CM1NSELbits.NCH1 // bit 1, shadows bit in CM1NSELbits
20506 #define C1NCH1 CM1NSELbits.C1NCH1 // bit 1, shadows bit in CM1NSELbits
20507 #define NCH2 CM1NSELbits.NCH2 // bit 2, shadows bit in CM1NSELbits
20508 #define C1NCH2 CM1NSELbits.C1NCH2 // bit 2, shadows bit in CM1NSELbits
20510 #define PCH0 CM1PSELbits.PCH0 // bit 0, shadows bit in CM1PSELbits
20511 #define C1PCH0 CM1PSELbits.C1PCH0 // bit 0, shadows bit in CM1PSELbits
20512 #define PCH1 CM1PSELbits.PCH1 // bit 1, shadows bit in CM1PSELbits
20513 #define C1PCH1 CM1PSELbits.C1PCH1 // bit 1, shadows bit in CM1PSELbits
20514 #define PCH2 CM1PSELbits.PCH2 // bit 2, shadows bit in CM1PSELbits
20515 #define C1PCH2 CM1PSELbits.C1PCH2 // bit 2, shadows bit in CM1PSELbits
20517 #define DOZE0 CPUDOZEbits.DOZE0 // bit 0
20518 #define DOZE1 CPUDOZEbits.DOZE1 // bit 1
20519 #define DOZE2 CPUDOZEbits.DOZE2 // bit 2
20520 #define DOE CPUDOZEbits.DOE // bit 4
20521 #define ROI CPUDOZEbits.ROI // bit 5
20522 #define DOZEN CPUDOZEbits.DOZEN // bit 6
20523 #define IDLEN CPUDOZEbits.IDLEN // bit 7
20525 #define ACC8 CRCACCHbits.ACC8 // bit 0
20526 #define ACC9 CRCACCHbits.ACC9 // bit 1
20527 #define ACC10 CRCACCHbits.ACC10 // bit 2
20528 #define ACC11 CRCACCHbits.ACC11 // bit 3
20529 #define ACC12 CRCACCHbits.ACC12 // bit 4
20530 #define ACC13 CRCACCHbits.ACC13 // bit 5
20531 #define ACC14 CRCACCHbits.ACC14 // bit 6
20532 #define ACC15 CRCACCHbits.ACC15 // bit 7
20534 #define ACC0 CRCACCLbits.ACC0 // bit 0
20535 #define ACC1 CRCACCLbits.ACC1 // bit 1
20536 #define ACC2 CRCACCLbits.ACC2 // bit 2
20537 #define ACC3 CRCACCLbits.ACC3 // bit 3
20538 #define ACC4 CRCACCLbits.ACC4 // bit 4
20539 #define ACC5 CRCACCLbits.ACC5 // bit 5
20540 #define ACC6 CRCACCLbits.ACC6 // bit 6
20541 #define ACC7 CRCACCLbits.ACC7 // bit 7
20543 #define PLEN0 CRCCON1bits.PLEN0 // bit 0
20544 #define PLEN1 CRCCON1bits.PLEN1 // bit 1
20545 #define PLEN2 CRCCON1bits.PLEN2 // bit 2
20546 #define PLEN3 CRCCON1bits.PLEN3 // bit 3
20547 #define DLEN0 CRCCON1bits.DLEN0 // bit 4
20548 #define DLEN1 CRCCON1bits.DLEN1 // bit 5
20549 #define DLEN2 CRCCON1bits.DLEN2 // bit 6
20550 #define DLEN3 CRCCON1bits.DLEN3 // bit 7
20552 #define DATA8 CRCDATHbits.DATA8 // bit 0
20553 #define DATA9 CRCDATHbits.DATA9 // bit 1
20554 #define DATA10 CRCDATHbits.DATA10 // bit 2
20555 #define DATA11 CRCDATHbits.DATA11 // bit 3
20556 #define DATA12 CRCDATHbits.DATA12 // bit 4
20557 #define DATA13 CRCDATHbits.DATA13 // bit 5
20558 #define DATA14 CRCDATHbits.DATA14 // bit 6
20559 #define DATA15 CRCDATHbits.DATA15 // bit 7
20561 #define DATA0 CRCDATLbits.DATA0 // bit 0
20562 #define DATA1 CRCDATLbits.DATA1 // bit 1
20563 #define DATA2 CRCDATLbits.DATA2 // bit 2
20564 #define DATA3 CRCDATLbits.DATA3 // bit 3
20565 #define DATA4 CRCDATLbits.DATA4 // bit 4
20566 #define DATA5 CRCDATLbits.DATA5 // bit 5
20567 #define DATA6 CRCDATLbits.DATA6 // bit 6
20568 #define DATA7 CRCDATLbits.DATA7 // bit 7
20570 #define SHFT8 CRCSHIFTHbits.SHFT8 // bit 0
20571 #define SHFT9 CRCSHIFTHbits.SHFT9 // bit 1
20572 #define SHFT10 CRCSHIFTHbits.SHFT10 // bit 2
20573 #define SHFT11 CRCSHIFTHbits.SHFT11 // bit 3
20574 #define SHFT12 CRCSHIFTHbits.SHFT12 // bit 4
20575 #define SHFT13 CRCSHIFTHbits.SHFT13 // bit 5
20576 #define SHFT14 CRCSHIFTHbits.SHFT14 // bit 6
20577 #define SHFT15 CRCSHIFTHbits.SHFT15 // bit 7
20579 #define SHFT0 CRCSHIFTLbits.SHFT0 // bit 0
20580 #define SHFT1 CRCSHIFTLbits.SHFT1 // bit 1
20581 #define SHFT2 CRCSHIFTLbits.SHFT2 // bit 2
20582 #define SHFT3 CRCSHIFTLbits.SHFT3 // bit 3
20583 #define SHFT4 CRCSHIFTLbits.SHFT4 // bit 4
20584 #define SHFT5 CRCSHIFTLbits.SHFT5 // bit 5
20585 #define SHFT6 CRCSHIFTLbits.SHFT6 // bit 6
20586 #define SHFT7 CRCSHIFTLbits.SHFT7 // bit 7
20588 #define X8 CRCXORHbits.X8 // bit 0
20589 #define X9 CRCXORHbits.X9 // bit 1
20590 #define X10 CRCXORHbits.X10 // bit 2
20591 #define X11 CRCXORHbits.X11 // bit 3
20592 #define X12 CRCXORHbits.X12 // bit 4
20593 #define X13 CRCXORHbits.X13 // bit 5
20594 #define X14 CRCXORHbits.X14 // bit 6
20595 #define X15 CRCXORHbits.X15 // bit 7
20597 #define X1 CRCXORLbits.X1 // bit 1
20598 #define X2 CRCXORLbits.X2 // bit 2
20599 #define X3 CRCXORLbits.X3 // bit 3
20600 #define X4 CRCXORLbits.X4 // bit 4
20601 #define X5 CRCXORLbits.X5 // bit 5
20602 #define X6 CRCXORLbits.X6 // bit 6
20603 #define X7 CRCXORLbits.X7 // bit 7
20605 #define LSAC0 CWG1AS0bits.LSAC0 // bit 2, shadows bit in CWG1AS0bits
20606 #define CWG1LSAC0 CWG1AS0bits.CWG1LSAC0 // bit 2, shadows bit in CWG1AS0bits
20607 #define LSAC1 CWG1AS0bits.LSAC1 // bit 3, shadows bit in CWG1AS0bits
20608 #define CWG1LSAC1 CWG1AS0bits.CWG1LSAC1 // bit 3, shadows bit in CWG1AS0bits
20609 #define LSBD0 CWG1AS0bits.LSBD0 // bit 4, shadows bit in CWG1AS0bits
20610 #define CWG1LSBD0 CWG1AS0bits.CWG1LSBD0 // bit 4, shadows bit in CWG1AS0bits
20611 #define LSBD1 CWG1AS0bits.LSBD1 // bit 5, shadows bit in CWG1AS0bits
20612 #define CWG1LSBD1 CWG1AS0bits.CWG1LSBD1 // bit 5, shadows bit in CWG1AS0bits
20613 #define REN CWG1AS0bits.REN // bit 6, shadows bit in CWG1AS0bits
20614 #define CWG1REN CWG1AS0bits.CWG1REN // bit 6, shadows bit in CWG1AS0bits
20615 #define SHUTDOWN CWG1AS0bits.SHUTDOWN // bit 7, shadows bit in CWG1AS0bits
20616 #define CWG1SHUTDOWN CWG1AS0bits.CWG1SHUTDOWN // bit 7, shadows bit in CWG1AS0bits
20618 #define AS0E CWG1AS1bits.AS0E // bit 0
20619 #define AS1E CWG1AS1bits.AS1E // bit 1
20620 #define AS2E CWG1AS1bits.AS2E // bit 2
20621 #define AS3E CWG1AS1bits.AS3E // bit 3
20622 #define AS4E CWG1AS1bits.AS4E // bit 4
20623 #define AS5E CWG1AS1bits.AS5E // bit 5
20624 #define AS6E CWG1AS1bits.AS6E // bit 6
20626 #define CS CWG1CLKCONbits.CS // bit 0, shadows bit in CWG1CLKCONbits
20627 #define CWG1CS CWG1CLKCONbits.CWG1CS // bit 0, shadows bit in CWG1CLKCONbits
20629 #define POLA CWG1CON1bits.POLA // bit 0, shadows bit in CWG1CON1bits
20630 #define CWG1POLA CWG1CON1bits.CWG1POLA // bit 0, shadows bit in CWG1CON1bits
20631 #define POLB CWG1CON1bits.POLB // bit 1, shadows bit in CWG1CON1bits
20632 #define CWG1POLB CWG1CON1bits.CWG1POLB // bit 1, shadows bit in CWG1CON1bits
20633 #define POLC CWG1CON1bits.POLC // bit 2, shadows bit in CWG1CON1bits
20634 #define CWG1POLC CWG1CON1bits.CWG1POLC // bit 2, shadows bit in CWG1CON1bits
20635 #define POLD CWG1CON1bits.POLD // bit 3, shadows bit in CWG1CON1bits
20636 #define CWG1POLD CWG1CON1bits.CWG1POLD // bit 3, shadows bit in CWG1CON1bits
20637 #define IN CWG1CON1bits.IN // bit 5, shadows bit in CWG1CON1bits
20638 #define CWG1IN CWG1CON1bits.CWG1IN // bit 5, shadows bit in CWG1CON1bits
20640 #define DBF0 CWG1DBFbits.DBF0 // bit 0, shadows bit in CWG1DBFbits
20641 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0, shadows bit in CWG1DBFbits
20642 #define DBF1 CWG1DBFbits.DBF1 // bit 1, shadows bit in CWG1DBFbits
20643 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1, shadows bit in CWG1DBFbits
20644 #define DBF2 CWG1DBFbits.DBF2 // bit 2, shadows bit in CWG1DBFbits
20645 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2, shadows bit in CWG1DBFbits
20646 #define DBF3 CWG1DBFbits.DBF3 // bit 3, shadows bit in CWG1DBFbits
20647 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3, shadows bit in CWG1DBFbits
20648 #define DBF4 CWG1DBFbits.DBF4 // bit 4, shadows bit in CWG1DBFbits
20649 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4, shadows bit in CWG1DBFbits
20650 #define DBF5 CWG1DBFbits.DBF5 // bit 5, shadows bit in CWG1DBFbits
20651 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5, shadows bit in CWG1DBFbits
20653 #define DBR0 CWG1DBRbits.DBR0 // bit 0, shadows bit in CWG1DBRbits
20654 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0, shadows bit in CWG1DBRbits
20655 #define DBR1 CWG1DBRbits.DBR1 // bit 1, shadows bit in CWG1DBRbits
20656 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1, shadows bit in CWG1DBRbits
20657 #define DBR2 CWG1DBRbits.DBR2 // bit 2, shadows bit in CWG1DBRbits
20658 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2, shadows bit in CWG1DBRbits
20659 #define DBR3 CWG1DBRbits.DBR3 // bit 3, shadows bit in CWG1DBRbits
20660 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3, shadows bit in CWG1DBRbits
20661 #define DBR4 CWG1DBRbits.DBR4 // bit 4, shadows bit in CWG1DBRbits
20662 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4, shadows bit in CWG1DBRbits
20663 #define DBR5 CWG1DBRbits.DBR5 // bit 5, shadows bit in CWG1DBRbits
20664 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5, shadows bit in CWG1DBRbits
20666 #define CWG1ISM0 CWG1ISMbits.CWG1ISM0 // bit 0
20667 #define CWG1ISM1 CWG1ISMbits.CWG1ISM1 // bit 1
20668 #define CWG1ISM2 CWG1ISMbits.CWG1ISM2 // bit 2
20669 #define CWG1ISM3 CWG1ISMbits.CWG1ISM3 // bit 3
20671 #define CWG1PPS0 CWG1PPSbits.CWG1PPS0 // bit 0
20672 #define CWG1PPS1 CWG1PPSbits.CWG1PPS1 // bit 1
20673 #define CWG1PPS2 CWG1PPSbits.CWG1PPS2 // bit 2
20674 #define CWG1PPS3 CWG1PPSbits.CWG1PPS3 // bit 3
20675 #define CWG1PPS4 CWG1PPSbits.CWG1PPS4 // bit 4
20677 #define STRA CWG1STRbits.STRA // bit 0, shadows bit in CWG1STRbits
20678 #define CWG1STRA CWG1STRbits.CWG1STRA // bit 0, shadows bit in CWG1STRbits
20679 #define STRB CWG1STRbits.STRB // bit 1, shadows bit in CWG1STRbits
20680 #define CWG1STRB CWG1STRbits.CWG1STRB // bit 1, shadows bit in CWG1STRbits
20681 #define STRC CWG1STRbits.STRC // bit 2, shadows bit in CWG1STRbits
20682 #define CWG1STRC CWG1STRbits.CWG1STRC // bit 2, shadows bit in CWG1STRbits
20683 #define STRD CWG1STRbits.STRD // bit 3, shadows bit in CWG1STRbits
20684 #define CWG1STRD CWG1STRbits.CWG1STRD // bit 3, shadows bit in CWG1STRbits
20685 #define OVRA CWG1STRbits.OVRA // bit 4, shadows bit in CWG1STRbits
20686 #define CWG1OVRA CWG1STRbits.CWG1OVRA // bit 4, shadows bit in CWG1STRbits
20687 #define OVRB CWG1STRbits.OVRB // bit 5, shadows bit in CWG1STRbits
20688 #define CWG1OVRB CWG1STRbits.CWG1OVRB // bit 5, shadows bit in CWG1STRbits
20689 #define OVRC CWG1STRbits.OVRC // bit 6, shadows bit in CWG1STRbits
20690 #define CWG1OVRC CWG1STRbits.CWG1OVRC // bit 6, shadows bit in CWG1STRbits
20691 #define OVRD CWG1STRbits.OVRD // bit 7, shadows bit in CWG1STRbits
20692 #define CWG1OVRD CWG1STRbits.CWG1OVRD // bit 7, shadows bit in CWG1STRbits
20694 #define CWG2ISM0 CWG2ISMbits.CWG2ISM0 // bit 0
20695 #define CWG2ISM1 CWG2ISMbits.CWG2ISM1 // bit 1
20696 #define CWG2ISM2 CWG2ISMbits.CWG2ISM2 // bit 2
20697 #define CWG2ISM3 CWG2ISMbits.CWG2ISM3 // bit 3
20699 #define CWG2PPS0 CWG2PPSbits.CWG2PPS0 // bit 0
20700 #define CWG2PPS1 CWG2PPSbits.CWG2PPS1 // bit 1
20701 #define CWG2PPS2 CWG2PPSbits.CWG2PPS2 // bit 2
20702 #define CWG2PPS3 CWG2PPSbits.CWG2PPS3 // bit 3
20703 #define CWG2PPS4 CWG2PPSbits.CWG2PPS4 // bit 4
20705 #define CWG3ISM0 CWG3ISMbits.CWG3ISM0 // bit 0
20706 #define CWG3ISM1 CWG3ISMbits.CWG3ISM1 // bit 1
20707 #define CWG3ISM2 CWG3ISMbits.CWG3ISM2 // bit 2
20708 #define CWG3ISM3 CWG3ISMbits.CWG3ISM3 // bit 3
20710 #define CWG3PPS0 CWG3PPSbits.CWG3PPS0 // bit 0
20711 #define CWG3PPS1 CWG3PPSbits.CWG3PPS1 // bit 1
20712 #define CWG3PPS2 CWG3PPSbits.CWG3PPS2 // bit 2
20713 #define CWG3PPS3 CWG3PPSbits.CWG3PPS3 // bit 3
20714 #define CWG3PPS4 CWG3PPSbits.CWG3PPS4 // bit 4
20716 #define DAC1R0 DAC1CON1bits.DAC1R0 // bit 0
20717 #define DAC1R1 DAC1CON1bits.DAC1R1 // bit 1
20718 #define DAC1R2 DAC1CON1bits.DAC1R2 // bit 2
20719 #define DAC1R3 DAC1CON1bits.DAC1R3 // bit 3
20720 #define DAC1R4 DAC1CON1bits.DAC1R4 // bit 4
20722 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
20723 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
20724 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
20725 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
20726 #define TSRNG FVRCONbits.TSRNG // bit 4
20727 #define TSEN FVRCONbits.TSEN // bit 5
20728 #define FVRRDY FVRCONbits.FVRRDY // bit 6
20729 #define FVREN FVRCONbits.FVREN // bit 7
20731 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
20732 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
20733 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
20734 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
20735 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
20736 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
20737 #define INLVLA6 INLVLAbits.INLVLA6 // bit 6
20738 #define INLVLA7 INLVLAbits.INLVLA7 // bit 7
20740 #define INLVLB0 INLVLBbits.INLVLB0 // bit 0
20741 #define INLVLB1 INLVLBbits.INLVLB1 // bit 1
20742 #define INLVLB2 INLVLBbits.INLVLB2 // bit 2
20743 #define INLVLB3 INLVLBbits.INLVLB3 // bit 3
20744 #define INLVLB4 INLVLBbits.INLVLB4 // bit 4
20745 #define INLVLB5 INLVLBbits.INLVLB5 // bit 5
20746 #define INLVLB6 INLVLBbits.INLVLB6 // bit 6
20747 #define INLVLB7 INLVLBbits.INLVLB7 // bit 7
20749 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0
20750 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1
20751 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2
20752 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3
20753 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4
20754 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5
20755 #define INLVLC6 INLVLCbits.INLVLC6 // bit 6
20756 #define INLVLC7 INLVLCbits.INLVLC7 // bit 7
20758 #define INLVLD0 INLVLDbits.INLVLD0 // bit 0
20759 #define INLVLD1 INLVLDbits.INLVLD1 // bit 1
20760 #define INLVLD2 INLVLDbits.INLVLD2 // bit 2
20761 #define INLVLD3 INLVLDbits.INLVLD3 // bit 3
20762 #define INLVLD4 INLVLDbits.INLVLD4 // bit 4
20763 #define INLVLD5 INLVLDbits.INLVLD5 // bit 5
20764 #define INLVLD6 INLVLDbits.INLVLD6 // bit 6
20765 #define INLVLD7 INLVLDbits.INLVLD7 // bit 7
20767 #define INLVLE0 INLVLEbits.INLVLE0 // bit 0
20768 #define INLVLE1 INLVLEbits.INLVLE1 // bit 1
20769 #define INLVLE2 INLVLEbits.INLVLE2 // bit 2
20770 #define INLVLE3 INLVLEbits.INLVLE3 // bit 3
20772 #define INTEDG INTCONbits.INTEDG // bit 0
20773 #define PEIE INTCONbits.PEIE // bit 6
20774 #define GIE INTCONbits.GIE // bit 7
20776 #define INTPPS0 INTPPSbits.INTPPS0 // bit 0
20777 #define INTPPS1 INTPPSbits.INTPPS1 // bit 1
20778 #define INTPPS2 INTPPSbits.INTPPS2 // bit 2
20779 #define INTPPS3 INTPPSbits.INTPPS3 // bit 3
20781 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
20782 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
20783 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
20784 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
20785 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
20786 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
20787 #define IOCAF6 IOCAFbits.IOCAF6 // bit 6
20788 #define IOCAF7 IOCAFbits.IOCAF7 // bit 7
20790 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
20791 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
20792 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
20793 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
20794 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
20795 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
20796 #define IOCAN6 IOCANbits.IOCAN6 // bit 6
20797 #define IOCAN7 IOCANbits.IOCAN7 // bit 7
20799 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
20800 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
20801 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
20802 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
20803 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
20804 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
20805 #define IOCAP6 IOCAPbits.IOCAP6 // bit 6
20806 #define IOCAP7 IOCAPbits.IOCAP7 // bit 7
20808 #define IOCBF0 IOCBFbits.IOCBF0 // bit 0
20809 #define IOCBF1 IOCBFbits.IOCBF1 // bit 1
20810 #define IOCBF2 IOCBFbits.IOCBF2 // bit 2
20811 #define IOCBF3 IOCBFbits.IOCBF3 // bit 3
20812 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
20813 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
20814 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
20815 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
20817 #define IOCBN0 IOCBNbits.IOCBN0 // bit 0
20818 #define IOCBN1 IOCBNbits.IOCBN1 // bit 1
20819 #define IOCBN2 IOCBNbits.IOCBN2 // bit 2
20820 #define IOCBN3 IOCBNbits.IOCBN3 // bit 3
20821 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
20822 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
20823 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
20824 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
20826 #define IOCBP0 IOCBPbits.IOCBP0 // bit 0
20827 #define IOCBP1 IOCBPbits.IOCBP1 // bit 1
20828 #define IOCBP2 IOCBPbits.IOCBP2 // bit 2
20829 #define IOCBP3 IOCBPbits.IOCBP3 // bit 3
20830 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
20831 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
20832 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
20833 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
20835 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
20836 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
20837 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
20838 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
20839 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
20840 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
20841 #define IOCCF6 IOCCFbits.IOCCF6 // bit 6
20842 #define IOCCF7 IOCCFbits.IOCCF7 // bit 7
20844 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
20845 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
20846 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
20847 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
20848 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
20849 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
20850 #define IOCCN6 IOCCNbits.IOCCN6 // bit 6
20851 #define IOCCN7 IOCCNbits.IOCCN7 // bit 7
20853 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
20854 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
20855 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
20856 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
20857 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
20858 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
20859 #define IOCCP6 IOCCPbits.IOCCP6 // bit 6
20860 #define IOCCP7 IOCCPbits.IOCCP7 // bit 7
20862 #define IOCEF3 IOCEFbits.IOCEF3 // bit 3
20864 #define IOCEN3 IOCENbits.IOCEN3 // bit 3
20866 #define IOCEP3 IOCEPbits.IOCEP3 // bit 3
20868 #define LATA0 LATAbits.LATA0 // bit 0
20869 #define LATA1 LATAbits.LATA1 // bit 1
20870 #define LATA2 LATAbits.LATA2 // bit 2
20871 #define LATA3 LATAbits.LATA3 // bit 3
20872 #define LATA4 LATAbits.LATA4 // bit 4
20873 #define LATA5 LATAbits.LATA5 // bit 5
20874 #define LATA6 LATAbits.LATA6 // bit 6
20875 #define LATA7 LATAbits.LATA7 // bit 7
20877 #define LATB0 LATBbits.LATB0 // bit 0
20878 #define LATB1 LATBbits.LATB1 // bit 1
20879 #define LATB2 LATBbits.LATB2 // bit 2
20880 #define LATB3 LATBbits.LATB3 // bit 3
20881 #define LATB4 LATBbits.LATB4 // bit 4
20882 #define LATB5 LATBbits.LATB5 // bit 5
20883 #define LATB6 LATBbits.LATB6 // bit 6
20884 #define LATB7 LATBbits.LATB7 // bit 7
20886 #define LATC0 LATCbits.LATC0 // bit 0
20887 #define LATC1 LATCbits.LATC1 // bit 1
20888 #define LATC2 LATCbits.LATC2 // bit 2
20889 #define LATC3 LATCbits.LATC3 // bit 3
20890 #define LATC4 LATCbits.LATC4 // bit 4
20891 #define LATC5 LATCbits.LATC5 // bit 5
20892 #define LATC6 LATCbits.LATC6 // bit 6
20893 #define LATC7 LATCbits.LATC7 // bit 7
20895 #define LATD0 LATDbits.LATD0 // bit 0
20896 #define LATD1 LATDbits.LATD1 // bit 1
20897 #define LATD2 LATDbits.LATD2 // bit 2
20898 #define LATD3 LATDbits.LATD3 // bit 3
20899 #define LATD4 LATDbits.LATD4 // bit 4
20900 #define LATD5 LATDbits.LATD5 // bit 5
20901 #define LATD6 LATDbits.LATD6 // bit 6
20902 #define LATD7 LATDbits.LATD7 // bit 7
20904 #define LATE0 LATEbits.LATE0 // bit 0
20905 #define LATE1 LATEbits.LATE1 // bit 1
20906 #define LATE2 LATEbits.LATE2 // bit 2
20908 #define MDCH0 MDCARHbits.MDCH0 // bit 0
20909 #define MDCH1 MDCARHbits.MDCH1 // bit 1
20910 #define MDCH2 MDCARHbits.MDCH2 // bit 2
20911 #define MDCH3 MDCARHbits.MDCH3 // bit 3
20913 #define MDCARHPPS0 MDCARHPPSbits.MDCARHPPS0 // bit 0
20914 #define MDCARHPPS1 MDCARHPPSbits.MDCARHPPS1 // bit 1
20915 #define MDCARHPPS2 MDCARHPPSbits.MDCARHPPS2 // bit 2
20916 #define MDCARHPPS3 MDCARHPPSbits.MDCARHPPS3 // bit 3
20917 #define MDCARHPPS4 MDCARHPPSbits.MDCARHPPS4 // bit 4
20919 #define MDCL0 MDCARLbits.MDCL0 // bit 0
20920 #define MDCL1 MDCARLbits.MDCL1 // bit 1
20921 #define MDCL2 MDCARLbits.MDCL2 // bit 2
20922 #define MDCL3 MDCARLbits.MDCL3 // bit 3
20924 #define MDCARLPPS0 MDCARLPPSbits.MDCARLPPS0 // bit 0
20925 #define MDCARLPPS1 MDCARLPPSbits.MDCARLPPS1 // bit 1
20926 #define MDCARLPPS2 MDCARLPPSbits.MDCARLPPS2 // bit 2
20927 #define MDCARLPPS3 MDCARLPPSbits.MDCARLPPS3 // bit 3
20928 #define MDCARLPPS4 MDCARLPPSbits.MDCARLPPS4 // bit 4
20930 #define MDBIT MDCON0bits.MDBIT // bit 0
20931 #define MDOPOL MDCON0bits.MDOPOL // bit 4
20932 #define MDOUT MDCON0bits.MDOUT // bit 5
20933 #define MDEN MDCON0bits.MDEN // bit 7
20935 #define MDCLSYNC MDCON1bits.MDCLSYNC // bit 0
20936 #define MDCLPOL MDCON1bits.MDCLPOL // bit 1
20937 #define MDCHSYNC MDCON1bits.MDCHSYNC // bit 4
20938 #define MDCHPOL MDCON1bits.MDCHPOL // bit 5
20940 #define MDMS0 MDSRCbits.MDMS0 // bit 0
20941 #define MDMS1 MDSRCbits.MDMS1 // bit 1
20942 #define MDMS2 MDSRCbits.MDMS2 // bit 2
20943 #define MDMS3 MDSRCbits.MDMS3 // bit 3
20944 #define MDMS4 MDSRCbits.MDMS4 // bit 4
20946 #define MDSRCPPS0 MDSRCPPSbits.MDSRCPPS0 // bit 0
20947 #define MDSRCPPS1 MDSRCPPSbits.MDSRCPPS1 // bit 1
20948 #define MDSRCPPS2 MDSRCPPSbits.MDSRCPPS2 // bit 2
20949 #define MDSRCPPS3 MDSRCPPSbits.MDSRCPPS3 // bit 3
20950 #define MDSRCPPS4 MDSRCPPSbits.MDSRCPPS4 // bit 4
20952 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
20953 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
20954 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
20955 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
20956 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
20957 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
20958 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
20959 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
20961 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
20962 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
20963 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
20964 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
20965 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
20966 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
20967 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
20968 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
20970 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
20971 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
20972 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
20973 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
20975 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
20976 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
20977 #define N1CKS2 NCO1CLKbits.N1CKS2 // bit 2
20978 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
20979 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
20980 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
20982 #define N1PFM NCO1CONbits.N1PFM // bit 0
20983 #define N1POL NCO1CONbits.N1POL // bit 4
20984 #define N1OUT NCO1CONbits.N1OUT // bit 5
20985 #define N1EN NCO1CONbits.N1EN // bit 7
20987 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
20988 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
20989 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
20990 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
20991 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
20992 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
20993 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
20994 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
20996 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
20997 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
20998 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
20999 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
21000 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
21001 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
21002 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
21003 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
21005 #define NCO1INC16 NCO1INCUbits.NCO1INC16 // bit 0
21006 #define NCO1INC17 NCO1INCUbits.NCO1INC17 // bit 1
21007 #define NCO1INC18 NCO1INCUbits.NCO1INC18 // bit 2
21008 #define NCO1INC19 NCO1INCUbits.NCO1INC19 // bit 3
21010 #define NVMADR8 NVMADRHbits.NVMADR8 // bit 0
21011 #define NVMADR9 NVMADRHbits.NVMADR9 // bit 1
21012 #define NVMADR10 NVMADRHbits.NVMADR10 // bit 2
21013 #define NVMADR11 NVMADRHbits.NVMADR11 // bit 3
21014 #define NVMADR12 NVMADRHbits.NVMADR12 // bit 4
21015 #define NVMADR13 NVMADRHbits.NVMADR13 // bit 5
21016 #define NVMADR14 NVMADRHbits.NVMADR14 // bit 6
21018 #define NVMADR0 NVMADRLbits.NVMADR0 // bit 0
21019 #define NVMADR1 NVMADRLbits.NVMADR1 // bit 1
21020 #define NVMADR2 NVMADRLbits.NVMADR2 // bit 2
21021 #define NVMADR3 NVMADRLbits.NVMADR3 // bit 3
21022 #define NVMADR4 NVMADRLbits.NVMADR4 // bit 4
21023 #define NVMADR5 NVMADRLbits.NVMADR5 // bit 5
21024 #define NVMADR6 NVMADRLbits.NVMADR6 // bit 6
21025 #define NVMADR7 NVMADRLbits.NVMADR7 // bit 7
21027 #define RD NVMCON1bits.RD // bit 0
21028 #define WR NVMCON1bits.WR // bit 1
21029 #define WREN NVMCON1bits.WREN // bit 2
21030 #define WRERR NVMCON1bits.WRERR // bit 3
21031 #define FREE NVMCON1bits.FREE // bit 4
21032 #define LWLO NVMCON1bits.LWLO // bit 5
21033 #define NVMREGS NVMCON1bits.NVMREGS // bit 6
21035 #define NVMDAT8 NVMDATHbits.NVMDAT8 // bit 0
21036 #define NVMDAT9 NVMDATHbits.NVMDAT9 // bit 1
21037 #define NVMDAT10 NVMDATHbits.NVMDAT10 // bit 2
21038 #define NVMDAT11 NVMDATHbits.NVMDAT11 // bit 3
21039 #define NVMDAT12 NVMDATHbits.NVMDAT12 // bit 4
21040 #define NVMDAT13 NVMDATHbits.NVMDAT13 // bit 5
21042 #define NVMDAT0 NVMDATLbits.NVMDAT0 // bit 0
21043 #define NVMDAT1 NVMDATLbits.NVMDAT1 // bit 1
21044 #define NVMDAT2 NVMDATLbits.NVMDAT2 // bit 2
21045 #define NVMDAT3 NVMDATLbits.NVMDAT3 // bit 3
21046 #define NVMDAT4 NVMDATLbits.NVMDAT4 // bit 4
21047 #define NVMDAT5 NVMDATLbits.NVMDAT5 // bit 5
21048 #define NVMDAT6 NVMDATLbits.NVMDAT6 // bit 6
21049 #define NVMDAT7 NVMDATLbits.NVMDAT7 // bit 7
21051 #define ODCA0 ODCONAbits.ODCA0 // bit 0
21052 #define ODCA1 ODCONAbits.ODCA1 // bit 1
21053 #define ODCA2 ODCONAbits.ODCA2 // bit 2
21054 #define ODCA3 ODCONAbits.ODCA3 // bit 3
21055 #define ODCA4 ODCONAbits.ODCA4 // bit 4
21056 #define ODCA5 ODCONAbits.ODCA5 // bit 5
21057 #define ODCA6 ODCONAbits.ODCA6 // bit 6
21058 #define ODCA7 ODCONAbits.ODCA7 // bit 7
21060 #define ODCB0 ODCONBbits.ODCB0 // bit 0
21061 #define ODCB1 ODCONBbits.ODCB1 // bit 1
21062 #define ODCB2 ODCONBbits.ODCB2 // bit 2
21063 #define ODCB3 ODCONBbits.ODCB3 // bit 3
21064 #define ODCB4 ODCONBbits.ODCB4 // bit 4
21065 #define ODCB5 ODCONBbits.ODCB5 // bit 5
21066 #define ODCB6 ODCONBbits.ODCB6 // bit 6
21067 #define ODCB7 ODCONBbits.ODCB7 // bit 7
21069 #define ODCC0 ODCONCbits.ODCC0 // bit 0
21070 #define ODCC1 ODCONCbits.ODCC1 // bit 1
21071 #define ODCC2 ODCONCbits.ODCC2 // bit 2
21072 #define ODCC3 ODCONCbits.ODCC3 // bit 3
21073 #define ODCC4 ODCONCbits.ODCC4 // bit 4
21074 #define ODCC5 ODCONCbits.ODCC5 // bit 5
21075 #define ODCC6 ODCONCbits.ODCC6 // bit 6
21076 #define ODCC7 ODCONCbits.ODCC7 // bit 7
21078 #define ODCD0 ODCONDbits.ODCD0 // bit 0
21079 #define ODCD1 ODCONDbits.ODCD1 // bit 1
21080 #define ODCD2 ODCONDbits.ODCD2 // bit 2
21081 #define ODCD3 ODCONDbits.ODCD3 // bit 3
21082 #define ODCD4 ODCONDbits.ODCD4 // bit 4
21083 #define ODCD5 ODCONDbits.ODCD5 // bit 5
21084 #define ODCD6 ODCONDbits.ODCD6 // bit 6
21085 #define ODCD7 ODCONDbits.ODCD7 // bit 7
21087 #define ODCE0 ODCONEbits.ODCE0 // bit 0
21088 #define ODCE1 ODCONEbits.ODCE1 // bit 1
21089 #define ODCE2 ODCONEbits.ODCE2 // bit 2
21091 #define NDIV0 OSCCON1bits.NDIV0 // bit 0
21092 #define NDIV1 OSCCON1bits.NDIV1 // bit 1
21093 #define NDIV2 OSCCON1bits.NDIV2 // bit 2
21094 #define NDIV3 OSCCON1bits.NDIV3 // bit 3
21095 #define NOSC0 OSCCON1bits.NOSC0 // bit 4
21096 #define NOSC1 OSCCON1bits.NOSC1 // bit 5
21097 #define NOSC2 OSCCON1bits.NOSC2 // bit 6
21099 #define CDIV0 OSCCON2bits.CDIV0 // bit 0
21100 #define CDIV1 OSCCON2bits.CDIV1 // bit 1
21101 #define CDIV2 OSCCON2bits.CDIV2 // bit 2
21102 #define CDIV3 OSCCON2bits.CDIV3 // bit 3
21103 #define COSC0 OSCCON2bits.COSC0 // bit 4
21104 #define COSC1 OSCCON2bits.COSC1 // bit 5
21105 #define COSC2 OSCCON2bits.COSC2 // bit 6
21107 #define NOSCR OSCCON3bits.NOSCR // bit 3
21108 #define ORDY OSCCON3bits.ORDY // bit 4
21109 #define SOSCPWR OSCCON3bits.SOSCPWR // bit 6
21110 #define CSWHOLD OSCCON3bits.CSWHOLD // bit 7
21112 #define ADOEN OSCENbits.ADOEN // bit 2
21113 #define SOSCEN OSCENbits.SOSCEN // bit 3
21114 #define LFOEN OSCENbits.LFOEN // bit 4
21115 #define MFOEN OSCENbits.MFOEN // bit 5
21116 #define HFOEN OSCENbits.HFOEN // bit 6
21117 #define EXTOEN OSCENbits.EXTOEN // bit 7
21119 #define HFFRQ0 OSCFRQbits.HFFRQ0 // bit 0
21120 #define HFFRQ1 OSCFRQbits.HFFRQ1 // bit 1
21121 #define HFFRQ2 OSCFRQbits.HFFRQ2 // bit 2
21123 #define PLLR OSCSTATbits.PLLR // bit 0
21124 #define ADOR OSCSTATbits.ADOR // bit 2
21125 #define SOR OSCSTATbits.SOR // bit 3
21126 #define LFOR OSCSTATbits.LFOR // bit 4
21127 #define MFOR OSCSTATbits.MFOR // bit 5
21128 #define HFOR OSCSTATbits.HFOR // bit 6
21129 #define EXTOR OSCSTATbits.EXTOR // bit 7
21131 #define HFTUN0 OSCTUNEbits.HFTUN0 // bit 0
21132 #define HFTUN1 OSCTUNEbits.HFTUN1 // bit 1
21133 #define HFTUN2 OSCTUNEbits.HFTUN2 // bit 2
21134 #define HFTUN3 OSCTUNEbits.HFTUN3 // bit 3
21135 #define HFTUN4 OSCTUNEbits.HFTUN4 // bit 4
21136 #define HFTUN5 OSCTUNEbits.HFTUN5 // bit 5
21138 #define NOT_BOR PCON0bits.NOT_BOR // bit 0
21139 #define NOT_POR PCON0bits.NOT_POR // bit 1
21140 #define NOT_RI PCON0bits.NOT_RI // bit 2
21141 #define NOT_RMCLR PCON0bits.NOT_RMCLR // bit 3
21142 #define NOT_RWDT PCON0bits.NOT_RWDT // bit 4
21143 #define NOT_WDTWV PCON0bits.NOT_WDTWV // bit 5
21144 #define STKUNF PCON0bits.STKUNF // bit 6
21145 #define STKOVF PCON0bits.STKOVF // bit 7
21147 #define INTE PIE0bits.INTE // bit 0
21148 #define IOCIE PIE0bits.IOCIE // bit 4
21149 #define TMR0IE PIE0bits.TMR0IE // bit 5
21151 #define ADIE PIE1bits.ADIE // bit 0
21152 #define ADTIE PIE1bits.ADTIE // bit 1
21153 #define CSWIE PIE1bits.CSWIE // bit 6
21154 #define OSFIE PIE1bits.OSFIE // bit 7
21156 #define C1IE PIE2bits.C1IE // bit 0
21157 #define C2IE PIE2bits.C2IE // bit 1
21158 #define ZCDIE PIE2bits.ZCDIE // bit 6
21160 #define SSP1IE PIE3bits.SSP1IE // bit 0
21161 #define BCL1IE PIE3bits.BCL1IE // bit 1
21162 #define SSP2IE PIE3bits.SSP2IE // bit 2
21163 #define BCL2IE PIE3bits.BCL2IE // bit 3
21164 #define TXIE PIE3bits.TXIE // bit 4
21165 #define RCIE PIE3bits.RCIE // bit 5
21167 #define TMR1IE PIE4bits.TMR1IE // bit 0
21168 #define TMR2IE PIE4bits.TMR2IE // bit 1
21169 #define TMR3IE PIE4bits.TMR3IE // bit 2
21170 #define TMR4IE PIE4bits.TMR4IE // bit 3
21171 #define TMR5IE PIE4bits.TMR5IE // bit 4
21172 #define TMR6IE PIE4bits.TMR6IE // bit 5
21174 #define TMR1GIE PIE5bits.TMR1GIE // bit 0
21175 #define TMR3GIE PIE5bits.TMR3GIE // bit 1
21176 #define TMR5GIE PIE5bits.TMR5GIE // bit 2
21177 #define CLC1IE PIE5bits.CLC1IE // bit 4
21178 #define CLC2IE PIE5bits.CLC2IE // bit 5
21179 #define CLC3IE PIE5bits.CLC3IE // bit 6
21180 #define CLC4IE PIE5bits.CLC4IE // bit 7
21182 #define CCP1IE PIE6bits.CCP1IE // bit 0
21183 #define CCP2IE PIE6bits.CCP2IE // bit 1
21184 #define CCP3IE PIE6bits.CCP3IE // bit 2
21185 #define CCP4IE PIE6bits.CCP4IE // bit 3
21186 #define CCP5IE PIE6bits.CCP5IE // bit 4
21188 #define CWG1IE PIE7bits.CWG1IE // bit 0
21189 #define CWG2IE PIE7bits.CWG2IE // bit 1
21190 #define CWG3IE PIE7bits.CWG3IE // bit 2
21191 #define NCO1IE PIE7bits.NCO1IE // bit 4, shadows bit in PIE7bits
21192 #define NCOIE PIE7bits.NCOIE // bit 4, shadows bit in PIE7bits
21193 #define NVMIE PIE7bits.NVMIE // bit 5
21194 #define CRCIE PIE7bits.CRCIE // bit 6
21195 #define SCANIE PIE7bits.SCANIE // bit 7
21197 #define SMT1IE PIE8bits.SMT1IE // bit 0
21198 #define SMT1PRAIE PIE8bits.SMT1PRAIE // bit 1
21199 #define SMT1PWAIE PIE8bits.SMT1PWAIE // bit 2
21200 #define SMT2IE PIE8bits.SMT2IE // bit 3
21201 #define SMT2PRAIE PIE8bits.SMT2PRAIE // bit 4
21202 #define SMT2PWAIE PIE8bits.SMT2PWAIE // bit 5
21204 #define INTF PIR0bits.INTF // bit 0
21205 #define IOCIF PIR0bits.IOCIF // bit 4
21206 #define TMR0IF PIR0bits.TMR0IF // bit 5
21208 #define ADIF PIR1bits.ADIF // bit 0
21209 #define ADTIF PIR1bits.ADTIF // bit 1
21210 #define CSWIF PIR1bits.CSWIF // bit 6
21211 #define OSFIF PIR1bits.OSFIF // bit 7
21213 #define C1IF PIR2bits.C1IF // bit 0
21214 #define C2IF PIR2bits.C2IF // bit 1
21215 #define ZCDIF PIR2bits.ZCDIF // bit 6
21217 #define SSP1IF PIR3bits.SSP1IF // bit 0
21218 #define BCL1IF PIR3bits.BCL1IF // bit 1
21219 #define SSP2IF PIR3bits.SSP2IF // bit 2
21220 #define BCL2IF PIR3bits.BCL2IF // bit 3
21221 #define TXIF PIR3bits.TXIF // bit 4
21222 #define RCIF PIR3bits.RCIF // bit 5
21224 #define TMR1IF PIR4bits.TMR1IF // bit 0
21225 #define TMR2IF PIR4bits.TMR2IF // bit 1
21226 #define TMR3IF PIR4bits.TMR3IF // bit 2
21227 #define TMR4IF PIR4bits.TMR4IF // bit 3
21228 #define TMR5IF PIR4bits.TMR5IF // bit 4
21229 #define TMR6IF PIR4bits.TMR6IF // bit 5
21231 #define TMR1GIF PIR5bits.TMR1GIF // bit 0
21232 #define TMR3GIF PIR5bits.TMR3GIF // bit 1
21233 #define TMR5GIF PIR5bits.TMR5GIF // bit 2
21234 #define CLC1IF PIR5bits.CLC1IF // bit 4
21235 #define CLC2IF PIR5bits.CLC2IF // bit 5
21236 #define CLC3IF PIR5bits.CLC3IF // bit 6
21237 #define CLC4IF PIR5bits.CLC4IF // bit 7
21239 #define CCP1IF PIR6bits.CCP1IF // bit 0
21240 #define CCP2IF PIR6bits.CCP2IF // bit 1
21241 #define CCP3IF PIR6bits.CCP3IF // bit 2
21242 #define CCP4IF PIR6bits.CCP4IF // bit 3
21243 #define CCP5IF PIR6bits.CCP5IF // bit 4
21245 #define CWG1IF PIR7bits.CWG1IF // bit 0
21246 #define CWG2IF PIR7bits.CWG2IF // bit 1
21247 #define CWG3IF PIR7bits.CWG3IF // bit 2
21248 #define NCO1IF PIR7bits.NCO1IF // bit 4, shadows bit in PIR7bits
21249 #define NCOIF PIR7bits.NCOIF // bit 4, shadows bit in PIR7bits
21250 #define NVMIF PIR7bits.NVMIF // bit 5
21251 #define CRCIF PIR7bits.CRCIF // bit 6
21252 #define SCANIF PIR7bits.SCANIF // bit 7
21254 #define SMT1IF PIR8bits.SMT1IF // bit 0
21255 #define SMT1PRAIF PIR8bits.SMT1PRAIF // bit 1
21256 #define SMT1PWAIF PIR8bits.SMT1PWAIF // bit 2
21257 #define SMT2IF PIR8bits.SMT2IF // bit 3
21258 #define SMT2PRAIF PIR8bits.SMT2PRAIF // bit 4
21259 #define SMT2PWAIF PIR8bits.SMT2PWAIF // bit 5
21261 #define IOCMD PMD0bits.IOCMD // bit 0
21262 #define CLKRMD PMD0bits.CLKRMD // bit 1
21263 #define NVMMD PMD0bits.NVMMD // bit 2
21264 #define SCANMD PMD0bits.SCANMD // bit 3
21265 #define CRCMD PMD0bits.CRCMD // bit 4
21266 #define FVRMD PMD0bits.FVRMD // bit 6
21267 #define SYSCMD PMD0bits.SYSCMD // bit 7
21269 #define TMR0MD PMD1bits.TMR0MD // bit 0
21270 #define TMR1MD PMD1bits.TMR1MD // bit 1
21271 #define TMR2MD PMD1bits.TMR2MD // bit 2
21272 #define TMR3MD PMD1bits.TMR3MD // bit 3
21273 #define TMR4MD PMD1bits.TMR4MD // bit 4
21274 #define TMR5MD PMD1bits.TMR5MD // bit 5
21275 #define TMR6MD PMD1bits.TMR6MD // bit 6
21276 #define NCOMD PMD1bits.NCOMD // bit 7, shadows bit in PMD1bits
21277 #define NCO1MD PMD1bits.NCO1MD // bit 7, shadows bit in PMD1bits
21279 #define ZCDMD PMD2bits.ZCDMD // bit 0
21280 #define CMP1MD PMD2bits.CMP1MD // bit 1
21281 #define CMP2MD PMD2bits.CMP2MD // bit 2
21282 #define ADCMD PMD2bits.ADCMD // bit 5
21283 #define DACMD PMD2bits.DACMD // bit 6
21285 #define CCP1MD PMD3bits.CCP1MD // bit 0
21286 #define CCP2MD PMD3bits.CCP2MD // bit 1
21287 #define CCP3MD PMD3bits.CCP3MD // bit 2
21288 #define CCP4MD PMD3bits.CCP4MD // bit 3
21289 #define CCP5MD PMD3bits.CCP5MD // bit 4
21290 #define PWM6MD PMD3bits.PWM6MD // bit 5
21291 #define PWM7MD PMD3bits.PWM7MD // bit 6
21293 #define CWG1MD PMD4bits.CWG1MD // bit 0
21294 #define CWG2MD PMD4bits.CWG2MD // bit 1
21295 #define CWG3MD PMD4bits.CWG3MD // bit 2
21296 #define MSSP1MD PMD4bits.MSSP1MD // bit 4
21297 #define MSSP2MD PMD4bits.MSSP2MD // bit 5
21298 #define UART1MD PMD4bits.UART1MD // bit 6
21300 #define DSMMD PMD5bits.DSMMD // bit 0
21301 #define CLC1MD PMD5bits.CLC1MD // bit 1
21302 #define CLC2MD PMD5bits.CLC2MD // bit 2
21303 #define CLC3MD PMD5bits.CLC3MD // bit 3
21304 #define CLC4MD PMD5bits.CLC4MD // bit 4
21305 #define SMT1MD PMD5bits.SMT1MD // bit 6
21306 #define SMT2MD PMD5bits.SMT2MD // bit 7
21308 #define RA0 PORTAbits.RA0 // bit 0
21309 #define RA1 PORTAbits.RA1 // bit 1
21310 #define RA2 PORTAbits.RA2 // bit 2
21311 #define RA3 PORTAbits.RA3 // bit 3
21312 #define RA4 PORTAbits.RA4 // bit 4
21313 #define RA5 PORTAbits.RA5 // bit 5
21314 #define RA6 PORTAbits.RA6 // bit 6
21315 #define RA7 PORTAbits.RA7 // bit 7
21317 #define RB0 PORTBbits.RB0 // bit 0
21318 #define RB1 PORTBbits.RB1 // bit 1
21319 #define RB2 PORTBbits.RB2 // bit 2
21320 #define RB3 PORTBbits.RB3 // bit 3
21321 #define RB4 PORTBbits.RB4 // bit 4
21322 #define RB5 PORTBbits.RB5 // bit 5
21323 #define RB6 PORTBbits.RB6 // bit 6
21324 #define RB7 PORTBbits.RB7 // bit 7
21326 #define RC0 PORTCbits.RC0 // bit 0
21327 #define RC1 PORTCbits.RC1 // bit 1
21328 #define RC2 PORTCbits.RC2 // bit 2
21329 #define RC3 PORTCbits.RC3 // bit 3
21330 #define RC4 PORTCbits.RC4 // bit 4
21331 #define RC5 PORTCbits.RC5 // bit 5
21332 #define RC6 PORTCbits.RC6 // bit 6
21333 #define RC7 PORTCbits.RC7 // bit 7
21335 #define RD0 PORTDbits.RD0 // bit 0
21336 #define RD1 PORTDbits.RD1 // bit 1
21337 #define RD2 PORTDbits.RD2 // bit 2
21338 #define RD3 PORTDbits.RD3 // bit 3
21339 #define RD4 PORTDbits.RD4 // bit 4
21340 #define RD5 PORTDbits.RD5 // bit 5
21341 #define RD6 PORTDbits.RD6 // bit 6
21342 #define RD7 PORTDbits.RD7 // bit 7
21344 #define RE0 PORTEbits.RE0 // bit 0
21345 #define RE1 PORTEbits.RE1 // bit 1
21346 #define RE2 PORTEbits.RE2 // bit 2
21347 #define RE3 PORTEbits.RE3 // bit 3
21349 #define PPSLOCKED PPSLOCKbits.PPSLOCKED // bit 0
21351 #define TMR0H0 PR0bits.TMR0H0 // bit 0, shadows bit in PR0bits
21352 #define T0PR0 PR0bits.T0PR0 // bit 0, shadows bit in PR0bits
21353 #define TMR0H1 PR0bits.TMR0H1 // bit 1, shadows bit in PR0bits
21354 #define T0PR1 PR0bits.T0PR1 // bit 1, shadows bit in PR0bits
21355 #define TMR0H2 PR0bits.TMR0H2 // bit 2, shadows bit in PR0bits
21356 #define T0PR2 PR0bits.T0PR2 // bit 2, shadows bit in PR0bits
21357 #define TMR0H3 PR0bits.TMR0H3 // bit 3, shadows bit in PR0bits
21358 #define T0PR3 PR0bits.T0PR3 // bit 3, shadows bit in PR0bits
21359 #define TMR0H4 PR0bits.TMR0H4 // bit 4, shadows bit in PR0bits
21360 #define T0PR4 PR0bits.T0PR4 // bit 4, shadows bit in PR0bits
21361 #define TMR0H5 PR0bits.TMR0H5 // bit 5, shadows bit in PR0bits
21362 #define T0PR5 PR0bits.T0PR5 // bit 5, shadows bit in PR0bits
21363 #define TMR0H6 PR0bits.TMR0H6 // bit 6, shadows bit in PR0bits
21364 #define T0PR6 PR0bits.T0PR6 // bit 6, shadows bit in PR0bits
21365 #define TMR0H7 PR0bits.TMR0H7 // bit 7, shadows bit in PR0bits
21366 #define T0PR7 PR0bits.T0PR7 // bit 7, shadows bit in PR0bits
21368 #define GVAL PR1bits.GVAL // bit 2, shadows bit in PR1bits
21369 #define T1GVAL PR1bits.T1GVAL // bit 2, shadows bit in PR1bits
21370 #define GGO_NOT_DONE PR1bits.GGO_NOT_DONE // bit 3, shadows bit in PR1bits
21371 #define T1GGO_NOT_DONE PR1bits.T1GGO_NOT_DONE // bit 3, shadows bit in PR1bits
21372 #define T1GGO PR1bits.T1GGO // bit 3, shadows bit in PR1bits
21373 #define GSPM PR1bits.GSPM // bit 4, shadows bit in PR1bits
21374 #define T1GSPM PR1bits.T1GSPM // bit 4, shadows bit in PR1bits
21375 #define GTM PR1bits.GTM // bit 5, shadows bit in PR1bits
21376 #define T1GTM PR1bits.T1GTM // bit 5, shadows bit in PR1bits
21377 #define GPOL PR1bits.GPOL // bit 6, shadows bit in PR1bits
21378 #define T1GPOL PR1bits.T1GPOL // bit 6, shadows bit in PR1bits
21379 #define GE PR1bits.GE // bit 7, shadows bit in PR1bits
21380 #define T1GE PR1bits.T1GE // bit 7, shadows bit in PR1bits
21382 #define DC2 PWM6DCHbits.DC2 // bit 0, shadows bit in PWM6DCHbits
21383 #define PWM6DC2 PWM6DCHbits.PWM6DC2 // bit 0, shadows bit in PWM6DCHbits
21384 #define PWMPW2 PWM6DCHbits.PWMPW2 // bit 0, shadows bit in PWM6DCHbits
21385 #define DC3 PWM6DCHbits.DC3 // bit 1, shadows bit in PWM6DCHbits
21386 #define PWM6DC3 PWM6DCHbits.PWM6DC3 // bit 1, shadows bit in PWM6DCHbits
21387 #define PWMPW3 PWM6DCHbits.PWMPW3 // bit 1, shadows bit in PWM6DCHbits
21388 #define DC4 PWM6DCHbits.DC4 // bit 2, shadows bit in PWM6DCHbits
21389 #define PWM6DC4 PWM6DCHbits.PWM6DC4 // bit 2, shadows bit in PWM6DCHbits
21390 #define PWMPW4 PWM6DCHbits.PWMPW4 // bit 2, shadows bit in PWM6DCHbits
21391 #define DC5 PWM6DCHbits.DC5 // bit 3, shadows bit in PWM6DCHbits
21392 #define PWM6DC5 PWM6DCHbits.PWM6DC5 // bit 3, shadows bit in PWM6DCHbits
21393 #define PWMPW5 PWM6DCHbits.PWMPW5 // bit 3, shadows bit in PWM6DCHbits
21394 #define DC6 PWM6DCHbits.DC6 // bit 4, shadows bit in PWM6DCHbits
21395 #define PWM6DC6 PWM6DCHbits.PWM6DC6 // bit 4, shadows bit in PWM6DCHbits
21396 #define PWMPW6 PWM6DCHbits.PWMPW6 // bit 4, shadows bit in PWM6DCHbits
21397 #define DC7 PWM6DCHbits.DC7 // bit 5, shadows bit in PWM6DCHbits
21398 #define PWM6DC7 PWM6DCHbits.PWM6DC7 // bit 5, shadows bit in PWM6DCHbits
21399 #define PWMPW7 PWM6DCHbits.PWMPW7 // bit 5, shadows bit in PWM6DCHbits
21400 #define DC8 PWM6DCHbits.DC8 // bit 6, shadows bit in PWM6DCHbits
21401 #define PWM6DC8 PWM6DCHbits.PWM6DC8 // bit 6, shadows bit in PWM6DCHbits
21402 #define PWMPW8 PWM6DCHbits.PWMPW8 // bit 6, shadows bit in PWM6DCHbits
21403 #define DC9 PWM6DCHbits.DC9 // bit 7, shadows bit in PWM6DCHbits
21404 #define PWM6DC9 PWM6DCHbits.PWM6DC9 // bit 7, shadows bit in PWM6DCHbits
21405 #define PWMPW9 PWM6DCHbits.PWMPW9 // bit 7, shadows bit in PWM6DCHbits
21407 #define DC0 PWM6DCLbits.DC0 // bit 6, shadows bit in PWM6DCLbits
21408 #define PWM6DC0 PWM6DCLbits.PWM6DC0 // bit 6, shadows bit in PWM6DCLbits
21409 #define PWMPW0 PWM6DCLbits.PWMPW0 // bit 6, shadows bit in PWM6DCLbits
21410 #define DC1 PWM6DCLbits.DC1 // bit 7, shadows bit in PWM6DCLbits
21411 #define PWM6DC1 PWM6DCLbits.PWM6DC1 // bit 7, shadows bit in PWM6DCLbits
21412 #define PWMPW1 PWM6DCLbits.PWMPW1 // bit 7, shadows bit in PWM6DCLbits
21414 #define RA0PPS0 RA0PPSbits.RA0PPS0 // bit 0
21415 #define RA0PPS1 RA0PPSbits.RA0PPS1 // bit 1
21416 #define RA0PPS2 RA0PPSbits.RA0PPS2 // bit 2
21417 #define RA0PPS3 RA0PPSbits.RA0PPS3 // bit 3
21418 #define RA0PPS4 RA0PPSbits.RA0PPS4 // bit 4
21419 #define RA0PPS5 RA0PPSbits.RA0PPS5 // bit 5
21421 #define RA1PPS0 RA1PPSbits.RA1PPS0 // bit 0
21422 #define RA1PPS1 RA1PPSbits.RA1PPS1 // bit 1
21423 #define RA1PPS2 RA1PPSbits.RA1PPS2 // bit 2
21424 #define RA1PPS3 RA1PPSbits.RA1PPS3 // bit 3
21425 #define RA1PPS4 RA1PPSbits.RA1PPS4 // bit 4
21426 #define RA1PPS5 RA1PPSbits.RA1PPS5 // bit 5
21428 #define RA2PPS0 RA2PPSbits.RA2PPS0 // bit 0
21429 #define RA2PPS1 RA2PPSbits.RA2PPS1 // bit 1
21430 #define RA2PPS2 RA2PPSbits.RA2PPS2 // bit 2
21431 #define RA2PPS3 RA2PPSbits.RA2PPS3 // bit 3
21432 #define RA2PPS4 RA2PPSbits.RA2PPS4 // bit 4
21433 #define RA2PPS5 RA2PPSbits.RA2PPS5 // bit 5
21435 #define RA3PPS0 RA3PPSbits.RA3PPS0 // bit 0
21436 #define RA3PPS1 RA3PPSbits.RA3PPS1 // bit 1
21437 #define RA3PPS2 RA3PPSbits.RA3PPS2 // bit 2
21438 #define RA3PPS3 RA3PPSbits.RA3PPS3 // bit 3
21439 #define RA3PPS4 RA3PPSbits.RA3PPS4 // bit 4
21440 #define RA3PPS5 RA3PPSbits.RA3PPS5 // bit 5
21442 #define RA4PPS0 RA4PPSbits.RA4PPS0 // bit 0
21443 #define RA4PPS1 RA4PPSbits.RA4PPS1 // bit 1
21444 #define RA4PPS2 RA4PPSbits.RA4PPS2 // bit 2
21445 #define RA4PPS3 RA4PPSbits.RA4PPS3 // bit 3
21446 #define RA4PPS4 RA4PPSbits.RA4PPS4 // bit 4
21447 #define RA4PPS5 RA4PPSbits.RA4PPS5 // bit 5
21449 #define RA5PPS0 RA5PPSbits.RA5PPS0 // bit 0
21450 #define RA5PPS1 RA5PPSbits.RA5PPS1 // bit 1
21451 #define RA5PPS2 RA5PPSbits.RA5PPS2 // bit 2
21452 #define RA5PPS3 RA5PPSbits.RA5PPS3 // bit 3
21453 #define RA5PPS4 RA5PPSbits.RA5PPS4 // bit 4
21454 #define RA5PPS5 RA5PPSbits.RA5PPS5 // bit 5
21456 #define RA6PPS0 RA6PPSbits.RA6PPS0 // bit 0
21457 #define RA6PPS1 RA6PPSbits.RA6PPS1 // bit 1
21458 #define RA6PPS2 RA6PPSbits.RA6PPS2 // bit 2
21459 #define RA6PPS3 RA6PPSbits.RA6PPS3 // bit 3
21460 #define RA6PPS4 RA6PPSbits.RA6PPS4 // bit 4
21461 #define RA6PPS5 RA6PPSbits.RA6PPS5 // bit 5
21463 #define RA7PPS0 RA7PPSbits.RA7PPS0 // bit 0
21464 #define RA7PPS1 RA7PPSbits.RA7PPS1 // bit 1
21465 #define RA7PPS2 RA7PPSbits.RA7PPS2 // bit 2
21466 #define RA7PPS3 RA7PPSbits.RA7PPS3 // bit 3
21467 #define RA7PPS4 RA7PPSbits.RA7PPS4 // bit 4
21468 #define RA7PPS5 RA7PPSbits.RA7PPS5 // bit 5
21470 #define RB0PPS0 RB0PPSbits.RB0PPS0 // bit 0
21471 #define RB0PPS1 RB0PPSbits.RB0PPS1 // bit 1
21472 #define RB0PPS2 RB0PPSbits.RB0PPS2 // bit 2
21473 #define RB0PPS3 RB0PPSbits.RB0PPS3 // bit 3
21474 #define RB0PPS4 RB0PPSbits.RB0PPS4 // bit 4
21475 #define RB0PPS5 RB0PPSbits.RB0PPS5 // bit 5
21477 #define RB1PPS0 RB1PPSbits.RB1PPS0 // bit 0
21478 #define RB1PPS1 RB1PPSbits.RB1PPS1 // bit 1
21479 #define RB1PPS2 RB1PPSbits.RB1PPS2 // bit 2
21480 #define RB1PPS3 RB1PPSbits.RB1PPS3 // bit 3
21481 #define RB1PPS4 RB1PPSbits.RB1PPS4 // bit 4
21482 #define RB1PPS5 RB1PPSbits.RB1PPS5 // bit 5
21484 #define RB2PPS0 RB2PPSbits.RB2PPS0 // bit 0
21485 #define RB2PPS1 RB2PPSbits.RB2PPS1 // bit 1
21486 #define RB2PPS2 RB2PPSbits.RB2PPS2 // bit 2
21487 #define RB2PPS3 RB2PPSbits.RB2PPS3 // bit 3
21488 #define RB2PPS4 RB2PPSbits.RB2PPS4 // bit 4
21489 #define RB2PPS5 RB2PPSbits.RB2PPS5 // bit 5
21491 #define RB3PPS0 RB3PPSbits.RB3PPS0 // bit 0
21492 #define RB3PPS1 RB3PPSbits.RB3PPS1 // bit 1
21493 #define RB3PPS2 RB3PPSbits.RB3PPS2 // bit 2
21494 #define RB3PPS3 RB3PPSbits.RB3PPS3 // bit 3
21495 #define RB3PPS4 RB3PPSbits.RB3PPS4 // bit 4
21496 #define RB3PPS5 RB3PPSbits.RB3PPS5 // bit 5
21498 #define RB4PPS0 RB4PPSbits.RB4PPS0 // bit 0
21499 #define RB4PPS1 RB4PPSbits.RB4PPS1 // bit 1
21500 #define RB4PPS2 RB4PPSbits.RB4PPS2 // bit 2
21501 #define RB4PPS3 RB4PPSbits.RB4PPS3 // bit 3
21502 #define RB4PPS4 RB4PPSbits.RB4PPS4 // bit 4
21503 #define RB4PPS5 RB4PPSbits.RB4PPS5 // bit 5
21505 #define RB5PPS0 RB5PPSbits.RB5PPS0 // bit 0
21506 #define RB5PPS1 RB5PPSbits.RB5PPS1 // bit 1
21507 #define RB5PPS2 RB5PPSbits.RB5PPS2 // bit 2
21508 #define RB5PPS3 RB5PPSbits.RB5PPS3 // bit 3
21509 #define RB5PPS4 RB5PPSbits.RB5PPS4 // bit 4
21510 #define RB5PPS5 RB5PPSbits.RB5PPS5 // bit 5
21512 #define RB6PPS0 RB6PPSbits.RB6PPS0 // bit 0
21513 #define RB6PPS1 RB6PPSbits.RB6PPS1 // bit 1
21514 #define RB6PPS2 RB6PPSbits.RB6PPS2 // bit 2
21515 #define RB6PPS3 RB6PPSbits.RB6PPS3 // bit 3
21516 #define RB6PPS4 RB6PPSbits.RB6PPS4 // bit 4
21517 #define RB6PPS5 RB6PPSbits.RB6PPS5 // bit 5
21519 #define RB7PPS0 RB7PPSbits.RB7PPS0 // bit 0
21520 #define RB7PPS1 RB7PPSbits.RB7PPS1 // bit 1
21521 #define RB7PPS2 RB7PPSbits.RB7PPS2 // bit 2
21522 #define RB7PPS3 RB7PPSbits.RB7PPS3 // bit 3
21523 #define RB7PPS4 RB7PPSbits.RB7PPS4 // bit 4
21524 #define RB7PPS5 RB7PPSbits.RB7PPS5 // bit 5
21526 #define RC0PPS0 RC0PPSbits.RC0PPS0 // bit 0
21527 #define RC0PPS1 RC0PPSbits.RC0PPS1 // bit 1
21528 #define RC0PPS2 RC0PPSbits.RC0PPS2 // bit 2
21529 #define RC0PPS3 RC0PPSbits.RC0PPS3 // bit 3
21530 #define RC0PPS4 RC0PPSbits.RC0PPS4 // bit 4
21531 #define RC0PPS5 RC0PPSbits.RC0PPS5 // bit 5
21533 #define RC1PPS0 RC1PPSbits.RC1PPS0 // bit 0
21534 #define RC1PPS1 RC1PPSbits.RC1PPS1 // bit 1
21535 #define RC1PPS2 RC1PPSbits.RC1PPS2 // bit 2
21536 #define RC1PPS3 RC1PPSbits.RC1PPS3 // bit 3
21537 #define RC1PPS4 RC1PPSbits.RC1PPS4 // bit 4
21538 #define RC1PPS5 RC1PPSbits.RC1PPS5 // bit 5
21540 #define RX9D RC1STAbits.RX9D // bit 0
21541 #define OERR RC1STAbits.OERR // bit 1
21542 #define FERR RC1STAbits.FERR // bit 2
21543 #define ADDEN RC1STAbits.ADDEN // bit 3
21544 #define CREN RC1STAbits.CREN // bit 4
21545 #define SREN RC1STAbits.SREN // bit 5
21546 #define RX9 RC1STAbits.RX9 // bit 6
21547 #define SPEN RC1STAbits.SPEN // bit 7
21549 #define RC2PPS0 RC2PPSbits.RC2PPS0 // bit 0
21550 #define RC2PPS1 RC2PPSbits.RC2PPS1 // bit 1
21551 #define RC2PPS2 RC2PPSbits.RC2PPS2 // bit 2
21552 #define RC2PPS3 RC2PPSbits.RC2PPS3 // bit 3
21553 #define RC2PPS4 RC2PPSbits.RC2PPS4 // bit 4
21554 #define RC2PPS5 RC2PPSbits.RC2PPS5 // bit 5
21556 #define RC3PPS0 RC3PPSbits.RC3PPS0 // bit 0
21557 #define RC3PPS1 RC3PPSbits.RC3PPS1 // bit 1
21558 #define RC3PPS2 RC3PPSbits.RC3PPS2 // bit 2
21559 #define RC3PPS3 RC3PPSbits.RC3PPS3 // bit 3
21560 #define RC3PPS4 RC3PPSbits.RC3PPS4 // bit 4
21561 #define RC3PPS5 RC3PPSbits.RC3PPS5 // bit 5
21563 #define RC4PPS0 RC4PPSbits.RC4PPS0 // bit 0
21564 #define RC4PPS1 RC4PPSbits.RC4PPS1 // bit 1
21565 #define RC4PPS2 RC4PPSbits.RC4PPS2 // bit 2
21566 #define RC4PPS3 RC4PPSbits.RC4PPS3 // bit 3
21567 #define RC4PPS4 RC4PPSbits.RC4PPS4 // bit 4
21568 #define RC4PPS5 RC4PPSbits.RC4PPS5 // bit 5
21570 #define RC5PPS0 RC5PPSbits.RC5PPS0 // bit 0
21571 #define RC5PPS1 RC5PPSbits.RC5PPS1 // bit 1
21572 #define RC5PPS2 RC5PPSbits.RC5PPS2 // bit 2
21573 #define RC5PPS3 RC5PPSbits.RC5PPS3 // bit 3
21574 #define RC5PPS4 RC5PPSbits.RC5PPS4 // bit 4
21575 #define RC5PPS5 RC5PPSbits.RC5PPS5 // bit 5
21577 #define RC6PPS0 RC6PPSbits.RC6PPS0 // bit 0
21578 #define RC6PPS1 RC6PPSbits.RC6PPS1 // bit 1
21579 #define RC6PPS2 RC6PPSbits.RC6PPS2 // bit 2
21580 #define RC6PPS3 RC6PPSbits.RC6PPS3 // bit 3
21581 #define RC6PPS4 RC6PPSbits.RC6PPS4 // bit 4
21582 #define RC6PPS5 RC6PPSbits.RC6PPS5 // bit 5
21584 #define RC7PPS0 RC7PPSbits.RC7PPS0 // bit 0
21585 #define RC7PPS1 RC7PPSbits.RC7PPS1 // bit 1
21586 #define RC7PPS2 RC7PPSbits.RC7PPS2 // bit 2
21587 #define RC7PPS3 RC7PPSbits.RC7PPS3 // bit 3
21588 #define RC7PPS4 RC7PPSbits.RC7PPS4 // bit 4
21589 #define RC7PPS5 RC7PPSbits.RC7PPS5 // bit 5
21591 #define RD0PPS0 RD0PPSbits.RD0PPS0 // bit 0
21592 #define RD0PPS1 RD0PPSbits.RD0PPS1 // bit 1
21593 #define RD0PPS2 RD0PPSbits.RD0PPS2 // bit 2
21594 #define RD0PPS3 RD0PPSbits.RD0PPS3 // bit 3
21595 #define RD0PPS4 RD0PPSbits.RD0PPS4 // bit 4
21596 #define RD0PPS5 RD0PPSbits.RD0PPS5 // bit 5
21598 #define RD1PPS0 RD1PPSbits.RD1PPS0 // bit 0
21599 #define RD1PPS1 RD1PPSbits.RD1PPS1 // bit 1
21600 #define RD1PPS2 RD1PPSbits.RD1PPS2 // bit 2
21601 #define RD1PPS3 RD1PPSbits.RD1PPS3 // bit 3
21602 #define RD1PPS4 RD1PPSbits.RD1PPS4 // bit 4
21603 #define RD1PPS5 RD1PPSbits.RD1PPS5 // bit 5
21605 #define RD2PPS0 RD2PPSbits.RD2PPS0 // bit 0
21606 #define RD2PPS1 RD2PPSbits.RD2PPS1 // bit 1
21607 #define RD2PPS2 RD2PPSbits.RD2PPS2 // bit 2
21608 #define RD2PPS3 RD2PPSbits.RD2PPS3 // bit 3
21609 #define RD2PPS4 RD2PPSbits.RD2PPS4 // bit 4
21610 #define RD2PPS5 RD2PPSbits.RD2PPS5 // bit 5
21612 #define RD3PPS0 RD3PPSbits.RD3PPS0 // bit 0
21613 #define RD3PPS1 RD3PPSbits.RD3PPS1 // bit 1
21614 #define RD3PPS2 RD3PPSbits.RD3PPS2 // bit 2
21615 #define RD3PPS3 RD3PPSbits.RD3PPS3 // bit 3
21616 #define RD3PPS4 RD3PPSbits.RD3PPS4 // bit 4
21617 #define RD3PPS5 RD3PPSbits.RD3PPS5 // bit 5
21619 #define RD4PPS0 RD4PPSbits.RD4PPS0 // bit 0
21620 #define RD4PPS1 RD4PPSbits.RD4PPS1 // bit 1
21621 #define RD4PPS2 RD4PPSbits.RD4PPS2 // bit 2
21622 #define RD4PPS3 RD4PPSbits.RD4PPS3 // bit 3
21623 #define RD4PPS4 RD4PPSbits.RD4PPS4 // bit 4
21624 #define RD4PPS5 RD4PPSbits.RD4PPS5 // bit 5
21626 #define RD5PPS0 RD5PPSbits.RD5PPS0 // bit 0
21627 #define RD5PPS1 RD5PPSbits.RD5PPS1 // bit 1
21628 #define RD5PPS2 RD5PPSbits.RD5PPS2 // bit 2
21629 #define RD5PPS3 RD5PPSbits.RD5PPS3 // bit 3
21630 #define RD5PPS4 RD5PPSbits.RD5PPS4 // bit 4
21631 #define RD5PPS5 RD5PPSbits.RD5PPS5 // bit 5
21633 #define RD6PPS0 RD6PPSbits.RD6PPS0 // bit 0
21634 #define RD6PPS1 RD6PPSbits.RD6PPS1 // bit 1
21635 #define RD6PPS2 RD6PPSbits.RD6PPS2 // bit 2
21636 #define RD6PPS3 RD6PPSbits.RD6PPS3 // bit 3
21637 #define RD6PPS4 RD6PPSbits.RD6PPS4 // bit 4
21638 #define RD6PPS5 RD6PPSbits.RD6PPS5 // bit 5
21640 #define RD7PPS0 RD7PPSbits.RD7PPS0 // bit 0
21641 #define RD7PPS1 RD7PPSbits.RD7PPS1 // bit 1
21642 #define RD7PPS2 RD7PPSbits.RD7PPS2 // bit 2
21643 #define RD7PPS3 RD7PPSbits.RD7PPS3 // bit 3
21644 #define RD7PPS4 RD7PPSbits.RD7PPS4 // bit 4
21645 #define RD7PPS5 RD7PPSbits.RD7PPS5 // bit 5
21647 #define RE0PPS0 RE0PPSbits.RE0PPS0 // bit 0
21648 #define RE0PPS1 RE0PPSbits.RE0PPS1 // bit 1
21649 #define RE0PPS2 RE0PPSbits.RE0PPS2 // bit 2
21650 #define RE0PPS3 RE0PPSbits.RE0PPS3 // bit 3
21651 #define RE0PPS4 RE0PPSbits.RE0PPS4 // bit 4
21652 #define RE0PPS5 RE0PPSbits.RE0PPS5 // bit 5
21654 #define RE1PPS0 RE1PPSbits.RE1PPS0 // bit 0
21655 #define RE1PPS1 RE1PPSbits.RE1PPS1 // bit 1
21656 #define RE1PPS2 RE1PPSbits.RE1PPS2 // bit 2
21657 #define RE1PPS3 RE1PPSbits.RE1PPS3 // bit 3
21658 #define RE1PPS4 RE1PPSbits.RE1PPS4 // bit 4
21659 #define RE1PPS5 RE1PPSbits.RE1PPS5 // bit 5
21661 #define RE2PPS0 RE2PPSbits.RE2PPS0 // bit 0
21662 #define RE2PPS1 RE2PPSbits.RE2PPS1 // bit 1
21663 #define RE2PPS2 RE2PPSbits.RE2PPS2 // bit 2
21664 #define RE2PPS3 RE2PPSbits.RE2PPS3 // bit 3
21665 #define RE2PPS4 RE2PPSbits.RE2PPS4 // bit 4
21666 #define RE2PPS5 RE2PPSbits.RE2PPS5 // bit 5
21668 #define RXPPS0 RXPPSbits.RXPPS0 // bit 0
21669 #define RXPPS1 RXPPSbits.RXPPS1 // bit 1
21670 #define RXPPS2 RXPPSbits.RXPPS2 // bit 2
21671 #define RXPPS3 RXPPSbits.RXPPS3 // bit 3
21672 #define RXPPS4 RXPPSbits.RXPPS4 // bit 4
21674 #define HADR8 SCANHADRHbits.HADR8 // bit 0, shadows bit in SCANHADRHbits
21675 #define SCANHADR8 SCANHADRHbits.SCANHADR8 // bit 0, shadows bit in SCANHADRHbits
21676 #define HADR9 SCANHADRHbits.HADR9 // bit 1, shadows bit in SCANHADRHbits
21677 #define SCANHADR9 SCANHADRHbits.SCANHADR9 // bit 1, shadows bit in SCANHADRHbits
21678 #define HADR10 SCANHADRHbits.HADR10 // bit 2, shadows bit in SCANHADRHbits
21679 #define SCANHADR10 SCANHADRHbits.SCANHADR10 // bit 2, shadows bit in SCANHADRHbits
21680 #define HADR11 SCANHADRHbits.HADR11 // bit 3, shadows bit in SCANHADRHbits
21681 #define SCANHADR11 SCANHADRHbits.SCANHADR11 // bit 3, shadows bit in SCANHADRHbits
21682 #define HADR12 SCANHADRHbits.HADR12 // bit 4, shadows bit in SCANHADRHbits
21683 #define SCANHADR12 SCANHADRHbits.SCANHADR12 // bit 4, shadows bit in SCANHADRHbits
21684 #define HADR13 SCANHADRHbits.HADR13 // bit 5, shadows bit in SCANHADRHbits
21685 #define SCANHADR13 SCANHADRHbits.SCANHADR13 // bit 5, shadows bit in SCANHADRHbits
21686 #define HADR14 SCANHADRHbits.HADR14 // bit 6, shadows bit in SCANHADRHbits
21687 #define SCANHADR14 SCANHADRHbits.SCANHADR14 // bit 6, shadows bit in SCANHADRHbits
21688 #define HADR15 SCANHADRHbits.HADR15 // bit 7, shadows bit in SCANHADRHbits
21689 #define SCANHADR15 SCANHADRHbits.SCANHADR15 // bit 7, shadows bit in SCANHADRHbits
21691 #define HADR0 SCANHADRLbits.HADR0 // bit 0, shadows bit in SCANHADRLbits
21692 #define SCANHADR0 SCANHADRLbits.SCANHADR0 // bit 0, shadows bit in SCANHADRLbits
21693 #define HADR1 SCANHADRLbits.HADR1 // bit 1, shadows bit in SCANHADRLbits
21694 #define SCANHADR1 SCANHADRLbits.SCANHADR1 // bit 1, shadows bit in SCANHADRLbits
21695 #define HADR2 SCANHADRLbits.HADR2 // bit 2, shadows bit in SCANHADRLbits
21696 #define SCANHADR2 SCANHADRLbits.SCANHADR2 // bit 2, shadows bit in SCANHADRLbits
21697 #define HADR3 SCANHADRLbits.HADR3 // bit 3, shadows bit in SCANHADRLbits
21698 #define SCANHADR3 SCANHADRLbits.SCANHADR3 // bit 3, shadows bit in SCANHADRLbits
21699 #define HADR4 SCANHADRLbits.HADR4 // bit 4, shadows bit in SCANHADRLbits
21700 #define SCANHADR4 SCANHADRLbits.SCANHADR4 // bit 4, shadows bit in SCANHADRLbits
21701 #define HADR5 SCANHADRLbits.HADR5 // bit 5, shadows bit in SCANHADRLbits
21702 #define SCANHADR5 SCANHADRLbits.SCANHADR5 // bit 5, shadows bit in SCANHADRLbits
21703 #define HADR6 SCANHADRLbits.HADR6 // bit 6, shadows bit in SCANHADRLbits
21704 #define SCANHADR6 SCANHADRLbits.SCANHADR6 // bit 6, shadows bit in SCANHADRLbits
21705 #define HADR7 SCANHADRLbits.HADR7 // bit 7, shadows bit in SCANHADRLbits
21706 #define SCANHADR7 SCANHADRLbits.SCANHADR7 // bit 7, shadows bit in SCANHADRLbits
21708 #define LADR8 SCANLADRHbits.LADR8 // bit 0, shadows bit in SCANLADRHbits
21709 #define SCANLADR8 SCANLADRHbits.SCANLADR8 // bit 0, shadows bit in SCANLADRHbits
21710 #define LADR9 SCANLADRHbits.LADR9 // bit 1, shadows bit in SCANLADRHbits
21711 #define SCANLADR9 SCANLADRHbits.SCANLADR9 // bit 1, shadows bit in SCANLADRHbits
21712 #define LADR10 SCANLADRHbits.LADR10 // bit 2, shadows bit in SCANLADRHbits
21713 #define SCANLADR10 SCANLADRHbits.SCANLADR10 // bit 2, shadows bit in SCANLADRHbits
21714 #define LADR11 SCANLADRHbits.LADR11 // bit 3, shadows bit in SCANLADRHbits
21715 #define SCANLADR11 SCANLADRHbits.SCANLADR11 // bit 3, shadows bit in SCANLADRHbits
21716 #define LADR12 SCANLADRHbits.LADR12 // bit 4, shadows bit in SCANLADRHbits
21717 #define SCANLADR12 SCANLADRHbits.SCANLADR12 // bit 4, shadows bit in SCANLADRHbits
21718 #define LADR13 SCANLADRHbits.LADR13 // bit 5, shadows bit in SCANLADRHbits
21719 #define SCANLADR13 SCANLADRHbits.SCANLADR13 // bit 5, shadows bit in SCANLADRHbits
21720 #define LADR14 SCANLADRHbits.LADR14 // bit 6, shadows bit in SCANLADRHbits
21721 #define SCANLADR14 SCANLADRHbits.SCANLADR14 // bit 6, shadows bit in SCANLADRHbits
21722 #define LADR15 SCANLADRHbits.LADR15 // bit 7, shadows bit in SCANLADRHbits
21723 #define SCANLADR15 SCANLADRHbits.SCANLADR15 // bit 7, shadows bit in SCANLADRHbits
21725 #define LADR0 SCANLADRLbits.LADR0 // bit 0, shadows bit in SCANLADRLbits
21726 #define SCANLADR0 SCANLADRLbits.SCANLADR0 // bit 0, shadows bit in SCANLADRLbits
21727 #define LADR1 SCANLADRLbits.LADR1 // bit 1, shadows bit in SCANLADRLbits
21728 #define SCANLADR1 SCANLADRLbits.SCANLADR1 // bit 1, shadows bit in SCANLADRLbits
21729 #define LADR2 SCANLADRLbits.LADR2 // bit 2, shadows bit in SCANLADRLbits
21730 #define SCANLADR2 SCANLADRLbits.SCANLADR2 // bit 2, shadows bit in SCANLADRLbits
21731 #define LADR3 SCANLADRLbits.LADR3 // bit 3, shadows bit in SCANLADRLbits
21732 #define SCANLADR3 SCANLADRLbits.SCANLADR3 // bit 3, shadows bit in SCANLADRLbits
21733 #define LADR4 SCANLADRLbits.LADR4 // bit 4, shadows bit in SCANLADRLbits
21734 #define SCANLADR4 SCANLADRLbits.SCANLADR4 // bit 4, shadows bit in SCANLADRLbits
21735 #define LADR5 SCANLADRLbits.LADR5 // bit 5, shadows bit in SCANLADRLbits
21736 #define SCANLADR5 SCANLADRLbits.SCANLADR5 // bit 5, shadows bit in SCANLADRLbits
21737 #define LADR6 SCANLADRLbits.LADR6 // bit 6, shadows bit in SCANLADRLbits
21738 #define SCANLADR6 SCANLADRLbits.SCANLADR6 // bit 6, shadows bit in SCANLADRLbits
21739 #define LADR7 SCANLADRLbits.LADR7 // bit 7, shadows bit in SCANLADRLbits
21740 #define SCANLADR7 SCANLADRLbits.SCANLADR7 // bit 7, shadows bit in SCANLADRLbits
21742 #define TSEL0 SCANTRIGbits.TSEL0 // bit 0, shadows bit in SCANTRIGbits
21743 #define SCANTSEL0 SCANTRIGbits.SCANTSEL0 // bit 0, shadows bit in SCANTRIGbits
21744 #define TSEL1 SCANTRIGbits.TSEL1 // bit 1, shadows bit in SCANTRIGbits
21745 #define SCANTSEL1 SCANTRIGbits.SCANTSEL1 // bit 1, shadows bit in SCANTRIGbits
21746 #define TSEL2 SCANTRIGbits.TSEL2 // bit 2, shadows bit in SCANTRIGbits
21747 #define SCANTSEL2 SCANTRIGbits.SCANTSEL2 // bit 2, shadows bit in SCANTRIGbits
21748 #define TSEL3 SCANTRIGbits.TSEL3 // bit 3, shadows bit in SCANTRIGbits
21749 #define SCANTSEL3 SCANTRIGbits.SCANTSEL3 // bit 3, shadows bit in SCANTRIGbits
21751 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
21752 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
21753 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
21754 #define SLRA3 SLRCONAbits.SLRA3 // bit 3
21755 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
21756 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
21757 #define SLRA6 SLRCONAbits.SLRA6 // bit 6
21758 #define SLRA7 SLRCONAbits.SLRA7 // bit 7
21760 #define SLRB0 SLRCONBbits.SLRB0 // bit 0
21761 #define SLRB1 SLRCONBbits.SLRB1 // bit 1
21762 #define SLRB2 SLRCONBbits.SLRB2 // bit 2
21763 #define SLRB3 SLRCONBbits.SLRB3 // bit 3
21764 #define SLRB4 SLRCONBbits.SLRB4 // bit 4
21765 #define SLRB5 SLRCONBbits.SLRB5 // bit 5
21766 #define SLRB6 SLRCONBbits.SLRB6 // bit 6
21767 #define SLRB7 SLRCONBbits.SLRB7 // bit 7
21769 #define SLRC0 SLRCONCbits.SLRC0 // bit 0
21770 #define SLRC1 SLRCONCbits.SLRC1 // bit 1
21771 #define SLRC2 SLRCONCbits.SLRC2 // bit 2
21772 #define SLRC3 SLRCONCbits.SLRC3 // bit 3
21773 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
21774 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
21775 #define SLRC6 SLRCONCbits.SLRC6 // bit 6
21776 #define SLRC7 SLRCONCbits.SLRC7 // bit 7
21778 #define SLRD0 SLRCONDbits.SLRD0 // bit 0
21779 #define SLRD1 SLRCONDbits.SLRD1 // bit 1
21780 #define SLRD2 SLRCONDbits.SLRD2 // bit 2
21781 #define SLRD3 SLRCONDbits.SLRD3 // bit 3
21782 #define SLRD4 SLRCONDbits.SLRD4 // bit 4
21783 #define SLRD5 SLRCONDbits.SLRD5 // bit 5
21784 #define SLRD6 SLRCONDbits.SLRD6 // bit 6
21785 #define SLRD7 SLRCONDbits.SLRD7 // bit 7
21787 #define SLRE0 SLRCONEbits.SLRE0 // bit 0
21788 #define SLRE1 SLRCONEbits.SLRE1 // bit 1
21789 #define SLRE2 SLRCONEbits.SLRE2 // bit 2
21791 #define CSEL0 SMT1CLKbits.CSEL0 // bit 0, shadows bit in SMT1CLKbits
21792 #define SMT1CSEL0 SMT1CLKbits.SMT1CSEL0 // bit 0, shadows bit in SMT1CLKbits
21793 #define CSEL1 SMT1CLKbits.CSEL1 // bit 1, shadows bit in SMT1CLKbits
21794 #define SMT1CSEL1 SMT1CLKbits.SMT1CSEL1 // bit 1, shadows bit in SMT1CLKbits
21795 #define CSEL2 SMT1CLKbits.CSEL2 // bit 2, shadows bit in SMT1CLKbits
21796 #define SMT1CSEL2 SMT1CLKbits.SMT1CSEL2 // bit 2, shadows bit in SMT1CLKbits
21798 #define CPR8 SMT1CPRHbits.CPR8 // bit 0, shadows bit in SMT1CPRHbits
21799 #define SMT1CPR8 SMT1CPRHbits.SMT1CPR8 // bit 0, shadows bit in SMT1CPRHbits
21800 #define CPR9 SMT1CPRHbits.CPR9 // bit 1, shadows bit in SMT1CPRHbits
21801 #define SMT1CPR9 SMT1CPRHbits.SMT1CPR9 // bit 1, shadows bit in SMT1CPRHbits
21802 #define CPR10 SMT1CPRHbits.CPR10 // bit 2, shadows bit in SMT1CPRHbits
21803 #define SMT1CPR10 SMT1CPRHbits.SMT1CPR10 // bit 2, shadows bit in SMT1CPRHbits
21804 #define CPR11 SMT1CPRHbits.CPR11 // bit 3, shadows bit in SMT1CPRHbits
21805 #define SMT1CPR11 SMT1CPRHbits.SMT1CPR11 // bit 3, shadows bit in SMT1CPRHbits
21806 #define CPR12 SMT1CPRHbits.CPR12 // bit 4, shadows bit in SMT1CPRHbits
21807 #define SMT1CPR12 SMT1CPRHbits.SMT1CPR12 // bit 4, shadows bit in SMT1CPRHbits
21808 #define CPR13 SMT1CPRHbits.CPR13 // bit 5, shadows bit in SMT1CPRHbits
21809 #define SMT1CPR13 SMT1CPRHbits.SMT1CPR13 // bit 5, shadows bit in SMT1CPRHbits
21810 #define CPR14 SMT1CPRHbits.CPR14 // bit 6, shadows bit in SMT1CPRHbits
21811 #define SMT1CPR14 SMT1CPRHbits.SMT1CPR14 // bit 6, shadows bit in SMT1CPRHbits
21812 #define CPR15 SMT1CPRHbits.CPR15 // bit 7, shadows bit in SMT1CPRHbits
21813 #define SMT1CPR15 SMT1CPRHbits.SMT1CPR15 // bit 7, shadows bit in SMT1CPRHbits
21815 #define CPR0 SMT1CPRLbits.CPR0 // bit 0
21816 #define CPR1 SMT1CPRLbits.CPR1 // bit 1
21817 #define CPR2 SMT1CPRLbits.CPR2 // bit 2
21818 #define CPR3 SMT1CPRLbits.CPR3 // bit 3
21819 #define CPR4 SMT1CPRLbits.CPR4 // bit 4
21820 #define CPR5 SMT1CPRLbits.CPR5 // bit 5
21821 #define CPR6 SMT1CPRLbits.CPR6 // bit 6
21822 #define CPR7 SMT1CPRLbits.CPR7 // bit 7
21824 #define CPR16 SMT1CPRUbits.CPR16 // bit 0, shadows bit in SMT1CPRUbits
21825 #define SMT1CPR16 SMT1CPRUbits.SMT1CPR16 // bit 0, shadows bit in SMT1CPRUbits
21826 #define CPR17 SMT1CPRUbits.CPR17 // bit 1, shadows bit in SMT1CPRUbits
21827 #define SMT1CPR17 SMT1CPRUbits.SMT1CPR17 // bit 1, shadows bit in SMT1CPRUbits
21828 #define CPR18 SMT1CPRUbits.CPR18 // bit 2, shadows bit in SMT1CPRUbits
21829 #define SMT1CPR18 SMT1CPRUbits.SMT1CPR18 // bit 2, shadows bit in SMT1CPRUbits
21830 #define CPR19 SMT1CPRUbits.CPR19 // bit 3, shadows bit in SMT1CPRUbits
21831 #define SMT1CPR19 SMT1CPRUbits.SMT1CPR19 // bit 3, shadows bit in SMT1CPRUbits
21832 #define CPR20 SMT1CPRUbits.CPR20 // bit 4, shadows bit in SMT1CPRUbits
21833 #define SMT1CPR20 SMT1CPRUbits.SMT1CPR20 // bit 4, shadows bit in SMT1CPRUbits
21834 #define CPR21 SMT1CPRUbits.CPR21 // bit 5, shadows bit in SMT1CPRUbits
21835 #define SMT1CPR21 SMT1CPRUbits.SMT1CPR21 // bit 5, shadows bit in SMT1CPRUbits
21836 #define CPR22 SMT1CPRUbits.CPR22 // bit 6, shadows bit in SMT1CPRUbits
21837 #define SMT1CPR22 SMT1CPRUbits.SMT1CPR22 // bit 6, shadows bit in SMT1CPRUbits
21838 #define CPR23 SMT1CPRUbits.CPR23 // bit 7, shadows bit in SMT1CPRUbits
21839 #define SMT1CPR23 SMT1CPRUbits.SMT1CPR23 // bit 7, shadows bit in SMT1CPRUbits
21841 #define CPW8 SMT1CPWHbits.CPW8 // bit 0, shadows bit in SMT1CPWHbits
21842 #define SMT1CPW8 SMT1CPWHbits.SMT1CPW8 // bit 0, shadows bit in SMT1CPWHbits
21843 #define CPW9 SMT1CPWHbits.CPW9 // bit 1, shadows bit in SMT1CPWHbits
21844 #define SMT1CPW9 SMT1CPWHbits.SMT1CPW9 // bit 1, shadows bit in SMT1CPWHbits
21845 #define CPW10 SMT1CPWHbits.CPW10 // bit 2, shadows bit in SMT1CPWHbits
21846 #define SMT1CPW10 SMT1CPWHbits.SMT1CPW10 // bit 2, shadows bit in SMT1CPWHbits
21847 #define CPW11 SMT1CPWHbits.CPW11 // bit 3, shadows bit in SMT1CPWHbits
21848 #define SMT1CPW11 SMT1CPWHbits.SMT1CPW11 // bit 3, shadows bit in SMT1CPWHbits
21849 #define CPW12 SMT1CPWHbits.CPW12 // bit 4, shadows bit in SMT1CPWHbits
21850 #define SMT1CPW12 SMT1CPWHbits.SMT1CPW12 // bit 4, shadows bit in SMT1CPWHbits
21851 #define CPW13 SMT1CPWHbits.CPW13 // bit 5, shadows bit in SMT1CPWHbits
21852 #define SMT1CPW13 SMT1CPWHbits.SMT1CPW13 // bit 5, shadows bit in SMT1CPWHbits
21853 #define CPW14 SMT1CPWHbits.CPW14 // bit 6, shadows bit in SMT1CPWHbits
21854 #define SMT1CPW14 SMT1CPWHbits.SMT1CPW14 // bit 6, shadows bit in SMT1CPWHbits
21855 #define CPW15 SMT1CPWHbits.CPW15 // bit 7, shadows bit in SMT1CPWHbits
21856 #define SMT1CPW15 SMT1CPWHbits.SMT1CPW15 // bit 7, shadows bit in SMT1CPWHbits
21858 #define CPW0 SMT1CPWLbits.CPW0 // bit 0, shadows bit in SMT1CPWLbits
21859 #define SMT1CPW0 SMT1CPWLbits.SMT1CPW0 // bit 0, shadows bit in SMT1CPWLbits
21860 #define CPW1 SMT1CPWLbits.CPW1 // bit 1, shadows bit in SMT1CPWLbits
21861 #define SMT1CPW1 SMT1CPWLbits.SMT1CPW1 // bit 1, shadows bit in SMT1CPWLbits
21862 #define CPW2 SMT1CPWLbits.CPW2 // bit 2, shadows bit in SMT1CPWLbits
21863 #define SMT1CPW2 SMT1CPWLbits.SMT1CPW2 // bit 2, shadows bit in SMT1CPWLbits
21864 #define CPW3 SMT1CPWLbits.CPW3 // bit 3, shadows bit in SMT1CPWLbits
21865 #define SMT1CPW3 SMT1CPWLbits.SMT1CPW3 // bit 3, shadows bit in SMT1CPWLbits
21866 #define CPW4 SMT1CPWLbits.CPW4 // bit 4, shadows bit in SMT1CPWLbits
21867 #define SMT1CPW4 SMT1CPWLbits.SMT1CPW4 // bit 4, shadows bit in SMT1CPWLbits
21868 #define CPW5 SMT1CPWLbits.CPW5 // bit 5, shadows bit in SMT1CPWLbits
21869 #define SMT1CPW5 SMT1CPWLbits.SMT1CPW5 // bit 5, shadows bit in SMT1CPWLbits
21870 #define CPW6 SMT1CPWLbits.CPW6 // bit 6, shadows bit in SMT1CPWLbits
21871 #define SMT1CPW6 SMT1CPWLbits.SMT1CPW6 // bit 6, shadows bit in SMT1CPWLbits
21872 #define CPW7 SMT1CPWLbits.CPW7 // bit 7, shadows bit in SMT1CPWLbits
21873 #define SMT1CPW7 SMT1CPWLbits.SMT1CPW7 // bit 7, shadows bit in SMT1CPWLbits
21875 #define CPW16 SMT1CPWUbits.CPW16 // bit 0, shadows bit in SMT1CPWUbits
21876 #define SMT1CPW16 SMT1CPWUbits.SMT1CPW16 // bit 0, shadows bit in SMT1CPWUbits
21877 #define CPW17 SMT1CPWUbits.CPW17 // bit 1, shadows bit in SMT1CPWUbits
21878 #define SMT1CPW17 SMT1CPWUbits.SMT1CPW17 // bit 1, shadows bit in SMT1CPWUbits
21879 #define CPW18 SMT1CPWUbits.CPW18 // bit 2, shadows bit in SMT1CPWUbits
21880 #define SMT1CPW18 SMT1CPWUbits.SMT1CPW18 // bit 2, shadows bit in SMT1CPWUbits
21881 #define CPW19 SMT1CPWUbits.CPW19 // bit 3, shadows bit in SMT1CPWUbits
21882 #define SMT1CPW19 SMT1CPWUbits.SMT1CPW19 // bit 3, shadows bit in SMT1CPWUbits
21883 #define CPW20 SMT1CPWUbits.CPW20 // bit 4, shadows bit in SMT1CPWUbits
21884 #define SMT1CPW20 SMT1CPWUbits.SMT1CPW20 // bit 4, shadows bit in SMT1CPWUbits
21885 #define CPW21 SMT1CPWUbits.CPW21 // bit 5, shadows bit in SMT1CPWUbits
21886 #define SMT1CPW21 SMT1CPWUbits.SMT1CPW21 // bit 5, shadows bit in SMT1CPWUbits
21887 #define CPW22 SMT1CPWUbits.CPW22 // bit 6, shadows bit in SMT1CPWUbits
21888 #define SMT1CPW22 SMT1CPWUbits.SMT1CPW22 // bit 6, shadows bit in SMT1CPWUbits
21889 #define CPW23 SMT1CPWUbits.CPW23 // bit 7, shadows bit in SMT1CPWUbits
21890 #define SMT1CPW23 SMT1CPWUbits.SMT1CPW23 // bit 7, shadows bit in SMT1CPWUbits
21892 #define SMT1PR8 SMT1PRHbits.SMT1PR8 // bit 0
21893 #define SMT1PR9 SMT1PRHbits.SMT1PR9 // bit 1
21894 #define SMT1PR10 SMT1PRHbits.SMT1PR10 // bit 2
21895 #define SMT1PR11 SMT1PRHbits.SMT1PR11 // bit 3
21896 #define SMT1PR12 SMT1PRHbits.SMT1PR12 // bit 4
21897 #define SMT1PR13 SMT1PRHbits.SMT1PR13 // bit 5
21898 #define SMT1PR14 SMT1PRHbits.SMT1PR14 // bit 6
21899 #define SMT1PR15 SMT1PRHbits.SMT1PR15 // bit 7
21901 #define SMT1PR0 SMT1PRLbits.SMT1PR0 // bit 0
21902 #define SMT1PR1 SMT1PRLbits.SMT1PR1 // bit 1
21903 #define SMT1PR2 SMT1PRLbits.SMT1PR2 // bit 2
21904 #define SMT1PR3 SMT1PRLbits.SMT1PR3 // bit 3
21905 #define SMT1PR4 SMT1PRLbits.SMT1PR4 // bit 4
21906 #define SMT1PR5 SMT1PRLbits.SMT1PR5 // bit 5
21907 #define SMT1PR6 SMT1PRLbits.SMT1PR6 // bit 6
21908 #define SMT1PR7 SMT1PRLbits.SMT1PR7 // bit 7
21910 #define SMT1PR16 SMT1PRUbits.SMT1PR16 // bit 0
21911 #define SMT1PR17 SMT1PRUbits.SMT1PR17 // bit 1
21912 #define SMT1PR18 SMT1PRUbits.SMT1PR18 // bit 2
21913 #define SMT1PR19 SMT1PRUbits.SMT1PR19 // bit 3
21914 #define SMT1PR20 SMT1PRUbits.SMT1PR20 // bit 4
21915 #define SMT1PR21 SMT1PRUbits.SMT1PR21 // bit 5
21916 #define SMT1PR22 SMT1PRUbits.SMT1PR22 // bit 6
21917 #define SMT1PR23 SMT1PRUbits.SMT1PR23 // bit 7
21919 #define SSEL0 SMT1SIGbits.SSEL0 // bit 0, shadows bit in SMT1SIGbits
21920 #define SMT1SSEL0 SMT1SIGbits.SMT1SSEL0 // bit 0, shadows bit in SMT1SIGbits
21921 #define SSEL1 SMT1SIGbits.SSEL1 // bit 1, shadows bit in SMT1SIGbits
21922 #define SMT1SSEL1 SMT1SIGbits.SMT1SSEL1 // bit 1, shadows bit in SMT1SIGbits
21923 #define SSEL2 SMT1SIGbits.SSEL2 // bit 2, shadows bit in SMT1SIGbits
21924 #define SMT1SSEL2 SMT1SIGbits.SMT1SSEL2 // bit 2, shadows bit in SMT1SIGbits
21925 #define SSEL3 SMT1SIGbits.SSEL3 // bit 3, shadows bit in SMT1SIGbits
21926 #define SMT1SSEL3 SMT1SIGbits.SMT1SSEL3 // bit 3, shadows bit in SMT1SIGbits
21927 #define SSEL4 SMT1SIGbits.SSEL4 // bit 4, shadows bit in SMT1SIGbits
21928 #define SMT1SSEL4 SMT1SIGbits.SMT1SSEL4 // bit 4, shadows bit in SMT1SIGbits
21930 #define SMU1SIGPPS0 SMT1SIGPPSbits.SMU1SIGPPS0 // bit 0
21931 #define SMU1SIGPPS1 SMT1SIGPPSbits.SMU1SIGPPS1 // bit 1
21932 #define SMU1SIGPPS2 SMT1SIGPPSbits.SMU1SIGPPS2 // bit 2
21933 #define SMU1SIGPPS3 SMT1SIGPPSbits.SMU1SIGPPS3 // bit 3
21934 #define SMU1SIGPPS4 SMT1SIGPPSbits.SMU1SIGPPS4 // bit 4
21936 #define AS SMT1STATbits.AS // bit 0, shadows bit in SMT1STATbits
21937 #define SMT1AS SMT1STATbits.SMT1AS // bit 0, shadows bit in SMT1STATbits
21938 #define WS SMT1STATbits.WS // bit 1, shadows bit in SMT1STATbits
21939 #define SMT1WS SMT1STATbits.SMT1WS // bit 1, shadows bit in SMT1STATbits
21940 #define TS SMT1STATbits.TS // bit 2, shadows bit in SMT1STATbits
21941 #define SMT1TS SMT1STATbits.SMT1TS // bit 2, shadows bit in SMT1STATbits
21942 #define RST SMT1STATbits.RST // bit 5, shadows bit in SMT1STATbits
21943 #define SMT1RESET SMT1STATbits.SMT1RESET // bit 5, shadows bit in SMT1STATbits
21944 #define CPWUP SMT1STATbits.CPWUP // bit 6, shadows bit in SMT1STATbits
21945 #define SMT1CPWUP SMT1STATbits.SMT1CPWUP // bit 6, shadows bit in SMT1STATbits
21946 #define CPRUP SMT1STATbits.CPRUP // bit 7, shadows bit in SMT1STATbits
21947 #define SMT1CPRUP SMT1STATbits.SMT1CPRUP // bit 7, shadows bit in SMT1STATbits
21949 #define SMT1TMR8 SMT1TMRHbits.SMT1TMR8 // bit 0
21950 #define SMT1TMR9 SMT1TMRHbits.SMT1TMR9 // bit 1
21951 #define SMT1TMR10 SMT1TMRHbits.SMT1TMR10 // bit 2
21952 #define SMT1TMR11 SMT1TMRHbits.SMT1TMR11 // bit 3
21953 #define SMT1TMR12 SMT1TMRHbits.SMT1TMR12 // bit 4
21954 #define SMT1TMR13 SMT1TMRHbits.SMT1TMR13 // bit 5
21955 #define SMT1TMR14 SMT1TMRHbits.SMT1TMR14 // bit 6
21956 #define SMT1TMR15 SMT1TMRHbits.SMT1TMR15 // bit 7
21958 #define SMT1TMR0 SMT1TMRLbits.SMT1TMR0 // bit 0
21959 #define SMT1TMR1 SMT1TMRLbits.SMT1TMR1 // bit 1
21960 #define SMT1TMR2 SMT1TMRLbits.SMT1TMR2 // bit 2
21961 #define SMT1TMR3 SMT1TMRLbits.SMT1TMR3 // bit 3
21962 #define SMT1TMR4 SMT1TMRLbits.SMT1TMR4 // bit 4
21963 #define SMT1TMR5 SMT1TMRLbits.SMT1TMR5 // bit 5
21964 #define SMT1TMR6 SMT1TMRLbits.SMT1TMR6 // bit 6
21965 #define SMT1TMR7 SMT1TMRLbits.SMT1TMR7 // bit 7
21967 #define SMT1TMR16 SMT1TMRUbits.SMT1TMR16 // bit 0
21968 #define SMT1TMR17 SMT1TMRUbits.SMT1TMR17 // bit 1
21969 #define SMT1TMR18 SMT1TMRUbits.SMT1TMR18 // bit 2
21970 #define SMT1TMR19 SMT1TMRUbits.SMT1TMR19 // bit 3
21971 #define SMT1TMR20 SMT1TMRUbits.SMT1TMR20 // bit 4
21972 #define SMT1TMR21 SMT1TMRUbits.SMT1TMR21 // bit 5
21973 #define SMT1TMR22 SMT1TMRUbits.SMT1TMR22 // bit 6
21974 #define SMT1TMR23 SMT1TMRUbits.SMT1TMR23 // bit 7
21976 #define WSEL0 SMT1WINbits.WSEL0 // bit 0, shadows bit in SMT1WINbits
21977 #define SMT1WSEL0 SMT1WINbits.SMT1WSEL0 // bit 0, shadows bit in SMT1WINbits
21978 #define WSEL1 SMT1WINbits.WSEL1 // bit 1, shadows bit in SMT1WINbits
21979 #define SMT1WSEL1 SMT1WINbits.SMT1WSEL1 // bit 1, shadows bit in SMT1WINbits
21980 #define WSEL2 SMT1WINbits.WSEL2 // bit 2, shadows bit in SMT1WINbits
21981 #define SMT1WSEL2 SMT1WINbits.SMT1WSEL2 // bit 2, shadows bit in SMT1WINbits
21982 #define WSEL3 SMT1WINbits.WSEL3 // bit 3, shadows bit in SMT1WINbits
21983 #define SMT1WSEL3 SMT1WINbits.SMT1WSEL3 // bit 3, shadows bit in SMT1WINbits
21984 #define WSEL4 SMT1WINbits.WSEL4 // bit 4, shadows bit in SMT1WINbits
21985 #define SMT1WSEL4 SMT1WINbits.SMT1WSEL4 // bit 4, shadows bit in SMT1WINbits
21987 #define SMU1WINPPS0 SMT1WINPPSbits.SMU1WINPPS0 // bit 0
21988 #define SMU1WINPPS1 SMT1WINPPSbits.SMU1WINPPS1 // bit 1
21989 #define SMU1WINPPS2 SMT1WINPPSbits.SMU1WINPPS2 // bit 2
21990 #define SMU1WINPPS3 SMT1WINPPSbits.SMU1WINPPS3 // bit 3
21991 #define SMU1WINPPS4 SMT1WINPPSbits.SMU1WINPPS4 // bit 4
21993 #define SMT2PR8 SMT2PRHbits.SMT2PR8 // bit 0
21994 #define SMT2PR9 SMT2PRHbits.SMT2PR9 // bit 1
21995 #define SMT2PR10 SMT2PRHbits.SMT2PR10 // bit 2
21996 #define SMT2PR11 SMT2PRHbits.SMT2PR11 // bit 3
21997 #define SMT2PR12 SMT2PRHbits.SMT2PR12 // bit 4
21998 #define SMT2PR13 SMT2PRHbits.SMT2PR13 // bit 5
21999 #define SMT2PR14 SMT2PRHbits.SMT2PR14 // bit 6
22000 #define SMT2PR15 SMT2PRHbits.SMT2PR15 // bit 7
22002 #define SMT2PR0 SMT2PRLbits.SMT2PR0 // bit 0
22003 #define SMT2PR1 SMT2PRLbits.SMT2PR1 // bit 1
22004 #define SMT2PR2 SMT2PRLbits.SMT2PR2 // bit 2
22005 #define SMT2PR3 SMT2PRLbits.SMT2PR3 // bit 3
22006 #define SMT2PR4 SMT2PRLbits.SMT2PR4 // bit 4
22007 #define SMT2PR5 SMT2PRLbits.SMT2PR5 // bit 5
22008 #define SMT2PR6 SMT2PRLbits.SMT2PR6 // bit 6
22009 #define SMT2PR7 SMT2PRLbits.SMT2PR7 // bit 7
22011 #define SMT2PR16 SMT2PRUbits.SMT2PR16 // bit 0
22012 #define SMT2PR17 SMT2PRUbits.SMT2PR17 // bit 1
22013 #define SMT2PR18 SMT2PRUbits.SMT2PR18 // bit 2
22014 #define SMT2PR19 SMT2PRUbits.SMT2PR19 // bit 3
22015 #define SMT2PR20 SMT2PRUbits.SMT2PR20 // bit 4
22016 #define SMT2PR21 SMT2PRUbits.SMT2PR21 // bit 5
22017 #define SMT2PR22 SMT2PRUbits.SMT2PR22 // bit 6
22018 #define SMT2PR23 SMT2PRUbits.SMT2PR23 // bit 7
22020 #define SMU2SIGPPS0 SMT2SIGPPSbits.SMU2SIGPPS0 // bit 0
22021 #define SMU2SIGPPS1 SMT2SIGPPSbits.SMU2SIGPPS1 // bit 1
22022 #define SMU2SIGPPS2 SMT2SIGPPSbits.SMU2SIGPPS2 // bit 2
22023 #define SMU2SIGPPS3 SMT2SIGPPSbits.SMU2SIGPPS3 // bit 3
22024 #define SMU2SIGPPS4 SMT2SIGPPSbits.SMU2SIGPPS4 // bit 4
22026 #define SMT2TMR8 SMT2TMRHbits.SMT2TMR8 // bit 0
22027 #define SMT2TMR9 SMT2TMRHbits.SMT2TMR9 // bit 1
22028 #define SMT2TMR10 SMT2TMRHbits.SMT2TMR10 // bit 2
22029 #define SMT2TMR11 SMT2TMRHbits.SMT2TMR11 // bit 3
22030 #define SMT2TMR12 SMT2TMRHbits.SMT2TMR12 // bit 4
22031 #define SMT2TMR13 SMT2TMRHbits.SMT2TMR13 // bit 5
22032 #define SMT2TMR14 SMT2TMRHbits.SMT2TMR14 // bit 6
22033 #define SMT2TMR15 SMT2TMRHbits.SMT2TMR15 // bit 7
22035 #define SMT2TMR0 SMT2TMRLbits.SMT2TMR0 // bit 0
22036 #define SMT2TMR1 SMT2TMRLbits.SMT2TMR1 // bit 1
22037 #define SMT2TMR2 SMT2TMRLbits.SMT2TMR2 // bit 2
22038 #define SMT2TMR3 SMT2TMRLbits.SMT2TMR3 // bit 3
22039 #define SMT2TMR4 SMT2TMRLbits.SMT2TMR4 // bit 4
22040 #define SMT2TMR5 SMT2TMRLbits.SMT2TMR5 // bit 5
22041 #define SMT2TMR6 SMT2TMRLbits.SMT2TMR6 // bit 6
22042 #define SMT2TMR7 SMT2TMRLbits.SMT2TMR7 // bit 7
22044 #define SMT2TMR16 SMT2TMRUbits.SMT2TMR16 // bit 0
22045 #define SMT2TMR17 SMT2TMRUbits.SMT2TMR17 // bit 1
22046 #define SMT2TMR18 SMT2TMRUbits.SMT2TMR18 // bit 2
22047 #define SMT2TMR19 SMT2TMRUbits.SMT2TMR19 // bit 3
22048 #define SMT2TMR20 SMT2TMRUbits.SMT2TMR20 // bit 4
22049 #define SMT2TMR21 SMT2TMRUbits.SMT2TMR21 // bit 5
22050 #define SMT2TMR22 SMT2TMRUbits.SMT2TMR22 // bit 6
22051 #define SMT2TMR23 SMT2TMRUbits.SMT2TMR23 // bit 7
22053 #define SMU2WINPPS0 SMT2WINPPSbits.SMU2WINPPS0 // bit 0
22054 #define SMU2WINPPS1 SMT2WINPPSbits.SMU2WINPPS1 // bit 1
22055 #define SMU2WINPPS2 SMT2WINPPSbits.SMU2WINPPS2 // bit 2
22056 #define SMU2WINPPS3 SMT2WINPPSbits.SMU2WINPPS3 // bit 3
22057 #define SMU2WINPPS4 SMT2WINPPSbits.SMU2WINPPS4 // bit 4
22059 #define SSP1CLKPPS0 SSP1CLKPPSbits.SSP1CLKPPS0 // bit 0
22060 #define SSP1CLKPPS1 SSP1CLKPPSbits.SSP1CLKPPS1 // bit 1
22061 #define SSP1CLKPPS2 SSP1CLKPPSbits.SSP1CLKPPS2 // bit 2
22062 #define SSP1CLKPPS3 SSP1CLKPPSbits.SSP1CLKPPS3 // bit 3
22063 #define SSP1CLKPPS4 SSP1CLKPPSbits.SSP1CLKPPS4 // bit 4
22065 #define SSPM0 SSP1CON1bits.SSPM0 // bit 0
22066 #define SSPM1 SSP1CON1bits.SSPM1 // bit 1
22067 #define SSPM2 SSP1CON1bits.SSPM2 // bit 2
22068 #define SSPM3 SSP1CON1bits.SSPM3 // bit 3
22069 #define CKP SSP1CON1bits.CKP // bit 4
22070 #define SSPEN SSP1CON1bits.SSPEN // bit 5
22071 #define SSPOV SSP1CON1bits.SSPOV // bit 6
22072 #define WCOL SSP1CON1bits.WCOL // bit 7
22074 #define SEN SSP1CON2bits.SEN // bit 0
22075 #define RSEN SSP1CON2bits.RSEN // bit 1, shadows bit in SSP1CON2bits
22076 #define ADMSK1 SSP1CON2bits.ADMSK1 // bit 1, shadows bit in SSP1CON2bits
22077 #define PEN SSP1CON2bits.PEN // bit 2, shadows bit in SSP1CON2bits
22078 #define ADMSK2 SSP1CON2bits.ADMSK2 // bit 2, shadows bit in SSP1CON2bits
22079 #define RCEN SSP1CON2bits.RCEN // bit 3, shadows bit in SSP1CON2bits
22080 #define ADMSK3 SSP1CON2bits.ADMSK3 // bit 3, shadows bit in SSP1CON2bits
22081 #define ACKEN SSP1CON2bits.ACKEN // bit 4, shadows bit in SSP1CON2bits
22082 #define ADMSK4 SSP1CON2bits.ADMSK4 // bit 4, shadows bit in SSP1CON2bits
22083 #define ACKDT SSP1CON2bits.ACKDT // bit 5, shadows bit in SSP1CON2bits
22084 #define ADMSK5 SSP1CON2bits.ADMSK5 // bit 5, shadows bit in SSP1CON2bits
22085 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
22086 #define GCEN SSP1CON2bits.GCEN // bit 7
22088 #define DHEN SSP1CON3bits.DHEN // bit 0
22089 #define AHEN SSP1CON3bits.AHEN // bit 1
22090 #define SBCDE SSP1CON3bits.SBCDE // bit 2
22091 #define SDAHT SSP1CON3bits.SDAHT // bit 3
22092 #define BOEN SSP1CON3bits.BOEN // bit 4
22093 #define SCIE SSP1CON3bits.SCIE // bit 5
22094 #define PCIE SSP1CON3bits.PCIE // bit 6
22095 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
22097 #define SSP1DATPPS0 SSP1DATPPSbits.SSP1DATPPS0 // bit 0
22098 #define SSP1DATPPS1 SSP1DATPPSbits.SSP1DATPPS1 // bit 1
22099 #define SSP1DATPPS2 SSP1DATPPSbits.SSP1DATPPS2 // bit 2
22100 #define SSP1DATPPS3 SSP1DATPPSbits.SSP1DATPPS3 // bit 3
22101 #define SSP1DATPPS4 SSP1DATPPSbits.SSP1DATPPS4 // bit 4
22103 #define MSK0 SSP1MSKbits.MSK0 // bit 0
22104 #define MSK1 SSP1MSKbits.MSK1 // bit 1
22105 #define MSK2 SSP1MSKbits.MSK2 // bit 2
22106 #define MSK3 SSP1MSKbits.MSK3 // bit 3
22107 #define MSK4 SSP1MSKbits.MSK4 // bit 4
22108 #define MSK5 SSP1MSKbits.MSK5 // bit 5
22109 #define MSK6 SSP1MSKbits.MSK6 // bit 6
22110 #define MSK7 SSP1MSKbits.MSK7 // bit 7
22112 #define SSP1SSPPS0 SSP1SSPPSbits.SSP1SSPPS0 // bit 0
22113 #define SSP1SSPPS1 SSP1SSPPSbits.SSP1SSPPS1 // bit 1
22114 #define SSP1SSPPS2 SSP1SSPPSbits.SSP1SSPPS2 // bit 2
22115 #define SSP1SSPPS3 SSP1SSPPSbits.SSP1SSPPS3 // bit 3
22116 #define SSP1SSPPS4 SSP1SSPPSbits.SSP1SSPPS4 // bit 4
22118 #define BF SSP1STATbits.BF // bit 0
22119 #define UA SSP1STATbits.UA // bit 1
22120 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2, shadows bit in SSP1STATbits
22121 #define R_W SSP1STATbits.R_W // bit 2, shadows bit in SSP1STATbits
22122 #define NOT_W SSP1STATbits.NOT_W // bit 2, shadows bit in SSP1STATbits
22123 #define NOT_WRITE SSP1STATbits.NOT_WRITE // bit 2, shadows bit in SSP1STATbits
22124 #define READ_WRITE SSP1STATbits.READ_WRITE // bit 2, shadows bit in SSP1STATbits
22125 #define I2C_READ SSP1STATbits.I2C_READ // bit 2, shadows bit in SSP1STATbits
22126 #define S SSP1STATbits.S // bit 3, shadows bit in SSP1STATbits
22127 #define I2C_START SSP1STATbits.I2C_START // bit 3, shadows bit in SSP1STATbits
22128 #define P SSP1STATbits.P // bit 4, shadows bit in SSP1STATbits
22129 #define I2C_STOP SSP1STATbits.I2C_STOP // bit 4, shadows bit in SSP1STATbits
22130 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5, shadows bit in SSP1STATbits
22131 #define D_A SSP1STATbits.D_A // bit 5, shadows bit in SSP1STATbits
22132 #define NOT_A SSP1STATbits.NOT_A // bit 5, shadows bit in SSP1STATbits
22133 #define NOT_ADDRESS SSP1STATbits.NOT_ADDRESS // bit 5, shadows bit in SSP1STATbits
22134 #define DATA_ADDRESS SSP1STATbits.DATA_ADDRESS // bit 5, shadows bit in SSP1STATbits
22135 #define I2C_DAT SSP1STATbits.I2C_DAT // bit 5, shadows bit in SSP1STATbits
22136 #define CKE SSP1STATbits.CKE // bit 6
22137 #define SMP SSP1STATbits.SMP // bit 7
22139 #define SSP2CLKPPS0 SSP2CLKPPSbits.SSP2CLKPPS0 // bit 0
22140 #define SSP2CLKPPS1 SSP2CLKPPSbits.SSP2CLKPPS1 // bit 1
22141 #define SSP2CLKPPS2 SSP2CLKPPSbits.SSP2CLKPPS2 // bit 2
22142 #define SSP2CLKPPS3 SSP2CLKPPSbits.SSP2CLKPPS3 // bit 3
22143 #define SSP2CLKPPS4 SSP2CLKPPSbits.SSP2CLKPPS4 // bit 4
22145 #define SSP2DATPPS0 SSP2DATPPSbits.SSP2DATPPS0 // bit 0
22146 #define SSP2DATPPS1 SSP2DATPPSbits.SSP2DATPPS1 // bit 1
22147 #define SSP2DATPPS2 SSP2DATPPSbits.SSP2DATPPS2 // bit 2
22148 #define SSP2DATPPS3 SSP2DATPPSbits.SSP2DATPPS3 // bit 3
22149 #define SSP2DATPPS4 SSP2DATPPSbits.SSP2DATPPS4 // bit 4
22151 #define SSP2SSPPS0 SSP2SSPPSbits.SSP2SSPPS0 // bit 0
22152 #define SSP2SSPPS1 SSP2SSPPSbits.SSP2SSPPS1 // bit 1
22153 #define SSP2SSPPS2 SSP2SSPPSbits.SSP2SSPPS2 // bit 2
22154 #define SSP2SSPPS3 SSP2SSPPSbits.SSP2SSPPS3 // bit 3
22155 #define SSP2SSPPS4 SSP2SSPPSbits.SSP2SSPPS4 // bit 4
22157 #define C STATUSbits.C // bit 0
22158 #define DC STATUSbits.DC // bit 1
22159 #define Z STATUSbits.Z // bit 2
22160 #define NOT_PD STATUSbits.NOT_PD // bit 3
22161 #define NOT_TO STATUSbits.NOT_TO // bit 4
22163 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
22164 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
22165 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
22167 #define T0CKIPPS0 T0CKIPPSbits.T0CKIPPS0 // bit 0
22168 #define T0CKIPPS1 T0CKIPPSbits.T0CKIPPS1 // bit 1
22169 #define T0CKIPPS2 T0CKIPPSbits.T0CKIPPS2 // bit 2
22170 #define T0CKIPPS3 T0CKIPPSbits.T0CKIPPS3 // bit 3
22172 #define T0OUTPS0 T0CON0bits.T0OUTPS0 // bit 0
22173 #define T0OUTPS1 T0CON0bits.T0OUTPS1 // bit 1
22174 #define T0OUTPS2 T0CON0bits.T0OUTPS2 // bit 2
22175 #define T0OUTPS3 T0CON0bits.T0OUTPS3 // bit 3
22176 #define T016BIT T0CON0bits.T016BIT // bit 4
22177 #define T0OUT T0CON0bits.T0OUT // bit 5
22178 #define T0EN T0CON0bits.T0EN // bit 7
22180 #define T0CKPS0 T0CON1bits.T0CKPS0 // bit 0, shadows bit in T0CON1bits
22181 #define T0PS0 T0CON1bits.T0PS0 // bit 0, shadows bit in T0CON1bits
22182 #define T0CKPS1 T0CON1bits.T0CKPS1 // bit 1, shadows bit in T0CON1bits
22183 #define T0PS1 T0CON1bits.T0PS1 // bit 1, shadows bit in T0CON1bits
22184 #define T0CKPS2 T0CON1bits.T0CKPS2 // bit 2, shadows bit in T0CON1bits
22185 #define T0PS2 T0CON1bits.T0PS2 // bit 2, shadows bit in T0CON1bits
22186 #define T0CKPS3 T0CON1bits.T0CKPS3 // bit 3, shadows bit in T0CON1bits
22187 #define T0PS3 T0CON1bits.T0PS3 // bit 3, shadows bit in T0CON1bits
22188 #define T0ASYNC T0CON1bits.T0ASYNC // bit 4
22189 #define T0CS0 T0CON1bits.T0CS0 // bit 5
22190 #define T0CS1 T0CON1bits.T0CS1 // bit 6
22191 #define T0CS2 T0CON1bits.T0CS2 // bit 7
22193 #define T1CKIPPS0 T1CKIPPSbits.T1CKIPPS0 // bit 0
22194 #define T1CKIPPS1 T1CKIPPSbits.T1CKIPPS1 // bit 1
22195 #define T1CKIPPS2 T1CKIPPSbits.T1CKIPPS2 // bit 2
22196 #define T1CKIPPS3 T1CKIPPSbits.T1CKIPPS3 // bit 3
22197 #define T1CKIPPS4 T1CKIPPSbits.T1CKIPPS4 // bit 4
22199 #define T1CS0 T1CLKbits.T1CS0 // bit 0, shadows bit in T1CLKbits
22200 #define CS0 T1CLKbits.CS0 // bit 0, shadows bit in T1CLKbits
22201 #define T1CS1 T1CLKbits.T1CS1 // bit 1, shadows bit in T1CLKbits
22202 #define CS1 T1CLKbits.CS1 // bit 1, shadows bit in T1CLKbits
22203 #define T1CS2 T1CLKbits.T1CS2 // bit 2, shadows bit in T1CLKbits
22204 #define CS2 T1CLKbits.CS2 // bit 2, shadows bit in T1CLKbits
22205 #define T1CS3 T1CLKbits.T1CS3 // bit 3, shadows bit in T1CLKbits
22206 #define CS3 T1CLKbits.CS3 // bit 3, shadows bit in T1CLKbits
22208 #define GSS0 T1GATEbits.GSS0 // bit 0, shadows bit in T1GATEbits
22209 #define T1GSS0 T1GATEbits.T1GSS0 // bit 0, shadows bit in T1GATEbits
22210 #define GSS1 T1GATEbits.GSS1 // bit 1, shadows bit in T1GATEbits
22211 #define T1GSS1 T1GATEbits.T1GSS1 // bit 1, shadows bit in T1GATEbits
22212 #define GSS2 T1GATEbits.GSS2 // bit 2, shadows bit in T1GATEbits
22213 #define T1GSS2 T1GATEbits.T1GSS2 // bit 2, shadows bit in T1GATEbits
22214 #define GSS3 T1GATEbits.GSS3 // bit 3, shadows bit in T1GATEbits
22215 #define T1GSS3 T1GATEbits.T1GSS3 // bit 3, shadows bit in T1GATEbits
22216 #define GSS4 T1GATEbits.GSS4 // bit 4, shadows bit in T1GATEbits
22217 #define T1GSS4 T1GATEbits.T1GSS4 // bit 4, shadows bit in T1GATEbits
22219 #define T1GPPS0 T1GPPSbits.T1GPPS0 // bit 0
22220 #define T1GPPS1 T1GPPSbits.T1GPPS1 // bit 1
22221 #define T1GPPS2 T1GPPSbits.T1GPPS2 // bit 2
22222 #define T1GPPS3 T1GPPSbits.T1GPPS3 // bit 3
22223 #define T1GPPS4 T1GPPSbits.T1GPPS4 // bit 4
22225 #define T2AINPPS0 T2AINPPSbits.T2AINPPS0 // bit 0
22226 #define T2AINPPS1 T2AINPPSbits.T2AINPPS1 // bit 1
22227 #define T2AINPPS2 T2AINPPSbits.T2AINPPS2 // bit 2
22228 #define T2AINPPS3 T2AINPPSbits.T2AINPPS3 // bit 3
22229 #define T2AINPPS4 T2AINPPSbits.T2AINPPS4 // bit 4
22231 #define T2CS0 T2CLKCONbits.T2CS0 // bit 0
22232 #define T2CS1 T2CLKCONbits.T2CS1 // bit 1
22233 #define T2CS2 T2CLKCONbits.T2CS2 // bit 2
22234 #define T2CS3 T2CLKCONbits.T2CS3 // bit 3
22236 #define RSEL0 T2RSTbits.RSEL0 // bit 0, shadows bit in T2RSTbits
22237 #define T2RSEL0 T2RSTbits.T2RSEL0 // bit 0, shadows bit in T2RSTbits
22238 #define RSEL1 T2RSTbits.RSEL1 // bit 1, shadows bit in T2RSTbits
22239 #define T2RSEL1 T2RSTbits.T2RSEL1 // bit 1, shadows bit in T2RSTbits
22240 #define RSEL2 T2RSTbits.RSEL2 // bit 2, shadows bit in T2RSTbits
22241 #define T2RSEL2 T2RSTbits.T2RSEL2 // bit 2, shadows bit in T2RSTbits
22242 #define RSEL3 T2RSTbits.RSEL3 // bit 3, shadows bit in T2RSTbits
22243 #define T2RSEL3 T2RSTbits.T2RSEL3 // bit 3, shadows bit in T2RSTbits
22244 #define RSEL4 T2RSTbits.RSEL4 // bit 4, shadows bit in T2RSTbits
22245 #define T2RSEL4 T2RSTbits.T2RSEL4 // bit 4, shadows bit in T2RSTbits
22247 #define T3CKIPPS0 T3CKIPPSbits.T3CKIPPS0 // bit 0
22248 #define T3CKIPPS1 T3CKIPPSbits.T3CKIPPS1 // bit 1
22249 #define T3CKIPPS2 T3CKIPPSbits.T3CKIPPS2 // bit 2
22250 #define T3CKIPPS3 T3CKIPPSbits.T3CKIPPS3 // bit 3
22251 #define T3CKIPPS4 T3CKIPPSbits.T3CKIPPS4 // bit 4
22253 #define T3GPPS0 T3GPPSbits.T3GPPS0 // bit 0
22254 #define T3GPPS1 T3GPPSbits.T3GPPS1 // bit 1
22255 #define T3GPPS2 T3GPPSbits.T3GPPS2 // bit 2
22256 #define T3GPPS3 T3GPPSbits.T3GPPS3 // bit 3
22257 #define T3GPPS4 T3GPPSbits.T3GPPS4 // bit 4
22259 #define T4AINPPS0 T4AINPPSbits.T4AINPPS0 // bit 0
22260 #define T4AINPPS1 T4AINPPSbits.T4AINPPS1 // bit 1
22261 #define T4AINPPS2 T4AINPPSbits.T4AINPPS2 // bit 2
22262 #define T4AINPPS3 T4AINPPSbits.T4AINPPS3 // bit 3
22263 #define T4AINPPS4 T4AINPPSbits.T4AINPPS4 // bit 4
22265 #define T4CS0 T4CLKCONbits.T4CS0 // bit 0
22266 #define T4CS1 T4CLKCONbits.T4CS1 // bit 1
22267 #define T4CS2 T4CLKCONbits.T4CS2 // bit 2
22268 #define T4CS3 T4CLKCONbits.T4CS3 // bit 3
22270 #define T5CKIPPS0 T5CKIPPSbits.T5CKIPPS0 // bit 0
22271 #define T5CKIPPS1 T5CKIPPSbits.T5CKIPPS1 // bit 1
22272 #define T5CKIPPS2 T5CKIPPSbits.T5CKIPPS2 // bit 2
22273 #define T5CKIPPS3 T5CKIPPSbits.T5CKIPPS3 // bit 3
22274 #define T5CKIPPS4 T5CKIPPSbits.T5CKIPPS4 // bit 4
22276 #define T5GPPS0 T5GPPSbits.T5GPPS0 // bit 0
22277 #define T5GPPS1 T5GPPSbits.T5GPPS1 // bit 1
22278 #define T5GPPS2 T5GPPSbits.T5GPPS2 // bit 2
22279 #define T5GPPS3 T5GPPSbits.T5GPPS3 // bit 3
22280 #define T5GPPS4 T5GPPSbits.T5GPPS4 // bit 4
22282 #define T6AINPPS0 T6AINPPSbits.T6AINPPS0 // bit 0
22283 #define T6AINPPS1 T6AINPPSbits.T6AINPPS1 // bit 1
22284 #define T6AINPPS2 T6AINPPSbits.T6AINPPS2 // bit 2
22285 #define T6AINPPS3 T6AINPPSbits.T6AINPPS3 // bit 3
22286 #define T6AINPPS4 T6AINPPSbits.T6AINPPS4 // bit 4
22288 #define T6CS0 T6CLKCONbits.T6CS0 // bit 0
22289 #define T6CS1 T6CLKCONbits.T6CS1 // bit 1
22290 #define T6CS2 T6CLKCONbits.T6CS2 // bit 2
22291 #define T6CS3 T6CLKCONbits.T6CS3 // bit 3
22293 #define TMR0L0 TMR0bits.TMR0L0 // bit 0
22294 #define TMR0L1 TMR0bits.TMR0L1 // bit 1
22295 #define TMR0L2 TMR0bits.TMR0L2 // bit 2
22296 #define TMR0L3 TMR0bits.TMR0L3 // bit 3
22297 #define TMR0L4 TMR0bits.TMR0L4 // bit 4
22298 #define TMR0L5 TMR0bits.TMR0L5 // bit 5
22299 #define TMR0L6 TMR0bits.TMR0L6 // bit 6
22300 #define TMR0L7 TMR0bits.TMR0L7 // bit 7
22302 #define TMR1H0 TMR1Hbits.TMR1H0 // bit 0
22303 #define TMR1H1 TMR1Hbits.TMR1H1 // bit 1
22304 #define TMR1H2 TMR1Hbits.TMR1H2 // bit 2
22305 #define TMR1H3 TMR1Hbits.TMR1H3 // bit 3
22306 #define TMR1H4 TMR1Hbits.TMR1H4 // bit 4
22307 #define TMR1H5 TMR1Hbits.TMR1H5 // bit 5
22308 #define TMR1H6 TMR1Hbits.TMR1H6 // bit 6
22309 #define TMR1H7 TMR1Hbits.TMR1H7 // bit 7
22311 #define TMR1L0 TMR1Lbits.TMR1L0 // bit 0
22312 #define TMR1L1 TMR1Lbits.TMR1L1 // bit 1
22313 #define TMR1L2 TMR1Lbits.TMR1L2 // bit 2
22314 #define TMR1L3 TMR1Lbits.TMR1L3 // bit 3
22315 #define TMR1L4 TMR1Lbits.TMR1L4 // bit 4
22316 #define TMR1L5 TMR1Lbits.TMR1L5 // bit 5
22317 #define TMR1L6 TMR1Lbits.TMR1L6 // bit 6
22318 #define TMR1L7 TMR1Lbits.TMR1L7 // bit 7
22320 #define TMR3H0 TMR3Hbits.TMR3H0 // bit 0
22321 #define TMR3H1 TMR3Hbits.TMR3H1 // bit 1
22322 #define TMR3H2 TMR3Hbits.TMR3H2 // bit 2
22323 #define TMR3H3 TMR3Hbits.TMR3H3 // bit 3
22324 #define TMR3H4 TMR3Hbits.TMR3H4 // bit 4
22325 #define TMR3H5 TMR3Hbits.TMR3H5 // bit 5
22326 #define TMR3H6 TMR3Hbits.TMR3H6 // bit 6
22327 #define TMR3H7 TMR3Hbits.TMR3H7 // bit 7
22329 #define TMR3L0 TMR3Lbits.TMR3L0 // bit 0
22330 #define TMR3L1 TMR3Lbits.TMR3L1 // bit 1
22331 #define TMR3L2 TMR3Lbits.TMR3L2 // bit 2
22332 #define TMR3L3 TMR3Lbits.TMR3L3 // bit 3
22333 #define TMR3L4 TMR3Lbits.TMR3L4 // bit 4
22334 #define TMR3L5 TMR3Lbits.TMR3L5 // bit 5
22335 #define TMR3L6 TMR3Lbits.TMR3L6 // bit 6
22336 #define TMR3L7 TMR3Lbits.TMR3L7 // bit 7
22338 #define TMR5H0 TMR5Hbits.TMR5H0 // bit 0
22339 #define TMR5H1 TMR5Hbits.TMR5H1 // bit 1
22340 #define TMR5H2 TMR5Hbits.TMR5H2 // bit 2
22341 #define TMR5H3 TMR5Hbits.TMR5H3 // bit 3
22342 #define TMR5H4 TMR5Hbits.TMR5H4 // bit 4
22343 #define TMR5H5 TMR5Hbits.TMR5H5 // bit 5
22344 #define TMR5H6 TMR5Hbits.TMR5H6 // bit 6
22345 #define TMR5H7 TMR5Hbits.TMR5H7 // bit 7
22347 #define TMR5L0 TMR5Lbits.TMR5L0 // bit 0
22348 #define TMR5L1 TMR5Lbits.TMR5L1 // bit 1
22349 #define TMR5L2 TMR5Lbits.TMR5L2 // bit 2
22350 #define TMR5L3 TMR5Lbits.TMR5L3 // bit 3
22351 #define TMR5L4 TMR5Lbits.TMR5L4 // bit 4
22352 #define TMR5L5 TMR5Lbits.TMR5L5 // bit 5
22353 #define TMR5L6 TMR5Lbits.TMR5L6 // bit 6
22354 #define TMR5L7 TMR5Lbits.TMR5L7 // bit 7
22356 #define TRISA0 TRISAbits.TRISA0 // bit 0
22357 #define TRISA1 TRISAbits.TRISA1 // bit 1
22358 #define TRISA2 TRISAbits.TRISA2 // bit 2
22359 #define TRISA3 TRISAbits.TRISA3 // bit 3
22360 #define TRISA4 TRISAbits.TRISA4 // bit 4
22361 #define TRISA5 TRISAbits.TRISA5 // bit 5
22362 #define TRISA6 TRISAbits.TRISA6 // bit 6
22363 #define TRISA7 TRISAbits.TRISA7 // bit 7
22365 #define TRISB0 TRISBbits.TRISB0 // bit 0
22366 #define TRISB1 TRISBbits.TRISB1 // bit 1
22367 #define TRISB2 TRISBbits.TRISB2 // bit 2
22368 #define TRISB3 TRISBbits.TRISB3 // bit 3
22369 #define TRISB4 TRISBbits.TRISB4 // bit 4
22370 #define TRISB5 TRISBbits.TRISB5 // bit 5
22371 #define TRISB6 TRISBbits.TRISB6 // bit 6
22372 #define TRISB7 TRISBbits.TRISB7 // bit 7
22374 #define TRISC0 TRISCbits.TRISC0 // bit 0
22375 #define TRISC1 TRISCbits.TRISC1 // bit 1
22376 #define TRISC2 TRISCbits.TRISC2 // bit 2
22377 #define TRISC3 TRISCbits.TRISC3 // bit 3
22378 #define TRISC4 TRISCbits.TRISC4 // bit 4
22379 #define TRISC5 TRISCbits.TRISC5 // bit 5
22380 #define TRISC6 TRISCbits.TRISC6 // bit 6
22381 #define TRISC7 TRISCbits.TRISC7 // bit 7
22383 #define TRISD0 TRISDbits.TRISD0 // bit 0
22384 #define TRISD1 TRISDbits.TRISD1 // bit 1
22385 #define TRISD2 TRISDbits.TRISD2 // bit 2
22386 #define TRISD3 TRISDbits.TRISD3 // bit 3
22387 #define TRISD4 TRISDbits.TRISD4 // bit 4
22388 #define TRISD5 TRISDbits.TRISD5 // bit 5
22389 #define TRISD6 TRISDbits.TRISD6 // bit 6
22390 #define TRISD7 TRISDbits.TRISD7 // bit 7
22392 #define TRISE0 TRISEbits.TRISE0 // bit 0
22393 #define TRISE1 TRISEbits.TRISE1 // bit 1
22394 #define TRISE2 TRISEbits.TRISE2 // bit 2
22396 #define TXPPS0 TXPPSbits.TXPPS0 // bit 0
22397 #define TXPPS1 TXPPSbits.TXPPS1 // bit 1
22398 #define TXPPS2 TXPPSbits.TXPPS2 // bit 2
22399 #define TXPPS3 TXPPSbits.TXPPS3 // bit 3
22400 #define TXPPS4 TXPPSbits.TXPPS4 // bit 4
22402 #define WINDOW0 WDTCON1bits.WINDOW0 // bit 0, shadows bit in WDTCON1bits
22403 #define WDTWINDOW0 WDTCON1bits.WDTWINDOW0 // bit 0, shadows bit in WDTCON1bits
22404 #define WINDOW1 WDTCON1bits.WINDOW1 // bit 1, shadows bit in WDTCON1bits
22405 #define WDTWINDOW1 WDTCON1bits.WDTWINDOW1 // bit 1, shadows bit in WDTCON1bits
22406 #define WINDOW2 WDTCON1bits.WINDOW2 // bit 2, shadows bit in WDTCON1bits
22407 #define WDTWINDOW2 WDTCON1bits.WDTWINDOW2 // bit 2, shadows bit in WDTCON1bits
22408 #define WDTCS0 WDTCON1bits.WDTCS0 // bit 4
22409 #define WDTCS1 WDTCON1bits.WDTCS1 // bit 5
22410 #define WDTCS2 WDTCON1bits.WDTCS2 // bit 6
22412 #define PSCNT8 WDTPSHbits.PSCNT8 // bit 0, shadows bit in WDTPSHbits
22413 #define WDTPSCNT8 WDTPSHbits.WDTPSCNT8 // bit 0, shadows bit in WDTPSHbits
22414 #define PSCNT9 WDTPSHbits.PSCNT9 // bit 1, shadows bit in WDTPSHbits
22415 #define WDTPSCNT9 WDTPSHbits.WDTPSCNT9 // bit 1, shadows bit in WDTPSHbits
22416 #define PSCNT10 WDTPSHbits.PSCNT10 // bit 2, shadows bit in WDTPSHbits
22417 #define WDTPSCNT10 WDTPSHbits.WDTPSCNT10 // bit 2, shadows bit in WDTPSHbits
22418 #define PSCNT11 WDTPSHbits.PSCNT11 // bit 3, shadows bit in WDTPSHbits
22419 #define WDTPSCNT11 WDTPSHbits.WDTPSCNT11 // bit 3, shadows bit in WDTPSHbits
22420 #define PSCNT12 WDTPSHbits.PSCNT12 // bit 4, shadows bit in WDTPSHbits
22421 #define WDTPSCNT12 WDTPSHbits.WDTPSCNT12 // bit 4, shadows bit in WDTPSHbits
22422 #define PSCNT13 WDTPSHbits.PSCNT13 // bit 5, shadows bit in WDTPSHbits
22423 #define WDTPSCNT13 WDTPSHbits.WDTPSCNT13 // bit 5, shadows bit in WDTPSHbits
22424 #define PSCNT14 WDTPSHbits.PSCNT14 // bit 6, shadows bit in WDTPSHbits
22425 #define WDTPSCNT14 WDTPSHbits.WDTPSCNT14 // bit 6, shadows bit in WDTPSHbits
22426 #define PSCNT15 WDTPSHbits.PSCNT15 // bit 7, shadows bit in WDTPSHbits
22427 #define WDTPSCNT15 WDTPSHbits.WDTPSCNT15 // bit 7, shadows bit in WDTPSHbits
22429 #define PSCNT0 WDTPSLbits.PSCNT0 // bit 0, shadows bit in WDTPSLbits
22430 #define WDTPSCNT0 WDTPSLbits.WDTPSCNT0 // bit 0, shadows bit in WDTPSLbits
22431 #define PSCNT1 WDTPSLbits.PSCNT1 // bit 1, shadows bit in WDTPSLbits
22432 #define WDTPSCNT1 WDTPSLbits.WDTPSCNT1 // bit 1, shadows bit in WDTPSLbits
22433 #define PSCNT2 WDTPSLbits.PSCNT2 // bit 2, shadows bit in WDTPSLbits
22434 #define WDTPSCNT2 WDTPSLbits.WDTPSCNT2 // bit 2, shadows bit in WDTPSLbits
22435 #define PSCNT3 WDTPSLbits.PSCNT3 // bit 3, shadows bit in WDTPSLbits
22436 #define WDTPSCNT3 WDTPSLbits.WDTPSCNT3 // bit 3, shadows bit in WDTPSLbits
22437 #define PSCNT4 WDTPSLbits.PSCNT4 // bit 4, shadows bit in WDTPSLbits
22438 #define WDTPSCNT4 WDTPSLbits.WDTPSCNT4 // bit 4, shadows bit in WDTPSLbits
22439 #define PSCNT5 WDTPSLbits.PSCNT5 // bit 5, shadows bit in WDTPSLbits
22440 #define WDTPSCNT5 WDTPSLbits.WDTPSCNT5 // bit 5, shadows bit in WDTPSLbits
22441 #define PSCNT6 WDTPSLbits.PSCNT6 // bit 6, shadows bit in WDTPSLbits
22442 #define WDTPSCNT6 WDTPSLbits.WDTPSCNT6 // bit 6, shadows bit in WDTPSLbits
22443 #define PSCNT7 WDTPSLbits.PSCNT7 // bit 7, shadows bit in WDTPSLbits
22444 #define WDTPSCNT7 WDTPSLbits.WDTPSCNT7 // bit 7, shadows bit in WDTPSLbits
22446 #define PSCNT16 WDTTMRbits.PSCNT16 // bit 0, shadows bit in WDTTMRbits
22447 #define WDTPSCNT16 WDTTMRbits.WDTPSCNT16 // bit 0, shadows bit in WDTTMRbits
22448 #define PSCNT17 WDTTMRbits.PSCNT17 // bit 1, shadows bit in WDTTMRbits
22449 #define WDTPSCNT17 WDTTMRbits.WDTPSCNT17 // bit 1, shadows bit in WDTTMRbits
22450 #define STATE WDTTMRbits.STATE // bit 2, shadows bit in WDTTMRbits
22451 #define WDTSTATE WDTTMRbits.WDTSTATE // bit 2, shadows bit in WDTTMRbits
22452 #define WDTTMR0 WDTTMRbits.WDTTMR0 // bit 3
22453 #define WDTTMR1 WDTTMRbits.WDTTMR1 // bit 4
22454 #define WDTTMR2 WDTTMRbits.WDTTMR2 // bit 5
22455 #define WDTTMR3 WDTTMRbits.WDTTMR3 // bit 6
22457 #define WPUA0 WPUAbits.WPUA0 // bit 0
22458 #define WPUA1 WPUAbits.WPUA1 // bit 1
22459 #define WPUA2 WPUAbits.WPUA2 // bit 2
22460 #define WPUA3 WPUAbits.WPUA3 // bit 3
22461 #define WPUA4 WPUAbits.WPUA4 // bit 4
22462 #define WPUA5 WPUAbits.WPUA5 // bit 5
22463 #define WPUA6 WPUAbits.WPUA6 // bit 6
22464 #define WPUA7 WPUAbits.WPUA7 // bit 7
22466 #define WPUB0 WPUBbits.WPUB0 // bit 0
22467 #define WPUB1 WPUBbits.WPUB1 // bit 1
22468 #define WPUB2 WPUBbits.WPUB2 // bit 2
22469 #define WPUB3 WPUBbits.WPUB3 // bit 3
22470 #define WPUB4 WPUBbits.WPUB4 // bit 4
22471 #define WPUB5 WPUBbits.WPUB5 // bit 5
22472 #define WPUB6 WPUBbits.WPUB6 // bit 6
22473 #define WPUB7 WPUBbits.WPUB7 // bit 7
22475 #define WPUC0 WPUCbits.WPUC0 // bit 0
22476 #define WPUC1 WPUCbits.WPUC1 // bit 1
22477 #define WPUC2 WPUCbits.WPUC2 // bit 2
22478 #define WPUC3 WPUCbits.WPUC3 // bit 3
22479 #define WPUC4 WPUCbits.WPUC4 // bit 4
22480 #define WPUC5 WPUCbits.WPUC5 // bit 5
22481 #define WPUC6 WPUCbits.WPUC6 // bit 6
22482 #define WPUC7 WPUCbits.WPUC7 // bit 7
22484 #define WPUD0 WPUDbits.WPUD0 // bit 0
22485 #define WPUD1 WPUDbits.WPUD1 // bit 1
22486 #define WPUD2 WPUDbits.WPUD2 // bit 2
22487 #define WPUD3 WPUDbits.WPUD3 // bit 3
22488 #define WPUD4 WPUDbits.WPUD4 // bit 4
22489 #define WPUD5 WPUDbits.WPUD5 // bit 5
22490 #define WPUD6 WPUDbits.WPUD6 // bit 6
22491 #define WPUD7 WPUDbits.WPUD7 // bit 7
22493 #define WPUE0 WPUEbits.WPUE0 // bit 0
22494 #define WPUE1 WPUEbits.WPUE1 // bit 1
22495 #define WPUE2 WPUEbits.WPUE2 // bit 2
22496 #define WPUE3 WPUEbits.WPUE3 // bit 3
22498 #endif // #ifndef NO_BIT_DEFINES
22500 #endif // #ifndef __PIC16LF18875_H__