2 * This declarations of the PIC16LF1946 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:23 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16LF1946_H__
26 #define __PIC16LF1946_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PORTD_ADDR 0x000F
54 #define PORTE_ADDR 0x0010
55 #define PIR1_ADDR 0x0011
56 #define PIR2_ADDR 0x0012
57 #define PIR3_ADDR 0x0013
58 #define PIR4_ADDR 0x0014
59 #define TMR0_ADDR 0x0015
60 #define TMR1_ADDR 0x0016
61 #define TMR1L_ADDR 0x0016
62 #define TMR1H_ADDR 0x0017
63 #define T1CON_ADDR 0x0018
64 #define T1GCON_ADDR 0x0019
65 #define TMR2_ADDR 0x001A
66 #define PR2_ADDR 0x001B
67 #define T2CON_ADDR 0x001C
68 #define CPSCON0_ADDR 0x001E
69 #define CPSCON1_ADDR 0x001F
70 #define TRISA_ADDR 0x008C
71 #define TRISB_ADDR 0x008D
72 #define TRISC_ADDR 0x008E
73 #define TRISD_ADDR 0x008F
74 #define TRISE_ADDR 0x0090
75 #define PIE1_ADDR 0x0091
76 #define PIE2_ADDR 0x0092
77 #define PIE3_ADDR 0x0093
78 #define PIE4_ADDR 0x0094
79 #define OPTION_REG_ADDR 0x0095
80 #define PCON_ADDR 0x0096
81 #define WDTCON_ADDR 0x0097
82 #define OSCTUNE_ADDR 0x0098
83 #define OSCCON_ADDR 0x0099
84 #define OSCSTAT_ADDR 0x009A
85 #define ADRES_ADDR 0x009B
86 #define ADRESL_ADDR 0x009B
87 #define ADRESH_ADDR 0x009C
88 #define ADCON0_ADDR 0x009D
89 #define ADCON1_ADDR 0x009E
90 #define LATA_ADDR 0x010C
91 #define LATB_ADDR 0x010D
92 #define LATC_ADDR 0x010E
93 #define LATD_ADDR 0x010F
94 #define LATE_ADDR 0x0110
95 #define CM1CON0_ADDR 0x0111
96 #define CM1CON1_ADDR 0x0112
97 #define CM2CON0_ADDR 0x0113
98 #define CM2CON1_ADDR 0x0114
99 #define CMOUT_ADDR 0x0115
100 #define BORCON_ADDR 0x0116
101 #define FVRCON_ADDR 0x0117
102 #define DACCON0_ADDR 0x0118
103 #define DACCON1_ADDR 0x0119
104 #define SRCON0_ADDR 0x011A
105 #define SRCON1_ADDR 0x011B
106 #define APFCON_ADDR 0x011D
107 #define CM3CON0_ADDR 0x011E
108 #define CM3CON1_ADDR 0x011F
109 #define ANSELA_ADDR 0x018C
110 #define ANSELE_ADDR 0x0190
111 #define EEADR_ADDR 0x0191
112 #define EEADRL_ADDR 0x0191
113 #define EEADRH_ADDR 0x0192
114 #define EEDAT_ADDR 0x0193
115 #define EEDATL_ADDR 0x0193
116 #define EEDATH_ADDR 0x0194
117 #define EECON1_ADDR 0x0195
118 #define EECON2_ADDR 0x0196
119 #define RC1REG_ADDR 0x0199
120 #define RCREG_ADDR 0x0199
121 #define TX1REG_ADDR 0x019A
122 #define TXREG_ADDR 0x019A
123 #define SP1BRG_ADDR 0x019B
124 #define SP1BRGL_ADDR 0x019B
125 #define SPBRG_ADDR 0x019B
126 #define SPBRGL_ADDR 0x019B
127 #define SP1BRGH_ADDR 0x019C
128 #define SPBRGH_ADDR 0x019C
129 #define RC1STA_ADDR 0x019D
130 #define RCSTA_ADDR 0x019D
131 #define TX1STA_ADDR 0x019E
132 #define TXSTA_ADDR 0x019E
133 #define BAUD1CON_ADDR 0x019F
134 #define WPUB_ADDR 0x020D
135 #define SSP1BUF_ADDR 0x0211
136 #define SSPBUF_ADDR 0x0211
137 #define SSP1ADD_ADDR 0x0212
138 #define SSPADD_ADDR 0x0212
139 #define SSP1MSK_ADDR 0x0213
140 #define SSPMSK_ADDR 0x0213
141 #define SSP1STAT_ADDR 0x0214
142 #define SSPSTAT_ADDR 0x0214
143 #define SSP1CON1_ADDR 0x0215
144 #define SSPCON_ADDR 0x0215
145 #define SSPCON1_ADDR 0x0215
146 #define SSP1CON2_ADDR 0x0216
147 #define SSPCON2_ADDR 0x0216
148 #define SSP1CON3_ADDR 0x0217
149 #define SSPCON3_ADDR 0x0217
150 #define SSP2BUF_ADDR 0x0219
151 #define SSP2ADD_ADDR 0x021A
152 #define SSP2MSK_ADDR 0x021B
153 #define SSP2STAT_ADDR 0x021C
154 #define SSP2CON1_ADDR 0x021D
155 #define SSP2CON2_ADDR 0x021E
156 #define SSP2CON3_ADDR 0x021F
157 #define PORTF_ADDR 0x028C
158 #define PORTG_ADDR 0x028D
159 #define CCPR1_ADDR 0x0291
160 #define CCPR1L_ADDR 0x0291
161 #define CCPR1H_ADDR 0x0292
162 #define CCP1CON_ADDR 0x0293
163 #define PWM1CON_ADDR 0x0294
164 #define CCP1AS_ADDR 0x0295
165 #define ECCP1AS_ADDR 0x0295
166 #define PSTR1CON_ADDR 0x0296
167 #define CCPR2_ADDR 0x0298
168 #define CCPR2L_ADDR 0x0298
169 #define CCPR2H_ADDR 0x0299
170 #define CCP2CON_ADDR 0x029A
171 #define PWM2CON_ADDR 0x029B
172 #define CCP2AS_ADDR 0x029C
173 #define ECCP2AS_ADDR 0x029C
174 #define PSTR2CON_ADDR 0x029D
175 #define CCPTMRS0_ADDR 0x029E
176 #define CCPTMRS1_ADDR 0x029F
177 #define TRISF_ADDR 0x030C
178 #define TRISG_ADDR 0x030D
179 #define CCPR3_ADDR 0x0311
180 #define CCPR3L_ADDR 0x0311
181 #define CCPR3H_ADDR 0x0312
182 #define CCP3CON_ADDR 0x0313
183 #define PWM3CON_ADDR 0x0314
184 #define CCP3AS_ADDR 0x0315
185 #define ECCP3AS_ADDR 0x0315
186 #define PSTR3CON_ADDR 0x0316
187 #define CCPR4_ADDR 0x0318
188 #define CCPR4L_ADDR 0x0318
189 #define CCPR4H_ADDR 0x0319
190 #define CCP4CON_ADDR 0x031A
191 #define CCPR5_ADDR 0x031C
192 #define CCPR5L_ADDR 0x031C
193 #define CCPR5H_ADDR 0x031D
194 #define CCP5CON_ADDR 0x031E
195 #define LATF_ADDR 0x038C
196 #define LATG_ADDR 0x038D
197 #define IOCBP_ADDR 0x0394
198 #define IOCBN_ADDR 0x0395
199 #define IOCBF_ADDR 0x0396
200 #define ANSELF_ADDR 0x040C
201 #define ANSELG_ADDR 0x040D
202 #define TMR4_ADDR 0x0415
203 #define PR4_ADDR 0x0416
204 #define T4CON_ADDR 0x0417
205 #define TMR6_ADDR 0x041C
206 #define PR6_ADDR 0x041D
207 #define T6CON_ADDR 0x041E
208 #define WPUG_ADDR 0x048D
209 #define RC2REG_ADDR 0x0491
210 #define TX2REG_ADDR 0x0492
211 #define SP2BRGL_ADDR 0x0493
212 #define SPBRG2_ADDR 0x0493
213 #define SP2BRGH_ADDR 0x0494
214 #define RC2STA_ADDR 0x0495
215 #define TX2STA_ADDR 0x0496
216 #define BAUD2CON_ADDR 0x0497
217 #define LCDCON_ADDR 0x0791
218 #define LCDPS_ADDR 0x0792
219 #define LCDREF_ADDR 0x0793
220 #define LCDCST_ADDR 0x0794
221 #define LCDRL_ADDR 0x0795
222 #define LCDSE0_ADDR 0x0798
223 #define LCDSE1_ADDR 0x0799
224 #define LCDSE2_ADDR 0x079A
225 #define LCDSE3_ADDR 0x079B
226 #define LCDSE4_ADDR 0x079C
227 #define LCDSE5_ADDR 0x079D
228 #define LCDDATA0_ADDR 0x07A0
229 #define LCDDATA1_ADDR 0x07A1
230 #define LCDDATA2_ADDR 0x07A2
231 #define LCDDATA3_ADDR 0x07A3
232 #define LCDDATA4_ADDR 0x07A4
233 #define LCDDATA5_ADDR 0x07A5
234 #define LCDDATA6_ADDR 0x07A6
235 #define LCDDATA7_ADDR 0x07A7
236 #define LCDDATA8_ADDR 0x07A8
237 #define LCDDATA9_ADDR 0x07A9
238 #define LCDDATA10_ADDR 0x07AA
239 #define LCDDATA11_ADDR 0x07AB
240 #define LCDDATA12_ADDR 0x07AC
241 #define LCDDATA13_ADDR 0x07AD
242 #define LCDDATA14_ADDR 0x07AE
243 #define LCDDATA15_ADDR 0x07AF
244 #define LCDDATA16_ADDR 0x07B0
245 #define LCDDATA17_ADDR 0x07B1
246 #define LCDDATA18_ADDR 0x07B2
247 #define LCDDATA19_ADDR 0x07B3
248 #define LCDDATA20_ADDR 0x07B4
249 #define LCDDATA21_ADDR 0x07B5
250 #define LCDDATA22_ADDR 0x07B6
251 #define LCDDATA23_ADDR 0x07B7
252 #define STATUS_SHAD_ADDR 0x0FE4
253 #define WREG_SHAD_ADDR 0x0FE5
254 #define BSR_SHAD_ADDR 0x0FE6
255 #define PCLATH_SHAD_ADDR 0x0FE7
256 #define FSR0L_SHAD_ADDR 0x0FE8
257 #define FSR0H_SHAD_ADDR 0x0FE9
258 #define FSR1L_SHAD_ADDR 0x0FEA
259 #define FSR1H_SHAD_ADDR 0x0FEB
260 #define STKPTR_ADDR 0x0FED
261 #define TOSL_ADDR 0x0FEE
262 #define TOSH_ADDR 0x0FEF
264 #endif // #ifndef NO_ADDR_DEFINES
266 //==============================================================================
268 // Register Definitions
270 //==============================================================================
272 extern __at(0x0000) __sfr INDF0
;
273 extern __at(0x0001) __sfr INDF1
;
274 extern __at(0x0002) __sfr PCL
;
276 //==============================================================================
279 extern __at(0x0003) __sfr STATUS
;
293 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
301 //==============================================================================
303 extern __at(0x0004) __sfr FSR0
;
304 extern __at(0x0004) __sfr FSR0L
;
305 extern __at(0x0005) __sfr FSR0H
;
306 extern __at(0x0006) __sfr FSR1
;
307 extern __at(0x0006) __sfr FSR1L
;
308 extern __at(0x0007) __sfr FSR1H
;
310 //==============================================================================
313 extern __at(0x0008) __sfr BSR
;
336 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
344 //==============================================================================
346 extern __at(0x0009) __sfr WREG
;
347 extern __at(0x000A) __sfr PCLATH
;
349 //==============================================================================
352 extern __at(0x000B) __sfr INTCON
;
381 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
394 //==============================================================================
397 //==============================================================================
400 extern __at(0x000C) __sfr PORTA
;
465 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
501 //==============================================================================
504 //==============================================================================
507 extern __at(0x000D) __sfr PORTB
;
560 extern __at(0x000D) volatile __PORTBbits_t PORTBbits
;
582 //==============================================================================
585 //==============================================================================
588 extern __at(0x000E) __sfr PORTC
;
653 extern __at(0x000E) volatile __PORTCbits_t PORTCbits
;
688 //==============================================================================
691 //==============================================================================
694 extern __at(0x000F) __sfr PORTD
;
731 unsigned NOT_SS2
: 1;
759 extern __at(0x000F) volatile __PORTDbits_t PORTDbits
;
789 #define _NOT_SS2 0x80
791 //==============================================================================
794 //==============================================================================
797 extern __at(0x0010) __sfr PORTE
;
857 extern __at(0x0010) volatile __PORTEbits_t PORTEbits
;
859 #define _PORTE_RE0 0x01
860 #define _PORTE_VLCD1 0x01
861 #define _PORTE_P2D 0x01
862 #define _PORTE_RE1 0x02
863 #define _PORTE_VLCD2 0x02
864 #define _PORTE_P2C 0x02
865 #define _PORTE_RE2 0x04
866 #define _PORTE_VLCD3 0x04
867 #define _PORTE_P2B 0x04
868 #define _PORTE_RE3 0x08
869 #define _PORTE_COM0 0x08
870 #define _PORTE_P3C 0x08
871 #define _PORTE_RE4 0x10
872 #define _PORTE_COM1 0x10
873 #define _PORTE_P3B 0x10
874 #define _PORTE_RE5 0x20
875 #define _PORTE_COM2 0x20
876 #define _PORTE_P1C 0x20
877 #define _PORTE_RE6 0x40
878 #define _PORTE_COM3 0x40
879 #define _PORTE_P1B 0x40
880 #define _PORTE_RE7 0x80
881 #define _PORTE_SEG31 0x80
882 #define _PORTE_P2A 0x80
883 #define _PORTE_CCP2 0x80
885 //==============================================================================
888 //==============================================================================
891 extern __at(0x0011) __sfr PIR1
;
904 unsigned TMR1GIF
: 1;
920 extern __at(0x0011) volatile __PIR1bits_t PIR1bits
;
932 #define _TMR1GIF 0x80
934 //==============================================================================
937 //==============================================================================
940 extern __at(0x0012) __sfr PIR2
;
954 extern __at(0x0012) volatile __PIR2bits_t PIR2bits
;
965 //==============================================================================
968 //==============================================================================
971 extern __at(0x0013) __sfr PIR3
;
985 extern __at(0x0013) volatile __PIR3bits_t PIR3bits
;
993 //==============================================================================
996 //==============================================================================
999 extern __at(0x0014) __sfr PIR4
;
1003 unsigned SSP2IF
: 1;
1004 unsigned BCL2IF
: 1;
1013 extern __at(0x0014) volatile __PIR4bits_t PIR4bits
;
1015 #define _SSP2IF 0x01
1016 #define _BCL2IF 0x02
1020 //==============================================================================
1022 extern __at(0x0015) __sfr TMR0
;
1023 extern __at(0x0016) __sfr TMR1
;
1024 extern __at(0x0016) __sfr TMR1L
;
1025 extern __at(0x0017) __sfr TMR1H
;
1027 //==============================================================================
1030 extern __at(0x0018) __sfr T1CON
;
1036 unsigned TMR1ON
: 1;
1038 unsigned NOT_T1SYNC
: 1;
1039 unsigned T1OSCEN
: 1;
1040 unsigned T1CKPS0
: 1;
1041 unsigned T1CKPS1
: 1;
1042 unsigned TMR1CS0
: 1;
1043 unsigned TMR1CS1
: 1;
1049 unsigned T1CKPS
: 2;
1056 unsigned TMR1CS
: 2;
1060 extern __at(0x0018) volatile __T1CONbits_t T1CONbits
;
1062 #define _TMR1ON 0x01
1063 #define _NOT_T1SYNC 0x04
1064 #define _T1OSCEN 0x08
1065 #define _T1CKPS0 0x10
1066 #define _T1CKPS1 0x20
1067 #define _TMR1CS0 0x40
1068 #define _TMR1CS1 0x80
1070 //==============================================================================
1073 //==============================================================================
1076 extern __at(0x0019) __sfr T1GCON
;
1082 unsigned T1GSS0
: 1;
1083 unsigned T1GSS1
: 1;
1084 unsigned T1GVAL
: 1;
1085 unsigned T1GGO_NOT_DONE
: 1;
1086 unsigned T1GSPM
: 1;
1088 unsigned T1GPOL
: 1;
1089 unsigned TMR1GE
: 1;
1111 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits
;
1113 #define _T1GSS0 0x01
1114 #define _T1GSS1 0x02
1115 #define _T1GVAL 0x04
1116 #define _T1GGO_NOT_DONE 0x08
1118 #define _T1GSPM 0x10
1120 #define _T1GPOL 0x40
1121 #define _TMR1GE 0x80
1123 //==============================================================================
1125 extern __at(0x001A) __sfr TMR2
;
1126 extern __at(0x001B) __sfr PR2
;
1128 //==============================================================================
1131 extern __at(0x001C) __sfr T2CON
;
1137 unsigned T2CKPS0
: 1;
1138 unsigned T2CKPS1
: 1;
1139 unsigned TMR2ON
: 1;
1140 unsigned T2OUTPS0
: 1;
1141 unsigned T2OUTPS1
: 1;
1142 unsigned T2OUTPS2
: 1;
1143 unsigned T2OUTPS3
: 1;
1149 unsigned T2CKPS
: 2;
1156 unsigned T2OUTPS
: 4;
1161 extern __at(0x001C) volatile __T2CONbits_t T2CONbits
;
1163 #define _T2CKPS0 0x01
1164 #define _T2CKPS1 0x02
1165 #define _TMR2ON 0x04
1166 #define _T2OUTPS0 0x08
1167 #define _T2OUTPS1 0x10
1168 #define _T2OUTPS2 0x20
1169 #define _T2OUTPS3 0x40
1171 //==============================================================================
1174 //==============================================================================
1177 extern __at(0x001E) __sfr CPSCON0
;
1184 unsigned CPSOUT
: 1;
1185 unsigned CPSRNG0
: 1;
1186 unsigned CPSRNG1
: 1;
1196 unsigned CPSRNG
: 2;
1201 extern __at(0x001E) volatile __CPSCON0bits_t CPSCON0bits
;
1204 #define _CPSOUT 0x02
1205 #define _CPSRNG0 0x04
1206 #define _CPSRNG1 0x08
1210 //==============================================================================
1213 //==============================================================================
1216 extern __at(0x001F) __sfr CPSCON1
;
1222 unsigned CPSCH0
: 1;
1223 unsigned CPSCH1
: 1;
1224 unsigned CPSCH2
: 1;
1225 unsigned CPSCH3
: 1;
1226 unsigned CPSCH4
: 1;
1239 extern __at(0x001F) volatile __CPSCON1bits_t CPSCON1bits
;
1241 #define _CPSCH0 0x01
1242 #define _CPSCH1 0x02
1243 #define _CPSCH2 0x04
1244 #define _CPSCH3 0x08
1245 #define _CPSCH4 0x10
1247 //==============================================================================
1250 //==============================================================================
1253 extern __at(0x008C) __sfr TRISA
;
1257 unsigned TRISA0
: 1;
1258 unsigned TRISA1
: 1;
1259 unsigned TRISA2
: 1;
1260 unsigned TRISA3
: 1;
1261 unsigned TRISA4
: 1;
1262 unsigned TRISA5
: 1;
1263 unsigned TRISA6
: 1;
1264 unsigned TRISA7
: 1;
1267 extern __at(0x008C) volatile __TRISAbits_t TRISAbits
;
1269 #define _TRISA0 0x01
1270 #define _TRISA1 0x02
1271 #define _TRISA2 0x04
1272 #define _TRISA3 0x08
1273 #define _TRISA4 0x10
1274 #define _TRISA5 0x20
1275 #define _TRISA6 0x40
1276 #define _TRISA7 0x80
1278 //==============================================================================
1281 //==============================================================================
1284 extern __at(0x008D) __sfr TRISB
;
1288 unsigned TRISB0
: 1;
1289 unsigned TRISB1
: 1;
1290 unsigned TRISB2
: 1;
1291 unsigned TRISB3
: 1;
1292 unsigned TRISB4
: 1;
1293 unsigned TRISB5
: 1;
1294 unsigned TRISB6
: 1;
1295 unsigned TRISB7
: 1;
1298 extern __at(0x008D) volatile __TRISBbits_t TRISBbits
;
1300 #define _TRISB0 0x01
1301 #define _TRISB1 0x02
1302 #define _TRISB2 0x04
1303 #define _TRISB3 0x08
1304 #define _TRISB4 0x10
1305 #define _TRISB5 0x20
1306 #define _TRISB6 0x40
1307 #define _TRISB7 0x80
1309 //==============================================================================
1312 //==============================================================================
1315 extern __at(0x008E) __sfr TRISC
;
1319 unsigned TRISC0
: 1;
1320 unsigned TRISC1
: 1;
1321 unsigned TRISC2
: 1;
1322 unsigned TRISC3
: 1;
1323 unsigned TRISC4
: 1;
1324 unsigned TRISC5
: 1;
1325 unsigned TRISC6
: 1;
1326 unsigned TRISC7
: 1;
1329 extern __at(0x008E) volatile __TRISCbits_t TRISCbits
;
1331 #define _TRISC0 0x01
1332 #define _TRISC1 0x02
1333 #define _TRISC2 0x04
1334 #define _TRISC3 0x08
1335 #define _TRISC4 0x10
1336 #define _TRISC5 0x20
1337 #define _TRISC6 0x40
1338 #define _TRISC7 0x80
1340 //==============================================================================
1343 //==============================================================================
1346 extern __at(0x008F) __sfr TRISD
;
1350 unsigned TRISD0
: 1;
1351 unsigned TRISD1
: 1;
1352 unsigned TRISD2
: 1;
1353 unsigned TRISD3
: 1;
1354 unsigned TRISD4
: 1;
1355 unsigned TRISD5
: 1;
1356 unsigned TRISD6
: 1;
1357 unsigned TRISD7
: 1;
1360 extern __at(0x008F) volatile __TRISDbits_t TRISDbits
;
1362 #define _TRISD0 0x01
1363 #define _TRISD1 0x02
1364 #define _TRISD2 0x04
1365 #define _TRISD3 0x08
1366 #define _TRISD4 0x10
1367 #define _TRISD5 0x20
1368 #define _TRISD6 0x40
1369 #define _TRISD7 0x80
1371 //==============================================================================
1374 //==============================================================================
1377 extern __at(0x0090) __sfr TRISE
;
1381 unsigned TRISE0
: 1;
1382 unsigned TRISE1
: 1;
1383 unsigned TRISE2
: 1;
1384 unsigned TRISE3
: 1;
1385 unsigned TRISE4
: 1;
1386 unsigned TRISE5
: 1;
1387 unsigned TRISE6
: 1;
1388 unsigned TRISE7
: 1;
1391 extern __at(0x0090) volatile __TRISEbits_t TRISEbits
;
1393 #define _TRISE0 0x01
1394 #define _TRISE1 0x02
1395 #define _TRISE2 0x04
1396 #define _TRISE3 0x08
1397 #define _TRISE4 0x10
1398 #define _TRISE5 0x20
1399 #define _TRISE6 0x40
1400 #define _TRISE7 0x80
1402 //==============================================================================
1405 //==============================================================================
1408 extern __at(0x0091) __sfr PIE1
;
1414 unsigned TMR1IE
: 1;
1415 unsigned TMR2IE
: 1;
1416 unsigned CCP1IE
: 1;
1417 unsigned SSP1IE
: 1;
1421 unsigned TMR1GIE
: 1;
1437 extern __at(0x0091) volatile __PIE1bits_t PIE1bits
;
1439 #define _TMR1IE 0x01
1440 #define _TMR2IE 0x02
1441 #define _CCP1IE 0x04
1442 #define _SSP1IE 0x08
1449 #define _TMR1GIE 0x80
1451 //==============================================================================
1454 //==============================================================================
1457 extern __at(0x0092) __sfr PIE2
;
1461 unsigned CCP2IE
: 1;
1471 extern __at(0x0092) volatile __PIE2bits_t PIE2bits
;
1473 #define _CCP2IE 0x01
1482 //==============================================================================
1485 //==============================================================================
1488 extern __at(0x0093) __sfr PIE3
;
1493 unsigned TMR4IE
: 1;
1495 unsigned TMR6IE
: 1;
1496 unsigned CCP3IE
: 1;
1497 unsigned CCP4IE
: 1;
1498 unsigned CCP5IE
: 1;
1502 extern __at(0x0093) volatile __PIE3bits_t PIE3bits
;
1504 #define _TMR4IE 0x02
1505 #define _TMR6IE 0x08
1506 #define _CCP3IE 0x10
1507 #define _CCP4IE 0x20
1508 #define _CCP5IE 0x40
1510 //==============================================================================
1513 //==============================================================================
1516 extern __at(0x0094) __sfr PIE4
;
1520 unsigned SSP2IE
: 1;
1521 unsigned BCL2IE
: 1;
1530 extern __at(0x0094) volatile __PIE4bits_t PIE4bits
;
1532 #define _SSP2IE 0x01
1533 #define _BCL2IE 0x02
1537 //==============================================================================
1540 //==============================================================================
1543 extern __at(0x0095) __sfr OPTION_REG
;
1555 unsigned INTEDG
: 1;
1556 unsigned NOT_WPUEN
: 1;
1565 unsigned TMR0SE
: 1;
1566 unsigned TMR0CS
: 1;
1576 } __OPTION_REGbits_t
;
1578 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits
;
1585 #define _TMR0SE 0x10
1587 #define _TMR0CS 0x20
1588 #define _INTEDG 0x40
1589 #define _NOT_WPUEN 0x80
1591 //==============================================================================
1594 //==============================================================================
1597 extern __at(0x0096) __sfr PCON
;
1601 unsigned NOT_BOR
: 1;
1602 unsigned NOT_POR
: 1;
1603 unsigned NOT_RI
: 1;
1604 unsigned NOT_RMCLR
: 1;
1607 unsigned STKUNF
: 1;
1608 unsigned STKOVF
: 1;
1611 extern __at(0x0096) volatile __PCONbits_t PCONbits
;
1613 #define _NOT_BOR 0x01
1614 #define _NOT_POR 0x02
1615 #define _NOT_RI 0x04
1616 #define _NOT_RMCLR 0x08
1617 #define _STKUNF 0x40
1618 #define _STKOVF 0x80
1620 //==============================================================================
1623 //==============================================================================
1626 extern __at(0x0097) __sfr WDTCON
;
1632 unsigned SWDTEN
: 1;
1633 unsigned WDTPS0
: 1;
1634 unsigned WDTPS1
: 1;
1635 unsigned WDTPS2
: 1;
1636 unsigned WDTPS3
: 1;
1637 unsigned WDTPS4
: 1;
1650 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits
;
1652 #define _SWDTEN 0x01
1653 #define _WDTPS0 0x02
1654 #define _WDTPS1 0x04
1655 #define _WDTPS2 0x08
1656 #define _WDTPS3 0x10
1657 #define _WDTPS4 0x20
1659 //==============================================================================
1662 //==============================================================================
1665 extern __at(0x0098) __sfr OSCTUNE
;
1688 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits
;
1697 //==============================================================================
1700 //==============================================================================
1703 extern __at(0x0099) __sfr OSCCON
;
1716 unsigned SPLLEN
: 1;
1733 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits
;
1741 #define _SPLLEN 0x80
1743 //==============================================================================
1746 //==============================================================================
1749 extern __at(0x009A) __sfr OSCSTAT
;
1753 unsigned HFIOFS
: 1;
1754 unsigned LFIOFR
: 1;
1755 unsigned MFIOFR
: 1;
1756 unsigned HFIOFL
: 1;
1757 unsigned HFIOFR
: 1;
1760 unsigned T1OSCR
: 1;
1763 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits
;
1765 #define _HFIOFS 0x01
1766 #define _LFIOFR 0x02
1767 #define _MFIOFR 0x04
1768 #define _HFIOFL 0x08
1769 #define _HFIOFR 0x10
1772 #define _T1OSCR 0x80
1774 //==============================================================================
1776 extern __at(0x009B) __sfr ADRES
;
1777 extern __at(0x009B) __sfr ADRESL
;
1778 extern __at(0x009C) __sfr ADRESH
;
1780 //==============================================================================
1783 extern __at(0x009D) __sfr ADCON0
;
1790 unsigned GO_NOT_DONE
: 1;
1826 unsigned NOT_DONE
: 1;
1843 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits
;
1846 #define _GO_NOT_DONE 0x02
1849 #define _NOT_DONE 0x02
1856 //==============================================================================
1859 //==============================================================================
1862 extern __at(0x009E) __sfr ADCON1
;
1868 unsigned ADPREF0
: 1;
1869 unsigned ADPREF1
: 1;
1870 unsigned ADNREF
: 1;
1880 unsigned ADPREF
: 2;
1892 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits
;
1894 #define _ADPREF0 0x01
1895 #define _ADPREF1 0x02
1896 #define _ADNREF 0x04
1902 //==============================================================================
1905 //==============================================================================
1908 extern __at(0x010C) __sfr LATA
;
1922 extern __at(0x010C) volatile __LATAbits_t LATAbits
;
1933 //==============================================================================
1936 //==============================================================================
1939 extern __at(0x010D) __sfr LATB
;
1953 extern __at(0x010D) volatile __LATBbits_t LATBbits
;
1964 //==============================================================================
1967 //==============================================================================
1970 extern __at(0x010E) __sfr LATC
;
1984 extern __at(0x010E) volatile __LATCbits_t LATCbits
;
1995 //==============================================================================
1998 //==============================================================================
2001 extern __at(0x010F) __sfr LATD
;
2015 extern __at(0x010F) volatile __LATDbits_t LATDbits
;
2026 //==============================================================================
2029 //==============================================================================
2032 extern __at(0x0110) __sfr LATE
;
2046 extern __at(0x0110) volatile __LATEbits_t LATEbits
;
2057 //==============================================================================
2060 //==============================================================================
2063 extern __at(0x0111) __sfr CM1CON0
;
2067 unsigned C1SYNC
: 1;
2077 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits
;
2079 #define _C1SYNC 0x01
2087 //==============================================================================
2090 //==============================================================================
2093 extern __at(0x0112) __sfr CM1CON1
;
2099 unsigned C1NCH0
: 1;
2100 unsigned C1NCH1
: 1;
2103 unsigned C1PCH0
: 1;
2104 unsigned C1PCH1
: 1;
2105 unsigned C1INTN
: 1;
2106 unsigned C1INTP
: 1;
2123 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits
;
2125 #define _C1NCH0 0x01
2126 #define _C1NCH1 0x02
2127 #define _C1PCH0 0x10
2128 #define _C1PCH1 0x20
2129 #define _C1INTN 0x40
2130 #define _C1INTP 0x80
2132 //==============================================================================
2135 //==============================================================================
2138 extern __at(0x0113) __sfr CM2CON0
;
2142 unsigned C2SYNC
: 1;
2152 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits
;
2154 #define _C2SYNC 0x01
2162 //==============================================================================
2165 //==============================================================================
2168 extern __at(0x0114) __sfr CM2CON1
;
2174 unsigned C2NCH0
: 1;
2175 unsigned C2NCH1
: 1;
2178 unsigned C2PCH0
: 1;
2179 unsigned C2PCH1
: 1;
2180 unsigned C2INTN
: 1;
2181 unsigned C2INTP
: 1;
2198 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits
;
2200 #define _C2NCH0 0x01
2201 #define _C2NCH1 0x02
2202 #define _C2PCH0 0x10
2203 #define _C2PCH1 0x20
2204 #define _C2INTN 0x40
2205 #define _C2INTP 0x80
2207 //==============================================================================
2210 //==============================================================================
2213 extern __at(0x0115) __sfr CMOUT
;
2217 unsigned MC1OUT
: 1;
2218 unsigned MC2OUT
: 1;
2219 unsigned MC3OUT
: 1;
2227 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits
;
2229 #define _MC1OUT 0x01
2230 #define _MC2OUT 0x02
2231 #define _MC3OUT 0x04
2233 //==============================================================================
2236 //==============================================================================
2239 extern __at(0x0116) __sfr BORCON
;
2243 unsigned BORRDY
: 1;
2250 unsigned SBOREN
: 1;
2253 extern __at(0x0116) volatile __BORCONbits_t BORCONbits
;
2255 #define _BORRDY 0x01
2256 #define _SBOREN 0x80
2258 //==============================================================================
2261 //==============================================================================
2264 extern __at(0x0117) __sfr FVRCON
;
2270 unsigned ADFVR0
: 1;
2271 unsigned ADFVR1
: 1;
2272 unsigned CDAFVR0
: 1;
2273 unsigned CDAFVR1
: 1;
2276 unsigned FVRRDY
: 1;
2289 unsigned CDAFVR
: 2;
2294 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits
;
2296 #define _ADFVR0 0x01
2297 #define _ADFVR1 0x02
2298 #define _CDAFVR0 0x04
2299 #define _CDAFVR1 0x08
2300 #define _FVRRDY 0x40
2303 //==============================================================================
2306 //==============================================================================
2309 extern __at(0x0118) __sfr DACCON0
;
2315 unsigned DACNSS
: 1;
2317 unsigned DACPSS0
: 1;
2318 unsigned DACPSS1
: 1;
2321 unsigned DACLPS
: 1;
2328 unsigned DACPSS
: 2;
2333 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits
;
2335 #define _DACNSS 0x01
2336 #define _DACPSS0 0x04
2337 #define _DACPSS1 0x08
2339 #define _DACLPS 0x40
2342 //==============================================================================
2345 //==============================================================================
2348 extern __at(0x0119) __sfr DACCON1
;
2371 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits
;
2379 //==============================================================================
2382 //==============================================================================
2385 extern __at(0x011A) __sfr SRCON0
;
2393 unsigned SRNQEN
: 1;
2395 unsigned SRCLK0
: 1;
2396 unsigned SRCLK1
: 1;
2397 unsigned SRCLK2
: 1;
2409 extern __at(0x011A) volatile __SRCON0bits_t SRCON0bits
;
2413 #define _SRNQEN 0x04
2415 #define _SRCLK0 0x10
2416 #define _SRCLK1 0x20
2417 #define _SRCLK2 0x40
2420 //==============================================================================
2423 //==============================================================================
2426 extern __at(0x011B) __sfr SRCON1
;
2430 unsigned SRRC1E
: 1;
2431 unsigned SRRC2E
: 1;
2432 unsigned SRRCKE
: 1;
2434 unsigned SRSC1E
: 1;
2435 unsigned SRSC2E
: 1;
2436 unsigned SRSCKE
: 1;
2440 extern __at(0x011B) volatile __SRCON1bits_t SRCON1bits
;
2442 #define _SRRC1E 0x01
2443 #define _SRRC2E 0x02
2444 #define _SRRCKE 0x04
2446 #define _SRSC1E 0x10
2447 #define _SRSC2E 0x20
2448 #define _SRSCKE 0x40
2451 //==============================================================================
2454 //==============================================================================
2457 extern __at(0x011D) __sfr APFCON
;
2461 unsigned P1BSEL
: 1;
2462 unsigned P1CSEL
: 1;
2463 unsigned CCP2SEL
: 1;
2464 unsigned P2BSEL
: 1;
2465 unsigned P2CSEL
: 1;
2466 unsigned P2DSEL
: 1;
2467 unsigned P3BSEL
: 1;
2468 unsigned P3CSEL
: 1;
2471 extern __at(0x011D) volatile __APFCONbits_t APFCONbits
;
2473 #define _P1BSEL 0x01
2474 #define _P1CSEL 0x02
2475 #define _CCP2SEL 0x04
2476 #define _P2BSEL 0x08
2477 #define _P2CSEL 0x10
2478 #define _P2DSEL 0x20
2479 #define _P3BSEL 0x40
2480 #define _P3CSEL 0x80
2482 //==============================================================================
2485 //==============================================================================
2488 extern __at(0x011E) __sfr CM3CON0
;
2492 unsigned C3SYNC
: 1;
2502 extern __at(0x011E) volatile __CM3CON0bits_t CM3CON0bits
;
2504 #define _C3SYNC 0x01
2512 //==============================================================================
2515 //==============================================================================
2518 extern __at(0x011F) __sfr CM3CON1
;
2524 unsigned C3NCH0
: 1;
2525 unsigned C3NCH1
: 1;
2528 unsigned C3PCH0
: 1;
2529 unsigned C3PCH1
: 1;
2530 unsigned C3INTN
: 1;
2531 unsigned C3INTP
: 1;
2548 extern __at(0x011F) volatile __CM3CON1bits_t CM3CON1bits
;
2550 #define _C3NCH0 0x01
2551 #define _C3NCH1 0x02
2552 #define _C3PCH0 0x10
2553 #define _C3PCH1 0x20
2554 #define _C3INTN 0x40
2555 #define _C3INTP 0x80
2557 //==============================================================================
2560 //==============================================================================
2563 extern __at(0x018C) __sfr ANSELA
;
2577 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits
;
2585 //==============================================================================
2588 //==============================================================================
2591 extern __at(0x0190) __sfr ANSELE
;
2614 extern __at(0x0190) volatile __ANSELEbits_t ANSELEbits
;
2620 //==============================================================================
2622 extern __at(0x0191) __sfr EEADR
;
2623 extern __at(0x0191) __sfr EEADRL
;
2624 extern __at(0x0192) __sfr EEADRH
;
2625 extern __at(0x0193) __sfr EEDAT
;
2626 extern __at(0x0193) __sfr EEDATL
;
2627 extern __at(0x0194) __sfr EEDATH
;
2629 //==============================================================================
2632 extern __at(0x0195) __sfr EECON1
;
2646 extern __at(0x0195) volatile __EECON1bits_t EECON1bits
;
2657 //==============================================================================
2659 extern __at(0x0196) __sfr EECON2
;
2660 extern __at(0x0199) __sfr RC1REG
;
2661 extern __at(0x0199) __sfr RCREG
;
2662 extern __at(0x019A) __sfr TX1REG
;
2663 extern __at(0x019A) __sfr TXREG
;
2664 extern __at(0x019B) __sfr SP1BRG
;
2665 extern __at(0x019B) __sfr SP1BRGL
;
2666 extern __at(0x019B) __sfr SPBRG
;
2667 extern __at(0x019B) __sfr SPBRGL
;
2668 extern __at(0x019C) __sfr SP1BRGH
;
2669 extern __at(0x019C) __sfr SPBRGH
;
2671 //==============================================================================
2674 extern __at(0x019D) __sfr RC1STA
;
2688 extern __at(0x019D) volatile __RC1STAbits_t RC1STAbits
;
2699 //==============================================================================
2702 //==============================================================================
2705 extern __at(0x019D) __sfr RCSTA
;
2719 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits
;
2721 #define _RCSTA_RX9D 0x01
2722 #define _RCSTA_OERR 0x02
2723 #define _RCSTA_FERR 0x04
2724 #define _RCSTA_ADDEN 0x08
2725 #define _RCSTA_CREN 0x10
2726 #define _RCSTA_SREN 0x20
2727 #define _RCSTA_RX9 0x40
2728 #define _RCSTA_SPEN 0x80
2730 //==============================================================================
2733 //==============================================================================
2736 extern __at(0x019E) __sfr TX1STA
;
2750 extern __at(0x019E) volatile __TX1STAbits_t TX1STAbits
;
2761 //==============================================================================
2764 //==============================================================================
2767 extern __at(0x019E) __sfr TXSTA
;
2781 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits
;
2783 #define _TXSTA_TX9D 0x01
2784 #define _TXSTA_TRMT 0x02
2785 #define _TXSTA_BRGH 0x04
2786 #define _TXSTA_SENDB 0x08
2787 #define _TXSTA_SYNC 0x10
2788 #define _TXSTA_TXEN 0x20
2789 #define _TXSTA_TX9 0x40
2790 #define _TXSTA_CSRC 0x80
2792 //==============================================================================
2795 //==============================================================================
2798 extern __at(0x019F) __sfr BAUD1CON
;
2809 unsigned ABDOVF
: 1;
2812 extern __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits
;
2819 #define _ABDOVF 0x80
2821 //==============================================================================
2824 //==============================================================================
2827 extern __at(0x020D) __sfr WPUB
;
2841 extern __at(0x020D) volatile __WPUBbits_t WPUBbits
;
2852 //==============================================================================
2854 extern __at(0x0211) __sfr SSP1BUF
;
2855 extern __at(0x0211) __sfr SSPBUF
;
2856 extern __at(0x0212) __sfr SSP1ADD
;
2857 extern __at(0x0212) __sfr SSPADD
;
2858 extern __at(0x0213) __sfr SSP1MSK
;
2859 extern __at(0x0213) __sfr SSPMSK
;
2861 //==============================================================================
2864 extern __at(0x0214) __sfr SSP1STAT
;
2870 unsigned R_NOT_W
: 1;
2873 unsigned D_NOT_A
: 1;
2878 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits
;
2882 #define _R_NOT_W 0x04
2885 #define _D_NOT_A 0x20
2889 //==============================================================================
2892 //==============================================================================
2895 extern __at(0x0214) __sfr SSPSTAT
;
2901 unsigned R_NOT_W
: 1;
2904 unsigned D_NOT_A
: 1;
2909 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits
;
2911 #define _SSPSTAT_BF 0x01
2912 #define _SSPSTAT_UA 0x02
2913 #define _SSPSTAT_R_NOT_W 0x04
2914 #define _SSPSTAT_S 0x08
2915 #define _SSPSTAT_P 0x10
2916 #define _SSPSTAT_D_NOT_A 0x20
2917 #define _SSPSTAT_CKE 0x40
2918 #define _SSPSTAT_SMP 0x80
2920 //==============================================================================
2923 //==============================================================================
2926 extern __at(0x0215) __sfr SSP1CON1
;
2949 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits
;
2960 //==============================================================================
2963 //==============================================================================
2966 extern __at(0x0215) __sfr SSPCON
;
2989 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits
;
2991 #define _SSPCON_SSPM0 0x01
2992 #define _SSPCON_SSPM1 0x02
2993 #define _SSPCON_SSPM2 0x04
2994 #define _SSPCON_SSPM3 0x08
2995 #define _SSPCON_CKP 0x10
2996 #define _SSPCON_SSPEN 0x20
2997 #define _SSPCON_SSPOV 0x40
2998 #define _SSPCON_WCOL 0x80
3000 //==============================================================================
3003 //==============================================================================
3006 extern __at(0x0215) __sfr SSPCON1
;
3029 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits
;
3031 #define _SSPCON1_SSPM0 0x01
3032 #define _SSPCON1_SSPM1 0x02
3033 #define _SSPCON1_SSPM2 0x04
3034 #define _SSPCON1_SSPM3 0x08
3035 #define _SSPCON1_CKP 0x10
3036 #define _SSPCON1_SSPEN 0x20
3037 #define _SSPCON1_SSPOV 0x40
3038 #define _SSPCON1_WCOL 0x80
3040 //==============================================================================
3043 //==============================================================================
3046 extern __at(0x0216) __sfr SSP1CON2
;
3056 unsigned ACKSTAT
: 1;
3060 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits
;
3068 #define _ACKSTAT 0x40
3071 //==============================================================================
3074 //==============================================================================
3077 extern __at(0x0216) __sfr SSPCON2
;
3087 unsigned ACKSTAT
: 1;
3091 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits
;
3093 #define _SSPCON2_SEN 0x01
3094 #define _SSPCON2_RSEN 0x02
3095 #define _SSPCON2_PEN 0x04
3096 #define _SSPCON2_RCEN 0x08
3097 #define _SSPCON2_ACKEN 0x10
3098 #define _SSPCON2_ACKDT 0x20
3099 #define _SSPCON2_ACKSTAT 0x40
3100 #define _SSPCON2_GCEN 0x80
3102 //==============================================================================
3105 //==============================================================================
3108 extern __at(0x0217) __sfr SSP1CON3
;
3119 unsigned ACKTIM
: 1;
3122 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits
;
3131 #define _ACKTIM 0x80
3133 //==============================================================================
3136 //==============================================================================
3139 extern __at(0x0217) __sfr SSPCON3
;
3150 unsigned ACKTIM
: 1;
3153 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits
;
3155 #define _SSPCON3_DHEN 0x01
3156 #define _SSPCON3_AHEN 0x02
3157 #define _SSPCON3_SBCDE 0x04
3158 #define _SSPCON3_SDAHT 0x08
3159 #define _SSPCON3_BOEN 0x10
3160 #define _SSPCON3_SCIE 0x20
3161 #define _SSPCON3_PCIE 0x40
3162 #define _SSPCON3_ACKTIM 0x80
3164 //==============================================================================
3166 extern __at(0x0219) __sfr SSP2BUF
;
3167 extern __at(0x021A) __sfr SSP2ADD
;
3168 extern __at(0x021B) __sfr SSP2MSK
;
3170 //==============================================================================
3173 extern __at(0x021C) __sfr SSP2STAT
;
3179 unsigned R_NOT_W
: 1;
3182 unsigned D_NOT_A
: 1;
3187 extern __at(0x021C) volatile __SSP2STATbits_t SSP2STATbits
;
3189 #define _SSP2STAT_BF 0x01
3190 #define _SSP2STAT_UA 0x02
3191 #define _SSP2STAT_R_NOT_W 0x04
3192 #define _SSP2STAT_S 0x08
3193 #define _SSP2STAT_P 0x10
3194 #define _SSP2STAT_D_NOT_A 0x20
3195 #define _SSP2STAT_CKE 0x40
3196 #define _SSP2STAT_SMP 0x80
3198 //==============================================================================
3201 //==============================================================================
3204 extern __at(0x021D) __sfr SSP2CON1
;
3227 extern __at(0x021D) volatile __SSP2CON1bits_t SSP2CON1bits
;
3229 #define _SSP2CON1_SSPM0 0x01
3230 #define _SSP2CON1_SSPM1 0x02
3231 #define _SSP2CON1_SSPM2 0x04
3232 #define _SSP2CON1_SSPM3 0x08
3233 #define _SSP2CON1_CKP 0x10
3234 #define _SSP2CON1_SSPEN 0x20
3235 #define _SSP2CON1_SSPOV 0x40
3236 #define _SSP2CON1_WCOL 0x80
3238 //==============================================================================
3241 //==============================================================================
3244 extern __at(0x021E) __sfr SSP2CON2
;
3254 unsigned ACKSTAT
: 1;
3258 extern __at(0x021E) volatile __SSP2CON2bits_t SSP2CON2bits
;
3260 #define _SSP2CON2_SEN 0x01
3261 #define _SSP2CON2_RSEN 0x02
3262 #define _SSP2CON2_PEN 0x04
3263 #define _SSP2CON2_RCEN 0x08
3264 #define _SSP2CON2_ACKEN 0x10
3265 #define _SSP2CON2_ACKDT 0x20
3266 #define _SSP2CON2_ACKSTAT 0x40
3267 #define _SSP2CON2_GCEN 0x80
3269 //==============================================================================
3272 //==============================================================================
3275 extern __at(0x021F) __sfr SSP2CON3
;
3286 unsigned ACKTIM
: 1;
3289 extern __at(0x021F) volatile __SSP2CON3bits_t SSP2CON3bits
;
3291 #define _SSP2CON3_DHEN 0x01
3292 #define _SSP2CON3_AHEN 0x02
3293 #define _SSP2CON3_SBCDE 0x04
3294 #define _SSP2CON3_SDAHT 0x08
3295 #define _SSP2CON3_BOEN 0x10
3296 #define _SSP2CON3_SCIE 0x20
3297 #define _SSP2CON3_PCIE 0x40
3298 #define _SSP2CON3_ACKTIM 0x80
3300 //==============================================================================
3303 //==============================================================================
3306 extern __at(0x028C) __sfr PORTF
;
3360 unsigned C1IN0N
: 1;
3363 unsigned C1IN2N
: 1;
3365 unsigned C1IN1N
: 1;
3367 unsigned C1IN3N
: 1;
3372 unsigned C2IN0N
: 1;
3375 unsigned C2IN2N
: 1;
3377 unsigned C2IN1N
: 1;
3379 unsigned C2IN3N
: 1;
3387 unsigned C3IN2N
: 1;
3389 unsigned DACOUT
: 1;
3391 unsigned C3IN3N
: 1;
3395 extern __at(0x028C) volatile __PORTFbits_t PORTFbits
;
3397 #define _PORTF_RF0 0x01
3398 #define _PORTF_AN16 0x01
3399 #define _PORTF_SEG41 0x01
3400 #define _PORTF_CPS16 0x01
3401 #define _PORTF_C1IN0N 0x01
3402 #define _PORTF_C2IN0N 0x01
3403 #define _PORTF_RF1 0x02
3404 #define _PORTF_AN6 0x02
3405 #define _PORTF_SEG19 0x02
3406 #define _PORTF_CPS6 0x02
3407 #define _PORTF_C2OUT 0x02
3408 #define _PORTF_SRNQ 0x02
3409 #define _PORTF_RF2 0x04
3410 #define _PORTF_AN7 0x04
3411 #define _PORTF_SEG20 0x04
3412 #define _PORTF_CPS7 0x04
3413 #define _PORTF_C1OUT 0x04
3414 #define _PORTF_SRQ 0x04
3415 #define _PORTF_RF3 0x08
3416 #define _PORTF_AN8 0x08
3417 #define _PORTF_SEG21 0x08
3418 #define _PORTF_CPS8 0x08
3419 #define _PORTF_C1IN2N 0x08
3420 #define _PORTF_C2IN2N 0x08
3421 #define _PORTF_C3IN2N 0x08
3422 #define _PORTF_RF4 0x10
3423 #define _PORTF_AN9 0x10
3424 #define _PORTF_SEG22 0x10
3425 #define _PORTF_CPS9 0x10
3426 #define _PORTF_C2INP 0x10
3427 #define _PORTF_RF5 0x20
3428 #define _PORTF_AN10 0x20
3429 #define _PORTF_SEG23 0x20
3430 #define _PORTF_CPS10 0x20
3431 #define _PORTF_C1IN1N 0x20
3432 #define _PORTF_C2IN1N 0x20
3433 #define _PORTF_DACOUT 0x20
3434 #define _PORTF_RF6 0x40
3435 #define _PORTF_AN11 0x40
3436 #define _PORTF_SEG24 0x40
3437 #define _PORTF_CPS11 0x40
3438 #define _PORTF_C1INP 0x40
3439 #define _PORTF_RF7 0x80
3440 #define _PORTF_AN5 0x80
3441 #define _PORTF_SEG25 0x80
3442 #define _PORTF_CPS5 0x80
3443 #define _PORTF_C1IN3N 0x80
3444 #define _PORTF_C2IN3N 0x80
3445 #define _PORTF_C3IN3N 0x80
3447 //==============================================================================
3450 //==============================================================================
3453 extern __at(0x028D) __sfr PORTG
;
3476 unsigned NOT_MCLR
: 1;
3510 unsigned C3IN0N
: 1;
3511 unsigned C3IN1N
: 1;
3548 extern __at(0x028D) volatile __PORTGbits_t PORTGbits
;
3550 #define _PORTG_RG0 0x01
3551 #define _PORTG_SEG42 0x01
3552 #define _PORTG_CCP3 0x01
3553 #define _PORTG_P3A 0x01
3554 #define _PORTG_RG1 0x02
3555 #define _PORTG_AN15 0x02
3556 #define _PORTG_SEG43 0x02
3557 #define _PORTG_CPS15 0x02
3558 #define _PORTG_C3OUT 0x02
3559 #define _PORTG_TX2 0x02
3560 #define _PORTG_CK2 0x02
3561 #define _PORTG_RG2 0x04
3562 #define _PORTG_AN14 0x04
3563 #define _PORTG_SEG44 0x04
3564 #define _PORTG_CPS14 0x04
3565 #define _PORTG_C3INP 0x04
3566 #define _PORTG_RX2 0x04
3567 #define _PORTG_DT2 0x04
3568 #define _PORTG_RG3 0x08
3569 #define _PORTG_AN13 0x08
3570 #define _PORTG_SEG45 0x08
3571 #define _PORTG_CPS13 0x08
3572 #define _PORTG_C3IN0N 0x08
3573 #define _PORTG_CCP4 0x08
3574 #define _PORTG_P3D 0x08
3575 #define _PORTG_RG4 0x10
3576 #define _PORTG_AN12 0x10
3577 #define _PORTG_SEG26 0x10
3578 #define _PORTG_CPS12 0x10
3579 #define _PORTG_C3IN1N 0x10
3580 #define _PORTG_CCP5 0x10
3581 #define _PORTG_P1D 0x10
3582 #define _PORTG_RG5 0x20
3583 #define _PORTG_NOT_MCLR 0x20
3585 //==============================================================================
3587 extern __at(0x0291) __sfr CCPR1
;
3588 extern __at(0x0291) __sfr CCPR1L
;
3589 extern __at(0x0292) __sfr CCPR1H
;
3591 //==============================================================================
3594 extern __at(0x0293) __sfr CCP1CON
;
3600 unsigned CCP1M0
: 1;
3601 unsigned CCP1M1
: 1;
3602 unsigned CCP1M2
: 1;
3603 unsigned CCP1M3
: 1;
3630 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits
;
3632 #define _CCP1M0 0x01
3633 #define _CCP1M1 0x02
3634 #define _CCP1M2 0x04
3635 #define _CCP1M3 0x08
3641 //==============================================================================
3644 //==============================================================================
3647 extern __at(0x0294) __sfr PWM1CON
;
3660 unsigned P1RSEN
: 1;
3670 extern __at(0x0294) volatile __PWM1CONbits_t PWM1CONbits
;
3679 #define _P1RSEN 0x80
3681 //==============================================================================
3684 //==============================================================================
3687 extern __at(0x0295) __sfr CCP1AS
;
3693 unsigned PSS1BD0
: 1;
3694 unsigned PSS1BD1
: 1;
3695 unsigned PSS1AC0
: 1;
3696 unsigned PSS1AC1
: 1;
3697 unsigned CCP1AS0
: 1;
3698 unsigned CCP1AS1
: 1;
3699 unsigned CCP1AS2
: 1;
3700 unsigned CCP1ASE
: 1;
3705 unsigned PSS1BD
: 2;
3712 unsigned PSS1AC
: 2;
3719 unsigned CCP1AS
: 3;
3724 extern __at(0x0295) volatile __CCP1ASbits_t CCP1ASbits
;
3726 #define _PSS1BD0 0x01
3727 #define _PSS1BD1 0x02
3728 #define _PSS1AC0 0x04
3729 #define _PSS1AC1 0x08
3730 #define _CCP1AS0 0x10
3731 #define _CCP1AS1 0x20
3732 #define _CCP1AS2 0x40
3733 #define _CCP1ASE 0x80
3735 //==============================================================================
3738 //==============================================================================
3741 extern __at(0x0295) __sfr ECCP1AS
;
3747 unsigned PSS1BD0
: 1;
3748 unsigned PSS1BD1
: 1;
3749 unsigned PSS1AC0
: 1;
3750 unsigned PSS1AC1
: 1;
3751 unsigned CCP1AS0
: 1;
3752 unsigned CCP1AS1
: 1;
3753 unsigned CCP1AS2
: 1;
3754 unsigned CCP1ASE
: 1;
3759 unsigned PSS1BD
: 2;
3766 unsigned PSS1AC
: 2;
3773 unsigned CCP1AS
: 3;
3778 extern __at(0x0295) volatile __ECCP1ASbits_t ECCP1ASbits
;
3780 #define _ECCP1AS_PSS1BD0 0x01
3781 #define _ECCP1AS_PSS1BD1 0x02
3782 #define _ECCP1AS_PSS1AC0 0x04
3783 #define _ECCP1AS_PSS1AC1 0x08
3784 #define _ECCP1AS_CCP1AS0 0x10
3785 #define _ECCP1AS_CCP1AS1 0x20
3786 #define _ECCP1AS_CCP1AS2 0x40
3787 #define _ECCP1AS_CCP1ASE 0x80
3789 //==============================================================================
3792 //==============================================================================
3795 extern __at(0x0296) __sfr PSTR1CON
;
3803 unsigned STR1SYNC
: 1;
3809 extern __at(0x0296) volatile __PSTR1CONbits_t PSTR1CONbits
;
3815 #define _STR1SYNC 0x10
3817 //==============================================================================
3819 extern __at(0x0298) __sfr CCPR2
;
3820 extern __at(0x0298) __sfr CCPR2L
;
3821 extern __at(0x0299) __sfr CCPR2H
;
3823 //==============================================================================
3826 extern __at(0x029A) __sfr CCP2CON
;
3832 unsigned CCP2M0
: 1;
3833 unsigned CCP2M1
: 1;
3834 unsigned CCP2M2
: 1;
3835 unsigned CCP2M3
: 1;
3862 extern __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits
;
3864 #define _CCP2M0 0x01
3865 #define _CCP2M1 0x02
3866 #define _CCP2M2 0x04
3867 #define _CCP2M3 0x08
3873 //==============================================================================
3876 //==============================================================================
3879 extern __at(0x029B) __sfr PWM2CON
;
3892 unsigned P2RSEN
: 1;
3902 extern __at(0x029B) volatile __PWM2CONbits_t PWM2CONbits
;
3911 #define _P2RSEN 0x80
3913 //==============================================================================
3916 //==============================================================================
3919 extern __at(0x029C) __sfr CCP2AS
;
3925 unsigned PSS2BD0
: 1;
3926 unsigned PSS2BD1
: 1;
3927 unsigned PSS2AC0
: 1;
3928 unsigned PSS2AC1
: 1;
3929 unsigned CCP2AS0
: 1;
3930 unsigned CCP2AS1
: 1;
3931 unsigned CCP2AS2
: 1;
3932 unsigned CCP2ASE
: 1;
3937 unsigned PSS2BD
: 2;
3944 unsigned PSS2AC
: 2;
3951 unsigned CCP2AS
: 3;
3956 extern __at(0x029C) volatile __CCP2ASbits_t CCP2ASbits
;
3958 #define _PSS2BD0 0x01
3959 #define _PSS2BD1 0x02
3960 #define _PSS2AC0 0x04
3961 #define _PSS2AC1 0x08
3962 #define _CCP2AS0 0x10
3963 #define _CCP2AS1 0x20
3964 #define _CCP2AS2 0x40
3965 #define _CCP2ASE 0x80
3967 //==============================================================================
3970 //==============================================================================
3973 extern __at(0x029C) __sfr ECCP2AS
;
3979 unsigned PSS2BD0
: 1;
3980 unsigned PSS2BD1
: 1;
3981 unsigned PSS2AC0
: 1;
3982 unsigned PSS2AC1
: 1;
3983 unsigned CCP2AS0
: 1;
3984 unsigned CCP2AS1
: 1;
3985 unsigned CCP2AS2
: 1;
3986 unsigned CCP2ASE
: 1;
3991 unsigned PSS2BD
: 2;
3998 unsigned PSS2AC
: 2;
4005 unsigned CCP2AS
: 3;
4010 extern __at(0x029C) volatile __ECCP2ASbits_t ECCP2ASbits
;
4012 #define _ECCP2AS_PSS2BD0 0x01
4013 #define _ECCP2AS_PSS2BD1 0x02
4014 #define _ECCP2AS_PSS2AC0 0x04
4015 #define _ECCP2AS_PSS2AC1 0x08
4016 #define _ECCP2AS_CCP2AS0 0x10
4017 #define _ECCP2AS_CCP2AS1 0x20
4018 #define _ECCP2AS_CCP2AS2 0x40
4019 #define _ECCP2AS_CCP2ASE 0x80
4021 //==============================================================================
4024 //==============================================================================
4027 extern __at(0x029D) __sfr PSTR2CON
;
4035 unsigned STR2SYNC
: 1;
4041 extern __at(0x029D) volatile __PSTR2CONbits_t PSTR2CONbits
;
4047 #define _STR2SYNC 0x10
4049 //==============================================================================
4052 //==============================================================================
4055 extern __at(0x029E) __sfr CCPTMRS0
;
4061 unsigned C1TSEL0
: 1;
4062 unsigned C1TSEL1
: 1;
4063 unsigned C2TSEL0
: 1;
4064 unsigned C2TSEL1
: 1;
4065 unsigned C3TSEL0
: 1;
4066 unsigned C3TSEL1
: 1;
4067 unsigned C4TSEL0
: 1;
4068 unsigned C4TSEL1
: 1;
4073 unsigned C1TSEL
: 2;
4080 unsigned C2TSEL
: 2;
4087 unsigned C3TSEL
: 2;
4094 unsigned C4TSEL
: 2;
4098 extern __at(0x029E) volatile __CCPTMRS0bits_t CCPTMRS0bits
;
4100 #define _C1TSEL0 0x01
4101 #define _C1TSEL1 0x02
4102 #define _C2TSEL0 0x04
4103 #define _C2TSEL1 0x08
4104 #define _C3TSEL0 0x10
4105 #define _C3TSEL1 0x20
4106 #define _C4TSEL0 0x40
4107 #define _C4TSEL1 0x80
4109 //==============================================================================
4112 //==============================================================================
4115 extern __at(0x029F) __sfr CCPTMRS1
;
4121 unsigned C5TSEL0
: 1;
4122 unsigned C5TSEL1
: 1;
4133 unsigned C5TSEL
: 2;
4138 extern __at(0x029F) volatile __CCPTMRS1bits_t CCPTMRS1bits
;
4140 #define _C5TSEL0 0x01
4141 #define _C5TSEL1 0x02
4143 //==============================================================================
4146 //==============================================================================
4149 extern __at(0x030C) __sfr TRISF
;
4153 unsigned TRISF0
: 1;
4154 unsigned TRISF1
: 1;
4155 unsigned TRISF2
: 1;
4156 unsigned TRISF3
: 1;
4157 unsigned TRISF4
: 1;
4158 unsigned TRISF5
: 1;
4159 unsigned TRISF6
: 1;
4160 unsigned TRISF7
: 1;
4163 extern __at(0x030C) volatile __TRISFbits_t TRISFbits
;
4165 #define _TRISF0 0x01
4166 #define _TRISF1 0x02
4167 #define _TRISF2 0x04
4168 #define _TRISF3 0x08
4169 #define _TRISF4 0x10
4170 #define _TRISF5 0x20
4171 #define _TRISF6 0x40
4172 #define _TRISF7 0x80
4174 //==============================================================================
4177 //==============================================================================
4180 extern __at(0x030D) __sfr TRISG
;
4186 unsigned TRISG0
: 1;
4187 unsigned TRISG1
: 1;
4188 unsigned TRISG2
: 1;
4189 unsigned TRISG3
: 1;
4190 unsigned TRISG4
: 1;
4191 unsigned TRISG5
: 1;
4203 extern __at(0x030D) volatile __TRISGbits_t TRISGbits
;
4205 #define _TRISG0 0x01
4206 #define _TRISG1 0x02
4207 #define _TRISG2 0x04
4208 #define _TRISG3 0x08
4209 #define _TRISG4 0x10
4210 #define _TRISG5 0x20
4212 //==============================================================================
4214 extern __at(0x0311) __sfr CCPR3
;
4215 extern __at(0x0311) __sfr CCPR3L
;
4216 extern __at(0x0312) __sfr CCPR3H
;
4218 //==============================================================================
4221 extern __at(0x0313) __sfr CCP3CON
;
4227 unsigned CCP3M0
: 1;
4228 unsigned CCP3M1
: 1;
4229 unsigned CCP3M2
: 1;
4230 unsigned CCP3M3
: 1;
4257 extern __at(0x0313) volatile __CCP3CONbits_t CCP3CONbits
;
4259 #define _CCP3M0 0x01
4260 #define _CCP3M1 0x02
4261 #define _CCP3M2 0x04
4262 #define _CCP3M3 0x08
4268 //==============================================================================
4271 //==============================================================================
4274 extern __at(0x0314) __sfr PWM3CON
;
4287 unsigned P3RSEN
: 1;
4297 extern __at(0x0314) volatile __PWM3CONbits_t PWM3CONbits
;
4306 #define _P3RSEN 0x80
4308 //==============================================================================
4311 //==============================================================================
4314 extern __at(0x0315) __sfr CCP3AS
;
4320 unsigned PSS3BD0
: 1;
4321 unsigned PSS3BD1
: 1;
4322 unsigned PSS3AC0
: 1;
4323 unsigned PSS3AC1
: 1;
4324 unsigned CCP3AS0
: 1;
4325 unsigned CCP3AS1
: 1;
4326 unsigned CCP3AS2
: 1;
4327 unsigned CCP3ASE
: 1;
4332 unsigned PSS3BD
: 2;
4339 unsigned PSS3AC
: 2;
4346 unsigned CCP3AS
: 3;
4351 extern __at(0x0315) volatile __CCP3ASbits_t CCP3ASbits
;
4353 #define _PSS3BD0 0x01
4354 #define _PSS3BD1 0x02
4355 #define _PSS3AC0 0x04
4356 #define _PSS3AC1 0x08
4357 #define _CCP3AS0 0x10
4358 #define _CCP3AS1 0x20
4359 #define _CCP3AS2 0x40
4360 #define _CCP3ASE 0x80
4362 //==============================================================================
4365 //==============================================================================
4368 extern __at(0x0315) __sfr ECCP3AS
;
4374 unsigned PSS3BD0
: 1;
4375 unsigned PSS3BD1
: 1;
4376 unsigned PSS3AC0
: 1;
4377 unsigned PSS3AC1
: 1;
4378 unsigned CCP3AS0
: 1;
4379 unsigned CCP3AS1
: 1;
4380 unsigned CCP3AS2
: 1;
4381 unsigned CCP3ASE
: 1;
4386 unsigned PSS3BD
: 2;
4393 unsigned PSS3AC
: 2;
4400 unsigned CCP3AS
: 3;
4405 extern __at(0x0315) volatile __ECCP3ASbits_t ECCP3ASbits
;
4407 #define _ECCP3AS_PSS3BD0 0x01
4408 #define _ECCP3AS_PSS3BD1 0x02
4409 #define _ECCP3AS_PSS3AC0 0x04
4410 #define _ECCP3AS_PSS3AC1 0x08
4411 #define _ECCP3AS_CCP3AS0 0x10
4412 #define _ECCP3AS_CCP3AS1 0x20
4413 #define _ECCP3AS_CCP3AS2 0x40
4414 #define _ECCP3AS_CCP3ASE 0x80
4416 //==============================================================================
4419 //==============================================================================
4422 extern __at(0x0316) __sfr PSTR3CON
;
4430 unsigned STR3SYNC
: 1;
4436 extern __at(0x0316) volatile __PSTR3CONbits_t PSTR3CONbits
;
4442 #define _STR3SYNC 0x10
4444 //==============================================================================
4446 extern __at(0x0318) __sfr CCPR4
;
4447 extern __at(0x0318) __sfr CCPR4L
;
4448 extern __at(0x0319) __sfr CCPR4H
;
4450 //==============================================================================
4453 extern __at(0x031A) __sfr CCP4CON
;
4459 unsigned CCP4M0
: 1;
4460 unsigned CCP4M1
: 1;
4461 unsigned CCP4M2
: 1;
4462 unsigned CCP4M3
: 1;
4483 extern __at(0x031A) volatile __CCP4CONbits_t CCP4CONbits
;
4485 #define _CCP4M0 0x01
4486 #define _CCP4M1 0x02
4487 #define _CCP4M2 0x04
4488 #define _CCP4M3 0x08
4492 //==============================================================================
4494 extern __at(0x031C) __sfr CCPR5
;
4495 extern __at(0x031C) __sfr CCPR5L
;
4496 extern __at(0x031D) __sfr CCPR5H
;
4498 //==============================================================================
4501 extern __at(0x031E) __sfr CCP5CON
;
4507 unsigned CCP5M0
: 1;
4508 unsigned CCP5M1
: 1;
4509 unsigned CCP5M2
: 1;
4510 unsigned CCP5M3
: 1;
4531 extern __at(0x031E) volatile __CCP5CONbits_t CCP5CONbits
;
4533 #define _CCP5M0 0x01
4534 #define _CCP5M1 0x02
4535 #define _CCP5M2 0x04
4536 #define _CCP5M3 0x08
4540 //==============================================================================
4543 //==============================================================================
4546 extern __at(0x038C) __sfr LATF
;
4560 extern __at(0x038C) volatile __LATFbits_t LATFbits
;
4571 //==============================================================================
4574 //==============================================================================
4577 extern __at(0x038D) __sfr LATG
;
4600 extern __at(0x038D) volatile __LATGbits_t LATGbits
;
4609 //==============================================================================
4612 //==============================================================================
4615 extern __at(0x0394) __sfr IOCBP
;
4619 unsigned IOCBP0
: 1;
4620 unsigned IOCBP1
: 1;
4621 unsigned IOCBP2
: 1;
4622 unsigned IOCBP3
: 1;
4623 unsigned IOCBP4
: 1;
4624 unsigned IOCBP5
: 1;
4625 unsigned IOCBP6
: 1;
4626 unsigned IOCBP7
: 1;
4629 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits
;
4631 #define _IOCBP0 0x01
4632 #define _IOCBP1 0x02
4633 #define _IOCBP2 0x04
4634 #define _IOCBP3 0x08
4635 #define _IOCBP4 0x10
4636 #define _IOCBP5 0x20
4637 #define _IOCBP6 0x40
4638 #define _IOCBP7 0x80
4640 //==============================================================================
4643 //==============================================================================
4646 extern __at(0x0395) __sfr IOCBN
;
4650 unsigned IOCBN0
: 1;
4651 unsigned IOCBN1
: 1;
4652 unsigned IOCBN2
: 1;
4653 unsigned IOCBN3
: 1;
4654 unsigned IOCBN4
: 1;
4655 unsigned IOCBN5
: 1;
4656 unsigned IOCBN6
: 1;
4657 unsigned IOCBN7
: 1;
4660 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits
;
4662 #define _IOCBN0 0x01
4663 #define _IOCBN1 0x02
4664 #define _IOCBN2 0x04
4665 #define _IOCBN3 0x08
4666 #define _IOCBN4 0x10
4667 #define _IOCBN5 0x20
4668 #define _IOCBN6 0x40
4669 #define _IOCBN7 0x80
4671 //==============================================================================
4674 //==============================================================================
4677 extern __at(0x0396) __sfr IOCBF
;
4681 unsigned IOCBF0
: 1;
4682 unsigned IOCBF1
: 1;
4683 unsigned IOCBF2
: 1;
4684 unsigned IOCBF3
: 1;
4685 unsigned IOCBF4
: 1;
4686 unsigned IOCBF5
: 1;
4687 unsigned IOCBF6
: 1;
4688 unsigned IOCBF7
: 1;
4691 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits
;
4693 #define _IOCBF0 0x01
4694 #define _IOCBF1 0x02
4695 #define _IOCBF2 0x04
4696 #define _IOCBF3 0x08
4697 #define _IOCBF4 0x10
4698 #define _IOCBF5 0x20
4699 #define _IOCBF6 0x40
4700 #define _IOCBF7 0x80
4702 //==============================================================================
4705 //==============================================================================
4708 extern __at(0x040C) __sfr ANSELF
;
4722 extern __at(0x040C) volatile __ANSELFbits_t ANSELFbits
;
4733 //==============================================================================
4736 //==============================================================================
4739 extern __at(0x040D) __sfr ANSELG
;
4753 extern __at(0x040D) volatile __ANSELGbits_t ANSELGbits
;
4760 //==============================================================================
4762 extern __at(0x0415) __sfr TMR4
;
4763 extern __at(0x0416) __sfr PR4
;
4765 //==============================================================================
4768 extern __at(0x0417) __sfr T4CON
;
4774 unsigned T4CKPS0
: 1;
4775 unsigned T4CKPS1
: 1;
4776 unsigned TMR4ON
: 1;
4777 unsigned T4OUTPS0
: 1;
4778 unsigned T4OUTPS1
: 1;
4779 unsigned T4OUTPS2
: 1;
4780 unsigned T4OUTPS3
: 1;
4786 unsigned T4CKPS
: 2;
4793 unsigned T4OUTPS
: 4;
4798 extern __at(0x0417) volatile __T4CONbits_t T4CONbits
;
4800 #define _T4CKPS0 0x01
4801 #define _T4CKPS1 0x02
4802 #define _TMR4ON 0x04
4803 #define _T4OUTPS0 0x08
4804 #define _T4OUTPS1 0x10
4805 #define _T4OUTPS2 0x20
4806 #define _T4OUTPS3 0x40
4808 //==============================================================================
4810 extern __at(0x041C) __sfr TMR6
;
4811 extern __at(0x041D) __sfr PR6
;
4813 //==============================================================================
4816 extern __at(0x041E) __sfr T6CON
;
4822 unsigned T6CKPS0
: 1;
4823 unsigned T6CKPS1
: 1;
4824 unsigned TMR6ON
: 1;
4825 unsigned T6OUTPS0
: 1;
4826 unsigned T6OUTPS1
: 1;
4827 unsigned T6OUTPS2
: 1;
4828 unsigned T6OUTPS3
: 1;
4834 unsigned T6CKPS
: 2;
4841 unsigned T6OUTPS
: 4;
4846 extern __at(0x041E) volatile __T6CONbits_t T6CONbits
;
4848 #define _T6CKPS0 0x01
4849 #define _T6CKPS1 0x02
4850 #define _TMR6ON 0x04
4851 #define _T6OUTPS0 0x08
4852 #define _T6OUTPS1 0x10
4853 #define _T6OUTPS2 0x20
4854 #define _T6OUTPS3 0x40
4856 //==============================================================================
4859 //==============================================================================
4862 extern __at(0x048D) __sfr WPUG
;
4876 extern __at(0x048D) volatile __WPUGbits_t WPUGbits
;
4880 //==============================================================================
4882 extern __at(0x0491) __sfr RC2REG
;
4883 extern __at(0x0492) __sfr TX2REG
;
4884 extern __at(0x0493) __sfr SP2BRGL
;
4885 extern __at(0x0493) __sfr SPBRG2
;
4886 extern __at(0x0494) __sfr SP2BRGH
;
4888 //==============================================================================
4891 extern __at(0x0495) __sfr RC2STA
;
4905 extern __at(0x0495) volatile __RC2STAbits_t RC2STAbits
;
4907 #define _RC2STA_RX9D 0x01
4908 #define _RC2STA_OERR 0x02
4909 #define _RC2STA_FERR 0x04
4910 #define _RC2STA_ADDEN 0x08
4911 #define _RC2STA_CREN 0x10
4912 #define _RC2STA_SREN 0x20
4913 #define _RC2STA_RX9 0x40
4914 #define _RC2STA_SPEN 0x80
4916 //==============================================================================
4919 //==============================================================================
4922 extern __at(0x0496) __sfr TX2STA
;
4936 extern __at(0x0496) volatile __TX2STAbits_t TX2STAbits
;
4938 #define _TX2STA_TX9D 0x01
4939 #define _TX2STA_TRMT 0x02
4940 #define _TX2STA_BRGH 0x04
4941 #define _TX2STA_SENDB 0x08
4942 #define _TX2STA_SYNC 0x10
4943 #define _TX2STA_TXEN 0x20
4944 #define _TX2STA_TX9 0x40
4945 #define _TX2STA_CSRC 0x80
4947 //==============================================================================
4950 //==============================================================================
4953 extern __at(0x0497) __sfr BAUD2CON
;
4964 unsigned ABDOVF
: 1;
4967 extern __at(0x0497) volatile __BAUD2CONbits_t BAUD2CONbits
;
4969 #define _BAUD2CON_ABDEN 0x01
4970 #define _BAUD2CON_WUE 0x02
4971 #define _BAUD2CON_BRG16 0x08
4972 #define _BAUD2CON_SCKP 0x10
4973 #define _BAUD2CON_RCIDL 0x40
4974 #define _BAUD2CON_ABDOVF 0x80
4976 //==============================================================================
4979 //==============================================================================
4982 extern __at(0x0791) __sfr LCDCON
;
5012 extern __at(0x0791) volatile __LCDCONbits_t LCDCONbits
;
5022 //==============================================================================
5025 //==============================================================================
5028 extern __at(0x0792) __sfr LCDPS
;
5040 unsigned BIASMD
: 1;
5051 extern __at(0x0792) volatile __LCDPSbits_t LCDPSbits
;
5059 #define _BIASMD 0x40
5062 //==============================================================================
5065 //==============================================================================
5068 extern __at(0x0793) __sfr LCDREF
;
5073 unsigned VLCD1PE
: 1;
5074 unsigned VLCD2PE
: 1;
5075 unsigned VLCD3PE
: 1;
5077 unsigned LCDIRI
: 1;
5078 unsigned LCDIRS
: 1;
5079 unsigned LCDIRE
: 1;
5082 extern __at(0x0793) volatile __LCDREFbits_t LCDREFbits
;
5084 #define _VLCD1PE 0x02
5085 #define _VLCD2PE 0x04
5086 #define _VLCD3PE 0x08
5087 #define _LCDIRI 0x20
5088 #define _LCDIRS 0x40
5089 #define _LCDIRE 0x80
5091 //==============================================================================
5094 //==============================================================================
5097 extern __at(0x0794) __sfr LCDCST
;
5103 unsigned LCDCST0
: 1;
5104 unsigned LCDCST1
: 1;
5105 unsigned LCDCST2
: 1;
5115 unsigned LCDCST
: 3;
5120 extern __at(0x0794) volatile __LCDCSTbits_t LCDCSTbits
;
5122 #define _LCDCST0 0x01
5123 #define _LCDCST1 0x02
5124 #define _LCDCST2 0x04
5126 //==============================================================================
5129 //==============================================================================
5132 extern __at(0x0795) __sfr LCDRL
;
5138 unsigned LRLAT0
: 1;
5139 unsigned LRLAT1
: 1;
5140 unsigned LRLAT2
: 1;
5142 unsigned LRLBP0
: 1;
5143 unsigned LRLBP1
: 1;
5144 unsigned LRLAP0
: 1;
5145 unsigned LRLAP1
: 1;
5168 extern __at(0x0795) volatile __LCDRLbits_t LCDRLbits
;
5170 #define _LRLAT0 0x01
5171 #define _LRLAT1 0x02
5172 #define _LRLAT2 0x04
5173 #define _LRLBP0 0x10
5174 #define _LRLBP1 0x20
5175 #define _LRLAP0 0x40
5176 #define _LRLAP1 0x80
5178 //==============================================================================
5181 //==============================================================================
5184 extern __at(0x0798) __sfr LCDSE0
;
5198 extern __at(0x0798) volatile __LCDSE0bits_t LCDSE0bits
;
5209 //==============================================================================
5212 //==============================================================================
5215 extern __at(0x0799) __sfr LCDSE1
;
5229 extern __at(0x0799) volatile __LCDSE1bits_t LCDSE1bits
;
5240 //==============================================================================
5243 //==============================================================================
5246 extern __at(0x079A) __sfr LCDSE2
;
5260 extern __at(0x079A) volatile __LCDSE2bits_t LCDSE2bits
;
5271 //==============================================================================
5274 //==============================================================================
5277 extern __at(0x079B) __sfr LCDSE3
;
5291 extern __at(0x079B) volatile __LCDSE3bits_t LCDSE3bits
;
5302 //==============================================================================
5305 //==============================================================================
5308 extern __at(0x079C) __sfr LCDSE4
;
5322 extern __at(0x079C) volatile __LCDSE4bits_t LCDSE4bits
;
5333 //==============================================================================
5336 //==============================================================================
5339 extern __at(0x079D) __sfr LCDSE5
;
5353 extern __at(0x079D) volatile __LCDSE5bits_t LCDSE5bits
;
5362 //==============================================================================
5365 //==============================================================================
5368 extern __at(0x07A0) __sfr LCDDATA0
;
5372 unsigned SEG0COM0
: 1;
5373 unsigned SEG1COM0
: 1;
5374 unsigned SEG2COM0
: 1;
5375 unsigned SEG3COM0
: 1;
5376 unsigned SEG4COM0
: 1;
5377 unsigned SEG5COM0
: 1;
5378 unsigned SEG6COM0
: 1;
5379 unsigned SEG7COM0
: 1;
5382 extern __at(0x07A0) volatile __LCDDATA0bits_t LCDDATA0bits
;
5384 #define _SEG0COM0 0x01
5385 #define _SEG1COM0 0x02
5386 #define _SEG2COM0 0x04
5387 #define _SEG3COM0 0x08
5388 #define _SEG4COM0 0x10
5389 #define _SEG5COM0 0x20
5390 #define _SEG6COM0 0x40
5391 #define _SEG7COM0 0x80
5393 //==============================================================================
5396 //==============================================================================
5399 extern __at(0x07A1) __sfr LCDDATA1
;
5403 unsigned SEG8COM0
: 1;
5404 unsigned SEG9COM0
: 1;
5405 unsigned SEG10COM0
: 1;
5406 unsigned SEG11COM0
: 1;
5407 unsigned SEG12COM0
: 1;
5408 unsigned SEG13COM0
: 1;
5409 unsigned SEG14COM0
: 1;
5410 unsigned SEG15COM0
: 1;
5413 extern __at(0x07A1) volatile __LCDDATA1bits_t LCDDATA1bits
;
5415 #define _SEG8COM0 0x01
5416 #define _SEG9COM0 0x02
5417 #define _SEG10COM0 0x04
5418 #define _SEG11COM0 0x08
5419 #define _SEG12COM0 0x10
5420 #define _SEG13COM0 0x20
5421 #define _SEG14COM0 0x40
5422 #define _SEG15COM0 0x80
5424 //==============================================================================
5427 //==============================================================================
5430 extern __at(0x07A2) __sfr LCDDATA2
;
5434 unsigned SEG16COM0
: 1;
5435 unsigned SEG17COM0
: 1;
5436 unsigned SEG18COM0
: 1;
5437 unsigned SEG19COM0
: 1;
5438 unsigned SEG20COM0
: 1;
5439 unsigned SEG21COM0
: 1;
5440 unsigned SEG22COM0
: 1;
5441 unsigned SEG23COM0
: 1;
5444 extern __at(0x07A2) volatile __LCDDATA2bits_t LCDDATA2bits
;
5446 #define _SEG16COM0 0x01
5447 #define _SEG17COM0 0x02
5448 #define _SEG18COM0 0x04
5449 #define _SEG19COM0 0x08
5450 #define _SEG20COM0 0x10
5451 #define _SEG21COM0 0x20
5452 #define _SEG22COM0 0x40
5453 #define _SEG23COM0 0x80
5455 //==============================================================================
5458 //==============================================================================
5461 extern __at(0x07A3) __sfr LCDDATA3
;
5465 unsigned SEG0COM1
: 1;
5466 unsigned SEG1COM1
: 1;
5467 unsigned SEG2COM1
: 1;
5468 unsigned SEG3COM1
: 1;
5469 unsigned SEG4COM1
: 1;
5470 unsigned SEG5COM1
: 1;
5471 unsigned SEG6COM1
: 1;
5472 unsigned SEG7COM1
: 1;
5475 extern __at(0x07A3) volatile __LCDDATA3bits_t LCDDATA3bits
;
5477 #define _SEG0COM1 0x01
5478 #define _SEG1COM1 0x02
5479 #define _SEG2COM1 0x04
5480 #define _SEG3COM1 0x08
5481 #define _SEG4COM1 0x10
5482 #define _SEG5COM1 0x20
5483 #define _SEG6COM1 0x40
5484 #define _SEG7COM1 0x80
5486 //==============================================================================
5489 //==============================================================================
5492 extern __at(0x07A4) __sfr LCDDATA4
;
5496 unsigned SEG8COM1
: 1;
5497 unsigned SEG9COM1
: 1;
5498 unsigned SEG10COM1
: 1;
5499 unsigned SEG11COM1
: 1;
5500 unsigned SEG12COM1
: 1;
5501 unsigned SEG13COM1
: 1;
5502 unsigned SEG14COM1
: 1;
5503 unsigned SEG15COM1
: 1;
5506 extern __at(0x07A4) volatile __LCDDATA4bits_t LCDDATA4bits
;
5508 #define _SEG8COM1 0x01
5509 #define _SEG9COM1 0x02
5510 #define _SEG10COM1 0x04
5511 #define _SEG11COM1 0x08
5512 #define _SEG12COM1 0x10
5513 #define _SEG13COM1 0x20
5514 #define _SEG14COM1 0x40
5515 #define _SEG15COM1 0x80
5517 //==============================================================================
5520 //==============================================================================
5523 extern __at(0x07A5) __sfr LCDDATA5
;
5527 unsigned SEG16COM1
: 1;
5528 unsigned SEG17COM1
: 1;
5529 unsigned SEG18COM1
: 1;
5530 unsigned SEG19COM1
: 1;
5531 unsigned SEG20COM1
: 1;
5532 unsigned SEG21COM1
: 1;
5533 unsigned SEG22COM1
: 1;
5534 unsigned SEG23COM1
: 1;
5537 extern __at(0x07A5) volatile __LCDDATA5bits_t LCDDATA5bits
;
5539 #define _SEG16COM1 0x01
5540 #define _SEG17COM1 0x02
5541 #define _SEG18COM1 0x04
5542 #define _SEG19COM1 0x08
5543 #define _SEG20COM1 0x10
5544 #define _SEG21COM1 0x20
5545 #define _SEG22COM1 0x40
5546 #define _SEG23COM1 0x80
5548 //==============================================================================
5551 //==============================================================================
5554 extern __at(0x07A6) __sfr LCDDATA6
;
5558 unsigned SEG0COM2
: 1;
5559 unsigned SEG1COM2
: 1;
5560 unsigned SEG2COM2
: 1;
5561 unsigned SEG3COM2
: 1;
5562 unsigned SEG4COM2
: 1;
5563 unsigned SEG5COM2
: 1;
5564 unsigned SEG6COM2
: 1;
5565 unsigned SEG7COM2
: 1;
5568 extern __at(0x07A6) volatile __LCDDATA6bits_t LCDDATA6bits
;
5570 #define _SEG0COM2 0x01
5571 #define _SEG1COM2 0x02
5572 #define _SEG2COM2 0x04
5573 #define _SEG3COM2 0x08
5574 #define _SEG4COM2 0x10
5575 #define _SEG5COM2 0x20
5576 #define _SEG6COM2 0x40
5577 #define _SEG7COM2 0x80
5579 //==============================================================================
5582 //==============================================================================
5585 extern __at(0x07A7) __sfr LCDDATA7
;
5589 unsigned SEG8COM2
: 1;
5590 unsigned SEG9COM2
: 1;
5591 unsigned SEG10COM2
: 1;
5592 unsigned SEG11COM2
: 1;
5593 unsigned SEG12COM2
: 1;
5594 unsigned SEG13COM2
: 1;
5595 unsigned SEG14COM2
: 1;
5596 unsigned SEG15COM2
: 1;
5599 extern __at(0x07A7) volatile __LCDDATA7bits_t LCDDATA7bits
;
5601 #define _SEG8COM2 0x01
5602 #define _SEG9COM2 0x02
5603 #define _SEG10COM2 0x04
5604 #define _SEG11COM2 0x08
5605 #define _SEG12COM2 0x10
5606 #define _SEG13COM2 0x20
5607 #define _SEG14COM2 0x40
5608 #define _SEG15COM2 0x80
5610 //==============================================================================
5613 //==============================================================================
5616 extern __at(0x07A8) __sfr LCDDATA8
;
5620 unsigned SEG16COM2
: 1;
5621 unsigned SEG17COM2
: 1;
5622 unsigned SEG18COM2
: 1;
5623 unsigned SEG19COM2
: 1;
5624 unsigned SEG20COM2
: 1;
5625 unsigned SEG21COM2
: 1;
5626 unsigned SEG22COM2
: 1;
5627 unsigned SEG23COM2
: 1;
5630 extern __at(0x07A8) volatile __LCDDATA8bits_t LCDDATA8bits
;
5632 #define _SEG16COM2 0x01
5633 #define _SEG17COM2 0x02
5634 #define _SEG18COM2 0x04
5635 #define _SEG19COM2 0x08
5636 #define _SEG20COM2 0x10
5637 #define _SEG21COM2 0x20
5638 #define _SEG22COM2 0x40
5639 #define _SEG23COM2 0x80
5641 //==============================================================================
5644 //==============================================================================
5647 extern __at(0x07A9) __sfr LCDDATA9
;
5651 unsigned SEG0COM3
: 1;
5652 unsigned SEG1COM3
: 1;
5653 unsigned SEG2COM3
: 1;
5654 unsigned SEG3COM3
: 1;
5655 unsigned SEG4COM3
: 1;
5656 unsigned SEG5COM3
: 1;
5657 unsigned SEG6COM3
: 1;
5658 unsigned SEG7COM3
: 1;
5661 extern __at(0x07A9) volatile __LCDDATA9bits_t LCDDATA9bits
;
5663 #define _SEG0COM3 0x01
5664 #define _SEG1COM3 0x02
5665 #define _SEG2COM3 0x04
5666 #define _SEG3COM3 0x08
5667 #define _SEG4COM3 0x10
5668 #define _SEG5COM3 0x20
5669 #define _SEG6COM3 0x40
5670 #define _SEG7COM3 0x80
5672 //==============================================================================
5675 //==============================================================================
5678 extern __at(0x07AA) __sfr LCDDATA10
;
5682 unsigned SEG8COM3
: 1;
5683 unsigned SEG9COM3
: 1;
5684 unsigned SEG10COM3
: 1;
5685 unsigned SEG11COM3
: 1;
5686 unsigned SEG12COM3
: 1;
5687 unsigned SEG13COM3
: 1;
5688 unsigned SEG14COM3
: 1;
5689 unsigned SEG15COM3
: 1;
5690 } __LCDDATA10bits_t
;
5692 extern __at(0x07AA) volatile __LCDDATA10bits_t LCDDATA10bits
;
5694 #define _SEG8COM3 0x01
5695 #define _SEG9COM3 0x02
5696 #define _SEG10COM3 0x04
5697 #define _SEG11COM3 0x08
5698 #define _SEG12COM3 0x10
5699 #define _SEG13COM3 0x20
5700 #define _SEG14COM3 0x40
5701 #define _SEG15COM3 0x80
5703 //==============================================================================
5706 //==============================================================================
5709 extern __at(0x07AB) __sfr LCDDATA11
;
5713 unsigned SEG16COM3
: 1;
5714 unsigned SEG17COM3
: 1;
5715 unsigned SEG18COM3
: 1;
5716 unsigned SEG19COM3
: 1;
5717 unsigned SEG20COM3
: 1;
5718 unsigned SEG21COM3
: 1;
5719 unsigned SEG22COM3
: 1;
5720 unsigned SEG23COM3
: 1;
5721 } __LCDDATA11bits_t
;
5723 extern __at(0x07AB) volatile __LCDDATA11bits_t LCDDATA11bits
;
5725 #define _SEG16COM3 0x01
5726 #define _SEG17COM3 0x02
5727 #define _SEG18COM3 0x04
5728 #define _SEG19COM3 0x08
5729 #define _SEG20COM3 0x10
5730 #define _SEG21COM3 0x20
5731 #define _SEG22COM3 0x40
5732 #define _SEG23COM3 0x80
5734 //==============================================================================
5737 //==============================================================================
5740 extern __at(0x07AC) __sfr LCDDATA12
;
5744 unsigned SEG24COM0
: 1;
5745 unsigned SEG25COM0
: 1;
5746 unsigned SEG26COM0
: 1;
5747 unsigned SEG27COM0
: 1;
5748 unsigned SEG28COM0
: 1;
5749 unsigned SEG29COM0
: 1;
5750 unsigned SEG30COM0
: 1;
5751 unsigned SEG31COM0
: 1;
5752 } __LCDDATA12bits_t
;
5754 extern __at(0x07AC) volatile __LCDDATA12bits_t LCDDATA12bits
;
5756 #define _SEG24COM0 0x01
5757 #define _SEG25COM0 0x02
5758 #define _SEG26COM0 0x04
5759 #define _SEG27COM0 0x08
5760 #define _SEG28COM0 0x10
5761 #define _SEG29COM0 0x20
5762 #define _SEG30COM0 0x40
5763 #define _SEG31COM0 0x80
5765 //==============================================================================
5768 //==============================================================================
5771 extern __at(0x07AD) __sfr LCDDATA13
;
5775 unsigned SEG32COM0
: 1;
5776 unsigned SEG33COM0
: 1;
5777 unsigned SEG34COM0
: 1;
5778 unsigned SEG35COM0
: 1;
5779 unsigned SEG36COM0
: 1;
5780 unsigned SEG37COM0
: 1;
5781 unsigned SEG38COM0
: 1;
5782 unsigned SEG39COM0
: 1;
5783 } __LCDDATA13bits_t
;
5785 extern __at(0x07AD) volatile __LCDDATA13bits_t LCDDATA13bits
;
5787 #define _SEG32COM0 0x01
5788 #define _SEG33COM0 0x02
5789 #define _SEG34COM0 0x04
5790 #define _SEG35COM0 0x08
5791 #define _SEG36COM0 0x10
5792 #define _SEG37COM0 0x20
5793 #define _SEG38COM0 0x40
5794 #define _SEG39COM0 0x80
5796 //==============================================================================
5799 //==============================================================================
5802 extern __at(0x07AE) __sfr LCDDATA14
;
5806 unsigned SEG40COM0
: 1;
5807 unsigned SEG41COM0
: 1;
5808 unsigned SEG42COM0
: 1;
5809 unsigned SEG43COM0
: 1;
5810 unsigned SEG44COM0
: 1;
5811 unsigned SEG45COM0
: 1;
5814 } __LCDDATA14bits_t
;
5816 extern __at(0x07AE) volatile __LCDDATA14bits_t LCDDATA14bits
;
5818 #define _SEG40COM0 0x01
5819 #define _SEG41COM0 0x02
5820 #define _SEG42COM0 0x04
5821 #define _SEG43COM0 0x08
5822 #define _SEG44COM0 0x10
5823 #define _SEG45COM0 0x20
5825 //==============================================================================
5828 //==============================================================================
5831 extern __at(0x07AF) __sfr LCDDATA15
;
5835 unsigned SEG24COM1
: 1;
5836 unsigned SEG25COM1
: 1;
5837 unsigned SEG26COM1
: 1;
5838 unsigned SEG27COM1
: 1;
5839 unsigned SEG28COM1
: 1;
5840 unsigned SEG29COM1
: 1;
5841 unsigned SEG30COM1
: 1;
5842 unsigned SEG31COM1
: 1;
5843 } __LCDDATA15bits_t
;
5845 extern __at(0x07AF) volatile __LCDDATA15bits_t LCDDATA15bits
;
5847 #define _SEG24COM1 0x01
5848 #define _SEG25COM1 0x02
5849 #define _SEG26COM1 0x04
5850 #define _SEG27COM1 0x08
5851 #define _SEG28COM1 0x10
5852 #define _SEG29COM1 0x20
5853 #define _SEG30COM1 0x40
5854 #define _SEG31COM1 0x80
5856 //==============================================================================
5859 //==============================================================================
5862 extern __at(0x07B0) __sfr LCDDATA16
;
5866 unsigned SEG32COM1
: 1;
5867 unsigned SEG33COM1
: 1;
5868 unsigned SEG34COM1
: 1;
5869 unsigned SEG35COM1
: 1;
5870 unsigned SEG36COM1
: 1;
5871 unsigned SEG37COM1
: 1;
5872 unsigned SEG38COM1
: 1;
5873 unsigned SEG39COM1
: 1;
5874 } __LCDDATA16bits_t
;
5876 extern __at(0x07B0) volatile __LCDDATA16bits_t LCDDATA16bits
;
5878 #define _SEG32COM1 0x01
5879 #define _SEG33COM1 0x02
5880 #define _SEG34COM1 0x04
5881 #define _SEG35COM1 0x08
5882 #define _SEG36COM1 0x10
5883 #define _SEG37COM1 0x20
5884 #define _SEG38COM1 0x40
5885 #define _SEG39COM1 0x80
5887 //==============================================================================
5890 //==============================================================================
5893 extern __at(0x07B1) __sfr LCDDATA17
;
5897 unsigned SEG40COM1
: 1;
5898 unsigned SEG41COM1
: 1;
5899 unsigned SEG42COM1
: 1;
5900 unsigned SEG43COM1
: 1;
5901 unsigned SEG44COM1
: 1;
5902 unsigned SEG45COM1
: 1;
5905 } __LCDDATA17bits_t
;
5907 extern __at(0x07B1) volatile __LCDDATA17bits_t LCDDATA17bits
;
5909 #define _SEG40COM1 0x01
5910 #define _SEG41COM1 0x02
5911 #define _SEG42COM1 0x04
5912 #define _SEG43COM1 0x08
5913 #define _SEG44COM1 0x10
5914 #define _SEG45COM1 0x20
5916 //==============================================================================
5919 //==============================================================================
5922 extern __at(0x07B2) __sfr LCDDATA18
;
5926 unsigned SEG24COM2
: 1;
5927 unsigned SEG25COM2
: 1;
5928 unsigned SEG26COM2
: 1;
5929 unsigned SEG27COM2
: 1;
5930 unsigned SEG28COM2
: 1;
5931 unsigned SEG29COM2
: 1;
5932 unsigned SEG30COM2
: 1;
5933 unsigned SEG31COM2
: 1;
5934 } __LCDDATA18bits_t
;
5936 extern __at(0x07B2) volatile __LCDDATA18bits_t LCDDATA18bits
;
5938 #define _SEG24COM2 0x01
5939 #define _SEG25COM2 0x02
5940 #define _SEG26COM2 0x04
5941 #define _SEG27COM2 0x08
5942 #define _SEG28COM2 0x10
5943 #define _SEG29COM2 0x20
5944 #define _SEG30COM2 0x40
5945 #define _SEG31COM2 0x80
5947 //==============================================================================
5950 //==============================================================================
5953 extern __at(0x07B3) __sfr LCDDATA19
;
5957 unsigned SEG32COM2
: 1;
5958 unsigned SEG33COM2
: 1;
5959 unsigned SEG34COM2
: 1;
5960 unsigned SEG35COM2
: 1;
5961 unsigned SEG36COM2
: 1;
5962 unsigned SEG37COM2
: 1;
5963 unsigned SEG38COM2
: 1;
5964 unsigned SEG39COM2
: 1;
5965 } __LCDDATA19bits_t
;
5967 extern __at(0x07B3) volatile __LCDDATA19bits_t LCDDATA19bits
;
5969 #define _SEG32COM2 0x01
5970 #define _SEG33COM2 0x02
5971 #define _SEG34COM2 0x04
5972 #define _SEG35COM2 0x08
5973 #define _SEG36COM2 0x10
5974 #define _SEG37COM2 0x20
5975 #define _SEG38COM2 0x40
5976 #define _SEG39COM2 0x80
5978 //==============================================================================
5981 //==============================================================================
5984 extern __at(0x07B4) __sfr LCDDATA20
;
5988 unsigned SEG40COM2
: 1;
5989 unsigned SEG41COM2
: 1;
5990 unsigned SEG42COM2
: 1;
5991 unsigned SEG43COM2
: 1;
5992 unsigned SEG44COM2
: 1;
5993 unsigned SEG45COM2
: 1;
5996 } __LCDDATA20bits_t
;
5998 extern __at(0x07B4) volatile __LCDDATA20bits_t LCDDATA20bits
;
6000 #define _SEG40COM2 0x01
6001 #define _SEG41COM2 0x02
6002 #define _SEG42COM2 0x04
6003 #define _SEG43COM2 0x08
6004 #define _SEG44COM2 0x10
6005 #define _SEG45COM2 0x20
6007 //==============================================================================
6010 //==============================================================================
6013 extern __at(0x07B5) __sfr LCDDATA21
;
6017 unsigned SEG24COM3
: 1;
6018 unsigned SEG25COM3
: 1;
6019 unsigned SEG26COM3
: 1;
6020 unsigned SEG27COM3
: 1;
6021 unsigned SEG28COM3
: 1;
6022 unsigned SEG29COM3
: 1;
6023 unsigned SEG30COM3
: 1;
6024 unsigned SEG31COM3
: 1;
6025 } __LCDDATA21bits_t
;
6027 extern __at(0x07B5) volatile __LCDDATA21bits_t LCDDATA21bits
;
6029 #define _SEG24COM3 0x01
6030 #define _SEG25COM3 0x02
6031 #define _SEG26COM3 0x04
6032 #define _SEG27COM3 0x08
6033 #define _SEG28COM3 0x10
6034 #define _SEG29COM3 0x20
6035 #define _SEG30COM3 0x40
6036 #define _SEG31COM3 0x80
6038 //==============================================================================
6041 //==============================================================================
6044 extern __at(0x07B6) __sfr LCDDATA22
;
6048 unsigned SEG32COM3
: 1;
6049 unsigned SEG33COM3
: 1;
6050 unsigned SEG34COM3
: 1;
6051 unsigned SEG35COM3
: 1;
6052 unsigned SEG36COM3
: 1;
6053 unsigned SEG37COM3
: 1;
6054 unsigned SEG38COM3
: 1;
6055 unsigned SEG39COM3
: 1;
6056 } __LCDDATA22bits_t
;
6058 extern __at(0x07B6) volatile __LCDDATA22bits_t LCDDATA22bits
;
6060 #define _SEG32COM3 0x01
6061 #define _SEG33COM3 0x02
6062 #define _SEG34COM3 0x04
6063 #define _SEG35COM3 0x08
6064 #define _SEG36COM3 0x10
6065 #define _SEG37COM3 0x20
6066 #define _SEG38COM3 0x40
6067 #define _SEG39COM3 0x80
6069 //==============================================================================
6072 //==============================================================================
6075 extern __at(0x07B7) __sfr LCDDATA23
;
6079 unsigned SEG40COM3
: 1;
6080 unsigned SEG41COM3
: 1;
6081 unsigned SEG42COM3
: 1;
6082 unsigned SEG43COM3
: 1;
6083 unsigned SEG44COM3
: 1;
6084 unsigned SEG45COM3
: 1;
6087 } __LCDDATA23bits_t
;
6089 extern __at(0x07B7) volatile __LCDDATA23bits_t LCDDATA23bits
;
6091 #define _SEG40COM3 0x01
6092 #define _SEG41COM3 0x02
6093 #define _SEG42COM3 0x04
6094 #define _SEG43COM3 0x08
6095 #define _SEG44COM3 0x10
6096 #define _SEG45COM3 0x20
6098 //==============================================================================
6101 //==============================================================================
6104 extern __at(0x0FE4) __sfr STATUS_SHAD
;
6108 unsigned C_SHAD
: 1;
6109 unsigned DC_SHAD
: 1;
6110 unsigned Z_SHAD
: 1;
6116 } __STATUS_SHADbits_t
;
6118 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
6120 #define _C_SHAD 0x01
6121 #define _DC_SHAD 0x02
6122 #define _Z_SHAD 0x04
6124 //==============================================================================
6126 extern __at(0x0FE5) __sfr WREG_SHAD
;
6127 extern __at(0x0FE6) __sfr BSR_SHAD
;
6128 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
6129 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
6130 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
6131 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
6132 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
6133 extern __at(0x0FED) __sfr STKPTR
;
6134 extern __at(0x0FEE) __sfr TOSL
;
6135 extern __at(0x0FEF) __sfr TOSH
;
6137 //==============================================================================
6139 // Configuration Bits
6141 //==============================================================================
6143 #define _CONFIG1 0x8007
6144 #define _CONFIG2 0x8008
6146 //----------------------------- CONFIG1 Options -------------------------------
6148 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
6149 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
6150 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
6151 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
6152 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
6153 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin.
6154 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin.
6155 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin.
6156 #define _WDTE_OFF 0x3FE7 // WDT disabled.
6157 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
6158 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
6159 #define _WDTE_ON 0x3FFF // WDT enabled.
6160 #define _PWRTE_ON 0x3FDF // PWRT enabled.
6161 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
6162 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
6163 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
6164 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
6165 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
6166 #define _CPD_ON 0x3EFF // Data memory code protection is enabled.
6167 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
6168 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
6169 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
6170 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
6171 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
6172 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
6173 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
6174 #define _IESO_OFF 0x2FFF // Internal/External Switchover mode is disabled.
6175 #define _IESO_ON 0x3FFF // Internal/External Switchover mode is enabled.
6176 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
6177 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
6179 //----------------------------- CONFIG2 Options -------------------------------
6181 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control.
6182 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
6183 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control.
6184 #define _WRT_OFF 0x3FFF // Write protection off.
6185 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled.
6186 #define _PLLEN_ON 0x3FFF // 4x PLL enabled.
6187 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
6188 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
6189 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
6190 #define _BORV_25 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
6191 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
6192 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
6193 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
6194 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
6195 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
6196 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
6198 //==============================================================================
6200 #define _DEVID1 0x8006
6202 #define _IDLOC0 0x8000
6203 #define _IDLOC1 0x8001
6204 #define _IDLOC2 0x8002
6205 #define _IDLOC3 0x8003
6207 //==============================================================================
6209 #ifndef NO_BIT_DEFINES
6211 #define ADON ADCON0bits.ADON // bit 0
6212 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
6213 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
6214 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
6215 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
6216 #define CHS0 ADCON0bits.CHS0 // bit 2
6217 #define CHS1 ADCON0bits.CHS1 // bit 3
6218 #define CHS2 ADCON0bits.CHS2 // bit 4
6219 #define CHS3 ADCON0bits.CHS3 // bit 5
6220 #define CHS4 ADCON0bits.CHS4 // bit 6
6222 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
6223 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
6224 #define ADNREF ADCON1bits.ADNREF // bit 2
6225 #define ADCS0 ADCON1bits.ADCS0 // bit 4
6226 #define ADCS1 ADCON1bits.ADCS1 // bit 5
6227 #define ADCS2 ADCON1bits.ADCS2 // bit 6
6228 #define ADFM ADCON1bits.ADFM // bit 7
6230 #define ANSA0 ANSELAbits.ANSA0 // bit 0
6231 #define ANSA1 ANSELAbits.ANSA1 // bit 1
6232 #define ANSA2 ANSELAbits.ANSA2 // bit 2
6233 #define ANSA3 ANSELAbits.ANSA3 // bit 3
6234 #define ANSA5 ANSELAbits.ANSA5 // bit 5
6236 #define ANSE0 ANSELEbits.ANSE0 // bit 0
6237 #define ANSE1 ANSELEbits.ANSE1 // bit 1
6238 #define ANSE2 ANSELEbits.ANSE2 // bit 2
6240 #define ANSF0 ANSELFbits.ANSF0 // bit 0
6241 #define ANSF1 ANSELFbits.ANSF1 // bit 1
6242 #define ANSF2 ANSELFbits.ANSF2 // bit 2
6243 #define ANSF3 ANSELFbits.ANSF3 // bit 3
6244 #define ANSF4 ANSELFbits.ANSF4 // bit 4
6245 #define ANSF5 ANSELFbits.ANSF5 // bit 5
6246 #define ANSF6 ANSELFbits.ANSF6 // bit 6
6247 #define ANSF7 ANSELFbits.ANSF7 // bit 7
6249 #define ANSG1 ANSELGbits.ANSG1 // bit 1
6250 #define ANSG2 ANSELGbits.ANSG2 // bit 2
6251 #define ANSG3 ANSELGbits.ANSG3 // bit 3
6252 #define ANSG4 ANSELGbits.ANSG4 // bit 4
6254 #define P1BSEL APFCONbits.P1BSEL // bit 0
6255 #define P1CSEL APFCONbits.P1CSEL // bit 1
6256 #define CCP2SEL APFCONbits.CCP2SEL // bit 2
6257 #define P2BSEL APFCONbits.P2BSEL // bit 3
6258 #define P2CSEL APFCONbits.P2CSEL // bit 4
6259 #define P2DSEL APFCONbits.P2DSEL // bit 5
6260 #define P3BSEL APFCONbits.P3BSEL // bit 6
6261 #define P3CSEL APFCONbits.P3CSEL // bit 7
6263 #define ABDEN BAUD1CONbits.ABDEN // bit 0
6264 #define WUE BAUD1CONbits.WUE // bit 1
6265 #define BRG16 BAUD1CONbits.BRG16 // bit 3
6266 #define SCKP BAUD1CONbits.SCKP // bit 4
6267 #define RCIDL BAUD1CONbits.RCIDL // bit 6
6268 #define ABDOVF BAUD1CONbits.ABDOVF // bit 7
6270 #define BORRDY BORCONbits.BORRDY // bit 0
6271 #define SBOREN BORCONbits.SBOREN // bit 7
6273 #define BSR0 BSRbits.BSR0 // bit 0
6274 #define BSR1 BSRbits.BSR1 // bit 1
6275 #define BSR2 BSRbits.BSR2 // bit 2
6276 #define BSR3 BSRbits.BSR3 // bit 3
6277 #define BSR4 BSRbits.BSR4 // bit 4
6279 #define PSS1BD0 CCP1ASbits.PSS1BD0 // bit 0
6280 #define PSS1BD1 CCP1ASbits.PSS1BD1 // bit 1
6281 #define PSS1AC0 CCP1ASbits.PSS1AC0 // bit 2
6282 #define PSS1AC1 CCP1ASbits.PSS1AC1 // bit 3
6283 #define CCP1AS0 CCP1ASbits.CCP1AS0 // bit 4
6284 #define CCP1AS1 CCP1ASbits.CCP1AS1 // bit 5
6285 #define CCP1AS2 CCP1ASbits.CCP1AS2 // bit 6
6286 #define CCP1ASE CCP1ASbits.CCP1ASE // bit 7
6288 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
6289 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
6290 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
6291 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
6292 #define DC1B0 CCP1CONbits.DC1B0 // bit 4
6293 #define DC1B1 CCP1CONbits.DC1B1 // bit 5
6294 #define P1M0 CCP1CONbits.P1M0 // bit 6
6295 #define P1M1 CCP1CONbits.P1M1 // bit 7
6297 #define PSS2BD0 CCP2ASbits.PSS2BD0 // bit 0
6298 #define PSS2BD1 CCP2ASbits.PSS2BD1 // bit 1
6299 #define PSS2AC0 CCP2ASbits.PSS2AC0 // bit 2
6300 #define PSS2AC1 CCP2ASbits.PSS2AC1 // bit 3
6301 #define CCP2AS0 CCP2ASbits.CCP2AS0 // bit 4
6302 #define CCP2AS1 CCP2ASbits.CCP2AS1 // bit 5
6303 #define CCP2AS2 CCP2ASbits.CCP2AS2 // bit 6
6304 #define CCP2ASE CCP2ASbits.CCP2ASE // bit 7
6306 #define CCP2M0 CCP2CONbits.CCP2M0 // bit 0
6307 #define CCP2M1 CCP2CONbits.CCP2M1 // bit 1
6308 #define CCP2M2 CCP2CONbits.CCP2M2 // bit 2
6309 #define CCP2M3 CCP2CONbits.CCP2M3 // bit 3
6310 #define DC2B0 CCP2CONbits.DC2B0 // bit 4
6311 #define DC2B1 CCP2CONbits.DC2B1 // bit 5
6312 #define P2M0 CCP2CONbits.P2M0 // bit 6
6313 #define P2M1 CCP2CONbits.P2M1 // bit 7
6315 #define PSS3BD0 CCP3ASbits.PSS3BD0 // bit 0
6316 #define PSS3BD1 CCP3ASbits.PSS3BD1 // bit 1
6317 #define PSS3AC0 CCP3ASbits.PSS3AC0 // bit 2
6318 #define PSS3AC1 CCP3ASbits.PSS3AC1 // bit 3
6319 #define CCP3AS0 CCP3ASbits.CCP3AS0 // bit 4
6320 #define CCP3AS1 CCP3ASbits.CCP3AS1 // bit 5
6321 #define CCP3AS2 CCP3ASbits.CCP3AS2 // bit 6
6322 #define CCP3ASE CCP3ASbits.CCP3ASE // bit 7
6324 #define CCP3M0 CCP3CONbits.CCP3M0 // bit 0
6325 #define CCP3M1 CCP3CONbits.CCP3M1 // bit 1
6326 #define CCP3M2 CCP3CONbits.CCP3M2 // bit 2
6327 #define CCP3M3 CCP3CONbits.CCP3M3 // bit 3
6328 #define DC3B0 CCP3CONbits.DC3B0 // bit 4
6329 #define DC3B1 CCP3CONbits.DC3B1 // bit 5
6330 #define P3M0 CCP3CONbits.P3M0 // bit 6
6331 #define P3M1 CCP3CONbits.P3M1 // bit 7
6333 #define CCP4M0 CCP4CONbits.CCP4M0 // bit 0
6334 #define CCP4M1 CCP4CONbits.CCP4M1 // bit 1
6335 #define CCP4M2 CCP4CONbits.CCP4M2 // bit 2
6336 #define CCP4M3 CCP4CONbits.CCP4M3 // bit 3
6337 #define DC4B0 CCP4CONbits.DC4B0 // bit 4
6338 #define DC4B1 CCP4CONbits.DC4B1 // bit 5
6340 #define CCP5M0 CCP5CONbits.CCP5M0 // bit 0
6341 #define CCP5M1 CCP5CONbits.CCP5M1 // bit 1
6342 #define CCP5M2 CCP5CONbits.CCP5M2 // bit 2
6343 #define CCP5M3 CCP5CONbits.CCP5M3 // bit 3
6344 #define DC5B0 CCP5CONbits.DC5B0 // bit 4
6345 #define DC5B1 CCP5CONbits.DC5B1 // bit 5
6347 #define C1TSEL0 CCPTMRS0bits.C1TSEL0 // bit 0
6348 #define C1TSEL1 CCPTMRS0bits.C1TSEL1 // bit 1
6349 #define C2TSEL0 CCPTMRS0bits.C2TSEL0 // bit 2
6350 #define C2TSEL1 CCPTMRS0bits.C2TSEL1 // bit 3
6351 #define C3TSEL0 CCPTMRS0bits.C3TSEL0 // bit 4
6352 #define C3TSEL1 CCPTMRS0bits.C3TSEL1 // bit 5
6353 #define C4TSEL0 CCPTMRS0bits.C4TSEL0 // bit 6
6354 #define C4TSEL1 CCPTMRS0bits.C4TSEL1 // bit 7
6356 #define C5TSEL0 CCPTMRS1bits.C5TSEL0 // bit 0
6357 #define C5TSEL1 CCPTMRS1bits.C5TSEL1 // bit 1
6359 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
6360 #define C1HYS CM1CON0bits.C1HYS // bit 1
6361 #define C1SP CM1CON0bits.C1SP // bit 2
6362 #define C1POL CM1CON0bits.C1POL // bit 4
6363 #define C1OE CM1CON0bits.C1OE // bit 5
6364 #define C1OUT CM1CON0bits.C1OUT // bit 6
6365 #define C1ON CM1CON0bits.C1ON // bit 7
6367 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
6368 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
6369 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
6370 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
6371 #define C1INTN CM1CON1bits.C1INTN // bit 6
6372 #define C1INTP CM1CON1bits.C1INTP // bit 7
6374 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
6375 #define C2HYS CM2CON0bits.C2HYS // bit 1
6376 #define C2SP CM2CON0bits.C2SP // bit 2
6377 #define C2POL CM2CON0bits.C2POL // bit 4
6378 #define C2OE CM2CON0bits.C2OE // bit 5
6379 #define C2OUT CM2CON0bits.C2OUT // bit 6
6380 #define C2ON CM2CON0bits.C2ON // bit 7
6382 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
6383 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
6384 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4
6385 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5
6386 #define C2INTN CM2CON1bits.C2INTN // bit 6
6387 #define C2INTP CM2CON1bits.C2INTP // bit 7
6389 #define C3SYNC CM3CON0bits.C3SYNC // bit 0
6390 #define C3HYS CM3CON0bits.C3HYS // bit 1
6391 #define C3SP CM3CON0bits.C3SP // bit 2
6392 #define C3POL CM3CON0bits.C3POL // bit 4
6393 #define C3OE CM3CON0bits.C3OE // bit 5
6394 #define C3OUT CM3CON0bits.C3OUT // bit 6
6395 #define C3ON CM3CON0bits.C3ON // bit 7
6397 #define C3NCH0 CM3CON1bits.C3NCH0 // bit 0
6398 #define C3NCH1 CM3CON1bits.C3NCH1 // bit 1
6399 #define C3PCH0 CM3CON1bits.C3PCH0 // bit 4
6400 #define C3PCH1 CM3CON1bits.C3PCH1 // bit 5
6401 #define C3INTN CM3CON1bits.C3INTN // bit 6
6402 #define C3INTP CM3CON1bits.C3INTP // bit 7
6404 #define MC1OUT CMOUTbits.MC1OUT // bit 0
6405 #define MC2OUT CMOUTbits.MC2OUT // bit 1
6406 #define MC3OUT CMOUTbits.MC3OUT // bit 2
6408 #define T0XCS CPSCON0bits.T0XCS // bit 0
6409 #define CPSOUT CPSCON0bits.CPSOUT // bit 1
6410 #define CPSRNG0 CPSCON0bits.CPSRNG0 // bit 2
6411 #define CPSRNG1 CPSCON0bits.CPSRNG1 // bit 3
6412 #define CPSRM CPSCON0bits.CPSRM // bit 6
6413 #define CPSON CPSCON0bits.CPSON // bit 7
6415 #define CPSCH0 CPSCON1bits.CPSCH0 // bit 0
6416 #define CPSCH1 CPSCON1bits.CPSCH1 // bit 1
6417 #define CPSCH2 CPSCON1bits.CPSCH2 // bit 2
6418 #define CPSCH3 CPSCON1bits.CPSCH3 // bit 3
6419 #define CPSCH4 CPSCON1bits.CPSCH4 // bit 4
6421 #define DACNSS DACCON0bits.DACNSS // bit 0
6422 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2
6423 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3
6424 #define DACOE DACCON0bits.DACOE // bit 5
6425 #define DACLPS DACCON0bits.DACLPS // bit 6
6426 #define DACEN DACCON0bits.DACEN // bit 7
6428 #define DACR0 DACCON1bits.DACR0 // bit 0
6429 #define DACR1 DACCON1bits.DACR1 // bit 1
6430 #define DACR2 DACCON1bits.DACR2 // bit 2
6431 #define DACR3 DACCON1bits.DACR3 // bit 3
6432 #define DACR4 DACCON1bits.DACR4 // bit 4
6434 #define RD EECON1bits.RD // bit 0
6435 #define WR EECON1bits.WR // bit 1
6436 #define WREN EECON1bits.WREN // bit 2
6437 #define WRERR EECON1bits.WRERR // bit 3
6438 #define FREE EECON1bits.FREE // bit 4
6439 #define LWLO EECON1bits.LWLO // bit 5
6440 #define CFGS EECON1bits.CFGS // bit 6
6441 #define EEPGD EECON1bits.EEPGD // bit 7
6443 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
6444 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
6445 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
6446 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
6447 #define FVRRDY FVRCONbits.FVRRDY // bit 6
6448 #define FVREN FVRCONbits.FVREN // bit 7
6450 #define IOCIF INTCONbits.IOCIF // bit 0
6451 #define INTF INTCONbits.INTF // bit 1
6452 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
6453 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
6454 #define IOCIE INTCONbits.IOCIE // bit 3
6455 #define INTE INTCONbits.INTE // bit 4
6456 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
6457 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
6458 #define PEIE INTCONbits.PEIE // bit 6
6459 #define GIE INTCONbits.GIE // bit 7
6461 #define IOCBF0 IOCBFbits.IOCBF0 // bit 0
6462 #define IOCBF1 IOCBFbits.IOCBF1 // bit 1
6463 #define IOCBF2 IOCBFbits.IOCBF2 // bit 2
6464 #define IOCBF3 IOCBFbits.IOCBF3 // bit 3
6465 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
6466 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
6467 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
6468 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
6470 #define IOCBN0 IOCBNbits.IOCBN0 // bit 0
6471 #define IOCBN1 IOCBNbits.IOCBN1 // bit 1
6472 #define IOCBN2 IOCBNbits.IOCBN2 // bit 2
6473 #define IOCBN3 IOCBNbits.IOCBN3 // bit 3
6474 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
6475 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
6476 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
6477 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
6479 #define IOCBP0 IOCBPbits.IOCBP0 // bit 0
6480 #define IOCBP1 IOCBPbits.IOCBP1 // bit 1
6481 #define IOCBP2 IOCBPbits.IOCBP2 // bit 2
6482 #define IOCBP3 IOCBPbits.IOCBP3 // bit 3
6483 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
6484 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
6485 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
6486 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
6488 #define LATA0 LATAbits.LATA0 // bit 0
6489 #define LATA1 LATAbits.LATA1 // bit 1
6490 #define LATA2 LATAbits.LATA2 // bit 2
6491 #define LATA3 LATAbits.LATA3 // bit 3
6492 #define LATA4 LATAbits.LATA4 // bit 4
6493 #define LATA5 LATAbits.LATA5 // bit 5
6494 #define LATA6 LATAbits.LATA6 // bit 6
6495 #define LATA7 LATAbits.LATA7 // bit 7
6497 #define LATB0 LATBbits.LATB0 // bit 0
6498 #define LATB1 LATBbits.LATB1 // bit 1
6499 #define LATB2 LATBbits.LATB2 // bit 2
6500 #define LATB3 LATBbits.LATB3 // bit 3
6501 #define LATB4 LATBbits.LATB4 // bit 4
6502 #define LATB5 LATBbits.LATB5 // bit 5
6503 #define LATB6 LATBbits.LATB6 // bit 6
6504 #define LATB7 LATBbits.LATB7 // bit 7
6506 #define LATC0 LATCbits.LATC0 // bit 0
6507 #define LATC1 LATCbits.LATC1 // bit 1
6508 #define LATC2 LATCbits.LATC2 // bit 2
6509 #define LATC3 LATCbits.LATC3 // bit 3
6510 #define LATC4 LATCbits.LATC4 // bit 4
6511 #define LATC5 LATCbits.LATC5 // bit 5
6512 #define LATC6 LATCbits.LATC6 // bit 6
6513 #define LATC7 LATCbits.LATC7 // bit 7
6515 #define LATD0 LATDbits.LATD0 // bit 0
6516 #define LATD1 LATDbits.LATD1 // bit 1
6517 #define LATD2 LATDbits.LATD2 // bit 2
6518 #define LATD3 LATDbits.LATD3 // bit 3
6519 #define LATD4 LATDbits.LATD4 // bit 4
6520 #define LATD5 LATDbits.LATD5 // bit 5
6521 #define LATD6 LATDbits.LATD6 // bit 6
6522 #define LATD7 LATDbits.LATD7 // bit 7
6524 #define LATE0 LATEbits.LATE0 // bit 0
6525 #define LATE1 LATEbits.LATE1 // bit 1
6526 #define LATE2 LATEbits.LATE2 // bit 2
6527 #define LATE3 LATEbits.LATE3 // bit 3
6528 #define LATE4 LATEbits.LATE4 // bit 4
6529 #define LATE5 LATEbits.LATE5 // bit 5
6530 #define LATE6 LATEbits.LATE6 // bit 6
6531 #define LATE7 LATEbits.LATE7 // bit 7
6533 #define LATF0 LATFbits.LATF0 // bit 0
6534 #define LATF1 LATFbits.LATF1 // bit 1
6535 #define LATF2 LATFbits.LATF2 // bit 2
6536 #define LATF3 LATFbits.LATF3 // bit 3
6537 #define LATF4 LATFbits.LATF4 // bit 4
6538 #define LATF5 LATFbits.LATF5 // bit 5
6539 #define LATF6 LATFbits.LATF6 // bit 6
6540 #define LATF7 LATFbits.LATF7 // bit 7
6542 #define LATG0 LATGbits.LATG0 // bit 0
6543 #define LATG1 LATGbits.LATG1 // bit 1
6544 #define LATG2 LATGbits.LATG2 // bit 2
6545 #define LATG3 LATGbits.LATG3 // bit 3
6546 #define LATG4 LATGbits.LATG4 // bit 4
6547 #define LATG5 LATGbits.LATG5 // bit 5
6549 #define LMUX0 LCDCONbits.LMUX0 // bit 0
6550 #define LMUX1 LCDCONbits.LMUX1 // bit 1
6551 #define CS0 LCDCONbits.CS0 // bit 2
6552 #define CS1 LCDCONbits.CS1 // bit 3
6553 #define WERR LCDCONbits.WERR // bit 5
6554 #define SLPEN LCDCONbits.SLPEN // bit 6
6555 #define LCDEN LCDCONbits.LCDEN // bit 7
6557 #define LCDCST0 LCDCSTbits.LCDCST0 // bit 0
6558 #define LCDCST1 LCDCSTbits.LCDCST1 // bit 1
6559 #define LCDCST2 LCDCSTbits.LCDCST2 // bit 2
6561 #define SEG0COM0 LCDDATA0bits.SEG0COM0 // bit 0
6562 #define SEG1COM0 LCDDATA0bits.SEG1COM0 // bit 1
6563 #define SEG2COM0 LCDDATA0bits.SEG2COM0 // bit 2
6564 #define SEG3COM0 LCDDATA0bits.SEG3COM0 // bit 3
6565 #define SEG4COM0 LCDDATA0bits.SEG4COM0 // bit 4
6566 #define SEG5COM0 LCDDATA0bits.SEG5COM0 // bit 5
6567 #define SEG6COM0 LCDDATA0bits.SEG6COM0 // bit 6
6568 #define SEG7COM0 LCDDATA0bits.SEG7COM0 // bit 7
6570 #define SEG8COM0 LCDDATA1bits.SEG8COM0 // bit 0
6571 #define SEG9COM0 LCDDATA1bits.SEG9COM0 // bit 1
6572 #define SEG10COM0 LCDDATA1bits.SEG10COM0 // bit 2
6573 #define SEG11COM0 LCDDATA1bits.SEG11COM0 // bit 3
6574 #define SEG12COM0 LCDDATA1bits.SEG12COM0 // bit 4
6575 #define SEG13COM0 LCDDATA1bits.SEG13COM0 // bit 5
6576 #define SEG14COM0 LCDDATA1bits.SEG14COM0 // bit 6
6577 #define SEG15COM0 LCDDATA1bits.SEG15COM0 // bit 7
6579 #define SEG16COM0 LCDDATA2bits.SEG16COM0 // bit 0
6580 #define SEG17COM0 LCDDATA2bits.SEG17COM0 // bit 1
6581 #define SEG18COM0 LCDDATA2bits.SEG18COM0 // bit 2
6582 #define SEG19COM0 LCDDATA2bits.SEG19COM0 // bit 3
6583 #define SEG20COM0 LCDDATA2bits.SEG20COM0 // bit 4
6584 #define SEG21COM0 LCDDATA2bits.SEG21COM0 // bit 5
6585 #define SEG22COM0 LCDDATA2bits.SEG22COM0 // bit 6
6586 #define SEG23COM0 LCDDATA2bits.SEG23COM0 // bit 7
6588 #define SEG0COM1 LCDDATA3bits.SEG0COM1 // bit 0
6589 #define SEG1COM1 LCDDATA3bits.SEG1COM1 // bit 1
6590 #define SEG2COM1 LCDDATA3bits.SEG2COM1 // bit 2
6591 #define SEG3COM1 LCDDATA3bits.SEG3COM1 // bit 3
6592 #define SEG4COM1 LCDDATA3bits.SEG4COM1 // bit 4
6593 #define SEG5COM1 LCDDATA3bits.SEG5COM1 // bit 5
6594 #define SEG6COM1 LCDDATA3bits.SEG6COM1 // bit 6
6595 #define SEG7COM1 LCDDATA3bits.SEG7COM1 // bit 7
6597 #define SEG8COM1 LCDDATA4bits.SEG8COM1 // bit 0
6598 #define SEG9COM1 LCDDATA4bits.SEG9COM1 // bit 1
6599 #define SEG10COM1 LCDDATA4bits.SEG10COM1 // bit 2
6600 #define SEG11COM1 LCDDATA4bits.SEG11COM1 // bit 3
6601 #define SEG12COM1 LCDDATA4bits.SEG12COM1 // bit 4
6602 #define SEG13COM1 LCDDATA4bits.SEG13COM1 // bit 5
6603 #define SEG14COM1 LCDDATA4bits.SEG14COM1 // bit 6
6604 #define SEG15COM1 LCDDATA4bits.SEG15COM1 // bit 7
6606 #define SEG16COM1 LCDDATA5bits.SEG16COM1 // bit 0
6607 #define SEG17COM1 LCDDATA5bits.SEG17COM1 // bit 1
6608 #define SEG18COM1 LCDDATA5bits.SEG18COM1 // bit 2
6609 #define SEG19COM1 LCDDATA5bits.SEG19COM1 // bit 3
6610 #define SEG20COM1 LCDDATA5bits.SEG20COM1 // bit 4
6611 #define SEG21COM1 LCDDATA5bits.SEG21COM1 // bit 5
6612 #define SEG22COM1 LCDDATA5bits.SEG22COM1 // bit 6
6613 #define SEG23COM1 LCDDATA5bits.SEG23COM1 // bit 7
6615 #define SEG0COM2 LCDDATA6bits.SEG0COM2 // bit 0
6616 #define SEG1COM2 LCDDATA6bits.SEG1COM2 // bit 1
6617 #define SEG2COM2 LCDDATA6bits.SEG2COM2 // bit 2
6618 #define SEG3COM2 LCDDATA6bits.SEG3COM2 // bit 3
6619 #define SEG4COM2 LCDDATA6bits.SEG4COM2 // bit 4
6620 #define SEG5COM2 LCDDATA6bits.SEG5COM2 // bit 5
6621 #define SEG6COM2 LCDDATA6bits.SEG6COM2 // bit 6
6622 #define SEG7COM2 LCDDATA6bits.SEG7COM2 // bit 7
6624 #define SEG8COM2 LCDDATA7bits.SEG8COM2 // bit 0
6625 #define SEG9COM2 LCDDATA7bits.SEG9COM2 // bit 1
6626 #define SEG10COM2 LCDDATA7bits.SEG10COM2 // bit 2
6627 #define SEG11COM2 LCDDATA7bits.SEG11COM2 // bit 3
6628 #define SEG12COM2 LCDDATA7bits.SEG12COM2 // bit 4
6629 #define SEG13COM2 LCDDATA7bits.SEG13COM2 // bit 5
6630 #define SEG14COM2 LCDDATA7bits.SEG14COM2 // bit 6
6631 #define SEG15COM2 LCDDATA7bits.SEG15COM2 // bit 7
6633 #define SEG16COM2 LCDDATA8bits.SEG16COM2 // bit 0
6634 #define SEG17COM2 LCDDATA8bits.SEG17COM2 // bit 1
6635 #define SEG18COM2 LCDDATA8bits.SEG18COM2 // bit 2
6636 #define SEG19COM2 LCDDATA8bits.SEG19COM2 // bit 3
6637 #define SEG20COM2 LCDDATA8bits.SEG20COM2 // bit 4
6638 #define SEG21COM2 LCDDATA8bits.SEG21COM2 // bit 5
6639 #define SEG22COM2 LCDDATA8bits.SEG22COM2 // bit 6
6640 #define SEG23COM2 LCDDATA8bits.SEG23COM2 // bit 7
6642 #define SEG0COM3 LCDDATA9bits.SEG0COM3 // bit 0
6643 #define SEG1COM3 LCDDATA9bits.SEG1COM3 // bit 1
6644 #define SEG2COM3 LCDDATA9bits.SEG2COM3 // bit 2
6645 #define SEG3COM3 LCDDATA9bits.SEG3COM3 // bit 3
6646 #define SEG4COM3 LCDDATA9bits.SEG4COM3 // bit 4
6647 #define SEG5COM3 LCDDATA9bits.SEG5COM3 // bit 5
6648 #define SEG6COM3 LCDDATA9bits.SEG6COM3 // bit 6
6649 #define SEG7COM3 LCDDATA9bits.SEG7COM3 // bit 7
6651 #define SEG8COM3 LCDDATA10bits.SEG8COM3 // bit 0
6652 #define SEG9COM3 LCDDATA10bits.SEG9COM3 // bit 1
6653 #define SEG10COM3 LCDDATA10bits.SEG10COM3 // bit 2
6654 #define SEG11COM3 LCDDATA10bits.SEG11COM3 // bit 3
6655 #define SEG12COM3 LCDDATA10bits.SEG12COM3 // bit 4
6656 #define SEG13COM3 LCDDATA10bits.SEG13COM3 // bit 5
6657 #define SEG14COM3 LCDDATA10bits.SEG14COM3 // bit 6
6658 #define SEG15COM3 LCDDATA10bits.SEG15COM3 // bit 7
6660 #define SEG16COM3 LCDDATA11bits.SEG16COM3 // bit 0
6661 #define SEG17COM3 LCDDATA11bits.SEG17COM3 // bit 1
6662 #define SEG18COM3 LCDDATA11bits.SEG18COM3 // bit 2
6663 #define SEG19COM3 LCDDATA11bits.SEG19COM3 // bit 3
6664 #define SEG20COM3 LCDDATA11bits.SEG20COM3 // bit 4
6665 #define SEG21COM3 LCDDATA11bits.SEG21COM3 // bit 5
6666 #define SEG22COM3 LCDDATA11bits.SEG22COM3 // bit 6
6667 #define SEG23COM3 LCDDATA11bits.SEG23COM3 // bit 7
6669 #define SEG24COM0 LCDDATA12bits.SEG24COM0 // bit 0
6670 #define SEG25COM0 LCDDATA12bits.SEG25COM0 // bit 1
6671 #define SEG26COM0 LCDDATA12bits.SEG26COM0 // bit 2
6672 #define SEG27COM0 LCDDATA12bits.SEG27COM0 // bit 3
6673 #define SEG28COM0 LCDDATA12bits.SEG28COM0 // bit 4
6674 #define SEG29COM0 LCDDATA12bits.SEG29COM0 // bit 5
6675 #define SEG30COM0 LCDDATA12bits.SEG30COM0 // bit 6
6676 #define SEG31COM0 LCDDATA12bits.SEG31COM0 // bit 7
6678 #define SEG32COM0 LCDDATA13bits.SEG32COM0 // bit 0
6679 #define SEG33COM0 LCDDATA13bits.SEG33COM0 // bit 1
6680 #define SEG34COM0 LCDDATA13bits.SEG34COM0 // bit 2
6681 #define SEG35COM0 LCDDATA13bits.SEG35COM0 // bit 3
6682 #define SEG36COM0 LCDDATA13bits.SEG36COM0 // bit 4
6683 #define SEG37COM0 LCDDATA13bits.SEG37COM0 // bit 5
6684 #define SEG38COM0 LCDDATA13bits.SEG38COM0 // bit 6
6685 #define SEG39COM0 LCDDATA13bits.SEG39COM0 // bit 7
6687 #define SEG40COM0 LCDDATA14bits.SEG40COM0 // bit 0
6688 #define SEG41COM0 LCDDATA14bits.SEG41COM0 // bit 1
6689 #define SEG42COM0 LCDDATA14bits.SEG42COM0 // bit 2
6690 #define SEG43COM0 LCDDATA14bits.SEG43COM0 // bit 3
6691 #define SEG44COM0 LCDDATA14bits.SEG44COM0 // bit 4
6692 #define SEG45COM0 LCDDATA14bits.SEG45COM0 // bit 5
6694 #define SEG24COM1 LCDDATA15bits.SEG24COM1 // bit 0
6695 #define SEG25COM1 LCDDATA15bits.SEG25COM1 // bit 1
6696 #define SEG26COM1 LCDDATA15bits.SEG26COM1 // bit 2
6697 #define SEG27COM1 LCDDATA15bits.SEG27COM1 // bit 3
6698 #define SEG28COM1 LCDDATA15bits.SEG28COM1 // bit 4
6699 #define SEG29COM1 LCDDATA15bits.SEG29COM1 // bit 5
6700 #define SEG30COM1 LCDDATA15bits.SEG30COM1 // bit 6
6701 #define SEG31COM1 LCDDATA15bits.SEG31COM1 // bit 7
6703 #define SEG32COM1 LCDDATA16bits.SEG32COM1 // bit 0
6704 #define SEG33COM1 LCDDATA16bits.SEG33COM1 // bit 1
6705 #define SEG34COM1 LCDDATA16bits.SEG34COM1 // bit 2
6706 #define SEG35COM1 LCDDATA16bits.SEG35COM1 // bit 3
6707 #define SEG36COM1 LCDDATA16bits.SEG36COM1 // bit 4
6708 #define SEG37COM1 LCDDATA16bits.SEG37COM1 // bit 5
6709 #define SEG38COM1 LCDDATA16bits.SEG38COM1 // bit 6
6710 #define SEG39COM1 LCDDATA16bits.SEG39COM1 // bit 7
6712 #define SEG40COM1 LCDDATA17bits.SEG40COM1 // bit 0
6713 #define SEG41COM1 LCDDATA17bits.SEG41COM1 // bit 1
6714 #define SEG42COM1 LCDDATA17bits.SEG42COM1 // bit 2
6715 #define SEG43COM1 LCDDATA17bits.SEG43COM1 // bit 3
6716 #define SEG44COM1 LCDDATA17bits.SEG44COM1 // bit 4
6717 #define SEG45COM1 LCDDATA17bits.SEG45COM1 // bit 5
6719 #define SEG24COM2 LCDDATA18bits.SEG24COM2 // bit 0
6720 #define SEG25COM2 LCDDATA18bits.SEG25COM2 // bit 1
6721 #define SEG26COM2 LCDDATA18bits.SEG26COM2 // bit 2
6722 #define SEG27COM2 LCDDATA18bits.SEG27COM2 // bit 3
6723 #define SEG28COM2 LCDDATA18bits.SEG28COM2 // bit 4
6724 #define SEG29COM2 LCDDATA18bits.SEG29COM2 // bit 5
6725 #define SEG30COM2 LCDDATA18bits.SEG30COM2 // bit 6
6726 #define SEG31COM2 LCDDATA18bits.SEG31COM2 // bit 7
6728 #define SEG32COM2 LCDDATA19bits.SEG32COM2 // bit 0
6729 #define SEG33COM2 LCDDATA19bits.SEG33COM2 // bit 1
6730 #define SEG34COM2 LCDDATA19bits.SEG34COM2 // bit 2
6731 #define SEG35COM2 LCDDATA19bits.SEG35COM2 // bit 3
6732 #define SEG36COM2 LCDDATA19bits.SEG36COM2 // bit 4
6733 #define SEG37COM2 LCDDATA19bits.SEG37COM2 // bit 5
6734 #define SEG38COM2 LCDDATA19bits.SEG38COM2 // bit 6
6735 #define SEG39COM2 LCDDATA19bits.SEG39COM2 // bit 7
6737 #define SEG40COM2 LCDDATA20bits.SEG40COM2 // bit 0
6738 #define SEG41COM2 LCDDATA20bits.SEG41COM2 // bit 1
6739 #define SEG42COM2 LCDDATA20bits.SEG42COM2 // bit 2
6740 #define SEG43COM2 LCDDATA20bits.SEG43COM2 // bit 3
6741 #define SEG44COM2 LCDDATA20bits.SEG44COM2 // bit 4
6742 #define SEG45COM2 LCDDATA20bits.SEG45COM2 // bit 5
6744 #define SEG24COM3 LCDDATA21bits.SEG24COM3 // bit 0
6745 #define SEG25COM3 LCDDATA21bits.SEG25COM3 // bit 1
6746 #define SEG26COM3 LCDDATA21bits.SEG26COM3 // bit 2
6747 #define SEG27COM3 LCDDATA21bits.SEG27COM3 // bit 3
6748 #define SEG28COM3 LCDDATA21bits.SEG28COM3 // bit 4
6749 #define SEG29COM3 LCDDATA21bits.SEG29COM3 // bit 5
6750 #define SEG30COM3 LCDDATA21bits.SEG30COM3 // bit 6
6751 #define SEG31COM3 LCDDATA21bits.SEG31COM3 // bit 7
6753 #define SEG32COM3 LCDDATA22bits.SEG32COM3 // bit 0
6754 #define SEG33COM3 LCDDATA22bits.SEG33COM3 // bit 1
6755 #define SEG34COM3 LCDDATA22bits.SEG34COM3 // bit 2
6756 #define SEG35COM3 LCDDATA22bits.SEG35COM3 // bit 3
6757 #define SEG36COM3 LCDDATA22bits.SEG36COM3 // bit 4
6758 #define SEG37COM3 LCDDATA22bits.SEG37COM3 // bit 5
6759 #define SEG38COM3 LCDDATA22bits.SEG38COM3 // bit 6
6760 #define SEG39COM3 LCDDATA22bits.SEG39COM3 // bit 7
6762 #define SEG40COM3 LCDDATA23bits.SEG40COM3 // bit 0
6763 #define SEG41COM3 LCDDATA23bits.SEG41COM3 // bit 1
6764 #define SEG42COM3 LCDDATA23bits.SEG42COM3 // bit 2
6765 #define SEG43COM3 LCDDATA23bits.SEG43COM3 // bit 3
6766 #define SEG44COM3 LCDDATA23bits.SEG44COM3 // bit 4
6767 #define SEG45COM3 LCDDATA23bits.SEG45COM3 // bit 5
6769 #define LP0 LCDPSbits.LP0 // bit 0
6770 #define LP1 LCDPSbits.LP1 // bit 1
6771 #define LP2 LCDPSbits.LP2 // bit 2
6772 #define LP3 LCDPSbits.LP3 // bit 3
6773 #define WA LCDPSbits.WA // bit 4
6774 #define LCDA LCDPSbits.LCDA // bit 5
6775 #define BIASMD LCDPSbits.BIASMD // bit 6
6776 #define WFT LCDPSbits.WFT // bit 7
6778 #define VLCD1PE LCDREFbits.VLCD1PE // bit 1
6779 #define VLCD2PE LCDREFbits.VLCD2PE // bit 2
6780 #define VLCD3PE LCDREFbits.VLCD3PE // bit 3
6781 #define LCDIRI LCDREFbits.LCDIRI // bit 5
6782 #define LCDIRS LCDREFbits.LCDIRS // bit 6
6783 #define LCDIRE LCDREFbits.LCDIRE // bit 7
6785 #define LRLAT0 LCDRLbits.LRLAT0 // bit 0
6786 #define LRLAT1 LCDRLbits.LRLAT1 // bit 1
6787 #define LRLAT2 LCDRLbits.LRLAT2 // bit 2
6788 #define LRLBP0 LCDRLbits.LRLBP0 // bit 4
6789 #define LRLBP1 LCDRLbits.LRLBP1 // bit 5
6790 #define LRLAP0 LCDRLbits.LRLAP0 // bit 6
6791 #define LRLAP1 LCDRLbits.LRLAP1 // bit 7
6793 #define SE0 LCDSE0bits.SE0 // bit 0
6794 #define SE1 LCDSE0bits.SE1 // bit 1
6795 #define SE2 LCDSE0bits.SE2 // bit 2
6796 #define SE3 LCDSE0bits.SE3 // bit 3
6797 #define SE4 LCDSE0bits.SE4 // bit 4
6798 #define SE5 LCDSE0bits.SE5 // bit 5
6799 #define SE6 LCDSE0bits.SE6 // bit 6
6800 #define SE7 LCDSE0bits.SE7 // bit 7
6802 #define SE8 LCDSE1bits.SE8 // bit 0
6803 #define SE9 LCDSE1bits.SE9 // bit 1
6804 #define SE10 LCDSE1bits.SE10 // bit 2
6805 #define SE11 LCDSE1bits.SE11 // bit 3
6806 #define SE12 LCDSE1bits.SE12 // bit 4
6807 #define SE13 LCDSE1bits.SE13 // bit 5
6808 #define SE14 LCDSE1bits.SE14 // bit 6
6809 #define SE15 LCDSE1bits.SE15 // bit 7
6811 #define SE16 LCDSE2bits.SE16 // bit 0
6812 #define SE17 LCDSE2bits.SE17 // bit 1
6813 #define SE18 LCDSE2bits.SE18 // bit 2
6814 #define SE19 LCDSE2bits.SE19 // bit 3
6815 #define SE20 LCDSE2bits.SE20 // bit 4
6816 #define SE21 LCDSE2bits.SE21 // bit 5
6817 #define SE22 LCDSE2bits.SE22 // bit 6
6818 #define SE23 LCDSE2bits.SE23 // bit 7
6820 #define SE24 LCDSE3bits.SE24 // bit 0
6821 #define SE25 LCDSE3bits.SE25 // bit 1
6822 #define SE26 LCDSE3bits.SE26 // bit 2
6823 #define SE27 LCDSE3bits.SE27 // bit 3
6824 #define SE28 LCDSE3bits.SE28 // bit 4
6825 #define SE29 LCDSE3bits.SE29 // bit 5
6826 #define SE30 LCDSE3bits.SE30 // bit 6
6827 #define SE31 LCDSE3bits.SE31 // bit 7
6829 #define SE32 LCDSE4bits.SE32 // bit 0
6830 #define SE33 LCDSE4bits.SE33 // bit 1
6831 #define SE34 LCDSE4bits.SE34 // bit 2
6832 #define SE35 LCDSE4bits.SE35 // bit 3
6833 #define SE36 LCDSE4bits.SE36 // bit 4
6834 #define SE37 LCDSE4bits.SE37 // bit 5
6835 #define SE38 LCDSE4bits.SE38 // bit 6
6836 #define SE39 LCDSE4bits.SE39 // bit 7
6838 #define SE40 LCDSE5bits.SE40 // bit 0
6839 #define SE41 LCDSE5bits.SE41 // bit 1
6840 #define SE42 LCDSE5bits.SE42 // bit 2
6841 #define SE43 LCDSE5bits.SE43 // bit 3
6842 #define SE44 LCDSE5bits.SE44 // bit 4
6843 #define SE45 LCDSE5bits.SE45 // bit 5
6845 #define PS0 OPTION_REGbits.PS0 // bit 0
6846 #define PS1 OPTION_REGbits.PS1 // bit 1
6847 #define PS2 OPTION_REGbits.PS2 // bit 2
6848 #define PSA OPTION_REGbits.PSA // bit 3
6849 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
6850 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
6851 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
6852 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
6853 #define INTEDG OPTION_REGbits.INTEDG // bit 6
6854 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
6856 #define SCS0 OSCCONbits.SCS0 // bit 0
6857 #define SCS1 OSCCONbits.SCS1 // bit 1
6858 #define IRCF0 OSCCONbits.IRCF0 // bit 3
6859 #define IRCF1 OSCCONbits.IRCF1 // bit 4
6860 #define IRCF2 OSCCONbits.IRCF2 // bit 5
6861 #define IRCF3 OSCCONbits.IRCF3 // bit 6
6862 #define SPLLEN OSCCONbits.SPLLEN // bit 7
6864 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
6865 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
6866 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
6867 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
6868 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
6869 #define OSTS OSCSTATbits.OSTS // bit 5
6870 #define PLLR OSCSTATbits.PLLR // bit 6
6871 #define T1OSCR OSCSTATbits.T1OSCR // bit 7
6873 #define TUN0 OSCTUNEbits.TUN0 // bit 0
6874 #define TUN1 OSCTUNEbits.TUN1 // bit 1
6875 #define TUN2 OSCTUNEbits.TUN2 // bit 2
6876 #define TUN3 OSCTUNEbits.TUN3 // bit 3
6877 #define TUN4 OSCTUNEbits.TUN4 // bit 4
6878 #define TUN5 OSCTUNEbits.TUN5 // bit 5
6880 #define NOT_BOR PCONbits.NOT_BOR // bit 0
6881 #define NOT_POR PCONbits.NOT_POR // bit 1
6882 #define NOT_RI PCONbits.NOT_RI // bit 2
6883 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
6884 #define STKUNF PCONbits.STKUNF // bit 6
6885 #define STKOVF PCONbits.STKOVF // bit 7
6887 #define TMR1IE PIE1bits.TMR1IE // bit 0
6888 #define TMR2IE PIE1bits.TMR2IE // bit 1
6889 #define CCP1IE PIE1bits.CCP1IE // bit 2
6890 #define SSP1IE PIE1bits.SSP1IE // bit 3, shadows bit in PIE1bits
6891 #define SSPIE PIE1bits.SSPIE // bit 3, shadows bit in PIE1bits
6892 #define TX1IE PIE1bits.TX1IE // bit 4, shadows bit in PIE1bits
6893 #define TXIE PIE1bits.TXIE // bit 4, shadows bit in PIE1bits
6894 #define RC1IE PIE1bits.RC1IE // bit 5, shadows bit in PIE1bits
6895 #define RCIE PIE1bits.RCIE // bit 5, shadows bit in PIE1bits
6896 #define ADIE PIE1bits.ADIE // bit 6
6897 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
6899 #define CCP2IE PIE2bits.CCP2IE // bit 0
6900 #define C3IE PIE2bits.C3IE // bit 1
6901 #define LCDIE PIE2bits.LCDIE // bit 2
6902 #define BCLIE PIE2bits.BCLIE // bit 3
6903 #define EEIE PIE2bits.EEIE // bit 4
6904 #define C1IE PIE2bits.C1IE // bit 5
6905 #define C2IE PIE2bits.C2IE // bit 6
6906 #define OSFIE PIE2bits.OSFIE // bit 7
6908 #define TMR4IE PIE3bits.TMR4IE // bit 1
6909 #define TMR6IE PIE3bits.TMR6IE // bit 3
6910 #define CCP3IE PIE3bits.CCP3IE // bit 4
6911 #define CCP4IE PIE3bits.CCP4IE // bit 5
6912 #define CCP5IE PIE3bits.CCP5IE // bit 6
6914 #define SSP2IE PIE4bits.SSP2IE // bit 0
6915 #define BCL2IE PIE4bits.BCL2IE // bit 1
6916 #define TX2IE PIE4bits.TX2IE // bit 4
6917 #define RC2IE PIE4bits.RC2IE // bit 5
6919 #define TMR1IF PIR1bits.TMR1IF // bit 0
6920 #define TMR2IF PIR1bits.TMR2IF // bit 1
6921 #define CCP1IF PIR1bits.CCP1IF // bit 2
6922 #define SSP1IF PIR1bits.SSP1IF // bit 3, shadows bit in PIR1bits
6923 #define SSPIF PIR1bits.SSPIF // bit 3, shadows bit in PIR1bits
6924 #define TX1IF PIR1bits.TX1IF // bit 4, shadows bit in PIR1bits
6925 #define TXIF PIR1bits.TXIF // bit 4, shadows bit in PIR1bits
6926 #define RC1IF PIR1bits.RC1IF // bit 5, shadows bit in PIR1bits
6927 #define RCIF PIR1bits.RCIF // bit 5, shadows bit in PIR1bits
6928 #define ADIF PIR1bits.ADIF // bit 6
6929 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
6931 #define CCP2IF PIR2bits.CCP2IF // bit 0
6932 #define C3IF PIR2bits.C3IF // bit 1
6933 #define LCDIF PIR2bits.LCDIF // bit 2
6934 #define BCLIF PIR2bits.BCLIF // bit 3
6935 #define EEIF PIR2bits.EEIF // bit 4
6936 #define C1IF PIR2bits.C1IF // bit 5
6937 #define C2IF PIR2bits.C2IF // bit 6
6938 #define OSFIF PIR2bits.OSFIF // bit 7
6940 #define TMR4IF PIR3bits.TMR4IF // bit 1
6941 #define TMR6IF PIR3bits.TMR6IF // bit 3
6942 #define CCP3IF PIR3bits.CCP3IF // bit 4
6943 #define CCP4IF PIR3bits.CCP4IF // bit 5
6944 #define CCP5IF PIR3bits.CCP5IF // bit 6
6946 #define SSP2IF PIR4bits.SSP2IF // bit 0
6947 #define BCL2IF PIR4bits.BCL2IF // bit 1
6948 #define TX2IF PIR4bits.TX2IF // bit 4
6949 #define RC2IF PIR4bits.RC2IF // bit 5
6951 #define RA0 PORTAbits.RA0 // bit 0, shadows bit in PORTAbits
6952 #define AN0 PORTAbits.AN0 // bit 0, shadows bit in PORTAbits
6953 #define CPS0 PORTAbits.CPS0 // bit 0, shadows bit in PORTAbits
6954 #define SEG33 PORTAbits.SEG33 // bit 0, shadows bit in PORTAbits
6955 #define RA1 PORTAbits.RA1 // bit 1, shadows bit in PORTAbits
6956 #define AN1 PORTAbits.AN1 // bit 1, shadows bit in PORTAbits
6957 #define CPS1 PORTAbits.CPS1 // bit 1, shadows bit in PORTAbits
6958 #define SEG18 PORTAbits.SEG18 // bit 1, shadows bit in PORTAbits
6959 #define RA2 PORTAbits.RA2 // bit 2, shadows bit in PORTAbits
6960 #define AN2 PORTAbits.AN2 // bit 2, shadows bit in PORTAbits
6961 #define CPS2 PORTAbits.CPS2 // bit 2, shadows bit in PORTAbits
6962 #define SEG34 PORTAbits.SEG34 // bit 2, shadows bit in PORTAbits
6963 #define VREFM PORTAbits.VREFM // bit 2, shadows bit in PORTAbits
6964 #define RA3 PORTAbits.RA3 // bit 3, shadows bit in PORTAbits
6965 #define AN3 PORTAbits.AN3 // bit 3, shadows bit in PORTAbits
6966 #define CPS3 PORTAbits.CPS3 // bit 3, shadows bit in PORTAbits
6967 #define SEG35 PORTAbits.SEG35 // bit 3, shadows bit in PORTAbits
6968 #define VREFP PORTAbits.VREFP // bit 3, shadows bit in PORTAbits
6969 #define RA4 PORTAbits.RA4 // bit 4, shadows bit in PORTAbits
6970 #define SEG14 PORTAbits.SEG14 // bit 4, shadows bit in PORTAbits
6971 #define T0CKI PORTAbits.T0CKI // bit 4, shadows bit in PORTAbits
6972 #define RA5 PORTAbits.RA5 // bit 5, shadows bit in PORTAbits
6973 #define AN4 PORTAbits.AN4 // bit 5, shadows bit in PORTAbits
6974 #define CPS4 PORTAbits.CPS4 // bit 5, shadows bit in PORTAbits
6975 #define SEG15 PORTAbits.SEG15 // bit 5, shadows bit in PORTAbits
6976 #define RA6 PORTAbits.RA6 // bit 6, shadows bit in PORTAbits
6977 #define SEG36 PORTAbits.SEG36 // bit 6, shadows bit in PORTAbits
6978 #define OSC2 PORTAbits.OSC2 // bit 6, shadows bit in PORTAbits
6979 #define CLKOUT PORTAbits.CLKOUT // bit 6, shadows bit in PORTAbits
6980 #define RA7 PORTAbits.RA7 // bit 7, shadows bit in PORTAbits
6981 #define SEG37 PORTAbits.SEG37 // bit 7, shadows bit in PORTAbits
6982 #define OSC1 PORTAbits.OSC1 // bit 7, shadows bit in PORTAbits
6983 #define CLKIN PORTAbits.CLKIN // bit 7, shadows bit in PORTAbits
6985 #define RB0 PORTBbits.RB0 // bit 0, shadows bit in PORTBbits
6986 #define SEG30 PORTBbits.SEG30 // bit 0, shadows bit in PORTBbits
6987 #define SRI PORTBbits.SRI // bit 0, shadows bit in PORTBbits
6988 #define FLT0 PORTBbits.FLT0 // bit 0, shadows bit in PORTBbits
6989 #define RB1 PORTBbits.RB1 // bit 1, shadows bit in PORTBbits
6990 #define SEG8 PORTBbits.SEG8 // bit 1, shadows bit in PORTBbits
6991 #define RB2 PORTBbits.RB2 // bit 2, shadows bit in PORTBbits
6992 #define SEG9 PORTBbits.SEG9 // bit 2, shadows bit in PORTBbits
6993 #define RB3 PORTBbits.RB3 // bit 3, shadows bit in PORTBbits
6994 #define SEG10 PORTBbits.SEG10 // bit 3, shadows bit in PORTBbits
6995 #define RB4 PORTBbits.RB4 // bit 4, shadows bit in PORTBbits
6996 #define SEG11 PORTBbits.SEG11 // bit 4, shadows bit in PORTBbits
6997 #define RB5 PORTBbits.RB5 // bit 5, shadows bit in PORTBbits
6998 #define SEG29 PORTBbits.SEG29 // bit 5, shadows bit in PORTBbits
6999 #define T1G PORTBbits.T1G // bit 5, shadows bit in PORTBbits
7000 #define RB6 PORTBbits.RB6 // bit 6, shadows bit in PORTBbits
7001 #define SEG38 PORTBbits.SEG38 // bit 6, shadows bit in PORTBbits
7002 #define RB7 PORTBbits.RB7 // bit 7, shadows bit in PORTBbits
7003 #define SEG39 PORTBbits.SEG39 // bit 7, shadows bit in PORTBbits
7005 #define RC0 PORTCbits.RC0 // bit 0, shadows bit in PORTCbits
7006 #define SEG40 PORTCbits.SEG40 // bit 0, shadows bit in PORTCbits
7007 #define T1OSO PORTCbits.T1OSO // bit 0, shadows bit in PORTCbits
7008 #define T1CKI PORTCbits.T1CKI // bit 0, shadows bit in PORTCbits
7009 #define RC1 PORTCbits.RC1 // bit 1, shadows bit in PORTCbits
7010 #define SEG32 PORTCbits.SEG32 // bit 1, shadows bit in PORTCbits
7011 #define T1OSI PORTCbits.T1OSI // bit 1, shadows bit in PORTCbits
7012 #define CCP2 PORTCbits.CCP2 // bit 1, shadows bit in PORTCbits
7013 #define P2A PORTCbits.P2A // bit 1, shadows bit in PORTCbits
7014 #define RC2 PORTCbits.RC2 // bit 2, shadows bit in PORTCbits
7015 #define SEG13 PORTCbits.SEG13 // bit 2, shadows bit in PORTCbits
7016 #define CCP1 PORTCbits.CCP1 // bit 2, shadows bit in PORTCbits
7017 #define P1A PORTCbits.P1A // bit 2, shadows bit in PORTCbits
7018 #define RC3 PORTCbits.RC3 // bit 3, shadows bit in PORTCbits
7019 #define SEG17 PORTCbits.SEG17 // bit 3, shadows bit in PORTCbits
7020 #define SCK1 PORTCbits.SCK1 // bit 3, shadows bit in PORTCbits
7021 #define SCL1 PORTCbits.SCL1 // bit 3, shadows bit in PORTCbits
7022 #define RC4 PORTCbits.RC4 // bit 4, shadows bit in PORTCbits
7023 #define SEG16 PORTCbits.SEG16 // bit 4, shadows bit in PORTCbits
7024 #define SDI1 PORTCbits.SDI1 // bit 4, shadows bit in PORTCbits
7025 #define SDA1 PORTCbits.SDA1 // bit 4, shadows bit in PORTCbits
7026 #define RC5 PORTCbits.RC5 // bit 5, shadows bit in PORTCbits
7027 #define SEG12 PORTCbits.SEG12 // bit 5, shadows bit in PORTCbits
7028 #define SDO1 PORTCbits.SDO1 // bit 5, shadows bit in PORTCbits
7029 #define RC6 PORTCbits.RC6 // bit 6, shadows bit in PORTCbits
7030 #define SEG27 PORTCbits.SEG27 // bit 6, shadows bit in PORTCbits
7031 #define TX1 PORTCbits.TX1 // bit 6, shadows bit in PORTCbits
7032 #define CK1 PORTCbits.CK1 // bit 6, shadows bit in PORTCbits
7033 #define RC7 PORTCbits.RC7 // bit 7, shadows bit in PORTCbits
7034 #define SEG28 PORTCbits.SEG28 // bit 7, shadows bit in PORTCbits
7035 #define RX1 PORTCbits.RX1 // bit 7, shadows bit in PORTCbits
7036 #define DT1 PORTCbits.DT1 // bit 7, shadows bit in PORTCbits
7038 #define RD0 PORTDbits.RD0 // bit 0, shadows bit in PORTDbits
7039 #define SEG0 PORTDbits.SEG0 // bit 0, shadows bit in PORTDbits
7040 #define P2D PORTDbits.P2D // bit 0, shadows bit in PORTDbits
7041 #define RD1 PORTDbits.RD1 // bit 1, shadows bit in PORTDbits
7042 #define SEG1 PORTDbits.SEG1 // bit 1, shadows bit in PORTDbits
7043 #define P2C PORTDbits.P2C // bit 1, shadows bit in PORTDbits
7044 #define RD2 PORTDbits.RD2 // bit 2, shadows bit in PORTDbits
7045 #define SEG2 PORTDbits.SEG2 // bit 2, shadows bit in PORTDbits
7046 #define P2B PORTDbits.P2B // bit 2, shadows bit in PORTDbits
7047 #define RD3 PORTDbits.RD3 // bit 3, shadows bit in PORTDbits
7048 #define SEG3 PORTDbits.SEG3 // bit 3, shadows bit in PORTDbits
7049 #define P3C PORTDbits.P3C // bit 3, shadows bit in PORTDbits
7050 #define RD4 PORTDbits.RD4 // bit 4, shadows bit in PORTDbits
7051 #define SEG4 PORTDbits.SEG4 // bit 4, shadows bit in PORTDbits
7052 #define P3B PORTDbits.P3B // bit 4, shadows bit in PORTDbits
7053 #define SDO2 PORTDbits.SDO2 // bit 4, shadows bit in PORTDbits
7054 #define RD5 PORTDbits.RD5 // bit 5, shadows bit in PORTDbits
7055 #define SEG5 PORTDbits.SEG5 // bit 5, shadows bit in PORTDbits
7056 #define P1C PORTDbits.P1C // bit 5, shadows bit in PORTDbits
7057 #define SDI2 PORTDbits.SDI2 // bit 5, shadows bit in PORTDbits
7058 #define SDA2 PORTDbits.SDA2 // bit 5, shadows bit in PORTDbits
7059 #define RD6 PORTDbits.RD6 // bit 6, shadows bit in PORTDbits
7060 #define SEG6 PORTDbits.SEG6 // bit 6, shadows bit in PORTDbits
7061 #define P1B PORTDbits.P1B // bit 6, shadows bit in PORTDbits
7062 #define SCK2 PORTDbits.SCK2 // bit 6, shadows bit in PORTDbits
7063 #define SCL2 PORTDbits.SCL2 // bit 6, shadows bit in PORTDbits
7064 #define RD7 PORTDbits.RD7 // bit 7, shadows bit in PORTDbits
7065 #define SEG7 PORTDbits.SEG7 // bit 7, shadows bit in PORTDbits
7066 #define NOT_SS2 PORTDbits.NOT_SS2 // bit 7, shadows bit in PORTDbits
7068 #define STR1A PSTR1CONbits.STR1A // bit 0
7069 #define STR1B PSTR1CONbits.STR1B // bit 1
7070 #define STR1C PSTR1CONbits.STR1C // bit 2
7071 #define STR1D PSTR1CONbits.STR1D // bit 3
7072 #define STR1SYNC PSTR1CONbits.STR1SYNC // bit 4
7074 #define STR2A PSTR2CONbits.STR2A // bit 0
7075 #define STR2B PSTR2CONbits.STR2B // bit 1
7076 #define STR2C PSTR2CONbits.STR2C // bit 2
7077 #define STR2D PSTR2CONbits.STR2D // bit 3
7078 #define STR2SYNC PSTR2CONbits.STR2SYNC // bit 4
7080 #define STR3A PSTR3CONbits.STR3A // bit 0
7081 #define STR3B PSTR3CONbits.STR3B // bit 1
7082 #define STR3C PSTR3CONbits.STR3C // bit 2
7083 #define STR3D PSTR3CONbits.STR3D // bit 3
7084 #define STR3SYNC PSTR3CONbits.STR3SYNC // bit 4
7086 #define P1DC0 PWM1CONbits.P1DC0 // bit 0
7087 #define P1DC1 PWM1CONbits.P1DC1 // bit 1
7088 #define P1DC2 PWM1CONbits.P1DC2 // bit 2
7089 #define P1DC3 PWM1CONbits.P1DC3 // bit 3
7090 #define P1DC4 PWM1CONbits.P1DC4 // bit 4
7091 #define P1DC5 PWM1CONbits.P1DC5 // bit 5
7092 #define P1DC6 PWM1CONbits.P1DC6 // bit 6
7093 #define P1RSEN PWM1CONbits.P1RSEN // bit 7
7095 #define P2DC0 PWM2CONbits.P2DC0 // bit 0
7096 #define P2DC1 PWM2CONbits.P2DC1 // bit 1
7097 #define P2DC2 PWM2CONbits.P2DC2 // bit 2
7098 #define P2DC3 PWM2CONbits.P2DC3 // bit 3
7099 #define P2DC4 PWM2CONbits.P2DC4 // bit 4
7100 #define P2DC5 PWM2CONbits.P2DC5 // bit 5
7101 #define P2DC6 PWM2CONbits.P2DC6 // bit 6
7102 #define P2RSEN PWM2CONbits.P2RSEN // bit 7
7104 #define P3DC0 PWM3CONbits.P3DC0 // bit 0
7105 #define P3DC1 PWM3CONbits.P3DC1 // bit 1
7106 #define P3DC2 PWM3CONbits.P3DC2 // bit 2
7107 #define P3DC3 PWM3CONbits.P3DC3 // bit 3
7108 #define P3DC4 PWM3CONbits.P3DC4 // bit 4
7109 #define P3DC5 PWM3CONbits.P3DC5 // bit 5
7110 #define P3DC6 PWM3CONbits.P3DC6 // bit 6
7111 #define P3RSEN PWM3CONbits.P3RSEN // bit 7
7113 #define RX9D RC1STAbits.RX9D // bit 0
7114 #define OERR RC1STAbits.OERR // bit 1
7115 #define FERR RC1STAbits.FERR // bit 2
7116 #define ADDEN RC1STAbits.ADDEN // bit 3
7117 #define CREN RC1STAbits.CREN // bit 4
7118 #define SREN RC1STAbits.SREN // bit 5
7119 #define RX9 RC1STAbits.RX9 // bit 6
7120 #define SPEN RC1STAbits.SPEN // bit 7
7122 #define SRPR SRCON0bits.SRPR // bit 0
7123 #define SRPS SRCON0bits.SRPS // bit 1
7124 #define SRNQEN SRCON0bits.SRNQEN // bit 2
7125 #define SRQEN SRCON0bits.SRQEN // bit 3
7126 #define SRCLK0 SRCON0bits.SRCLK0 // bit 4
7127 #define SRCLK1 SRCON0bits.SRCLK1 // bit 5
7128 #define SRCLK2 SRCON0bits.SRCLK2 // bit 6
7129 #define SRLEN SRCON0bits.SRLEN // bit 7
7131 #define SRRC1E SRCON1bits.SRRC1E // bit 0
7132 #define SRRC2E SRCON1bits.SRRC2E // bit 1
7133 #define SRRCKE SRCON1bits.SRRCKE // bit 2
7134 #define SRRPE SRCON1bits.SRRPE // bit 3
7135 #define SRSC1E SRCON1bits.SRSC1E // bit 4
7136 #define SRSC2E SRCON1bits.SRSC2E // bit 5
7137 #define SRSCKE SRCON1bits.SRSCKE // bit 6
7138 #define SRSPE SRCON1bits.SRSPE // bit 7
7140 #define SSPM0 SSP1CON1bits.SSPM0 // bit 0
7141 #define SSPM1 SSP1CON1bits.SSPM1 // bit 1
7142 #define SSPM2 SSP1CON1bits.SSPM2 // bit 2
7143 #define SSPM3 SSP1CON1bits.SSPM3 // bit 3
7144 #define CKP SSP1CON1bits.CKP // bit 4
7145 #define SSPEN SSP1CON1bits.SSPEN // bit 5
7146 #define SSPOV SSP1CON1bits.SSPOV // bit 6
7147 #define WCOL SSP1CON1bits.WCOL // bit 7
7149 #define SEN SSP1CON2bits.SEN // bit 0
7150 #define RSEN SSP1CON2bits.RSEN // bit 1
7151 #define PEN SSP1CON2bits.PEN // bit 2
7152 #define RCEN SSP1CON2bits.RCEN // bit 3
7153 #define ACKEN SSP1CON2bits.ACKEN // bit 4
7154 #define ACKDT SSP1CON2bits.ACKDT // bit 5
7155 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
7156 #define GCEN SSP1CON2bits.GCEN // bit 7
7158 #define DHEN SSP1CON3bits.DHEN // bit 0
7159 #define AHEN SSP1CON3bits.AHEN // bit 1
7160 #define SBCDE SSP1CON3bits.SBCDE // bit 2
7161 #define SDAHT SSP1CON3bits.SDAHT // bit 3
7162 #define BOEN SSP1CON3bits.BOEN // bit 4
7163 #define SCIE SSP1CON3bits.SCIE // bit 5
7164 #define PCIE SSP1CON3bits.PCIE // bit 6
7165 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
7167 #define BF SSP1STATbits.BF // bit 0
7168 #define UA SSP1STATbits.UA // bit 1
7169 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
7170 #define S SSP1STATbits.S // bit 3
7171 #define P SSP1STATbits.P // bit 4
7172 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
7173 #define CKE SSP1STATbits.CKE // bit 6
7174 #define SMP SSP1STATbits.SMP // bit 7
7176 #define C STATUSbits.C // bit 0
7177 #define DC STATUSbits.DC // bit 1
7178 #define Z STATUSbits.Z // bit 2
7179 #define NOT_PD STATUSbits.NOT_PD // bit 3
7180 #define NOT_TO STATUSbits.NOT_TO // bit 4
7182 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
7183 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
7184 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
7186 #define TMR1ON T1CONbits.TMR1ON // bit 0
7187 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
7188 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
7189 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
7190 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
7191 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
7192 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
7194 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
7195 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
7196 #define T1GVAL T1GCONbits.T1GVAL // bit 2
7197 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
7198 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits
7199 #define T1GSPM T1GCONbits.T1GSPM // bit 4
7200 #define T1GTM T1GCONbits.T1GTM // bit 5
7201 #define T1GPOL T1GCONbits.T1GPOL // bit 6
7202 #define TMR1GE T1GCONbits.TMR1GE // bit 7
7204 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
7205 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
7206 #define TMR2ON T2CONbits.TMR2ON // bit 2
7207 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
7208 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
7209 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
7210 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
7212 #define T4CKPS0 T4CONbits.T4CKPS0 // bit 0
7213 #define T4CKPS1 T4CONbits.T4CKPS1 // bit 1
7214 #define TMR4ON T4CONbits.TMR4ON // bit 2
7215 #define T4OUTPS0 T4CONbits.T4OUTPS0 // bit 3
7216 #define T4OUTPS1 T4CONbits.T4OUTPS1 // bit 4
7217 #define T4OUTPS2 T4CONbits.T4OUTPS2 // bit 5
7218 #define T4OUTPS3 T4CONbits.T4OUTPS3 // bit 6
7220 #define T6CKPS0 T6CONbits.T6CKPS0 // bit 0
7221 #define T6CKPS1 T6CONbits.T6CKPS1 // bit 1
7222 #define TMR6ON T6CONbits.TMR6ON // bit 2
7223 #define T6OUTPS0 T6CONbits.T6OUTPS0 // bit 3
7224 #define T6OUTPS1 T6CONbits.T6OUTPS1 // bit 4
7225 #define T6OUTPS2 T6CONbits.T6OUTPS2 // bit 5
7226 #define T6OUTPS3 T6CONbits.T6OUTPS3 // bit 6
7228 #define TRISA0 TRISAbits.TRISA0 // bit 0
7229 #define TRISA1 TRISAbits.TRISA1 // bit 1
7230 #define TRISA2 TRISAbits.TRISA2 // bit 2
7231 #define TRISA3 TRISAbits.TRISA3 // bit 3
7232 #define TRISA4 TRISAbits.TRISA4 // bit 4
7233 #define TRISA5 TRISAbits.TRISA5 // bit 5
7234 #define TRISA6 TRISAbits.TRISA6 // bit 6
7235 #define TRISA7 TRISAbits.TRISA7 // bit 7
7237 #define TRISB0 TRISBbits.TRISB0 // bit 0
7238 #define TRISB1 TRISBbits.TRISB1 // bit 1
7239 #define TRISB2 TRISBbits.TRISB2 // bit 2
7240 #define TRISB3 TRISBbits.TRISB3 // bit 3
7241 #define TRISB4 TRISBbits.TRISB4 // bit 4
7242 #define TRISB5 TRISBbits.TRISB5 // bit 5
7243 #define TRISB6 TRISBbits.TRISB6 // bit 6
7244 #define TRISB7 TRISBbits.TRISB7 // bit 7
7246 #define TRISC0 TRISCbits.TRISC0 // bit 0
7247 #define TRISC1 TRISCbits.TRISC1 // bit 1
7248 #define TRISC2 TRISCbits.TRISC2 // bit 2
7249 #define TRISC3 TRISCbits.TRISC3 // bit 3
7250 #define TRISC4 TRISCbits.TRISC4 // bit 4
7251 #define TRISC5 TRISCbits.TRISC5 // bit 5
7252 #define TRISC6 TRISCbits.TRISC6 // bit 6
7253 #define TRISC7 TRISCbits.TRISC7 // bit 7
7255 #define TRISD0 TRISDbits.TRISD0 // bit 0
7256 #define TRISD1 TRISDbits.TRISD1 // bit 1
7257 #define TRISD2 TRISDbits.TRISD2 // bit 2
7258 #define TRISD3 TRISDbits.TRISD3 // bit 3
7259 #define TRISD4 TRISDbits.TRISD4 // bit 4
7260 #define TRISD5 TRISDbits.TRISD5 // bit 5
7261 #define TRISD6 TRISDbits.TRISD6 // bit 6
7262 #define TRISD7 TRISDbits.TRISD7 // bit 7
7264 #define TRISE0 TRISEbits.TRISE0 // bit 0
7265 #define TRISE1 TRISEbits.TRISE1 // bit 1
7266 #define TRISE2 TRISEbits.TRISE2 // bit 2
7267 #define TRISE3 TRISEbits.TRISE3 // bit 3
7268 #define TRISE4 TRISEbits.TRISE4 // bit 4
7269 #define TRISE5 TRISEbits.TRISE5 // bit 5
7270 #define TRISE6 TRISEbits.TRISE6 // bit 6
7271 #define TRISE7 TRISEbits.TRISE7 // bit 7
7273 #define TRISF0 TRISFbits.TRISF0 // bit 0
7274 #define TRISF1 TRISFbits.TRISF1 // bit 1
7275 #define TRISF2 TRISFbits.TRISF2 // bit 2
7276 #define TRISF3 TRISFbits.TRISF3 // bit 3
7277 #define TRISF4 TRISFbits.TRISF4 // bit 4
7278 #define TRISF5 TRISFbits.TRISF5 // bit 5
7279 #define TRISF6 TRISFbits.TRISF6 // bit 6
7280 #define TRISF7 TRISFbits.TRISF7 // bit 7
7282 #define TRISG0 TRISGbits.TRISG0 // bit 0
7283 #define TRISG1 TRISGbits.TRISG1 // bit 1
7284 #define TRISG2 TRISGbits.TRISG2 // bit 2
7285 #define TRISG3 TRISGbits.TRISG3 // bit 3
7286 #define TRISG4 TRISGbits.TRISG4 // bit 4
7287 #define TRISG5 TRISGbits.TRISG5 // bit 5
7289 #define TX9D TX1STAbits.TX9D // bit 0
7290 #define TRMT TX1STAbits.TRMT // bit 1
7291 #define BRGH TX1STAbits.BRGH // bit 2
7292 #define SENDB TX1STAbits.SENDB // bit 3
7293 #define SYNC TX1STAbits.SYNC // bit 4
7294 #define TXEN TX1STAbits.TXEN // bit 5
7295 #define TX9 TX1STAbits.TX9 // bit 6
7296 #define CSRC TX1STAbits.CSRC // bit 7
7298 #define SWDTEN WDTCONbits.SWDTEN // bit 0
7299 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
7300 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
7301 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
7302 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
7303 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
7305 #define WPUB0 WPUBbits.WPUB0 // bit 0
7306 #define WPUB1 WPUBbits.WPUB1 // bit 1
7307 #define WPUB2 WPUBbits.WPUB2 // bit 2
7308 #define WPUB3 WPUBbits.WPUB3 // bit 3
7309 #define WPUB4 WPUBbits.WPUB4 // bit 4
7310 #define WPUB5 WPUBbits.WPUB5 // bit 5
7311 #define WPUB6 WPUBbits.WPUB6 // bit 6
7312 #define WPUB7 WPUBbits.WPUB7 // bit 7
7314 #define WPUG5 WPUGbits.WPUG5 // bit 5
7316 #endif // #ifndef NO_BIT_DEFINES
7318 #endif // #ifndef __PIC16LF1946_H__