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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16lf720.h
blob1b2c9101626feb1e7a246d4e2e9392d2fe5dd9d6
1 /*
2 * This declarations of the PIC16LF720 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:57 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16LF720_H__
26 #define __PIC16LF720_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PCLATH_ADDR 0x000A
45 #define INTCON_ADDR 0x000B
46 #define PIR1_ADDR 0x000C
47 #define TMR1_ADDR 0x000E
48 #define TMR1L_ADDR 0x000E
49 #define TMR1H_ADDR 0x000F
50 #define T1CON_ADDR 0x0010
51 #define TMR2_ADDR 0x0011
52 #define T2CON_ADDR 0x0012
53 #define SSPBUF_ADDR 0x0013
54 #define SSPCON_ADDR 0x0014
55 #define CCPR1_ADDR 0x0015
56 #define CCPR1L_ADDR 0x0015
57 #define CCPR1H_ADDR 0x0016
58 #define CCP1CON_ADDR 0x0017
59 #define RCSTA_ADDR 0x0018
60 #define TXREG_ADDR 0x0019
61 #define RCREG_ADDR 0x001A
62 #define ADRES_ADDR 0x001E
63 #define ADCON0_ADDR 0x001F
64 #define OPTION_REG_ADDR 0x0081
65 #define TRISA_ADDR 0x0085
66 #define TRISB_ADDR 0x0086
67 #define TRISC_ADDR 0x0087
68 #define PIE1_ADDR 0x008C
69 #define PCON_ADDR 0x008E
70 #define T1GCON_ADDR 0x008F
71 #define OSCCON_ADDR 0x0090
72 #define OSCTUNE_ADDR 0x0091
73 #define PR2_ADDR 0x0092
74 #define SSPADD_ADDR 0x0093
75 #define SSPMSK_ADDR 0x0093
76 #define SSPSTAT_ADDR 0x0094
77 #define WPUA_ADDR 0x0095
78 #define IOCA_ADDR 0x0096
79 #define TXSTA_ADDR 0x0098
80 #define SPBRG_ADDR 0x0099
81 #define FVRCON_ADDR 0x009D
82 #define ADCON1_ADDR 0x009F
83 #define PMDATL_ADDR 0x010C
84 #define PMADRL_ADDR 0x010D
85 #define PMDATH_ADDR 0x010E
86 #define PMADRH_ADDR 0x010F
87 #define WPUB_ADDR 0x0115
88 #define IOCB_ADDR 0x0116
89 #define ANSELA_ADDR 0x0185
90 #define ANSELB_ADDR 0x0186
91 #define ANSELC_ADDR 0x0187
92 #define PMCON1_ADDR 0x018C
93 #define PMCON2_ADDR 0x018D
94
95 #endif // #ifndef NO_ADDR_DEFINES
96
97 //==============================================================================
98 //
99 // Register Definitions
100 //
101 //==============================================================================
102
103 extern __at(0x0000) __sfr INDF;
104 extern __at(0x0001) __sfr TMR0;
105 extern __at(0x0002) __sfr PCL;
106
107 //==============================================================================
108 // STATUS Bits
109
110 extern __at(0x0003) __sfr STATUS;
111
112 typedef union
113 {
114 struct
115 {
116 unsigned C : 1;
117 unsigned DC : 1;
118 unsigned Z : 1;
119 unsigned NOT_PD : 1;
120 unsigned NOT_TO : 1;
121 unsigned RP0 : 1;
122 unsigned RP1 : 1;
123 unsigned IRP : 1;
124 };
125
126 struct
127 {
128 unsigned : 5;
129 unsigned RP : 2;
130 unsigned : 1;
131 };
132 } __STATUSbits_t;
133
134 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
135
136 #define _C 0x01
137 #define _DC 0x02
138 #define _Z 0x04
139 #define _NOT_PD 0x08
140 #define _NOT_TO 0x10
141 #define _RP0 0x20
142 #define _RP1 0x40
143 #define _IRP 0x80
144
145 //==============================================================================
146
147 extern __at(0x0004) __sfr FSR;
148
149 //==============================================================================
150 // PORTA Bits
151
152 extern __at(0x0005) __sfr PORTA;
153
154 typedef union
155 {
156 struct
157 {
158 unsigned RA0 : 1;
159 unsigned RA1 : 1;
160 unsigned RA2 : 1;
161 unsigned RA3 : 1;
162 unsigned RA4 : 1;
163 unsigned RA5 : 1;
164 unsigned : 1;
165 unsigned : 1;
166 };
167
168 struct
169 {
170 unsigned RA : 6;
171 unsigned : 2;
172 };
173 } __PORTAbits_t;
174
175 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
176
177 #define _RA0 0x01
178 #define _RA1 0x02
179 #define _RA2 0x04
180 #define _RA3 0x08
181 #define _RA4 0x10
182 #define _RA5 0x20
183
184 //==============================================================================
185
186
187 //==============================================================================
188 // PORTB Bits
189
190 extern __at(0x0006) __sfr PORTB;
191
192 typedef struct
193 {
194 unsigned : 1;
195 unsigned : 1;
196 unsigned : 1;
197 unsigned : 1;
198 unsigned RB4 : 1;
199 unsigned RB5 : 1;
200 unsigned RB6 : 1;
201 unsigned RB7 : 1;
202 } __PORTBbits_t;
203
204 extern __at(0x0006) volatile __PORTBbits_t PORTBbits;
205
206 #define _RB4 0x10
207 #define _RB5 0x20
208 #define _RB6 0x40
209 #define _RB7 0x80
210
211 //==============================================================================
212
213
214 //==============================================================================
215 // PORTC Bits
216
217 extern __at(0x0007) __sfr PORTC;
218
219 typedef struct
220 {
221 unsigned RC0 : 1;
222 unsigned RC1 : 1;
223 unsigned RC2 : 1;
224 unsigned RC3 : 1;
225 unsigned RC4 : 1;
226 unsigned RC5 : 1;
227 unsigned RC6 : 1;
228 unsigned RC7 : 1;
229 } __PORTCbits_t;
230
231 extern __at(0x0007) volatile __PORTCbits_t PORTCbits;
232
233 #define _RC0 0x01
234 #define _RC1 0x02
235 #define _RC2 0x04
236 #define _RC3 0x08
237 #define _RC4 0x10
238 #define _RC5 0x20
239 #define _RC6 0x40
240 #define _RC7 0x80
241
242 //==============================================================================
243
244 extern __at(0x000A) __sfr PCLATH;
245
246 //==============================================================================
247 // INTCON Bits
248
249 extern __at(0x000B) __sfr INTCON;
250
251 typedef struct
252 {
253 unsigned RABIF : 1;
254 unsigned INTF : 1;
255 unsigned TMR0IF : 1;
256 unsigned RABIE : 1;
257 unsigned INTE : 1;
258 unsigned TMR0IE : 1;
259 unsigned PEIE : 1;
260 unsigned GIE : 1;
261 } __INTCONbits_t;
262
263 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
264
265 #define _RABIF 0x01
266 #define _INTF 0x02
267 #define _TMR0IF 0x04
268 #define _RABIE 0x08
269 #define _INTE 0x10
270 #define _TMR0IE 0x20
271 #define _PEIE 0x40
272 #define _GIE 0x80
273
274 //==============================================================================
275
276
277 //==============================================================================
278 // PIR1 Bits
279
280 extern __at(0x000C) __sfr PIR1;
281
282 typedef struct
283 {
284 unsigned TMR1IF : 1;
285 unsigned TMR2IF : 1;
286 unsigned CCP1IF : 1;
287 unsigned SSPIF : 1;
288 unsigned TXIF : 1;
289 unsigned RCIF : 1;
290 unsigned ADIF : 1;
291 unsigned TMR1GIF : 1;
292 } __PIR1bits_t;
293
294 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
295
296 #define _TMR1IF 0x01
297 #define _TMR2IF 0x02
298 #define _CCP1IF 0x04
299 #define _SSPIF 0x08
300 #define _TXIF 0x10
301 #define _RCIF 0x20
302 #define _ADIF 0x40
303 #define _TMR1GIF 0x80
304
305 //==============================================================================
306
307 extern __at(0x000E) __sfr TMR1;
308 extern __at(0x000E) __sfr TMR1L;
309 extern __at(0x000F) __sfr TMR1H;
310
311 //==============================================================================
312 // T1CON Bits
313
314 extern __at(0x0010) __sfr T1CON;
315
316 typedef union
317 {
318 struct
319 {
320 unsigned TMR1ON : 1;
321 unsigned : 1;
322 unsigned T1SYNC : 1;
323 unsigned : 1;
324 unsigned T1CKPS0 : 1;
325 unsigned T1CKPS1 : 1;
326 unsigned TMR1CS0 : 1;
327 unsigned TMR1CS1 : 1;
328 };
329
330 struct
331 {
332 unsigned : 1;
333 unsigned : 1;
334 unsigned NOT_T1SYNC : 1;
335 unsigned : 1;
336 unsigned : 1;
337 unsigned : 1;
338 unsigned : 1;
339 unsigned : 1;
340 };
341
342 struct
343 {
344 unsigned : 4;
345 unsigned T1CKPS : 2;
346 unsigned : 2;
347 };
348
349 struct
350 {
351 unsigned : 6;
352 unsigned TMR1CS : 2;
353 };
354 } __T1CONbits_t;
355
356 extern __at(0x0010) volatile __T1CONbits_t T1CONbits;
357
358 #define _TMR1ON 0x01
359 #define _T1SYNC 0x04
360 #define _NOT_T1SYNC 0x04
361 #define _T1CKPS0 0x10
362 #define _T1CKPS1 0x20
363 #define _TMR1CS0 0x40
364 #define _TMR1CS1 0x80
365
366 //==============================================================================
367
368 extern __at(0x0011) __sfr TMR2;
369
370 //==============================================================================
371 // T2CON Bits
372
373 extern __at(0x0012) __sfr T2CON;
374
375 typedef union
376 {
377 struct
378 {
379 unsigned T2CKPS0 : 1;
380 unsigned T2CKPS1 : 1;
381 unsigned TMR2ON : 1;
382 unsigned TOUTPS0 : 1;
383 unsigned TOUTPS1 : 1;
384 unsigned TOUTPS2 : 1;
385 unsigned TOUTPS3 : 1;
386 unsigned : 1;
387 };
388
389 struct
390 {
391 unsigned T2CKPS : 2;
392 unsigned : 6;
393 };
394
395 struct
396 {
397 unsigned : 3;
398 unsigned TOUTPS : 4;
399 unsigned : 1;
400 };
401 } __T2CONbits_t;
402
403 extern __at(0x0012) volatile __T2CONbits_t T2CONbits;
404
405 #define _T2CKPS0 0x01
406 #define _T2CKPS1 0x02
407 #define _TMR2ON 0x04
408 #define _TOUTPS0 0x08
409 #define _TOUTPS1 0x10
410 #define _TOUTPS2 0x20
411 #define _TOUTPS3 0x40
412
413 //==============================================================================
414
415 extern __at(0x0013) __sfr SSPBUF;
416
417 //==============================================================================
418 // SSPCON Bits
419
420 extern __at(0x0014) __sfr SSPCON;
421
422 typedef union
423 {
424 struct
425 {
426 unsigned SSPM0 : 1;
427 unsigned SSPM1 : 1;
428 unsigned SSPM2 : 1;
429 unsigned SSPM3 : 1;
430 unsigned CKP : 1;
431 unsigned SSPEN : 1;
432 unsigned SSPOV : 1;
433 unsigned WCOL : 1;
434 };
435
436 struct
437 {
438 unsigned SSPM : 4;
439 unsigned : 4;
440 };
441 } __SSPCONbits_t;
442
443 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits;
444
445 #define _SSPM0 0x01
446 #define _SSPM1 0x02
447 #define _SSPM2 0x04
448 #define _SSPM3 0x08
449 #define _CKP 0x10
450 #define _SSPEN 0x20
451 #define _SSPOV 0x40
452 #define _WCOL 0x80
453
454 //==============================================================================
455
456 extern __at(0x0015) __sfr CCPR1;
457 extern __at(0x0015) __sfr CCPR1L;
458 extern __at(0x0016) __sfr CCPR1H;
459
460 //==============================================================================
461 // CCP1CON Bits
462
463 extern __at(0x0017) __sfr CCP1CON;
464
465 typedef union
466 {
467 struct
468 {
469 unsigned CCP1M0 : 1;
470 unsigned CCP1M1 : 1;
471 unsigned CCP1M2 : 1;
472 unsigned CCP1M3 : 1;
473 unsigned B1 : 1;
474 unsigned DC1 : 1;
475 unsigned : 1;
476 unsigned : 1;
477 };
478
479 struct
480 {
481 unsigned : 1;
482 unsigned : 1;
483 unsigned : 1;
484 unsigned : 1;
485 unsigned CCP1Y : 1;
486 unsigned CCP1X : 1;
487 unsigned : 1;
488 unsigned : 1;
489 };
490
491 struct
492 {
493 unsigned CCP1M : 4;
494 unsigned : 4;
495 };
496 } __CCP1CONbits_t;
497
498 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits;
499
500 #define _CCP1M0 0x01
501 #define _CCP1M1 0x02
502 #define _CCP1M2 0x04
503 #define _CCP1M3 0x08
504 #define _B1 0x10
505 #define _CCP1Y 0x10
506 #define _DC1 0x20
507 #define _CCP1X 0x20
508
509 //==============================================================================
510
511
512 //==============================================================================
513 // RCSTA Bits
514
515 extern __at(0x0018) __sfr RCSTA;
516
517 typedef struct
518 {
519 unsigned RX9D : 1;
520 unsigned OERR : 1;
521 unsigned FERR : 1;
522 unsigned ADDEN : 1;
523 unsigned CREN : 1;
524 unsigned SREN : 1;
525 unsigned RX9 : 1;
526 unsigned SPEN : 1;
527 } __RCSTAbits_t;
528
529 extern __at(0x0018) volatile __RCSTAbits_t RCSTAbits;
530
531 #define _RX9D 0x01
532 #define _OERR 0x02
533 #define _FERR 0x04
534 #define _ADDEN 0x08
535 #define _CREN 0x10
536 #define _SREN 0x20
537 #define _RX9 0x40
538 #define _SPEN 0x80
539
540 //==============================================================================
541
542 extern __at(0x0019) __sfr TXREG;
543 extern __at(0x001A) __sfr RCREG;
544 extern __at(0x001E) __sfr ADRES;
545
546 //==============================================================================
547 // ADCON0 Bits
548
549 extern __at(0x001F) __sfr ADCON0;
550
551 typedef union
552 {
553 struct
554 {
555 unsigned ADON : 1;
556 unsigned GO_NOT_DONE : 1;
557 unsigned CHS0 : 1;
558 unsigned CHS1 : 1;
559 unsigned CHS2 : 1;
560 unsigned CHS3 : 1;
561 unsigned : 1;
562 unsigned : 1;
563 };
564
565 struct
566 {
567 unsigned : 2;
568 unsigned CHS : 4;
569 unsigned : 2;
570 };
571 } __ADCON0bits_t;
572
573 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits;
574
575 #define _ADON 0x01
576 #define _GO_NOT_DONE 0x02
577 #define _CHS0 0x04
578 #define _CHS1 0x08
579 #define _CHS2 0x10
580 #define _CHS3 0x20
581
582 //==============================================================================
583
584
585 //==============================================================================
586 // OPTION_REG Bits
587
588 extern __at(0x0081) __sfr OPTION_REG;
589
590 typedef union
591 {
592 struct
593 {
594 unsigned PS0 : 1;
595 unsigned PS1 : 1;
596 unsigned PS2 : 1;
597 unsigned PSA : 1;
598 unsigned T0SE : 1;
599 unsigned T0CS : 1;
600 unsigned INTEDG : 1;
601 unsigned NOT_RABPU : 1;
602 };
603
604 struct
605 {
606 unsigned PS : 3;
607 unsigned : 5;
608 };
609 } __OPTION_REGbits_t;
610
611 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
612
613 #define _PS0 0x01
614 #define _PS1 0x02
615 #define _PS2 0x04
616 #define _PSA 0x08
617 #define _T0SE 0x10
618 #define _T0CS 0x20
619 #define _INTEDG 0x40
620 #define _NOT_RABPU 0x80
621
622 //==============================================================================
623
624
625 //==============================================================================
626 // TRISA Bits
627
628 extern __at(0x0085) __sfr TRISA;
629
630 typedef struct
631 {
632 unsigned TRISA0 : 1;
633 unsigned TRISA1 : 1;
634 unsigned TRISA2 : 1;
635 unsigned : 1;
636 unsigned TRISA4 : 1;
637 unsigned TRISA5 : 1;
638 unsigned : 1;
639 unsigned : 1;
640 } __TRISAbits_t;
641
642 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
643
644 #define _TRISA0 0x01
645 #define _TRISA1 0x02
646 #define _TRISA2 0x04
647 #define _TRISA4 0x10
648 #define _TRISA5 0x20
649
650 //==============================================================================
651
652
653 //==============================================================================
654 // TRISB Bits
655
656 extern __at(0x0086) __sfr TRISB;
657
658 typedef struct
659 {
660 unsigned : 1;
661 unsigned : 1;
662 unsigned : 1;
663 unsigned : 1;
664 unsigned TRISB4 : 1;
665 unsigned TRISB5 : 1;
666 unsigned TRISB6 : 1;
667 unsigned TRISB7 : 1;
668 } __TRISBbits_t;
669
670 extern __at(0x0086) volatile __TRISBbits_t TRISBbits;
671
672 #define _TRISB4 0x10
673 #define _TRISB5 0x20
674 #define _TRISB6 0x40
675 #define _TRISB7 0x80
676
677 //==============================================================================
678
679
680 //==============================================================================
681 // TRISC Bits
682
683 extern __at(0x0087) __sfr TRISC;
684
685 typedef struct
686 {
687 unsigned TRISC0 : 1;
688 unsigned TRISC1 : 1;
689 unsigned TRISC2 : 1;
690 unsigned TRISC3 : 1;
691 unsigned TRISC4 : 1;
692 unsigned TRISC5 : 1;
693 unsigned TRISC6 : 1;
694 unsigned TRISC7 : 1;
695 } __TRISCbits_t;
696
697 extern __at(0x0087) volatile __TRISCbits_t TRISCbits;
698
699 #define _TRISC0 0x01
700 #define _TRISC1 0x02
701 #define _TRISC2 0x04
702 #define _TRISC3 0x08
703 #define _TRISC4 0x10
704 #define _TRISC5 0x20
705 #define _TRISC6 0x40
706 #define _TRISC7 0x80
707
708 //==============================================================================
709
710
711 //==============================================================================
712 // PIE1 Bits
713
714 extern __at(0x008C) __sfr PIE1;
715
716 typedef struct
717 {
718 unsigned TMR1IE : 1;
719 unsigned TMR2IE : 1;
720 unsigned CCP1IE : 1;
721 unsigned SSPIE : 1;
722 unsigned TXIE : 1;
723 unsigned RCIE : 1;
724 unsigned ADIE : 1;
725 unsigned TMR1GIE : 1;
726 } __PIE1bits_t;
727
728 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
729
730 #define _TMR1IE 0x01
731 #define _TMR2IE 0x02
732 #define _CCP1IE 0x04
733 #define _SSPIE 0x08
734 #define _TXIE 0x10
735 #define _RCIE 0x20
736 #define _ADIE 0x40
737 #define _TMR1GIE 0x80
738
739 //==============================================================================
740
741
742 //==============================================================================
743 // PCON Bits
744
745 extern __at(0x008E) __sfr PCON;
746
747 typedef struct
748 {
749 unsigned NOT_BOR : 1;
750 unsigned NOT_POR : 1;
751 unsigned : 1;
752 unsigned : 1;
753 unsigned : 1;
754 unsigned : 1;
755 unsigned : 1;
756 unsigned : 1;
757 } __PCONbits_t;
758
759 extern __at(0x008E) volatile __PCONbits_t PCONbits;
760
761 #define _NOT_BOR 0x01
762 #define _NOT_POR 0x02
763
764 //==============================================================================
765
766
767 //==============================================================================
768 // T1GCON Bits
769
770 extern __at(0x008F) __sfr T1GCON;
771
772 typedef union
773 {
774 struct
775 {
776 unsigned T1GSS0 : 1;
777 unsigned T1GSS1 : 1;
778 unsigned T1GVAL : 1;
779 unsigned T1GGO_DONE : 1;
780 unsigned T1GSPM : 1;
781 unsigned T1GTM : 1;
782 unsigned T1GPOL : 1;
783 unsigned TMR1GE : 1;
784 };
785
786 struct
787 {
788 unsigned : 1;
789 unsigned : 1;
790 unsigned : 1;
791 unsigned T1GGO_NOT_DONE : 1;
792 unsigned : 1;
793 unsigned : 1;
794 unsigned : 1;
795 unsigned : 1;
796 };
797
798 struct
799 {
800 unsigned T1GSS : 2;
801 unsigned : 6;
802 };
803 } __T1GCONbits_t;
804
805 extern __at(0x008F) volatile __T1GCONbits_t T1GCONbits;
806
807 #define _T1GSS0 0x01
808 #define _T1GSS1 0x02
809 #define _T1GVAL 0x04
810 #define _T1GGO_DONE 0x08
811 #define _T1GGO_NOT_DONE 0x08
812 #define _T1GSPM 0x10
813 #define _T1GTM 0x20
814 #define _T1GPOL 0x40
815 #define _TMR1GE 0x80
816
817 //==============================================================================
818
819
820 //==============================================================================
821 // OSCCON Bits
822
823 extern __at(0x0090) __sfr OSCCON;
824
825 typedef union
826 {
827 struct
828 {
829 unsigned : 1;
830 unsigned : 1;
831 unsigned ICSS : 1;
832 unsigned ICSL : 1;
833 unsigned IRCF0 : 1;
834 unsigned IRCF1 : 1;
835 unsigned : 1;
836 unsigned : 1;
837 };
838
839 struct
840 {
841 unsigned : 4;
842 unsigned IRCF : 2;
843 unsigned : 2;
844 };
845 } __OSCCONbits_t;
846
847 extern __at(0x0090) volatile __OSCCONbits_t OSCCONbits;
848
849 #define _ICSS 0x04
850 #define _ICSL 0x08
851 #define _IRCF0 0x10
852 #define _IRCF1 0x20
853
854 //==============================================================================
855
856
857 //==============================================================================
858 // OSCTUNE Bits
859
860 extern __at(0x0091) __sfr OSCTUNE;
861
862 typedef union
863 {
864 struct
865 {
866 unsigned TUN0 : 1;
867 unsigned TUN1 : 1;
868 unsigned TUN2 : 1;
869 unsigned TUN3 : 1;
870 unsigned TUN4 : 1;
871 unsigned TUN5 : 1;
872 unsigned : 1;
873 unsigned : 1;
874 };
875
876 struct
877 {
878 unsigned TUN : 6;
879 unsigned : 2;
880 };
881 } __OSCTUNEbits_t;
882
883 extern __at(0x0091) volatile __OSCTUNEbits_t OSCTUNEbits;
884
885 #define _TUN0 0x01
886 #define _TUN1 0x02
887 #define _TUN2 0x04
888 #define _TUN3 0x08
889 #define _TUN4 0x10
890 #define _TUN5 0x20
891
892 //==============================================================================
893
894 extern __at(0x0092) __sfr PR2;
895
896 //==============================================================================
897 // SSPADD Bits
898
899 extern __at(0x0093) __sfr SSPADD;
900
901 typedef struct
902 {
903 unsigned ADD0 : 1;
904 unsigned ADD1 : 1;
905 unsigned ADD2 : 1;
906 unsigned ADD3 : 1;
907 unsigned ADD4 : 1;
908 unsigned ADD5 : 1;
909 unsigned ADD6 : 1;
910 unsigned ADD7 : 1;
911 } __SSPADDbits_t;
912
913 extern __at(0x0093) volatile __SSPADDbits_t SSPADDbits;
914
915 #define _ADD0 0x01
916 #define _ADD1 0x02
917 #define _ADD2 0x04
918 #define _ADD3 0x08
919 #define _ADD4 0x10
920 #define _ADD5 0x20
921 #define _ADD6 0x40
922 #define _ADD7 0x80
923
924 //==============================================================================
925
926
927 //==============================================================================
928 // SSPMSK Bits
929
930 extern __at(0x0093) __sfr SSPMSK;
931
932 typedef struct
933 {
934 unsigned MSK0 : 1;
935 unsigned MSK1 : 1;
936 unsigned MSK2 : 1;
937 unsigned MSK3 : 1;
938 unsigned MSK4 : 1;
939 unsigned MSK5 : 1;
940 unsigned MSK6 : 1;
941 unsigned MSK7 : 1;
942 } __SSPMSKbits_t;
943
944 extern __at(0x0093) volatile __SSPMSKbits_t SSPMSKbits;
945
946 #define _MSK0 0x01
947 #define _MSK1 0x02
948 #define _MSK2 0x04
949 #define _MSK3 0x08
950 #define _MSK4 0x10
951 #define _MSK5 0x20
952 #define _MSK6 0x40
953 #define _MSK7 0x80
954
955 //==============================================================================
956
957
958 //==============================================================================
959 // SSPSTAT Bits
960
961 extern __at(0x0094) __sfr SSPSTAT;
962
963 typedef struct
964 {
965 unsigned BF : 1;
966 unsigned UA : 1;
967 unsigned R_NOT_W : 1;
968 unsigned S : 1;
969 unsigned P : 1;
970 unsigned D_NOT_A : 1;
971 unsigned CKE : 1;
972 unsigned SMP : 1;
973 } __SSPSTATbits_t;
974
975 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits;
976
977 #define _BF 0x01
978 #define _UA 0x02
979 #define _R_NOT_W 0x04
980 #define _S 0x08
981 #define _P 0x10
982 #define _D_NOT_A 0x20
983 #define _CKE 0x40
984 #define _SMP 0x80
985
986 //==============================================================================
987
988
989 //==============================================================================
990 // WPUA Bits
991
992 extern __at(0x0095) __sfr WPUA;
993
994 typedef union
995 {
996 struct
997 {
998 unsigned WPUA0 : 1;
999 unsigned WPUA1 : 1;
1000 unsigned WPUA2 : 1;
1001 unsigned WPUA3 : 1;
1002 unsigned WPUA4 : 1;
1003 unsigned WPUA5 : 1;
1004 unsigned : 1;
1005 unsigned : 1;
1006 };
1007
1008 struct
1009 {
1010 unsigned WPUA : 6;
1011 unsigned : 2;
1012 };
1013 } __WPUAbits_t;
1014
1015 extern __at(0x0095) volatile __WPUAbits_t WPUAbits;
1016
1017 #define _WPUA0 0x01
1018 #define _WPUA1 0x02
1019 #define _WPUA2 0x04
1020 #define _WPUA3 0x08
1021 #define _WPUA4 0x10
1022 #define _WPUA5 0x20
1023
1024 //==============================================================================
1025
1026
1027 //==============================================================================
1028 // IOCA Bits
1029
1030 extern __at(0x0096) __sfr IOCA;
1031
1032 typedef union
1033 {
1034 struct
1035 {
1036 unsigned IOCA0 : 1;
1037 unsigned IOCA1 : 1;
1038 unsigned IOCA2 : 1;
1039 unsigned IOCA3 : 1;
1040 unsigned IOCA4 : 1;
1041 unsigned IOCA5 : 1;
1042 unsigned : 1;
1043 unsigned : 1;
1044 };
1045
1046 struct
1047 {
1048 unsigned IOCA : 6;
1049 unsigned : 2;
1050 };
1051 } __IOCAbits_t;
1052
1053 extern __at(0x0096) volatile __IOCAbits_t IOCAbits;
1054
1055 #define _IOCA0 0x01
1056 #define _IOCA1 0x02
1057 #define _IOCA2 0x04
1058 #define _IOCA3 0x08
1059 #define _IOCA4 0x10
1060 #define _IOCA5 0x20
1061
1062 //==============================================================================
1063
1064
1065 //==============================================================================
1066 // TXSTA Bits
1067
1068 extern __at(0x0098) __sfr TXSTA;
1069
1070 typedef struct
1071 {
1072 unsigned TX9D : 1;
1073 unsigned TRMT : 1;
1074 unsigned BRGH : 1;
1075 unsigned : 1;
1076 unsigned SYNC : 1;
1077 unsigned TXEN : 1;
1078 unsigned TX9 : 1;
1079 unsigned CSRC : 1;
1080 } __TXSTAbits_t;
1081
1082 extern __at(0x0098) volatile __TXSTAbits_t TXSTAbits;
1083
1084 #define _TX9D 0x01
1085 #define _TRMT 0x02
1086 #define _BRGH 0x04
1087 #define _SYNC 0x10
1088 #define _TXEN 0x20
1089 #define _TX9 0x40
1090 #define _CSRC 0x80
1091
1092 //==============================================================================
1093
1094 extern __at(0x0099) __sfr SPBRG;
1095
1096 //==============================================================================
1097 // FVRCON Bits
1098
1099 extern __at(0x009D) __sfr FVRCON;
1100
1101 typedef union
1102 {
1103 struct
1104 {
1105 unsigned ADFVR0 : 1;
1106 unsigned ADFVR1 : 1;
1107 unsigned : 1;
1108 unsigned : 1;
1109 unsigned TSRNG : 1;
1110 unsigned TSEN : 1;
1111 unsigned FVREN : 1;
1112 unsigned FVRRDY : 1;
1113 };
1114
1115 struct
1116 {
1117 unsigned ADFVR : 2;
1118 unsigned : 6;
1119 };
1120 } __FVRCONbits_t;
1121
1122 extern __at(0x009D) volatile __FVRCONbits_t FVRCONbits;
1123
1124 #define _ADFVR0 0x01
1125 #define _ADFVR1 0x02
1126 #define _TSRNG 0x10
1127 #define _TSEN 0x20
1128 #define _FVREN 0x40
1129 #define _FVRRDY 0x80
1130
1131 //==============================================================================
1132
1133
1134 //==============================================================================
1135 // ADCON1 Bits
1136
1137 extern __at(0x009F) __sfr ADCON1;
1138
1139 typedef union
1140 {
1141 struct
1142 {
1143 unsigned : 1;
1144 unsigned : 1;
1145 unsigned : 1;
1146 unsigned : 1;
1147 unsigned ADCS0 : 1;
1148 unsigned ADCS1 : 1;
1149 unsigned ADCS2 : 1;
1150 unsigned : 1;
1151 };
1152
1153 struct
1154 {
1155 unsigned : 4;
1156 unsigned ADCS : 3;
1157 unsigned : 1;
1158 };
1159 } __ADCON1bits_t;
1160
1161 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits;
1162
1163 #define _ADCS0 0x10
1164 #define _ADCS1 0x20
1165 #define _ADCS2 0x40
1166
1167 //==============================================================================
1168
1169 extern __at(0x010C) __sfr PMDATL;
1170 extern __at(0x010D) __sfr PMADRL;
1171 extern __at(0x010E) __sfr PMDATH;
1172 extern __at(0x010F) __sfr PMADRH;
1173
1174 //==============================================================================
1175 // WPUB Bits
1176
1177 extern __at(0x0115) __sfr WPUB;
1178
1179 typedef struct
1180 {
1181 unsigned : 1;
1182 unsigned : 1;
1183 unsigned : 1;
1184 unsigned : 1;
1185 unsigned WPUB4 : 1;
1186 unsigned WPUB5 : 1;
1187 unsigned WPUB6 : 1;
1188 unsigned WPUB7 : 1;
1189 } __WPUBbits_t;
1190
1191 extern __at(0x0115) volatile __WPUBbits_t WPUBbits;
1192
1193 #define _WPUB4 0x10
1194 #define _WPUB5 0x20
1195 #define _WPUB6 0x40
1196 #define _WPUB7 0x80
1197
1198 //==============================================================================
1199
1200
1201 //==============================================================================
1202 // IOCB Bits
1203
1204 extern __at(0x0116) __sfr IOCB;
1205
1206 typedef struct
1207 {
1208 unsigned : 1;
1209 unsigned : 1;
1210 unsigned : 1;
1211 unsigned : 1;
1212 unsigned IOCB4 : 1;
1213 unsigned IOCB5 : 1;
1214 unsigned IOCB6 : 1;
1215 unsigned IOCB7 : 1;
1216 } __IOCBbits_t;
1217
1218 extern __at(0x0116) volatile __IOCBbits_t IOCBbits;
1219
1220 #define _IOCB4 0x10
1221 #define _IOCB5 0x20
1222 #define _IOCB6 0x40
1223 #define _IOCB7 0x80
1224
1225 //==============================================================================
1226
1227
1228 //==============================================================================
1229 // ANSELA Bits
1230
1231 extern __at(0x0185) __sfr ANSELA;
1232
1233 typedef struct
1234 {
1235 unsigned ANSA0 : 1;
1236 unsigned ANSA1 : 1;
1237 unsigned ANSA2 : 1;
1238 unsigned : 1;
1239 unsigned ANSA4 : 1;
1240 unsigned ANSA5 : 1;
1241 unsigned : 1;
1242 unsigned : 1;
1243 } __ANSELAbits_t;
1244
1245 extern __at(0x0185) volatile __ANSELAbits_t ANSELAbits;
1246
1247 #define _ANSA0 0x01
1248 #define _ANSA1 0x02
1249 #define _ANSA2 0x04
1250 #define _ANSA4 0x10
1251 #define _ANSA5 0x20
1252
1253 //==============================================================================
1254
1255
1256 //==============================================================================
1257 // ANSELB Bits
1258
1259 extern __at(0x0186) __sfr ANSELB;
1260
1261 typedef struct
1262 {
1263 unsigned : 1;
1264 unsigned : 1;
1265 unsigned : 1;
1266 unsigned : 1;
1267 unsigned ANSB4 : 1;
1268 unsigned ANSB5 : 1;
1269 unsigned : 1;
1270 unsigned : 1;
1271 } __ANSELBbits_t;
1272
1273 extern __at(0x0186) volatile __ANSELBbits_t ANSELBbits;
1274
1275 #define _ANSB4 0x10
1276 #define _ANSB5 0x20
1277
1278 //==============================================================================
1279
1280
1281 //==============================================================================
1282 // ANSELC Bits
1283
1284 extern __at(0x0187) __sfr ANSELC;
1285
1286 typedef struct
1287 {
1288 unsigned ANSC0 : 1;
1289 unsigned ANSC1 : 1;
1290 unsigned ANSC2 : 1;
1291 unsigned ANSC3 : 1;
1292 unsigned : 1;
1293 unsigned : 1;
1294 unsigned ANSC6 : 1;
1295 unsigned ANSC7 : 1;
1296 } __ANSELCbits_t;
1297
1298 extern __at(0x0187) volatile __ANSELCbits_t ANSELCbits;
1299
1300 #define _ANSC0 0x01
1301 #define _ANSC1 0x02
1302 #define _ANSC2 0x04
1303 #define _ANSC3 0x08
1304 #define _ANSC6 0x40
1305 #define _ANSC7 0x80
1306
1307 //==============================================================================
1308
1309
1310 //==============================================================================
1311 // PMCON1 Bits
1312
1313 extern __at(0x018C) __sfr PMCON1;
1314
1315 typedef struct
1316 {
1317 unsigned RD : 1;
1318 unsigned WR : 1;
1319 unsigned WREN : 1;
1320 unsigned : 1;
1321 unsigned FREE : 1;
1322 unsigned LWLO : 1;
1323 unsigned CFGS : 1;
1324 unsigned : 1;
1325 } __PMCON1bits_t;
1326
1327 extern __at(0x018C) volatile __PMCON1bits_t PMCON1bits;
1328
1329 #define _RD 0x01
1330 #define _WR 0x02
1331 #define _WREN 0x04
1332 #define _FREE 0x10
1333 #define _LWLO 0x20
1334 #define _CFGS 0x40
1335
1336 //==============================================================================
1337
1338 extern __at(0x018D) __sfr PMCON2;
1339
1340 //==============================================================================
1341 //
1342 // Configuration Bits
1343 //
1344 //==============================================================================
1345
1346 #define _CONFIG1 0x2007
1347 #define _CONFIG2 0x2008
1348
1349 //----------------------------- CONFIG1 Options -------------------------------
1350
1351 #define _FOSC_INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/CLKO pin, I/O function on RA5/CLKI.
1352 #define _INTOSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA4/CLKO pin, I/O function on RA5/CLKI.
1353 #define _FOSC_INTOSCCLK 0x3FFD // INTOSC oscillator: CLKO function on RA4/CLKO pin, I/O function on RA5/CLKI.
1354 #define _INTOSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKO function on RA4/CLKO pin, I/O function on RA5/CLKI.
1355 #define _FOSC_ECIO 0x3FFE // EC oscillator: I/O function on RA4/CLKO pin, CLKI on RA5/CLKI.
1356 #define _EC_OSC_NOCLKOUT 0x3FFE // EC oscillator: I/O function on RA4/CLKO pin, CLKI on RA5/CLKI.
1357 #define _FOSC_ECCLK 0x3FFF // EC oscillator: CLKO function on RA4/CLKO pin, CLKI on RA5/CLKI.
1358 #define _EC_OSC_CLKOUT 0x3FFF // EC oscillator: CLKO function on RA4/CLKO pin, CLKI on RA5/CLKI.
1359 #define _WDTE_OFF 0x3FF7 // WDT disabled.
1360 #define _WDTEN_OFF 0x3FF7 // WDT disabled.
1361 #define _WDTE_ON 0x3FFF // WDT enabled.
1362 #define _WDTEN_ON 0x3FFF // WDT enabled.
1363 #define _PWRTE_ON 0x3FEF // PWRT enabled.
1364 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1365 #define _MCLRE_OFF 0x3FDF // RA3/MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up disabled.
1366 #define _MCLRE_ON 0x3FFF // RA3/MCLR/VPP pin function is MCLR; Weak pull-up enabled.
1367 #define _CP_ON 0x3FBF // 0000h to 07FFh code protection on.
1368 #define _CP_OFF 0x3FFF // Code protection off.
1369 #define _BOREN_OFF 0x3CFF // Brown-out Reset disabled (Preconditioned State).
1370 #define _BOREN_NSLEEP 0x3EFF // Brown-out Reset enabled during operation and disabled in Sleep.
1371 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
1372 #define _PLLEN_OFF 0x2FFF // INTOSC Frequency is 500 kHz.
1373 #define _PLLEN_ON 0x3FFF // INTOSC Frequency is 16 MHz (32x).
1374
1375 //----------------------------- CONFIG2 Options -------------------------------
1376
1377 #define _WRTEN_FULL 0x3FFC // 0h to FFFh of flash memory write protected, no address may be modified.
1378 #define _WRTEN_HALF 0x3FFD // 0h to 7FFh of flash memory write protected, 800h to FFFh may be modified.
1379 #define _WRTEN_BOOT 0x3FFE // 0h to 1FFh of flash memory write protected, 200h to FFFh may be modified.
1380 #define _WRTEN_OFF 0x3FFF // Write protection off.
1381
1382 //==============================================================================
1383
1384 #define _DEVID1 0x2006
1385
1386 #define _IDLOC0 0x2000
1387 #define _IDLOC1 0x2001
1388 #define _IDLOC2 0x2002
1389 #define _IDLOC3 0x2003
1390
1391 //==============================================================================
1392
1393 #ifndef NO_BIT_DEFINES
1394
1395 #define ADON ADCON0bits.ADON // bit 0
1396 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1
1397 #define CHS0 ADCON0bits.CHS0 // bit 2
1398 #define CHS1 ADCON0bits.CHS1 // bit 3
1399 #define CHS2 ADCON0bits.CHS2 // bit 4
1400 #define CHS3 ADCON0bits.CHS3 // bit 5
1401
1402 #define ADCS0 ADCON1bits.ADCS0 // bit 4
1403 #define ADCS1 ADCON1bits.ADCS1 // bit 5
1404 #define ADCS2 ADCON1bits.ADCS2 // bit 6
1405
1406 #define ANSA0 ANSELAbits.ANSA0 // bit 0
1407 #define ANSA1 ANSELAbits.ANSA1 // bit 1
1408 #define ANSA2 ANSELAbits.ANSA2 // bit 2
1409 #define ANSA4 ANSELAbits.ANSA4 // bit 4
1410 #define ANSA5 ANSELAbits.ANSA5 // bit 5
1411
1412 #define ANSB4 ANSELBbits.ANSB4 // bit 4
1413 #define ANSB5 ANSELBbits.ANSB5 // bit 5
1414
1415 #define ANSC0 ANSELCbits.ANSC0 // bit 0
1416 #define ANSC1 ANSELCbits.ANSC1 // bit 1
1417 #define ANSC2 ANSELCbits.ANSC2 // bit 2
1418 #define ANSC3 ANSELCbits.ANSC3 // bit 3
1419 #define ANSC6 ANSELCbits.ANSC6 // bit 6
1420 #define ANSC7 ANSELCbits.ANSC7 // bit 7
1421
1422 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1423 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1424 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1425 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1426 #define B1 CCP1CONbits.B1 // bit 4, shadows bit in CCP1CONbits
1427 #define CCP1Y CCP1CONbits.CCP1Y // bit 4, shadows bit in CCP1CONbits
1428 #define DC1 CCP1CONbits.DC1 // bit 5, shadows bit in CCP1CONbits
1429 #define CCP1X CCP1CONbits.CCP1X // bit 5, shadows bit in CCP1CONbits
1430
1431 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
1432 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
1433 #define TSRNG FVRCONbits.TSRNG // bit 4
1434 #define TSEN FVRCONbits.TSEN // bit 5
1435 #define FVREN FVRCONbits.FVREN // bit 6
1436 #define FVRRDY FVRCONbits.FVRRDY // bit 7
1437
1438 #define RABIF INTCONbits.RABIF // bit 0
1439 #define INTF INTCONbits.INTF // bit 1
1440 #define TMR0IF INTCONbits.TMR0IF // bit 2
1441 #define RABIE INTCONbits.RABIE // bit 3
1442 #define INTE INTCONbits.INTE // bit 4
1443 #define TMR0IE INTCONbits.TMR0IE // bit 5
1444 #define PEIE INTCONbits.PEIE // bit 6
1445 #define GIE INTCONbits.GIE // bit 7
1446
1447 #define IOCA0 IOCAbits.IOCA0 // bit 0
1448 #define IOCA1 IOCAbits.IOCA1 // bit 1
1449 #define IOCA2 IOCAbits.IOCA2 // bit 2
1450 #define IOCA3 IOCAbits.IOCA3 // bit 3
1451 #define IOCA4 IOCAbits.IOCA4 // bit 4
1452 #define IOCA5 IOCAbits.IOCA5 // bit 5
1453
1454 #define IOCB4 IOCBbits.IOCB4 // bit 4
1455 #define IOCB5 IOCBbits.IOCB5 // bit 5
1456 #define IOCB6 IOCBbits.IOCB6 // bit 6
1457 #define IOCB7 IOCBbits.IOCB7 // bit 7
1458
1459 #define PS0 OPTION_REGbits.PS0 // bit 0
1460 #define PS1 OPTION_REGbits.PS1 // bit 1
1461 #define PS2 OPTION_REGbits.PS2 // bit 2
1462 #define PSA OPTION_REGbits.PSA // bit 3
1463 #define T0SE OPTION_REGbits.T0SE // bit 4
1464 #define T0CS OPTION_REGbits.T0CS // bit 5
1465 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1466 #define NOT_RABPU OPTION_REGbits.NOT_RABPU // bit 7
1467
1468 #define ICSS OSCCONbits.ICSS // bit 2
1469 #define ICSL OSCCONbits.ICSL // bit 3
1470 #define IRCF0 OSCCONbits.IRCF0 // bit 4
1471 #define IRCF1 OSCCONbits.IRCF1 // bit 5
1472
1473 #define TUN0 OSCTUNEbits.TUN0 // bit 0
1474 #define TUN1 OSCTUNEbits.TUN1 // bit 1
1475 #define TUN2 OSCTUNEbits.TUN2 // bit 2
1476 #define TUN3 OSCTUNEbits.TUN3 // bit 3
1477 #define TUN4 OSCTUNEbits.TUN4 // bit 4
1478 #define TUN5 OSCTUNEbits.TUN5 // bit 5
1479
1480 #define NOT_BOR PCONbits.NOT_BOR // bit 0
1481 #define NOT_POR PCONbits.NOT_POR // bit 1
1482
1483 #define TMR1IE PIE1bits.TMR1IE // bit 0
1484 #define TMR2IE PIE1bits.TMR2IE // bit 1
1485 #define CCP1IE PIE1bits.CCP1IE // bit 2
1486 #define SSPIE PIE1bits.SSPIE // bit 3
1487 #define TXIE PIE1bits.TXIE // bit 4
1488 #define RCIE PIE1bits.RCIE // bit 5
1489 #define ADIE PIE1bits.ADIE // bit 6
1490 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
1491
1492 #define TMR1IF PIR1bits.TMR1IF // bit 0
1493 #define TMR2IF PIR1bits.TMR2IF // bit 1
1494 #define CCP1IF PIR1bits.CCP1IF // bit 2
1495 #define SSPIF PIR1bits.SSPIF // bit 3
1496 #define TXIF PIR1bits.TXIF // bit 4
1497 #define RCIF PIR1bits.RCIF // bit 5
1498 #define ADIF PIR1bits.ADIF // bit 6
1499 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
1500
1501 #define RD PMCON1bits.RD // bit 0
1502 #define WR PMCON1bits.WR // bit 1
1503 #define WREN PMCON1bits.WREN // bit 2
1504 #define FREE PMCON1bits.FREE // bit 4
1505 #define LWLO PMCON1bits.LWLO // bit 5
1506 #define CFGS PMCON1bits.CFGS // bit 6
1507
1508 #define RA0 PORTAbits.RA0 // bit 0
1509 #define RA1 PORTAbits.RA1 // bit 1
1510 #define RA2 PORTAbits.RA2 // bit 2
1511 #define RA3 PORTAbits.RA3 // bit 3
1512 #define RA4 PORTAbits.RA4 // bit 4
1513 #define RA5 PORTAbits.RA5 // bit 5
1514
1515 #define RB4 PORTBbits.RB4 // bit 4
1516 #define RB5 PORTBbits.RB5 // bit 5
1517 #define RB6 PORTBbits.RB6 // bit 6
1518 #define RB7 PORTBbits.RB7 // bit 7
1519
1520 #define RC0 PORTCbits.RC0 // bit 0
1521 #define RC1 PORTCbits.RC1 // bit 1
1522 #define RC2 PORTCbits.RC2 // bit 2
1523 #define RC3 PORTCbits.RC3 // bit 3
1524 #define RC4 PORTCbits.RC4 // bit 4
1525 #define RC5 PORTCbits.RC5 // bit 5
1526 #define RC6 PORTCbits.RC6 // bit 6
1527 #define RC7 PORTCbits.RC7 // bit 7
1528
1529 #define RX9D RCSTAbits.RX9D // bit 0
1530 #define OERR RCSTAbits.OERR // bit 1
1531 #define FERR RCSTAbits.FERR // bit 2
1532 #define ADDEN RCSTAbits.ADDEN // bit 3
1533 #define CREN RCSTAbits.CREN // bit 4
1534 #define SREN RCSTAbits.SREN // bit 5
1535 #define RX9 RCSTAbits.RX9 // bit 6
1536 #define SPEN RCSTAbits.SPEN // bit 7
1537
1538 #define ADD0 SSPADDbits.ADD0 // bit 0
1539 #define ADD1 SSPADDbits.ADD1 // bit 1
1540 #define ADD2 SSPADDbits.ADD2 // bit 2
1541 #define ADD3 SSPADDbits.ADD3 // bit 3
1542 #define ADD4 SSPADDbits.ADD4 // bit 4
1543 #define ADD5 SSPADDbits.ADD5 // bit 5
1544 #define ADD6 SSPADDbits.ADD6 // bit 6
1545 #define ADD7 SSPADDbits.ADD7 // bit 7
1546
1547 #define SSPM0 SSPCONbits.SSPM0 // bit 0
1548 #define SSPM1 SSPCONbits.SSPM1 // bit 1
1549 #define SSPM2 SSPCONbits.SSPM2 // bit 2
1550 #define SSPM3 SSPCONbits.SSPM3 // bit 3
1551 #define CKP SSPCONbits.CKP // bit 4
1552 #define SSPEN SSPCONbits.SSPEN // bit 5
1553 #define SSPOV SSPCONbits.SSPOV // bit 6
1554 #define WCOL SSPCONbits.WCOL // bit 7
1555
1556 #define MSK0 SSPMSKbits.MSK0 // bit 0
1557 #define MSK1 SSPMSKbits.MSK1 // bit 1
1558 #define MSK2 SSPMSKbits.MSK2 // bit 2
1559 #define MSK3 SSPMSKbits.MSK3 // bit 3
1560 #define MSK4 SSPMSKbits.MSK4 // bit 4
1561 #define MSK5 SSPMSKbits.MSK5 // bit 5
1562 #define MSK6 SSPMSKbits.MSK6 // bit 6
1563 #define MSK7 SSPMSKbits.MSK7 // bit 7
1564
1565 #define BF SSPSTATbits.BF // bit 0
1566 #define UA SSPSTATbits.UA // bit 1
1567 #define R_NOT_W SSPSTATbits.R_NOT_W // bit 2
1568 #define S SSPSTATbits.S // bit 3
1569 #define P SSPSTATbits.P // bit 4
1570 #define D_NOT_A SSPSTATbits.D_NOT_A // bit 5
1571 #define CKE SSPSTATbits.CKE // bit 6
1572 #define SMP SSPSTATbits.SMP // bit 7
1573
1574 #define C STATUSbits.C // bit 0
1575 #define DC STATUSbits.DC // bit 1
1576 #define Z STATUSbits.Z // bit 2
1577 #define NOT_PD STATUSbits.NOT_PD // bit 3
1578 #define NOT_TO STATUSbits.NOT_TO // bit 4
1579 #define RP0 STATUSbits.RP0 // bit 5
1580 #define RP1 STATUSbits.RP1 // bit 6
1581 #define IRP STATUSbits.IRP // bit 7
1582
1583 #define TMR1ON T1CONbits.TMR1ON // bit 0
1584 #define T1SYNC T1CONbits.T1SYNC // bit 2, shadows bit in T1CONbits
1585 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits
1586 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1587 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1588 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
1589 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
1590
1591 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
1592 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
1593 #define T1GVAL T1GCONbits.T1GVAL // bit 2
1594 #define T1GGO_DONE T1GCONbits.T1GGO_DONE // bit 3, shadows bit in T1GCONbits
1595 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
1596 #define T1GSPM T1GCONbits.T1GSPM // bit 4
1597 #define T1GTM T1GCONbits.T1GTM // bit 5
1598 #define T1GPOL T1GCONbits.T1GPOL // bit 6
1599 #define TMR1GE T1GCONbits.TMR1GE // bit 7
1600
1601 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1602 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1603 #define TMR2ON T2CONbits.TMR2ON // bit 2
1604 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1605 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1606 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1607 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1608
1609 #define TRISA0 TRISAbits.TRISA0 // bit 0
1610 #define TRISA1 TRISAbits.TRISA1 // bit 1
1611 #define TRISA2 TRISAbits.TRISA2 // bit 2
1612 #define TRISA4 TRISAbits.TRISA4 // bit 4
1613 #define TRISA5 TRISAbits.TRISA5 // bit 5
1614
1615 #define TRISB4 TRISBbits.TRISB4 // bit 4
1616 #define TRISB5 TRISBbits.TRISB5 // bit 5
1617 #define TRISB6 TRISBbits.TRISB6 // bit 6
1618 #define TRISB7 TRISBbits.TRISB7 // bit 7
1619
1620 #define TRISC0 TRISCbits.TRISC0 // bit 0
1621 #define TRISC1 TRISCbits.TRISC1 // bit 1
1622 #define TRISC2 TRISCbits.TRISC2 // bit 2
1623 #define TRISC3 TRISCbits.TRISC3 // bit 3
1624 #define TRISC4 TRISCbits.TRISC4 // bit 4
1625 #define TRISC5 TRISCbits.TRISC5 // bit 5
1626 #define TRISC6 TRISCbits.TRISC6 // bit 6
1627 #define TRISC7 TRISCbits.TRISC7 // bit 7
1628
1629 #define TX9D TXSTAbits.TX9D // bit 0
1630 #define TRMT TXSTAbits.TRMT // bit 1
1631 #define BRGH TXSTAbits.BRGH // bit 2
1632 #define SYNC TXSTAbits.SYNC // bit 4
1633 #define TXEN TXSTAbits.TXEN // bit 5
1634 #define TX9 TXSTAbits.TX9 // bit 6
1635 #define CSRC TXSTAbits.CSRC // bit 7
1636
1637 #define WPUA0 WPUAbits.WPUA0 // bit 0
1638 #define WPUA1 WPUAbits.WPUA1 // bit 1
1639 #define WPUA2 WPUAbits.WPUA2 // bit 2
1640 #define WPUA3 WPUAbits.WPUA3 // bit 3
1641 #define WPUA4 WPUAbits.WPUA4 // bit 4
1642 #define WPUA5 WPUAbits.WPUA5 // bit 5
1643
1644 #define WPUB4 WPUBbits.WPUB4 // bit 4
1645 #define WPUB5 WPUBbits.WPUB5 // bit 5
1646 #define WPUB6 WPUBbits.WPUB6 // bit 6
1647 #define WPUB7 WPUBbits.WPUB7 // bit 7
1648
1649 #endif // #ifndef NO_BIT_DEFINES
1650
1651 #endif // #ifndef __PIC16LF720_H__
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