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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16lf88.h
blobc702f0106c2c388e1965bb0111b5fcc0ed50b91d
1 /*
2 * This declarations of the PIC16LF88 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:56 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16LF88_H__
26 #define __PIC16LF88_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PCLATH_ADDR 0x000A
44 #define INTCON_ADDR 0x000B
45 #define PIR1_ADDR 0x000C
46 #define PIR2_ADDR 0x000D
47 #define TMR1_ADDR 0x000E
48 #define TMR1L_ADDR 0x000E
49 #define TMR1H_ADDR 0x000F
50 #define T1CON_ADDR 0x0010
51 #define TMR2_ADDR 0x0011
52 #define T2CON_ADDR 0x0012
53 #define SSPBUF_ADDR 0x0013
54 #define SSPCON_ADDR 0x0014
55 #define CCPR1_ADDR 0x0015
56 #define CCPR1L_ADDR 0x0015
57 #define CCPR1H_ADDR 0x0016
58 #define CCP1CON_ADDR 0x0017
59 #define RCSTA_ADDR 0x0018
60 #define TXREG_ADDR 0x0019
61 #define RCREG_ADDR 0x001A
62 #define ADRESH_ADDR 0x001E
63 #define ADCON0_ADDR 0x001F
64 #define OPTION_REG_ADDR 0x0081
65 #define TRISA_ADDR 0x0085
66 #define TRISB_ADDR 0x0086
67 #define PIE1_ADDR 0x008C
68 #define PIE2_ADDR 0x008D
69 #define PCON_ADDR 0x008E
70 #define OSCCON_ADDR 0x008F
71 #define OSCTUNE_ADDR 0x0090
72 #define PR2_ADDR 0x0092
73 #define SSPADD_ADDR 0x0093
74 #define SSPSTAT_ADDR 0x0094
75 #define TXSTA_ADDR 0x0098
76 #define SPBRG_ADDR 0x0099
77 #define ANSEL_ADDR 0x009B
78 #define CMCON_ADDR 0x009C
79 #define CVRCON_ADDR 0x009D
80 #define ADRESL_ADDR 0x009E
81 #define ADCON1_ADDR 0x009F
82 #define WDTCON_ADDR 0x0105
83 #define EEDATA_ADDR 0x010C
84 #define EEADR_ADDR 0x010D
85 #define EEDATH_ADDR 0x010E
86 #define EEADRH_ADDR 0x010F
87 #define EECON1_ADDR 0x018C
88 #define EECON2_ADDR 0x018D
89
90 #endif // #ifndef NO_ADDR_DEFINES
91
92 //==============================================================================
93 //
94 // Register Definitions
95 //
96 //==============================================================================
97
98 extern __at(0x0000) __sfr INDF;
99 extern __at(0x0001) __sfr TMR0;
100 extern __at(0x0002) __sfr PCL;
101
102 //==============================================================================
103 // STATUS Bits
104
105 extern __at(0x0003) __sfr STATUS;
106
107 typedef union
108 {
109 struct
110 {
111 unsigned C : 1;
112 unsigned DC : 1;
113 unsigned Z : 1;
114 unsigned NOT_PD : 1;
115 unsigned NOT_TO : 1;
116 unsigned RP0 : 1;
117 unsigned RP1 : 1;
118 unsigned IRP : 1;
119 };
120
121 struct
122 {
123 unsigned : 5;
124 unsigned RP : 2;
125 unsigned : 1;
126 };
127 } __STATUSbits_t;
128
129 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
130
131 #define _C 0x01
132 #define _DC 0x02
133 #define _Z 0x04
134 #define _NOT_PD 0x08
135 #define _NOT_TO 0x10
136 #define _RP0 0x20
137 #define _RP1 0x40
138 #define _IRP 0x80
139
140 //==============================================================================
141
142 extern __at(0x0004) __sfr FSR;
143
144 //==============================================================================
145 // PORTA Bits
146
147 extern __at(0x0005) __sfr PORTA;
148
149 typedef struct
150 {
151 unsigned RA0 : 1;
152 unsigned RA1 : 1;
153 unsigned RA2 : 1;
154 unsigned RA3 : 1;
155 unsigned RA4 : 1;
156 unsigned RA5 : 1;
157 unsigned RA6 : 1;
158 unsigned RA7 : 1;
159 } __PORTAbits_t;
160
161 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
162
163 #define _RA0 0x01
164 #define _RA1 0x02
165 #define _RA2 0x04
166 #define _RA3 0x08
167 #define _RA4 0x10
168 #define _RA5 0x20
169 #define _RA6 0x40
170 #define _RA7 0x80
171
172 //==============================================================================
173
174
175 //==============================================================================
176 // PORTB Bits
177
178 extern __at(0x0006) __sfr PORTB;
179
180 typedef struct
181 {
182 unsigned RB0 : 1;
183 unsigned RB1 : 1;
184 unsigned RB2 : 1;
185 unsigned RB3 : 1;
186 unsigned RB4 : 1;
187 unsigned RB5 : 1;
188 unsigned RB6 : 1;
189 unsigned RB7 : 1;
190 } __PORTBbits_t;
191
192 extern __at(0x0006) volatile __PORTBbits_t PORTBbits;
193
194 #define _RB0 0x01
195 #define _RB1 0x02
196 #define _RB2 0x04
197 #define _RB3 0x08
198 #define _RB4 0x10
199 #define _RB5 0x20
200 #define _RB6 0x40
201 #define _RB7 0x80
202
203 //==============================================================================
204
205 extern __at(0x000A) __sfr PCLATH;
206
207 //==============================================================================
208 // INTCON Bits
209
210 extern __at(0x000B) __sfr INTCON;
211
212 typedef union
213 {
214 struct
215 {
216 unsigned RBIF : 1;
217 unsigned INT0IF : 1;
218 unsigned TMR0IF : 1;
219 unsigned RBIE : 1;
220 unsigned INT0IE : 1;
221 unsigned TMR0IE : 1;
222 unsigned PEIE : 1;
223 unsigned GIE : 1;
224 };
225
226 struct
227 {
228 unsigned : 1;
229 unsigned INTF : 1;
230 unsigned : 1;
231 unsigned : 1;
232 unsigned INTE : 1;
233 unsigned : 1;
234 unsigned : 1;
235 unsigned : 1;
236 };
237 } __INTCONbits_t;
238
239 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
240
241 #define _RBIF 0x01
242 #define _INT0IF 0x02
243 #define _INTF 0x02
244 #define _TMR0IF 0x04
245 #define _RBIE 0x08
246 #define _INT0IE 0x10
247 #define _INTE 0x10
248 #define _TMR0IE 0x20
249 #define _PEIE 0x40
250 #define _GIE 0x80
251
252 //==============================================================================
253
254
255 //==============================================================================
256 // PIR1 Bits
257
258 extern __at(0x000C) __sfr PIR1;
259
260 typedef struct
261 {
262 unsigned TMR1IF : 1;
263 unsigned TMR2IF : 1;
264 unsigned CCP1IF : 1;
265 unsigned SSPIF : 1;
266 unsigned TXIF : 1;
267 unsigned RCIF : 1;
268 unsigned ADIF : 1;
269 unsigned : 1;
270 } __PIR1bits_t;
271
272 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
273
274 #define _TMR1IF 0x01
275 #define _TMR2IF 0x02
276 #define _CCP1IF 0x04
277 #define _SSPIF 0x08
278 #define _TXIF 0x10
279 #define _RCIF 0x20
280 #define _ADIF 0x40
281
282 //==============================================================================
283
284
285 //==============================================================================
286 // PIR2 Bits
287
288 extern __at(0x000D) __sfr PIR2;
289
290 typedef struct
291 {
292 unsigned : 1;
293 unsigned : 1;
294 unsigned : 1;
295 unsigned : 1;
296 unsigned EEIF : 1;
297 unsigned : 1;
298 unsigned CMIF : 1;
299 unsigned OSFIF : 1;
300 } __PIR2bits_t;
301
302 extern __at(0x000D) volatile __PIR2bits_t PIR2bits;
303
304 #define _EEIF 0x10
305 #define _CMIF 0x40
306 #define _OSFIF 0x80
307
308 //==============================================================================
309
310 extern __at(0x000E) __sfr TMR1;
311 extern __at(0x000E) __sfr TMR1L;
312 extern __at(0x000F) __sfr TMR1H;
313
314 //==============================================================================
315 // T1CON Bits
316
317 extern __at(0x0010) __sfr T1CON;
318
319 typedef union
320 {
321 struct
322 {
323 unsigned TMR1ON : 1;
324 unsigned TMR1CS : 1;
325 unsigned NOT_T1SYNC : 1;
326 unsigned T1OSCEN : 1;
327 unsigned T1CKPS0 : 1;
328 unsigned T1CKPS1 : 1;
329 unsigned T1RUN : 1;
330 unsigned : 1;
331 };
332
333 struct
334 {
335 unsigned : 1;
336 unsigned : 1;
337 unsigned T1INSYNC : 1;
338 unsigned : 1;
339 unsigned : 1;
340 unsigned : 1;
341 unsigned : 1;
342 unsigned : 1;
343 };
344
345 struct
346 {
347 unsigned : 4;
348 unsigned T1CKPS : 2;
349 unsigned : 2;
350 };
351 } __T1CONbits_t;
352
353 extern __at(0x0010) volatile __T1CONbits_t T1CONbits;
354
355 #define _TMR1ON 0x01
356 #define _TMR1CS 0x02
357 #define _NOT_T1SYNC 0x04
358 #define _T1INSYNC 0x04
359 #define _T1OSCEN 0x08
360 #define _T1CKPS0 0x10
361 #define _T1CKPS1 0x20
362 #define _T1RUN 0x40
363
364 //==============================================================================
365
366 extern __at(0x0011) __sfr TMR2;
367
368 //==============================================================================
369 // T2CON Bits
370
371 extern __at(0x0012) __sfr T2CON;
372
373 typedef union
374 {
375 struct
376 {
377 unsigned T2CKPS0 : 1;
378 unsigned T2CKPS1 : 1;
379 unsigned TMR2ON : 1;
380 unsigned TOUTPS0 : 1;
381 unsigned TOUTPS1 : 1;
382 unsigned TOUTPS2 : 1;
383 unsigned TOUTPS3 : 1;
384 unsigned : 1;
385 };
386
387 struct
388 {
389 unsigned T2CKPS : 2;
390 unsigned : 6;
391 };
392
393 struct
394 {
395 unsigned : 3;
396 unsigned TOUTPS : 4;
397 unsigned : 1;
398 };
399 } __T2CONbits_t;
400
401 extern __at(0x0012) volatile __T2CONbits_t T2CONbits;
402
403 #define _T2CKPS0 0x01
404 #define _T2CKPS1 0x02
405 #define _TMR2ON 0x04
406 #define _TOUTPS0 0x08
407 #define _TOUTPS1 0x10
408 #define _TOUTPS2 0x20
409 #define _TOUTPS3 0x40
410
411 //==============================================================================
412
413 extern __at(0x0013) __sfr SSPBUF;
414
415 //==============================================================================
416 // SSPCON Bits
417
418 extern __at(0x0014) __sfr SSPCON;
419
420 typedef union
421 {
422 struct
423 {
424 unsigned SSPM0 : 1;
425 unsigned SSPM1 : 1;
426 unsigned SSPM2 : 1;
427 unsigned SSPM3 : 1;
428 unsigned CKP : 1;
429 unsigned SSPEN : 1;
430 unsigned SSPOV : 1;
431 unsigned WCOL : 1;
432 };
433
434 struct
435 {
436 unsigned SSPM : 4;
437 unsigned : 4;
438 };
439 } __SSPCONbits_t;
440
441 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits;
442
443 #define _SSPM0 0x01
444 #define _SSPM1 0x02
445 #define _SSPM2 0x04
446 #define _SSPM3 0x08
447 #define _CKP 0x10
448 #define _SSPEN 0x20
449 #define _SSPOV 0x40
450 #define _WCOL 0x80
451
452 //==============================================================================
453
454 extern __at(0x0015) __sfr CCPR1;
455 extern __at(0x0015) __sfr CCPR1L;
456 extern __at(0x0016) __sfr CCPR1H;
457
458 //==============================================================================
459 // CCP1CON Bits
460
461 extern __at(0x0017) __sfr CCP1CON;
462
463 typedef union
464 {
465 struct
466 {
467 unsigned CCP1M0 : 1;
468 unsigned CCP1M1 : 1;
469 unsigned CCP1M2 : 1;
470 unsigned CCP1M3 : 1;
471 unsigned CCP1Y : 1;
472 unsigned CCP1X : 1;
473 unsigned : 1;
474 unsigned : 1;
475 };
476
477 struct
478 {
479 unsigned CCP1M : 4;
480 unsigned : 4;
481 };
482 } __CCP1CONbits_t;
483
484 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits;
485
486 #define _CCP1M0 0x01
487 #define _CCP1M1 0x02
488 #define _CCP1M2 0x04
489 #define _CCP1M3 0x08
490 #define _CCP1Y 0x10
491 #define _CCP1X 0x20
492
493 //==============================================================================
494
495
496 //==============================================================================
497 // RCSTA Bits
498
499 extern __at(0x0018) __sfr RCSTA;
500
501 typedef union
502 {
503 struct
504 {
505 unsigned RX9D : 1;
506 unsigned OERR : 1;
507 unsigned FERR : 1;
508 unsigned ADDEN : 1;
509 unsigned CREN : 1;
510 unsigned SREN : 1;
511 unsigned RX9 : 1;
512 unsigned SPEN : 1;
513 };
514
515 struct
516 {
517 unsigned RCD8 : 1;
518 unsigned : 1;
519 unsigned : 1;
520 unsigned : 1;
521 unsigned : 1;
522 unsigned : 1;
523 unsigned RC9 : 1;
524 unsigned : 1;
525 };
526
527 struct
528 {
529 unsigned : 1;
530 unsigned : 1;
531 unsigned : 1;
532 unsigned : 1;
533 unsigned : 1;
534 unsigned : 1;
535 unsigned NOT_RC8 : 1;
536 unsigned : 1;
537 };
538
539 struct
540 {
541 unsigned : 1;
542 unsigned : 1;
543 unsigned : 1;
544 unsigned : 1;
545 unsigned : 1;
546 unsigned : 1;
547 unsigned RC8_9 : 1;
548 unsigned : 1;
549 };
550 } __RCSTAbits_t;
551
552 extern __at(0x0018) volatile __RCSTAbits_t RCSTAbits;
553
554 #define _RX9D 0x01
555 #define _RCD8 0x01
556 #define _OERR 0x02
557 #define _FERR 0x04
558 #define _ADDEN 0x08
559 #define _CREN 0x10
560 #define _SREN 0x20
561 #define _RX9 0x40
562 #define _RC9 0x40
563 #define _NOT_RC8 0x40
564 #define _RC8_9 0x40
565 #define _SPEN 0x80
566
567 //==============================================================================
568
569 extern __at(0x0019) __sfr TXREG;
570 extern __at(0x001A) __sfr RCREG;
571 extern __at(0x001E) __sfr ADRESH;
572
573 //==============================================================================
574 // ADCON0 Bits
575
576 extern __at(0x001F) __sfr ADCON0;
577
578 typedef union
579 {
580 struct
581 {
582 unsigned ADON : 1;
583 unsigned : 1;
584 unsigned GO_NOT_DONE : 1;
585 unsigned CHS0 : 1;
586 unsigned CHS1 : 1;
587 unsigned CHS2 : 1;
588 unsigned ADCS0 : 1;
589 unsigned ADCS1 : 1;
590 };
591
592 struct
593 {
594 unsigned : 1;
595 unsigned : 1;
596 unsigned GO : 1;
597 unsigned : 1;
598 unsigned : 1;
599 unsigned : 1;
600 unsigned : 1;
601 unsigned : 1;
602 };
603
604 struct
605 {
606 unsigned : 1;
607 unsigned : 1;
608 unsigned NOT_DONE : 1;
609 unsigned : 1;
610 unsigned : 1;
611 unsigned : 1;
612 unsigned : 1;
613 unsigned : 1;
614 };
615
616 struct
617 {
618 unsigned : 1;
619 unsigned : 1;
620 unsigned GO_DONE : 1;
621 unsigned : 1;
622 unsigned : 1;
623 unsigned : 1;
624 unsigned : 1;
625 unsigned : 1;
626 };
627
628 struct
629 {
630 unsigned : 3;
631 unsigned CHS : 3;
632 unsigned : 2;
633 };
634
635 struct
636 {
637 unsigned : 6;
638 unsigned ADCS : 2;
639 };
640 } __ADCON0bits_t;
641
642 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits;
643
644 #define _ADON 0x01
645 #define _GO_NOT_DONE 0x04
646 #define _GO 0x04
647 #define _NOT_DONE 0x04
648 #define _GO_DONE 0x04
649 #define _CHS0 0x08
650 #define _CHS1 0x10
651 #define _CHS2 0x20
652 #define _ADCS0 0x40
653 #define _ADCS1 0x80
654
655 //==============================================================================
656
657
658 //==============================================================================
659 // OPTION_REG Bits
660
661 extern __at(0x0081) __sfr OPTION_REG;
662
663 typedef union
664 {
665 struct
666 {
667 unsigned PS0 : 1;
668 unsigned PS1 : 1;
669 unsigned PS2 : 1;
670 unsigned PSA : 1;
671 unsigned T0SE : 1;
672 unsigned T0CS : 1;
673 unsigned INTEDG : 1;
674 unsigned NOT_RBPU : 1;
675 };
676
677 struct
678 {
679 unsigned PS : 3;
680 unsigned : 5;
681 };
682 } __OPTION_REGbits_t;
683
684 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
685
686 #define _PS0 0x01
687 #define _PS1 0x02
688 #define _PS2 0x04
689 #define _PSA 0x08
690 #define _T0SE 0x10
691 #define _T0CS 0x20
692 #define _INTEDG 0x40
693 #define _NOT_RBPU 0x80
694
695 //==============================================================================
696
697
698 //==============================================================================
699 // TRISA Bits
700
701 extern __at(0x0085) __sfr TRISA;
702
703 typedef struct
704 {
705 unsigned TRISA0 : 1;
706 unsigned TRISA1 : 1;
707 unsigned TRISA2 : 1;
708 unsigned TRISA3 : 1;
709 unsigned TRISA4 : 1;
710 unsigned TRISA5 : 1;
711 unsigned TRISA6 : 1;
712 unsigned TRISA7 : 1;
713 } __TRISAbits_t;
714
715 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
716
717 #define _TRISA0 0x01
718 #define _TRISA1 0x02
719 #define _TRISA2 0x04
720 #define _TRISA3 0x08
721 #define _TRISA4 0x10
722 #define _TRISA5 0x20
723 #define _TRISA6 0x40
724 #define _TRISA7 0x80
725
726 //==============================================================================
727
728
729 //==============================================================================
730 // TRISB Bits
731
732 extern __at(0x0086) __sfr TRISB;
733
734 typedef struct
735 {
736 unsigned TRISB0 : 1;
737 unsigned TRISB1 : 1;
738 unsigned TRISB2 : 1;
739 unsigned TRISB3 : 1;
740 unsigned TRISB4 : 1;
741 unsigned TRISB5 : 1;
742 unsigned TRISB6 : 1;
743 unsigned TRISB7 : 1;
744 } __TRISBbits_t;
745
746 extern __at(0x0086) volatile __TRISBbits_t TRISBbits;
747
748 #define _TRISB0 0x01
749 #define _TRISB1 0x02
750 #define _TRISB2 0x04
751 #define _TRISB3 0x08
752 #define _TRISB4 0x10
753 #define _TRISB5 0x20
754 #define _TRISB6 0x40
755 #define _TRISB7 0x80
756
757 //==============================================================================
758
759
760 //==============================================================================
761 // PIE1 Bits
762
763 extern __at(0x008C) __sfr PIE1;
764
765 typedef struct
766 {
767 unsigned TMR1IE : 1;
768 unsigned TMR2IE : 1;
769 unsigned CCP1IE : 1;
770 unsigned SSPIE : 1;
771 unsigned TXIE : 1;
772 unsigned RCIE : 1;
773 unsigned ADIE : 1;
774 unsigned : 1;
775 } __PIE1bits_t;
776
777 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
778
779 #define _TMR1IE 0x01
780 #define _TMR2IE 0x02
781 #define _CCP1IE 0x04
782 #define _SSPIE 0x08
783 #define _TXIE 0x10
784 #define _RCIE 0x20
785 #define _ADIE 0x40
786
787 //==============================================================================
788
789
790 //==============================================================================
791 // PIE2 Bits
792
793 extern __at(0x008D) __sfr PIE2;
794
795 typedef struct
796 {
797 unsigned : 1;
798 unsigned : 1;
799 unsigned : 1;
800 unsigned : 1;
801 unsigned EEIE : 1;
802 unsigned : 1;
803 unsigned CMIE : 1;
804 unsigned OSFIE : 1;
805 } __PIE2bits_t;
806
807 extern __at(0x008D) volatile __PIE2bits_t PIE2bits;
808
809 #define _EEIE 0x10
810 #define _CMIE 0x40
811 #define _OSFIE 0x80
812
813 //==============================================================================
814
815
816 //==============================================================================
817 // PCON Bits
818
819 extern __at(0x008E) __sfr PCON;
820
821 typedef union
822 {
823 struct
824 {
825 unsigned NOT_BOR : 1;
826 unsigned NOT_POR : 1;
827 unsigned : 1;
828 unsigned : 1;
829 unsigned : 1;
830 unsigned : 1;
831 unsigned : 1;
832 unsigned : 1;
833 };
834
835 struct
836 {
837 unsigned NOT_BO : 1;
838 unsigned : 1;
839 unsigned : 1;
840 unsigned : 1;
841 unsigned : 1;
842 unsigned : 1;
843 unsigned : 1;
844 unsigned : 1;
845 };
846 } __PCONbits_t;
847
848 extern __at(0x008E) volatile __PCONbits_t PCONbits;
849
850 #define _NOT_BOR 0x01
851 #define _NOT_BO 0x01
852 #define _NOT_POR 0x02
853
854 //==============================================================================
855
856
857 //==============================================================================
858 // OSCCON Bits
859
860 extern __at(0x008F) __sfr OSCCON;
861
862 typedef union
863 {
864 struct
865 {
866 unsigned SCS0 : 1;
867 unsigned SCS1 : 1;
868 unsigned IOFS : 1;
869 unsigned OSTS : 1;
870 unsigned IRCF0 : 1;
871 unsigned IRCF1 : 1;
872 unsigned IRCF2 : 1;
873 unsigned : 1;
874 };
875
876 struct
877 {
878 unsigned SCS : 2;
879 unsigned : 6;
880 };
881
882 struct
883 {
884 unsigned : 4;
885 unsigned IRCF : 3;
886 unsigned : 1;
887 };
888 } __OSCCONbits_t;
889
890 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits;
891
892 #define _SCS0 0x01
893 #define _SCS1 0x02
894 #define _IOFS 0x04
895 #define _OSTS 0x08
896 #define _IRCF0 0x10
897 #define _IRCF1 0x20
898 #define _IRCF2 0x40
899
900 //==============================================================================
901
902
903 //==============================================================================
904 // OSCTUNE Bits
905
906 extern __at(0x0090) __sfr OSCTUNE;
907
908 typedef union
909 {
910 struct
911 {
912 unsigned TUN0 : 1;
913 unsigned TUN1 : 1;
914 unsigned TUN2 : 1;
915 unsigned TUN3 : 1;
916 unsigned TUN4 : 1;
917 unsigned TUN5 : 1;
918 unsigned : 1;
919 unsigned : 1;
920 };
921
922 struct
923 {
924 unsigned TUN : 6;
925 unsigned : 2;
926 };
927 } __OSCTUNEbits_t;
928
929 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits;
930
931 #define _TUN0 0x01
932 #define _TUN1 0x02
933 #define _TUN2 0x04
934 #define _TUN3 0x08
935 #define _TUN4 0x10
936 #define _TUN5 0x20
937
938 //==============================================================================
939
940 extern __at(0x0092) __sfr PR2;
941 extern __at(0x0093) __sfr SSPADD;
942
943 //==============================================================================
944 // SSPSTAT Bits
945
946 extern __at(0x0094) __sfr SSPSTAT;
947
948 typedef union
949 {
950 struct
951 {
952 unsigned BF : 1;
953 unsigned UA : 1;
954 unsigned R_NOT_W : 1;
955 unsigned S : 1;
956 unsigned P : 1;
957 unsigned D_NOT_A : 1;
958 unsigned CKE : 1;
959 unsigned SMP : 1;
960 };
961
962 struct
963 {
964 unsigned : 1;
965 unsigned : 1;
966 unsigned R : 1;
967 unsigned I2C_START : 1;
968 unsigned I2C_STOP : 1;
969 unsigned D : 1;
970 unsigned : 1;
971 unsigned : 1;
972 };
973
974 struct
975 {
976 unsigned : 1;
977 unsigned : 1;
978 unsigned I2C_READ : 1;
979 unsigned : 1;
980 unsigned : 1;
981 unsigned I2C_DATA : 1;
982 unsigned : 1;
983 unsigned : 1;
984 };
985
986 struct
987 {
988 unsigned : 1;
989 unsigned : 1;
990 unsigned NOT_W : 1;
991 unsigned : 1;
992 unsigned : 1;
993 unsigned NOT_A : 1;
994 unsigned : 1;
995 unsigned : 1;
996 };
997
998 struct
999 {
1000 unsigned : 1;
1001 unsigned : 1;
1002 unsigned NOT_WRITE : 1;
1003 unsigned : 1;
1004 unsigned : 1;
1005 unsigned NOT_ADDRESS : 1;
1006 unsigned : 1;
1007 unsigned : 1;
1008 };
1009
1010 struct
1011 {
1012 unsigned : 1;
1013 unsigned : 1;
1014 unsigned R_W : 1;
1015 unsigned : 1;
1016 unsigned : 1;
1017 unsigned D_A : 1;
1018 unsigned : 1;
1019 unsigned : 1;
1020 };
1021
1022 struct
1023 {
1024 unsigned : 1;
1025 unsigned : 1;
1026 unsigned READ_WRITE : 1;
1027 unsigned : 1;
1028 unsigned : 1;
1029 unsigned DATA_ADDRESS : 1;
1030 unsigned : 1;
1031 unsigned : 1;
1032 };
1033 } __SSPSTATbits_t;
1034
1035 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits;
1036
1037 #define _BF 0x01
1038 #define _UA 0x02
1039 #define _R_NOT_W 0x04
1040 #define _R 0x04
1041 #define _I2C_READ 0x04
1042 #define _NOT_W 0x04
1043 #define _NOT_WRITE 0x04
1044 #define _R_W 0x04
1045 #define _READ_WRITE 0x04
1046 #define _S 0x08
1047 #define _I2C_START 0x08
1048 #define _P 0x10
1049 #define _I2C_STOP 0x10
1050 #define _D_NOT_A 0x20
1051 #define _D 0x20
1052 #define _I2C_DATA 0x20
1053 #define _NOT_A 0x20
1054 #define _NOT_ADDRESS 0x20
1055 #define _D_A 0x20
1056 #define _DATA_ADDRESS 0x20
1057 #define _CKE 0x40
1058 #define _SMP 0x80
1059
1060 //==============================================================================
1061
1062
1063 //==============================================================================
1064 // TXSTA Bits
1065
1066 extern __at(0x0098) __sfr TXSTA;
1067
1068 typedef union
1069 {
1070 struct
1071 {
1072 unsigned TX9D : 1;
1073 unsigned TRMT : 1;
1074 unsigned BRGH : 1;
1075 unsigned : 1;
1076 unsigned SYNC : 1;
1077 unsigned TXEN : 1;
1078 unsigned TX9 : 1;
1079 unsigned CSRC : 1;
1080 };
1081
1082 struct
1083 {
1084 unsigned TXD8 : 1;
1085 unsigned : 1;
1086 unsigned : 1;
1087 unsigned : 1;
1088 unsigned : 1;
1089 unsigned : 1;
1090 unsigned NOT_TX8 : 1;
1091 unsigned : 1;
1092 };
1093
1094 struct
1095 {
1096 unsigned : 1;
1097 unsigned : 1;
1098 unsigned : 1;
1099 unsigned : 1;
1100 unsigned : 1;
1101 unsigned : 1;
1102 unsigned TX8_9 : 1;
1103 unsigned : 1;
1104 };
1105 } __TXSTAbits_t;
1106
1107 extern __at(0x0098) volatile __TXSTAbits_t TXSTAbits;
1108
1109 #define _TX9D 0x01
1110 #define _TXD8 0x01
1111 #define _TRMT 0x02
1112 #define _BRGH 0x04
1113 #define _SYNC 0x10
1114 #define _TXEN 0x20
1115 #define _TX9 0x40
1116 #define _NOT_TX8 0x40
1117 #define _TX8_9 0x40
1118 #define _CSRC 0x80
1119
1120 //==============================================================================
1121
1122 extern __at(0x0099) __sfr SPBRG;
1123
1124 //==============================================================================
1125 // ANSEL Bits
1126
1127 extern __at(0x009B) __sfr ANSEL;
1128
1129 typedef union
1130 {
1131 struct
1132 {
1133 unsigned ANS0 : 1;
1134 unsigned ANS1 : 1;
1135 unsigned ANS2 : 1;
1136 unsigned ANS3 : 1;
1137 unsigned ANS4 : 1;
1138 unsigned ANS5 : 1;
1139 unsigned ANS6 : 1;
1140 unsigned : 1;
1141 };
1142
1143 struct
1144 {
1145 unsigned ANS : 7;
1146 unsigned : 1;
1147 };
1148 } __ANSELbits_t;
1149
1150 extern __at(0x009B) volatile __ANSELbits_t ANSELbits;
1151
1152 #define _ANS0 0x01
1153 #define _ANS1 0x02
1154 #define _ANS2 0x04
1155 #define _ANS3 0x08
1156 #define _ANS4 0x10
1157 #define _ANS5 0x20
1158 #define _ANS6 0x40
1159
1160 //==============================================================================
1161
1162
1163 //==============================================================================
1164 // CMCON Bits
1165
1166 extern __at(0x009C) __sfr CMCON;
1167
1168 typedef union
1169 {
1170 struct
1171 {
1172 unsigned CM0 : 1;
1173 unsigned CM1 : 1;
1174 unsigned CM2 : 1;
1175 unsigned CIS : 1;
1176 unsigned C1INV : 1;
1177 unsigned C2INV : 1;
1178 unsigned C1OUT : 1;
1179 unsigned C2OUT : 1;
1180 };
1181
1182 struct
1183 {
1184 unsigned CM : 3;
1185 unsigned : 5;
1186 };
1187 } __CMCONbits_t;
1188
1189 extern __at(0x009C) volatile __CMCONbits_t CMCONbits;
1190
1191 #define _CM0 0x01
1192 #define _CM1 0x02
1193 #define _CM2 0x04
1194 #define _CIS 0x08
1195 #define _C1INV 0x10
1196 #define _C2INV 0x20
1197 #define _C1OUT 0x40
1198 #define _C2OUT 0x80
1199
1200 //==============================================================================
1201
1202
1203 //==============================================================================
1204 // CVRCON Bits
1205
1206 extern __at(0x009D) __sfr CVRCON;
1207
1208 typedef union
1209 {
1210 struct
1211 {
1212 unsigned CVR0 : 1;
1213 unsigned CVR1 : 1;
1214 unsigned CVR2 : 1;
1215 unsigned CVR3 : 1;
1216 unsigned : 1;
1217 unsigned CVRR : 1;
1218 unsigned CVROE : 1;
1219 unsigned CVREN : 1;
1220 };
1221
1222 struct
1223 {
1224 unsigned CVR : 4;
1225 unsigned : 4;
1226 };
1227 } __CVRCONbits_t;
1228
1229 extern __at(0x009D) volatile __CVRCONbits_t CVRCONbits;
1230
1231 #define _CVR0 0x01
1232 #define _CVR1 0x02
1233 #define _CVR2 0x04
1234 #define _CVR3 0x08
1235 #define _CVRR 0x20
1236 #define _CVROE 0x40
1237 #define _CVREN 0x80
1238
1239 //==============================================================================
1240
1241 extern __at(0x009E) __sfr ADRESL;
1242
1243 //==============================================================================
1244 // ADCON1 Bits
1245
1246 extern __at(0x009F) __sfr ADCON1;
1247
1248 typedef union
1249 {
1250 struct
1251 {
1252 unsigned : 1;
1253 unsigned : 1;
1254 unsigned : 1;
1255 unsigned : 1;
1256 unsigned VCFG0 : 1;
1257 unsigned VCFG1 : 1;
1258 unsigned ADCS2 : 1;
1259 unsigned ADFM : 1;
1260 };
1261
1262 struct
1263 {
1264 unsigned : 4;
1265 unsigned VCFG : 2;
1266 unsigned : 2;
1267 };
1268 } __ADCON1bits_t;
1269
1270 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits;
1271
1272 #define _VCFG0 0x10
1273 #define _VCFG1 0x20
1274 #define _ADCS2 0x40
1275 #define _ADFM 0x80
1276
1277 //==============================================================================
1278
1279
1280 //==============================================================================
1281 // WDTCON Bits
1282
1283 extern __at(0x0105) __sfr WDTCON;
1284
1285 typedef union
1286 {
1287 struct
1288 {
1289 unsigned SWDTEN : 1;
1290 unsigned WDTPS0 : 1;
1291 unsigned WDTPS1 : 1;
1292 unsigned WDTPS2 : 1;
1293 unsigned WDTPS3 : 1;
1294 unsigned : 1;
1295 unsigned : 1;
1296 unsigned : 1;
1297 };
1298
1299 struct
1300 {
1301 unsigned SWDTE : 1;
1302 unsigned : 1;
1303 unsigned : 1;
1304 unsigned : 1;
1305 unsigned : 1;
1306 unsigned : 1;
1307 unsigned : 1;
1308 unsigned : 1;
1309 };
1310
1311 struct
1312 {
1313 unsigned : 1;
1314 unsigned WDTPS : 4;
1315 unsigned : 3;
1316 };
1317 } __WDTCONbits_t;
1318
1319 extern __at(0x0105) volatile __WDTCONbits_t WDTCONbits;
1320
1321 #define _SWDTEN 0x01
1322 #define _SWDTE 0x01
1323 #define _WDTPS0 0x02
1324 #define _WDTPS1 0x04
1325 #define _WDTPS2 0x08
1326 #define _WDTPS3 0x10
1327
1328 //==============================================================================
1329
1330 extern __at(0x010C) __sfr EEDATA;
1331 extern __at(0x010D) __sfr EEADR;
1332 extern __at(0x010E) __sfr EEDATH;
1333 extern __at(0x010F) __sfr EEADRH;
1334
1335 //==============================================================================
1336 // EECON1 Bits
1337
1338 extern __at(0x018C) __sfr EECON1;
1339
1340 typedef struct
1341 {
1342 unsigned RD : 1;
1343 unsigned WR : 1;
1344 unsigned WREN : 1;
1345 unsigned WRERR : 1;
1346 unsigned FREE : 1;
1347 unsigned : 1;
1348 unsigned : 1;
1349 unsigned EEPGD : 1;
1350 } __EECON1bits_t;
1351
1352 extern __at(0x018C) volatile __EECON1bits_t EECON1bits;
1353
1354 #define _RD 0x01
1355 #define _WR 0x02
1356 #define _WREN 0x04
1357 #define _WRERR 0x08
1358 #define _FREE 0x10
1359 #define _EEPGD 0x80
1360
1361 //==============================================================================
1362
1363 extern __at(0x018D) __sfr EECON2;
1364
1365 //==============================================================================
1366 //
1367 // Configuration Bits
1368 //
1369 //==============================================================================
1370
1371 #define _CONFIG1 0x2007
1372 #define _CONFIG2 0x2008
1373
1374 //----------------------------- CONFIG1 Options -------------------------------
1375
1376 #define _FOSC_LP 0x3FEC // LP oscillator.
1377 #define _LP_OSC 0x3FEC // LP oscillator.
1378 #define _FOSC_XT 0x3FED // XT oscillator.
1379 #define _XT_OSC 0x3FED // XT oscillator.
1380 #define _FOSC_HS 0x3FEE // HS oscillator.
1381 #define _HS_OSC 0x3FEE // HS oscillator.
1382 #define _FOSC_EC 0x3FEF // ECIO; port I/O function on RA6/OSC2/CLKO.
1383 #define _EXTCLK 0x3FEF // ECIO; port I/O function on RA6/OSC2/CLKO.
1384 #define _FOSC_INTOSCIO 0x3FFC // INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin.
1385 #define _INTRC_IO 0x3FFC // INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin.
1386 #define _FOSC_INTOSCCLK 0x3FFD // INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin.
1387 #define _INTRC_CLKOUT 0x3FFD // INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin.
1388 #define _FOSC_EXTRCIO 0x3FFE // EXTRC oscillator; port I/O function on RA6/OSC2/CLKO.
1389 #define _EXTRC_IO 0x3FFE // EXTRC oscillator; port I/O function on RA6/OSC2/CLKO.
1390 #define _FOSC_EXTRCCLK 0x3FFF // EXTRC oscillator; CLKO function on RA6/OSC2/CLKO.
1391 #define _EXTRC_CLKOUT 0x3FFF // EXTRC oscillator; CLKO function on RA6/OSC2/CLKO.
1392 #define _WDTE_OFF 0x3FFB // WDT disabled.
1393 #define _WDT_OFF 0x3FFB // WDT disabled.
1394 #define _WDTE_ON 0x3FFF // WDT enabled.
1395 #define _WDT_ON 0x3FFF // WDT enabled.
1396 #define _PWRTE_ON 0x3FF7 // PWRT enabled.
1397 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1398 #define _MCLRE_OFF 0x3FDF // RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD.
1399 #define _MCLR_OFF 0x3FDF // RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD.
1400 #define _MCLRE_ON 0x3FFF // RA5/MCLR/VPP pin function is MCLR.
1401 #define _MCLR_ON 0x3FFF // RA5/MCLR/VPP pin function is MCLR.
1402 #define _BOREN_OFF 0x3FBF // BOR disabled.
1403 #define _BODEN_OFF 0x3FBF // BOR disabled.
1404 #define _BOREN_ON 0x3FFF // BOR enabled.
1405 #define _BODEN_ON 0x3FFF // BOR enabled.
1406 #define _LVP_OFF 0x3F7F // RB3 is digital I/O, HV on MCLR must be used for programming.
1407 #define _LVP_ON 0x3FFF // RB3/PGM pin has PGM function, Low-Voltage Programming enabled.
1408 #define _CPD_ON 0x3EFF // Data EE memory code-protected.
1409 #define _CPD_OFF 0x3FFF // Code protection off.
1410 #define _WRT_ALL 0x39FF // 0000h to 0FFFh write-protected.
1411 #define _WRT_PROTECT_ALL 0x39FF // 0000h to 0FFFh write-protected.
1412 #define _WRT_2048 0x3BFF // 0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control.
1413 #define _WRT_PROTECT_2048 0x3BFF // 0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control.
1414 #define _WRT_256 0x3DFF // 0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control.
1415 #define _WRT_PROTECT_256 0x3DFF // 0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control.
1416 #define _WRT_OFF 0x3FFF // Write protection off.
1417 #define _WRT_PROTECT_OFF 0x3FFF // Write protection off.
1418 #define _DEBUG_ON 0x37FF // In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger.
1419 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins.
1420 #define _CCPMX_RB3 0x2FFF // CCP1 function on RB3.
1421 #define _CCP1_RB3 0x2FFF // CCP1 function on RB3.
1422 #define _CCPMX_RB0 0x3FFF // CCP1 function on RB0.
1423 #define _CCP1_RB0 0x3FFF // CCP1 function on RB0.
1424 #define _CP_ON 0x1FFF // 0000h to 0FFFh code-protected (all protected).
1425 #define _CP_ALL 0x1FFF // 0000h to 0FFFh code-protected (all protected).
1426 #define _CP_OFF 0x3FFF // Code protection off.
1427
1428 //----------------------------- CONFIG2 Options -------------------------------
1429
1430 #define _FCMEN_OFF 0x3FFE // Fail-Safe Clock Monitor disabled.
1431 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor enabled.
1432 #define _IESO_OFF 0x3FFD // Internal External Switchover mode disabled.
1433 #define _IESO_ON 0x3FFF // Internal External Switchover mode enabled.
1434
1435 //==============================================================================
1436
1437 #define _DEVID1 0x2006
1438
1439 #define _IDLOC0 0x2000
1440 #define _IDLOC1 0x2001
1441 #define _IDLOC2 0x2002
1442 #define _IDLOC3 0x2003
1443
1444 //==============================================================================
1445
1446 #ifndef NO_BIT_DEFINES
1447
1448 #define ADON ADCON0bits.ADON // bit 0
1449 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 2, shadows bit in ADCON0bits
1450 #define GO ADCON0bits.GO // bit 2, shadows bit in ADCON0bits
1451 #define NOT_DONE ADCON0bits.NOT_DONE // bit 2, shadows bit in ADCON0bits
1452 #define GO_DONE ADCON0bits.GO_DONE // bit 2, shadows bit in ADCON0bits
1453 #define CHS0 ADCON0bits.CHS0 // bit 3
1454 #define CHS1 ADCON0bits.CHS1 // bit 4
1455 #define CHS2 ADCON0bits.CHS2 // bit 5
1456 #define ADCS0 ADCON0bits.ADCS0 // bit 6
1457 #define ADCS1 ADCON0bits.ADCS1 // bit 7
1458
1459 #define VCFG0 ADCON1bits.VCFG0 // bit 4
1460 #define VCFG1 ADCON1bits.VCFG1 // bit 5
1461 #define ADCS2 ADCON1bits.ADCS2 // bit 6
1462 #define ADFM ADCON1bits.ADFM // bit 7
1463
1464 #define ANS0 ANSELbits.ANS0 // bit 0
1465 #define ANS1 ANSELbits.ANS1 // bit 1
1466 #define ANS2 ANSELbits.ANS2 // bit 2
1467 #define ANS3 ANSELbits.ANS3 // bit 3
1468 #define ANS4 ANSELbits.ANS4 // bit 4
1469 #define ANS5 ANSELbits.ANS5 // bit 5
1470 #define ANS6 ANSELbits.ANS6 // bit 6
1471
1472 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1473 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1474 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1475 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1476 #define CCP1Y CCP1CONbits.CCP1Y // bit 4
1477 #define CCP1X CCP1CONbits.CCP1X // bit 5
1478
1479 #define CM0 CMCONbits.CM0 // bit 0
1480 #define CM1 CMCONbits.CM1 // bit 1
1481 #define CM2 CMCONbits.CM2 // bit 2
1482 #define CIS CMCONbits.CIS // bit 3
1483 #define C1INV CMCONbits.C1INV // bit 4
1484 #define C2INV CMCONbits.C2INV // bit 5
1485 #define C1OUT CMCONbits.C1OUT // bit 6
1486 #define C2OUT CMCONbits.C2OUT // bit 7
1487
1488 #define CVR0 CVRCONbits.CVR0 // bit 0
1489 #define CVR1 CVRCONbits.CVR1 // bit 1
1490 #define CVR2 CVRCONbits.CVR2 // bit 2
1491 #define CVR3 CVRCONbits.CVR3 // bit 3
1492 #define CVRR CVRCONbits.CVRR // bit 5
1493 #define CVROE CVRCONbits.CVROE // bit 6
1494 #define CVREN CVRCONbits.CVREN // bit 7
1495
1496 #define RD EECON1bits.RD // bit 0
1497 #define WR EECON1bits.WR // bit 1
1498 #define WREN EECON1bits.WREN // bit 2
1499 #define WRERR EECON1bits.WRERR // bit 3
1500 #define FREE EECON1bits.FREE // bit 4
1501 #define EEPGD EECON1bits.EEPGD // bit 7
1502
1503 #define RBIF INTCONbits.RBIF // bit 0
1504 #define INT0IF INTCONbits.INT0IF // bit 1, shadows bit in INTCONbits
1505 #define INTF INTCONbits.INTF // bit 1, shadows bit in INTCONbits
1506 #define TMR0IF INTCONbits.TMR0IF // bit 2
1507 #define RBIE INTCONbits.RBIE // bit 3
1508 #define INT0IE INTCONbits.INT0IE // bit 4, shadows bit in INTCONbits
1509 #define INTE INTCONbits.INTE // bit 4, shadows bit in INTCONbits
1510 #define TMR0IE INTCONbits.TMR0IE // bit 5
1511 #define PEIE INTCONbits.PEIE // bit 6
1512 #define GIE INTCONbits.GIE // bit 7
1513
1514 #define PS0 OPTION_REGbits.PS0 // bit 0
1515 #define PS1 OPTION_REGbits.PS1 // bit 1
1516 #define PS2 OPTION_REGbits.PS2 // bit 2
1517 #define PSA OPTION_REGbits.PSA // bit 3
1518 #define T0SE OPTION_REGbits.T0SE // bit 4
1519 #define T0CS OPTION_REGbits.T0CS // bit 5
1520 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1521 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
1522
1523 #define SCS0 OSCCONbits.SCS0 // bit 0
1524 #define SCS1 OSCCONbits.SCS1 // bit 1
1525 #define IOFS OSCCONbits.IOFS // bit 2
1526 #define OSTS OSCCONbits.OSTS // bit 3
1527 #define IRCF0 OSCCONbits.IRCF0 // bit 4
1528 #define IRCF1 OSCCONbits.IRCF1 // bit 5
1529 #define IRCF2 OSCCONbits.IRCF2 // bit 6
1530
1531 #define TUN0 OSCTUNEbits.TUN0 // bit 0
1532 #define TUN1 OSCTUNEbits.TUN1 // bit 1
1533 #define TUN2 OSCTUNEbits.TUN2 // bit 2
1534 #define TUN3 OSCTUNEbits.TUN3 // bit 3
1535 #define TUN4 OSCTUNEbits.TUN4 // bit 4
1536 #define TUN5 OSCTUNEbits.TUN5 // bit 5
1537
1538 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1539 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
1540 #define NOT_POR PCONbits.NOT_POR // bit 1
1541
1542 #define TMR1IE PIE1bits.TMR1IE // bit 0
1543 #define TMR2IE PIE1bits.TMR2IE // bit 1
1544 #define CCP1IE PIE1bits.CCP1IE // bit 2
1545 #define SSPIE PIE1bits.SSPIE // bit 3
1546 #define TXIE PIE1bits.TXIE // bit 4
1547 #define RCIE PIE1bits.RCIE // bit 5
1548 #define ADIE PIE1bits.ADIE // bit 6
1549
1550 #define EEIE PIE2bits.EEIE // bit 4
1551 #define CMIE PIE2bits.CMIE // bit 6
1552 #define OSFIE PIE2bits.OSFIE // bit 7
1553
1554 #define TMR1IF PIR1bits.TMR1IF // bit 0
1555 #define TMR2IF PIR1bits.TMR2IF // bit 1
1556 #define CCP1IF PIR1bits.CCP1IF // bit 2
1557 #define SSPIF PIR1bits.SSPIF // bit 3
1558 #define TXIF PIR1bits.TXIF // bit 4
1559 #define RCIF PIR1bits.RCIF // bit 5
1560 #define ADIF PIR1bits.ADIF // bit 6
1561
1562 #define EEIF PIR2bits.EEIF // bit 4
1563 #define CMIF PIR2bits.CMIF // bit 6
1564 #define OSFIF PIR2bits.OSFIF // bit 7
1565
1566 #define RA0 PORTAbits.RA0 // bit 0
1567 #define RA1 PORTAbits.RA1 // bit 1
1568 #define RA2 PORTAbits.RA2 // bit 2
1569 #define RA3 PORTAbits.RA3 // bit 3
1570 #define RA4 PORTAbits.RA4 // bit 4
1571 #define RA5 PORTAbits.RA5 // bit 5
1572 #define RA6 PORTAbits.RA6 // bit 6
1573 #define RA7 PORTAbits.RA7 // bit 7
1574
1575 #define RB0 PORTBbits.RB0 // bit 0
1576 #define RB1 PORTBbits.RB1 // bit 1
1577 #define RB2 PORTBbits.RB2 // bit 2
1578 #define RB3 PORTBbits.RB3 // bit 3
1579 #define RB4 PORTBbits.RB4 // bit 4
1580 #define RB5 PORTBbits.RB5 // bit 5
1581 #define RB6 PORTBbits.RB6 // bit 6
1582 #define RB7 PORTBbits.RB7 // bit 7
1583
1584 #define RX9D RCSTAbits.RX9D // bit 0, shadows bit in RCSTAbits
1585 #define RCD8 RCSTAbits.RCD8 // bit 0, shadows bit in RCSTAbits
1586 #define OERR RCSTAbits.OERR // bit 1
1587 #define FERR RCSTAbits.FERR // bit 2
1588 #define ADDEN RCSTAbits.ADDEN // bit 3
1589 #define CREN RCSTAbits.CREN // bit 4
1590 #define SREN RCSTAbits.SREN // bit 5
1591 #define RX9 RCSTAbits.RX9 // bit 6, shadows bit in RCSTAbits
1592 #define RC9 RCSTAbits.RC9 // bit 6, shadows bit in RCSTAbits
1593 #define NOT_RC8 RCSTAbits.NOT_RC8 // bit 6, shadows bit in RCSTAbits
1594 #define RC8_9 RCSTAbits.RC8_9 // bit 6, shadows bit in RCSTAbits
1595 #define SPEN RCSTAbits.SPEN // bit 7
1596
1597 #define SSPM0 SSPCONbits.SSPM0 // bit 0
1598 #define SSPM1 SSPCONbits.SSPM1 // bit 1
1599 #define SSPM2 SSPCONbits.SSPM2 // bit 2
1600 #define SSPM3 SSPCONbits.SSPM3 // bit 3
1601 #define CKP SSPCONbits.CKP // bit 4
1602 #define SSPEN SSPCONbits.SSPEN // bit 5
1603 #define SSPOV SSPCONbits.SSPOV // bit 6
1604 #define WCOL SSPCONbits.WCOL // bit 7
1605
1606 #define BF SSPSTATbits.BF // bit 0
1607 #define UA SSPSTATbits.UA // bit 1
1608 #define R_NOT_W SSPSTATbits.R_NOT_W // bit 2, shadows bit in SSPSTATbits
1609 #define R SSPSTATbits.R // bit 2, shadows bit in SSPSTATbits
1610 #define I2C_READ SSPSTATbits.I2C_READ // bit 2, shadows bit in SSPSTATbits
1611 #define NOT_W SSPSTATbits.NOT_W // bit 2, shadows bit in SSPSTATbits
1612 #define NOT_WRITE SSPSTATbits.NOT_WRITE // bit 2, shadows bit in SSPSTATbits
1613 #define R_W SSPSTATbits.R_W // bit 2, shadows bit in SSPSTATbits
1614 #define READ_WRITE SSPSTATbits.READ_WRITE // bit 2, shadows bit in SSPSTATbits
1615 #define S SSPSTATbits.S // bit 3, shadows bit in SSPSTATbits
1616 #define I2C_START SSPSTATbits.I2C_START // bit 3, shadows bit in SSPSTATbits
1617 #define P SSPSTATbits.P // bit 4, shadows bit in SSPSTATbits
1618 #define I2C_STOP SSPSTATbits.I2C_STOP // bit 4, shadows bit in SSPSTATbits
1619 #define D_NOT_A SSPSTATbits.D_NOT_A // bit 5, shadows bit in SSPSTATbits
1620 #define D SSPSTATbits.D // bit 5, shadows bit in SSPSTATbits
1621 #define I2C_DATA SSPSTATbits.I2C_DATA // bit 5, shadows bit in SSPSTATbits
1622 #define NOT_A SSPSTATbits.NOT_A // bit 5, shadows bit in SSPSTATbits
1623 #define NOT_ADDRESS SSPSTATbits.NOT_ADDRESS // bit 5, shadows bit in SSPSTATbits
1624 #define D_A SSPSTATbits.D_A // bit 5, shadows bit in SSPSTATbits
1625 #define DATA_ADDRESS SSPSTATbits.DATA_ADDRESS // bit 5, shadows bit in SSPSTATbits
1626 #define CKE SSPSTATbits.CKE // bit 6
1627 #define SMP SSPSTATbits.SMP // bit 7
1628
1629 #define C STATUSbits.C // bit 0
1630 #define DC STATUSbits.DC // bit 1
1631 #define Z STATUSbits.Z // bit 2
1632 #define NOT_PD STATUSbits.NOT_PD // bit 3
1633 #define NOT_TO STATUSbits.NOT_TO // bit 4
1634 #define RP0 STATUSbits.RP0 // bit 5
1635 #define RP1 STATUSbits.RP1 // bit 6
1636 #define IRP STATUSbits.IRP // bit 7
1637
1638 #define TMR1ON T1CONbits.TMR1ON // bit 0
1639 #define TMR1CS T1CONbits.TMR1CS // bit 1
1640 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits
1641 #define T1INSYNC T1CONbits.T1INSYNC // bit 2, shadows bit in T1CONbits
1642 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1643 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1644 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1645 #define T1RUN T1CONbits.T1RUN // bit 6
1646
1647 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1648 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1649 #define TMR2ON T2CONbits.TMR2ON // bit 2
1650 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1651 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1652 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1653 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1654
1655 #define TRISA0 TRISAbits.TRISA0 // bit 0
1656 #define TRISA1 TRISAbits.TRISA1 // bit 1
1657 #define TRISA2 TRISAbits.TRISA2 // bit 2
1658 #define TRISA3 TRISAbits.TRISA3 // bit 3
1659 #define TRISA4 TRISAbits.TRISA4 // bit 4
1660 #define TRISA5 TRISAbits.TRISA5 // bit 5
1661 #define TRISA6 TRISAbits.TRISA6 // bit 6
1662 #define TRISA7 TRISAbits.TRISA7 // bit 7
1663
1664 #define TRISB0 TRISBbits.TRISB0 // bit 0
1665 #define TRISB1 TRISBbits.TRISB1 // bit 1
1666 #define TRISB2 TRISBbits.TRISB2 // bit 2
1667 #define TRISB3 TRISBbits.TRISB3 // bit 3
1668 #define TRISB4 TRISBbits.TRISB4 // bit 4
1669 #define TRISB5 TRISBbits.TRISB5 // bit 5
1670 #define TRISB6 TRISBbits.TRISB6 // bit 6
1671 #define TRISB7 TRISBbits.TRISB7 // bit 7
1672
1673 #define TX9D TXSTAbits.TX9D // bit 0, shadows bit in TXSTAbits
1674 #define TXD8 TXSTAbits.TXD8 // bit 0, shadows bit in TXSTAbits
1675 #define TRMT TXSTAbits.TRMT // bit 1
1676 #define BRGH TXSTAbits.BRGH // bit 2
1677 #define SYNC TXSTAbits.SYNC // bit 4
1678 #define TXEN TXSTAbits.TXEN // bit 5
1679 #define TX9 TXSTAbits.TX9 // bit 6, shadows bit in TXSTAbits
1680 #define NOT_TX8 TXSTAbits.NOT_TX8 // bit 6, shadows bit in TXSTAbits
1681 #define TX8_9 TXSTAbits.TX8_9 // bit 6, shadows bit in TXSTAbits
1682 #define CSRC TXSTAbits.CSRC // bit 7
1683
1684 #define SWDTEN WDTCONbits.SWDTEN // bit 0, shadows bit in WDTCONbits
1685 #define SWDTE WDTCONbits.SWDTE // bit 0, shadows bit in WDTCONbits
1686 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
1687 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
1688 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
1689 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
1690
1691 #endif // #ifndef NO_BIT_DEFINES
1692
1693 #endif // #ifndef __PIC16LF88_H__
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